drivers/net/ethernet/intel/i40e/i40e_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
   3
   4 #include <linux/etherdevice.h>
   5 #include <linux/of_net.h>
   6 #include <linux/pci.h>
   7 #include <linux/bpf.h>
   8 #include <generated/utsrelease.h>
   9 #include <linux/crash_dump.h>
  10
  11 /* Local includes */
  12 #include "i40e.h"
  13 #include "i40e_diag.h"
  14 #include "i40e_xsk.h"
  15 #include <net/udp_tunnel.h>
  16 #include <net/xdp_sock_drv.h>
  17 /* All i40e tracepoints are defined by the include below, which
  18  * must be included exactly once across the whole kernel with
  19  * CREATE_TRACE_POINTS defined
  20  */
  21 #define CREATE_TRACE_POINTS
  22 #include "i40e_trace.h"
  23
  24 const char i40e_driver_name[] = "i40e";
  25 static const char i40e_driver_string[] =
  26                         "Intel(R) Ethernet Connection XL710 Network Driver";
  27
  28 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
  29
  30 /* a bit of forward declarations */
  31 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
  32 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
  33 static int i40e_add_vsi(struct i40e_vsi *vsi);
  34 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
  35 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired);
  36 static int i40e_setup_misc_vector(struct i40e_pf *pf);
  37 static void i40e_determine_queue_usage(struct i40e_pf *pf);
  38 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
  39 static void i40e_prep_for_reset(struct i40e_pf *pf);
  40 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
  41                                    bool lock_acquired);
  42 static int i40e_reset(struct i40e_pf *pf);
  43 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
  44 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf);
  45 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf);
  46 static bool i40e_check_recovery_mode(struct i40e_pf *pf);
  47 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw);
  48 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
  49 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
  50 static int i40e_get_capabilities(struct i40e_pf *pf,
  51                                  enum i40e_admin_queue_opc list_type);
  52 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf);
  53
  54 /* i40e_pci_tbl - PCI Device ID Table
  55  *
  56  * Last entry must be all 0s
  57  *
  58  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  59  *   Class, Class Mask, private data (not used) }
  60  */
  61 static const struct pci_device_id i40e_pci_tbl[] = {
  62         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
  63         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
  64         {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
  65         {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
  66         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
  67         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
  68         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
  69         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
  70         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
  71         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_BC), 0},
  72         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_SFP), 0},
  73         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_B), 0},
  74         {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
  75         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
  76         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
  77         {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
  78         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
  79         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
  80         {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
  81         {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
  82         {PCI_VDEVICE(INTEL, I40E_DEV_ID_X710_N3000), 0},
  83         {PCI_VDEVICE(INTEL, I40E_DEV_ID_XXV710_N3000), 0},
  84         {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
  85         {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
  86         /* required last entry */
  87         {0, }
  88 };
  89 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
  90
  91 #define I40E_MAX_VF_COUNT 128
  92 static int debug = -1;
  93 module_param(debug, uint, 0);
  94 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
  95
  96 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
  97 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
  98 MODULE_LICENSE("GPL v2");
  99
 100 static struct workqueue_struct *i40e_wq;
 101
 102 /**
 103  * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
 104  * @hw:   pointer to the HW structure
 105  * @mem:  ptr to mem struct to fill out
 106  * @size: size of memory requested
 107  * @alignment: what to align the allocation to
 108  **/
 109 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
 110                             u64 size, u32 alignment)
 111 {
 112         struct i40e_pf *pf = (struct i40e_pf *)hw->back;
 113
 114         mem->size = ALIGN(size, alignment);
 115         mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa,
 116                                      GFP_KERNEL);
 117         if (!mem->va)
 118                 return -ENOMEM;
 119
 120         return 0;
 121 }
 122
 123 /**
 124  * i40e_free_dma_mem_d - OS specific memory free for shared code
 125  * @hw:   pointer to the HW structure
 126  * @mem:  ptr to mem struct to free
 127  **/
 128 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
 129 {
 130         struct i40e_pf *pf = (struct i40e_pf *)hw->back;
 131
 132         dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
 133         mem->va = NULL;
 134         mem->pa = 0;
 135         mem->size = 0;
 136
 137         return 0;
 138 }
 139
 140 /**
 141  * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
 142  * @hw:   pointer to the HW structure
 143  * @mem:  ptr to mem struct to fill out
 144  * @size: size of memory requested
 145  **/
 146 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
 147                              u32 size)
 148 {
 149         mem->size = size;
 150         mem->va = kzalloc(size, GFP_KERNEL);
 151
 152         if (!mem->va)
 153                 return -ENOMEM;
 154
 155         return 0;
 156 }
 157
 158 /**
 159  * i40e_free_virt_mem_d - OS specific memory free for shared code
 160  * @hw:   pointer to the HW structure
 161  * @mem:  ptr to mem struct to free
 162  **/
 163 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
 164 {
 165         /* it's ok to kfree a NULL pointer */
 166         kfree(mem->va);
 167         mem->va = NULL;
 168         mem->size = 0;
 169
 170         return 0;
 171 }
 172
 173 /**
 174  * i40e_get_lump - find a lump of free generic resource
 175  * @pf: board private structure
 176  * @pile: the pile of resource to search
 177  * @needed: the number of items needed
 178  * @id: an owner id to stick on the items assigned
 179  *
 180  * Returns the base item index of the lump, or negative for error
 181  *
 182  * The search_hint trick and lack of advanced fit-finding only work
 183  * because we're highly likely to have all the same size lump requests.
 184  * Linear search time and any fragmentation should be minimal.
 185  **/
 186 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
 187                          u16 needed, u16 id)
 188 {
 189         int ret = -ENOMEM;
 190         int i, j;
 191
 192         if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
 193                 dev_info(&pf->pdev->dev,
 194                          "param err: pile=%s needed=%d id=0x%04x\n",
 195                          pile ? "<valid>" : "<null>", needed, id);
 196                 return -EINVAL;
 197         }
 198
 199         /* start the linear search with an imperfect hint */
 200         i = pile->search_hint;
 201         while (i < pile->num_entries) {
 202                 /* skip already allocated entries */
 203                 if (pile->list[i] & I40E_PILE_VALID_BIT) {
 204                         i++;
 205                         continue;
 206                 }
 207
 208                 /* do we have enough in this lump? */
 209                 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
 210                         if (pile->list[i+j] & I40E_PILE_VALID_BIT)
 211                                 break;
 212                 }
 213
 214                 if (j == needed) {
 215                         /* there was enough, so assign it to the requestor */
 216                         for (j = 0; j < needed; j++)
 217                                 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
 218                         ret = i;
 219                         pile->search_hint = i + j;
 220                         break;
 221                 }
 222
 223                 /* not enough, so skip over it and continue looking */
 224                 i += j;
 225         }
 226
 227         return ret;
 228 }
 229
 230 /**
 231  * i40e_put_lump - return a lump of generic resource
 232  * @pile: the pile of resource to search
 233  * @index: the base item index
 234  * @id: the owner id of the items assigned
 235  *
 236  * Returns the count of items in the lump
 237  **/
 238 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
 239 {
 240         int valid_id = (id | I40E_PILE_VALID_BIT);
 241         int count = 0;
 242         int i;
 243
 244         if (!pile || index >= pile->num_entries)
 245                 return -EINVAL;
 246
 247         for (i = index;
 248              i < pile->num_entries && pile->list[i] == valid_id;
 249              i++) {
 250                 pile->list[i] = 0;
 251                 count++;
 252         }
 253
 254         if (count && index < pile->search_hint)
 255                 pile->search_hint = index;
 256
 257         return count;
 258 }
 259
 260 /**
 261  * i40e_find_vsi_from_id - searches for the vsi with the given id
 262  * @pf: the pf structure to search for the vsi
 263  * @id: id of the vsi it is searching for
 264  **/
 265 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
 266 {
 267         int i;
 268
 269         for (i = 0; i < pf->num_alloc_vsi; i++)
 270                 if (pf->vsi[i] && (pf->vsi[i]->id == id))
 271                         return pf->vsi[i];
 272
 273         return NULL;
 274 }
 275
 276 /**
 277  * i40e_service_event_schedule - Schedule the service task to wake up
 278  * @pf: board private structure
 279  *
 280  * If not already scheduled, this puts the task into the work queue
 281  **/
 282 void i40e_service_event_schedule(struct i40e_pf *pf)
 283 {
 284         if ((!test_bit(__I40E_DOWN, pf->state) &&
 285              !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) ||
 286               test_bit(__I40E_RECOVERY_MODE, pf->state))
 287                 queue_work(i40e_wq, &pf->service_task);
 288 }
 289
 290 /**
 291  * i40e_tx_timeout - Respond to a Tx Hang
 292  * @netdev: network interface device structure
 293  * @txqueue: queue number timing out
 294  *
 295  * If any port has noticed a Tx timeout, it is likely that the whole
 296  * device is munged, not just the one netdev port, so go for the full
 297  * reset.
 298  **/
 299 static void i40e_tx_timeout(struct net_device *netdev, unsigned int txqueue)
 300 {
 301         struct i40e_netdev_priv *np = netdev_priv(netdev);
 302         struct i40e_vsi *vsi = np->vsi;
 303         struct i40e_pf *pf = vsi->back;
 304         struct i40e_ring *tx_ring = NULL;
 305         unsigned int i;
 306         u32 head, val;
 307
 308         pf->tx_timeout_count++;
 309
 310         /* with txqueue index, find the tx_ring struct */
 311         for (i = 0; i < vsi->num_queue_pairs; i++) {
 312                 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
 313                         if (txqueue ==
 314                             vsi->tx_rings[i]->queue_index) {
 315                                 tx_ring = vsi->tx_rings[i];
 316                                 break;
 317                         }
 318                 }
 319         }
 320
 321         if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
 322                 pf->tx_timeout_recovery_level = 1;  /* reset after some time */
 323         else if (time_before(jiffies,
 324                       (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
 325                 return;   /* don't do any new action before the next timeout */
 326
 327         /* don't kick off another recovery if one is already pending */
 328         if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state))
 329                 return;
 330
 331         if (tx_ring) {
 332                 head = i40e_get_head(tx_ring);
 333                 /* Read interrupt register */
 334                 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
 335                         val = rd32(&pf->hw,
 336                              I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
 337                                                 tx_ring->vsi->base_vector - 1));
 338                 else
 339                         val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
 340
 341                 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
 342                             vsi->seid, txqueue, tx_ring->next_to_clean,
 343                             head, tx_ring->next_to_use,
 344                             readl(tx_ring->tail), val);
 345         }
 346
 347         pf->tx_timeout_last_recovery = jiffies;
 348         netdev_info(netdev, "tx_timeout recovery level %d, txqueue %d\n",
 349                     pf->tx_timeout_recovery_level, txqueue);
 350
 351         switch (pf->tx_timeout_recovery_level) {
 352         case 1:
 353                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
 354                 break;
 355         case 2:
 356                 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
 357                 break;
 358         case 3:
 359                 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
 360                 break;
 361         default:
 362                 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
 363                 break;
 364         }
 365
 366         i40e_service_event_schedule(pf);
 367         pf->tx_timeout_recovery_level++;
 368 }
 369
 370 /**
 371  * i40e_get_vsi_stats_struct - Get System Network Statistics
 372  * @vsi: the VSI we care about
 373  *
 374  * Returns the address of the device statistics structure.
 375  * The statistics are actually updated from the service task.
 376  **/
 377 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
 378 {
 379         return &vsi->net_stats;
 380 }
 381
 382 /**
 383  * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
 384  * @ring: Tx ring to get statistics from
 385  * @stats: statistics entry to be updated
 386  **/
 387 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring,
 388                                             struct rtnl_link_stats64 *stats)
 389 {
 390         u64 bytes, packets;
 391         unsigned int start;
 392
 393         do {
 394                 start = u64_stats_fetch_begin_irq(&ring->syncp);
 395                 packets = ring->stats.packets;
 396                 bytes   = ring->stats.bytes;
 397         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
 398
 399         stats->tx_packets += packets;
 400         stats->tx_bytes   += bytes;
 401 }
 402
 403 /**
 404  * i40e_get_netdev_stats_struct - Get statistics for netdev interface
 405  * @netdev: network interface device structure
 406  * @stats: data structure to store statistics
 407  *
 408  * Returns the address of the device statistics structure.
 409  * The statistics are actually updated from the service task.
 410  **/
 411 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
 412                                   struct rtnl_link_stats64 *stats)
 413 {
 414         struct i40e_netdev_priv *np = netdev_priv(netdev);
 415         struct i40e_vsi *vsi = np->vsi;
 416         struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
 417         struct i40e_ring *ring;
 418         int i;
 419
 420         if (test_bit(__I40E_VSI_DOWN, vsi->state))
 421                 return;
 422
 423         if (!vsi->tx_rings)
 424                 return;
 425
 426         rcu_read_lock();
 427         for (i = 0; i < vsi->num_queue_pairs; i++) {
 428                 u64 bytes, packets;
 429                 unsigned int start;
 430
 431                 ring = READ_ONCE(vsi->tx_rings[i]);
 432                 if (!ring)
 433                         continue;
 434                 i40e_get_netdev_stats_struct_tx(ring, stats);
 435
 436                 if (i40e_enabled_xdp_vsi(vsi)) {
 437                         ring = READ_ONCE(vsi->xdp_rings[i]);
 438                         if (!ring)
 439                                 continue;
 440                         i40e_get_netdev_stats_struct_tx(ring, stats);
 441                 }
 442
 443                 ring = READ_ONCE(vsi->rx_rings[i]);
 444                 if (!ring)
 445                         continue;
 446                 do {
 447                         start   = u64_stats_fetch_begin_irq(&ring->syncp);
 448                         packets = ring->stats.packets;
 449                         bytes   = ring->stats.bytes;
 450                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
 451
 452                 stats->rx_packets += packets;
 453                 stats->rx_bytes   += bytes;
 454
 455         }
 456         rcu_read_unlock();
 457
 458         /* following stats updated by i40e_watchdog_subtask() */
 459         stats->multicast        = vsi_stats->multicast;
 460         stats->tx_errors        = vsi_stats->tx_errors;
 461         stats->tx_dropped       = vsi_stats->tx_dropped;
 462         stats->rx_errors        = vsi_stats->rx_errors;
 463         stats->rx_dropped       = vsi_stats->rx_dropped;
 464         stats->rx_crc_errors    = vsi_stats->rx_crc_errors;
 465         stats->rx_length_errors = vsi_stats->rx_length_errors;
 466 }
 467
 468 /**
 469  * i40e_vsi_reset_stats - Resets all stats of the given vsi
 470  * @vsi: the VSI to have its stats reset
 471  **/
 472 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
 473 {
 474         struct rtnl_link_stats64 *ns;
 475         int i;
 476
 477         if (!vsi)
 478                 return;
 479
 480         ns = i40e_get_vsi_stats_struct(vsi);
 481         memset(ns, 0, sizeof(*ns));
 482         memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
 483         memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
 484         memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
 485         if (vsi->rx_rings && vsi->rx_rings[0]) {
 486                 for (i = 0; i < vsi->num_queue_pairs; i++) {
 487                         memset(&vsi->rx_rings[i]->stats, 0,
 488                                sizeof(vsi->rx_rings[i]->stats));
 489                         memset(&vsi->rx_rings[i]->rx_stats, 0,
 490                                sizeof(vsi->rx_rings[i]->rx_stats));
 491                         memset(&vsi->tx_rings[i]->stats, 0,
 492                                sizeof(vsi->tx_rings[i]->stats));
 493                         memset(&vsi->tx_rings[i]->tx_stats, 0,
 494                                sizeof(vsi->tx_rings[i]->tx_stats));
 495                 }
 496         }
 497         vsi->stat_offsets_loaded = false;
 498 }
 499
 500 /**
 501  * i40e_pf_reset_stats - Reset all of the stats for the given PF
 502  * @pf: the PF to be reset
 503  **/
 504 void i40e_pf_reset_stats(struct i40e_pf *pf)
 505 {
 506         int i;
 507
 508         memset(&pf->stats, 0, sizeof(pf->stats));
 509         memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
 510         pf->stat_offsets_loaded = false;
 511
 512         for (i = 0; i < I40E_MAX_VEB; i++) {
 513                 if (pf->veb[i]) {
 514                         memset(&pf->veb[i]->stats, 0,
 515                                sizeof(pf->veb[i]->stats));
 516                         memset(&pf->veb[i]->stats_offsets, 0,
 517                                sizeof(pf->veb[i]->stats_offsets));
 518                         memset(&pf->veb[i]->tc_stats, 0,
 519                                sizeof(pf->veb[i]->tc_stats));
 520                         memset(&pf->veb[i]->tc_stats_offsets, 0,
 521                                sizeof(pf->veb[i]->tc_stats_offsets));
 522                         pf->veb[i]->stat_offsets_loaded = false;
 523                 }
 524         }
 525         pf->hw_csum_rx_error = 0;
 526 }
 527
 528 /**
 529  * i40e_stat_update48 - read and update a 48 bit stat from the chip
 530  * @hw: ptr to the hardware info
 531  * @hireg: the high 32 bit reg to read
 532  * @loreg: the low 32 bit reg to read
 533  * @offset_loaded: has the initial offset been loaded yet
 534  * @offset: ptr to current offset value
 535  * @stat: ptr to the stat
 536  *
 537  * Since the device stats are not reset at PFReset, they likely will not
 538  * be zeroed when the driver starts.  We'll save the first values read
 539  * and use them as offsets to be subtracted from the raw values in order
 540  * to report stats that count from zero.  In the process, we also manage
 541  * the potential roll-over.
 542  **/
 543 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
 544                                bool offset_loaded, u64 *offset, u64 *stat)
 545 {
 546         u64 new_data;
 547
 548         if (hw->device_id == I40E_DEV_ID_QEMU) {
 549                 new_data = rd32(hw, loreg);
 550                 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
 551         } else {
 552                 new_data = rd64(hw, loreg);
 553         }
 554         if (!offset_loaded)
 555                 *offset = new_data;
 556         if (likely(new_data >= *offset))
 557                 *stat = new_data - *offset;
 558         else
 559                 *stat = (new_data + BIT_ULL(48)) - *offset;
 560         *stat &= 0xFFFFFFFFFFFFULL;
 561 }
 562
 563 /**
 564  * i40e_stat_update32 - read and update a 32 bit stat from the chip
 565  * @hw: ptr to the hardware info
 566  * @reg: the hw reg to read
 567  * @offset_loaded: has the initial offset been loaded yet
 568  * @offset: ptr to current offset value
 569  * @stat: ptr to the stat
 570  **/
 571 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
 572                                bool offset_loaded, u64 *offset, u64 *stat)
 573 {
 574         u32 new_data;
 575
 576         new_data = rd32(hw, reg);
 577         if (!offset_loaded)
 578                 *offset = new_data;
 579         if (likely(new_data >= *offset))
 580                 *stat = (u32)(new_data - *offset);
 581         else
 582                 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
 583 }
 584
 585 /**
 586  * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
 587  * @hw: ptr to the hardware info
 588  * @reg: the hw reg to read and clear
 589  * @stat: ptr to the stat
 590  **/
 591 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat)
 592 {
 593         u32 new_data = rd32(hw, reg);
 594
 595         wr32(hw, reg, 1); /* must write a nonzero value to clear register */
 596         *stat += new_data;
 597 }
 598
 599 /**
 600  * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
 601  * @vsi: the VSI to be updated
 602  **/
 603 void i40e_update_eth_stats(struct i40e_vsi *vsi)
 604 {
 605         int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
 606         struct i40e_pf *pf = vsi->back;
 607         struct i40e_hw *hw = &pf->hw;
 608         struct i40e_eth_stats *oes;
 609         struct i40e_eth_stats *es;     /* device's eth stats */
 610
 611         es = &vsi->eth_stats;
 612         oes = &vsi->eth_stats_offsets;
 613
 614         /* Gather up the stats that the hw collects */
 615         i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
 616                            vsi->stat_offsets_loaded,
 617                            &oes->tx_errors, &es->tx_errors);
 618         i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
 619                            vsi->stat_offsets_loaded,
 620                            &oes->rx_discards, &es->rx_discards);
 621         i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
 622                            vsi->stat_offsets_loaded,
 623                            &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
 624
 625         i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
 626                            I40E_GLV_GORCL(stat_idx),
 627                            vsi->stat_offsets_loaded,
 628                            &oes->rx_bytes, &es->rx_bytes);
 629         i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
 630                            I40E_GLV_UPRCL(stat_idx),
 631                            vsi->stat_offsets_loaded,
 632                            &oes->rx_unicast, &es->rx_unicast);
 633         i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
 634                            I40E_GLV_MPRCL(stat_idx),
 635                            vsi->stat_offsets_loaded,
 636                            &oes->rx_multicast, &es->rx_multicast);
 637         i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
 638                            I40E_GLV_BPRCL(stat_idx),
 639                            vsi->stat_offsets_loaded,
 640                            &oes->rx_broadcast, &es->rx_broadcast);
 641
 642         i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
 643                            I40E_GLV_GOTCL(stat_idx),
 644                            vsi->stat_offsets_loaded,
 645                            &oes->tx_bytes, &es->tx_bytes);
 646         i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
 647                            I40E_GLV_UPTCL(stat_idx),
 648                            vsi->stat_offsets_loaded,
 649                            &oes->tx_unicast, &es->tx_unicast);
 650         i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
 651                            I40E_GLV_MPTCL(stat_idx),
 652                            vsi->stat_offsets_loaded,
 653                            &oes->tx_multicast, &es->tx_multicast);
 654         i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
 655                            I40E_GLV_BPTCL(stat_idx),
 656                            vsi->stat_offsets_loaded,
 657                            &oes->tx_broadcast, &es->tx_broadcast);
 658         vsi->stat_offsets_loaded = true;
 659 }
 660
 661 /**
 662  * i40e_update_veb_stats - Update Switch component statistics
 663  * @veb: the VEB being updated
 664  **/
 665 void i40e_update_veb_stats(struct i40e_veb *veb)
 666 {
 667         struct i40e_pf *pf = veb->pf;
 668         struct i40e_hw *hw = &pf->hw;
 669         struct i40e_eth_stats *oes;
 670         struct i40e_eth_stats *es;     /* device's eth stats */
 671         struct i40e_veb_tc_stats *veb_oes;
 672         struct i40e_veb_tc_stats *veb_es;
 673         int i, idx = 0;
 674
 675         idx = veb->stats_idx;
 676         es = &veb->stats;
 677         oes = &veb->stats_offsets;
 678         veb_es = &veb->tc_stats;
 679         veb_oes = &veb->tc_stats_offsets;
 680
 681         /* Gather up the stats that the hw collects */
 682         i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
 683                            veb->stat_offsets_loaded,
 684                            &oes->tx_discards, &es->tx_discards);
 685         if (hw->revision_id > 0)
 686                 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
 687                                    veb->stat_offsets_loaded,
 688                                    &oes->rx_unknown_protocol,
 689                                    &es->rx_unknown_protocol);
 690         i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
 691                            veb->stat_offsets_loaded,
 692                            &oes->rx_bytes, &es->rx_bytes);
 693         i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
 694                            veb->stat_offsets_loaded,
 695                            &oes->rx_unicast, &es->rx_unicast);
 696         i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
 697                            veb->stat_offsets_loaded,
 698                            &oes->rx_multicast, &es->rx_multicast);
 699         i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
 700                            veb->stat_offsets_loaded,
 701                            &oes->rx_broadcast, &es->rx_broadcast);
 702
 703         i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
 704                            veb->stat_offsets_loaded,
 705                            &oes->tx_bytes, &es->tx_bytes);
 706         i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
 707                            veb->stat_offsets_loaded,
 708                            &oes->tx_unicast, &es->tx_unicast);
 709         i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
 710                            veb->stat_offsets_loaded,
 711                            &oes->tx_multicast, &es->tx_multicast);
 712         i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
 713                            veb->stat_offsets_loaded,
 714                            &oes->tx_broadcast, &es->tx_broadcast);
 715         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
 716                 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
 717                                    I40E_GLVEBTC_RPCL(i, idx),
 718                                    veb->stat_offsets_loaded,
 719                                    &veb_oes->tc_rx_packets[i],
 720                                    &veb_es->tc_rx_packets[i]);
 721                 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
 722                                    I40E_GLVEBTC_RBCL(i, idx),
 723                                    veb->stat_offsets_loaded,
 724                                    &veb_oes->tc_rx_bytes[i],
 725                                    &veb_es->tc_rx_bytes[i]);
 726                 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
 727                                    I40E_GLVEBTC_TPCL(i, idx),
 728                                    veb->stat_offsets_loaded,
 729                                    &veb_oes->tc_tx_packets[i],
 730                                    &veb_es->tc_tx_packets[i]);
 731                 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
 732                                    I40E_GLVEBTC_TBCL(i, idx),
 733                                    veb->stat_offsets_loaded,
 734                                    &veb_oes->tc_tx_bytes[i],
 735                                    &veb_es->tc_tx_bytes[i]);
 736         }
 737         veb->stat_offsets_loaded = true;
 738 }
 739
 740 /**
 741  * i40e_update_vsi_stats - Update the vsi statistics counters.
 742  * @vsi: the VSI to be updated
 743  *
 744  * There are a few instances where we store the same stat in a
 745  * couple of different structs.  This is partly because we have
 746  * the netdev stats that need to be filled out, which is slightly
 747  * different from the "eth_stats" defined by the chip and used in
 748  * VF communications.  We sort it out here.
 749  **/
 750 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
 751 {
 752         struct i40e_pf *pf = vsi->back;
 753         struct rtnl_link_stats64 *ons;
 754         struct rtnl_link_stats64 *ns;   /* netdev stats */
 755         struct i40e_eth_stats *oes;
 756         struct i40e_eth_stats *es;     /* device's eth stats */
 757         u32 tx_restart, tx_busy;
 758         struct i40e_ring *p;
 759         u32 rx_page, rx_buf;
 760         u64 bytes, packets;
 761         unsigned int start;
 762         u64 tx_linearize;
 763         u64 tx_force_wb;
 764         u64 rx_p, rx_b;
 765         u64 tx_p, tx_b;
 766         u16 q;
 767
 768         if (test_bit(__I40E_VSI_DOWN, vsi->state) ||
 769             test_bit(__I40E_CONFIG_BUSY, pf->state))
 770                 return;
 771
 772         ns = i40e_get_vsi_stats_struct(vsi);
 773         ons = &vsi->net_stats_offsets;
 774         es = &vsi->eth_stats;
 775         oes = &vsi->eth_stats_offsets;
 776
 777         /* Gather up the netdev and vsi stats that the driver collects
 778          * on the fly during packet processing
 779          */
 780         rx_b = rx_p = 0;
 781         tx_b = tx_p = 0;
 782         tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
 783         rx_page = 0;
 784         rx_buf = 0;
 785         rcu_read_lock();
 786         for (q = 0; q < vsi->num_queue_pairs; q++) {
 787                 /* locate Tx ring */
 788                 p = READ_ONCE(vsi->tx_rings[q]);
 789                 if (!p)
 790                         continue;
 791
 792                 do {
 793                         start = u64_stats_fetch_begin_irq(&p->syncp);
 794                         packets = p->stats.packets;
 795                         bytes = p->stats.bytes;
 796                 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
 797                 tx_b += bytes;
 798                 tx_p += packets;
 799                 tx_restart += p->tx_stats.restart_queue;
 800                 tx_busy += p->tx_stats.tx_busy;
 801                 tx_linearize += p->tx_stats.tx_linearize;
 802                 tx_force_wb += p->tx_stats.tx_force_wb;
 803
 804                 /* locate Rx ring */
 805                 p = READ_ONCE(vsi->rx_rings[q]);
 806                 if (!p)
 807                         continue;
 808
 809                 do {
 810                         start = u64_stats_fetch_begin_irq(&p->syncp);
 811                         packets = p->stats.packets;
 812                         bytes = p->stats.bytes;
 813                 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
 814                 rx_b += bytes;
 815                 rx_p += packets;
 816                 rx_buf += p->rx_stats.alloc_buff_failed;
 817                 rx_page += p->rx_stats.alloc_page_failed;
 818
 819                 if (i40e_enabled_xdp_vsi(vsi)) {
 820                         /* locate XDP ring */
 821                         p = READ_ONCE(vsi->xdp_rings[q]);
 822                         if (!p)
 823                                 continue;
 824
 825                         do {
 826                                 start = u64_stats_fetch_begin_irq(&p->syncp);
 827                                 packets = p->stats.packets;
 828                                 bytes = p->stats.bytes;
 829                         } while (u64_stats_fetch_retry_irq(&p->syncp, start));
 830                         tx_b += bytes;
 831                         tx_p += packets;
 832                         tx_restart += p->tx_stats.restart_queue;
 833                         tx_busy += p->tx_stats.tx_busy;
 834                         tx_linearize += p->tx_stats.tx_linearize;
 835                         tx_force_wb += p->tx_stats.tx_force_wb;
 836                 }
 837         }
 838         rcu_read_unlock();
 839         vsi->tx_restart = tx_restart;
 840         vsi->tx_busy = tx_busy;
 841         vsi->tx_linearize = tx_linearize;
 842         vsi->tx_force_wb = tx_force_wb;
 843         vsi->rx_page_failed = rx_page;
 844         vsi->rx_buf_failed = rx_buf;
 845
 846         ns->rx_packets = rx_p;
 847         ns->rx_bytes = rx_b;
 848         ns->tx_packets = tx_p;
 849         ns->tx_bytes = tx_b;
 850
 851         /* update netdev stats from eth stats */
 852         i40e_update_eth_stats(vsi);
 853         ons->tx_errors = oes->tx_errors;
 854         ns->tx_errors = es->tx_errors;
 855         ons->multicast = oes->rx_multicast;
 856         ns->multicast = es->rx_multicast;
 857         ons->rx_dropped = oes->rx_discards;
 858         ns->rx_dropped = es->rx_discards;
 859         ons->tx_dropped = oes->tx_discards;
 860         ns->tx_dropped = es->tx_discards;
 861
 862         /* pull in a couple PF stats if this is the main vsi */
 863         if (vsi == pf->vsi[pf->lan_vsi]) {
 864                 ns->rx_crc_errors = pf->stats.crc_errors;
 865                 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
 866                 ns->rx_length_errors = pf->stats.rx_length_errors;
 867         }
 868 }
 869
 870 /**
 871  * i40e_update_pf_stats - Update the PF statistics counters.
 872  * @pf: the PF to be updated
 873  **/
 874 static void i40e_update_pf_stats(struct i40e_pf *pf)
 875 {
 876         struct i40e_hw_port_stats *osd = &pf->stats_offsets;
 877         struct i40e_hw_port_stats *nsd = &pf->stats;
 878         struct i40e_hw *hw = &pf->hw;
 879         u32 val;
 880         int i;
 881
 882         i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
 883                            I40E_GLPRT_GORCL(hw->port),
 884                            pf->stat_offsets_loaded,
 885                            &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
 886         i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
 887                            I40E_GLPRT_GOTCL(hw->port),
 888                            pf->stat_offsets_loaded,
 889                            &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
 890         i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
 891                            pf->stat_offsets_loaded,
 892                            &osd->eth.rx_discards,
 893                            &nsd->eth.rx_discards);
 894         i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
 895                            I40E_GLPRT_UPRCL(hw->port),
 896                            pf->stat_offsets_loaded,
 897                            &osd->eth.rx_unicast,
 898                            &nsd->eth.rx_unicast);
 899         i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
 900                            I40E_GLPRT_MPRCL(hw->port),
 901                            pf->stat_offsets_loaded,
 902                            &osd->eth.rx_multicast,
 903                            &nsd->eth.rx_multicast);
 904         i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
 905                            I40E_GLPRT_BPRCL(hw->port),
 906                            pf->stat_offsets_loaded,
 907                            &osd->eth.rx_broadcast,
 908                            &nsd->eth.rx_broadcast);
 909         i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
 910                            I40E_GLPRT_UPTCL(hw->port),
 911                            pf->stat_offsets_loaded,
 912                            &osd->eth.tx_unicast,
 913                            &nsd->eth.tx_unicast);
 914         i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
 915                            I40E_GLPRT_MPTCL(hw->port),
 916                            pf->stat_offsets_loaded,
 917                            &osd->eth.tx_multicast,
 918                            &nsd->eth.tx_multicast);
 919         i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
 920                            I40E_GLPRT_BPTCL(hw->port),
 921                            pf->stat_offsets_loaded,
 922                            &osd->eth.tx_broadcast,
 923                            &nsd->eth.tx_broadcast);
 924
 925         i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
 926                            pf->stat_offsets_loaded,
 927                            &osd->tx_dropped_link_down,
 928                            &nsd->tx_dropped_link_down);
 929
 930         i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
 931                            pf->stat_offsets_loaded,
 932                            &osd->crc_errors, &nsd->crc_errors);
 933
 934         i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
 935                            pf->stat_offsets_loaded,
 936                            &osd->illegal_bytes, &nsd->illegal_bytes);
 937
 938         i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
 939                            pf->stat_offsets_loaded,
 940                            &osd->mac_local_faults,
 941                            &nsd->mac_local_faults);
 942         i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
 943                            pf->stat_offsets_loaded,
 944                            &osd->mac_remote_faults,
 945                            &nsd->mac_remote_faults);
 946
 947         i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
 948                            pf->stat_offsets_loaded,
 949                            &osd->rx_length_errors,
 950                            &nsd->rx_length_errors);
 951
 952         i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
 953                            pf->stat_offsets_loaded,
 954                            &osd->link_xon_rx, &nsd->link_xon_rx);
 955         i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
 956                            pf->stat_offsets_loaded,
 957                            &osd->link_xon_tx, &nsd->link_xon_tx);
 958         i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
 959                            pf->stat_offsets_loaded,
 960                            &osd->link_xoff_rx, &nsd->link_xoff_rx);
 961         i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
 962                            pf->stat_offsets_loaded,
 963                            &osd->link_xoff_tx, &nsd->link_xoff_tx);
 964
 965         for (i = 0; i < 8; i++) {
 966                 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
 967                                    pf->stat_offsets_loaded,
 968                                    &osd->priority_xoff_rx[i],
 969                                    &nsd->priority_xoff_rx[i]);
 970                 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
 971                                    pf->stat_offsets_loaded,
 972                                    &osd->priority_xon_rx[i],
 973                                    &nsd->priority_xon_rx[i]);
 974                 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
 975                                    pf->stat_offsets_loaded,
 976                                    &osd->priority_xon_tx[i],
 977                                    &nsd->priority_xon_tx[i]);
 978                 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
 979                                    pf->stat_offsets_loaded,
 980                                    &osd->priority_xoff_tx[i],
 981                                    &nsd->priority_xoff_tx[i]);
 982                 i40e_stat_update32(hw,
 983                                    I40E_GLPRT_RXON2OFFCNT(hw->port, i),
 984                                    pf->stat_offsets_loaded,
 985                                    &osd->priority_xon_2_xoff[i],
 986                                    &nsd->priority_xon_2_xoff[i]);
 987         }
 988
 989         i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
 990                            I40E_GLPRT_PRC64L(hw->port),
 991                            pf->stat_offsets_loaded,
 992                            &osd->rx_size_64, &nsd->rx_size_64);
 993         i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
 994                            I40E_GLPRT_PRC127L(hw->port),
 995                            pf->stat_offsets_loaded,
 996                            &osd->rx_size_127, &nsd->rx_size_127);
 997         i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
 998                            I40E_GLPRT_PRC255L(hw->port),
 999                            pf->stat_offsets_loaded,
1000                            &osd->rx_size_255, &nsd->rx_size_255);
1001         i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1002                            I40E_GLPRT_PRC511L(hw->port),
1003                            pf->stat_offsets_loaded,
1004                            &osd->rx_size_511, &nsd->rx_size_511);
1005         i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1006                            I40E_GLPRT_PRC1023L(hw->port),
1007                            pf->stat_offsets_loaded,
1008                            &osd->rx_size_1023, &nsd->rx_size_1023);
1009         i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1010                            I40E_GLPRT_PRC1522L(hw->port),
1011                            pf->stat_offsets_loaded,
1012                            &osd->rx_size_1522, &nsd->rx_size_1522);
1013         i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1014                            I40E_GLPRT_PRC9522L(hw->port),
1015                            pf->stat_offsets_loaded,
1016                            &osd->rx_size_big, &nsd->rx_size_big);
1017
1018         i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1019                            I40E_GLPRT_PTC64L(hw->port),
1020                            pf->stat_offsets_loaded,
1021                            &osd->tx_size_64, &nsd->tx_size_64);
1022         i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1023                            I40E_GLPRT_PTC127L(hw->port),
1024                            pf->stat_offsets_loaded,
1025                            &osd->tx_size_127, &nsd->tx_size_127);
1026         i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1027                            I40E_GLPRT_PTC255L(hw->port),
1028                            pf->stat_offsets_loaded,
1029                            &osd->tx_size_255, &nsd->tx_size_255);
1030         i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1031                            I40E_GLPRT_PTC511L(hw->port),
1032                            pf->stat_offsets_loaded,
1033                            &osd->tx_size_511, &nsd->tx_size_511);
1034         i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1035                            I40E_GLPRT_PTC1023L(hw->port),
1036                            pf->stat_offsets_loaded,
1037                            &osd->tx_size_1023, &nsd->tx_size_1023);
1038         i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1039                            I40E_GLPRT_PTC1522L(hw->port),
1040                            pf->stat_offsets_loaded,
1041                            &osd->tx_size_1522, &nsd->tx_size_1522);
1042         i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1043                            I40E_GLPRT_PTC9522L(hw->port),
1044                            pf->stat_offsets_loaded,
1045                            &osd->tx_size_big, &nsd->tx_size_big);
1046
1047         i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1048                            pf->stat_offsets_loaded,
1049                            &osd->rx_undersize, &nsd->rx_undersize);
1050         i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1051                            pf->stat_offsets_loaded,
1052                            &osd->rx_fragments, &nsd->rx_fragments);
1053         i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1054                            pf->stat_offsets_loaded,
1055                            &osd->rx_oversize, &nsd->rx_oversize);
1056         i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1057                            pf->stat_offsets_loaded,
1058                            &osd->rx_jabber, &nsd->rx_jabber);
1059
1060         /* FDIR stats */
1061         i40e_stat_update_and_clear32(hw,
1062                         I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)),
1063                         &nsd->fd_atr_match);
1064         i40e_stat_update_and_clear32(hw,
1065                         I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)),
1066                         &nsd->fd_sb_match);
1067         i40e_stat_update_and_clear32(hw,
1068                         I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)),
1069                         &nsd->fd_atr_tunnel_match);
1070
1071         val = rd32(hw, I40E_PRTPM_EEE_STAT);
1072         nsd->tx_lpi_status =
1073                        (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1074                         I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1075         nsd->rx_lpi_status =
1076                        (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1077                         I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1078         i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1079                            pf->stat_offsets_loaded,
1080                            &osd->tx_lpi_count, &nsd->tx_lpi_count);
1081         i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1082                            pf->stat_offsets_loaded,
1083                            &osd->rx_lpi_count, &nsd->rx_lpi_count);
1084
1085         if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1086             !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
1087                 nsd->fd_sb_status = true;
1088         else
1089                 nsd->fd_sb_status = false;
1090
1091         if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1092             !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
1093                 nsd->fd_atr_status = true;
1094         else
1095                 nsd->fd_atr_status = false;
1096
1097         pf->stat_offsets_loaded = true;
1098 }
1099
1100 /**
1101  * i40e_update_stats - Update the various statistics counters.
1102  * @vsi: the VSI to be updated
1103  *
1104  * Update the various stats for this VSI and its related entities.
1105  **/
1106 void i40e_update_stats(struct i40e_vsi *vsi)
1107 {
1108         struct i40e_pf *pf = vsi->back;
1109
1110         if (vsi == pf->vsi[pf->lan_vsi])
1111                 i40e_update_pf_stats(pf);
1112
1113         i40e_update_vsi_stats(vsi);
1114 }
1115
1116 /**
1117  * i40e_count_filters - counts VSI mac filters
1118  * @vsi: the VSI to be searched
1119  *
1120  * Returns count of mac filters
1121  **/
1122 int i40e_count_filters(struct i40e_vsi *vsi)
1123 {
1124         struct i40e_mac_filter *f;
1125         struct hlist_node *h;
1126         int bkt;
1127         int cnt = 0;
1128
1129         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
1130                 ++cnt;
1131
1132         return cnt;
1133 }
1134
1135 /**
1136  * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1137  * @vsi: the VSI to be searched
1138  * @macaddr: the MAC address
1139  * @vlan: the vlan
1140  *
1141  * Returns ptr to the filter object or NULL
1142  **/
1143 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1144                                                 const u8 *macaddr, s16 vlan)
1145 {
1146         struct i40e_mac_filter *f;
1147         u64 key;
1148
1149         if (!vsi || !macaddr)
1150                 return NULL;
1151
1152         key = i40e_addr_to_hkey(macaddr);
1153         hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1154                 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1155                     (vlan == f->vlan))
1156                         return f;
1157         }
1158         return NULL;
1159 }
1160
1161 /**
1162  * i40e_find_mac - Find a mac addr in the macvlan filters list
1163  * @vsi: the VSI to be searched
1164  * @macaddr: the MAC address we are searching for
1165  *
1166  * Returns the first filter with the provided MAC address or NULL if
1167  * MAC address was not found
1168  **/
1169 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1170 {
1171         struct i40e_mac_filter *f;
1172         u64 key;
1173
1174         if (!vsi || !macaddr)
1175                 return NULL;
1176
1177         key = i40e_addr_to_hkey(macaddr);
1178         hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1179                 if ((ether_addr_equal(macaddr, f->macaddr)))
1180                         return f;
1181         }
1182         return NULL;
1183 }
1184
1185 /**
1186  * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1187  * @vsi: the VSI to be searched
1188  *
1189  * Returns true if VSI is in vlan mode or false otherwise
1190  **/
1191 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1192 {
1193         /* If we have a PVID, always operate in VLAN mode */
1194         if (vsi->info.pvid)
1195                 return true;
1196
1197         /* We need to operate in VLAN mode whenever we have any filters with
1198          * a VLAN other than I40E_VLAN_ALL. We could check the table each
1199          * time, incurring search cost repeatedly. However, we can notice two
1200          * things:
1201          *
1202          * 1) the only place where we can gain a VLAN filter is in
1203          *    i40e_add_filter.
1204          *
1205          * 2) the only place where filters are actually removed is in
1206          *    i40e_sync_filters_subtask.
1207          *
1208          * Thus, we can simply use a boolean value, has_vlan_filters which we
1209          * will set to true when we add a VLAN filter in i40e_add_filter. Then
1210          * we have to perform the full search after deleting filters in
1211          * i40e_sync_filters_subtask, but we already have to search
1212          * filters here and can perform the check at the same time. This
1213          * results in avoiding embedding a loop for VLAN mode inside another
1214          * loop over all the filters, and should maintain correctness as noted
1215          * above.
1216          */
1217         return vsi->has_vlan_filter;
1218 }
1219
1220 /**
1221  * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1222  * @vsi: the VSI to configure
1223  * @tmp_add_list: list of filters ready to be added
1224  * @tmp_del_list: list of filters ready to be deleted
1225  * @vlan_filters: the number of active VLAN filters
1226  *
1227  * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1228  * behave as expected. If we have any active VLAN filters remaining or about
1229  * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1230  * so that they only match against untagged traffic. If we no longer have any
1231  * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1232  * so that they match against both tagged and untagged traffic. In this way,
1233  * we ensure that we correctly receive the desired traffic. This ensures that
1234  * when we have an active VLAN we will receive only untagged traffic and
1235  * traffic matching active VLANs. If we have no active VLANs then we will
1236  * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1237  *
1238  * Finally, in a similar fashion, this function also corrects filters when
1239  * there is an active PVID assigned to this VSI.
1240  *
1241  * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1242  *
1243  * This function is only expected to be called from within
1244  * i40e_sync_vsi_filters.
1245  *
1246  * NOTE: This function expects to be called while under the
1247  * mac_filter_hash_lock
1248  */
1249 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1250                                          struct hlist_head *tmp_add_list,
1251                                          struct hlist_head *tmp_del_list,
1252                                          int vlan_filters)
1253 {
1254         s16 pvid = le16_to_cpu(vsi->info.pvid);
1255         struct i40e_mac_filter *f, *add_head;
1256         struct i40e_new_mac_filter *new;
1257         struct hlist_node *h;
1258         int bkt, new_vlan;
1259
1260         /* To determine if a particular filter needs to be replaced we
1261          * have the three following conditions:
1262          *
1263          * a) if we have a PVID assigned, then all filters which are
1264          *    not marked as VLAN=PVID must be replaced with filters that
1265          *    are.
1266          * b) otherwise, if we have any active VLANS, all filters
1267          *    which are marked as VLAN=-1 must be replaced with
1268          *    filters marked as VLAN=0
1269          * c) finally, if we do not have any active VLANS, all filters
1270          *    which are marked as VLAN=0 must be replaced with filters
1271          *    marked as VLAN=-1
1272          */
1273
1274         /* Update the filters about to be added in place */
1275         hlist_for_each_entry(new, tmp_add_list, hlist) {
1276                 if (pvid && new->f->vlan != pvid)
1277                         new->f->vlan = pvid;
1278                 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1279                         new->f->vlan = 0;
1280                 else if (!vlan_filters && new->f->vlan == 0)
1281                         new->f->vlan = I40E_VLAN_ANY;
1282         }
1283
1284         /* Update the remaining active filters */
1285         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1286                 /* Combine the checks for whether a filter needs to be changed
1287                  * and then determine the new VLAN inside the if block, in
1288                  * order to avoid duplicating code for adding the new filter
1289                  * then deleting the old filter.
1290                  */
1291                 if ((pvid && f->vlan != pvid) ||
1292                     (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1293                     (!vlan_filters && f->vlan == 0)) {
1294                         /* Determine the new vlan we will be adding */
1295                         if (pvid)
1296                                 new_vlan = pvid;
1297                         else if (vlan_filters)
1298                                 new_vlan = 0;
1299                         else
1300                                 new_vlan = I40E_VLAN_ANY;
1301
1302                         /* Create the new filter */
1303                         add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1304                         if (!add_head)
1305                                 return -ENOMEM;
1306
1307                         /* Create a temporary i40e_new_mac_filter */
1308                         new = kzalloc(sizeof(*new), GFP_ATOMIC);
1309                         if (!new)
1310                                 return -ENOMEM;
1311
1312                         new->f = add_head;
1313                         new->state = add_head->state;
1314
1315                         /* Add the new filter to the tmp list */
1316                         hlist_add_head(&new->hlist, tmp_add_list);
1317
1318                         /* Put the original filter into the delete list */
1319                         f->state = I40E_FILTER_REMOVE;
1320                         hash_del(&f->hlist);
1321                         hlist_add_head(&f->hlist, tmp_del_list);
1322                 }
1323         }
1324
1325         vsi->has_vlan_filter = !!vlan_filters;
1326
1327         return 0;
1328 }
1329
1330 /**
1331  * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1332  * @vsi: the PF Main VSI - inappropriate for any other VSI
1333  * @macaddr: the MAC address
1334  *
1335  * Remove whatever filter the firmware set up so the driver can manage
1336  * its own filtering intelligently.
1337  **/
1338 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1339 {
1340         struct i40e_aqc_remove_macvlan_element_data element;
1341         struct i40e_pf *pf = vsi->back;
1342
1343         /* Only appropriate for the PF main VSI */
1344         if (vsi->type != I40E_VSI_MAIN)
1345                 return;
1346
1347         memset(&element, 0, sizeof(element));
1348         ether_addr_copy(element.mac_addr, macaddr);
1349         element.vlan_tag = 0;
1350         /* Ignore error returns, some firmware does it this way... */
1351         element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1352         i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1353
1354         memset(&element, 0, sizeof(element));
1355         ether_addr_copy(element.mac_addr, macaddr);
1356         element.vlan_tag = 0;
1357         /* ...and some firmware does it this way. */
1358         element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1359                         I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1360         i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1361 }
1362
1363 /**
1364  * i40e_add_filter - Add a mac/vlan filter to the VSI
1365  * @vsi: the VSI to be searched
1366  * @macaddr: the MAC address
1367  * @vlan: the vlan
1368  *
1369  * Returns ptr to the filter object or NULL when no memory available.
1370  *
1371  * NOTE: This function is expected to be called with mac_filter_hash_lock
1372  * being held.
1373  **/
1374 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1375                                         const u8 *macaddr, s16 vlan)
1376 {
1377         struct i40e_mac_filter *f;
1378         u64 key;
1379
1380         if (!vsi || !macaddr)
1381                 return NULL;
1382
1383         f = i40e_find_filter(vsi, macaddr, vlan);
1384         if (!f) {
1385                 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1386                 if (!f)
1387                         return NULL;
1388
1389                 /* Update the boolean indicating if we need to function in
1390                  * VLAN mode.
1391                  */
1392                 if (vlan >= 0)
1393                         vsi->has_vlan_filter = true;
1394
1395                 ether_addr_copy(f->macaddr, macaddr);
1396                 f->vlan = vlan;
1397                 f->state = I40E_FILTER_NEW;
1398                 INIT_HLIST_NODE(&f->hlist);
1399
1400                 key = i40e_addr_to_hkey(macaddr);
1401                 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1402
1403                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1404                 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1405         }
1406
1407         /* If we're asked to add a filter that has been marked for removal, it
1408          * is safe to simply restore it to active state. __i40e_del_filter
1409          * will have simply deleted any filters which were previously marked
1410          * NEW or FAILED, so if it is currently marked REMOVE it must have
1411          * previously been ACTIVE. Since we haven't yet run the sync filters
1412          * task, just restore this filter to the ACTIVE state so that the
1413          * sync task leaves it in place
1414          */
1415         if (f->state == I40E_FILTER_REMOVE)
1416                 f->state = I40E_FILTER_ACTIVE;
1417
1418         return f;
1419 }
1420
1421 /**
1422  * __i40e_del_filter - Remove a specific filter from the VSI
1423  * @vsi: VSI to remove from
1424  * @f: the filter to remove from the list
1425  *
1426  * This function should be called instead of i40e_del_filter only if you know
1427  * the exact filter you will remove already, such as via i40e_find_filter or
1428  * i40e_find_mac.
1429  *
1430  * NOTE: This function is expected to be called with mac_filter_hash_lock
1431  * being held.
1432  * ANOTHER NOTE: This function MUST be called from within the context of
1433  * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1434  * instead of list_for_each_entry().
1435  **/
1436 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1437 {
1438         if (!f)
1439                 return;
1440
1441         /* If the filter was never added to firmware then we can just delete it
1442          * directly and we don't want to set the status to remove or else an
1443          * admin queue command will unnecessarily fire.
1444          */
1445         if ((f->state == I40E_FILTER_FAILED) ||
1446             (f->state == I40E_FILTER_NEW)) {
1447                 hash_del(&f->hlist);
1448                 kfree(f);
1449         } else {
1450                 f->state = I40E_FILTER_REMOVE;
1451         }
1452
1453         vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1454         set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1455 }
1456
1457 /**
1458  * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1459  * @vsi: the VSI to be searched
1460  * @macaddr: the MAC address
1461  * @vlan: the VLAN
1462  *
1463  * NOTE: This function is expected to be called with mac_filter_hash_lock
1464  * being held.
1465  * ANOTHER NOTE: This function MUST be called from within the context of
1466  * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1467  * instead of list_for_each_entry().
1468  **/
1469 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1470 {
1471         struct i40e_mac_filter *f;
1472
1473         if (!vsi || !macaddr)
1474                 return;
1475
1476         f = i40e_find_filter(vsi, macaddr, vlan);
1477         __i40e_del_filter(vsi, f);
1478 }
1479
1480 /**
1481  * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1482  * @vsi: the VSI to be searched
1483  * @macaddr: the mac address to be filtered
1484  *
1485  * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1486  * go through all the macvlan filters and add a macvlan filter for each
1487  * unique vlan that already exists. If a PVID has been assigned, instead only
1488  * add the macaddr to that VLAN.
1489  *
1490  * Returns last filter added on success, else NULL
1491  **/
1492 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1493                                             const u8 *macaddr)
1494 {
1495         struct i40e_mac_filter *f, *add = NULL;
1496         struct hlist_node *h;
1497         int bkt;
1498
1499         if (vsi->info.pvid)
1500                 return i40e_add_filter(vsi, macaddr,
1501                                        le16_to_cpu(vsi->info.pvid));
1502
1503         if (!i40e_is_vsi_in_vlan(vsi))
1504                 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1505
1506         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1507                 if (f->state == I40E_FILTER_REMOVE)
1508                         continue;
1509                 add = i40e_add_filter(vsi, macaddr, f->vlan);
1510                 if (!add)
1511                         return NULL;
1512         }
1513
1514         return add;
1515 }
1516
1517 /**
1518  * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1519  * @vsi: the VSI to be searched
1520  * @macaddr: the mac address to be removed
1521  *
1522  * Removes a given MAC address from a VSI regardless of what VLAN it has been
1523  * associated with.
1524  *
1525  * Returns 0 for success, or error
1526  **/
1527 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1528 {
1529         struct i40e_mac_filter *f;
1530         struct hlist_node *h;
1531         bool found = false;
1532         int bkt;
1533
1534         lockdep_assert_held(&vsi->mac_filter_hash_lock);
1535         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1536                 if (ether_addr_equal(macaddr, f->macaddr)) {
1537                         __i40e_del_filter(vsi, f);
1538                         found = true;
1539                 }
1540         }
1541
1542         if (found)
1543                 return 0;
1544         else
1545                 return -ENOENT;
1546 }
1547
1548 /**
1549  * i40e_set_mac - NDO callback to set mac address
1550  * @netdev: network interface device structure
1551  * @p: pointer to an address structure
1552  *
1553  * Returns 0 on success, negative on failure
1554  **/
1555 static int i40e_set_mac(struct net_device *netdev, void *p)
1556 {
1557         struct i40e_netdev_priv *np = netdev_priv(netdev);
1558         struct i40e_vsi *vsi = np->vsi;
1559         struct i40e_pf *pf = vsi->back;
1560         struct i40e_hw *hw = &pf->hw;
1561         struct sockaddr *addr = p;
1562
1563         if (!is_valid_ether_addr(addr->sa_data))
1564                 return -EADDRNOTAVAIL;
1565
1566         if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1567                 netdev_info(netdev, "already using mac address %pM\n",
1568                             addr->sa_data);
1569                 return 0;
1570         }
1571
1572         if (test_bit(__I40E_DOWN, pf->state) ||
1573             test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
1574                 return -EADDRNOTAVAIL;
1575
1576         if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1577                 netdev_info(netdev, "returning to hw mac address %pM\n",
1578                             hw->mac.addr);
1579         else
1580                 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1581
1582         /* Copy the address first, so that we avoid a possible race with
1583          * .set_rx_mode().
1584          * - Remove old address from MAC filter
1585          * - Copy new address
1586          * - Add new address to MAC filter
1587          */
1588         spin_lock_bh(&vsi->mac_filter_hash_lock);
1589         i40e_del_mac_filter(vsi, netdev->dev_addr);
1590         ether_addr_copy(netdev->dev_addr, addr->sa_data);
1591         i40e_add_mac_filter(vsi, netdev->dev_addr);
1592         spin_unlock_bh(&vsi->mac_filter_hash_lock);
1593
1594         if (vsi->type == I40E_VSI_MAIN) {
1595                 i40e_status ret;
1596
1597                 ret = i40e_aq_mac_address_write(hw, I40E_AQC_WRITE_TYPE_LAA_WOL,
1598                                                 addr->sa_data, NULL);
1599                 if (ret)
1600                         netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1601                                     i40e_stat_str(hw, ret),
1602                                     i40e_aq_str(hw, hw->aq.asq_last_status));
1603         }
1604
1605         /* schedule our worker thread which will take care of
1606          * applying the new filter changes
1607          */
1608         i40e_service_event_schedule(pf);
1609         return 0;
1610 }
1611
1612 /**
1613  * i40e_config_rss_aq - Prepare for RSS using AQ commands
1614  * @vsi: vsi structure
1615  * @seed: RSS hash seed
1616  * @lut: pointer to lookup table of lut_size
1617  * @lut_size: size of the lookup table
1618  **/
1619 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
1620                               u8 *lut, u16 lut_size)
1621 {
1622         struct i40e_pf *pf = vsi->back;
1623         struct i40e_hw *hw = &pf->hw;
1624         int ret = 0;
1625
1626         if (seed) {
1627                 struct i40e_aqc_get_set_rss_key_data *seed_dw =
1628                         (struct i40e_aqc_get_set_rss_key_data *)seed;
1629                 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
1630                 if (ret) {
1631                         dev_info(&pf->pdev->dev,
1632                                  "Cannot set RSS key, err %s aq_err %s\n",
1633                                  i40e_stat_str(hw, ret),
1634                                  i40e_aq_str(hw, hw->aq.asq_last_status));
1635                         return ret;
1636                 }
1637         }
1638         if (lut) {
1639                 bool pf_lut = vsi->type == I40E_VSI_MAIN;
1640
1641                 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1642                 if (ret) {
1643                         dev_info(&pf->pdev->dev,
1644                                  "Cannot set RSS lut, err %s aq_err %s\n",
1645                                  i40e_stat_str(hw, ret),
1646                                  i40e_aq_str(hw, hw->aq.asq_last_status));
1647                         return ret;
1648                 }
1649         }
1650         return ret;
1651 }
1652
1653 /**
1654  * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1655  * @vsi: VSI structure
1656  **/
1657 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
1658 {
1659         struct i40e_pf *pf = vsi->back;
1660         u8 seed[I40E_HKEY_ARRAY_SIZE];
1661         u8 *lut;
1662         int ret;
1663
1664         if (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))
1665                 return 0;
1666         if (!vsi->rss_size)
1667                 vsi->rss_size = min_t(int, pf->alloc_rss_size,
1668                                       vsi->num_queue_pairs);
1669         if (!vsi->rss_size)
1670                 return -EINVAL;
1671         lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1672         if (!lut)
1673                 return -ENOMEM;
1674
1675         /* Use the user configured hash keys and lookup table if there is one,
1676          * otherwise use default
1677          */
1678         if (vsi->rss_lut_user)
1679                 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1680         else
1681                 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
1682         if (vsi->rss_hkey_user)
1683                 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
1684         else
1685                 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
1686         ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
1687         kfree(lut);
1688         return ret;
1689 }
1690
1691 /**
1692  * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1693  * @vsi: the VSI being configured,
1694  * @ctxt: VSI context structure
1695  * @enabled_tc: number of traffic classes to enable
1696  *
1697  * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1698  **/
1699 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,
1700                                            struct i40e_vsi_context *ctxt,
1701                                            u8 enabled_tc)
1702 {
1703         u16 qcount = 0, max_qcount, qmap, sections = 0;
1704         int i, override_q, pow, num_qps, ret;
1705         u8 netdev_tc = 0, offset = 0;
1706
1707         if (vsi->type != I40E_VSI_MAIN)
1708                 return -EINVAL;
1709         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1710         sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1711         vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;
1712         vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1713         num_qps = vsi->mqprio_qopt.qopt.count[0];
1714
1715         /* find the next higher power-of-2 of num queue pairs */
1716         pow = ilog2(num_qps);
1717         if (!is_power_of_2(num_qps))
1718                 pow++;
1719         qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1720                 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1721
1722         /* Setup queue offset/count for all TCs for given VSI */
1723         max_qcount = vsi->mqprio_qopt.qopt.count[0];
1724         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1725                 /* See if the given TC is enabled for the given VSI */
1726                 if (vsi->tc_config.enabled_tc & BIT(i)) {
1727                         offset = vsi->mqprio_qopt.qopt.offset[i];
1728                         qcount = vsi->mqprio_qopt.qopt.count[i];
1729                         if (qcount > max_qcount)
1730                                 max_qcount = qcount;
1731                         vsi->tc_config.tc_info[i].qoffset = offset;
1732                         vsi->tc_config.tc_info[i].qcount = qcount;
1733                         vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1734                 } else {
1735                         /* TC is not enabled so set the offset to
1736                          * default queue and allocate one queue
1737                          * for the given TC.
1738                          */
1739                         vsi->tc_config.tc_info[i].qoffset = 0;
1740                         vsi->tc_config.tc_info[i].qcount = 1;
1741                         vsi->tc_config.tc_info[i].netdev_tc = 0;
1742                 }
1743         }
1744
1745         /* Set actual Tx/Rx queue pairs */
1746         vsi->num_queue_pairs = offset + qcount;
1747
1748         /* Setup queue TC[0].qmap for given VSI context */
1749         ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1750         ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1751         ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1752         ctxt->info.valid_sections |= cpu_to_le16(sections);
1753
1754         /* Reconfigure RSS for main VSI with max queue count */
1755         vsi->rss_size = max_qcount;
1756         ret = i40e_vsi_config_rss(vsi);
1757         if (ret) {
1758                 dev_info(&vsi->back->pdev->dev,
1759                          "Failed to reconfig rss for num_queues (%u)\n",
1760                          max_qcount);
1761                 return ret;
1762         }
1763         vsi->reconfig_rss = true;
1764         dev_dbg(&vsi->back->pdev->dev,
1765                 "Reconfigured rss with num_queues (%u)\n", max_qcount);
1766
1767         /* Find queue count available for channel VSIs and starting offset
1768          * for channel VSIs
1769          */
1770         override_q = vsi->mqprio_qopt.qopt.count[0];
1771         if (override_q && override_q < vsi->num_queue_pairs) {
1772                 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q;
1773                 vsi->next_base_queue = override_q;
1774         }
1775         return 0;
1776 }
1777
1778 /**
1779  * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1780  * @vsi: the VSI being setup
1781  * @ctxt: VSI context structure
1782  * @enabled_tc: Enabled TCs bitmap
1783  * @is_add: True if called before Add VSI
1784  *
1785  * Setup VSI queue mapping for enabled traffic classes.
1786  **/
1787 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1788                                      struct i40e_vsi_context *ctxt,
1789                                      u8 enabled_tc,
1790                                      bool is_add)
1791 {
1792         struct i40e_pf *pf = vsi->back;
1793         u16 sections = 0;
1794         u8 netdev_tc = 0;
1795         u16 numtc = 1;
1796         u16 qcount;
1797         u8 offset;
1798         u16 qmap;
1799         int i;
1800         u16 num_tc_qps = 0;
1801
1802         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1803         offset = 0;
1804
1805         /* Number of queues per enabled TC */
1806         num_tc_qps = vsi->alloc_queue_pairs;
1807         if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1808                 /* Find numtc from enabled TC bitmap */
1809                 for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1810                         if (enabled_tc & BIT(i)) /* TC is enabled */
1811                                 numtc++;
1812                 }
1813                 if (!numtc) {
1814                         dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1815                         numtc = 1;
1816                 }
1817                 num_tc_qps = num_tc_qps / numtc;
1818                 num_tc_qps = min_t(int, num_tc_qps,
1819                                    i40e_pf_get_max_q_per_tc(pf));
1820         }
1821
1822         vsi->tc_config.numtc = numtc;
1823         vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1824
1825         /* Do not allow use more TC queue pairs than MSI-X vectors exist */
1826         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1827                 num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix);
1828
1829         /* Setup queue offset/count for all TCs for given VSI */
1830         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1831                 /* See if the given TC is enabled for the given VSI */
1832                 if (vsi->tc_config.enabled_tc & BIT(i)) {
1833                         /* TC is enabled */
1834                         int pow, num_qps;
1835
1836                         switch (vsi->type) {
1837                         case I40E_VSI_MAIN:
1838                                 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED |
1839                                     I40E_FLAG_FD_ATR_ENABLED)) ||
1840                                     vsi->tc_config.enabled_tc != 1) {
1841                                         qcount = min_t(int, pf->alloc_rss_size,
1842                                                        num_tc_qps);
1843                                         break;
1844                                 }
1845                                 fallthrough;
1846                         case I40E_VSI_FDIR:
1847                         case I40E_VSI_SRIOV:
1848                         case I40E_VSI_VMDQ2:
1849                         default:
1850                                 qcount = num_tc_qps;
1851                                 WARN_ON(i != 0);
1852                                 break;
1853                         }
1854                         vsi->tc_config.tc_info[i].qoffset = offset;
1855                         vsi->tc_config.tc_info[i].qcount = qcount;
1856
1857                         /* find the next higher power-of-2 of num queue pairs */
1858                         num_qps = qcount;
1859                         pow = 0;
1860                         while (num_qps && (BIT_ULL(pow) < qcount)) {
1861                                 pow++;
1862                                 num_qps >>= 1;
1863                         }
1864
1865                         vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1866                         qmap =
1867                             (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1868                             (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1869
1870                         offset += qcount;
1871                 } else {
1872                         /* TC is not enabled so set the offset to
1873                          * default queue and allocate one queue
1874                          * for the given TC.
1875                          */
1876                         vsi->tc_config.tc_info[i].qoffset = 0;
1877                         vsi->tc_config.tc_info[i].qcount = 1;
1878                         vsi->tc_config.tc_info[i].netdev_tc = 0;
1879
1880                         qmap = 0;
1881                 }
1882                 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1883         }
1884
1885         /* Set actual Tx/Rx queue pairs */
1886         vsi->num_queue_pairs = offset;
1887         if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1888                 if (vsi->req_queue_pairs > 0)
1889                         vsi->num_queue_pairs = vsi->req_queue_pairs;
1890                 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1891                         vsi->num_queue_pairs = pf->num_lan_msix;
1892         }
1893
1894         /* Scheduler section valid can only be set for ADD VSI */
1895         if (is_add) {
1896                 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1897
1898                 ctxt->info.up_enable_bits = enabled_tc;
1899         }
1900         if (vsi->type == I40E_VSI_SRIOV) {
1901                 ctxt->info.mapping_flags |=
1902                                      cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1903                 for (i = 0; i < vsi->num_queue_pairs; i++)
1904                         ctxt->info.queue_mapping[i] =
1905                                                cpu_to_le16(vsi->base_queue + i);
1906         } else {
1907                 ctxt->info.mapping_flags |=
1908                                         cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1909                 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1910         }
1911         ctxt->info.valid_sections |= cpu_to_le16(sections);
1912 }
1913
1914 /**
1915  * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
1916  * @netdev: the netdevice
1917  * @addr: address to add
1918  *
1919  * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
1920  * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1921  */
1922 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
1923 {
1924         struct i40e_netdev_priv *np = netdev_priv(netdev);
1925         struct i40e_vsi *vsi = np->vsi;
1926
1927         if (i40e_add_mac_filter(vsi, addr))
1928                 return 0;
1929         else
1930                 return -ENOMEM;
1931 }
1932
1933 /**
1934  * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
1935  * @netdev: the netdevice
1936  * @addr: address to add
1937  *
1938  * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
1939  * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1940  */
1941 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
1942 {
1943         struct i40e_netdev_priv *np = netdev_priv(netdev);
1944         struct i40e_vsi *vsi = np->vsi;
1945
1946         /* Under some circumstances, we might receive a request to delete
1947          * our own device address from our uc list. Because we store the
1948          * device address in the VSI's MAC/VLAN filter list, we need to ignore
1949          * such requests and not delete our device address from this list.
1950          */
1951         if (ether_addr_equal(addr, netdev->dev_addr))
1952                 return 0;
1953
1954         i40e_del_mac_filter(vsi, addr);
1955
1956         return 0;
1957 }
1958
1959 /**
1960  * i40e_set_rx_mode - NDO callback to set the netdev filters
1961  * @netdev: network interface device structure
1962  **/
1963 static void i40e_set_rx_mode(struct net_device *netdev)
1964 {
1965         struct i40e_netdev_priv *np = netdev_priv(netdev);
1966         struct i40e_vsi *vsi = np->vsi;
1967
1968         spin_lock_bh(&vsi->mac_filter_hash_lock);
1969
1970         __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1971         __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1972
1973         spin_unlock_bh(&vsi->mac_filter_hash_lock);
1974
1975         /* check for other flag changes */
1976         if (vsi->current_netdev_flags != vsi->netdev->flags) {
1977                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1978                 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1979         }
1980 }
1981
1982 /**
1983  * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1984  * @vsi: Pointer to VSI struct
1985  * @from: Pointer to list which contains MAC filter entries - changes to
1986  *        those entries needs to be undone.
1987  *
1988  * MAC filter entries from this list were slated for deletion.
1989  **/
1990 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1991                                          struct hlist_head *from)
1992 {
1993         struct i40e_mac_filter *f;
1994         struct hlist_node *h;
1995
1996         hlist_for_each_entry_safe(f, h, from, hlist) {
1997                 u64 key = i40e_addr_to_hkey(f->macaddr);
1998
1999                 /* Move the element back into MAC filter list*/
2000                 hlist_del(&f->hlist);
2001                 hash_add(vsi->mac_filter_hash, &f->hlist, key);
2002         }
2003 }
2004
2005 /**
2006  * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
2007  * @vsi: Pointer to vsi struct
2008  * @from: Pointer to list which contains MAC filter entries - changes to
2009  *        those entries needs to be undone.
2010  *
2011  * MAC filter entries from this list were slated for addition.
2012  **/
2013 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
2014                                          struct hlist_head *from)
2015 {
2016         struct i40e_new_mac_filter *new;
2017         struct hlist_node *h;
2018
2019         hlist_for_each_entry_safe(new, h, from, hlist) {
2020                 /* We can simply free the wrapper structure */
2021                 hlist_del(&new->hlist);
2022                 kfree(new);
2023         }
2024 }
2025
2026 /**
2027  * i40e_next_filter - Get the next non-broadcast filter from a list
2028  * @next: pointer to filter in list
2029  *
2030  * Returns the next non-broadcast filter in the list. Required so that we
2031  * ignore broadcast filters within the list, since these are not handled via
2032  * the normal firmware update path.
2033  */
2034 static
2035 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
2036 {
2037         hlist_for_each_entry_continue(next, hlist) {
2038                 if (!is_broadcast_ether_addr(next->f->macaddr))
2039                         return next;
2040         }
2041
2042         return NULL;
2043 }
2044
2045 /**
2046  * i40e_update_filter_state - Update filter state based on return data
2047  * from firmware
2048  * @count: Number of filters added
2049  * @add_list: return data from fw
2050  * @add_head: pointer to first filter in current batch
2051  *
2052  * MAC filter entries from list were slated to be added to device. Returns
2053  * number of successful filters. Note that 0 does NOT mean success!
2054  **/
2055 static int
2056 i40e_update_filter_state(int count,
2057                          struct i40e_aqc_add_macvlan_element_data *add_list,
2058                          struct i40e_new_mac_filter *add_head)
2059 {
2060         int retval = 0;
2061         int i;
2062
2063         for (i = 0; i < count; i++) {
2064                 /* Always check status of each filter. We don't need to check
2065                  * the firmware return status because we pre-set the filter
2066                  * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2067                  * request to the adminq. Thus, if it no longer matches then
2068                  * we know the filter is active.
2069                  */
2070                 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
2071                         add_head->state = I40E_FILTER_FAILED;
2072                 } else {
2073                         add_head->state = I40E_FILTER_ACTIVE;
2074                         retval++;
2075                 }
2076
2077                 add_head = i40e_next_filter(add_head);
2078                 if (!add_head)
2079                         break;
2080         }
2081
2082         return retval;
2083 }
2084
2085 /**
2086  * i40e_aqc_del_filters - Request firmware to delete a set of filters
2087  * @vsi: ptr to the VSI
2088  * @vsi_name: name to display in messages
2089  * @list: the list of filters to send to firmware
2090  * @num_del: the number of filters to delete
2091  * @retval: Set to -EIO on failure to delete
2092  *
2093  * Send a request to firmware via AdminQ to delete a set of filters. Uses
2094  * *retval instead of a return value so that success does not force ret_val to
2095  * be set to 0. This ensures that a sequence of calls to this function
2096  * preserve the previous value of *retval on successful delete.
2097  */
2098 static
2099 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
2100                           struct i40e_aqc_remove_macvlan_element_data *list,
2101                           int num_del, int *retval)
2102 {
2103         struct i40e_hw *hw = &vsi->back->hw;
2104         i40e_status aq_ret;
2105         int aq_err;
2106
2107         aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL);
2108         aq_err = hw->aq.asq_last_status;
2109
2110         /* Explicitly ignore and do not report when firmware returns ENOENT */
2111         if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
2112                 *retval = -EIO;
2113                 dev_info(&vsi->back->pdev->dev,
2114                          "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
2115                          vsi_name, i40e_stat_str(hw, aq_ret),
2116                          i40e_aq_str(hw, aq_err));
2117         }
2118 }
2119
2120 /**
2121  * i40e_aqc_add_filters - Request firmware to add a set of filters
2122  * @vsi: ptr to the VSI
2123  * @vsi_name: name to display in messages
2124  * @list: the list of filters to send to firmware
2125  * @add_head: Position in the add hlist
2126  * @num_add: the number of filters to add
2127  *
2128  * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2129  * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of
2130  * space for more filters.
2131  */
2132 static
2133 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
2134                           struct i40e_aqc_add_macvlan_element_data *list,
2135                           struct i40e_new_mac_filter *add_head,
2136                           int num_add)
2137 {
2138         struct i40e_hw *hw = &vsi->back->hw;
2139         int aq_err, fcnt;
2140
2141         i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL);
2142         aq_err = hw->aq.asq_last_status;
2143         fcnt = i40e_update_filter_state(num_add, list, add_head);
2144
2145         if (fcnt != num_add) {
2146                 if (vsi->type == I40E_VSI_MAIN) {
2147                         set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2148                         dev_warn(&vsi->back->pdev->dev,
2149                                  "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2150                                  i40e_aq_str(hw, aq_err), vsi_name);
2151                 } else if (vsi->type == I40E_VSI_SRIOV ||
2152                            vsi->type == I40E_VSI_VMDQ1 ||
2153                            vsi->type == I40E_VSI_VMDQ2) {
2154                         dev_warn(&vsi->back->pdev->dev,
2155                                  "Error %s adding RX filters on %s, please set promiscuous on manually for %s\n",
2156                                  i40e_aq_str(hw, aq_err), vsi_name, vsi_name);
2157                 } else {
2158                         dev_warn(&vsi->back->pdev->dev,
2159                                  "Error %s adding RX filters on %s, incorrect VSI type: %i.\n",
2160                                  i40e_aq_str(hw, aq_err), vsi_name, vsi->type);
2161                 }
2162         }
2163 }
2164
2165 /**
2166  * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2167  * @vsi: pointer to the VSI
2168  * @vsi_name: the VSI name
2169  * @f: filter data
2170  *
2171  * This function sets or clears the promiscuous broadcast flags for VLAN
2172  * filters in order to properly receive broadcast frames. Assumes that only
2173  * broadcast filters are passed.
2174  *
2175  * Returns status indicating success or failure;
2176  **/
2177 static i40e_status
2178 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2179                           struct i40e_mac_filter *f)
2180 {
2181         bool enable = f->state == I40E_FILTER_NEW;
2182         struct i40e_hw *hw = &vsi->back->hw;
2183         i40e_status aq_ret;
2184
2185         if (f->vlan == I40E_VLAN_ANY) {
2186                 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2187                                                    vsi->seid,
2188                                                    enable,
2189                                                    NULL);
2190         } else {
2191                 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2192                                                             vsi->seid,
2193                                                             enable,
2194                                                             f->vlan,
2195                                                             NULL);
2196         }
2197
2198         if (aq_ret) {
2199                 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2200                 dev_warn(&vsi->back->pdev->dev,
2201                          "Error %s, forcing overflow promiscuous on %s\n",
2202                          i40e_aq_str(hw, hw->aq.asq_last_status),
2203                          vsi_name);
2204         }
2205
2206         return aq_ret;
2207 }
2208
2209 /**
2210  * i40e_set_promiscuous - set promiscuous mode
2211  * @pf: board private structure
2212  * @promisc: promisc on or off
2213  *
2214  * There are different ways of setting promiscuous mode on a PF depending on
2215  * what state/environment we're in.  This identifies and sets it appropriately.
2216  * Returns 0 on success.
2217  **/
2218 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2219 {
2220         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2221         struct i40e_hw *hw = &pf->hw;
2222         i40e_status aq_ret;
2223
2224         if (vsi->type == I40E_VSI_MAIN &&
2225             pf->lan_veb != I40E_NO_VEB &&
2226             !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2227                 /* set defport ON for Main VSI instead of true promisc
2228                  * this way we will get all unicast/multicast and VLAN
2229                  * promisc behavior but will not get VF or VMDq traffic
2230                  * replicated on the Main VSI.
2231                  */
2232                 if (promisc)
2233                         aq_ret = i40e_aq_set_default_vsi(hw,
2234                                                          vsi->seid,
2235                                                          NULL);
2236                 else
2237                         aq_ret = i40e_aq_clear_default_vsi(hw,
2238                                                            vsi->seid,
2239                                                            NULL);
2240                 if (aq_ret) {
2241                         dev_info(&pf->pdev->dev,
2242                                  "Set default VSI failed, err %s, aq_err %s\n",
2243                                  i40e_stat_str(hw, aq_ret),
2244                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2245                 }
2246         } else {
2247                 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2248                                                   hw,
2249                                                   vsi->seid,
2250                                                   promisc, NULL,
2251                                                   true);
2252                 if (aq_ret) {
2253                         dev_info(&pf->pdev->dev,
2254                                  "set unicast promisc failed, err %s, aq_err %s\n",
2255                                  i40e_stat_str(hw, aq_ret),
2256                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2257                 }
2258                 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2259                                                   hw,
2260                                                   vsi->seid,
2261                                                   promisc, NULL);
2262                 if (aq_ret) {
2263                         dev_info(&pf->pdev->dev,
2264                                  "set multicast promisc failed, err %s, aq_err %s\n",
2265                                  i40e_stat_str(hw, aq_ret),
2266                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2267                 }
2268         }
2269
2270         if (!aq_ret)
2271                 pf->cur_promisc = promisc;
2272
2273         return aq_ret;
2274 }
2275
2276 /**
2277  * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2278  * @vsi: ptr to the VSI
2279  *
2280  * Push any outstanding VSI filter changes through the AdminQ.
2281  *
2282  * Returns 0 or error value
2283  **/
2284 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2285 {
2286         struct hlist_head tmp_add_list, tmp_del_list;
2287         struct i40e_mac_filter *f;
2288         struct i40e_new_mac_filter *new, *add_head = NULL;
2289         struct i40e_hw *hw = &vsi->back->hw;
2290         bool old_overflow, new_overflow;
2291         unsigned int failed_filters = 0;
2292         unsigned int vlan_filters = 0;
2293         char vsi_name[16] = "PF";
2294         int filter_list_len = 0;
2295         i40e_status aq_ret = 0;
2296         u32 changed_flags = 0;
2297         struct hlist_node *h;
2298         struct i40e_pf *pf;
2299         int num_add = 0;
2300         int num_del = 0;
2301         int retval = 0;
2302         u16 cmd_flags;
2303         int list_size;
2304         int bkt;
2305
2306         /* empty array typed pointers, kcalloc later */
2307         struct i40e_aqc_add_macvlan_element_data *add_list;
2308         struct i40e_aqc_remove_macvlan_element_data *del_list;
2309
2310         while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state))
2311                 usleep_range(1000, 2000);
2312         pf = vsi->back;
2313
2314         old_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2315
2316         if (vsi->netdev) {
2317                 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2318                 vsi->current_netdev_flags = vsi->netdev->flags;
2319         }
2320
2321         INIT_HLIST_HEAD(&tmp_add_list);
2322         INIT_HLIST_HEAD(&tmp_del_list);
2323
2324         if (vsi->type == I40E_VSI_SRIOV)
2325                 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2326         else if (vsi->type != I40E_VSI_MAIN)
2327                 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2328
2329         if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2330                 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2331
2332                 spin_lock_bh(&vsi->mac_filter_hash_lock);
2333                 /* Create a list of filters to delete. */
2334                 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2335                         if (f->state == I40E_FILTER_REMOVE) {
2336                                 /* Move the element into temporary del_list */
2337                                 hash_del(&f->hlist);
2338                                 hlist_add_head(&f->hlist, &tmp_del_list);
2339
2340                                 /* Avoid counting removed filters */
2341                                 continue;
2342                         }
2343                         if (f->state == I40E_FILTER_NEW) {
2344                                 /* Create a temporary i40e_new_mac_filter */
2345                                 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2346                                 if (!new)
2347                                         goto err_no_memory_locked;
2348
2349                                 /* Store pointer to the real filter */
2350                                 new->f = f;
2351                                 new->state = f->state;
2352
2353                                 /* Add it to the hash list */
2354                                 hlist_add_head(&new->hlist, &tmp_add_list);
2355                         }
2356
2357                         /* Count the number of active (current and new) VLAN
2358                          * filters we have now. Does not count filters which
2359                          * are marked for deletion.
2360                          */
2361                         if (f->vlan > 0)
2362                                 vlan_filters++;
2363                 }
2364
2365                 retval = i40e_correct_mac_vlan_filters(vsi,
2366                                                        &tmp_add_list,
2367                                                        &tmp_del_list,
2368                                                        vlan_filters);
2369                 if (retval)
2370                         goto err_no_memory_locked;
2371
2372                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2373         }
2374
2375         /* Now process 'del_list' outside the lock */
2376         if (!hlist_empty(&tmp_del_list)) {
2377                 filter_list_len = hw->aq.asq_buf_size /
2378                             sizeof(struct i40e_aqc_remove_macvlan_element_data);
2379                 list_size = filter_list_len *
2380                             sizeof(struct i40e_aqc_remove_macvlan_element_data);
2381                 del_list = kzalloc(list_size, GFP_ATOMIC);
2382                 if (!del_list)
2383                         goto err_no_memory;
2384
2385                 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2386                         cmd_flags = 0;
2387
2388                         /* handle broadcast filters by updating the broadcast
2389                          * promiscuous flag and release filter list.
2390                          */
2391                         if (is_broadcast_ether_addr(f->macaddr)) {
2392                                 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2393
2394                                 hlist_del(&f->hlist);
2395                                 kfree(f);
2396                                 continue;
2397                         }
2398
2399                         /* add to delete list */
2400                         ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2401                         if (f->vlan == I40E_VLAN_ANY) {
2402                                 del_list[num_del].vlan_tag = 0;
2403                                 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2404                         } else {
2405                                 del_list[num_del].vlan_tag =
2406                                         cpu_to_le16((u16)(f->vlan));
2407                         }
2408
2409                         cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2410                         del_list[num_del].flags = cmd_flags;
2411                         num_del++;
2412
2413                         /* flush a full buffer */
2414                         if (num_del == filter_list_len) {
2415                                 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2416                                                      num_del, &retval);
2417                                 memset(del_list, 0, list_size);
2418                                 num_del = 0;
2419                         }
2420                         /* Release memory for MAC filter entries which were
2421                          * synced up with HW.
2422                          */
2423                         hlist_del(&f->hlist);
2424                         kfree(f);
2425                 }
2426
2427                 if (num_del) {
2428                         i40e_aqc_del_filters(vsi, vsi_name, del_list,
2429                                              num_del, &retval);
2430                 }
2431
2432                 kfree(del_list);
2433                 del_list = NULL;
2434         }
2435
2436         if (!hlist_empty(&tmp_add_list)) {
2437                 /* Do all the adds now. */
2438                 filter_list_len = hw->aq.asq_buf_size /
2439                                sizeof(struct i40e_aqc_add_macvlan_element_data);
2440                 list_size = filter_list_len *
2441                                sizeof(struct i40e_aqc_add_macvlan_element_data);
2442                 add_list = kzalloc(list_size, GFP_ATOMIC);
2443                 if (!add_list)
2444                         goto err_no_memory;
2445
2446                 num_add = 0;
2447                 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2448                         /* handle broadcast filters by updating the broadcast
2449                          * promiscuous flag instead of adding a MAC filter.
2450                          */
2451                         if (is_broadcast_ether_addr(new->f->macaddr)) {
2452                                 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2453                                                               new->f))
2454                                         new->state = I40E_FILTER_FAILED;
2455                                 else
2456                                         new->state = I40E_FILTER_ACTIVE;
2457                                 continue;
2458                         }
2459
2460                         /* add to add array */
2461                         if (num_add == 0)
2462                                 add_head = new;
2463                         cmd_flags = 0;
2464                         ether_addr_copy(add_list[num_add].mac_addr,
2465                                         new->f->macaddr);
2466                         if (new->f->vlan == I40E_VLAN_ANY) {
2467                                 add_list[num_add].vlan_tag = 0;
2468                                 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2469                         } else {
2470                                 add_list[num_add].vlan_tag =
2471                                         cpu_to_le16((u16)(new->f->vlan));
2472                         }
2473                         add_list[num_add].queue_number = 0;
2474                         /* set invalid match method for later detection */
2475                         add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2476                         cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2477                         add_list[num_add].flags = cpu_to_le16(cmd_flags);
2478                         num_add++;
2479
2480                         /* flush a full buffer */
2481                         if (num_add == filter_list_len) {
2482                                 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2483                                                      add_head, num_add);
2484                                 memset(add_list, 0, list_size);
2485                                 num_add = 0;
2486                         }
2487                 }
2488                 if (num_add) {
2489                         i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2490                                              num_add);
2491                 }
2492                 /* Now move all of the filters from the temp add list back to
2493                  * the VSI's list.
2494                  */
2495                 spin_lock_bh(&vsi->mac_filter_hash_lock);
2496                 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2497                         /* Only update the state if we're still NEW */
2498                         if (new->f->state == I40E_FILTER_NEW)
2499                                 new->f->state = new->state;
2500                         hlist_del(&new->hlist);
2501                         kfree(new);
2502                 }
2503                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2504                 kfree(add_list);
2505                 add_list = NULL;
2506         }
2507
2508         /* Determine the number of active and failed filters. */
2509         spin_lock_bh(&vsi->mac_filter_hash_lock);
2510         vsi->active_filters = 0;
2511         hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2512                 if (f->state == I40E_FILTER_ACTIVE)
2513                         vsi->active_filters++;
2514                 else if (f->state == I40E_FILTER_FAILED)
2515                         failed_filters++;
2516         }
2517         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2518
2519         /* Check if we are able to exit overflow promiscuous mode. We can
2520          * safely exit if we didn't just enter, we no longer have any failed
2521          * filters, and we have reduced filters below the threshold value.
2522          */
2523         if (old_overflow && !failed_filters &&
2524             vsi->active_filters < vsi->promisc_threshold) {
2525                 dev_info(&pf->pdev->dev,
2526                          "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2527                          vsi_name);
2528                 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2529                 vsi->promisc_threshold = 0;
2530         }
2531
2532         /* if the VF is not trusted do not do promisc */
2533         if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2534                 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2535                 goto out;
2536         }
2537
2538         new_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2539
2540         /* If we are entering overflow promiscuous, we need to calculate a new
2541          * threshold for when we are safe to exit
2542          */
2543         if (!old_overflow && new_overflow)
2544                 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2545
2546         /* check for changes in promiscuous modes */
2547         if (changed_flags & IFF_ALLMULTI) {
2548                 bool cur_multipromisc;
2549
2550                 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2551                 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2552                                                                vsi->seid,
2553                                                                cur_multipromisc,
2554                                                                NULL);
2555                 if (aq_ret) {
2556                         retval = i40e_aq_rc_to_posix(aq_ret,
2557                                                      hw->aq.asq_last_status);
2558                         dev_info(&pf->pdev->dev,
2559                                  "set multi promisc failed on %s, err %s aq_err %s\n",
2560                                  vsi_name,
2561                                  i40e_stat_str(hw, aq_ret),
2562                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2563                 } else {
2564                         dev_info(&pf->pdev->dev, "%s allmulti mode.\n",
2565                                  cur_multipromisc ? "entering" : "leaving");
2566                 }
2567         }
2568
2569         if ((changed_flags & IFF_PROMISC) || old_overflow != new_overflow) {
2570                 bool cur_promisc;
2571
2572                 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2573                                new_overflow);
2574                 aq_ret = i40e_set_promiscuous(pf, cur_promisc);
2575                 if (aq_ret) {
2576                         retval = i40e_aq_rc_to_posix(aq_ret,
2577                                                      hw->aq.asq_last_status);
2578                         dev_info(&pf->pdev->dev,
2579                                  "Setting promiscuous %s failed on %s, err %s aq_err %s\n",
2580                                  cur_promisc ? "on" : "off",
2581                                  vsi_name,
2582                                  i40e_stat_str(hw, aq_ret),
2583                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2584                 }
2585         }
2586 out:
2587         /* if something went wrong then set the changed flag so we try again */
2588         if (retval)
2589                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2590
2591         clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2592         return retval;
2593
2594 err_no_memory:
2595         /* Restore elements on the temporary add and delete lists */
2596         spin_lock_bh(&vsi->mac_filter_hash_lock);
2597 err_no_memory_locked:
2598         i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2599         i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2600         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2601
2602         vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2603         clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2604         return -ENOMEM;
2605 }
2606
2607 /**
2608  * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2609  * @pf: board private structure
2610  **/
2611 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2612 {
2613         int v;
2614
2615         if (!pf)
2616                 return;
2617         if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state))
2618                 return;
2619         if (test_bit(__I40E_VF_DISABLE, pf->state)) {
2620                 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
2621                 return;
2622         }
2623
2624         for (v = 0; v < pf->num_alloc_vsi; v++) {
2625                 if (pf->vsi[v] &&
2626                     (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2627                         int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2628
2629                         if (ret) {
2630                                 /* come back and try again later */
2631                                 set_bit(__I40E_MACVLAN_SYNC_PENDING,
2632                                         pf->state);
2633                                 break;
2634                         }
2635                 }
2636         }
2637 }
2638
2639 /**
2640  * i40e_max_xdp_frame_size - returns the maximum allowed frame size for XDP
2641  * @vsi: the vsi
2642  **/
2643 static int i40e_max_xdp_frame_size(struct i40e_vsi *vsi)
2644 {
2645         if (PAGE_SIZE >= 8192 || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
2646                 return I40E_RXBUFFER_2048;
2647         else
2648                 return I40E_RXBUFFER_3072;
2649 }
2650
2651 /**
2652  * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2653  * @netdev: network interface device structure
2654  * @new_mtu: new value for maximum frame size
2655  *
2656  * Returns 0 on success, negative on failure
2657  **/
2658 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2659 {
2660         struct i40e_netdev_priv *np = netdev_priv(netdev);
2661         struct i40e_vsi *vsi = np->vsi;
2662         struct i40e_pf *pf = vsi->back;
2663
2664         if (i40e_enabled_xdp_vsi(vsi)) {
2665                 int frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2666
2667                 if (frame_size > i40e_max_xdp_frame_size(vsi))
2668                         return -EINVAL;
2669         }
2670
2671         netdev_dbg(netdev, "changing MTU from %d to %d\n",
2672                    netdev->mtu, new_mtu);
2673         netdev->mtu = new_mtu;
2674         if (netif_running(netdev))
2675                 i40e_vsi_reinit_locked(vsi);
2676         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
2677         set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
2678         return 0;
2679 }
2680
2681 /**
2682  * i40e_ioctl - Access the hwtstamp interface
2683  * @netdev: network interface device structure
2684  * @ifr: interface request data
2685  * @cmd: ioctl command
2686  **/
2687 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2688 {
2689         struct i40e_netdev_priv *np = netdev_priv(netdev);
2690         struct i40e_pf *pf = np->vsi->back;
2691
2692         switch (cmd) {
2693         case SIOCGHWTSTAMP:
2694                 return i40e_ptp_get_ts_config(pf, ifr);
2695         case SIOCSHWTSTAMP:
2696                 return i40e_ptp_set_ts_config(pf, ifr);
2697         default:
2698                 return -EOPNOTSUPP;
2699         }
2700 }
2701
2702 /**
2703  * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2704  * @vsi: the vsi being adjusted
2705  **/
2706 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2707 {
2708         struct i40e_vsi_context ctxt;
2709         i40e_status ret;
2710
2711         /* Don't modify stripping options if a port VLAN is active */
2712         if (vsi->info.pvid)
2713                 return;
2714
2715         if ((vsi->info.valid_sections &
2716              cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2717             ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2718                 return;  /* already enabled */
2719
2720         vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2721         vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2722                                     I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2723
2724         ctxt.seid = vsi->seid;
2725         ctxt.info = vsi->info;
2726         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2727         if (ret) {
2728                 dev_info(&vsi->back->pdev->dev,
2729                          "update vlan stripping failed, err %s aq_err %s\n",
2730                          i40e_stat_str(&vsi->back->hw, ret),
2731                          i40e_aq_str(&vsi->back->hw,
2732                                      vsi->back->hw.aq.asq_last_status));
2733         }
2734 }
2735
2736 /**
2737  * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2738  * @vsi: the vsi being adjusted
2739  **/
2740 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2741 {
2742         struct i40e_vsi_context ctxt;
2743         i40e_status ret;
2744
2745         /* Don't modify stripping options if a port VLAN is active */
2746         if (vsi->info.pvid)
2747                 return;
2748
2749         if ((vsi->info.valid_sections &
2750              cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2751             ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2752              I40E_AQ_VSI_PVLAN_EMOD_MASK))
2753                 return;  /* already disabled */
2754
2755         vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2756         vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2757                                     I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2758
2759         ctxt.seid = vsi->seid;
2760         ctxt.info = vsi->info;
2761         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2762         if (ret) {
2763                 dev_info(&vsi->back->pdev->dev,
2764                          "update vlan stripping failed, err %s aq_err %s\n",
2765                          i40e_stat_str(&vsi->back->hw, ret),
2766                          i40e_aq_str(&vsi->back->hw,
2767                                      vsi->back->hw.aq.asq_last_status));
2768         }
2769 }
2770
2771 /**
2772  * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2773  * @vsi: the vsi being configured
2774  * @vid: vlan id to be added (0 = untagged only , -1 = any)
2775  *
2776  * This is a helper function for adding a new MAC/VLAN filter with the
2777  * specified VLAN for each existing MAC address already in the hash table.
2778  * This function does *not* perform any accounting to update filters based on
2779  * VLAN mode.
2780  *
2781  * NOTE: this function expects to be called while under the
2782  * mac_filter_hash_lock
2783  **/
2784 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2785 {
2786         struct i40e_mac_filter *f, *add_f;
2787         struct hlist_node *h;
2788         int bkt;
2789
2790         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2791                 if (f->state == I40E_FILTER_REMOVE)
2792                         continue;
2793                 add_f = i40e_add_filter(vsi, f->macaddr, vid);
2794                 if (!add_f) {
2795                         dev_info(&vsi->back->pdev->dev,
2796                                  "Could not add vlan filter %d for %pM\n",
2797                                  vid, f->macaddr);
2798                         return -ENOMEM;
2799                 }
2800         }
2801
2802         return 0;
2803 }
2804
2805 /**
2806  * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2807  * @vsi: the VSI being configured
2808  * @vid: VLAN id to be added
2809  **/
2810 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
2811 {
2812         int err;
2813
2814         if (vsi->info.pvid)
2815                 return -EINVAL;
2816
2817         /* The network stack will attempt to add VID=0, with the intention to
2818          * receive priority tagged packets with a VLAN of 0. Our HW receives
2819          * these packets by default when configured to receive untagged
2820          * packets, so we don't need to add a filter for this case.
2821          * Additionally, HW interprets adding a VID=0 filter as meaning to
2822          * receive *only* tagged traffic and stops receiving untagged traffic.
2823          * Thus, we do not want to actually add a filter for VID=0
2824          */
2825         if (!vid)
2826                 return 0;
2827
2828         /* Locked once because all functions invoked below iterates list*/
2829         spin_lock_bh(&vsi->mac_filter_hash_lock);
2830         err = i40e_add_vlan_all_mac(vsi, vid);
2831         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2832         if (err)
2833                 return err;
2834
2835         /* schedule our worker thread which will take care of
2836          * applying the new filter changes
2837          */
2838         i40e_service_event_schedule(vsi->back);
2839         return 0;
2840 }
2841
2842 /**
2843  * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2844  * @vsi: the vsi being configured
2845  * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2846  *
2847  * This function should be used to remove all VLAN filters which match the
2848  * given VID. It does not schedule the service event and does not take the
2849  * mac_filter_hash_lock so it may be combined with other operations under
2850  * a single invocation of the mac_filter_hash_lock.
2851  *
2852  * NOTE: this function expects to be called while under the
2853  * mac_filter_hash_lock
2854  */
2855 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2856 {
2857         struct i40e_mac_filter *f;
2858         struct hlist_node *h;
2859         int bkt;
2860
2861         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2862                 if (f->vlan == vid)
2863                         __i40e_del_filter(vsi, f);
2864         }
2865 }
2866
2867 /**
2868  * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
2869  * @vsi: the VSI being configured
2870  * @vid: VLAN id to be removed
2871  **/
2872 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
2873 {
2874         if (!vid || vsi->info.pvid)
2875                 return;
2876
2877         spin_lock_bh(&vsi->mac_filter_hash_lock);
2878         i40e_rm_vlan_all_mac(vsi, vid);
2879         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2880
2881         /* schedule our worker thread which will take care of
2882          * applying the new filter changes
2883          */
2884         i40e_service_event_schedule(vsi->back);
2885 }
2886
2887 /**
2888  * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2889  * @netdev: network interface to be adjusted
2890  * @proto: unused protocol value
2891  * @vid: vlan id to be added
2892  *
2893  * net_device_ops implementation for adding vlan ids
2894  **/
2895 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2896                                 __always_unused __be16 proto, u16 vid)
2897 {
2898         struct i40e_netdev_priv *np = netdev_priv(netdev);
2899         struct i40e_vsi *vsi = np->vsi;
2900         int ret = 0;
2901
2902         if (vid >= VLAN_N_VID)
2903                 return -EINVAL;
2904
2905         ret = i40e_vsi_add_vlan(vsi, vid);
2906         if (!ret)
2907                 set_bit(vid, vsi->active_vlans);
2908
2909         return ret;
2910 }
2911
2912 /**
2913  * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path
2914  * @netdev: network interface to be adjusted
2915  * @proto: unused protocol value
2916  * @vid: vlan id to be added
2917  **/
2918 static void i40e_vlan_rx_add_vid_up(struct net_device *netdev,
2919                                     __always_unused __be16 proto, u16 vid)
2920 {
2921         struct i40e_netdev_priv *np = netdev_priv(netdev);
2922         struct i40e_vsi *vsi = np->vsi;
2923
2924         if (vid >= VLAN_N_VID)
2925                 return;
2926         set_bit(vid, vsi->active_vlans);
2927 }
2928
2929 /**
2930  * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2931  * @netdev: network interface to be adjusted
2932  * @proto: unused protocol value
2933  * @vid: vlan id to be removed
2934  *
2935  * net_device_ops implementation for removing vlan ids
2936  **/
2937 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2938                                  __always_unused __be16 proto, u16 vid)
2939 {
2940         struct i40e_netdev_priv *np = netdev_priv(netdev);
2941         struct i40e_vsi *vsi = np->vsi;
2942
2943         /* return code is ignored as there is nothing a user
2944          * can do about failure to remove and a log message was
2945          * already printed from the other function
2946          */
2947         i40e_vsi_kill_vlan(vsi, vid);
2948
2949         clear_bit(vid, vsi->active_vlans);
2950
2951         return 0;
2952 }
2953
2954 /**
2955  * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2956  * @vsi: the vsi being brought back up
2957  **/
2958 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2959 {
2960         u16 vid;
2961
2962         if (!vsi->netdev)
2963                 return;
2964
2965         if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
2966                 i40e_vlan_stripping_enable(vsi);
2967         else
2968                 i40e_vlan_stripping_disable(vsi);
2969
2970         for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2971                 i40e_vlan_rx_add_vid_up(vsi->netdev, htons(ETH_P_8021Q),
2972                                         vid);
2973 }
2974
2975 /**
2976  * i40e_vsi_add_pvid - Add pvid for the VSI
2977  * @vsi: the vsi being adjusted
2978  * @vid: the vlan id to set as a PVID
2979  **/
2980 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2981 {
2982         struct i40e_vsi_context ctxt;
2983         i40e_status ret;
2984
2985         vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2986         vsi->info.pvid = cpu_to_le16(vid);
2987         vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2988                                     I40E_AQ_VSI_PVLAN_INSERT_PVID |
2989                                     I40E_AQ_VSI_PVLAN_EMOD_STR;
2990
2991         ctxt.seid = vsi->seid;
2992         ctxt.info = vsi->info;
2993         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2994         if (ret) {
2995                 dev_info(&vsi->back->pdev->dev,
2996                          "add pvid failed, err %s aq_err %s\n",
2997                          i40e_stat_str(&vsi->back->hw, ret),
2998                          i40e_aq_str(&vsi->back->hw,
2999                                      vsi->back->hw.aq.asq_last_status));
3000                 return -ENOENT;
3001         }
3002
3003         return 0;
3004 }
3005
3006 /**
3007  * i40e_vsi_remove_pvid - Remove the pvid from the VSI
3008  * @vsi: the vsi being adjusted
3009  *
3010  * Just use the vlan_rx_register() service to put it back to normal
3011  **/
3012 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
3013 {
3014         vsi->info.pvid = 0;
3015
3016         i40e_vlan_stripping_disable(vsi);
3017 }
3018
3019 /**
3020  * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
3021  * @vsi: ptr to the VSI
3022  *
3023  * If this function returns with an error, then it's possible one or
3024  * more of the rings is populated (while the rest are not).  It is the
3025  * callers duty to clean those orphaned rings.
3026  *
3027  * Return 0 on success, negative on failure
3028  **/
3029 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
3030 {
3031         int i, err = 0;
3032
3033         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3034                 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
3035
3036         if (!i40e_enabled_xdp_vsi(vsi))
3037                 return err;
3038
3039         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3040                 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]);
3041
3042         return err;
3043 }
3044
3045 /**
3046  * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
3047  * @vsi: ptr to the VSI
3048  *
3049  * Free VSI's transmit software resources
3050  **/
3051 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
3052 {
3053         int i;
3054
3055         if (vsi->tx_rings) {
3056                 for (i = 0; i < vsi->num_queue_pairs; i++)
3057                         if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
3058                                 i40e_free_tx_resources(vsi->tx_rings[i]);
3059         }
3060
3061         if (vsi->xdp_rings) {
3062                 for (i = 0; i < vsi->num_queue_pairs; i++)
3063                         if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
3064                                 i40e_free_tx_resources(vsi->xdp_rings[i]);
3065         }
3066 }
3067
3068 /**
3069  * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3070  * @vsi: ptr to the VSI
3071  *
3072  * If this function returns with an error, then it's possible one or
3073  * more of the rings is populated (while the rest are not).  It is the
3074  * callers duty to clean those orphaned rings.
3075  *
3076  * Return 0 on success, negative on failure
3077  **/
3078 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
3079 {
3080         int i, err = 0;
3081
3082         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3083                 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
3084         return err;
3085 }
3086
3087 /**
3088  * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3089  * @vsi: ptr to the VSI
3090  *
3091  * Free all receive software resources
3092  **/
3093 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
3094 {
3095         int i;
3096
3097         if (!vsi->rx_rings)
3098                 return;
3099
3100         for (i = 0; i < vsi->num_queue_pairs; i++)
3101                 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
3102                         i40e_free_rx_resources(vsi->rx_rings[i]);
3103 }
3104
3105 /**
3106  * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3107  * @ring: The Tx ring to configure
3108  *
3109  * This enables/disables XPS for a given Tx descriptor ring
3110  * based on the TCs enabled for the VSI that ring belongs to.
3111  **/
3112 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
3113 {
3114         int cpu;
3115
3116         if (!ring->q_vector || !ring->netdev || ring->ch)
3117                 return;
3118
3119         /* We only initialize XPS once, so as not to overwrite user settings */
3120         if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state))
3121                 return;
3122
3123         cpu = cpumask_local_spread(ring->q_vector->v_idx, -1);
3124         netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu),
3125                             ring->queue_index);
3126 }
3127
3128 /**
3129  * i40e_xsk_pool - Retrieve the AF_XDP buffer pool if XDP and ZC is enabled
3130  * @ring: The Tx or Rx ring
3131  *
3132  * Returns the AF_XDP buffer pool or NULL.
3133  **/
3134 static struct xsk_buff_pool *i40e_xsk_pool(struct i40e_ring *ring)
3135 {
3136         bool xdp_on = i40e_enabled_xdp_vsi(ring->vsi);
3137         int qid = ring->queue_index;
3138
3139         if (ring_is_xdp(ring))
3140                 qid -= ring->vsi->alloc_queue_pairs;
3141
3142         if (!xdp_on || !test_bit(qid, ring->vsi->af_xdp_zc_qps))
3143                 return NULL;
3144
3145         return xsk_get_pool_from_qid(ring->vsi->netdev, qid);
3146 }
3147
3148 /**
3149  * i40e_configure_tx_ring - Configure a transmit ring context and rest
3150  * @ring: The Tx ring to configure
3151  *
3152  * Configure the Tx descriptor ring in the HMC context.
3153  **/
3154 static int i40e_configure_tx_ring(struct i40e_ring *ring)
3155 {
3156         struct i40e_vsi *vsi = ring->vsi;
3157         u16 pf_q = vsi->base_queue + ring->queue_index;
3158         struct i40e_hw *hw = &vsi->back->hw;
3159         struct i40e_hmc_obj_txq tx_ctx;
3160         i40e_status err = 0;
3161         u32 qtx_ctl = 0;
3162
3163         if (ring_is_xdp(ring))
3164                 ring->xsk_pool = i40e_xsk_pool(ring);
3165
3166         /* some ATR related tx ring init */
3167         if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3168                 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3169                 ring->atr_count = 0;
3170         } else {
3171                 ring->atr_sample_rate = 0;
3172         }
3173
3174         /* configure XPS */
3175         i40e_config_xps_tx_ring(ring);
3176
3177         /* clear the context structure first */
3178         memset(&tx_ctx, 0, sizeof(tx_ctx));
3179
3180         tx_ctx.new_context = 1;
3181         tx_ctx.base = (ring->dma / 128);
3182         tx_ctx.qlen = ring->count;
3183         tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3184                                                I40E_FLAG_FD_ATR_ENABLED));
3185         tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3186         /* FDIR VSI tx ring can still use RS bit and writebacks */
3187         if (vsi->type != I40E_VSI_FDIR)
3188                 tx_ctx.head_wb_ena = 1;
3189         tx_ctx.head_wb_addr = ring->dma +
3190                               (ring->count * sizeof(struct i40e_tx_desc));
3191
3192         /* As part of VSI creation/update, FW allocates certain
3193          * Tx arbitration queue sets for each TC enabled for
3194          * the VSI. The FW returns the handles to these queue
3195          * sets as part of the response buffer to Add VSI,
3196          * Update VSI, etc. AQ commands. It is expected that
3197          * these queue set handles be associated with the Tx
3198          * queues by the driver as part of the TX queue context
3199          * initialization. This has to be done regardless of
3200          * DCB as by default everything is mapped to TC0.
3201          */
3202
3203         if (ring->ch)
3204                 tx_ctx.rdylist =
3205                         le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]);
3206
3207         else
3208                 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3209
3210         tx_ctx.rdylist_act = 0;
3211
3212         /* clear the context in the HMC */
3213         err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3214         if (err) {
3215                 dev_info(&vsi->back->pdev->dev,
3216                          "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3217                          ring->queue_index, pf_q, err);
3218                 return -ENOMEM;
3219         }
3220
3221         /* set the context in the HMC */
3222         err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3223         if (err) {
3224                 dev_info(&vsi->back->pdev->dev,
3225                          "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3226                          ring->queue_index, pf_q, err);
3227                 return -ENOMEM;
3228         }
3229
3230         /* Now associate this queue with this PCI function */
3231         if (ring->ch) {
3232                 if (ring->ch->type == I40E_VSI_VMDQ2)
3233                         qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3234                 else
3235                         return -EINVAL;
3236
3237                 qtx_ctl |= (ring->ch->vsi_number <<
3238                             I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3239                             I40E_QTX_CTL_VFVM_INDX_MASK;
3240         } else {
3241                 if (vsi->type == I40E_VSI_VMDQ2) {
3242                         qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3243                         qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3244                                     I40E_QTX_CTL_VFVM_INDX_MASK;
3245                 } else {
3246                         qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3247                 }
3248         }
3249
3250         qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3251                     I40E_QTX_CTL_PF_INDX_MASK);
3252         wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3253         i40e_flush(hw);
3254
3255         /* cache tail off for easier writes later */
3256         ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3257
3258         return 0;
3259 }
3260
3261 /**
3262  * i40e_rx_offset - Return expected offset into page to access data
3263  * @rx_ring: Ring we are requesting offset of
3264  *
3265  * Returns the offset value for ring into the data buffer.
3266  */
3267 static unsigned int i40e_rx_offset(struct i40e_ring *rx_ring)
3268 {
3269         return ring_uses_build_skb(rx_ring) ? I40E_SKB_PAD : 0;
3270 }
3271
3272 /**
3273  * i40e_configure_rx_ring - Configure a receive ring context
3274  * @ring: The Rx ring to configure
3275  *
3276  * Configure the Rx descriptor ring in the HMC context.
3277  **/
3278 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3279 {
3280         struct i40e_vsi *vsi = ring->vsi;
3281         u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3282         u16 pf_q = vsi->base_queue + ring->queue_index;
3283         struct i40e_hw *hw = &vsi->back->hw;
3284         struct i40e_hmc_obj_rxq rx_ctx;
3285         i40e_status err = 0;
3286         bool ok;
3287         int ret;
3288
3289         bitmap_zero(ring->state, __I40E_RING_STATE_NBITS);
3290
3291         /* clear the context structure first */
3292         memset(&rx_ctx, 0, sizeof(rx_ctx));
3293
3294         if (ring->vsi->type == I40E_VSI_MAIN)
3295                 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
3296
3297         kfree(ring->rx_bi);
3298         ring->xsk_pool = i40e_xsk_pool(ring);
3299         if (ring->xsk_pool) {
3300                 ret = i40e_alloc_rx_bi_zc(ring);
3301                 if (ret)
3302                         return ret;
3303                 ring->rx_buf_len =
3304                   xsk_pool_get_rx_frame_size(ring->xsk_pool);
3305                 /* For AF_XDP ZC, we disallow packets to span on
3306                  * multiple buffers, thus letting us skip that
3307                  * handling in the fast-path.
3308                  */
3309                 chain_len = 1;
3310                 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3311                                                  MEM_TYPE_XSK_BUFF_POOL,
3312                                                  NULL);
3313                 if (ret)
3314                         return ret;
3315                 dev_info(&vsi->back->pdev->dev,
3316                          "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
3317                          ring->queue_index);
3318
3319         } else {
3320                 ret = i40e_alloc_rx_bi(ring);
3321                 if (ret)
3322                         return ret;
3323                 ring->rx_buf_len = vsi->rx_buf_len;
3324                 if (ring->vsi->type == I40E_VSI_MAIN) {
3325                         ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3326                                                          MEM_TYPE_PAGE_SHARED,
3327                                                          NULL);
3328                         if (ret)
3329                                 return ret;
3330                 }
3331         }
3332
3333         rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3334                                     BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3335
3336         rx_ctx.base = (ring->dma / 128);
3337         rx_ctx.qlen = ring->count;
3338
3339         /* use 16 byte descriptors */
3340         rx_ctx.dsize = 0;
3341
3342         /* descriptor type is always zero
3343          * rx_ctx.dtype = 0;
3344          */
3345         rx_ctx.hsplit_0 = 0;
3346
3347         rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3348         if (hw->revision_id == 0)
3349                 rx_ctx.lrxqthresh = 0;
3350         else
3351                 rx_ctx.lrxqthresh = 1;
3352         rx_ctx.crcstrip = 1;
3353         rx_ctx.l2tsel = 1;
3354         /* this controls whether VLAN is stripped from inner headers */
3355         rx_ctx.showiv = 0;
3356         /* set the prefena field to 1 because the manual says to */
3357         rx_ctx.prefena = 1;
3358
3359         /* clear the context in the HMC */
3360         err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3361         if (err) {
3362                 dev_info(&vsi->back->pdev->dev,
3363                          "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3364                          ring->queue_index, pf_q, err);
3365                 return -ENOMEM;
3366         }
3367
3368         /* set the context in the HMC */
3369         err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3370         if (err) {
3371                 dev_info(&vsi->back->pdev->dev,
3372                          "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3373                          ring->queue_index, pf_q, err);
3374                 return -ENOMEM;
3375         }
3376
3377         /* configure Rx buffer alignment */
3378         if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
3379                 clear_ring_build_skb_enabled(ring);
3380         else
3381                 set_ring_build_skb_enabled(ring);
3382
3383         ring->rx_offset = i40e_rx_offset(ring);
3384
3385         /* cache tail for quicker writes, and clear the reg before use */
3386         ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3387         writel(0, ring->tail);
3388
3389         if (ring->xsk_pool) {
3390                 xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq);
3391                 ok = i40e_alloc_rx_buffers_zc(ring, I40E_DESC_UNUSED(ring));
3392         } else {
3393                 ok = !i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3394         }
3395         if (!ok) {
3396                 /* Log this in case the user has forgotten to give the kernel
3397                  * any buffers, even later in the application.
3398                  */
3399                 dev_info(&vsi->back->pdev->dev,
3400                          "Failed to allocate some buffers on %sRx ring %d (pf_q %d)\n",
3401                          ring->xsk_pool ? "AF_XDP ZC enabled " : "",
3402                          ring->queue_index, pf_q);
3403         }
3404
3405         return 0;
3406 }
3407
3408 /**
3409  * i40e_vsi_configure_tx - Configure the VSI for Tx
3410  * @vsi: VSI structure describing this set of rings and resources
3411  *
3412  * Configure the Tx VSI for operation.
3413  **/
3414 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3415 {
3416         int err = 0;
3417         u16 i;
3418
3419         for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3420                 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3421
3422         if (err || !i40e_enabled_xdp_vsi(vsi))
3423                 return err;
3424
3425         for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3426                 err = i40e_configure_tx_ring(vsi->xdp_rings[i]);
3427
3428         return err;
3429 }
3430
3431 /**
3432  * i40e_vsi_configure_rx - Configure the VSI for Rx
3433  * @vsi: the VSI being configured
3434  *
3435  * Configure the Rx VSI for operation.
3436  **/
3437 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3438 {
3439         int err = 0;
3440         u16 i;
3441
3442         if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {
3443                 vsi->max_frame = I40E_MAX_RXBUFFER;
3444                 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3445 #if (PAGE_SIZE < 8192)
3446         } else if (!I40E_2K_TOO_SMALL_WITH_PADDING &&
3447                    (vsi->netdev->mtu <= ETH_DATA_LEN)) {
3448                 vsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3449                 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3450 #endif
3451         } else {
3452                 vsi->max_frame = I40E_MAX_RXBUFFER;
3453                 vsi->rx_buf_len = (PAGE_SIZE < 8192) ? I40E_RXBUFFER_3072 :
3454                                                        I40E_RXBUFFER_2048;
3455         }
3456
3457         /* set up individual rings */
3458         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3459                 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3460
3461         return err;
3462 }
3463
3464 /**
3465  * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3466  * @vsi: ptr to the VSI
3467  **/
3468 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3469 {
3470         struct i40e_ring *tx_ring, *rx_ring;
3471         u16 qoffset, qcount;
3472         int i, n;
3473
3474         if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3475                 /* Reset the TC information */
3476                 for (i = 0; i < vsi->num_queue_pairs; i++) {
3477                         rx_ring = vsi->rx_rings[i];
3478                         tx_ring = vsi->tx_rings[i];
3479                         rx_ring->dcb_tc = 0;
3480                         tx_ring->dcb_tc = 0;
3481                 }
3482                 return;
3483         }
3484
3485         for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3486                 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3487                         continue;
3488
3489                 qoffset = vsi->tc_config.tc_info[n].qoffset;
3490                 qcount = vsi->tc_config.tc_info[n].qcount;
3491                 for (i = qoffset; i < (qoffset + qcount); i++) {
3492                         rx_ring = vsi->rx_rings[i];
3493                         tx_ring = vsi->tx_rings[i];
3494                         rx_ring->dcb_tc = n;
3495                         tx_ring->dcb_tc = n;
3496                 }
3497         }
3498 }
3499
3500 /**
3501  * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3502  * @vsi: ptr to the VSI
3503  **/
3504 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3505 {
3506         if (vsi->netdev)
3507                 i40e_set_rx_mode(vsi->netdev);
3508 }
3509
3510 /**
3511  * i40e_reset_fdir_filter_cnt - Reset flow director filter counters
3512  * @pf: Pointer to the targeted PF
3513  *
3514  * Set all flow director counters to 0.
3515  */
3516 static void i40e_reset_fdir_filter_cnt(struct i40e_pf *pf)
3517 {
3518         pf->fd_tcp4_filter_cnt = 0;
3519         pf->fd_udp4_filter_cnt = 0;
3520         pf->fd_sctp4_filter_cnt = 0;
3521         pf->fd_ip4_filter_cnt = 0;
3522         pf->fd_tcp6_filter_cnt = 0;
3523         pf->fd_udp6_filter_cnt = 0;
3524         pf->fd_sctp6_filter_cnt = 0;
3525         pf->fd_ip6_filter_cnt = 0;
3526 }
3527
3528 /**
3529  * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3530  * @vsi: Pointer to the targeted VSI
3531  *
3532  * This function replays the hlist on the hw where all the SB Flow Director
3533  * filters were saved.
3534  **/
3535 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3536 {
3537         struct i40e_fdir_filter *filter;
3538         struct i40e_pf *pf = vsi->back;
3539         struct hlist_node *node;
3540
3541         if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3542                 return;
3543
3544         /* Reset FDir counters as we're replaying all existing filters */
3545         i40e_reset_fdir_filter_cnt(pf);
3546
3547         hlist_for_each_entry_safe(filter, node,
3548                                   &pf->fdir_filter_list, fdir_node) {
3549                 i40e_add_del_fdir(vsi, filter, true);
3550         }
3551 }
3552
3553 /**
3554  * i40e_vsi_configure - Set up the VSI for action
3555  * @vsi: the VSI being configured
3556  **/
3557 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3558 {
3559         int err;
3560
3561         i40e_set_vsi_rx_mode(vsi);
3562         i40e_restore_vlan(vsi);
3563         i40e_vsi_config_dcb_rings(vsi);
3564         err = i40e_vsi_configure_tx(vsi);
3565         if (!err)
3566                 err = i40e_vsi_configure_rx(vsi);
3567
3568         return err;
3569 }
3570
3571 /**
3572  * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3573  * @vsi: the VSI being configured
3574  **/
3575 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3576 {
3577         bool has_xdp = i40e_enabled_xdp_vsi(vsi);
3578         struct i40e_pf *pf = vsi->back;
3579         struct i40e_hw *hw = &pf->hw;
3580         u16 vector;
3581         int i, q;
3582         u32 qp;
3583
3584         /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3585          * and PFINT_LNKLSTn registers, e.g.:
3586          *   PFINT_ITRn[0..n-1] gets msix-1..msix-n  (qpair interrupts)
3587          */
3588         qp = vsi->base_queue;
3589         vector = vsi->base_vector;
3590         for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3591                 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3592
3593                 q_vector->rx.next_update = jiffies + 1;
3594                 q_vector->rx.target_itr =
3595                         ITR_TO_REG(vsi->rx_rings[i]->itr_setting);
3596                 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3597                      q_vector->rx.target_itr >> 1);
3598                 q_vector->rx.current_itr = q_vector->rx.target_itr;
3599
3600                 q_vector->tx.next_update = jiffies + 1;
3601                 q_vector->tx.target_itr =
3602                         ITR_TO_REG(vsi->tx_rings[i]->itr_setting);
3603                 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3604                      q_vector->tx.target_itr >> 1);
3605                 q_vector->tx.current_itr = q_vector->tx.target_itr;
3606
3607                 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3608                      i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3609
3610                 /* Linked list for the queuepairs assigned to this vector */
3611                 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3612                 for (q = 0; q < q_vector->num_ringpairs; q++) {
3613                         u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp;
3614                         u32 val;
3615
3616                         val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3617                               (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3618                               (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3619                               (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
3620                               (I40E_QUEUE_TYPE_TX <<
3621                                I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3622
3623                         wr32(hw, I40E_QINT_RQCTL(qp), val);
3624
3625                         if (has_xdp) {
3626                                 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3627                                       (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3628                                       (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3629                                       (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3630                                       (I40E_QUEUE_TYPE_TX <<
3631                                        I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3632
3633                                 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3634                         }
3635
3636                         val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3637                               (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3638                               (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3639                               ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3640                               (I40E_QUEUE_TYPE_RX <<
3641                                I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3642
3643                         /* Terminate the linked list */
3644                         if (q == (q_vector->num_ringpairs - 1))
3645                                 val |= (I40E_QUEUE_END_OF_LIST <<
3646                                         I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3647
3648                         wr32(hw, I40E_QINT_TQCTL(qp), val);
3649                         qp++;
3650                 }
3651         }
3652
3653         i40e_flush(hw);
3654 }
3655
3656 /**
3657  * i40e_enable_misc_int_causes - enable the non-queue interrupts
3658  * @pf: pointer to private device data structure
3659  **/
3660 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3661 {
3662         struct i40e_hw *hw = &pf->hw;
3663         u32 val;
3664
3665         /* clear things first */
3666         wr32(hw, I40E_PFINT_ICR0_ENA, 0);  /* disable all */
3667         rd32(hw, I40E_PFINT_ICR0);         /* read to clear */
3668
3669         val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK       |
3670               I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK    |
3671               I40E_PFINT_ICR0_ENA_GRST_MASK          |
3672               I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3673               I40E_PFINT_ICR0_ENA_GPIO_MASK          |
3674               I40E_PFINT_ICR0_ENA_HMC_ERR_MASK       |
3675               I40E_PFINT_ICR0_ENA_VFLR_MASK          |
3676               I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3677
3678         if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3679                 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3680
3681         if (pf->flags & I40E_FLAG_PTP)
3682                 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3683
3684         wr32(hw, I40E_PFINT_ICR0_ENA, val);
3685
3686         /* SW_ITR_IDX = 0, but don't change INTENA */
3687         wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3688                                         I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3689
3690         /* OTHER_ITR_IDX = 0 */
3691         wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3692 }
3693
3694 /**
3695  * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3696  * @vsi: the VSI being configured
3697  **/
3698 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3699 {
3700         u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0;
3701         struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3702         struct i40e_pf *pf = vsi->back;
3703         struct i40e_hw *hw = &pf->hw;
3704         u32 val;
3705
3706         /* set the ITR configuration */
3707         q_vector->rx.next_update = jiffies + 1;
3708         q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting);
3709         wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1);
3710         q_vector->rx.current_itr = q_vector->rx.target_itr;
3711         q_vector->tx.next_update = jiffies + 1;
3712         q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting);
3713         wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.target_itr >> 1);
3714         q_vector->tx.current_itr = q_vector->tx.target_itr;
3715
3716         i40e_enable_misc_int_causes(pf);
3717
3718         /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3719         wr32(hw, I40E_PFINT_LNKLST0, 0);
3720
3721         /* Associate the queue pair to the vector and enable the queue int */
3722         val = I40E_QINT_RQCTL_CAUSE_ENA_MASK                   |
3723               (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT)  |
3724               (nextqp      << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3725               (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3726
3727         wr32(hw, I40E_QINT_RQCTL(0), val);
3728
3729         if (i40e_enabled_xdp_vsi(vsi)) {
3730                 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK                 |
3731                       (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT)|
3732                       (I40E_QUEUE_TYPE_TX
3733                        << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3734
3735                 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3736         }
3737
3738         val = I40E_QINT_TQCTL_CAUSE_ENA_MASK                  |
3739               (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3740               (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3741
3742         wr32(hw, I40E_QINT_TQCTL(0), val);
3743         i40e_flush(hw);
3744 }
3745
3746 /**
3747  * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3748  * @pf: board private structure
3749  **/
3750 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3751 {
3752         struct i40e_hw *hw = &pf->hw;
3753
3754         wr32(hw, I40E_PFINT_DYN_CTL0,
3755              I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3756         i40e_flush(hw);
3757 }
3758
3759 /**
3760  * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3761  * @pf: board private structure
3762  **/
3763 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3764 {
3765         struct i40e_hw *hw = &pf->hw;
3766         u32 val;
3767
3768         val = I40E_PFINT_DYN_CTL0_INTENA_MASK   |
3769               I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3770               (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3771
3772         wr32(hw, I40E_PFINT_DYN_CTL0, val);
3773         i40e_flush(hw);
3774 }
3775
3776 /**
3777  * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3778  * @irq: interrupt number
3779  * @data: pointer to a q_vector
3780  **/
3781 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3782 {
3783         struct i40e_q_vector *q_vector = data;
3784
3785         if (!q_vector->tx.ring && !q_vector->rx.ring)
3786                 return IRQ_HANDLED;
3787
3788         napi_schedule_irqoff(&q_vector->napi);
3789
3790         return IRQ_HANDLED;
3791 }
3792
3793 /**
3794  * i40e_irq_affinity_notify - Callback for affinity changes
3795  * @notify: context as to what irq was changed
3796  * @mask: the new affinity mask
3797  *
3798  * This is a callback function used by the irq_set_affinity_notifier function
3799  * so that we may register to receive changes to the irq affinity masks.
3800  **/
3801 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3802                                      const cpumask_t *mask)
3803 {
3804         struct i40e_q_vector *q_vector =
3805                 container_of(notify, struct i40e_q_vector, affinity_notify);
3806
3807         cpumask_copy(&q_vector->affinity_mask, mask);
3808 }
3809
3810 /**
3811  * i40e_irq_affinity_release - Callback for affinity notifier release
3812  * @ref: internal core kernel usage
3813  *
3814  * This is a callback function used by the irq_set_affinity_notifier function
3815  * to inform the current notification subscriber that they will no longer
3816  * receive notifications.
3817  **/
3818 static void i40e_irq_affinity_release(struct kref *ref) {}
3819
3820 /**
3821  * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3822  * @vsi: the VSI being configured
3823  * @basename: name for the vector
3824  *
3825  * Allocates MSI-X vectors and requests interrupts from the kernel.
3826  **/
3827 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3828 {
3829         int q_vectors = vsi->num_q_vectors;
3830         struct i40e_pf *pf = vsi->back;
3831         int base = vsi->base_vector;
3832         int rx_int_idx = 0;
3833         int tx_int_idx = 0;
3834         int vector, err;
3835         int irq_num;
3836         int cpu;
3837
3838         for (vector = 0; vector < q_vectors; vector++) {
3839                 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3840
3841                 irq_num = pf->msix_entries[base + vector].vector;
3842
3843                 if (q_vector->tx.ring && q_vector->rx.ring) {
3844                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3845                                  "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3846                         tx_int_idx++;
3847                 } else if (q_vector->rx.ring) {
3848                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3849                                  "%s-%s-%d", basename, "rx", rx_int_idx++);
3850                 } else if (q_vector->tx.ring) {
3851                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3852                                  "%s-%s-%d", basename, "tx", tx_int_idx++);
3853                 } else {
3854                         /* skip this unused q_vector */
3855                         continue;
3856                 }
3857                 err = request_irq(irq_num,
3858                                   vsi->irq_handler,
3859                                   0,
3860                                   q_vector->name,
3861                                   q_vector);
3862                 if (err) {
3863                         dev_info(&pf->pdev->dev,
3864                                  "MSIX request_irq failed, error: %d\n", err);
3865                         goto free_queue_irqs;
3866                 }
3867
3868                 /* register for affinity change notifications */
3869                 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
3870                 q_vector->affinity_notify.release = i40e_irq_affinity_release;
3871                 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
3872                 /* Spread affinity hints out across online CPUs.
3873                  *
3874                  * get_cpu_mask returns a static constant mask with
3875                  * a permanent lifetime so it's ok to pass to
3876                  * irq_set_affinity_hint without making a copy.
3877                  */
3878                 cpu = cpumask_local_spread(q_vector->v_idx, -1);
3879                 irq_set_affinity_hint(irq_num, get_cpu_mask(cpu));
3880         }
3881
3882         vsi->irqs_ready = true;
3883         return 0;
3884
3885 free_queue_irqs:
3886         while (vector) {
3887                 vector--;
3888                 irq_num = pf->msix_entries[base + vector].vector;
3889                 irq_set_affinity_notifier(irq_num, NULL);
3890                 irq_set_affinity_hint(irq_num, NULL);
3891                 free_irq(irq_num, &vsi->q_vectors[vector]);
3892         }
3893         return err;
3894 }
3895
3896 /**
3897  * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3898  * @vsi: the VSI being un-configured
3899  **/
3900 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3901 {
3902         struct i40e_pf *pf = vsi->back;
3903         struct i40e_hw *hw = &pf->hw;
3904         int base = vsi->base_vector;
3905         int i;
3906
3907         /* disable interrupt causation from each queue */
3908         for (i = 0; i < vsi->num_queue_pairs; i++) {
3909                 u32 val;
3910
3911                 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
3912                 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3913                 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
3914
3915                 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
3916                 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3917                 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
3918
3919                 if (!i40e_enabled_xdp_vsi(vsi))
3920                         continue;
3921                 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
3922         }
3923
3924         /* disable each interrupt */
3925         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3926                 for (i = vsi->base_vector;
3927                      i < (vsi->num_q_vectors + vsi->base_vector); i++)
3928                         wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3929
3930                 i40e_flush(hw);
3931                 for (i = 0; i < vsi->num_q_vectors; i++)
3932                         synchronize_irq(pf->msix_entries[i + base].vector);
3933         } else {
3934                 /* Legacy and MSI mode - this stops all interrupt handling */
3935                 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3936                 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3937                 i40e_flush(hw);
3938                 synchronize_irq(pf->pdev->irq);
3939         }
3940 }
3941
3942 /**
3943  * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3944  * @vsi: the VSI being configured
3945  **/
3946 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3947 {
3948         struct i40e_pf *pf = vsi->back;
3949         int i;
3950
3951         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3952                 for (i = 0; i < vsi->num_q_vectors; i++)
3953                         i40e_irq_dynamic_enable(vsi, i);
3954         } else {
3955                 i40e_irq_dynamic_enable_icr0(pf);
3956         }
3957
3958         i40e_flush(&pf->hw);
3959         return 0;
3960 }
3961
3962 /**
3963  * i40e_free_misc_vector - Free the vector that handles non-queue events
3964  * @pf: board private structure
3965  **/
3966 static void i40e_free_misc_vector(struct i40e_pf *pf)
3967 {
3968         /* Disable ICR 0 */
3969         wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3970         i40e_flush(&pf->hw);
3971
3972         if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
3973                 synchronize_irq(pf->msix_entries[0].vector);
3974                 free_irq(pf->msix_entries[0].vector, pf);
3975                 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
3976         }
3977 }
3978
3979 /**
3980  * i40e_intr - MSI/Legacy and non-queue interrupt handler
3981  * @irq: interrupt number
3982  * @data: pointer to a q_vector
3983  *
3984  * This is the handler used for all MSI/Legacy interrupts, and deals
3985  * with both queue and non-queue interrupts.  This is also used in
3986  * MSIX mode to handle the non-queue interrupts.
3987  **/
3988 static irqreturn_t i40e_intr(int irq, void *data)
3989 {
3990         struct i40e_pf *pf = (struct i40e_pf *)data;
3991         struct i40e_hw *hw = &pf->hw;
3992         irqreturn_t ret = IRQ_NONE;
3993         u32 icr0, icr0_remaining;
3994         u32 val, ena_mask;
3995
3996         icr0 = rd32(hw, I40E_PFINT_ICR0);
3997         ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3998
3999         /* if sharing a legacy IRQ, we might get called w/o an intr pending */
4000         if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
4001                 goto enable_intr;
4002
4003         /* if interrupt but no bits showing, must be SWINT */
4004         if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
4005             (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
4006                 pf->sw_int_count++;
4007
4008         if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
4009             (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
4010                 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
4011                 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
4012                 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
4013         }
4014
4015         /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
4016         if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
4017                 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
4018                 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
4019
4020                 /* We do not have a way to disarm Queue causes while leaving
4021                  * interrupt enabled for all other causes, ideally
4022                  * interrupt should be disabled while we are in NAPI but
4023                  * this is not a performance path and napi_schedule()
4024                  * can deal with rescheduling.
4025                  */
4026                 if (!test_bit(__I40E_DOWN, pf->state))
4027                         napi_schedule_irqoff(&q_vector->napi);
4028         }
4029
4030         if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
4031                 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4032                 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
4033                 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
4034         }
4035
4036         if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
4037                 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
4038                 set_bit(__I40E_MDD_EVENT_PENDING, pf->state);
4039         }
4040
4041         if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
4042                 /* disable any further VFLR event notifications */
4043                 if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state)) {
4044                         u32 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
4045
4046                         reg &= ~I40E_PFINT_ICR0_VFLR_MASK;
4047                         wr32(hw, I40E_PFINT_ICR0_ENA, reg);
4048                 } else {
4049                         ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
4050                         set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
4051                 }
4052         }
4053
4054         if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
4055                 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4056                         set_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
4057                 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
4058                 val = rd32(hw, I40E_GLGEN_RSTAT);
4059                 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
4060                        >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
4061                 if (val == I40E_RESET_CORER) {
4062                         pf->corer_count++;
4063                 } else if (val == I40E_RESET_GLOBR) {
4064                         pf->globr_count++;
4065                 } else if (val == I40E_RESET_EMPR) {
4066                         pf->empr_count++;
4067                         set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state);
4068                 }
4069         }
4070
4071         if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
4072                 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
4073                 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
4074                 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
4075                          rd32(hw, I40E_PFHMC_ERRORINFO),
4076                          rd32(hw, I40E_PFHMC_ERRORDATA));
4077         }
4078
4079         if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
4080                 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
4081
4082                 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_EVENT0_MASK)
4083                         schedule_work(&pf->ptp_extts0_work);
4084
4085                 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK)
4086                         i40e_ptp_tx_hwtstamp(pf);
4087
4088                 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
4089         }
4090
4091         /* If a critical error is pending we have no choice but to reset the
4092          * device.
4093          * Report and mask out any remaining unexpected interrupts.
4094          */
4095         icr0_remaining = icr0 & ena_mask;
4096         if (icr0_remaining) {
4097                 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
4098                          icr0_remaining);
4099                 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
4100                     (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
4101                     (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
4102                         dev_info(&pf->pdev->dev, "device will be reset\n");
4103                         set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
4104                         i40e_service_event_schedule(pf);
4105                 }
4106                 ena_mask &= ~icr0_remaining;
4107         }
4108         ret = IRQ_HANDLED;
4109
4110 enable_intr:
4111         /* re-enable interrupt causes */
4112         wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
4113         if (!test_bit(__I40E_DOWN, pf->state) ||
4114             test_bit(__I40E_RECOVERY_MODE, pf->state)) {
4115                 i40e_service_event_schedule(pf);
4116                 i40e_irq_dynamic_enable_icr0(pf);
4117         }
4118
4119         return ret;
4120 }
4121
4122 /**
4123  * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
4124  * @tx_ring:  tx ring to clean
4125  * @budget:   how many cleans we're allowed
4126  *
4127  * Returns true if there's any budget left (e.g. the clean is finished)
4128  **/
4129 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
4130 {
4131         struct i40e_vsi *vsi = tx_ring->vsi;
4132         u16 i = tx_ring->next_to_clean;
4133         struct i40e_tx_buffer *tx_buf;
4134         struct i40e_tx_desc *tx_desc;
4135
4136         tx_buf = &tx_ring->tx_bi[i];
4137         tx_desc = I40E_TX_DESC(tx_ring, i);
4138         i -= tx_ring->count;
4139
4140         do {
4141                 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
4142
4143                 /* if next_to_watch is not set then there is no work pending */
4144                 if (!eop_desc)
4145                         break;
4146
4147                 /* prevent any other reads prior to eop_desc */
4148                 smp_rmb();
4149
4150                 /* if the descriptor isn't done, no work yet to do */
4151                 if (!(eop_desc->cmd_type_offset_bsz &
4152                       cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
4153                         break;
4154
4155                 /* clear next_to_watch to prevent false hangs */
4156                 tx_buf->next_to_watch = NULL;
4157
4158                 tx_desc->buffer_addr = 0;
4159                 tx_desc->cmd_type_offset_bsz = 0;
4160                 /* move past filter desc */
4161                 tx_buf++;
4162                 tx_desc++;
4163                 i++;
4164                 if (unlikely(!i)) {
4165                         i -= tx_ring->count;
4166                         tx_buf = tx_ring->tx_bi;
4167                         tx_desc = I40E_TX_DESC(tx_ring, 0);
4168                 }
4169                 /* unmap skb header data */
4170                 dma_unmap_single(tx_ring->dev,
4171                                  dma_unmap_addr(tx_buf, dma),
4172                                  dma_unmap_len(tx_buf, len),
4173                                  DMA_TO_DEVICE);
4174                 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
4175                         kfree(tx_buf->raw_buf);
4176
4177                 tx_buf->raw_buf = NULL;
4178                 tx_buf->tx_flags = 0;
4179                 tx_buf->next_to_watch = NULL;
4180                 dma_unmap_len_set(tx_buf, len, 0);
4181                 tx_desc->buffer_addr = 0;
4182                 tx_desc->cmd_type_offset_bsz = 0;
4183
4184                 /* move us past the eop_desc for start of next FD desc */
4185                 tx_buf++;
4186                 tx_desc++;
4187                 i++;
4188                 if (unlikely(!i)) {
4189                         i -= tx_ring->count;
4190                         tx_buf = tx_ring->tx_bi;
4191                         tx_desc = I40E_TX_DESC(tx_ring, 0);
4192                 }
4193
4194                 /* update budget accounting */
4195                 budget--;
4196         } while (likely(budget));
4197
4198         i += tx_ring->count;
4199         tx_ring->next_to_clean = i;
4200
4201         if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
4202                 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
4203
4204         return budget > 0;
4205 }
4206
4207 /**
4208  * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4209  * @irq: interrupt number
4210  * @data: pointer to a q_vector
4211  **/
4212 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
4213 {
4214         struct i40e_q_vector *q_vector = data;
4215         struct i40e_vsi *vsi;
4216
4217         if (!q_vector->tx.ring)
4218                 return IRQ_HANDLED;
4219
4220         vsi = q_vector->tx.ring->vsi;
4221         i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
4222
4223         return IRQ_HANDLED;
4224 }
4225
4226 /**
4227  * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4228  * @vsi: the VSI being configured
4229  * @v_idx: vector index
4230  * @qp_idx: queue pair index
4231  **/
4232 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
4233 {
4234         struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4235         struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
4236         struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
4237
4238         tx_ring->q_vector = q_vector;
4239         tx_ring->next = q_vector->tx.ring;
4240         q_vector->tx.ring = tx_ring;
4241         q_vector->tx.count++;
4242
4243         /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4244         if (i40e_enabled_xdp_vsi(vsi)) {
4245                 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx];
4246
4247                 xdp_ring->q_vector = q_vector;
4248                 xdp_ring->next = q_vector->tx.ring;
4249                 q_vector->tx.ring = xdp_ring;
4250                 q_vector->tx.count++;
4251         }
4252
4253         rx_ring->q_vector = q_vector;
4254         rx_ring->next = q_vector->rx.ring;
4255         q_vector->rx.ring = rx_ring;
4256         q_vector->rx.count++;
4257 }
4258
4259 /**
4260  * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4261  * @vsi: the VSI being configured
4262  *
4263  * This function maps descriptor rings to the queue-specific vectors
4264  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
4265  * one vector per queue pair, but on a constrained vector budget, we
4266  * group the queue pairs as "efficiently" as possible.
4267  **/
4268 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
4269 {
4270         int qp_remaining = vsi->num_queue_pairs;
4271         int q_vectors = vsi->num_q_vectors;
4272         int num_ringpairs;
4273         int v_start = 0;
4274         int qp_idx = 0;
4275
4276         /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4277          * group them so there are multiple queues per vector.
4278          * It is also important to go through all the vectors available to be
4279          * sure that if we don't use all the vectors, that the remaining vectors
4280          * are cleared. This is especially important when decreasing the
4281          * number of queues in use.
4282          */
4283         for (; v_start < q_vectors; v_start++) {
4284                 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
4285
4286                 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
4287
4288                 q_vector->num_ringpairs = num_ringpairs;
4289                 q_vector->reg_idx = q_vector->v_idx + vsi->base_vector - 1;
4290
4291                 q_vector->rx.count = 0;
4292                 q_vector->tx.count = 0;
4293                 q_vector->rx.ring = NULL;
4294                 q_vector->tx.ring = NULL;
4295
4296                 while (num_ringpairs--) {
4297                         i40e_map_vector_to_qp(vsi, v_start, qp_idx);
4298                         qp_idx++;
4299                         qp_remaining--;
4300                 }
4301         }
4302 }
4303
4304 /**
4305  * i40e_vsi_request_irq - Request IRQ from the OS
4306  * @vsi: the VSI being configured
4307  * @basename: name for the vector
4308  **/
4309 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
4310 {
4311         struct i40e_pf *pf = vsi->back;
4312         int err;
4313
4314         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4315                 err = i40e_vsi_request_irq_msix(vsi, basename);
4316         else if (pf->flags & I40E_FLAG_MSI_ENABLED)
4317                 err = request_irq(pf->pdev->irq, i40e_intr, 0,
4318                                   pf->int_name, pf);
4319         else
4320                 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
4321                                   pf->int_name, pf);
4322
4323         if (err)
4324                 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4325
4326         return err;
4327 }
4328
4329 #ifdef CONFIG_NET_POLL_CONTROLLER
4330 /**
4331  * i40e_netpoll - A Polling 'interrupt' handler
4332  * @netdev: network interface device structure
4333  *
4334  * This is used by netconsole to send skbs without having to re-enable
4335  * interrupts.  It's not called while the normal interrupt routine is executing.
4336  **/
4337 static void i40e_netpoll(struct net_device *netdev)
4338 {
4339         struct i40e_netdev_priv *np = netdev_priv(netdev);
4340         struct i40e_vsi *vsi = np->vsi;
4341         struct i40e_pf *pf = vsi->back;
4342         int i;
4343
4344         /* if interface is down do nothing */
4345         if (test_bit(__I40E_VSI_DOWN, vsi->state))
4346                 return;
4347
4348         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4349                 for (i = 0; i < vsi->num_q_vectors; i++)
4350                         i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4351         } else {
4352                 i40e_intr(pf->pdev->irq, netdev);
4353         }
4354 }
4355 #endif
4356
4357 #define I40E_QTX_ENA_WAIT_COUNT 50
4358
4359 /**
4360  * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4361  * @pf: the PF being configured
4362  * @pf_q: the PF queue
4363  * @enable: enable or disable state of the queue
4364  *
4365  * This routine will wait for the given Tx queue of the PF to reach the
4366  * enabled or disabled state.
4367  * Returns -ETIMEDOUT in case of failing to reach the requested state after
4368  * multiple retries; else will return 0 in case of success.
4369  **/
4370 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4371 {
4372         int i;
4373         u32 tx_reg;
4374
4375         for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4376                 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4377                 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4378                         break;
4379
4380                 usleep_range(10, 20);
4381         }
4382         if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4383                 return -ETIMEDOUT;
4384
4385         return 0;
4386 }
4387
4388 /**
4389  * i40e_control_tx_q - Start or stop a particular Tx queue
4390  * @pf: the PF structure
4391  * @pf_q: the PF queue to configure
4392  * @enable: start or stop the queue
4393  *
4394  * This function enables or disables a single queue. Note that any delay
4395  * required after the operation is expected to be handled by the caller of
4396  * this function.
4397  **/
4398 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4399 {
4400         struct i40e_hw *hw = &pf->hw;
4401         u32 tx_reg;
4402         int i;
4403
4404         /* warn the TX unit of coming changes */
4405         i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4406         if (!enable)
4407                 usleep_range(10, 20);
4408
4409         for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4410                 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4411                 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4412                     ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4413                         break;
4414                 usleep_range(1000, 2000);
4415         }
4416
4417         /* Skip if the queue is already in the requested state */
4418         if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4419                 return;
4420
4421         /* turn on/off the queue */
4422         if (enable) {
4423                 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4424                 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4425         } else {
4426                 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4427         }
4428
4429         wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4430 }
4431
4432 /**
4433  * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4434  * @seid: VSI SEID
4435  * @pf: the PF structure
4436  * @pf_q: the PF queue to configure
4437  * @is_xdp: true if the queue is used for XDP
4438  * @enable: start or stop the queue
4439  **/
4440 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4441                            bool is_xdp, bool enable)
4442 {
4443         int ret;
4444
4445         i40e_control_tx_q(pf, pf_q, enable);
4446
4447         /* wait for the change to finish */
4448         ret = i40e_pf_txq_wait(pf, pf_q, enable);
4449         if (ret) {
4450                 dev_info(&pf->pdev->dev,
4451                          "VSI seid %d %sTx ring %d %sable timeout\n",
4452                          seid, (is_xdp ? "XDP " : ""), pf_q,
4453                          (enable ? "en" : "dis"));
4454         }
4455
4456         return ret;
4457 }
4458
4459 /**
4460  * i40e_vsi_enable_tx - Start a VSI's rings
4461  * @vsi: the VSI being configured
4462  **/
4463 static int i40e_vsi_enable_tx(struct i40e_vsi *vsi)
4464 {
4465         struct i40e_pf *pf = vsi->back;
4466         int i, pf_q, ret = 0;
4467
4468         pf_q = vsi->base_queue;
4469         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4470                 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4471                                              pf_q,
4472                                              false /*is xdp*/, true);
4473                 if (ret)
4474                         break;
4475
4476                 if (!i40e_enabled_xdp_vsi(vsi))
4477                         continue;
4478
4479                 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4480                                              pf_q + vsi->alloc_queue_pairs,
4481                                              true /*is xdp*/, true);
4482                 if (ret)
4483                         break;
4484         }
4485         return ret;
4486 }
4487
4488 /**
4489  * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4490  * @pf: the PF being configured
4491  * @pf_q: the PF queue
4492  * @enable: enable or disable state of the queue
4493  *
4494  * This routine will wait for the given Rx queue of the PF to reach the
4495  * enabled or disabled state.
4496  * Returns -ETIMEDOUT in case of failing to reach the requested state after
4497  * multiple retries; else will return 0 in case of success.
4498  **/
4499 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4500 {
4501         int i;
4502         u32 rx_reg;
4503
4504         for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4505                 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4506                 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4507                         break;
4508
4509                 usleep_range(10, 20);
4510         }
4511         if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4512                 return -ETIMEDOUT;
4513
4514         return 0;
4515 }
4516
4517 /**
4518  * i40e_control_rx_q - Start or stop a particular Rx queue
4519  * @pf: the PF structure
4520  * @pf_q: the PF queue to configure
4521  * @enable: start or stop the queue
4522  *
4523  * This function enables or disables a single queue. Note that
4524  * any delay required after the operation is expected to be
4525  * handled by the caller of this function.
4526  **/
4527 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4528 {
4529         struct i40e_hw *hw = &pf->hw;
4530         u32 rx_reg;
4531         int i;
4532
4533         for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4534                 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4535                 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4536                     ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4537                         break;
4538                 usleep_range(1000, 2000);
4539         }
4540
4541         /* Skip if the queue is already in the requested state */
4542         if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4543                 return;
4544
4545         /* turn on/off the queue */
4546         if (enable)
4547                 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4548         else
4549                 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4550
4551         wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4552 }
4553
4554 /**
4555  * i40e_control_wait_rx_q
4556  * @pf: the PF structure
4557  * @pf_q: queue being configured
4558  * @enable: start or stop the rings
4559  *
4560  * This function enables or disables a single queue along with waiting
4561  * for the change to finish. The caller of this function should handle
4562  * the delays needed in the case of disabling queues.
4563  **/
4564 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4565 {
4566         int ret = 0;
4567
4568         i40e_control_rx_q(pf, pf_q, enable);
4569
4570         /* wait for the change to finish */
4571         ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4572         if (ret)
4573                 return ret;
4574
4575         return ret;
4576 }
4577
4578 /**
4579  * i40e_vsi_enable_rx - Start a VSI's rings
4580  * @vsi: the VSI being configured
4581  **/
4582 static int i40e_vsi_enable_rx(struct i40e_vsi *vsi)
4583 {
4584         struct i40e_pf *pf = vsi->back;
4585         int i, pf_q, ret = 0;
4586
4587         pf_q = vsi->base_queue;
4588         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4589                 ret = i40e_control_wait_rx_q(pf, pf_q, true);
4590                 if (ret) {
4591                         dev_info(&pf->pdev->dev,
4592                                  "VSI seid %d Rx ring %d enable timeout\n",
4593                                  vsi->seid, pf_q);
4594                         break;
4595                 }
4596         }
4597
4598         return ret;
4599 }
4600
4601 /**
4602  * i40e_vsi_start_rings - Start a VSI's rings
4603  * @vsi: the VSI being configured
4604  **/
4605 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4606 {
4607         int ret = 0;
4608
4609         /* do rx first for enable and last for disable */
4610         ret = i40e_vsi_enable_rx(vsi);
4611         if (ret)
4612                 return ret;
4613         ret = i40e_vsi_enable_tx(vsi);
4614
4615         return ret;
4616 }
4617
4618 #define I40E_DISABLE_TX_GAP_MSEC        50
4619
4620 /**
4621  * i40e_vsi_stop_rings - Stop a VSI's rings
4622  * @vsi: the VSI being configured
4623  **/
4624 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4625 {
4626         struct i40e_pf *pf = vsi->back;
4627         int pf_q, err, q_end;
4628
4629         /* When port TX is suspended, don't wait */
4630         if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state))
4631                 return i40e_vsi_stop_rings_no_wait(vsi);
4632
4633         q_end = vsi->base_queue + vsi->num_queue_pairs;
4634         for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4635                 i40e_pre_tx_queue_cfg(&pf->hw, (u32)pf_q, false);
4636
4637         for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++) {
4638                 err = i40e_control_wait_rx_q(pf, pf_q, false);
4639                 if (err)
4640                         dev_info(&pf->pdev->dev,
4641                                  "VSI seid %d Rx ring %d disable timeout\n",
4642                                  vsi->seid, pf_q);
4643         }
4644
4645         msleep(I40E_DISABLE_TX_GAP_MSEC);
4646         pf_q = vsi->base_queue;
4647         for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4648                 wr32(&pf->hw, I40E_QTX_ENA(pf_q), 0);
4649
4650         i40e_vsi_wait_queues_disabled(vsi);
4651 }
4652
4653 /**
4654  * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4655  * @vsi: the VSI being shutdown
4656  *
4657  * This function stops all the rings for a VSI but does not delay to verify
4658  * that rings have been disabled. It is expected that the caller is shutting
4659  * down multiple VSIs at once and will delay together for all the VSIs after
4660  * initiating the shutdown. This is particularly useful for shutting down lots
4661  * of VFs together. Otherwise, a large delay can be incurred while configuring
4662  * each VSI in serial.
4663  **/
4664 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4665 {
4666         struct i40e_pf *pf = vsi->back;
4667         int i, pf_q;
4668
4669         pf_q = vsi->base_queue;
4670         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4671                 i40e_control_tx_q(pf, pf_q, false);
4672                 i40e_control_rx_q(pf, pf_q, false);
4673         }
4674 }
4675
4676 /**
4677  * i40e_vsi_free_irq - Free the irq association with the OS
4678  * @vsi: the VSI being configured
4679  **/
4680 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4681 {
4682         struct i40e_pf *pf = vsi->back;
4683         struct i40e_hw *hw = &pf->hw;
4684         int base = vsi->base_vector;
4685         u32 val, qp;
4686         int i;
4687
4688         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4689                 if (!vsi->q_vectors)
4690                         return;
4691
4692                 if (!vsi->irqs_ready)
4693                         return;
4694
4695                 vsi->irqs_ready = false;
4696                 for (i = 0; i < vsi->num_q_vectors; i++) {
4697                         int irq_num;
4698                         u16 vector;
4699
4700                         vector = i + base;
4701                         irq_num = pf->msix_entries[vector].vector;
4702
4703                         /* free only the irqs that were actually requested */
4704                         if (!vsi->q_vectors[i] ||
4705                             !vsi->q_vectors[i]->num_ringpairs)
4706                                 continue;
4707
4708                         /* clear the affinity notifier in the IRQ descriptor */
4709                         irq_set_affinity_notifier(irq_num, NULL);
4710                         /* remove our suggested affinity mask for this IRQ */
4711                         irq_set_affinity_hint(irq_num, NULL);
4712                         synchronize_irq(irq_num);
4713                         free_irq(irq_num, vsi->q_vectors[i]);
4714
4715                         /* Tear down the interrupt queue link list
4716                          *
4717                          * We know that they come in pairs and always
4718                          * the Rx first, then the Tx.  To clear the
4719                          * link list, stick the EOL value into the
4720                          * next_q field of the registers.
4721                          */
4722                         val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4723                         qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4724                                 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4725                         val |= I40E_QUEUE_END_OF_LIST
4726                                 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4727                         wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4728
4729                         while (qp != I40E_QUEUE_END_OF_LIST) {
4730                                 u32 next;
4731
4732                                 val = rd32(hw, I40E_QINT_RQCTL(qp));
4733
4734                                 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK  |
4735                                          I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4736                                          I40E_QINT_RQCTL_CAUSE_ENA_MASK  |
4737                                          I40E_QINT_RQCTL_INTEVENT_MASK);
4738
4739                                 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4740                                          I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4741
4742                                 wr32(hw, I40E_QINT_RQCTL(qp), val);
4743
4744                                 val = rd32(hw, I40E_QINT_TQCTL(qp));
4745
4746                                 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4747                                         >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4748
4749                                 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK  |
4750                                          I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4751                                          I40E_QINT_TQCTL_CAUSE_ENA_MASK  |
4752                                          I40E_QINT_TQCTL_INTEVENT_MASK);
4753
4754                                 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4755                                          I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4756
4757                                 wr32(hw, I40E_QINT_TQCTL(qp), val);
4758                                 qp = next;
4759                         }
4760                 }
4761         } else {
4762                 free_irq(pf->pdev->irq, pf);
4763
4764                 val = rd32(hw, I40E_PFINT_LNKLST0);
4765                 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4766                         >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4767                 val |= I40E_QUEUE_END_OF_LIST
4768                         << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4769                 wr32(hw, I40E_PFINT_LNKLST0, val);
4770
4771                 val = rd32(hw, I40E_QINT_RQCTL(qp));
4772                 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK  |
4773                          I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4774                          I40E_QINT_RQCTL_CAUSE_ENA_MASK  |
4775                          I40E_QINT_RQCTL_INTEVENT_MASK);
4776
4777                 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4778                         I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4779
4780                 wr32(hw, I40E_QINT_RQCTL(qp), val);
4781
4782                 val = rd32(hw, I40E_QINT_TQCTL(qp));
4783
4784                 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK  |
4785                          I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4786                          I40E_QINT_TQCTL_CAUSE_ENA_MASK  |
4787                          I40E_QINT_TQCTL_INTEVENT_MASK);
4788
4789                 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4790                         I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4791
4792                 wr32(hw, I40E_QINT_TQCTL(qp), val);
4793         }
4794 }
4795
4796 /**
4797  * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4798  * @vsi: the VSI being configured
4799  * @v_idx: Index of vector to be freed
4800  *
4801  * This function frees the memory allocated to the q_vector.  In addition if
4802  * NAPI is enabled it will delete any references to the NAPI struct prior
4803  * to freeing the q_vector.
4804  **/
4805 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4806 {
4807         struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4808         struct i40e_ring *ring;
4809
4810         if (!q_vector)
4811                 return;
4812
4813         /* disassociate q_vector from rings */
4814         i40e_for_each_ring(ring, q_vector->tx)
4815                 ring->q_vector = NULL;
4816
4817         i40e_for_each_ring(ring, q_vector->rx)
4818                 ring->q_vector = NULL;
4819
4820         /* only VSI w/ an associated netdev is set up w/ NAPI */
4821         if (vsi->netdev)
4822                 netif_napi_del(&q_vector->napi);
4823
4824         vsi->q_vectors[v_idx] = NULL;
4825
4826         kfree_rcu(q_vector, rcu);
4827 }
4828
4829 /**
4830  * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4831  * @vsi: the VSI being un-configured
4832  *
4833  * This frees the memory allocated to the q_vectors and
4834  * deletes references to the NAPI struct.
4835  **/
4836 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4837 {
4838         int v_idx;
4839
4840         for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4841                 i40e_free_q_vector(vsi, v_idx);
4842 }
4843
4844 /**
4845  * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4846  * @pf: board private structure
4847  **/
4848 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4849 {
4850         /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4851         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4852                 pci_disable_msix(pf->pdev);
4853                 kfree(pf->msix_entries);
4854                 pf->msix_entries = NULL;
4855                 kfree(pf->irq_pile);
4856                 pf->irq_pile = NULL;
4857         } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4858                 pci_disable_msi(pf->pdev);
4859         }
4860         pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4861 }
4862
4863 /**
4864  * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4865  * @pf: board private structure
4866  *
4867  * We go through and clear interrupt specific resources and reset the structure
4868  * to pre-load conditions
4869  **/
4870 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4871 {
4872         int i;
4873
4874         if (test_bit(__I40E_MISC_IRQ_REQUESTED, pf->state))
4875                 i40e_free_misc_vector(pf);
4876
4877         i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4878                       I40E_IWARP_IRQ_PILE_ID);
4879
4880         i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4881         for (i = 0; i < pf->num_alloc_vsi; i++)
4882                 if (pf->vsi[i])
4883                         i40e_vsi_free_q_vectors(pf->vsi[i]);
4884         i40e_reset_interrupt_capability(pf);
4885 }
4886
4887 /**
4888  * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4889  * @vsi: the VSI being configured
4890  **/
4891 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4892 {
4893         int q_idx;
4894
4895         if (!vsi->netdev)
4896                 return;
4897
4898         for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4899                 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4900
4901                 if (q_vector->rx.ring || q_vector->tx.ring)
4902                         napi_enable(&q_vector->napi);
4903         }
4904 }
4905
4906 /**
4907  * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4908  * @vsi: the VSI being configured
4909  **/
4910 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4911 {
4912         int q_idx;
4913
4914         if (!vsi->netdev)
4915                 return;
4916
4917         for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4918                 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4919
4920                 if (q_vector->rx.ring || q_vector->tx.ring)
4921                         napi_disable(&q_vector->napi);
4922         }
4923 }
4924
4925 /**
4926  * i40e_vsi_close - Shut down a VSI
4927  * @vsi: the vsi to be quelled
4928  **/
4929 static void i40e_vsi_close(struct i40e_vsi *vsi)
4930 {
4931         struct i40e_pf *pf = vsi->back;
4932         if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state))
4933                 i40e_down(vsi);
4934         i40e_vsi_free_irq(vsi);
4935         i40e_vsi_free_tx_resources(vsi);
4936         i40e_vsi_free_rx_resources(vsi);
4937         vsi->current_netdev_flags = 0;
4938         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
4939         if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4940                 set_bit(__I40E_CLIENT_RESET, pf->state);
4941 }
4942
4943 /**
4944  * i40e_quiesce_vsi - Pause a given VSI
4945  * @vsi: the VSI being paused
4946  **/
4947 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4948 {
4949         if (test_bit(__I40E_VSI_DOWN, vsi->state))
4950                 return;
4951
4952         set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state);
4953         if (vsi->netdev && netif_running(vsi->netdev))
4954                 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4955         else
4956                 i40e_vsi_close(vsi);
4957 }
4958
4959 /**
4960  * i40e_unquiesce_vsi - Resume a given VSI
4961  * @vsi: the VSI being resumed
4962  **/
4963 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4964 {
4965         if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state))
4966                 return;
4967
4968         if (vsi->netdev && netif_running(vsi->netdev))
4969                 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4970         else
4971                 i40e_vsi_open(vsi);   /* this clears the DOWN bit */
4972 }
4973
4974 /**
4975  * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4976  * @pf: the PF
4977  **/
4978 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4979 {
4980         int v;
4981
4982         for (v = 0; v < pf->num_alloc_vsi; v++) {
4983                 if (pf->vsi[v])
4984                         i40e_quiesce_vsi(pf->vsi[v]);
4985         }
4986 }
4987
4988 /**
4989  * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4990  * @pf: the PF
4991  **/
4992 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4993 {
4994         int v;
4995
4996         for (v = 0; v < pf->num_alloc_vsi; v++) {
4997                 if (pf->vsi[v])
4998                         i40e_unquiesce_vsi(pf->vsi[v]);
4999         }
5000 }
5001
5002 /**
5003  * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
5004  * @vsi: the VSI being configured
5005  *
5006  * Wait until all queues on a given VSI have been disabled.
5007  **/
5008 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
5009 {
5010         struct i40e_pf *pf = vsi->back;
5011         int i, pf_q, ret;
5012
5013         pf_q = vsi->base_queue;
5014         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
5015                 /* Check and wait for the Tx queue */
5016                 ret = i40e_pf_txq_wait(pf, pf_q, false);
5017                 if (ret) {
5018                         dev_info(&pf->pdev->dev,
5019                                  "VSI seid %d Tx ring %d disable timeout\n",
5020                                  vsi->seid, pf_q);
5021                         return ret;
5022                 }
5023
5024                 if (!i40e_enabled_xdp_vsi(vsi))
5025                         goto wait_rx;
5026
5027                 /* Check and wait for the XDP Tx queue */
5028                 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs,
5029                                        false);
5030                 if (ret) {
5031                         dev_info(&pf->pdev->dev,
5032                                  "VSI seid %d XDP Tx ring %d disable timeout\n",
5033                                  vsi->seid, pf_q);
5034                         return ret;
5035                 }
5036 wait_rx:
5037                 /* Check and wait for the Rx queue */
5038                 ret = i40e_pf_rxq_wait(pf, pf_q, false);
5039                 if (ret) {
5040                         dev_info(&pf->pdev->dev,
5041                                  "VSI seid %d Rx ring %d disable timeout\n",
5042                                  vsi->seid, pf_q);
5043                         return ret;
5044                 }
5045         }
5046
5047         return 0;
5048 }
5049
5050 #ifdef CONFIG_I40E_DCB
5051 /**
5052  * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
5053  * @pf: the PF
5054  *
5055  * This function waits for the queues to be in disabled state for all the
5056  * VSIs that are managed by this PF.
5057  **/
5058 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
5059 {
5060         int v, ret = 0;
5061
5062         for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5063                 if (pf->vsi[v]) {
5064                         ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
5065                         if (ret)
5066                                 break;
5067                 }
5068         }
5069
5070         return ret;
5071 }
5072
5073 #endif
5074
5075 /**
5076  * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
5077  * @pf: pointer to PF
5078  *
5079  * Get TC map for ISCSI PF type that will include iSCSI TC
5080  * and LAN TC.
5081  **/
5082 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
5083 {
5084         struct i40e_dcb_app_priority_table app;
5085         struct i40e_hw *hw = &pf->hw;
5086         u8 enabled_tc = 1; /* TC0 is always enabled */
5087         u8 tc, i;
5088         /* Get the iSCSI APP TLV */
5089         struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5090
5091         for (i = 0; i < dcbcfg->numapps; i++) {
5092                 app = dcbcfg->app[i];
5093                 if (app.selector == I40E_APP_SEL_TCPIP &&
5094                     app.protocolid == I40E_APP_PROTOID_ISCSI) {
5095                         tc = dcbcfg->etscfg.prioritytable[app.priority];
5096                         enabled_tc |= BIT(tc);
5097                         break;
5098                 }
5099         }
5100
5101         return enabled_tc;
5102 }
5103
5104 /**
5105  * i40e_dcb_get_num_tc -  Get the number of TCs from DCBx config
5106  * @dcbcfg: the corresponding DCBx configuration structure
5107  *
5108  * Return the number of TCs from given DCBx configuration
5109  **/
5110 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
5111 {
5112         int i, tc_unused = 0;
5113         u8 num_tc = 0;
5114         u8 ret = 0;
5115
5116         /* Scan the ETS Config Priority Table to find
5117          * traffic class enabled for a given priority
5118          * and create a bitmask of enabled TCs
5119          */
5120         for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5121                 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
5122
5123         /* Now scan the bitmask to check for
5124          * contiguous TCs starting with TC0
5125          */
5126         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5127                 if (num_tc & BIT(i)) {
5128                         if (!tc_unused) {
5129                                 ret++;
5130                         } else {
5131                                 pr_err("Non-contiguous TC - Disabling DCB\n");
5132                                 return 1;
5133                         }
5134                 } else {
5135                         tc_unused = 1;
5136                 }
5137         }
5138
5139         /* There is always at least TC0 */
5140         if (!ret)
5141                 ret = 1;
5142
5143         return ret;
5144 }
5145
5146 /**
5147  * i40e_dcb_get_enabled_tc - Get enabled traffic classes
5148  * @dcbcfg: the corresponding DCBx configuration structure
5149  *
5150  * Query the current DCB configuration and return the number of
5151  * traffic classes enabled from the given DCBX config
5152  **/
5153 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
5154 {
5155         u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
5156         u8 enabled_tc = 1;
5157         u8 i;
5158
5159         for (i = 0; i < num_tc; i++)
5160                 enabled_tc |= BIT(i);
5161
5162         return enabled_tc;
5163 }
5164
5165 /**
5166  * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
5167  * @pf: PF being queried
5168  *
5169  * Query the current MQPRIO configuration and return the number of
5170  * traffic classes enabled.
5171  **/
5172 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5173 {
5174         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5175         u8 num_tc = vsi->mqprio_qopt.qopt.num_tc;
5176         u8 enabled_tc = 1, i;
5177
5178         for (i = 1; i < num_tc; i++)
5179                 enabled_tc |= BIT(i);
5180         return enabled_tc;
5181 }
5182
5183 /**
5184  * i40e_pf_get_num_tc - Get enabled traffic classes for PF
5185  * @pf: PF being queried
5186  *
5187  * Return number of traffic classes enabled for the given PF
5188  **/
5189 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5190 {
5191         struct i40e_hw *hw = &pf->hw;
5192         u8 i, enabled_tc = 1;
5193         u8 num_tc = 0;
5194         struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5195
5196         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5197                 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc;
5198
5199         /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5200         if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5201                 return 1;
5202
5203         /* SFP mode will be enabled for all TCs on port */
5204         if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5205                 return i40e_dcb_get_num_tc(dcbcfg);
5206
5207         /* MFP mode return count of enabled TCs for this PF */
5208         if (pf->hw.func_caps.iscsi)
5209                 enabled_tc =  i40e_get_iscsi_tc_map(pf);
5210         else
5211                 return 1; /* Only TC0 */
5212
5213         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5214                 if (enabled_tc & BIT(i))
5215                         num_tc++;
5216         }
5217         return num_tc;
5218 }
5219
5220 /**
5221  * i40e_pf_get_tc_map - Get bitmap for enabled traffic classes
5222  * @pf: PF being queried
5223  *
5224  * Return a bitmap for enabled traffic classes for this PF.
5225  **/
5226 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5227 {
5228         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5229                 return i40e_mqprio_get_enabled_tc(pf);
5230
5231         /* If neither MQPRIO nor DCB is enabled for this PF then just return
5232          * default TC
5233          */
5234         if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5235                 return I40E_DEFAULT_TRAFFIC_CLASS;
5236
5237         /* SFP mode we want PF to be enabled for all TCs */
5238         if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5239                 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
5240
5241         /* MFP enabled and iSCSI PF type */
5242         if (pf->hw.func_caps.iscsi)
5243                 return i40e_get_iscsi_tc_map(pf);
5244         else
5245                 return I40E_DEFAULT_TRAFFIC_CLASS;
5246 }
5247
5248 /**
5249  * i40e_vsi_get_bw_info - Query VSI BW Information
5250  * @vsi: the VSI being queried
5251  *
5252  * Returns 0 on success, negative value on failure
5253  **/
5254 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
5255 {
5256         struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
5257         struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5258         struct i40e_pf *pf = vsi->back;
5259         struct i40e_hw *hw = &pf->hw;
5260         i40e_status ret;
5261         u32 tc_bw_max;
5262         int i;
5263
5264         /* Get the VSI level BW configuration */
5265         ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
5266         if (ret) {
5267                 dev_info(&pf->pdev->dev,
5268                          "couldn't get PF vsi bw config, err %s aq_err %s\n",
5269                          i40e_stat_str(&pf->hw, ret),
5270                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5271                 return -EINVAL;
5272         }
5273
5274         /* Get the VSI level BW configuration per TC */
5275         ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
5276                                                NULL);
5277         if (ret) {
5278                 dev_info(&pf->pdev->dev,
5279                          "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
5280                          i40e_stat_str(&pf->hw, ret),
5281                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5282                 return -EINVAL;
5283         }
5284
5285         if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
5286                 dev_info(&pf->pdev->dev,
5287                          "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5288                          bw_config.tc_valid_bits,
5289                          bw_ets_config.tc_valid_bits);
5290                 /* Still continuing */
5291         }
5292
5293         vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
5294         vsi->bw_max_quanta = bw_config.max_bw;
5295         tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
5296                     (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
5297         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5298                 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
5299                 vsi->bw_ets_limit_credits[i] =
5300                                         le16_to_cpu(bw_ets_config.credits[i]);
5301                 /* 3 bits out of 4 for each TC */
5302                 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
5303         }
5304
5305         return 0;
5306 }
5307
5308 /**
5309  * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5310  * @vsi: the VSI being configured
5311  * @enabled_tc: TC bitmap
5312  * @bw_share: BW shared credits per TC
5313  *
5314  * Returns 0 on success, negative value on failure
5315  **/
5316 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
5317                                        u8 *bw_share)
5318 {
5319         struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5320         struct i40e_pf *pf = vsi->back;
5321         i40e_status ret;
5322         int i;
5323
5324         /* There is no need to reset BW when mqprio mode is on.  */
5325         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5326                 return 0;
5327         if (!vsi->mqprio_qopt.qopt.hw && !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5328                 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);
5329                 if (ret)
5330                         dev_info(&pf->pdev->dev,
5331                                  "Failed to reset tx rate for vsi->seid %u\n",
5332                                  vsi->seid);
5333                 return ret;
5334         }
5335         memset(&bw_data, 0, sizeof(bw_data));
5336         bw_data.tc_valid_bits = enabled_tc;
5337         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5338                 bw_data.tc_bw_credits[i] = bw_share[i];
5339
5340         ret = i40e_aq_config_vsi_tc_bw(&pf->hw, vsi->seid, &bw_data, NULL);
5341         if (ret) {
5342                 dev_info(&pf->pdev->dev,
5343                          "AQ command Config VSI BW allocation per TC failed = %d\n",
5344                          pf->hw.aq.asq_last_status);
5345                 return -EINVAL;
5346         }
5347
5348         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5349                 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
5350
5351         return 0;
5352 }
5353
5354 /**
5355  * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5356  * @vsi: the VSI being configured
5357  * @enabled_tc: TC map to be enabled
5358  *
5359  **/
5360 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5361 {
5362         struct net_device *netdev = vsi->netdev;
5363         struct i40e_pf *pf = vsi->back;
5364         struct i40e_hw *hw = &pf->hw;
5365         u8 netdev_tc = 0;
5366         int i;
5367         struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5368
5369         if (!netdev)
5370                 return;
5371
5372         if (!enabled_tc) {
5373                 netdev_reset_tc(netdev);
5374                 return;
5375         }
5376
5377         /* Set up actual enabled TCs on the VSI */
5378         if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5379                 return;
5380
5381         /* set per TC queues for the VSI */
5382         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5383                 /* Only set TC queues for enabled tcs
5384                  *
5385                  * e.g. For a VSI that has TC0 and TC3 enabled the
5386                  * enabled_tc bitmap would be 0x00001001; the driver
5387                  * will set the numtc for netdev as 2 that will be
5388                  * referenced by the netdev layer as TC 0 and 1.
5389                  */
5390                 if (vsi->tc_config.enabled_tc & BIT(i))
5391                         netdev_set_tc_queue(netdev,
5392                                         vsi->tc_config.tc_info[i].netdev_tc,
5393                                         vsi->tc_config.tc_info[i].qcount,
5394                                         vsi->tc_config.tc_info[i].qoffset);
5395         }
5396
5397         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5398                 return;
5399
5400         /* Assign UP2TC map for the VSI */
5401         for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5402                 /* Get the actual TC# for the UP */
5403                 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5404                 /* Get the mapped netdev TC# for the UP */
5405                 netdev_tc =  vsi->tc_config.tc_info[ets_tc].netdev_tc;
5406                 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5407         }
5408 }
5409
5410 /**
5411  * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5412  * @vsi: the VSI being configured
5413  * @ctxt: the ctxt buffer returned from AQ VSI update param command
5414  **/
5415 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5416                                       struct i40e_vsi_context *ctxt)
5417 {
5418         /* copy just the sections touched not the entire info
5419          * since not all sections are valid as returned by
5420          * update vsi params
5421          */
5422         vsi->info.mapping_flags = ctxt->info.mapping_flags;
5423         memcpy(&vsi->info.queue_mapping,
5424                &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5425         memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5426                sizeof(vsi->info.tc_mapping));
5427 }
5428
5429 /**
5430  * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5431  * @vsi: VSI to be configured
5432  * @enabled_tc: TC bitmap
5433  *
5434  * This configures a particular VSI for TCs that are mapped to the
5435  * given TC bitmap. It uses default bandwidth share for TCs across
5436  * VSIs to configure TC for a particular VSI.
5437  *
5438  * NOTE:
5439  * It is expected that the VSI queues have been quisced before calling
5440  * this function.
5441  **/
5442 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5443 {
5444         u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5445         struct i40e_pf *pf = vsi->back;
5446         struct i40e_hw *hw = &pf->hw;
5447         struct i40e_vsi_context ctxt;
5448         int ret = 0;
5449         int i;
5450
5451         /* Check if enabled_tc is same as existing or new TCs */
5452         if (vsi->tc_config.enabled_tc == enabled_tc &&
5453             vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
5454                 return ret;
5455
5456         /* Enable ETS TCs with equal BW Share for now across all VSIs */
5457         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5458                 if (enabled_tc & BIT(i))
5459                         bw_share[i] = 1;
5460         }
5461
5462         ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5463         if (ret) {
5464                 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5465
5466                 dev_info(&pf->pdev->dev,
5467                          "Failed configuring TC map %d for VSI %d\n",
5468                          enabled_tc, vsi->seid);
5469                 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid,
5470                                                   &bw_config, NULL);
5471                 if (ret) {
5472                         dev_info(&pf->pdev->dev,
5473                                  "Failed querying vsi bw info, err %s aq_err %s\n",
5474                                  i40e_stat_str(hw, ret),
5475                                  i40e_aq_str(hw, hw->aq.asq_last_status));
5476                         goto out;
5477                 }
5478                 if ((bw_config.tc_valid_bits & enabled_tc) != enabled_tc) {
5479                         u8 valid_tc = bw_config.tc_valid_bits & enabled_tc;
5480
5481                         if (!valid_tc)
5482                                 valid_tc = bw_config.tc_valid_bits;
5483                         /* Always enable TC0, no matter what */
5484                         valid_tc |= 1;
5485                         dev_info(&pf->pdev->dev,
5486                                  "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n",
5487                                  enabled_tc, bw_config.tc_valid_bits, valid_tc);
5488                         enabled_tc = valid_tc;
5489                 }
5490
5491                 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5492                 if (ret) {
5493                         dev_err(&pf->pdev->dev,
5494                                 "Unable to  configure TC map %d for VSI %d\n",
5495                                 enabled_tc, vsi->seid);
5496                         goto out;
5497                 }
5498         }
5499
5500         /* Update Queue Pairs Mapping for currently enabled UPs */
5501         ctxt.seid = vsi->seid;
5502         ctxt.pf_num = vsi->back->hw.pf_id;
5503         ctxt.vf_num = 0;
5504         ctxt.uplink_seid = vsi->uplink_seid;
5505         ctxt.info = vsi->info;
5506         if (vsi->back->flags & I40E_FLAG_TC_MQPRIO) {
5507                 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc);
5508                 if (ret)
5509                         goto out;
5510         } else {
5511                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5512         }
5513
5514         /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5515          * queues changed.
5516          */
5517         if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {
5518                 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size,
5519                                       vsi->num_queue_pairs);
5520                 ret = i40e_vsi_config_rss(vsi);
5521                 if (ret) {
5522                         dev_info(&vsi->back->pdev->dev,
5523                                  "Failed to reconfig rss for num_queues\n");
5524                         return ret;
5525                 }
5526                 vsi->reconfig_rss = false;
5527         }
5528         if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5529                 ctxt.info.valid_sections |=
5530                                 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5531                 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5532         }
5533
5534         /* Update the VSI after updating the VSI queue-mapping
5535          * information
5536          */
5537         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5538         if (ret) {
5539                 dev_info(&pf->pdev->dev,
5540                          "Update vsi tc config failed, err %s aq_err %s\n",
5541                          i40e_stat_str(hw, ret),
5542                          i40e_aq_str(hw, hw->aq.asq_last_status));
5543                 goto out;
5544         }
5545         /* update the local VSI info with updated queue map */
5546         i40e_vsi_update_queue_map(vsi, &ctxt);
5547         vsi->info.valid_sections = 0;
5548
5549         /* Update current VSI BW information */
5550         ret = i40e_vsi_get_bw_info(vsi);
5551         if (ret) {
5552                 dev_info(&pf->pdev->dev,
5553                          "Failed updating vsi bw info, err %s aq_err %s\n",
5554                          i40e_stat_str(hw, ret),
5555                          i40e_aq_str(hw, hw->aq.asq_last_status));
5556                 goto out;
5557         }
5558
5559         /* Update the netdev TC setup */
5560         i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5561 out:
5562         return ret;
5563 }
5564
5565 /**
5566  * i40e_get_link_speed - Returns link speed for the interface
5567  * @vsi: VSI to be configured
5568  *
5569  **/
5570 static int i40e_get_link_speed(struct i40e_vsi *vsi)
5571 {
5572         struct i40e_pf *pf = vsi->back;
5573
5574         switch (pf->hw.phy.link_info.link_speed) {
5575         case I40E_LINK_SPEED_40GB:
5576                 return 40000;
5577         case I40E_LINK_SPEED_25GB:
5578                 return 25000;
5579         case I40E_LINK_SPEED_20GB:
5580                 return 20000;
5581         case I40E_LINK_SPEED_10GB:
5582                 return 10000;
5583         case I40E_LINK_SPEED_1GB:
5584                 return 1000;
5585         default:
5586                 return -EINVAL;
5587         }
5588 }
5589
5590 /**
5591  * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5592  * @vsi: VSI to be configured
5593  * @seid: seid of the channel/VSI
5594  * @max_tx_rate: max TX rate to be configured as BW limit
5595  *
5596  * Helper function to set BW limit for a given VSI
5597  **/
5598 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
5599 {
5600         struct i40e_pf *pf = vsi->back;
5601         u64 credits = 0;
5602         int speed = 0;
5603         int ret = 0;
5604
5605         speed = i40e_get_link_speed(vsi);
5606         if (max_tx_rate > speed) {
5607                 dev_err(&pf->pdev->dev,
5608                         "Invalid max tx rate %llu specified for VSI seid %d.",
5609                         max_tx_rate, seid);
5610                 return -EINVAL;
5611         }
5612         if (max_tx_rate && max_tx_rate < 50) {
5613                 dev_warn(&pf->pdev->dev,
5614                          "Setting max tx rate to minimum usable value of 50Mbps.\n");
5615                 max_tx_rate = 50;
5616         }
5617
5618         /* Tx rate credits are in values of 50Mbps, 0 is disabled */
5619         credits = max_tx_rate;
5620         do_div(credits, I40E_BW_CREDIT_DIVISOR);
5621         ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits,
5622                                           I40E_MAX_BW_INACTIVE_ACCUM, NULL);
5623         if (ret)
5624                 dev_err(&pf->pdev->dev,
5625                         "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %s aq_err %s\n",
5626                         max_tx_rate, seid, i40e_stat_str(&pf->hw, ret),
5627                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5628         return ret;
5629 }
5630
5631 /**
5632  * i40e_remove_queue_channels - Remove queue channels for the TCs
5633  * @vsi: VSI to be configured
5634  *
5635  * Remove queue channels for the TCs
5636  **/
5637 static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
5638 {
5639         enum i40e_admin_queue_err last_aq_status;
5640         struct i40e_cloud_filter *cfilter;
5641         struct i40e_channel *ch, *ch_tmp;
5642         struct i40e_pf *pf = vsi->back;
5643         struct hlist_node *node;
5644         int ret, i;
5645
5646         /* Reset rss size that was stored when reconfiguring rss for
5647          * channel VSIs with non-power-of-2 queue count.
5648          */
5649         vsi->current_rss_size = 0;
5650
5651         /* perform cleanup for channels if they exist */
5652         if (list_empty(&vsi->ch_list))
5653                 return;
5654
5655         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5656                 struct i40e_vsi *p_vsi;
5657
5658                 list_del(&ch->list);
5659                 p_vsi = ch->parent_vsi;
5660                 if (!p_vsi || !ch->initialized) {
5661                         kfree(ch);
5662                         continue;
5663                 }
5664                 /* Reset queue contexts */
5665                 for (i = 0; i < ch->num_queue_pairs; i++) {
5666                         struct i40e_ring *tx_ring, *rx_ring;
5667                         u16 pf_q;
5668
5669                         pf_q = ch->base_queue + i;
5670                         tx_ring = vsi->tx_rings[pf_q];
5671                         tx_ring->ch = NULL;
5672
5673                         rx_ring = vsi->rx_rings[pf_q];
5674                         rx_ring->ch = NULL;
5675                 }
5676
5677                 /* Reset BW configured for this VSI via mqprio */
5678                 ret = i40e_set_bw_limit(vsi, ch->seid, 0);
5679                 if (ret)
5680                         dev_info(&vsi->back->pdev->dev,
5681                                  "Failed to reset tx rate for ch->seid %u\n",
5682                                  ch->seid);
5683
5684                 /* delete cloud filters associated with this channel */
5685                 hlist_for_each_entry_safe(cfilter, node,
5686                                           &pf->cloud_filter_list, cloud_node) {
5687                         if (cfilter->seid != ch->seid)
5688                                 continue;
5689
5690                         hash_del(&cfilter->cloud_node);
5691                         if (cfilter->dst_port)
5692                                 ret = i40e_add_del_cloud_filter_big_buf(vsi,
5693                                                                         cfilter,
5694                                                                         false);
5695                         else
5696                                 ret = i40e_add_del_cloud_filter(vsi, cfilter,
5697                                                                 false);
5698                         last_aq_status = pf->hw.aq.asq_last_status;
5699                         if (ret)
5700                                 dev_info(&pf->pdev->dev,
5701                                          "Failed to delete cloud filter, err %s aq_err %s\n",
5702                                          i40e_stat_str(&pf->hw, ret),
5703                                          i40e_aq_str(&pf->hw, last_aq_status));
5704                         kfree(cfilter);
5705                 }
5706
5707                 /* delete VSI from FW */
5708                 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
5709                                              NULL);
5710                 if (ret)
5711                         dev_err(&vsi->back->pdev->dev,
5712                                 "unable to remove channel (%d) for parent VSI(%d)\n",
5713                                 ch->seid, p_vsi->seid);
5714                 kfree(ch);
5715         }
5716         INIT_LIST_HEAD(&vsi->ch_list);
5717 }
5718
5719 /**
5720  * i40e_is_any_channel - channel exist or not
5721  * @vsi: ptr to VSI to which channels are associated with
5722  *
5723  * Returns true or false if channel(s) exist for associated VSI or not
5724  **/
5725 static bool i40e_is_any_channel(struct i40e_vsi *vsi)
5726 {
5727         struct i40e_channel *ch, *ch_tmp;
5728
5729         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5730                 if (ch->initialized)
5731                         return true;
5732         }
5733
5734         return false;
5735 }
5736
5737 /**
5738  * i40e_get_max_queues_for_channel
5739  * @vsi: ptr to VSI to which channels are associated with
5740  *
5741  * Helper function which returns max value among the queue counts set on the
5742  * channels/TCs created.
5743  **/
5744 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi)
5745 {
5746         struct i40e_channel *ch, *ch_tmp;
5747         int max = 0;
5748
5749         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5750                 if (!ch->initialized)
5751                         continue;
5752                 if (ch->num_queue_pairs > max)
5753                         max = ch->num_queue_pairs;
5754         }
5755
5756         return max;
5757 }
5758
5759 /**
5760  * i40e_validate_num_queues - validate num_queues w.r.t channel
5761  * @pf: ptr to PF device
5762  * @num_queues: number of queues
5763  * @vsi: the parent VSI
5764  * @reconfig_rss: indicates should the RSS be reconfigured or not
5765  *
5766  * This function validates number of queues in the context of new channel
5767  * which is being established and determines if RSS should be reconfigured
5768  * or not for parent VSI.
5769  **/
5770 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
5771                                     struct i40e_vsi *vsi, bool *reconfig_rss)
5772 {
5773         int max_ch_queues;
5774
5775         if (!reconfig_rss)
5776                 return -EINVAL;
5777
5778         *reconfig_rss = false;
5779         if (vsi->current_rss_size) {
5780                 if (num_queues > vsi->current_rss_size) {
5781                         dev_dbg(&pf->pdev->dev,
5782                                 "Error: num_queues (%d) > vsi's current_size(%d)\n",
5783                                 num_queues, vsi->current_rss_size);
5784                         return -EINVAL;
5785                 } else if ((num_queues < vsi->current_rss_size) &&
5786                            (!is_power_of_2(num_queues))) {
5787                         dev_dbg(&pf->pdev->dev,
5788                                 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
5789                                 num_queues, vsi->current_rss_size);
5790                         return -EINVAL;
5791                 }
5792         }
5793
5794         if (!is_power_of_2(num_queues)) {
5795                 /* Find the max num_queues configured for channel if channel
5796                  * exist.
5797                  * if channel exist, then enforce 'num_queues' to be more than
5798                  * max ever queues configured for channel.
5799                  */
5800                 max_ch_queues = i40e_get_max_queues_for_channel(vsi);
5801                 if (num_queues < max_ch_queues) {
5802                         dev_dbg(&pf->pdev->dev,
5803                                 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
5804                                 num_queues, max_ch_queues);
5805                         return -EINVAL;
5806                 }
5807                 *reconfig_rss = true;
5808         }
5809
5810         return 0;
5811 }
5812
5813 /**
5814  * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
5815  * @vsi: the VSI being setup
5816  * @rss_size: size of RSS, accordingly LUT gets reprogrammed
5817  *
5818  * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
5819  **/
5820 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)
5821 {
5822         struct i40e_pf *pf = vsi->back;
5823         u8 seed[I40E_HKEY_ARRAY_SIZE];
5824         struct i40e_hw *hw = &pf->hw;
5825         int local_rss_size;
5826         u8 *lut;
5827         int ret;
5828
5829         if (!vsi->rss_size)
5830                 return -EINVAL;
5831
5832         if (rss_size > vsi->rss_size)
5833                 return -EINVAL;
5834
5835         local_rss_size = min_t(int, vsi->rss_size, rss_size);
5836         lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
5837         if (!lut)
5838                 return -ENOMEM;
5839
5840         /* Ignoring user configured lut if there is one */
5841         i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size);
5842
5843         /* Use user configured hash key if there is one, otherwise
5844          * use default.
5845          */
5846         if (vsi->rss_hkey_user)
5847                 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
5848         else
5849                 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
5850
5851         ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
5852         if (ret) {
5853                 dev_info(&pf->pdev->dev,
5854                          "Cannot set RSS lut, err %s aq_err %s\n",
5855                          i40e_stat_str(hw, ret),
5856                          i40e_aq_str(hw, hw->aq.asq_last_status));
5857                 kfree(lut);
5858                 return ret;
5859         }
5860         kfree(lut);
5861
5862         /* Do the update w.r.t. storing rss_size */
5863         if (!vsi->orig_rss_size)
5864                 vsi->orig_rss_size = vsi->rss_size;
5865         vsi->current_rss_size = local_rss_size;
5866
5867         return ret;
5868 }
5869
5870 /**
5871  * i40e_channel_setup_queue_map - Setup a channel queue map
5872  * @pf: ptr to PF device
5873  * @ctxt: VSI context structure
5874  * @ch: ptr to channel structure
5875  *
5876  * Setup queue map for a specific channel
5877  **/
5878 static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
5879                                          struct i40e_vsi_context *ctxt,
5880                                          struct i40e_channel *ch)
5881 {
5882         u16 qcount, qmap, sections = 0;
5883         u8 offset = 0;
5884         int pow;
5885
5886         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
5887         sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
5888
5889         qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
5890         ch->num_queue_pairs = qcount;
5891
5892         /* find the next higher power-of-2 of num queue pairs */
5893         pow = ilog2(qcount);
5894         if (!is_power_of_2(qcount))
5895                 pow++;
5896
5897         qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
5898                 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
5899
5900         /* Setup queue TC[0].qmap for given VSI context */
5901         ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
5902
5903         ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */
5904         ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
5905         ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue);
5906         ctxt->info.valid_sections |= cpu_to_le16(sections);
5907 }
5908
5909 /**
5910  * i40e_add_channel - add a channel by adding VSI
5911  * @pf: ptr to PF device
5912  * @uplink_seid: underlying HW switching element (VEB) ID
5913  * @ch: ptr to channel structure
5914  *
5915  * Add a channel (VSI) using add_vsi and queue_map
5916  **/
5917 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
5918                             struct i40e_channel *ch)
5919 {
5920         struct i40e_hw *hw = &pf->hw;
5921         struct i40e_vsi_context ctxt;
5922         u8 enabled_tc = 0x1; /* TC0 enabled */
5923         int ret;
5924
5925         if (ch->type != I40E_VSI_VMDQ2) {
5926                 dev_info(&pf->pdev->dev,
5927                          "add new vsi failed, ch->type %d\n", ch->type);
5928                 return -EINVAL;
5929         }
5930
5931         memset(&ctxt, 0, sizeof(ctxt));
5932         ctxt.pf_num = hw->pf_id;
5933         ctxt.vf_num = 0;
5934         ctxt.uplink_seid = uplink_seid;
5935         ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
5936         if (ch->type == I40E_VSI_VMDQ2)
5937                 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
5938
5939         if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) {
5940                 ctxt.info.valid_sections |=
5941                      cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
5942                 ctxt.info.switch_id =
5943                    cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
5944         }
5945
5946         /* Set queue map for a given VSI context */
5947         i40e_channel_setup_queue_map(pf, &ctxt, ch);
5948
5949         /* Now time to create VSI */
5950         ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
5951         if (ret) {
5952                 dev_info(&pf->pdev->dev,
5953                          "add new vsi failed, err %s aq_err %s\n",
5954                          i40e_stat_str(&pf->hw, ret),
5955                          i40e_aq_str(&pf->hw,
5956                                      pf->hw.aq.asq_last_status));
5957                 return -ENOENT;
5958         }
5959
5960         /* Success, update channel, set enabled_tc only if the channel
5961          * is not a macvlan
5962          */
5963         ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc;
5964         ch->seid = ctxt.seid;
5965         ch->vsi_number = ctxt.vsi_number;
5966         ch->stat_counter_idx = le16_to_cpu(ctxt.info.stat_counter_idx);
5967
5968         /* copy just the sections touched not the entire info
5969          * since not all sections are valid as returned by
5970          * update vsi params
5971          */
5972         ch->info.mapping_flags = ctxt.info.mapping_flags;
5973         memcpy(&ch->info.queue_mapping,
5974                &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping));
5975         memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping,
5976                sizeof(ctxt.info.tc_mapping));
5977
5978         return 0;
5979 }
5980
5981 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch,
5982                                   u8 *bw_share)
5983 {
5984         struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5985         i40e_status ret;
5986         int i;
5987
5988         memset(&bw_data, 0, sizeof(bw_data));
5989         bw_data.tc_valid_bits = ch->enabled_tc;
5990         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5991                 bw_data.tc_bw_credits[i] = bw_share[i];
5992
5993         ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid,
5994                                        &bw_data, NULL);
5995         if (ret) {
5996                 dev_info(&vsi->back->pdev->dev,
5997                          "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
5998                          vsi->back->hw.aq.asq_last_status, ch->seid);
5999                 return -EINVAL;
6000         }
6001
6002         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6003                 ch->info.qs_handle[i] = bw_data.qs_handles[i];
6004
6005         return 0;
6006 }
6007
6008 /**
6009  * i40e_channel_config_tx_ring - config TX ring associated with new channel
6010  * @pf: ptr to PF device
6011  * @vsi: the VSI being setup
6012  * @ch: ptr to channel structure
6013  *
6014  * Configure TX rings associated with channel (VSI) since queues are being
6015  * from parent VSI.
6016  **/
6017 static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
6018                                        struct i40e_vsi *vsi,
6019                                        struct i40e_channel *ch)
6020 {
6021         i40e_status ret;
6022         int i;
6023         u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
6024
6025         /* Enable ETS TCs with equal BW Share for now across all VSIs */
6026         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6027                 if (ch->enabled_tc & BIT(i))
6028                         bw_share[i] = 1;
6029         }
6030
6031         /* configure BW for new VSI */
6032         ret = i40e_channel_config_bw(vsi, ch, bw_share);
6033         if (ret) {
6034                 dev_info(&vsi->back->pdev->dev,
6035                          "Failed configuring TC map %d for channel (seid %u)\n",
6036                          ch->enabled_tc, ch->seid);
6037                 return ret;
6038         }
6039
6040         for (i = 0; i < ch->num_queue_pairs; i++) {
6041                 struct i40e_ring *tx_ring, *rx_ring;
6042                 u16 pf_q;
6043
6044                 pf_q = ch->base_queue + i;
6045
6046                 /* Get to TX ring ptr of main VSI, for re-setup TX queue
6047                  * context
6048                  */
6049                 tx_ring = vsi->tx_rings[pf_q];
6050                 tx_ring->ch = ch;
6051
6052                 /* Get the RX ring ptr */
6053                 rx_ring = vsi->rx_rings[pf_q];
6054                 rx_ring->ch = ch;
6055         }
6056
6057         return 0;
6058 }
6059
6060 /**
6061  * i40e_setup_hw_channel - setup new channel
6062  * @pf: ptr to PF device
6063  * @vsi: the VSI being setup
6064  * @ch: ptr to channel structure
6065  * @uplink_seid: underlying HW switching element (VEB) ID
6066  * @type: type of channel to be created (VMDq2/VF)
6067  *
6068  * Setup new channel (VSI) based on specified type (VMDq2/VF)
6069  * and configures TX rings accordingly
6070  **/
6071 static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
6072                                         struct i40e_vsi *vsi,
6073                                         struct i40e_channel *ch,
6074                                         u16 uplink_seid, u8 type)
6075 {
6076         int ret;
6077
6078         ch->initialized = false;
6079         ch->base_queue = vsi->next_base_queue;
6080         ch->type = type;
6081
6082         /* Proceed with creation of channel (VMDq2) VSI */
6083         ret = i40e_add_channel(pf, uplink_seid, ch);
6084         if (ret) {
6085                 dev_info(&pf->pdev->dev,
6086                          "failed to add_channel using uplink_seid %u\n",
6087                          uplink_seid);
6088                 return ret;
6089         }
6090
6091         /* Mark the successful creation of channel */
6092         ch->initialized = true;
6093
6094         /* Reconfigure TX queues using QTX_CTL register */
6095         ret = i40e_channel_config_tx_ring(pf, vsi, ch);
6096         if (ret) {
6097                 dev_info(&pf->pdev->dev,
6098                          "failed to configure TX rings for channel %u\n",
6099                          ch->seid);
6100                 return ret;
6101         }
6102
6103         /* update 'next_base_queue' */
6104         vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs;
6105         dev_dbg(&pf->pdev->dev,
6106                 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
6107                 ch->seid, ch->vsi_number, ch->stat_counter_idx,
6108                 ch->num_queue_pairs,
6109                 vsi->next_base_queue);
6110         return ret;
6111 }
6112
6113 /**
6114  * i40e_setup_channel - setup new channel using uplink element
6115  * @pf: ptr to PF device
6116  * @vsi: pointer to the VSI to set up the channel within
6117  * @ch: ptr to channel structure
6118  *
6119  * Setup new channel (VSI) based on specified type (VMDq2/VF)
6120  * and uplink switching element (uplink_seid)
6121  **/
6122 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
6123                                struct i40e_channel *ch)
6124 {
6125         u8 vsi_type;
6126         u16 seid;
6127         int ret;
6128
6129         if (vsi->type == I40E_VSI_MAIN) {
6130                 vsi_type = I40E_VSI_VMDQ2;
6131         } else {
6132                 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
6133                         vsi->type);
6134                 return false;
6135         }
6136
6137         /* underlying switching element */
6138         seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6139
6140         /* create channel (VSI), configure TX rings */
6141         ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type);
6142         if (ret) {
6143                 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6144                 return false;
6145         }
6146
6147         return ch->initialized ? true : false;
6148 }
6149
6150 /**
6151  * i40e_validate_and_set_switch_mode - sets up switch mode correctly
6152  * @vsi: ptr to VSI which has PF backing
6153  *
6154  * Sets up switch mode correctly if it needs to be changed and perform
6155  * what are allowed modes.
6156  **/
6157 static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
6158 {
6159         u8 mode;
6160         struct i40e_pf *pf = vsi->back;
6161         struct i40e_hw *hw = &pf->hw;
6162         int ret;
6163
6164         ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);
6165         if (ret)
6166                 return -EINVAL;
6167
6168         if (hw->dev_caps.switch_mode) {
6169                 /* if switch mode is set, support mode2 (non-tunneled for
6170                  * cloud filter) for now
6171                  */
6172                 u32 switch_mode = hw->dev_caps.switch_mode &
6173                                   I40E_SWITCH_MODE_MASK;
6174                 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) {
6175                         if (switch_mode == I40E_CLOUD_FILTER_MODE2)
6176                                 return 0;
6177                         dev_err(&pf->pdev->dev,
6178                                 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
6179                                 hw->dev_caps.switch_mode);
6180                         return -EINVAL;
6181                 }
6182         }
6183
6184         /* Set Bit 7 to be valid */
6185         mode = I40E_AQ_SET_SWITCH_BIT7_VALID;
6186
6187         /* Set L4type for TCP support */
6188         mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP;
6189
6190         /* Set cloud filter mode */
6191         mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;
6192
6193         /* Prep mode field for set_switch_config */
6194         ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
6195                                         pf->last_sw_conf_valid_flags,
6196                                         mode, NULL);
6197         if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH)
6198                 dev_err(&pf->pdev->dev,
6199                         "couldn't set switch config bits, err %s aq_err %s\n",
6200                         i40e_stat_str(hw, ret),
6201                         i40e_aq_str(hw,
6202                                     hw->aq.asq_last_status));
6203
6204         return ret;
6205 }
6206
6207 /**
6208  * i40e_create_queue_channel - function to create channel
6209  * @vsi: VSI to be configured
6210  * @ch: ptr to channel (it contains channel specific params)
6211  *
6212  * This function creates channel (VSI) using num_queues specified by user,
6213  * reconfigs RSS if needed.
6214  **/
6215 int i40e_create_queue_channel(struct i40e_vsi *vsi,
6216                               struct i40e_channel *ch)
6217 {
6218         struct i40e_pf *pf = vsi->back;
6219         bool reconfig_rss;
6220         int err;
6221
6222         if (!ch)
6223                 return -EINVAL;
6224
6225         if (!ch->num_queue_pairs) {
6226                 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6227                         ch->num_queue_pairs);
6228                 return -EINVAL;
6229         }
6230
6231         /* validate user requested num_queues for channel */
6232         err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi,
6233                                        &reconfig_rss);
6234         if (err) {
6235                 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6236                          ch->num_queue_pairs);
6237                 return -EINVAL;
6238         }
6239
6240         /* By default we are in VEPA mode, if this is the first VF/VMDq
6241          * VSI to be added switch to VEB mode.
6242          */
6243         if ((!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) ||
6244             (!i40e_is_any_channel(vsi))) {
6245                 if (!is_power_of_2(vsi->tc_config.tc_info[0].qcount)) {
6246                         dev_dbg(&pf->pdev->dev,
6247                                 "Failed to create channel. Override queues (%u) not power of 2\n",
6248                                 vsi->tc_config.tc_info[0].qcount);
6249                         return -EINVAL;
6250                 }
6251
6252                 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
6253                         pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
6254
6255                         if (vsi->type == I40E_VSI_MAIN) {
6256                                 if (pf->flags & I40E_FLAG_TC_MQPRIO)
6257                                         i40e_do_reset(pf, I40E_PF_RESET_FLAG,
6258                                                       true);
6259                                 else
6260                                         i40e_do_reset_safe(pf,
6261                                                            I40E_PF_RESET_FLAG);
6262                         }
6263                 }
6264                 /* now onwards for main VSI, number of queues will be value
6265                  * of TC0's queue count
6266                  */
6267         }
6268
6269         /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6270          * it should be more than num_queues
6271          */
6272         if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) {
6273                 dev_dbg(&pf->pdev->dev,
6274                         "Error: cnt_q_avail (%u) less than num_queues %d\n",
6275                         vsi->cnt_q_avail, ch->num_queue_pairs);
6276                 return -EINVAL;
6277         }
6278
6279         /* reconfig_rss only if vsi type is MAIN_VSI */
6280         if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) {
6281                 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs);
6282                 if (err) {
6283                         dev_info(&pf->pdev->dev,
6284                                  "Error: unable to reconfig rss for num_queues (%u)\n",
6285                                  ch->num_queue_pairs);
6286                         return -EINVAL;
6287                 }
6288         }
6289
6290         if (!i40e_setup_channel(pf, vsi, ch)) {
6291                 dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6292                 return -EINVAL;
6293         }
6294
6295         dev_info(&pf->pdev->dev,
6296                  "Setup channel (id:%u) utilizing num_queues %d\n",
6297                  ch->seid, ch->num_queue_pairs);
6298
6299         /* configure VSI for BW limit */
6300         if (ch->max_tx_rate) {
6301                 u64 credits = ch->max_tx_rate;
6302
6303                 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate))
6304                         return -EINVAL;
6305
6306                 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6307                 dev_dbg(&pf->pdev->dev,
6308                         "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6309                         ch->max_tx_rate,
6310                         credits,
6311                         ch->seid);
6312         }
6313
6314         /* in case of VF, this will be main SRIOV VSI */
6315         ch->parent_vsi = vsi;
6316
6317         /* and update main_vsi's count for queue_available to use */
6318         vsi->cnt_q_avail -= ch->num_queue_pairs;
6319
6320         return 0;
6321 }
6322
6323 /**
6324  * i40e_configure_queue_channels - Add queue channel for the given TCs
6325  * @vsi: VSI to be configured
6326  *
6327  * Configures queue channel mapping to the given TCs
6328  **/
6329 static int i40e_configure_queue_channels(struct i40e_vsi *vsi)
6330 {
6331         struct i40e_channel *ch;
6332         u64 max_rate = 0;
6333         int ret = 0, i;
6334
6335         /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6336         vsi->tc_seid_map[0] = vsi->seid;
6337         for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6338                 if (vsi->tc_config.enabled_tc & BIT(i)) {
6339                         ch = kzalloc(sizeof(*ch), GFP_KERNEL);
6340                         if (!ch) {
6341                                 ret = -ENOMEM;
6342                                 goto err_free;
6343                         }
6344
6345                         INIT_LIST_HEAD(&ch->list);
6346                         ch->num_queue_pairs =
6347                                 vsi->tc_config.tc_info[i].qcount;
6348                         ch->base_queue =
6349                                 vsi->tc_config.tc_info[i].qoffset;
6350
6351                         /* Bandwidth limit through tc interface is in bytes/s,
6352                          * change to Mbit/s
6353                          */
6354                         max_rate = vsi->mqprio_qopt.max_rate[i];
6355                         do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6356                         ch->max_tx_rate = max_rate;
6357
6358                         list_add_tail(&ch->list, &vsi->ch_list);
6359
6360                         ret = i40e_create_queue_channel(vsi, ch);
6361                         if (ret) {
6362                                 dev_err(&vsi->back->pdev->dev,
6363                                         "Failed creating queue channel with TC%d: queues %d\n",
6364                                         i, ch->num_queue_pairs);
6365                                 goto err_free;
6366                         }
6367                         vsi->tc_seid_map[i] = ch->seid;
6368                 }
6369         }
6370         return ret;
6371
6372 err_free:
6373         i40e_remove_queue_channels(vsi);
6374         return ret;
6375 }
6376
6377 /**
6378  * i40e_veb_config_tc - Configure TCs for given VEB
6379  * @veb: given VEB
6380  * @enabled_tc: TC bitmap
6381  *
6382  * Configures given TC bitmap for VEB (switching) element
6383  **/
6384 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
6385 {
6386         struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
6387         struct i40e_pf *pf = veb->pf;
6388         int ret = 0;
6389         int i;
6390
6391         /* No TCs or already enabled TCs just return */
6392         if (!enabled_tc || veb->enabled_tc == enabled_tc)
6393                 return ret;
6394
6395         bw_data.tc_valid_bits = enabled_tc;
6396         /* bw_data.absolute_credits is not set (relative) */
6397
6398         /* Enable ETS TCs with equal BW Share for now */
6399         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6400                 if (enabled_tc & BIT(i))
6401                         bw_data.tc_bw_share_credits[i] = 1;
6402         }
6403
6404         ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
6405                                                    &bw_data, NULL);
6406         if (ret) {
6407                 dev_info(&pf->pdev->dev,
6408                          "VEB bw config failed, err %s aq_err %s\n",
6409                          i40e_stat_str(&pf->hw, ret),
6410                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6411                 goto out;
6412         }
6413
6414         /* Update the BW information */
6415         ret = i40e_veb_get_bw_info(veb);
6416         if (ret) {
6417                 dev_info(&pf->pdev->dev,
6418                          "Failed getting veb bw config, err %s aq_err %s\n",
6419                          i40e_stat_str(&pf->hw, ret),
6420                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6421         }
6422
6423 out:
6424         return ret;
6425 }
6426
6427 #ifdef CONFIG_I40E_DCB
6428 /**
6429  * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6430  * @pf: PF struct
6431  *
6432  * Reconfigure VEB/VSIs on a given PF; it is assumed that
6433  * the caller would've quiesce all the VSIs before calling
6434  * this function
6435  **/
6436 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6437 {
6438         u8 tc_map = 0;
6439         int ret;
6440         u8 v;
6441
6442         /* Enable the TCs available on PF to all VEBs */
6443         tc_map = i40e_pf_get_tc_map(pf);
6444         if (tc_map == I40E_DEFAULT_TRAFFIC_CLASS)
6445                 return;
6446
6447         for (v = 0; v < I40E_MAX_VEB; v++) {
6448                 if (!pf->veb[v])
6449                         continue;
6450                 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
6451                 if (ret) {
6452                         dev_info(&pf->pdev->dev,
6453                                  "Failed configuring TC for VEB seid=%d\n",
6454                                  pf->veb[v]->seid);
6455                         /* Will try to configure as many components */
6456                 }
6457         }
6458
6459         /* Update each VSI */
6460         for (v = 0; v < pf->num_alloc_vsi; v++) {
6461                 if (!pf->vsi[v])
6462                         continue;
6463
6464                 /* - Enable all TCs for the LAN VSI
6465                  * - For all others keep them at TC0 for now
6466                  */
6467                 if (v == pf->lan_vsi)
6468                         tc_map = i40e_pf_get_tc_map(pf);
6469                 else
6470                         tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
6471
6472                 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
6473                 if (ret) {
6474                         dev_info(&pf->pdev->dev,
6475                                  "Failed configuring TC for VSI seid=%d\n",
6476                                  pf->vsi[v]->seid);
6477                         /* Will try to configure as many components */
6478                 } else {
6479                         /* Re-configure VSI vectors based on updated TC map */
6480                         i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
6481                         if (pf->vsi[v]->netdev)
6482                                 i40e_dcbnl_set_all(pf->vsi[v]);
6483                 }
6484         }
6485 }
6486
6487 /**
6488  * i40e_resume_port_tx - Resume port Tx
6489  * @pf: PF struct
6490  *
6491  * Resume a port's Tx and issue a PF reset in case of failure to
6492  * resume.
6493  **/
6494 static int i40e_resume_port_tx(struct i40e_pf *pf)
6495 {
6496         struct i40e_hw *hw = &pf->hw;
6497         int ret;
6498
6499         ret = i40e_aq_resume_port_tx(hw, NULL);
6500         if (ret) {
6501                 dev_info(&pf->pdev->dev,
6502                          "Resume Port Tx failed, err %s aq_err %s\n",
6503                           i40e_stat_str(&pf->hw, ret),
6504                           i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6505                 /* Schedule PF reset to recover */
6506                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6507                 i40e_service_event_schedule(pf);
6508         }
6509
6510         return ret;
6511 }
6512
6513 /**
6514  * i40e_suspend_port_tx - Suspend port Tx
6515  * @pf: PF struct
6516  *
6517  * Suspend a port's Tx and issue a PF reset in case of failure.
6518  **/
6519 static int i40e_suspend_port_tx(struct i40e_pf *pf)
6520 {
6521         struct i40e_hw *hw = &pf->hw;
6522         int ret;
6523
6524         ret = i40e_aq_suspend_port_tx(hw, pf->mac_seid, NULL);
6525         if (ret) {
6526                 dev_info(&pf->pdev->dev,
6527                          "Suspend Port Tx failed, err %s aq_err %s\n",
6528                          i40e_stat_str(&pf->hw, ret),
6529                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6530                 /* Schedule PF reset to recover */
6531                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6532                 i40e_service_event_schedule(pf);
6533         }
6534
6535         return ret;
6536 }
6537
6538 /**
6539  * i40e_hw_set_dcb_config - Program new DCBX settings into HW
6540  * @pf: PF being configured
6541  * @new_cfg: New DCBX configuration
6542  *
6543  * Program DCB settings into HW and reconfigure VEB/VSIs on
6544  * given PF. Uses "Set LLDP MIB" AQC to program the hardware.
6545  **/
6546 static int i40e_hw_set_dcb_config(struct i40e_pf *pf,
6547                                   struct i40e_dcbx_config *new_cfg)
6548 {
6549         struct i40e_dcbx_config *old_cfg = &pf->hw.local_dcbx_config;
6550         int ret;
6551
6552         /* Check if need reconfiguration */
6553         if (!memcmp(&new_cfg, &old_cfg, sizeof(new_cfg))) {
6554                 dev_dbg(&pf->pdev->dev, "No Change in DCB Config required.\n");
6555                 return 0;
6556         }
6557
6558         /* Config change disable all VSIs */
6559         i40e_pf_quiesce_all_vsi(pf);
6560
6561         /* Copy the new config to the current config */
6562         *old_cfg = *new_cfg;
6563         old_cfg->etsrec = old_cfg->etscfg;
6564         ret = i40e_set_dcb_config(&pf->hw);
6565         if (ret) {
6566                 dev_info(&pf->pdev->dev,
6567                          "Set DCB Config failed, err %s aq_err %s\n",
6568                          i40e_stat_str(&pf->hw, ret),
6569                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6570                 goto out;
6571         }
6572
6573         /* Changes in configuration update VEB/VSI */
6574         i40e_dcb_reconfigure(pf);
6575 out:
6576         /* In case of reset do not try to resume anything */
6577         if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) {
6578                 /* Re-start the VSIs if disabled */
6579                 ret = i40e_resume_port_tx(pf);
6580                 /* In case of error no point in resuming VSIs */
6581                 if (ret)
6582                         goto err;
6583                 i40e_pf_unquiesce_all_vsi(pf);
6584         }
6585 err:
6586         return ret;
6587 }
6588
6589 /**
6590  * i40e_hw_dcb_config - Program new DCBX settings into HW
6591  * @pf: PF being configured
6592  * @new_cfg: New DCBX configuration
6593  *
6594  * Program DCB settings into HW and reconfigure VEB/VSIs on
6595  * given PF
6596  **/
6597 int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg)
6598 {
6599         struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6600         u8 prio_type[I40E_MAX_TRAFFIC_CLASS] = {0};
6601         u32 mfs_tc[I40E_MAX_TRAFFIC_CLASS];
6602         struct i40e_dcbx_config *old_cfg;
6603         u8 mode[I40E_MAX_TRAFFIC_CLASS];
6604         struct i40e_rx_pb_config pb_cfg;
6605         struct i40e_hw *hw = &pf->hw;
6606         u8 num_ports = hw->num_ports;
6607         bool need_reconfig;
6608         int ret = -EINVAL;
6609         u8 lltc_map = 0;
6610         u8 tc_map = 0;
6611         u8 new_numtc;
6612         u8 i;
6613
6614         dev_dbg(&pf->pdev->dev, "Configuring DCB registers directly\n");
6615         /* Un-pack information to Program ETS HW via shared API
6616          * numtc, tcmap
6617          * LLTC map
6618          * ETS/NON-ETS arbiter mode
6619          * max exponent (credit refills)
6620          * Total number of ports
6621          * PFC priority bit-map
6622          * Priority Table
6623          * BW % per TC
6624          * Arbiter mode between UPs sharing same TC
6625          * TSA table (ETS or non-ETS)
6626          * EEE enabled or not
6627          * MFS TC table
6628          */
6629
6630         new_numtc = i40e_dcb_get_num_tc(new_cfg);
6631
6632         memset(&ets_data, 0, sizeof(ets_data));
6633         for (i = 0; i < new_numtc; i++) {
6634                 tc_map |= BIT(i);
6635                 switch (new_cfg->etscfg.tsatable[i]) {
6636                 case I40E_IEEE_TSA_ETS:
6637                         prio_type[i] = I40E_DCB_PRIO_TYPE_ETS;
6638                         ets_data.tc_bw_share_credits[i] =
6639                                         new_cfg->etscfg.tcbwtable[i];
6640                         break;
6641                 case I40E_IEEE_TSA_STRICT:
6642                         prio_type[i] = I40E_DCB_PRIO_TYPE_STRICT;
6643                         lltc_map |= BIT(i);
6644                         ets_data.tc_bw_share_credits[i] =
6645                                         I40E_DCB_STRICT_PRIO_CREDITS;
6646                         break;
6647                 default:
6648                         /* Invalid TSA type */
6649                         need_reconfig = false;
6650                         goto out;
6651                 }
6652         }
6653
6654         old_cfg = &hw->local_dcbx_config;
6655         /* Check if need reconfiguration */
6656         need_reconfig = i40e_dcb_need_reconfig(pf, old_cfg, new_cfg);
6657
6658         /* If needed, enable/disable frame tagging, disable all VSIs
6659          * and suspend port tx
6660          */
6661         if (need_reconfig) {
6662                 /* Enable DCB tagging only when more than one TC */
6663                 if (new_numtc > 1)
6664                         pf->flags |= I40E_FLAG_DCB_ENABLED;
6665                 else
6666                         pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6667
6668                 set_bit(__I40E_PORT_SUSPENDED, pf->state);
6669                 /* Reconfiguration needed quiesce all VSIs */
6670                 i40e_pf_quiesce_all_vsi(pf);
6671                 ret = i40e_suspend_port_tx(pf);
6672                 if (ret)
6673                         goto err;
6674         }
6675
6676         /* Configure Port ETS Tx Scheduler */
6677         ets_data.tc_valid_bits = tc_map;
6678         ets_data.tc_strict_priority_flags = lltc_map;
6679         ret = i40e_aq_config_switch_comp_ets
6680                 (hw, pf->mac_seid, &ets_data,
6681                  i40e_aqc_opc_modify_switching_comp_ets, NULL);
6682         if (ret) {
6683                 dev_info(&pf->pdev->dev,
6684                          "Modify Port ETS failed, err %s aq_err %s\n",
6685                          i40e_stat_str(&pf->hw, ret),
6686                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6687                 goto out;
6688         }
6689
6690         /* Configure Rx ETS HW */
6691         memset(&mode, I40E_DCB_ARB_MODE_ROUND_ROBIN, sizeof(mode));
6692         i40e_dcb_hw_set_num_tc(hw, new_numtc);
6693         i40e_dcb_hw_rx_fifo_config(hw, I40E_DCB_ARB_MODE_ROUND_ROBIN,
6694                                    I40E_DCB_ARB_MODE_STRICT_PRIORITY,
6695                                    I40E_DCB_DEFAULT_MAX_EXPONENT,
6696                                    lltc_map);
6697         i40e_dcb_hw_rx_cmd_monitor_config(hw, new_numtc, num_ports);
6698         i40e_dcb_hw_rx_ets_bw_config(hw, new_cfg->etscfg.tcbwtable, mode,
6699                                      prio_type);
6700         i40e_dcb_hw_pfc_config(hw, new_cfg->pfc.pfcenable,
6701                                new_cfg->etscfg.prioritytable);
6702         i40e_dcb_hw_rx_up2tc_config(hw, new_cfg->etscfg.prioritytable);
6703
6704         /* Configure Rx Packet Buffers in HW */
6705         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6706                 mfs_tc[i] = pf->vsi[pf->lan_vsi]->netdev->mtu;
6707                 mfs_tc[i] += I40E_PACKET_HDR_PAD;
6708         }
6709
6710         i40e_dcb_hw_calculate_pool_sizes(hw, num_ports,
6711                                          false, new_cfg->pfc.pfcenable,
6712                                          mfs_tc, &pb_cfg);
6713         i40e_dcb_hw_rx_pb_config(hw, &pf->pb_cfg, &pb_cfg);
6714
6715         /* Update the local Rx Packet buffer config */
6716         pf->pb_cfg = pb_cfg;
6717
6718         /* Inform the FW about changes to DCB configuration */
6719         ret = i40e_aq_dcb_updated(&pf->hw, NULL);
6720         if (ret) {
6721                 dev_info(&pf->pdev->dev,
6722                          "DCB Updated failed, err %s aq_err %s\n",
6723                          i40e_stat_str(&pf->hw, ret),
6724                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6725                 goto out;
6726         }
6727
6728         /* Update the port DCBx configuration */
6729         *old_cfg = *new_cfg;
6730
6731         /* Changes in configuration update VEB/VSI */
6732         i40e_dcb_reconfigure(pf);
6733 out:
6734         /* Re-start the VSIs if disabled */
6735         if (need_reconfig) {
6736                 ret = i40e_resume_port_tx(pf);
6737
6738                 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
6739                 /* In case of error no point in resuming VSIs */
6740                 if (ret)
6741                         goto err;
6742
6743                 /* Wait for the PF's queues to be disabled */
6744                 ret = i40e_pf_wait_queues_disabled(pf);
6745                 if (ret) {
6746                         /* Schedule PF reset to recover */
6747                         set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6748                         i40e_service_event_schedule(pf);
6749                         goto err;
6750                 } else {
6751                         i40e_pf_unquiesce_all_vsi(pf);
6752                         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
6753                         set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
6754                 }
6755                 /* registers are set, lets apply */
6756                 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB)
6757                         ret = i40e_hw_set_dcb_config(pf, new_cfg);
6758         }
6759
6760 err:
6761         return ret;
6762 }
6763
6764 /**
6765  * i40e_dcb_sw_default_config - Set default DCB configuration when DCB in SW
6766  * @pf: PF being queried
6767  *
6768  * Set default DCB configuration in case DCB is to be done in SW.
6769  **/
6770 int i40e_dcb_sw_default_config(struct i40e_pf *pf)
6771 {
6772         struct i40e_dcbx_config *dcb_cfg = &pf->hw.local_dcbx_config;
6773         struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6774         struct i40e_hw *hw = &pf->hw;
6775         int err;
6776
6777         if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB) {
6778                 /* Update the local cached instance with TC0 ETS */
6779                 memset(&pf->tmp_cfg, 0, sizeof(struct i40e_dcbx_config));
6780                 pf->tmp_cfg.etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
6781                 pf->tmp_cfg.etscfg.maxtcs = 0;
6782                 pf->tmp_cfg.etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
6783                 pf->tmp_cfg.etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
6784                 pf->tmp_cfg.pfc.willing = I40E_IEEE_DEFAULT_PFC_WILLING;
6785                 pf->tmp_cfg.pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
6786                 /* FW needs one App to configure HW */
6787                 pf->tmp_cfg.numapps = I40E_IEEE_DEFAULT_NUM_APPS;
6788                 pf->tmp_cfg.app[0].selector = I40E_APP_SEL_ETHTYPE;
6789                 pf->tmp_cfg.app[0].priority = I40E_IEEE_DEFAULT_APP_PRIO;
6790                 pf->tmp_cfg.app[0].protocolid = I40E_APP_PROTOID_FCOE;
6791
6792                 return i40e_hw_set_dcb_config(pf, &pf->tmp_cfg);
6793         }
6794
6795         memset(&ets_data, 0, sizeof(ets_data));
6796         ets_data.tc_valid_bits = I40E_DEFAULT_TRAFFIC_CLASS; /* TC0 only */
6797         ets_data.tc_strict_priority_flags = 0; /* ETS */
6798         ets_data.tc_bw_share_credits[0] = I40E_IEEE_DEFAULT_ETS_TCBW; /* 100% to TC0 */
6799
6800         /* Enable ETS on the Physical port */
6801         err = i40e_aq_config_switch_comp_ets
6802                 (hw, pf->mac_seid, &ets_data,
6803                  i40e_aqc_opc_enable_switching_comp_ets, NULL);
6804         if (err) {
6805                 dev_info(&pf->pdev->dev,
6806                          "Enable Port ETS failed, err %s aq_err %s\n",
6807                          i40e_stat_str(&pf->hw, err),
6808                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6809                 err = -ENOENT;
6810                 goto out;
6811         }
6812
6813         /* Update the local cached instance with TC0 ETS */
6814         dcb_cfg->etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
6815         dcb_cfg->etscfg.cbs = 0;
6816         dcb_cfg->etscfg.maxtcs = I40E_MAX_TRAFFIC_CLASS;
6817         dcb_cfg->etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
6818
6819 out:
6820         return err;
6821 }
6822
6823 /**
6824  * i40e_init_pf_dcb - Initialize DCB configuration
6825  * @pf: PF being configured
6826  *
6827  * Query the current DCB configuration and cache it
6828  * in the hardware structure
6829  **/
6830 static int i40e_init_pf_dcb(struct i40e_pf *pf)
6831 {
6832         struct i40e_hw *hw = &pf->hw;
6833         int err;
6834
6835         /* Do not enable DCB for SW1 and SW2 images even if the FW is capable
6836          * Also do not enable DCBx if FW LLDP agent is disabled
6837          */
6838         if (pf->hw_features & I40E_HW_NO_DCB_SUPPORT) {
6839                 dev_info(&pf->pdev->dev, "DCB is not supported.\n");
6840                 err = I40E_NOT_SUPPORTED;
6841                 goto out;
6842         }
6843         if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) {
6844                 dev_info(&pf->pdev->dev, "FW LLDP is disabled, attempting SW DCB\n");
6845                 err = i40e_dcb_sw_default_config(pf);
6846                 if (err) {
6847                         dev_info(&pf->pdev->dev, "Could not initialize SW DCB\n");
6848                         goto out;
6849                 }
6850                 dev_info(&pf->pdev->dev, "SW DCB initialization succeeded.\n");
6851                 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
6852                                DCB_CAP_DCBX_VER_IEEE;
6853                 /* at init capable but disabled */
6854                 pf->flags |= I40E_FLAG_DCB_CAPABLE;
6855                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6856                 goto out;
6857         }
6858         err = i40e_init_dcb(hw, true);
6859         if (!err) {
6860                 /* Device/Function is not DCBX capable */
6861                 if ((!hw->func_caps.dcb) ||
6862                     (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
6863                         dev_info(&pf->pdev->dev,
6864                                  "DCBX offload is not supported or is disabled for this PF.\n");
6865                 } else {
6866                         /* When status is not DISABLED then DCBX in FW */
6867                         pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
6868                                        DCB_CAP_DCBX_VER_IEEE;
6869
6870                         pf->flags |= I40E_FLAG_DCB_CAPABLE;
6871                         /* Enable DCB tagging only when more than one TC
6872                          * or explicitly disable if only one TC
6873                          */
6874                         if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
6875                                 pf->flags |= I40E_FLAG_DCB_ENABLED;
6876                         else
6877                                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6878                         dev_dbg(&pf->pdev->dev,
6879                                 "DCBX offload is supported for this PF.\n");
6880                 }
6881         } else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) {
6882                 dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
6883                 pf->flags |= I40E_FLAG_DISABLE_FW_LLDP;
6884         } else {
6885                 dev_info(&pf->pdev->dev,
6886                          "Query for DCB configuration failed, err %s aq_err %s\n",
6887                          i40e_stat_str(&pf->hw, err),
6888                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6889         }
6890
6891 out:
6892         return err;
6893 }
6894 #endif /* CONFIG_I40E_DCB */
6895
6896 /**
6897  * i40e_print_link_message - print link up or down
6898  * @vsi: the VSI for which link needs a message
6899  * @isup: true of link is up, false otherwise
6900  */
6901 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
6902 {
6903         enum i40e_aq_link_speed new_speed;
6904         struct i40e_pf *pf = vsi->back;
6905         char *speed = "Unknown";
6906         char *fc = "Unknown";
6907         char *fec = "";
6908         char *req_fec = "";
6909         char *an = "";
6910
6911         if (isup)
6912                 new_speed = pf->hw.phy.link_info.link_speed;
6913         else
6914                 new_speed = I40E_LINK_SPEED_UNKNOWN;
6915
6916         if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
6917                 return;
6918         vsi->current_isup = isup;
6919         vsi->current_speed = new_speed;
6920         if (!isup) {
6921                 netdev_info(vsi->netdev, "NIC Link is Down\n");
6922                 return;
6923         }
6924
6925         /* Warn user if link speed on NPAR enabled partition is not at
6926          * least 10GB
6927          */
6928         if (pf->hw.func_caps.npar_enable &&
6929             (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
6930              pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
6931                 netdev_warn(vsi->netdev,
6932                             "The partition detected link speed that is less than 10Gbps\n");
6933
6934         switch (pf->hw.phy.link_info.link_speed) {
6935         case I40E_LINK_SPEED_40GB:
6936                 speed = "40 G";
6937                 break;
6938         case I40E_LINK_SPEED_20GB:
6939                 speed = "20 G";
6940                 break;
6941         case I40E_LINK_SPEED_25GB:
6942                 speed = "25 G";
6943                 break;
6944         case I40E_LINK_SPEED_10GB:
6945                 speed = "10 G";
6946                 break;
6947         case I40E_LINK_SPEED_5GB:
6948                 speed = "5 G";
6949                 break;
6950         case I40E_LINK_SPEED_2_5GB:
6951                 speed = "2.5 G";
6952                 break;
6953         case I40E_LINK_SPEED_1GB:
6954                 speed = "1000 M";
6955                 break;
6956         case I40E_LINK_SPEED_100MB:
6957                 speed = "100 M";
6958                 break;
6959         default:
6960                 break;
6961         }
6962
6963         switch (pf->hw.fc.current_mode) {
6964         case I40E_FC_FULL:
6965                 fc = "RX/TX";
6966                 break;
6967         case I40E_FC_TX_PAUSE:
6968                 fc = "TX";
6969                 break;
6970         case I40E_FC_RX_PAUSE:
6971                 fc = "RX";
6972                 break;
6973         default:
6974                 fc = "None";
6975                 break;
6976         }
6977
6978         if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
6979                 req_fec = "None";
6980                 fec = "None";
6981                 an = "False";
6982
6983                 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
6984                         an = "True";
6985
6986                 if (pf->hw.phy.link_info.fec_info &
6987                     I40E_AQ_CONFIG_FEC_KR_ENA)
6988                         fec = "CL74 FC-FEC/BASE-R";
6989                 else if (pf->hw.phy.link_info.fec_info &
6990                          I40E_AQ_CONFIG_FEC_RS_ENA)
6991                         fec = "CL108 RS-FEC";
6992
6993                 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
6994                  * both RS and FC are requested
6995                  */
6996                 if (vsi->back->hw.phy.link_info.req_fec_info &
6997                     (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) {
6998                         if (vsi->back->hw.phy.link_info.req_fec_info &
6999                             I40E_AQ_REQUEST_FEC_RS)
7000                                 req_fec = "CL108 RS-FEC";
7001                         else
7002                                 req_fec = "CL74 FC-FEC/BASE-R";
7003                 }
7004                 netdev_info(vsi->netdev,
7005                             "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7006                             speed, req_fec, fec, an, fc);
7007         } else if (pf->hw.device_id == I40E_DEV_ID_KX_X722) {
7008                 req_fec = "None";
7009                 fec = "None";
7010                 an = "False";
7011
7012                 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7013                         an = "True";
7014
7015                 if (pf->hw.phy.link_info.fec_info &
7016                     I40E_AQ_CONFIG_FEC_KR_ENA)
7017                         fec = "CL74 FC-FEC/BASE-R";
7018
7019                 if (pf->hw.phy.link_info.req_fec_info &
7020                     I40E_AQ_REQUEST_FEC_KR)
7021                         req_fec = "CL74 FC-FEC/BASE-R";
7022
7023                 netdev_info(vsi->netdev,
7024                             "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7025                             speed, req_fec, fec, an, fc);
7026         } else {
7027                 netdev_info(vsi->netdev,
7028                             "NIC Link is Up, %sbps Full Duplex, Flow Control: %s\n",
7029                             speed, fc);
7030         }
7031
7032 }
7033
7034 /**
7035  * i40e_up_complete - Finish the last steps of bringing up a connection
7036  * @vsi: the VSI being configured
7037  **/
7038 static int i40e_up_complete(struct i40e_vsi *vsi)
7039 {
7040         struct i40e_pf *pf = vsi->back;
7041         int err;
7042
7043         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7044                 i40e_vsi_configure_msix(vsi);
7045         else
7046                 i40e_configure_msi_and_legacy(vsi);
7047
7048         /* start rings */
7049         err = i40e_vsi_start_rings(vsi);
7050         if (err)
7051                 return err;
7052
7053         clear_bit(__I40E_VSI_DOWN, vsi->state);
7054         i40e_napi_enable_all(vsi);
7055         i40e_vsi_enable_irq(vsi);
7056
7057         if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
7058             (vsi->netdev)) {
7059                 i40e_print_link_message(vsi, true);
7060                 netif_tx_start_all_queues(vsi->netdev);
7061                 netif_carrier_on(vsi->netdev);
7062         }
7063
7064         /* replay FDIR SB filters */
7065         if (vsi->type == I40E_VSI_FDIR) {
7066                 /* reset fd counters */
7067                 pf->fd_add_err = 0;
7068                 pf->fd_atr_cnt = 0;
7069                 i40e_fdir_filter_restore(vsi);
7070         }
7071
7072         /* On the next run of the service_task, notify any clients of the new
7073          * opened netdev
7074          */
7075         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7076         i40e_service_event_schedule(pf);
7077
7078         return 0;
7079 }
7080
7081 /**
7082  * i40e_vsi_reinit_locked - Reset the VSI
7083  * @vsi: the VSI being configured
7084  *
7085  * Rebuild the ring structs after some configuration
7086  * has changed, e.g. MTU size.
7087  **/
7088 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
7089 {
7090         struct i40e_pf *pf = vsi->back;
7091
7092         while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state))
7093                 usleep_range(1000, 2000);
7094         i40e_down(vsi);
7095
7096         i40e_up(vsi);
7097         clear_bit(__I40E_CONFIG_BUSY, pf->state);
7098 }
7099
7100 /**
7101  * i40e_force_link_state - Force the link status
7102  * @pf: board private structure
7103  * @is_up: whether the link state should be forced up or down
7104  **/
7105 static i40e_status i40e_force_link_state(struct i40e_pf *pf, bool is_up)
7106 {
7107         struct i40e_aq_get_phy_abilities_resp abilities;
7108         struct i40e_aq_set_phy_config config = {0};
7109         bool non_zero_phy_type = is_up;
7110         struct i40e_hw *hw = &pf->hw;
7111         i40e_status err;
7112         u64 mask;
7113         u8 speed;
7114
7115         /* Card might've been put in an unstable state by other drivers
7116          * and applications, which causes incorrect speed values being
7117          * set on startup. In order to clear speed registers, we call
7118          * get_phy_capabilities twice, once to get initial state of
7119          * available speeds, and once to get current PHY config.
7120          */
7121         err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
7122                                            NULL);
7123         if (err) {
7124                 dev_err(&pf->pdev->dev,
7125                         "failed to get phy cap., ret =  %s last_status =  %s\n",
7126                         i40e_stat_str(hw, err),
7127                         i40e_aq_str(hw, hw->aq.asq_last_status));
7128                 return err;
7129         }
7130         speed = abilities.link_speed;
7131
7132         /* Get the current phy config */
7133         err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
7134                                            NULL);
7135         if (err) {
7136                 dev_err(&pf->pdev->dev,
7137                         "failed to get phy cap., ret =  %s last_status =  %s\n",
7138                         i40e_stat_str(hw, err),
7139                         i40e_aq_str(hw, hw->aq.asq_last_status));
7140                 return err;
7141         }
7142
7143         /* If link needs to go up, but was not forced to go down,
7144          * and its speed values are OK, no need for a flap
7145          * if non_zero_phy_type was set, still need to force up
7146          */
7147         if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)
7148                 non_zero_phy_type = true;
7149         else if (is_up && abilities.phy_type != 0 && abilities.link_speed != 0)
7150                 return I40E_SUCCESS;
7151
7152         /* To force link we need to set bits for all supported PHY types,
7153          * but there are now more than 32, so we need to split the bitmap
7154          * across two fields.
7155          */
7156         mask = I40E_PHY_TYPES_BITMASK;
7157         config.phy_type =
7158                 non_zero_phy_type ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0;
7159         config.phy_type_ext =
7160                 non_zero_phy_type ? (u8)((mask >> 32) & 0xff) : 0;
7161         /* Copy the old settings, except of phy_type */
7162         config.abilities = abilities.abilities;
7163         if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED) {
7164                 if (is_up)
7165                         config.abilities |= I40E_AQ_PHY_ENABLE_LINK;
7166                 else
7167                         config.abilities &= ~(I40E_AQ_PHY_ENABLE_LINK);
7168         }
7169         if (abilities.link_speed != 0)
7170                 config.link_speed = abilities.link_speed;
7171         else
7172                 config.link_speed = speed;
7173         config.eee_capability = abilities.eee_capability;
7174         config.eeer = abilities.eeer_val;
7175         config.low_power_ctrl = abilities.d3_lpan;
7176         config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
7177                             I40E_AQ_PHY_FEC_CONFIG_MASK;
7178         err = i40e_aq_set_phy_config(hw, &config, NULL);
7179
7180         if (err) {
7181                 dev_err(&pf->pdev->dev,
7182                         "set phy config ret =  %s last_status =  %s\n",
7183                         i40e_stat_str(&pf->hw, err),
7184                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7185                 return err;
7186         }
7187
7188         /* Update the link info */
7189         err = i40e_update_link_info(hw);
7190         if (err) {
7191                 /* Wait a little bit (on 40G cards it sometimes takes a really
7192                  * long time for link to come back from the atomic reset)
7193                  * and try once more
7194                  */
7195                 msleep(1000);
7196                 i40e_update_link_info(hw);
7197         }
7198
7199         i40e_aq_set_link_restart_an(hw, is_up, NULL);
7200
7201         return I40E_SUCCESS;
7202 }
7203
7204 /**
7205  * i40e_up - Bring the connection back up after being down
7206  * @vsi: the VSI being configured
7207  **/
7208 int i40e_up(struct i40e_vsi *vsi)
7209 {
7210         int err;
7211
7212         if (vsi->type == I40E_VSI_MAIN &&
7213             (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7214              vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7215                 i40e_force_link_state(vsi->back, true);
7216
7217         err = i40e_vsi_configure(vsi);
7218         if (!err)
7219                 err = i40e_up_complete(vsi);
7220
7221         return err;
7222 }
7223
7224 /**
7225  * i40e_down - Shutdown the connection processing
7226  * @vsi: the VSI being stopped
7227  **/
7228 void i40e_down(struct i40e_vsi *vsi)
7229 {
7230         int i;
7231
7232         /* It is assumed that the caller of this function
7233          * sets the vsi->state __I40E_VSI_DOWN bit.
7234          */
7235         if (vsi->netdev) {
7236                 netif_carrier_off(vsi->netdev);
7237                 netif_tx_disable(vsi->netdev);
7238         }
7239         i40e_vsi_disable_irq(vsi);
7240         i40e_vsi_stop_rings(vsi);
7241         if (vsi->type == I40E_VSI_MAIN &&
7242            (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7243             vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7244                 i40e_force_link_state(vsi->back, false);
7245         i40e_napi_disable_all(vsi);
7246
7247         for (i = 0; i < vsi->num_queue_pairs; i++) {
7248                 i40e_clean_tx_ring(vsi->tx_rings[i]);
7249                 if (i40e_enabled_xdp_vsi(vsi)) {
7250                         /* Make sure that in-progress ndo_xdp_xmit and
7251                          * ndo_xsk_wakeup calls are completed.
7252                          */
7253                         synchronize_rcu();
7254                         i40e_clean_tx_ring(vsi->xdp_rings[i]);
7255                 }
7256                 i40e_clean_rx_ring(vsi->rx_rings[i]);
7257         }
7258
7259 }
7260
7261 /**
7262  * i40e_validate_mqprio_qopt- validate queue mapping info
7263  * @vsi: the VSI being configured
7264  * @mqprio_qopt: queue parametrs
7265  **/
7266 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,
7267                                      struct tc_mqprio_qopt_offload *mqprio_qopt)
7268 {
7269         u64 sum_max_rate = 0;
7270         u64 max_rate = 0;
7271         int i;
7272
7273         if (mqprio_qopt->qopt.offset[0] != 0 ||
7274             mqprio_qopt->qopt.num_tc < 1 ||
7275             mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS)
7276                 return -EINVAL;
7277         for (i = 0; ; i++) {
7278                 if (!mqprio_qopt->qopt.count[i])
7279                         return -EINVAL;
7280                 if (mqprio_qopt->min_rate[i]) {
7281                         dev_err(&vsi->back->pdev->dev,
7282                                 "Invalid min tx rate (greater than 0) specified\n");
7283                         return -EINVAL;
7284                 }
7285                 max_rate = mqprio_qopt->max_rate[i];
7286                 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
7287                 sum_max_rate += max_rate;
7288
7289                 if (i >= mqprio_qopt->qopt.num_tc - 1)
7290                         break;
7291                 if (mqprio_qopt->qopt.offset[i + 1] !=
7292                     (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))
7293                         return -EINVAL;
7294         }
7295         if (vsi->num_queue_pairs <
7296             (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {
7297                 dev_err(&vsi->back->pdev->dev,
7298                         "Failed to create traffic channel, insufficient number of queues.\n");
7299                 return -EINVAL;
7300         }
7301         if (sum_max_rate > i40e_get_link_speed(vsi)) {
7302                 dev_err(&vsi->back->pdev->dev,
7303                         "Invalid max tx rate specified\n");
7304                 return -EINVAL;
7305         }
7306         return 0;
7307 }
7308
7309 /**
7310  * i40e_vsi_set_default_tc_config - set default values for tc configuration
7311  * @vsi: the VSI being configured
7312  **/
7313 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)
7314 {
7315         u16 qcount;
7316         int i;
7317
7318         /* Only TC0 is enabled */
7319         vsi->tc_config.numtc = 1;
7320         vsi->tc_config.enabled_tc = 1;
7321         qcount = min_t(int, vsi->alloc_queue_pairs,
7322                        i40e_pf_get_max_q_per_tc(vsi->back));
7323         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7324                 /* For the TC that is not enabled set the offset to default
7325                  * queue and allocate one queue for the given TC.
7326                  */
7327                 vsi->tc_config.tc_info[i].qoffset = 0;
7328                 if (i == 0)
7329                         vsi->tc_config.tc_info[i].qcount = qcount;
7330                 else
7331                         vsi->tc_config.tc_info[i].qcount = 1;
7332                 vsi->tc_config.tc_info[i].netdev_tc = 0;
7333         }
7334 }
7335
7336 /**
7337  * i40e_del_macvlan_filter
7338  * @hw: pointer to the HW structure
7339  * @seid: seid of the channel VSI
7340  * @macaddr: the mac address to apply as a filter
7341  * @aq_err: store the admin Q error
7342  *
7343  * This function deletes a mac filter on the channel VSI which serves as the
7344  * macvlan. Returns 0 on success.
7345  **/
7346 static i40e_status i40e_del_macvlan_filter(struct i40e_hw *hw, u16 seid,
7347                                            const u8 *macaddr, int *aq_err)
7348 {
7349         struct i40e_aqc_remove_macvlan_element_data element;
7350         i40e_status status;
7351
7352         memset(&element, 0, sizeof(element));
7353         ether_addr_copy(element.mac_addr, macaddr);
7354         element.vlan_tag = 0;
7355         element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
7356         status = i40e_aq_remove_macvlan(hw, seid, &element, 1, NULL);
7357         *aq_err = hw->aq.asq_last_status;
7358
7359         return status;
7360 }
7361
7362 /**
7363  * i40e_add_macvlan_filter
7364  * @hw: pointer to the HW structure
7365  * @seid: seid of the channel VSI
7366  * @macaddr: the mac address to apply as a filter
7367  * @aq_err: store the admin Q error
7368  *
7369  * This function adds a mac filter on the channel VSI which serves as the
7370  * macvlan. Returns 0 on success.
7371  **/
7372 static i40e_status i40e_add_macvlan_filter(struct i40e_hw *hw, u16 seid,
7373                                            const u8 *macaddr, int *aq_err)
7374 {
7375         struct i40e_aqc_add_macvlan_element_data element;
7376         i40e_status status;
7377         u16 cmd_flags = 0;
7378
7379         ether_addr_copy(element.mac_addr, macaddr);
7380         element.vlan_tag = 0;
7381         element.queue_number = 0;
7382         element.match_method = I40E_AQC_MM_ERR_NO_RES;
7383         cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
7384         element.flags = cpu_to_le16(cmd_flags);
7385         status = i40e_aq_add_macvlan(hw, seid, &element, 1, NULL);
7386         *aq_err = hw->aq.asq_last_status;
7387
7388         return status;
7389 }
7390
7391 /**
7392  * i40e_reset_ch_rings - Reset the queue contexts in a channel
7393  * @vsi: the VSI we want to access
7394  * @ch: the channel we want to access
7395  */
7396 static void i40e_reset_ch_rings(struct i40e_vsi *vsi, struct i40e_channel *ch)
7397 {
7398         struct i40e_ring *tx_ring, *rx_ring;
7399         u16 pf_q;
7400         int i;
7401
7402         for (i = 0; i < ch->num_queue_pairs; i++) {
7403                 pf_q = ch->base_queue + i;
7404                 tx_ring = vsi->tx_rings[pf_q];
7405                 tx_ring->ch = NULL;
7406                 rx_ring = vsi->rx_rings[pf_q];
7407                 rx_ring->ch = NULL;
7408         }
7409 }
7410
7411 /**
7412  * i40e_free_macvlan_channels
7413  * @vsi: the VSI we want to access
7414  *
7415  * This function frees the Qs of the channel VSI from
7416  * the stack and also deletes the channel VSIs which
7417  * serve as macvlans.
7418  */
7419 static void i40e_free_macvlan_channels(struct i40e_vsi *vsi)
7420 {
7421         struct i40e_channel *ch, *ch_tmp;
7422         int ret;
7423
7424         if (list_empty(&vsi->macvlan_list))
7425                 return;
7426
7427         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7428                 struct i40e_vsi *parent_vsi;
7429
7430                 if (i40e_is_channel_macvlan(ch)) {
7431                         i40e_reset_ch_rings(vsi, ch);
7432                         clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7433                         netdev_unbind_sb_channel(vsi->netdev, ch->fwd->netdev);
7434                         netdev_set_sb_channel(ch->fwd->netdev, 0);
7435                         kfree(ch->fwd);
7436                         ch->fwd = NULL;
7437                 }
7438
7439                 list_del(&ch->list);
7440                 parent_vsi = ch->parent_vsi;
7441                 if (!parent_vsi || !ch->initialized) {
7442                         kfree(ch);
7443                         continue;
7444                 }
7445
7446                 /* remove the VSI */
7447                 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
7448                                              NULL);
7449                 if (ret)
7450                         dev_err(&vsi->back->pdev->dev,
7451                                 "unable to remove channel (%d) for parent VSI(%d)\n",
7452                                 ch->seid, parent_vsi->seid);
7453                 kfree(ch);
7454         }
7455         vsi->macvlan_cnt = 0;
7456 }
7457
7458 /**
7459  * i40e_fwd_ring_up - bring the macvlan device up
7460  * @vsi: the VSI we want to access
7461  * @vdev: macvlan netdevice
7462  * @fwd: the private fwd structure
7463  */
7464 static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev,
7465                             struct i40e_fwd_adapter *fwd)
7466 {
7467         int ret = 0, num_tc = 1,  i, aq_err;
7468         struct i40e_channel *ch, *ch_tmp;
7469         struct i40e_pf *pf = vsi->back;
7470         struct i40e_hw *hw = &pf->hw;
7471
7472         if (list_empty(&vsi->macvlan_list))
7473                 return -EINVAL;
7474
7475         /* Go through the list and find an available channel */
7476         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7477                 if (!i40e_is_channel_macvlan(ch)) {
7478                         ch->fwd = fwd;
7479                         /* record configuration for macvlan interface in vdev */
7480                         for (i = 0; i < num_tc; i++)
7481                                 netdev_bind_sb_channel_queue(vsi->netdev, vdev,
7482                                                              i,
7483                                                              ch->num_queue_pairs,
7484                                                              ch->base_queue);
7485                         for (i = 0; i < ch->num_queue_pairs; i++) {
7486                                 struct i40e_ring *tx_ring, *rx_ring;
7487                                 u16 pf_q;
7488
7489                                 pf_q = ch->base_queue + i;
7490
7491                                 /* Get to TX ring ptr */
7492                                 tx_ring = vsi->tx_rings[pf_q];
7493                                 tx_ring->ch = ch;
7494
7495                                 /* Get the RX ring ptr */
7496                                 rx_ring = vsi->rx_rings[pf_q];
7497                                 rx_ring->ch = ch;
7498                         }
7499                         break;
7500                 }
7501         }
7502
7503         /* Guarantee all rings are updated before we update the
7504          * MAC address filter.
7505          */
7506         wmb();
7507
7508         /* Add a mac filter */
7509         ret = i40e_add_macvlan_filter(hw, ch->seid, vdev->dev_addr, &aq_err);
7510         if (ret) {
7511                 /* if we cannot add the MAC rule then disable the offload */
7512                 macvlan_release_l2fw_offload(vdev);
7513                 for (i = 0; i < ch->num_queue_pairs; i++) {
7514                         struct i40e_ring *rx_ring;
7515                         u16 pf_q;
7516
7517                         pf_q = ch->base_queue + i;
7518                         rx_ring = vsi->rx_rings[pf_q];
7519                         rx_ring->netdev = NULL;
7520                 }
7521                 dev_info(&pf->pdev->dev,
7522                          "Error adding mac filter on macvlan err %s, aq_err %s\n",
7523                           i40e_stat_str(hw, ret),
7524                           i40e_aq_str(hw, aq_err));
7525                 netdev_err(vdev, "L2fwd offload disabled to L2 filter error\n");
7526         }
7527
7528         return ret;
7529 }
7530
7531 /**
7532  * i40e_setup_macvlans - create the channels which will be macvlans
7533  * @vsi: the VSI we want to access
7534  * @macvlan_cnt: no. of macvlans to be setup
7535  * @qcnt: no. of Qs per macvlan
7536  * @vdev: macvlan netdevice
7537  */
7538 static int i40e_setup_macvlans(struct i40e_vsi *vsi, u16 macvlan_cnt, u16 qcnt,
7539                                struct net_device *vdev)
7540 {
7541         struct i40e_pf *pf = vsi->back;
7542         struct i40e_hw *hw = &pf->hw;
7543         struct i40e_vsi_context ctxt;
7544         u16 sections, qmap, num_qps;
7545         struct i40e_channel *ch;
7546         int i, pow, ret = 0;
7547         u8 offset = 0;
7548
7549         if (vsi->type != I40E_VSI_MAIN || !macvlan_cnt)
7550                 return -EINVAL;
7551
7552         num_qps = vsi->num_queue_pairs - (macvlan_cnt * qcnt);
7553
7554         /* find the next higher power-of-2 of num queue pairs */
7555         pow = fls(roundup_pow_of_two(num_qps) - 1);
7556
7557         qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
7558                 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
7559
7560         /* Setup context bits for the main VSI */
7561         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
7562         sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
7563         memset(&ctxt, 0, sizeof(ctxt));
7564         ctxt.seid = vsi->seid;
7565         ctxt.pf_num = vsi->back->hw.pf_id;
7566         ctxt.vf_num = 0;
7567         ctxt.uplink_seid = vsi->uplink_seid;
7568         ctxt.info = vsi->info;
7569         ctxt.info.tc_mapping[0] = cpu_to_le16(qmap);
7570         ctxt.info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
7571         ctxt.info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
7572         ctxt.info.valid_sections |= cpu_to_le16(sections);
7573
7574         /* Reconfigure RSS for main VSI with new max queue count */
7575         vsi->rss_size = max_t(u16, num_qps, qcnt);
7576         ret = i40e_vsi_config_rss(vsi);
7577         if (ret) {
7578                 dev_info(&pf->pdev->dev,
7579                          "Failed to reconfig RSS for num_queues (%u)\n",
7580                          vsi->rss_size);
7581                 return ret;
7582         }
7583         vsi->reconfig_rss = true;
7584         dev_dbg(&vsi->back->pdev->dev,
7585                 "Reconfigured RSS with num_queues (%u)\n", vsi->rss_size);
7586         vsi->next_base_queue = num_qps;
7587         vsi->cnt_q_avail = vsi->num_queue_pairs - num_qps;
7588
7589         /* Update the VSI after updating the VSI queue-mapping
7590          * information
7591          */
7592         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7593         if (ret) {
7594                 dev_info(&pf->pdev->dev,
7595                          "Update vsi tc config failed, err %s aq_err %s\n",
7596                          i40e_stat_str(hw, ret),
7597                          i40e_aq_str(hw, hw->aq.asq_last_status));
7598                 return ret;
7599         }
7600         /* update the local VSI info with updated queue map */
7601         i40e_vsi_update_queue_map(vsi, &ctxt);
7602         vsi->info.valid_sections = 0;
7603
7604         /* Create channels for macvlans */
7605         INIT_LIST_HEAD(&vsi->macvlan_list);
7606         for (i = 0; i < macvlan_cnt; i++) {
7607                 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
7608                 if (!ch) {
7609                         ret = -ENOMEM;
7610                         goto err_free;
7611                 }
7612                 INIT_LIST_HEAD(&ch->list);
7613                 ch->num_queue_pairs = qcnt;
7614                 if (!i40e_setup_channel(pf, vsi, ch)) {
7615                         ret = -EINVAL;
7616                         kfree(ch);
7617                         goto err_free;
7618                 }
7619                 ch->parent_vsi = vsi;
7620                 vsi->cnt_q_avail -= ch->num_queue_pairs;
7621                 vsi->macvlan_cnt++;
7622                 list_add_tail(&ch->list, &vsi->macvlan_list);
7623         }
7624
7625         return ret;
7626
7627 err_free:
7628         dev_info(&pf->pdev->dev, "Failed to setup macvlans\n");
7629         i40e_free_macvlan_channels(vsi);
7630
7631         return ret;
7632 }
7633
7634 /**
7635  * i40e_fwd_add - configure macvlans
7636  * @netdev: net device to configure
7637  * @vdev: macvlan netdevice
7638  **/
7639 static void *i40e_fwd_add(struct net_device *netdev, struct net_device *vdev)
7640 {
7641         struct i40e_netdev_priv *np = netdev_priv(netdev);
7642         u16 q_per_macvlan = 0, macvlan_cnt = 0, vectors;
7643         struct i40e_vsi *vsi = np->vsi;
7644         struct i40e_pf *pf = vsi->back;
7645         struct i40e_fwd_adapter *fwd;
7646         int avail_macvlan, ret;
7647
7648         if ((pf->flags & I40E_FLAG_DCB_ENABLED)) {
7649                 netdev_info(netdev, "Macvlans are not supported when DCB is enabled\n");
7650                 return ERR_PTR(-EINVAL);
7651         }
7652         if ((pf->flags & I40E_FLAG_TC_MQPRIO)) {
7653                 netdev_info(netdev, "Macvlans are not supported when HW TC offload is on\n");
7654                 return ERR_PTR(-EINVAL);
7655         }
7656         if (pf->num_lan_msix < I40E_MIN_MACVLAN_VECTORS) {
7657                 netdev_info(netdev, "Not enough vectors available to support macvlans\n");
7658                 return ERR_PTR(-EINVAL);
7659         }
7660
7661         /* The macvlan device has to be a single Q device so that the
7662          * tc_to_txq field can be reused to pick the tx queue.
7663          */
7664         if (netif_is_multiqueue(vdev))
7665                 return ERR_PTR(-ERANGE);
7666
7667         if (!vsi->macvlan_cnt) {
7668                 /* reserve bit 0 for the pf device */
7669                 set_bit(0, vsi->fwd_bitmask);
7670
7671                 /* Try to reserve as many queues as possible for macvlans. First
7672                  * reserve 3/4th of max vectors, then half, then quarter and
7673                  * calculate Qs per macvlan as you go
7674                  */
7675                 vectors = pf->num_lan_msix;
7676                 if (vectors <= I40E_MAX_MACVLANS && vectors > 64) {
7677                         /* allocate 4 Qs per macvlan and 32 Qs to the PF*/
7678                         q_per_macvlan = 4;
7679                         macvlan_cnt = (vectors - 32) / 4;
7680                 } else if (vectors <= 64 && vectors > 32) {
7681                         /* allocate 2 Qs per macvlan and 16 Qs to the PF*/
7682                         q_per_macvlan = 2;
7683                         macvlan_cnt = (vectors - 16) / 2;
7684                 } else if (vectors <= 32 && vectors > 16) {
7685                         /* allocate 1 Q per macvlan and 16 Qs to the PF*/
7686                         q_per_macvlan = 1;
7687                         macvlan_cnt = vectors - 16;
7688                 } else if (vectors <= 16 && vectors > 8) {
7689                         /* allocate 1 Q per macvlan and 8 Qs to the PF */
7690                         q_per_macvlan = 1;
7691                         macvlan_cnt = vectors - 8;
7692                 } else {
7693                         /* allocate 1 Q per macvlan and 1 Q to the PF */
7694                         q_per_macvlan = 1;
7695                         macvlan_cnt = vectors - 1;
7696                 }
7697
7698                 if (macvlan_cnt == 0)
7699                         return ERR_PTR(-EBUSY);
7700
7701                 /* Quiesce VSI queues */
7702                 i40e_quiesce_vsi(vsi);
7703
7704                 /* sets up the macvlans but does not "enable" them */
7705                 ret = i40e_setup_macvlans(vsi, macvlan_cnt, q_per_macvlan,
7706                                           vdev);
7707                 if (ret)
7708                         return ERR_PTR(ret);
7709
7710                 /* Unquiesce VSI */
7711                 i40e_unquiesce_vsi(vsi);
7712         }
7713         avail_macvlan = find_first_zero_bit(vsi->fwd_bitmask,
7714                                             vsi->macvlan_cnt);
7715         if (avail_macvlan >= I40E_MAX_MACVLANS)
7716                 return ERR_PTR(-EBUSY);
7717
7718         /* create the fwd struct */
7719         fwd = kzalloc(sizeof(*fwd), GFP_KERNEL);
7720         if (!fwd)
7721                 return ERR_PTR(-ENOMEM);
7722
7723         set_bit(avail_macvlan, vsi->fwd_bitmask);
7724         fwd->bit_no = avail_macvlan;
7725         netdev_set_sb_channel(vdev, avail_macvlan);
7726         fwd->netdev = vdev;
7727
7728         if (!netif_running(netdev))
7729                 return fwd;
7730
7731         /* Set fwd ring up */
7732         ret = i40e_fwd_ring_up(vsi, vdev, fwd);
7733         if (ret) {
7734                 /* unbind the queues and drop the subordinate channel config */
7735                 netdev_unbind_sb_channel(netdev, vdev);
7736                 netdev_set_sb_channel(vdev, 0);
7737
7738                 kfree(fwd);
7739                 return ERR_PTR(-EINVAL);
7740         }
7741
7742         return fwd;
7743 }
7744
7745 /**
7746  * i40e_del_all_macvlans - Delete all the mac filters on the channels
7747  * @vsi: the VSI we want to access
7748  */
7749 static void i40e_del_all_macvlans(struct i40e_vsi *vsi)
7750 {
7751         struct i40e_channel *ch, *ch_tmp;
7752         struct i40e_pf *pf = vsi->back;
7753         struct i40e_hw *hw = &pf->hw;
7754         int aq_err, ret = 0;
7755
7756         if (list_empty(&vsi->macvlan_list))
7757                 return;
7758
7759         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7760                 if (i40e_is_channel_macvlan(ch)) {
7761                         ret = i40e_del_macvlan_filter(hw, ch->seid,
7762                                                       i40e_channel_mac(ch),
7763                                                       &aq_err);
7764                         if (!ret) {
7765                                 /* Reset queue contexts */
7766                                 i40e_reset_ch_rings(vsi, ch);
7767                                 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7768                                 netdev_unbind_sb_channel(vsi->netdev,
7769                                                          ch->fwd->netdev);
7770                                 netdev_set_sb_channel(ch->fwd->netdev, 0);
7771                                 kfree(ch->fwd);
7772                                 ch->fwd = NULL;
7773                         }
7774                 }
7775         }
7776 }
7777
7778 /**
7779  * i40e_fwd_del - delete macvlan interfaces
7780  * @netdev: net device to configure
7781  * @vdev: macvlan netdevice
7782  */
7783 static void i40e_fwd_del(struct net_device *netdev, void *vdev)
7784 {
7785         struct i40e_netdev_priv *np = netdev_priv(netdev);
7786         struct i40e_fwd_adapter *fwd = vdev;
7787         struct i40e_channel *ch, *ch_tmp;
7788         struct i40e_vsi *vsi = np->vsi;
7789         struct i40e_pf *pf = vsi->back;
7790         struct i40e_hw *hw = &pf->hw;
7791         int aq_err, ret = 0;
7792
7793         /* Find the channel associated with the macvlan and del mac filter */
7794         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7795                 if (i40e_is_channel_macvlan(ch) &&
7796                     ether_addr_equal(i40e_channel_mac(ch),
7797                                      fwd->netdev->dev_addr)) {
7798                         ret = i40e_del_macvlan_filter(hw, ch->seid,
7799                                                       i40e_channel_mac(ch),
7800                                                       &aq_err);
7801                         if (!ret) {
7802                                 /* Reset queue contexts */
7803                                 i40e_reset_ch_rings(vsi, ch);
7804                                 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7805                                 netdev_unbind_sb_channel(netdev, fwd->netdev);
7806                                 netdev_set_sb_channel(fwd->netdev, 0);
7807                                 kfree(ch->fwd);
7808                                 ch->fwd = NULL;
7809                         } else {
7810                                 dev_info(&pf->pdev->dev,
7811                                          "Error deleting mac filter on macvlan err %s, aq_err %s\n",
7812                                           i40e_stat_str(hw, ret),
7813                                           i40e_aq_str(hw, aq_err));
7814                         }
7815                         break;
7816                 }
7817         }
7818 }
7819
7820 /**
7821  * i40e_setup_tc - configure multiple traffic classes
7822  * @netdev: net device to configure
7823  * @type_data: tc offload data
7824  **/
7825 static int i40e_setup_tc(struct net_device *netdev, void *type_data)
7826 {
7827         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
7828         struct i40e_netdev_priv *np = netdev_priv(netdev);
7829         struct i40e_vsi *vsi = np->vsi;
7830         struct i40e_pf *pf = vsi->back;
7831         u8 enabled_tc = 0, num_tc, hw;
7832         bool need_reset = false;
7833         int old_queue_pairs;
7834         int ret = -EINVAL;
7835         u16 mode;
7836         int i;
7837
7838         old_queue_pairs = vsi->num_queue_pairs;
7839         num_tc = mqprio_qopt->qopt.num_tc;
7840         hw = mqprio_qopt->qopt.hw;
7841         mode = mqprio_qopt->mode;
7842         if (!hw) {
7843                 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
7844                 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));
7845                 goto config_tc;
7846         }
7847
7848         /* Check if MFP enabled */
7849         if (pf->flags & I40E_FLAG_MFP_ENABLED) {
7850                 netdev_info(netdev,
7851                             "Configuring TC not supported in MFP mode\n");
7852                 return ret;
7853         }
7854         switch (mode) {
7855         case TC_MQPRIO_MODE_DCB:
7856                 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
7857
7858                 /* Check if DCB enabled to continue */
7859                 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
7860                         netdev_info(netdev,
7861                                     "DCB is not enabled for adapter\n");
7862                         return ret;
7863                 }
7864
7865                 /* Check whether tc count is within enabled limit */
7866                 if (num_tc > i40e_pf_get_num_tc(pf)) {
7867                         netdev_info(netdev,
7868                                     "TC count greater than enabled on link for adapter\n");
7869                         return ret;
7870                 }
7871                 break;
7872         case TC_MQPRIO_MODE_CHANNEL:
7873                 if (pf->flags & I40E_FLAG_DCB_ENABLED) {
7874                         netdev_info(netdev,
7875                                     "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
7876                         return ret;
7877                 }
7878                 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7879                         return ret;
7880                 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);
7881                 if (ret)
7882                         return ret;
7883                 memcpy(&vsi->mqprio_qopt, mqprio_qopt,
7884                        sizeof(*mqprio_qopt));
7885                 pf->flags |= I40E_FLAG_TC_MQPRIO;
7886                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7887                 break;
7888         default:
7889                 return -EINVAL;
7890         }
7891
7892 config_tc:
7893         /* Generate TC map for number of tc requested */
7894         for (i = 0; i < num_tc; i++)
7895                 enabled_tc |= BIT(i);
7896
7897         /* Requesting same TC configuration as already enabled */
7898         if (enabled_tc == vsi->tc_config.enabled_tc &&
7899             mode != TC_MQPRIO_MODE_CHANNEL)
7900                 return 0;
7901
7902         /* Quiesce VSI queues */
7903         i40e_quiesce_vsi(vsi);
7904
7905         if (!hw && !(pf->flags & I40E_FLAG_TC_MQPRIO))
7906                 i40e_remove_queue_channels(vsi);
7907
7908         /* Configure VSI for enabled TCs */
7909         ret = i40e_vsi_config_tc(vsi, enabled_tc);
7910         if (ret) {
7911                 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
7912                             vsi->seid);
7913                 need_reset = true;
7914                 goto exit;
7915         } else {
7916                 dev_info(&vsi->back->pdev->dev,
7917                          "Setup channel (id:%u) utilizing num_queues %d\n",
7918                          vsi->seid, vsi->tc_config.tc_info[0].qcount);
7919         }
7920
7921         if (pf->flags & I40E_FLAG_TC_MQPRIO) {
7922                 if (vsi->mqprio_qopt.max_rate[0]) {
7923                         u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
7924
7925                         do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
7926                         ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
7927                         if (!ret) {
7928                                 u64 credits = max_tx_rate;
7929
7930                                 do_div(credits, I40E_BW_CREDIT_DIVISOR);
7931                                 dev_dbg(&vsi->back->pdev->dev,
7932                                         "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
7933                                         max_tx_rate,
7934                                         credits,
7935                                         vsi->seid);
7936                         } else {
7937                                 need_reset = true;
7938                                 goto exit;
7939                         }
7940                 }
7941                 ret = i40e_configure_queue_channels(vsi);
7942                 if (ret) {
7943                         vsi->num_queue_pairs = old_queue_pairs;
7944                         netdev_info(netdev,
7945                                     "Failed configuring queue channels\n");
7946                         need_reset = true;
7947                         goto exit;
7948                 }
7949         }
7950
7951 exit:
7952         /* Reset the configuration data to defaults, only TC0 is enabled */
7953         if (need_reset) {
7954                 i40e_vsi_set_default_tc_config(vsi);
7955                 need_reset = false;
7956         }
7957
7958         /* Unquiesce VSI */
7959         i40e_unquiesce_vsi(vsi);
7960         return ret;
7961 }
7962
7963 /**
7964  * i40e_set_cld_element - sets cloud filter element data
7965  * @filter: cloud filter rule
7966  * @cld: ptr to cloud filter element data
7967  *
7968  * This is helper function to copy data into cloud filter element
7969  **/
7970 static inline void
7971 i40e_set_cld_element(struct i40e_cloud_filter *filter,
7972                      struct i40e_aqc_cloud_filters_element_data *cld)
7973 {
7974         u32 ipa;
7975         int i;
7976
7977         memset(cld, 0, sizeof(*cld));
7978         ether_addr_copy(cld->outer_mac, filter->dst_mac);
7979         ether_addr_copy(cld->inner_mac, filter->src_mac);
7980
7981         if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)
7982                 return;
7983
7984         if (filter->n_proto == ETH_P_IPV6) {
7985 #define IPV6_MAX_INDEX  (ARRAY_SIZE(filter->dst_ipv6) - 1)
7986                 for (i = 0; i < ARRAY_SIZE(filter->dst_ipv6); i++) {
7987                         ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
7988
7989                         *(__le32 *)&cld->ipaddr.raw_v6.data[i * 2] = cpu_to_le32(ipa);
7990                 }
7991         } else {
7992                 ipa = be32_to_cpu(filter->dst_ipv4);
7993
7994                 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
7995         }
7996
7997         cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));
7998
7999         /* tenant_id is not supported by FW now, once the support is enabled
8000          * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
8001          */
8002         if (filter->tenant_id)
8003                 return;
8004 }
8005
8006 /**
8007  * i40e_add_del_cloud_filter - Add/del cloud filter
8008  * @vsi: pointer to VSI
8009  * @filter: cloud filter rule
8010  * @add: if true, add, if false, delete
8011  *
8012  * Add or delete a cloud filter for a specific flow spec.
8013  * Returns 0 if the filter were successfully added.
8014  **/
8015 int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
8016                               struct i40e_cloud_filter *filter, bool add)
8017 {
8018         struct i40e_aqc_cloud_filters_element_data cld_filter;
8019         struct i40e_pf *pf = vsi->back;
8020         int ret;
8021         static const u16 flag_table[128] = {
8022                 [I40E_CLOUD_FILTER_FLAGS_OMAC]  =
8023                         I40E_AQC_ADD_CLOUD_FILTER_OMAC,
8024                 [I40E_CLOUD_FILTER_FLAGS_IMAC]  =
8025                         I40E_AQC_ADD_CLOUD_FILTER_IMAC,
8026                 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN]  =
8027                         I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,
8028                 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =
8029                         I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,
8030                 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =
8031                         I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,
8032                 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =
8033                         I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,
8034                 [I40E_CLOUD_FILTER_FLAGS_IIP] =
8035                         I40E_AQC_ADD_CLOUD_FILTER_IIP,
8036         };
8037
8038         if (filter->flags >= ARRAY_SIZE(flag_table))
8039                 return I40E_ERR_CONFIG;
8040
8041         memset(&cld_filter, 0, sizeof(cld_filter));
8042
8043         /* copy element needed to add cloud filter from filter */
8044         i40e_set_cld_element(filter, &cld_filter);
8045
8046         if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)
8047                 cld_filter.flags = cpu_to_le16(filter->tunnel_type <<
8048                                              I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);
8049
8050         if (filter->n_proto == ETH_P_IPV6)
8051                 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8052                                                 I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8053         else
8054                 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8055                                                 I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8056
8057         if (add)
8058                 ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,
8059                                                 &cld_filter, 1);
8060         else
8061                 ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,
8062                                                 &cld_filter, 1);
8063         if (ret)
8064                 dev_dbg(&pf->pdev->dev,
8065                         "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
8066                         add ? "add" : "delete", filter->dst_port, ret,
8067                         pf->hw.aq.asq_last_status);
8068         else
8069                 dev_info(&pf->pdev->dev,
8070                          "%s cloud filter for VSI: %d\n",
8071                          add ? "Added" : "Deleted", filter->seid);
8072         return ret;
8073 }
8074
8075 /**
8076  * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
8077  * @vsi: pointer to VSI
8078  * @filter: cloud filter rule
8079  * @add: if true, add, if false, delete
8080  *
8081  * Add or delete a cloud filter for a specific flow spec using big buffer.
8082  * Returns 0 if the filter were successfully added.
8083  **/
8084 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
8085                                       struct i40e_cloud_filter *filter,
8086                                       bool add)
8087 {
8088         struct i40e_aqc_cloud_filters_element_bb cld_filter;
8089         struct i40e_pf *pf = vsi->back;
8090         int ret;
8091
8092         /* Both (src/dst) valid mac_addr are not supported */
8093         if ((is_valid_ether_addr(filter->dst_mac) &&
8094              is_valid_ether_addr(filter->src_mac)) ||
8095             (is_multicast_ether_addr(filter->dst_mac) &&
8096              is_multicast_ether_addr(filter->src_mac)))
8097                 return -EOPNOTSUPP;
8098
8099         /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
8100          * ports are not supported via big buffer now.
8101          */
8102         if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP)
8103                 return -EOPNOTSUPP;
8104
8105         /* adding filter using src_port/src_ip is not supported at this stage */
8106         if (filter->src_port ||
8107             (filter->src_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8108             !ipv6_addr_any(&filter->ip.v6.src_ip6))
8109                 return -EOPNOTSUPP;
8110
8111         memset(&cld_filter, 0, sizeof(cld_filter));
8112
8113         /* copy element needed to add cloud filter from filter */
8114         i40e_set_cld_element(filter, &cld_filter.element);
8115
8116         if (is_valid_ether_addr(filter->dst_mac) ||
8117             is_valid_ether_addr(filter->src_mac) ||
8118             is_multicast_ether_addr(filter->dst_mac) ||
8119             is_multicast_ether_addr(filter->src_mac)) {
8120                 /* MAC + IP : unsupported mode */
8121                 if (filter->dst_ipv4)
8122                         return -EOPNOTSUPP;
8123
8124                 /* since we validated that L4 port must be valid before
8125                  * we get here, start with respective "flags" value
8126                  * and update if vlan is present or not
8127                  */
8128                 cld_filter.element.flags =
8129                         cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);
8130
8131                 if (filter->vlan_id) {
8132                         cld_filter.element.flags =
8133                         cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
8134                 }
8135
8136         } else if ((filter->dst_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8137                    !ipv6_addr_any(&filter->ip.v6.dst_ip6)) {
8138                 cld_filter.element.flags =
8139                                 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
8140                 if (filter->n_proto == ETH_P_IPV6)
8141                         cld_filter.element.flags |=
8142                                 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8143                 else
8144                         cld_filter.element.flags |=
8145                                 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8146         } else {
8147                 dev_err(&pf->pdev->dev,
8148                         "either mac or ip has to be valid for cloud filter\n");
8149                 return -EINVAL;
8150         }
8151
8152         /* Now copy L4 port in Byte 6..7 in general fields */
8153         cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =
8154                                                 be16_to_cpu(filter->dst_port);
8155
8156         if (add) {
8157                 /* Validate current device switch mode, change if necessary */
8158                 ret = i40e_validate_and_set_switch_mode(vsi);
8159                 if (ret) {
8160                         dev_err(&pf->pdev->dev,
8161                                 "failed to set switch mode, ret %d\n",
8162                                 ret);
8163                         return ret;
8164                 }
8165
8166                 ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,
8167                                                    &cld_filter, 1);
8168         } else {
8169                 ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,
8170                                                    &cld_filter, 1);
8171         }
8172
8173         if (ret)
8174                 dev_dbg(&pf->pdev->dev,
8175                         "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
8176                         add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
8177         else
8178                 dev_info(&pf->pdev->dev,
8179                          "%s cloud filter for VSI: %d, L4 port: %d\n",
8180                          add ? "add" : "delete", filter->seid,
8181                          ntohs(filter->dst_port));
8182         return ret;
8183 }
8184
8185 /**
8186  * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
8187  * @vsi: Pointer to VSI
8188  * @f: Pointer to struct flow_cls_offload
8189  * @filter: Pointer to cloud filter structure
8190  *
8191  **/
8192 static int i40e_parse_cls_flower(struct i40e_vsi *vsi,
8193                                  struct flow_cls_offload *f,
8194                                  struct i40e_cloud_filter *filter)
8195 {
8196         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
8197         struct flow_dissector *dissector = rule->match.dissector;
8198         u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;
8199         struct i40e_pf *pf = vsi->back;
8200         u8 field_flags = 0;
8201
8202         if (dissector->used_keys &
8203             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
8204               BIT(FLOW_DISSECTOR_KEY_BASIC) |
8205               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
8206               BIT(FLOW_DISSECTOR_KEY_VLAN) |
8207               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
8208               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
8209               BIT(FLOW_DISSECTOR_KEY_PORTS) |
8210               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID))) {
8211                 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%x\n",
8212                         dissector->used_keys);
8213                 return -EOPNOTSUPP;
8214         }
8215
8216         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
8217                 struct flow_match_enc_keyid match;
8218
8219                 flow_rule_match_enc_keyid(rule, &match);
8220                 if (match.mask->keyid != 0)
8221                         field_flags |= I40E_CLOUD_FIELD_TEN_ID;
8222
8223                 filter->tenant_id = be32_to_cpu(match.key->keyid);
8224         }
8225
8226         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
8227                 struct flow_match_basic match;
8228
8229                 flow_rule_match_basic(rule, &match);
8230                 n_proto_key = ntohs(match.key->n_proto);
8231                 n_proto_mask = ntohs(match.mask->n_proto);
8232
8233                 if (n_proto_key == ETH_P_ALL) {
8234                         n_proto_key = 0;
8235                         n_proto_mask = 0;
8236                 }
8237                 filter->n_proto = n_proto_key & n_proto_mask;
8238                 filter->ip_proto = match.key->ip_proto;
8239         }
8240
8241         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
8242                 struct flow_match_eth_addrs match;
8243
8244                 flow_rule_match_eth_addrs(rule, &match);
8245
8246                 /* use is_broadcast and is_zero to check for all 0xf or 0 */
8247                 if (!is_zero_ether_addr(match.mask->dst)) {
8248                         if (is_broadcast_ether_addr(match.mask->dst)) {
8249                                 field_flags |= I40E_CLOUD_FIELD_OMAC;
8250                         } else {
8251                                 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
8252                                         match.mask->dst);
8253                                 return I40E_ERR_CONFIG;
8254                         }
8255                 }
8256
8257                 if (!is_zero_ether_addr(match.mask->src)) {
8258                         if (is_broadcast_ether_addr(match.mask->src)) {
8259                                 field_flags |= I40E_CLOUD_FIELD_IMAC;
8260                         } else {
8261                                 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
8262                                         match.mask->src);
8263                                 return I40E_ERR_CONFIG;
8264                         }
8265                 }
8266                 ether_addr_copy(filter->dst_mac, match.key->dst);
8267                 ether_addr_copy(filter->src_mac, match.key->src);
8268         }
8269
8270         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
8271                 struct flow_match_vlan match;
8272
8273                 flow_rule_match_vlan(rule, &match);
8274                 if (match.mask->vlan_id) {
8275                         if (match.mask->vlan_id == VLAN_VID_MASK) {
8276                                 field_flags |= I40E_CLOUD_FIELD_IVLAN;
8277
8278                         } else {
8279                                 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
8280                                         match.mask->vlan_id);
8281                                 return I40E_ERR_CONFIG;
8282                         }
8283                 }
8284
8285                 filter->vlan_id = cpu_to_be16(match.key->vlan_id);
8286         }
8287
8288         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
8289                 struct flow_match_control match;
8290
8291                 flow_rule_match_control(rule, &match);
8292                 addr_type = match.key->addr_type;
8293         }
8294
8295         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
8296                 struct flow_match_ipv4_addrs match;
8297
8298                 flow_rule_match_ipv4_addrs(rule, &match);
8299                 if (match.mask->dst) {
8300                         if (match.mask->dst == cpu_to_be32(0xffffffff)) {
8301                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8302                         } else {
8303                                 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n",
8304                                         &match.mask->dst);
8305                                 return I40E_ERR_CONFIG;
8306                         }
8307                 }
8308
8309                 if (match.mask->src) {
8310                         if (match.mask->src == cpu_to_be32(0xffffffff)) {
8311                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8312                         } else {
8313                                 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n",
8314                                         &match.mask->src);
8315                                 return I40E_ERR_CONFIG;
8316                         }
8317                 }
8318
8319                 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) {
8320                         dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
8321                         return I40E_ERR_CONFIG;
8322                 }
8323                 filter->dst_ipv4 = match.key->dst;
8324                 filter->src_ipv4 = match.key->src;
8325         }
8326
8327         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
8328                 struct flow_match_ipv6_addrs match;
8329
8330                 flow_rule_match_ipv6_addrs(rule, &match);
8331
8332                 /* src and dest IPV6 address should not be LOOPBACK
8333                  * (0:0:0:0:0:0:0:1), which can be represented as ::1
8334                  */
8335                 if (ipv6_addr_loopback(&match.key->dst) ||
8336                     ipv6_addr_loopback(&match.key->src)) {
8337                         dev_err(&pf->pdev->dev,
8338                                 "Bad ipv6, addr is LOOPBACK\n");
8339                         return I40E_ERR_CONFIG;
8340                 }
8341                 if (!ipv6_addr_any(&match.mask->dst) ||
8342                     !ipv6_addr_any(&match.mask->src))
8343                         field_flags |= I40E_CLOUD_FIELD_IIP;
8344
8345                 memcpy(&filter->src_ipv6, &match.key->src.s6_addr32,
8346                        sizeof(filter->src_ipv6));
8347                 memcpy(&filter->dst_ipv6, &match.key->dst.s6_addr32,
8348                        sizeof(filter->dst_ipv6));
8349         }
8350
8351         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
8352                 struct flow_match_ports match;
8353
8354                 flow_rule_match_ports(rule, &match);
8355                 if (match.mask->src) {
8356                         if (match.mask->src == cpu_to_be16(0xffff)) {
8357                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8358                         } else {
8359                                 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
8360                                         be16_to_cpu(match.mask->src));
8361                                 return I40E_ERR_CONFIG;
8362                         }
8363                 }
8364
8365                 if (match.mask->dst) {
8366                         if (match.mask->dst == cpu_to_be16(0xffff)) {
8367                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8368                         } else {
8369                                 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
8370                                         be16_to_cpu(match.mask->dst));
8371                                 return I40E_ERR_CONFIG;
8372                         }
8373                 }
8374
8375                 filter->dst_port = match.key->dst;
8376                 filter->src_port = match.key->src;
8377
8378                 switch (filter->ip_proto) {
8379                 case IPPROTO_TCP:
8380                 case IPPROTO_UDP:
8381                         break;
8382                 default:
8383                         dev_err(&pf->pdev->dev,
8384                                 "Only UDP and TCP transport are supported\n");
8385                         return -EINVAL;
8386                 }
8387         }
8388         filter->flags = field_flags;
8389         return 0;
8390 }
8391
8392 /**
8393  * i40e_handle_tclass: Forward to a traffic class on the device
8394  * @vsi: Pointer to VSI
8395  * @tc: traffic class index on the device
8396  * @filter: Pointer to cloud filter structure
8397  *
8398  **/
8399 static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,
8400                               struct i40e_cloud_filter *filter)
8401 {
8402         struct i40e_channel *ch, *ch_tmp;
8403
8404         /* direct to a traffic class on the same device */
8405         if (tc == 0) {
8406                 filter->seid = vsi->seid;
8407                 return 0;
8408         } else if (vsi->tc_config.enabled_tc & BIT(tc)) {
8409                 if (!filter->dst_port) {
8410                         dev_err(&vsi->back->pdev->dev,
8411                                 "Specify destination port to direct to traffic class that is not default\n");
8412                         return -EINVAL;
8413                 }
8414                 if (list_empty(&vsi->ch_list))
8415                         return -EINVAL;
8416                 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,
8417                                          list) {
8418                         if (ch->seid == vsi->tc_seid_map[tc])
8419                                 filter->seid = ch->seid;
8420                 }
8421                 return 0;
8422         }
8423         dev_err(&vsi->back->pdev->dev, "TC is not enabled\n");
8424         return -EINVAL;
8425 }
8426
8427 /**
8428  * i40e_configure_clsflower - Configure tc flower filters
8429  * @vsi: Pointer to VSI
8430  * @cls_flower: Pointer to struct flow_cls_offload
8431  *
8432  **/
8433 static int i40e_configure_clsflower(struct i40e_vsi *vsi,
8434                                     struct flow_cls_offload *cls_flower)
8435 {
8436         int tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid);
8437         struct i40e_cloud_filter *filter = NULL;
8438         struct i40e_pf *pf = vsi->back;
8439         int err = 0;
8440
8441         if (tc < 0) {
8442                 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n");
8443                 return -EOPNOTSUPP;
8444         }
8445
8446         if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
8447             test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
8448                 return -EBUSY;
8449
8450         if (pf->fdir_pf_active_filters ||
8451             (!hlist_empty(&pf->fdir_filter_list))) {
8452                 dev_err(&vsi->back->pdev->dev,
8453                         "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
8454                 return -EINVAL;
8455         }
8456
8457         if (vsi->back->flags & I40E_FLAG_FD_SB_ENABLED) {
8458                 dev_err(&vsi->back->pdev->dev,
8459                         "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
8460                 vsi->back->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8461                 vsi->back->flags |= I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8462         }
8463
8464         filter = kzalloc(sizeof(*filter), GFP_KERNEL);
8465         if (!filter)
8466                 return -ENOMEM;
8467
8468         filter->cookie = cls_flower->cookie;
8469
8470         err = i40e_parse_cls_flower(vsi, cls_flower, filter);
8471         if (err < 0)
8472                 goto err;
8473
8474         err = i40e_handle_tclass(vsi, tc, filter);
8475         if (err < 0)
8476                 goto err;
8477
8478         /* Add cloud filter */
8479         if (filter->dst_port)
8480                 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, true);
8481         else
8482                 err = i40e_add_del_cloud_filter(vsi, filter, true);
8483
8484         if (err) {
8485                 dev_err(&pf->pdev->dev,
8486                         "Failed to add cloud filter, err %s\n",
8487                         i40e_stat_str(&pf->hw, err));
8488                 goto err;
8489         }
8490
8491         /* add filter to the ordered list */
8492         INIT_HLIST_NODE(&filter->cloud_node);
8493
8494         hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);
8495
8496         pf->num_cloud_filters++;
8497
8498         return err;
8499 err:
8500         kfree(filter);
8501         return err;
8502 }
8503
8504 /**
8505  * i40e_find_cloud_filter - Find the could filter in the list
8506  * @vsi: Pointer to VSI
8507  * @cookie: filter specific cookie
8508  *
8509  **/
8510 static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,
8511                                                         unsigned long *cookie)
8512 {
8513         struct i40e_cloud_filter *filter = NULL;
8514         struct hlist_node *node2;
8515
8516         hlist_for_each_entry_safe(filter, node2,
8517                                   &vsi->back->cloud_filter_list, cloud_node)
8518                 if (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie)))
8519                         return filter;
8520         return NULL;
8521 }
8522
8523 /**
8524  * i40e_delete_clsflower - Remove tc flower filters
8525  * @vsi: Pointer to VSI
8526  * @cls_flower: Pointer to struct flow_cls_offload
8527  *
8528  **/
8529 static int i40e_delete_clsflower(struct i40e_vsi *vsi,
8530                                  struct flow_cls_offload *cls_flower)
8531 {
8532         struct i40e_cloud_filter *filter = NULL;
8533         struct i40e_pf *pf = vsi->back;
8534         int err = 0;
8535
8536         filter = i40e_find_cloud_filter(vsi, &cls_flower->cookie);
8537
8538         if (!filter)
8539                 return -EINVAL;
8540
8541         hash_del(&filter->cloud_node);
8542
8543         if (filter->dst_port)
8544                 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, false);
8545         else
8546                 err = i40e_add_del_cloud_filter(vsi, filter, false);
8547
8548         kfree(filter);
8549         if (err) {
8550                 dev_err(&pf->pdev->dev,
8551                         "Failed to delete cloud filter, err %s\n",
8552                         i40e_stat_str(&pf->hw, err));
8553                 return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);
8554         }
8555
8556         pf->num_cloud_filters--;
8557         if (!pf->num_cloud_filters)
8558                 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8559                     !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8560                         pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8561                         pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8562                         pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8563                 }
8564         return 0;
8565 }
8566
8567 /**
8568  * i40e_setup_tc_cls_flower - flower classifier offloads
8569  * @np: net device to configure
8570  * @cls_flower: offload data
8571  **/
8572 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,
8573                                     struct flow_cls_offload *cls_flower)
8574 {
8575         struct i40e_vsi *vsi = np->vsi;
8576
8577         switch (cls_flower->command) {
8578         case FLOW_CLS_REPLACE:
8579                 return i40e_configure_clsflower(vsi, cls_flower);
8580         case FLOW_CLS_DESTROY:
8581                 return i40e_delete_clsflower(vsi, cls_flower);
8582         case FLOW_CLS_STATS:
8583                 return -EOPNOTSUPP;
8584         default:
8585                 return -EOPNOTSUPP;
8586         }
8587 }
8588
8589 static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
8590                                   void *cb_priv)
8591 {
8592         struct i40e_netdev_priv *np = cb_priv;
8593
8594         if (!tc_cls_can_offload_and_chain0(np->vsi->netdev, type_data))
8595                 return -EOPNOTSUPP;
8596
8597         switch (type) {
8598         case TC_SETUP_CLSFLOWER:
8599                 return i40e_setup_tc_cls_flower(np, type_data);
8600
8601         default:
8602                 return -EOPNOTSUPP;
8603         }
8604 }
8605
8606 static LIST_HEAD(i40e_block_cb_list);
8607
8608 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,
8609                            void *type_data)
8610 {
8611         struct i40e_netdev_priv *np = netdev_priv(netdev);
8612
8613         switch (type) {
8614         case TC_SETUP_QDISC_MQPRIO:
8615                 return i40e_setup_tc(netdev, type_data);
8616         case TC_SETUP_BLOCK:
8617                 return flow_block_cb_setup_simple(type_data,
8618                                                   &i40e_block_cb_list,
8619                                                   i40e_setup_tc_block_cb,
8620                                                   np, np, true);
8621         default:
8622                 return -EOPNOTSUPP;
8623         }
8624 }
8625
8626 /**
8627  * i40e_open - Called when a network interface is made active
8628  * @netdev: network interface device structure
8629  *
8630  * The open entry point is called when a network interface is made
8631  * active by the system (IFF_UP).  At this point all resources needed
8632  * for transmit and receive operations are allocated, the interrupt
8633  * handler is registered with the OS, the netdev watchdog subtask is
8634  * enabled, and the stack is notified that the interface is ready.
8635  *
8636  * Returns 0 on success, negative value on failure
8637  **/
8638 int i40e_open(struct net_device *netdev)
8639 {
8640         struct i40e_netdev_priv *np = netdev_priv(netdev);
8641         struct i40e_vsi *vsi = np->vsi;
8642         struct i40e_pf *pf = vsi->back;
8643         int err;
8644
8645         /* disallow open during test or if eeprom is broken */
8646         if (test_bit(__I40E_TESTING, pf->state) ||
8647             test_bit(__I40E_BAD_EEPROM, pf->state))
8648                 return -EBUSY;
8649
8650         netif_carrier_off(netdev);
8651
8652         if (i40e_force_link_state(pf, true))
8653                 return -EAGAIN;
8654
8655         err = i40e_vsi_open(vsi);
8656         if (err)
8657                 return err;
8658
8659         /* configure global TSO hardware offload settings */
8660         wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
8661                                                        TCP_FLAG_FIN) >> 16);
8662         wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
8663                                                        TCP_FLAG_FIN |
8664                                                        TCP_FLAG_CWR) >> 16);
8665         wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
8666         udp_tunnel_get_rx_info(netdev);
8667
8668         return 0;
8669 }
8670
8671 /**
8672  * i40e_vsi_open -
8673  * @vsi: the VSI to open
8674  *
8675  * Finish initialization of the VSI.
8676  *
8677  * Returns 0 on success, negative value on failure
8678  *
8679  * Note: expects to be called while under rtnl_lock()
8680  **/
8681 int i40e_vsi_open(struct i40e_vsi *vsi)
8682 {
8683         struct i40e_pf *pf = vsi->back;
8684         char int_name[I40E_INT_NAME_STR_LEN];
8685         int err;
8686
8687         /* allocate descriptors */
8688         err = i40e_vsi_setup_tx_resources(vsi);
8689         if (err)
8690                 goto err_setup_tx;
8691         err = i40e_vsi_setup_rx_resources(vsi);
8692         if (err)
8693                 goto err_setup_rx;
8694
8695         err = i40e_vsi_configure(vsi);
8696         if (err)
8697                 goto err_setup_rx;
8698
8699         if (vsi->netdev) {
8700                 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
8701                          dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
8702                 err = i40e_vsi_request_irq(vsi, int_name);
8703                 if (err)
8704                         goto err_setup_rx;
8705
8706                 /* Notify the stack of the actual queue counts. */
8707                 err = netif_set_real_num_tx_queues(vsi->netdev,
8708                                                    vsi->num_queue_pairs);
8709                 if (err)
8710                         goto err_set_queues;
8711
8712                 err = netif_set_real_num_rx_queues(vsi->netdev,
8713                                                    vsi->num_queue_pairs);
8714                 if (err)
8715                         goto err_set_queues;
8716
8717         } else if (vsi->type == I40E_VSI_FDIR) {
8718                 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
8719                          dev_driver_string(&pf->pdev->dev),
8720                          dev_name(&pf->pdev->dev));
8721                 err = i40e_vsi_request_irq(vsi, int_name);
8722                 if (err)
8723                         goto err_setup_rx;
8724
8725         } else {
8726                 err = -EINVAL;
8727                 goto err_setup_rx;
8728         }
8729
8730         err = i40e_up_complete(vsi);
8731         if (err)
8732                 goto err_up_complete;
8733
8734         return 0;
8735
8736 err_up_complete:
8737         i40e_down(vsi);
8738 err_set_queues:
8739         i40e_vsi_free_irq(vsi);
8740 err_setup_rx:
8741         i40e_vsi_free_rx_resources(vsi);
8742 err_setup_tx:
8743         i40e_vsi_free_tx_resources(vsi);
8744         if (vsi == pf->vsi[pf->lan_vsi])
8745                 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
8746
8747         return err;
8748 }
8749
8750 /**
8751  * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
8752  * @pf: Pointer to PF
8753  *
8754  * This function destroys the hlist where all the Flow Director
8755  * filters were saved.
8756  **/
8757 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
8758 {
8759         struct i40e_fdir_filter *filter;
8760         struct i40e_flex_pit *pit_entry, *tmp;
8761         struct hlist_node *node2;
8762
8763         hlist_for_each_entry_safe(filter, node2,
8764                                   &pf->fdir_filter_list, fdir_node) {
8765                 hlist_del(&filter->fdir_node);
8766                 kfree(filter);
8767         }
8768
8769         list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
8770                 list_del(&pit_entry->list);
8771                 kfree(pit_entry);
8772         }
8773         INIT_LIST_HEAD(&pf->l3_flex_pit_list);
8774
8775         list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
8776                 list_del(&pit_entry->list);
8777                 kfree(pit_entry);
8778         }
8779         INIT_LIST_HEAD(&pf->l4_flex_pit_list);
8780
8781         pf->fdir_pf_active_filters = 0;
8782         i40e_reset_fdir_filter_cnt(pf);
8783
8784         /* Reprogram the default input set for TCP/IPv4 */
8785         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
8786                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8787                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8788
8789         /* Reprogram the default input set for TCP/IPv6 */
8790         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_TCP,
8791                                 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
8792                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8793
8794         /* Reprogram the default input set for UDP/IPv4 */
8795         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
8796                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8797                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8798
8799         /* Reprogram the default input set for UDP/IPv6 */
8800         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_UDP,
8801                                 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
8802                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8803
8804         /* Reprogram the default input set for SCTP/IPv4 */
8805         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
8806                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8807                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8808
8809         /* Reprogram the default input set for SCTP/IPv6 */
8810         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_SCTP,
8811                                 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
8812                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8813
8814         /* Reprogram the default input set for Other/IPv4 */
8815         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
8816                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8817
8818         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
8819                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8820
8821         /* Reprogram the default input set for Other/IPv6 */
8822         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_OTHER,
8823                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8824
8825         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV6,
8826                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8827 }
8828
8829 /**
8830  * i40e_cloud_filter_exit - Cleans up the cloud filters
8831  * @pf: Pointer to PF
8832  *
8833  * This function destroys the hlist where all the cloud filters
8834  * were saved.
8835  **/
8836 static void i40e_cloud_filter_exit(struct i40e_pf *pf)
8837 {
8838         struct i40e_cloud_filter *cfilter;
8839         struct hlist_node *node;
8840
8841         hlist_for_each_entry_safe(cfilter, node,
8842                                   &pf->cloud_filter_list, cloud_node) {
8843                 hlist_del(&cfilter->cloud_node);
8844                 kfree(cfilter);
8845         }
8846         pf->num_cloud_filters = 0;
8847
8848         if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8849             !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8850                 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8851                 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8852                 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8853         }
8854 }
8855
8856 /**
8857  * i40e_close - Disables a network interface
8858  * @netdev: network interface device structure
8859  *
8860  * The close entry point is called when an interface is de-activated
8861  * by the OS.  The hardware is still under the driver's control, but
8862  * this netdev interface is disabled.
8863  *
8864  * Returns 0, this is not allowed to fail
8865  **/
8866 int i40e_close(struct net_device *netdev)
8867 {
8868         struct i40e_netdev_priv *np = netdev_priv(netdev);
8869         struct i40e_vsi *vsi = np->vsi;
8870
8871         i40e_vsi_close(vsi);
8872
8873         return 0;
8874 }
8875
8876 /**
8877  * i40e_do_reset - Start a PF or Core Reset sequence
8878  * @pf: board private structure
8879  * @reset_flags: which reset is requested
8880  * @lock_acquired: indicates whether or not the lock has been acquired
8881  * before this function was called.
8882  *
8883  * The essential difference in resets is that the PF Reset
8884  * doesn't clear the packet buffers, doesn't reset the PE
8885  * firmware, and doesn't bother the other PFs on the chip.
8886  **/
8887 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
8888 {
8889         u32 val;
8890
8891         /* do the biggest reset indicated */
8892         if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
8893
8894                 /* Request a Global Reset
8895                  *
8896                  * This will start the chip's countdown to the actual full
8897                  * chip reset event, and a warning interrupt to be sent
8898                  * to all PFs, including the requestor.  Our handler
8899                  * for the warning interrupt will deal with the shutdown
8900                  * and recovery of the switch setup.
8901                  */
8902                 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
8903                 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8904                 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
8905                 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
8906
8907         } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
8908
8909                 /* Request a Core Reset
8910                  *
8911                  * Same as Global Reset, except does *not* include the MAC/PHY
8912                  */
8913                 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
8914                 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8915                 val |= I40E_GLGEN_RTRIG_CORER_MASK;
8916                 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
8917                 i40e_flush(&pf->hw);
8918
8919         } else if (reset_flags & I40E_PF_RESET_FLAG) {
8920
8921                 /* Request a PF Reset
8922                  *
8923                  * Resets only the PF-specific registers
8924                  *
8925                  * This goes directly to the tear-down and rebuild of
8926                  * the switch, since we need to do all the recovery as
8927                  * for the Core Reset.
8928                  */
8929                 dev_dbg(&pf->pdev->dev, "PFR requested\n");
8930                 i40e_handle_reset_warning(pf, lock_acquired);
8931
8932         } else if (reset_flags & I40E_PF_RESET_AND_REBUILD_FLAG) {
8933                 /* Request a PF Reset
8934                  *
8935                  * Resets PF and reinitializes PFs VSI.
8936                  */
8937                 i40e_prep_for_reset(pf);
8938                 i40e_reset_and_rebuild(pf, true, lock_acquired);
8939                 dev_info(&pf->pdev->dev,
8940                          pf->flags & I40E_FLAG_DISABLE_FW_LLDP ?
8941                          "FW LLDP is disabled\n" :
8942                          "FW LLDP is enabled\n");
8943
8944         } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
8945                 int v;
8946
8947                 /* Find the VSI(s) that requested a re-init */
8948                 dev_info(&pf->pdev->dev,
8949                          "VSI reinit requested\n");
8950                 for (v = 0; v < pf->num_alloc_vsi; v++) {
8951                         struct i40e_vsi *vsi = pf->vsi[v];
8952
8953                         if (vsi != NULL &&
8954                             test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED,
8955                                                vsi->state))
8956                                 i40e_vsi_reinit_locked(pf->vsi[v]);
8957                 }
8958         } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
8959                 int v;
8960
8961                 /* Find the VSI(s) that needs to be brought down */
8962                 dev_info(&pf->pdev->dev, "VSI down requested\n");
8963                 for (v = 0; v < pf->num_alloc_vsi; v++) {
8964                         struct i40e_vsi *vsi = pf->vsi[v];
8965
8966                         if (vsi != NULL &&
8967                             test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED,
8968                                                vsi->state)) {
8969                                 set_bit(__I40E_VSI_DOWN, vsi->state);
8970                                 i40e_down(vsi);
8971                         }
8972                 }
8973         } else {
8974                 dev_info(&pf->pdev->dev,
8975                          "bad reset request 0x%08x\n", reset_flags);
8976         }
8977 }
8978
8979 #ifdef CONFIG_I40E_DCB
8980 /**
8981  * i40e_dcb_need_reconfig - Check if DCB needs reconfig
8982  * @pf: board private structure
8983  * @old_cfg: current DCB config
8984  * @new_cfg: new DCB config
8985  **/
8986 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
8987                             struct i40e_dcbx_config *old_cfg,
8988                             struct i40e_dcbx_config *new_cfg)
8989 {
8990         bool need_reconfig = false;
8991
8992         /* Check if ETS configuration has changed */
8993         if (memcmp(&new_cfg->etscfg,
8994                    &old_cfg->etscfg,
8995                    sizeof(new_cfg->etscfg))) {
8996                 /* If Priority Table has changed reconfig is needed */
8997                 if (memcmp(&new_cfg->etscfg.prioritytable,
8998                            &old_cfg->etscfg.prioritytable,
8999                            sizeof(new_cfg->etscfg.prioritytable))) {
9000                         need_reconfig = true;
9001                         dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
9002                 }
9003
9004                 if (memcmp(&new_cfg->etscfg.tcbwtable,
9005                            &old_cfg->etscfg.tcbwtable,
9006                            sizeof(new_cfg->etscfg.tcbwtable)))
9007                         dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
9008
9009                 if (memcmp(&new_cfg->etscfg.tsatable,
9010                            &old_cfg->etscfg.tsatable,
9011                            sizeof(new_cfg->etscfg.tsatable)))
9012                         dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
9013         }
9014
9015         /* Check if PFC configuration has changed */
9016         if (memcmp(&new_cfg->pfc,
9017                    &old_cfg->pfc,
9018                    sizeof(new_cfg->pfc))) {
9019                 need_reconfig = true;
9020                 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
9021         }
9022
9023         /* Check if APP Table has changed */
9024         if (memcmp(&new_cfg->app,
9025                    &old_cfg->app,
9026                    sizeof(new_cfg->app))) {
9027                 need_reconfig = true;
9028                 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
9029         }
9030
9031         dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
9032         return need_reconfig;
9033 }
9034
9035 /**
9036  * i40e_handle_lldp_event - Handle LLDP Change MIB event
9037  * @pf: board private structure
9038  * @e: event info posted on ARQ
9039  **/
9040 static int i40e_handle_lldp_event(struct i40e_pf *pf,
9041                                   struct i40e_arq_event_info *e)
9042 {
9043         struct i40e_aqc_lldp_get_mib *mib =
9044                 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
9045         struct i40e_hw *hw = &pf->hw;
9046         struct i40e_dcbx_config tmp_dcbx_cfg;
9047         bool need_reconfig = false;
9048         int ret = 0;
9049         u8 type;
9050
9051         /* X710-T*L 2.5G and 5G speeds don't support DCB */
9052         if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9053             (hw->phy.link_info.link_speed &
9054              ~(I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB)) &&
9055              !(pf->flags & I40E_FLAG_DCB_CAPABLE))
9056                 /* let firmware decide if the DCB should be disabled */
9057                 pf->flags |= I40E_FLAG_DCB_CAPABLE;
9058
9059         /* Not DCB capable or capability disabled */
9060         if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
9061                 return ret;
9062
9063         /* Ignore if event is not for Nearest Bridge */
9064         type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
9065                 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
9066         dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
9067         if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
9068                 return ret;
9069
9070         /* Check MIB Type and return if event for Remote MIB update */
9071         type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
9072         dev_dbg(&pf->pdev->dev,
9073                 "LLDP event mib type %s\n", type ? "remote" : "local");
9074         if (type == I40E_AQ_LLDP_MIB_REMOTE) {
9075                 /* Update the remote cached instance and return */
9076                 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
9077                                 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
9078                                 &hw->remote_dcbx_config);
9079                 goto exit;
9080         }
9081
9082         /* Store the old configuration */
9083         tmp_dcbx_cfg = hw->local_dcbx_config;
9084
9085         /* Reset the old DCBx configuration data */
9086         memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
9087         /* Get updated DCBX data from firmware */
9088         ret = i40e_get_dcb_config(&pf->hw);
9089         if (ret) {
9090                 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9091                 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9092                     (hw->phy.link_info.link_speed &
9093                      (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
9094                         dev_warn(&pf->pdev->dev,
9095                                  "DCB is not supported for X710-T*L 2.5/5G speeds\n");
9096                         pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9097                 } else {
9098                         dev_info(&pf->pdev->dev,
9099                                  "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
9100                                  i40e_stat_str(&pf->hw, ret),
9101                                  i40e_aq_str(&pf->hw,
9102                                              pf->hw.aq.asq_last_status));
9103                 }
9104                 goto exit;
9105         }
9106
9107         /* No change detected in DCBX configs */
9108         if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
9109                     sizeof(tmp_dcbx_cfg))) {
9110                 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
9111                 goto exit;
9112         }
9113
9114         need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
9115                                                &hw->local_dcbx_config);
9116
9117         i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
9118
9119         if (!need_reconfig)
9120                 goto exit;
9121
9122         /* Enable DCB tagging only when more than one TC */
9123         if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
9124                 pf->flags |= I40E_FLAG_DCB_ENABLED;
9125         else
9126                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9127
9128         set_bit(__I40E_PORT_SUSPENDED, pf->state);
9129         /* Reconfiguration needed quiesce all VSIs */
9130         i40e_pf_quiesce_all_vsi(pf);
9131
9132         /* Changes in configuration update VEB/VSI */
9133         i40e_dcb_reconfigure(pf);
9134
9135         ret = i40e_resume_port_tx(pf);
9136
9137         clear_bit(__I40E_PORT_SUSPENDED, pf->state);
9138         /* In case of error no point in resuming VSIs */
9139         if (ret)
9140                 goto exit;
9141
9142         /* Wait for the PF's queues to be disabled */
9143         ret = i40e_pf_wait_queues_disabled(pf);
9144         if (ret) {
9145                 /* Schedule PF reset to recover */
9146                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9147                 i40e_service_event_schedule(pf);
9148         } else {
9149                 i40e_pf_unquiesce_all_vsi(pf);
9150                 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
9151                 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
9152         }
9153
9154 exit:
9155         return ret;
9156 }
9157 #endif /* CONFIG_I40E_DCB */
9158
9159 /**
9160  * i40e_do_reset_safe - Protected reset path for userland calls.
9161  * @pf: board private structure
9162  * @reset_flags: which reset is requested
9163  *
9164  **/
9165 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
9166 {
9167         rtnl_lock();
9168         i40e_do_reset(pf, reset_flags, true);
9169         rtnl_unlock();
9170 }
9171
9172 /**
9173  * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
9174  * @pf: board private structure
9175  * @e: event info posted on ARQ
9176  *
9177  * Handler for LAN Queue Overflow Event generated by the firmware for PF
9178  * and VF queues
9179  **/
9180 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
9181                                            struct i40e_arq_event_info *e)
9182 {
9183         struct i40e_aqc_lan_overflow *data =
9184                 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
9185         u32 queue = le32_to_cpu(data->prtdcb_rupto);
9186         u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
9187         struct i40e_hw *hw = &pf->hw;
9188         struct i40e_vf *vf;
9189         u16 vf_id;
9190
9191         dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
9192                 queue, qtx_ctl);
9193
9194         /* Queue belongs to VF, find the VF and issue VF reset */
9195         if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
9196             >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
9197                 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
9198                          >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
9199                 vf_id -= hw->func_caps.vf_base_id;
9200                 vf = &pf->vf[vf_id];
9201                 i40e_vc_notify_vf_reset(vf);
9202                 /* Allow VF to process pending reset notification */
9203                 msleep(20);
9204                 i40e_reset_vf(vf, false);
9205         }
9206 }
9207
9208 /**
9209  * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
9210  * @pf: board private structure
9211  **/
9212 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
9213 {
9214         u32 val, fcnt_prog;
9215
9216         val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9217         fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
9218         return fcnt_prog;
9219 }
9220
9221 /**
9222  * i40e_get_current_fd_count - Get total FD filters programmed for this PF
9223  * @pf: board private structure
9224  **/
9225 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
9226 {
9227         u32 val, fcnt_prog;
9228
9229         val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9230         fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
9231                     ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
9232                       I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
9233         return fcnt_prog;
9234 }
9235
9236 /**
9237  * i40e_get_global_fd_count - Get total FD filters programmed on device
9238  * @pf: board private structure
9239  **/
9240 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
9241 {
9242         u32 val, fcnt_prog;
9243
9244         val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
9245         fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
9246                     ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
9247                      I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
9248         return fcnt_prog;
9249 }
9250
9251 /**
9252  * i40e_reenable_fdir_sb - Restore FDir SB capability
9253  * @pf: board private structure
9254  **/
9255 static void i40e_reenable_fdir_sb(struct i40e_pf *pf)
9256 {
9257         if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
9258                 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
9259                     (I40E_DEBUG_FD & pf->hw.debug_mask))
9260                         dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
9261 }
9262
9263 /**
9264  * i40e_reenable_fdir_atr - Restore FDir ATR capability
9265  * @pf: board private structure
9266  **/
9267 static void i40e_reenable_fdir_atr(struct i40e_pf *pf)
9268 {
9269         if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) {
9270                 /* ATR uses the same filtering logic as SB rules. It only
9271                  * functions properly if the input set mask is at the default
9272                  * settings. It is safe to restore the default input set
9273                  * because there are no active TCPv4 filter rules.
9274                  */
9275                 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9276                                         I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9277                                         I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9278
9279                 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
9280                     (I40E_DEBUG_FD & pf->hw.debug_mask))
9281                         dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
9282         }
9283 }
9284
9285 /**
9286  * i40e_delete_invalid_filter - Delete an invalid FDIR filter
9287  * @pf: board private structure
9288  * @filter: FDir filter to remove
9289  */
9290 static void i40e_delete_invalid_filter(struct i40e_pf *pf,
9291                                        struct i40e_fdir_filter *filter)
9292 {
9293         /* Update counters */
9294         pf->fdir_pf_active_filters--;
9295         pf->fd_inv = 0;
9296
9297         switch (filter->flow_type) {
9298         case TCP_V4_FLOW:
9299                 pf->fd_tcp4_filter_cnt--;
9300                 break;
9301         case UDP_V4_FLOW:
9302                 pf->fd_udp4_filter_cnt--;
9303                 break;
9304         case SCTP_V4_FLOW:
9305                 pf->fd_sctp4_filter_cnt--;
9306                 break;
9307         case TCP_V6_FLOW:
9308                 pf->fd_tcp6_filter_cnt--;
9309                 break;
9310         case UDP_V6_FLOW:
9311                 pf->fd_udp6_filter_cnt--;
9312                 break;
9313         case SCTP_V6_FLOW:
9314                 pf->fd_udp6_filter_cnt--;
9315                 break;
9316         case IP_USER_FLOW:
9317                 switch (filter->ipl4_proto) {
9318                 case IPPROTO_TCP:
9319                         pf->fd_tcp4_filter_cnt--;
9320                         break;
9321                 case IPPROTO_UDP:
9322                         pf->fd_udp4_filter_cnt--;
9323                         break;
9324                 case IPPROTO_SCTP:
9325                         pf->fd_sctp4_filter_cnt--;
9326                         break;
9327                 case IPPROTO_IP:
9328                         pf->fd_ip4_filter_cnt--;
9329                         break;
9330                 }
9331                 break;
9332         case IPV6_USER_FLOW:
9333                 switch (filter->ipl4_proto) {
9334                 case IPPROTO_TCP:
9335                         pf->fd_tcp6_filter_cnt--;
9336                         break;
9337                 case IPPROTO_UDP:
9338                         pf->fd_udp6_filter_cnt--;
9339                         break;
9340                 case IPPROTO_SCTP:
9341                         pf->fd_sctp6_filter_cnt--;
9342                         break;
9343                 case IPPROTO_IP:
9344                         pf->fd_ip6_filter_cnt--;
9345                         break;
9346                 }
9347                 break;
9348         }
9349
9350         /* Remove the filter from the list and free memory */
9351         hlist_del(&filter->fdir_node);
9352         kfree(filter);
9353 }
9354
9355 /**
9356  * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
9357  * @pf: board private structure
9358  **/
9359 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
9360 {
9361         struct i40e_fdir_filter *filter;
9362         u32 fcnt_prog, fcnt_avail;
9363         struct hlist_node *node;
9364
9365         if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9366                 return;
9367
9368         /* Check if we have enough room to re-enable FDir SB capability. */
9369         fcnt_prog = i40e_get_global_fd_count(pf);
9370         fcnt_avail = pf->fdir_pf_filter_count;
9371         if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
9372             (pf->fd_add_err == 0) ||
9373             (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt))
9374                 i40e_reenable_fdir_sb(pf);
9375
9376         /* We should wait for even more space before re-enabling ATR.
9377          * Additionally, we cannot enable ATR as long as we still have TCP SB
9378          * rules active.
9379          */
9380         if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) &&
9381             pf->fd_tcp4_filter_cnt == 0 && pf->fd_tcp6_filter_cnt == 0)
9382                 i40e_reenable_fdir_atr(pf);
9383
9384         /* if hw had a problem adding a filter, delete it */
9385         if (pf->fd_inv > 0) {
9386                 hlist_for_each_entry_safe(filter, node,
9387                                           &pf->fdir_filter_list, fdir_node)
9388                         if (filter->fd_id == pf->fd_inv)
9389                                 i40e_delete_invalid_filter(pf, filter);
9390         }
9391 }
9392
9393 #define I40E_MIN_FD_FLUSH_INTERVAL 10
9394 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
9395 /**
9396  * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
9397  * @pf: board private structure
9398  **/
9399 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
9400 {
9401         unsigned long min_flush_time;
9402         int flush_wait_retry = 50;
9403         bool disable_atr = false;
9404         int fd_room;
9405         int reg;
9406
9407         if (!time_after(jiffies, pf->fd_flush_timestamp +
9408                                  (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
9409                 return;
9410
9411         /* If the flush is happening too quick and we have mostly SB rules we
9412          * should not re-enable ATR for some time.
9413          */
9414         min_flush_time = pf->fd_flush_timestamp +
9415                          (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
9416         fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
9417
9418         if (!(time_after(jiffies, min_flush_time)) &&
9419             (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
9420                 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9421                         dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
9422                 disable_atr = true;
9423         }
9424
9425         pf->fd_flush_timestamp = jiffies;
9426         set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9427         /* flush all filters */
9428         wr32(&pf->hw, I40E_PFQF_CTL_1,
9429              I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
9430         i40e_flush(&pf->hw);
9431         pf->fd_flush_cnt++;
9432         pf->fd_add_err = 0;
9433         do {
9434                 /* Check FD flush status every 5-6msec */
9435                 usleep_range(5000, 6000);
9436                 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
9437                 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
9438                         break;
9439         } while (flush_wait_retry--);
9440         if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
9441                 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
9442         } else {
9443                 /* replay sideband filters */
9444                 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
9445                 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
9446                         clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9447                 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
9448                 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9449                         dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
9450         }
9451 }
9452
9453 /**
9454  * i40e_get_current_atr_cnt - Get the count of total FD ATR filters programmed
9455  * @pf: board private structure
9456  **/
9457 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
9458 {
9459         return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
9460 }
9461
9462 /**
9463  * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
9464  * @pf: board private structure
9465  **/
9466 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
9467 {
9468
9469         /* if interface is down do nothing */
9470         if (test_bit(__I40E_DOWN, pf->state))
9471                 return;
9472
9473         if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9474                 i40e_fdir_flush_and_replay(pf);
9475
9476         i40e_fdir_check_and_reenable(pf);
9477
9478 }
9479
9480 /**
9481  * i40e_vsi_link_event - notify VSI of a link event
9482  * @vsi: vsi to be notified
9483  * @link_up: link up or down
9484  **/
9485 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
9486 {
9487         if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state))
9488                 return;
9489
9490         switch (vsi->type) {
9491         case I40E_VSI_MAIN:
9492                 if (!vsi->netdev || !vsi->netdev_registered)
9493                         break;
9494
9495                 if (link_up) {
9496                         netif_carrier_on(vsi->netdev);
9497                         netif_tx_wake_all_queues(vsi->netdev);
9498                 } else {
9499                         netif_carrier_off(vsi->netdev);
9500                         netif_tx_stop_all_queues(vsi->netdev);
9501                 }
9502                 break;
9503
9504         case I40E_VSI_SRIOV:
9505         case I40E_VSI_VMDQ2:
9506         case I40E_VSI_CTRL:
9507         case I40E_VSI_IWARP:
9508         case I40E_VSI_MIRROR:
9509         default:
9510                 /* there is no notification for other VSIs */
9511                 break;
9512         }
9513 }
9514
9515 /**
9516  * i40e_veb_link_event - notify elements on the veb of a link event
9517  * @veb: veb to be notified
9518  * @link_up: link up or down
9519  **/
9520 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
9521 {
9522         struct i40e_pf *pf;
9523         int i;
9524
9525         if (!veb || !veb->pf)
9526                 return;
9527         pf = veb->pf;
9528
9529         /* depth first... */
9530         for (i = 0; i < I40E_MAX_VEB; i++)
9531                 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
9532                         i40e_veb_link_event(pf->veb[i], link_up);
9533
9534         /* ... now the local VSIs */
9535         for (i = 0; i < pf->num_alloc_vsi; i++)
9536                 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
9537                         i40e_vsi_link_event(pf->vsi[i], link_up);
9538 }
9539
9540 /**
9541  * i40e_link_event - Update netif_carrier status
9542  * @pf: board private structure
9543  **/
9544 static void i40e_link_event(struct i40e_pf *pf)
9545 {
9546         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9547         u8 new_link_speed, old_link_speed;
9548         i40e_status status;
9549         bool new_link, old_link;
9550 #ifdef CONFIG_I40E_DCB
9551         int err;
9552 #endif /* CONFIG_I40E_DCB */
9553
9554         /* set this to force the get_link_status call to refresh state */
9555         pf->hw.phy.get_link_info = true;
9556         old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
9557         status = i40e_get_link_status(&pf->hw, &new_link);
9558
9559         /* On success, disable temp link polling */
9560         if (status == I40E_SUCCESS) {
9561                 clear_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9562         } else {
9563                 /* Enable link polling temporarily until i40e_get_link_status
9564                  * returns I40E_SUCCESS
9565                  */
9566                 set_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9567                 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
9568                         status);
9569                 return;
9570         }
9571
9572         old_link_speed = pf->hw.phy.link_info_old.link_speed;
9573         new_link_speed = pf->hw.phy.link_info.link_speed;
9574
9575         if (new_link == old_link &&
9576             new_link_speed == old_link_speed &&
9577             (test_bit(__I40E_VSI_DOWN, vsi->state) ||
9578              new_link == netif_carrier_ok(vsi->netdev)))
9579                 return;
9580
9581         i40e_print_link_message(vsi, new_link);
9582
9583         /* Notify the base of the switch tree connected to
9584          * the link.  Floating VEBs are not notified.
9585          */
9586         if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
9587                 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
9588         else
9589                 i40e_vsi_link_event(vsi, new_link);
9590
9591         if (pf->vf)
9592                 i40e_vc_notify_link_state(pf);
9593
9594         if (pf->flags & I40E_FLAG_PTP)
9595                 i40e_ptp_set_increment(pf);
9596 #ifdef CONFIG_I40E_DCB
9597         if (new_link == old_link)
9598                 return;
9599         /* Not SW DCB so firmware will take care of default settings */
9600         if (pf->dcbx_cap & DCB_CAP_DCBX_LLD_MANAGED)
9601                 return;
9602
9603         /* We cover here only link down, as after link up in case of SW DCB
9604          * SW LLDP agent will take care of setting it up
9605          */
9606         if (!new_link) {
9607                 dev_dbg(&pf->pdev->dev, "Reconfig DCB to single TC as result of Link Down\n");
9608                 memset(&pf->tmp_cfg, 0, sizeof(pf->tmp_cfg));
9609                 err = i40e_dcb_sw_default_config(pf);
9610                 if (err) {
9611                         pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
9612                                        I40E_FLAG_DCB_ENABLED);
9613                 } else {
9614                         pf->dcbx_cap = DCB_CAP_DCBX_HOST |
9615                                        DCB_CAP_DCBX_VER_IEEE;
9616                         pf->flags |= I40E_FLAG_DCB_CAPABLE;
9617                         pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9618                 }
9619         }
9620 #endif /* CONFIG_I40E_DCB */
9621 }
9622
9623 /**
9624  * i40e_watchdog_subtask - periodic checks not using event driven response
9625  * @pf: board private structure
9626  **/
9627 static void i40e_watchdog_subtask(struct i40e_pf *pf)
9628 {
9629         int i;
9630
9631         /* if interface is down do nothing */
9632         if (test_bit(__I40E_DOWN, pf->state) ||
9633             test_bit(__I40E_CONFIG_BUSY, pf->state))
9634                 return;
9635
9636         /* make sure we don't do these things too often */
9637         if (time_before(jiffies, (pf->service_timer_previous +
9638                                   pf->service_timer_period)))
9639                 return;
9640         pf->service_timer_previous = jiffies;
9641
9642         if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
9643             test_bit(__I40E_TEMP_LINK_POLLING, pf->state))
9644                 i40e_link_event(pf);
9645
9646         /* Update the stats for active netdevs so the network stack
9647          * can look at updated numbers whenever it cares to
9648          */
9649         for (i = 0; i < pf->num_alloc_vsi; i++)
9650                 if (pf->vsi[i] && pf->vsi[i]->netdev)
9651                         i40e_update_stats(pf->vsi[i]);
9652
9653         if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
9654                 /* Update the stats for the active switching components */
9655                 for (i = 0; i < I40E_MAX_VEB; i++)
9656                         if (pf->veb[i])
9657                                 i40e_update_veb_stats(pf->veb[i]);
9658         }
9659
9660         i40e_ptp_rx_hang(pf);
9661         i40e_ptp_tx_hang(pf);
9662 }
9663
9664 /**
9665  * i40e_reset_subtask - Set up for resetting the device and driver
9666  * @pf: board private structure
9667  **/
9668 static void i40e_reset_subtask(struct i40e_pf *pf)
9669 {
9670         u32 reset_flags = 0;
9671
9672         if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
9673                 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
9674                 clear_bit(__I40E_REINIT_REQUESTED, pf->state);
9675         }
9676         if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
9677                 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
9678                 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9679         }
9680         if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
9681                 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
9682                 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
9683         }
9684         if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
9685                 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
9686                 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
9687         }
9688         if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
9689                 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
9690                 clear_bit(__I40E_DOWN_REQUESTED, pf->state);
9691         }
9692
9693         /* If there's a recovery already waiting, it takes
9694          * precedence before starting a new reset sequence.
9695          */
9696         if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
9697                 i40e_prep_for_reset(pf);
9698                 i40e_reset(pf);
9699                 i40e_rebuild(pf, false, false);
9700         }
9701
9702         /* If we're already down or resetting, just bail */
9703         if (reset_flags &&
9704             !test_bit(__I40E_DOWN, pf->state) &&
9705             !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
9706                 i40e_do_reset(pf, reset_flags, false);
9707         }
9708 }
9709
9710 /**
9711  * i40e_handle_link_event - Handle link event
9712  * @pf: board private structure
9713  * @e: event info posted on ARQ
9714  **/
9715 static void i40e_handle_link_event(struct i40e_pf *pf,
9716                                    struct i40e_arq_event_info *e)
9717 {
9718         struct i40e_aqc_get_link_status *status =
9719                 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
9720
9721         /* Do a new status request to re-enable LSE reporting
9722          * and load new status information into the hw struct
9723          * This completely ignores any state information
9724          * in the ARQ event info, instead choosing to always
9725          * issue the AQ update link status command.
9726          */
9727         i40e_link_event(pf);
9728
9729         /* Check if module meets thermal requirements */
9730         if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) {
9731                 dev_err(&pf->pdev->dev,
9732                         "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
9733                 dev_err(&pf->pdev->dev,
9734                         "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9735         } else {
9736                 /* check for unqualified module, if link is down, suppress
9737                  * the message if link was forced to be down.
9738                  */
9739                 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
9740                     (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
9741                     (!(status->link_info & I40E_AQ_LINK_UP)) &&
9742                     (!(pf->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED))) {
9743                         dev_err(&pf->pdev->dev,
9744                                 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
9745                         dev_err(&pf->pdev->dev,
9746                                 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9747                 }
9748         }
9749 }
9750
9751 /**
9752  * i40e_clean_adminq_subtask - Clean the AdminQ rings
9753  * @pf: board private structure
9754  **/
9755 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
9756 {
9757         struct i40e_arq_event_info event;
9758         struct i40e_hw *hw = &pf->hw;
9759         u16 pending, i = 0;
9760         i40e_status ret;
9761         u16 opcode;
9762         u32 oldval;
9763         u32 val;
9764
9765         /* Do not run clean AQ when PF reset fails */
9766         if (test_bit(__I40E_RESET_FAILED, pf->state))
9767                 return;
9768
9769         /* check for error indications */
9770         val = rd32(&pf->hw, pf->hw.aq.arq.len);
9771         oldval = val;
9772         if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
9773                 if (hw->debug_mask & I40E_DEBUG_AQ)
9774                         dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
9775                 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
9776         }
9777         if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
9778                 if (hw->debug_mask & I40E_DEBUG_AQ)
9779                         dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
9780                 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
9781                 pf->arq_overflows++;
9782         }
9783         if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
9784                 if (hw->debug_mask & I40E_DEBUG_AQ)
9785                         dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
9786                 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
9787         }
9788         if (oldval != val)
9789                 wr32(&pf->hw, pf->hw.aq.arq.len, val);
9790
9791         val = rd32(&pf->hw, pf->hw.aq.asq.len);
9792         oldval = val;
9793         if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
9794                 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9795                         dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
9796                 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
9797         }
9798         if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
9799                 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9800                         dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
9801                 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
9802         }
9803         if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
9804                 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9805                         dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
9806                 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
9807         }
9808         if (oldval != val)
9809                 wr32(&pf->hw, pf->hw.aq.asq.len, val);
9810
9811         event.buf_len = I40E_MAX_AQ_BUF_SIZE;
9812         event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
9813         if (!event.msg_buf)
9814                 return;
9815
9816         do {
9817                 ret = i40e_clean_arq_element(hw, &event, &pending);
9818                 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
9819                         break;
9820                 else if (ret) {
9821                         dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
9822                         break;
9823                 }
9824
9825                 opcode = le16_to_cpu(event.desc.opcode);
9826                 switch (opcode) {
9827
9828                 case i40e_aqc_opc_get_link_status:
9829                         rtnl_lock();
9830                         i40e_handle_link_event(pf, &event);
9831                         rtnl_unlock();
9832                         break;
9833                 case i40e_aqc_opc_send_msg_to_pf:
9834                         ret = i40e_vc_process_vf_msg(pf,
9835                                         le16_to_cpu(event.desc.retval),
9836                                         le32_to_cpu(event.desc.cookie_high),
9837                                         le32_to_cpu(event.desc.cookie_low),
9838                                         event.msg_buf,
9839                                         event.msg_len);
9840                         break;
9841                 case i40e_aqc_opc_lldp_update_mib:
9842                         dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
9843 #ifdef CONFIG_I40E_DCB
9844                         rtnl_lock();
9845                         i40e_handle_lldp_event(pf, &event);
9846                         rtnl_unlock();
9847 #endif /* CONFIG_I40E_DCB */
9848                         break;
9849                 case i40e_aqc_opc_event_lan_overflow:
9850                         dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
9851                         i40e_handle_lan_overflow_event(pf, &event);
9852                         break;
9853                 case i40e_aqc_opc_send_msg_to_peer:
9854                         dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
9855                         break;
9856                 case i40e_aqc_opc_nvm_erase:
9857                 case i40e_aqc_opc_nvm_update:
9858                 case i40e_aqc_opc_oem_post_update:
9859                         i40e_debug(&pf->hw, I40E_DEBUG_NVM,
9860                                    "ARQ NVM operation 0x%04x completed\n",
9861                                    opcode);
9862                         break;
9863                 default:
9864                         dev_info(&pf->pdev->dev,
9865                                  "ARQ: Unknown event 0x%04x ignored\n",
9866                                  opcode);
9867                         break;
9868                 }
9869         } while (i++ < pf->adminq_work_limit);
9870
9871         if (i < pf->adminq_work_limit)
9872                 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
9873
9874         /* re-enable Admin queue interrupt cause */
9875         val = rd32(hw, I40E_PFINT_ICR0_ENA);
9876         val |=  I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
9877         wr32(hw, I40E_PFINT_ICR0_ENA, val);
9878         i40e_flush(hw);
9879
9880         kfree(event.msg_buf);
9881 }
9882
9883 /**
9884  * i40e_verify_eeprom - make sure eeprom is good to use
9885  * @pf: board private structure
9886  **/
9887 static void i40e_verify_eeprom(struct i40e_pf *pf)
9888 {
9889         int err;
9890
9891         err = i40e_diag_eeprom_test(&pf->hw);
9892         if (err) {
9893                 /* retry in case of garbage read */
9894                 err = i40e_diag_eeprom_test(&pf->hw);
9895                 if (err) {
9896                         dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
9897                                  err);
9898                         set_bit(__I40E_BAD_EEPROM, pf->state);
9899                 }
9900         }
9901
9902         if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
9903                 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
9904                 clear_bit(__I40E_BAD_EEPROM, pf->state);
9905         }
9906 }
9907
9908 /**
9909  * i40e_enable_pf_switch_lb
9910  * @pf: pointer to the PF structure
9911  *
9912  * enable switch loop back or die - no point in a return value
9913  **/
9914 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
9915 {
9916         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9917         struct i40e_vsi_context ctxt;
9918         int ret;
9919
9920         ctxt.seid = pf->main_vsi_seid;
9921         ctxt.pf_num = pf->hw.pf_id;
9922         ctxt.vf_num = 0;
9923         ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9924         if (ret) {
9925                 dev_info(&pf->pdev->dev,
9926                          "couldn't get PF vsi config, err %s aq_err %s\n",
9927                          i40e_stat_str(&pf->hw, ret),
9928                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9929                 return;
9930         }
9931         ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9932         ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9933         ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9934
9935         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
9936         if (ret) {
9937                 dev_info(&pf->pdev->dev,
9938                          "update vsi switch failed, err %s aq_err %s\n",
9939                          i40e_stat_str(&pf->hw, ret),
9940                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9941         }
9942 }
9943
9944 /**
9945  * i40e_disable_pf_switch_lb
9946  * @pf: pointer to the PF structure
9947  *
9948  * disable switch loop back or die - no point in a return value
9949  **/
9950 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
9951 {
9952         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9953         struct i40e_vsi_context ctxt;
9954         int ret;
9955
9956         ctxt.seid = pf->main_vsi_seid;
9957         ctxt.pf_num = pf->hw.pf_id;
9958         ctxt.vf_num = 0;
9959         ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9960         if (ret) {
9961                 dev_info(&pf->pdev->dev,
9962                          "couldn't get PF vsi config, err %s aq_err %s\n",
9963                          i40e_stat_str(&pf->hw, ret),
9964                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9965                 return;
9966         }
9967         ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9968         ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9969         ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9970
9971         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
9972         if (ret) {
9973                 dev_info(&pf->pdev->dev,
9974                          "update vsi switch failed, err %s aq_err %s\n",
9975                          i40e_stat_str(&pf->hw, ret),
9976                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9977         }
9978 }
9979
9980 /**
9981  * i40e_config_bridge_mode - Configure the HW bridge mode
9982  * @veb: pointer to the bridge instance
9983  *
9984  * Configure the loop back mode for the LAN VSI that is downlink to the
9985  * specified HW bridge instance. It is expected this function is called
9986  * when a new HW bridge is instantiated.
9987  **/
9988 static void i40e_config_bridge_mode(struct i40e_veb *veb)
9989 {
9990         struct i40e_pf *pf = veb->pf;
9991
9992         if (pf->hw.debug_mask & I40E_DEBUG_LAN)
9993                 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
9994                          veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9995         if (veb->bridge_mode & BRIDGE_MODE_VEPA)
9996                 i40e_disable_pf_switch_lb(pf);
9997         else
9998                 i40e_enable_pf_switch_lb(pf);
9999 }
10000
10001 /**
10002  * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
10003  * @veb: pointer to the VEB instance
10004  *
10005  * This is a recursive function that first builds the attached VSIs then
10006  * recurses in to build the next layer of VEB.  We track the connections
10007  * through our own index numbers because the seid's from the HW could
10008  * change across the reset.
10009  **/
10010 static int i40e_reconstitute_veb(struct i40e_veb *veb)
10011 {
10012         struct i40e_vsi *ctl_vsi = NULL;
10013         struct i40e_pf *pf = veb->pf;
10014         int v, veb_idx;
10015         int ret;
10016
10017         /* build VSI that owns this VEB, temporarily attached to base VEB */
10018         for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
10019                 if (pf->vsi[v] &&
10020                     pf->vsi[v]->veb_idx == veb->idx &&
10021                     pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
10022                         ctl_vsi = pf->vsi[v];
10023                         break;
10024                 }
10025         }
10026         if (!ctl_vsi) {
10027                 dev_info(&pf->pdev->dev,
10028                          "missing owner VSI for veb_idx %d\n", veb->idx);
10029                 ret = -ENOENT;
10030                 goto end_reconstitute;
10031         }
10032         if (ctl_vsi != pf->vsi[pf->lan_vsi])
10033                 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10034         ret = i40e_add_vsi(ctl_vsi);
10035         if (ret) {
10036                 dev_info(&pf->pdev->dev,
10037                          "rebuild of veb_idx %d owner VSI failed: %d\n",
10038                          veb->idx, ret);
10039                 goto end_reconstitute;
10040         }
10041         i40e_vsi_reset_stats(ctl_vsi);
10042
10043         /* create the VEB in the switch and move the VSI onto the VEB */
10044         ret = i40e_add_veb(veb, ctl_vsi);
10045         if (ret)
10046                 goto end_reconstitute;
10047
10048         if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10049                 veb->bridge_mode = BRIDGE_MODE_VEB;
10050         else
10051                 veb->bridge_mode = BRIDGE_MODE_VEPA;
10052         i40e_config_bridge_mode(veb);
10053
10054         /* create the remaining VSIs attached to this VEB */
10055         for (v = 0; v < pf->num_alloc_vsi; v++) {
10056                 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
10057                         continue;
10058
10059                 if (pf->vsi[v]->veb_idx == veb->idx) {
10060                         struct i40e_vsi *vsi = pf->vsi[v];
10061
10062                         vsi->uplink_seid = veb->seid;
10063                         ret = i40e_add_vsi(vsi);
10064                         if (ret) {
10065                                 dev_info(&pf->pdev->dev,
10066                                          "rebuild of vsi_idx %d failed: %d\n",
10067                                          v, ret);
10068                                 goto end_reconstitute;
10069                         }
10070                         i40e_vsi_reset_stats(vsi);
10071                 }
10072         }
10073
10074         /* create any VEBs attached to this VEB - RECURSION */
10075         for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10076                 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
10077                         pf->veb[veb_idx]->uplink_seid = veb->seid;
10078                         ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
10079                         if (ret)
10080                                 break;
10081                 }
10082         }
10083
10084 end_reconstitute:
10085         return ret;
10086 }
10087
10088 /**
10089  * i40e_get_capabilities - get info about the HW
10090  * @pf: the PF struct
10091  * @list_type: AQ capability to be queried
10092  **/
10093 static int i40e_get_capabilities(struct i40e_pf *pf,
10094                                  enum i40e_admin_queue_opc list_type)
10095 {
10096         struct i40e_aqc_list_capabilities_element_resp *cap_buf;
10097         u16 data_size;
10098         int buf_len;
10099         int err;
10100
10101         buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
10102         do {
10103                 cap_buf = kzalloc(buf_len, GFP_KERNEL);
10104                 if (!cap_buf)
10105                         return -ENOMEM;
10106
10107                 /* this loads the data into the hw struct for us */
10108                 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
10109                                                     &data_size, list_type,
10110                                                     NULL);
10111                 /* data loaded, buffer no longer needed */
10112                 kfree(cap_buf);
10113
10114                 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
10115                         /* retry with a larger buffer */
10116                         buf_len = data_size;
10117                 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK || err) {
10118                         dev_info(&pf->pdev->dev,
10119                                  "capability discovery failed, err %s aq_err %s\n",
10120                                  i40e_stat_str(&pf->hw, err),
10121                                  i40e_aq_str(&pf->hw,
10122                                              pf->hw.aq.asq_last_status));
10123                         return -ENODEV;
10124                 }
10125         } while (err);
10126
10127         if (pf->hw.debug_mask & I40E_DEBUG_USER) {
10128                 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10129                         dev_info(&pf->pdev->dev,
10130                                  "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
10131                                  pf->hw.pf_id, pf->hw.func_caps.num_vfs,
10132                                  pf->hw.func_caps.num_msix_vectors,
10133                                  pf->hw.func_caps.num_msix_vectors_vf,
10134                                  pf->hw.func_caps.fd_filters_guaranteed,
10135                                  pf->hw.func_caps.fd_filters_best_effort,
10136                                  pf->hw.func_caps.num_tx_qp,
10137                                  pf->hw.func_caps.num_vsis);
10138                 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) {
10139                         dev_info(&pf->pdev->dev,
10140                                  "switch_mode=0x%04x, function_valid=0x%08x\n",
10141                                  pf->hw.dev_caps.switch_mode,
10142                                  pf->hw.dev_caps.valid_functions);
10143                         dev_info(&pf->pdev->dev,
10144                                  "SR-IOV=%d, num_vfs for all function=%u\n",
10145                                  pf->hw.dev_caps.sr_iov_1_1,
10146                                  pf->hw.dev_caps.num_vfs);
10147                         dev_info(&pf->pdev->dev,
10148                                  "num_vsis=%u, num_rx:%u, num_tx=%u\n",
10149                                  pf->hw.dev_caps.num_vsis,
10150                                  pf->hw.dev_caps.num_rx_qp,
10151                                  pf->hw.dev_caps.num_tx_qp);
10152                 }
10153         }
10154         if (list_type == i40e_aqc_opc_list_func_capabilities) {
10155 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
10156                        + pf->hw.func_caps.num_vfs)
10157                 if (pf->hw.revision_id == 0 &&
10158                     pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
10159                         dev_info(&pf->pdev->dev,
10160                                  "got num_vsis %d, setting num_vsis to %d\n",
10161                                  pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
10162                         pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
10163                 }
10164         }
10165         return 0;
10166 }
10167
10168 static int i40e_vsi_clear(struct i40e_vsi *vsi);
10169
10170 /**
10171  * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
10172  * @pf: board private structure
10173  **/
10174 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
10175 {
10176         struct i40e_vsi *vsi;
10177
10178         /* quick workaround for an NVM issue that leaves a critical register
10179          * uninitialized
10180          */
10181         if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
10182                 static const u32 hkey[] = {
10183                         0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
10184                         0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
10185                         0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
10186                         0x95b3a76d};
10187                 int i;
10188
10189                 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
10190                         wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
10191         }
10192
10193         if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
10194                 return;
10195
10196         /* find existing VSI and see if it needs configuring */
10197         vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10198
10199         /* create a new VSI if none exists */
10200         if (!vsi) {
10201                 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
10202                                      pf->vsi[pf->lan_vsi]->seid, 0);
10203                 if (!vsi) {
10204                         dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
10205                         pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10206                         pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
10207                         return;
10208                 }
10209         }
10210
10211         i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
10212 }
10213
10214 /**
10215  * i40e_fdir_teardown - release the Flow Director resources
10216  * @pf: board private structure
10217  **/
10218 static void i40e_fdir_teardown(struct i40e_pf *pf)
10219 {
10220         struct i40e_vsi *vsi;
10221
10222         i40e_fdir_filter_exit(pf);
10223         vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10224         if (vsi)
10225                 i40e_vsi_release(vsi);
10226 }
10227
10228 /**
10229  * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
10230  * @vsi: PF main vsi
10231  * @seid: seid of main or channel VSIs
10232  *
10233  * Rebuilds cloud filters associated with main VSI and channel VSIs if they
10234  * existed before reset
10235  **/
10236 static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)
10237 {
10238         struct i40e_cloud_filter *cfilter;
10239         struct i40e_pf *pf = vsi->back;
10240         struct hlist_node *node;
10241         i40e_status ret;
10242
10243         /* Add cloud filters back if they exist */
10244         hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
10245                                   cloud_node) {
10246                 if (cfilter->seid != seid)
10247                         continue;
10248
10249                 if (cfilter->dst_port)
10250                         ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
10251                                                                 true);
10252                 else
10253                         ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
10254
10255                 if (ret) {
10256                         dev_dbg(&pf->pdev->dev,
10257                                 "Failed to rebuild cloud filter, err %s aq_err %s\n",
10258                                 i40e_stat_str(&pf->hw, ret),
10259                                 i40e_aq_str(&pf->hw,
10260                                             pf->hw.aq.asq_last_status));
10261                         return ret;
10262                 }
10263         }
10264         return 0;
10265 }
10266
10267 /**
10268  * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
10269  * @vsi: PF main vsi
10270  *
10271  * Rebuilds channel VSIs if they existed before reset
10272  **/
10273 static int i40e_rebuild_channels(struct i40e_vsi *vsi)
10274 {
10275         struct i40e_channel *ch, *ch_tmp;
10276         i40e_status ret;
10277
10278         if (list_empty(&vsi->ch_list))
10279                 return 0;
10280
10281         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
10282                 if (!ch->initialized)
10283                         break;
10284                 /* Proceed with creation of channel (VMDq2) VSI */
10285                 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch);
10286                 if (ret) {
10287                         dev_info(&vsi->back->pdev->dev,
10288                                  "failed to rebuild channels using uplink_seid %u\n",
10289                                  vsi->uplink_seid);
10290                         return ret;
10291                 }
10292                 /* Reconfigure TX queues using QTX_CTL register */
10293                 ret = i40e_channel_config_tx_ring(vsi->back, vsi, ch);
10294                 if (ret) {
10295                         dev_info(&vsi->back->pdev->dev,
10296                                  "failed to configure TX rings for channel %u\n",
10297                                  ch->seid);
10298                         return ret;
10299                 }
10300                 /* update 'next_base_queue' */
10301                 vsi->next_base_queue = vsi->next_base_queue +
10302                                                         ch->num_queue_pairs;
10303                 if (ch->max_tx_rate) {
10304                         u64 credits = ch->max_tx_rate;
10305
10306                         if (i40e_set_bw_limit(vsi, ch->seid,
10307                                               ch->max_tx_rate))
10308                                 return -EINVAL;
10309
10310                         do_div(credits, I40E_BW_CREDIT_DIVISOR);
10311                         dev_dbg(&vsi->back->pdev->dev,
10312                                 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10313                                 ch->max_tx_rate,
10314                                 credits,
10315                                 ch->seid);
10316                 }
10317                 ret = i40e_rebuild_cloud_filters(vsi, ch->seid);
10318                 if (ret) {
10319                         dev_dbg(&vsi->back->pdev->dev,
10320                                 "Failed to rebuild cloud filters for channel VSI %u\n",
10321                                 ch->seid);
10322                         return ret;
10323                 }
10324         }
10325         return 0;
10326 }
10327
10328 /**
10329  * i40e_prep_for_reset - prep for the core to reset
10330  * @pf: board private structure
10331  *
10332  * Close up the VFs and other things in prep for PF Reset.
10333   **/
10334 static void i40e_prep_for_reset(struct i40e_pf *pf)
10335 {
10336         struct i40e_hw *hw = &pf->hw;
10337         i40e_status ret = 0;
10338         u32 v;
10339
10340         clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
10341         if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
10342                 return;
10343         if (i40e_check_asq_alive(&pf->hw))
10344                 i40e_vc_notify_reset(pf);
10345
10346         dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
10347
10348         /* quiesce the VSIs and their queues that are not already DOWN */
10349         i40e_pf_quiesce_all_vsi(pf);
10350
10351         for (v = 0; v < pf->num_alloc_vsi; v++) {
10352                 if (pf->vsi[v])
10353                         pf->vsi[v]->seid = 0;
10354         }
10355
10356         i40e_shutdown_adminq(&pf->hw);
10357
10358         /* call shutdown HMC */
10359         if (hw->hmc.hmc_obj) {
10360                 ret = i40e_shutdown_lan_hmc(hw);
10361                 if (ret)
10362                         dev_warn(&pf->pdev->dev,
10363                                  "shutdown_lan_hmc failed: %d\n", ret);
10364         }
10365
10366         /* Save the current PTP time so that we can restore the time after the
10367          * reset completes.
10368          */
10369         i40e_ptp_save_hw_time(pf);
10370 }
10371
10372 /**
10373  * i40e_send_version - update firmware with driver version
10374  * @pf: PF struct
10375  */
10376 static void i40e_send_version(struct i40e_pf *pf)
10377 {
10378         struct i40e_driver_version dv;
10379
10380         dv.major_version = 0xff;
10381         dv.minor_version = 0xff;
10382         dv.build_version = 0xff;
10383         dv.subbuild_version = 0;
10384         strlcpy(dv.driver_string, UTS_RELEASE, sizeof(dv.driver_string));
10385         i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
10386 }
10387
10388 /**
10389  * i40e_get_oem_version - get OEM specific version information
10390  * @hw: pointer to the hardware structure
10391  **/
10392 static void i40e_get_oem_version(struct i40e_hw *hw)
10393 {
10394         u16 block_offset = 0xffff;
10395         u16 block_length = 0;
10396         u16 capabilities = 0;
10397         u16 gen_snap = 0;
10398         u16 release = 0;
10399
10400 #define I40E_SR_NVM_OEM_VERSION_PTR             0x1B
10401 #define I40E_NVM_OEM_LENGTH_OFFSET              0x00
10402 #define I40E_NVM_OEM_CAPABILITIES_OFFSET        0x01
10403 #define I40E_NVM_OEM_GEN_OFFSET                 0x02
10404 #define I40E_NVM_OEM_RELEASE_OFFSET             0x03
10405 #define I40E_NVM_OEM_CAPABILITIES_MASK          0x000F
10406 #define I40E_NVM_OEM_LENGTH                     3
10407
10408         /* Check if pointer to OEM version block is valid. */
10409         i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset);
10410         if (block_offset == 0xffff)
10411                 return;
10412
10413         /* Check if OEM version block has correct length. */
10414         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET,
10415                            &block_length);
10416         if (block_length < I40E_NVM_OEM_LENGTH)
10417                 return;
10418
10419         /* Check if OEM version format is as expected. */
10420         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET,
10421                            &capabilities);
10422         if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0)
10423                 return;
10424
10425         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET,
10426                            &gen_snap);
10427         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET,
10428                            &release);
10429         hw->nvm.oem_ver = (gen_snap << I40E_OEM_SNAP_SHIFT) | release;
10430         hw->nvm.eetrack = I40E_OEM_EETRACK_ID;
10431 }
10432
10433 /**
10434  * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
10435  * @pf: board private structure
10436  **/
10437 static int i40e_reset(struct i40e_pf *pf)
10438 {
10439         struct i40e_hw *hw = &pf->hw;
10440         i40e_status ret;
10441
10442         ret = i40e_pf_reset(hw);
10443         if (ret) {
10444                 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
10445                 set_bit(__I40E_RESET_FAILED, pf->state);
10446                 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10447         } else {
10448                 pf->pfr_count++;
10449         }
10450         return ret;
10451 }
10452
10453 /**
10454  * i40e_rebuild - rebuild using a saved config
10455  * @pf: board private structure
10456  * @reinit: if the Main VSI needs to re-initialized.
10457  * @lock_acquired: indicates whether or not the lock has been acquired
10458  * before this function was called.
10459  **/
10460 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
10461 {
10462         int old_recovery_mode_bit = test_bit(__I40E_RECOVERY_MODE, pf->state);
10463         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10464         struct i40e_hw *hw = &pf->hw;
10465         i40e_status ret;
10466         u32 val;
10467         int v;
10468
10469         if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
10470             i40e_check_recovery_mode(pf)) {
10471                 i40e_set_ethtool_ops(pf->vsi[pf->lan_vsi]->netdev);
10472         }
10473
10474         if (test_bit(__I40E_DOWN, pf->state) &&
10475             !test_bit(__I40E_RECOVERY_MODE, pf->state) &&
10476             !old_recovery_mode_bit)
10477                 goto clear_recovery;
10478         dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
10479
10480         /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
10481         ret = i40e_init_adminq(&pf->hw);
10482         if (ret) {
10483                 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
10484                          i40e_stat_str(&pf->hw, ret),
10485                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10486                 goto clear_recovery;
10487         }
10488         i40e_get_oem_version(&pf->hw);
10489
10490         if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
10491             ((hw->aq.fw_maj_ver == 4 && hw->aq.fw_min_ver <= 33) ||
10492              hw->aq.fw_maj_ver < 4) && hw->mac.type == I40E_MAC_XL710) {
10493                 /* The following delay is necessary for 4.33 firmware and older
10494                  * to recover after EMP reset. 200 ms should suffice but we
10495                  * put here 300 ms to be sure that FW is ready to operate
10496                  * after reset.
10497                  */
10498                 mdelay(300);
10499         }
10500
10501         /* re-verify the eeprom if we just had an EMP reset */
10502         if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state))
10503                 i40e_verify_eeprom(pf);
10504
10505         /* if we are going out of or into recovery mode we have to act
10506          * accordingly with regard to resources initialization
10507          * and deinitialization
10508          */
10509         if (test_bit(__I40E_RECOVERY_MODE, pf->state) ||
10510             old_recovery_mode_bit) {
10511                 if (i40e_get_capabilities(pf,
10512                                           i40e_aqc_opc_list_func_capabilities))
10513                         goto end_unlock;
10514
10515                 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10516                         /* we're staying in recovery mode so we'll reinitialize
10517                          * misc vector here
10518                          */
10519                         if (i40e_setup_misc_vector_for_recovery_mode(pf))
10520                                 goto end_unlock;
10521                 } else {
10522                         if (!lock_acquired)
10523                                 rtnl_lock();
10524                         /* we're going out of recovery mode so we'll free
10525                          * the IRQ allocated specifically for recovery mode
10526                          * and restore the interrupt scheme
10527                          */
10528                         free_irq(pf->pdev->irq, pf);
10529                         i40e_clear_interrupt_scheme(pf);
10530                         if (i40e_restore_interrupt_scheme(pf))
10531                                 goto end_unlock;
10532                 }
10533
10534                 /* tell the firmware that we're starting */
10535                 i40e_send_version(pf);
10536
10537                 /* bail out in case recovery mode was detected, as there is
10538                  * no need for further configuration.
10539                  */
10540                 goto end_unlock;
10541         }
10542
10543         i40e_clear_pxe_mode(hw);
10544         ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
10545         if (ret)
10546                 goto end_core_reset;
10547
10548         ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10549                                 hw->func_caps.num_rx_qp, 0, 0);
10550         if (ret) {
10551                 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
10552                 goto end_core_reset;
10553         }
10554         ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10555         if (ret) {
10556                 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
10557                 goto end_core_reset;
10558         }
10559
10560 #ifdef CONFIG_I40E_DCB
10561         /* Enable FW to write a default DCB config on link-up
10562          * unless I40E_FLAG_TC_MQPRIO was enabled or DCB
10563          * is not supported with new link speed
10564          */
10565         if (pf->flags & I40E_FLAG_TC_MQPRIO) {
10566                 i40e_aq_set_dcb_parameters(hw, false, NULL);
10567         } else {
10568                 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
10569                     (hw->phy.link_info.link_speed &
10570                      (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
10571                         i40e_aq_set_dcb_parameters(hw, false, NULL);
10572                         dev_warn(&pf->pdev->dev,
10573                                  "DCB is not supported for X710-T*L 2.5/5G speeds\n");
10574                         pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10575                 } else {
10576                         i40e_aq_set_dcb_parameters(hw, true, NULL);
10577                         ret = i40e_init_pf_dcb(pf);
10578                         if (ret) {
10579                                 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n",
10580                                          ret);
10581                                 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10582                                 /* Continue without DCB enabled */
10583                         }
10584                 }
10585         }
10586
10587 #endif /* CONFIG_I40E_DCB */
10588         if (!lock_acquired)
10589                 rtnl_lock();
10590         ret = i40e_setup_pf_switch(pf, reinit, true);
10591         if (ret)
10592                 goto end_unlock;
10593
10594         /* The driver only wants link up/down and module qualification
10595          * reports from firmware.  Note the negative logic.
10596          */
10597         ret = i40e_aq_set_phy_int_mask(&pf->hw,
10598                                        ~(I40E_AQ_EVENT_LINK_UPDOWN |
10599                                          I40E_AQ_EVENT_MEDIA_NA |
10600                                          I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10601         if (ret)
10602                 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10603                          i40e_stat_str(&pf->hw, ret),
10604                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10605
10606         /* Rebuild the VSIs and VEBs that existed before reset.
10607          * They are still in our local switch element arrays, so only
10608          * need to rebuild the switch model in the HW.
10609          *
10610          * If there were VEBs but the reconstitution failed, we'll try
10611          * to recover minimal use by getting the basic PF VSI working.
10612          */
10613         if (vsi->uplink_seid != pf->mac_seid) {
10614                 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
10615                 /* find the one VEB connected to the MAC, and find orphans */
10616                 for (v = 0; v < I40E_MAX_VEB; v++) {
10617                         if (!pf->veb[v])
10618                                 continue;
10619
10620                         if (pf->veb[v]->uplink_seid == pf->mac_seid ||
10621                             pf->veb[v]->uplink_seid == 0) {
10622                                 ret = i40e_reconstitute_veb(pf->veb[v]);
10623
10624                                 if (!ret)
10625                                         continue;
10626
10627                                 /* If Main VEB failed, we're in deep doodoo,
10628                                  * so give up rebuilding the switch and set up
10629                                  * for minimal rebuild of PF VSI.
10630                                  * If orphan failed, we'll report the error
10631                                  * but try to keep going.
10632                                  */
10633                                 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
10634                                         dev_info(&pf->pdev->dev,
10635                                                  "rebuild of switch failed: %d, will try to set up simple PF connection\n",
10636                                                  ret);
10637                                         vsi->uplink_seid = pf->mac_seid;
10638                                         break;
10639                                 } else if (pf->veb[v]->uplink_seid == 0) {
10640                                         dev_info(&pf->pdev->dev,
10641                                                  "rebuild of orphan VEB failed: %d\n",
10642                                                  ret);
10643                                 }
10644                         }
10645                 }
10646         }
10647
10648         if (vsi->uplink_seid == pf->mac_seid) {
10649                 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
10650                 /* no VEB, so rebuild only the Main VSI */
10651                 ret = i40e_add_vsi(vsi);
10652                 if (ret) {
10653                         dev_info(&pf->pdev->dev,
10654                                  "rebuild of Main VSI failed: %d\n", ret);
10655                         goto end_unlock;
10656                 }
10657         }
10658
10659         if (vsi->mqprio_qopt.max_rate[0]) {
10660                 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
10661                 u64 credits = 0;
10662
10663                 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
10664                 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
10665                 if (ret)
10666                         goto end_unlock;
10667
10668                 credits = max_tx_rate;
10669                 do_div(credits, I40E_BW_CREDIT_DIVISOR);
10670                 dev_dbg(&vsi->back->pdev->dev,
10671                         "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10672                         max_tx_rate,
10673                         credits,
10674                         vsi->seid);
10675         }
10676
10677         ret = i40e_rebuild_cloud_filters(vsi, vsi->seid);
10678         if (ret)
10679                 goto end_unlock;
10680
10681         /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
10682          * for this main VSI if they exist
10683          */
10684         ret = i40e_rebuild_channels(vsi);
10685         if (ret)
10686                 goto end_unlock;
10687
10688         /* Reconfigure hardware for allowing smaller MSS in the case
10689          * of TSO, so that we avoid the MDD being fired and causing
10690          * a reset in the case of small MSS+TSO.
10691          */
10692 #define I40E_REG_MSS          0x000E64DC
10693 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
10694 #define I40E_64BYTE_MSS       0x400000
10695         val = rd32(hw, I40E_REG_MSS);
10696         if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10697                 val &= ~I40E_REG_MSS_MIN_MASK;
10698                 val |= I40E_64BYTE_MSS;
10699                 wr32(hw, I40E_REG_MSS, val);
10700         }
10701
10702         if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
10703                 msleep(75);
10704                 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10705                 if (ret)
10706                         dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10707                                  i40e_stat_str(&pf->hw, ret),
10708                                  i40e_aq_str(&pf->hw,
10709                                              pf->hw.aq.asq_last_status));
10710         }
10711         /* reinit the misc interrupt */
10712         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
10713                 ret = i40e_setup_misc_vector(pf);
10714
10715         /* Add a filter to drop all Flow control frames from any VSI from being
10716          * transmitted. By doing so we stop a malicious VF from sending out
10717          * PAUSE or PFC frames and potentially controlling traffic for other
10718          * PF/VF VSIs.
10719          * The FW can still send Flow control frames if enabled.
10720          */
10721         i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
10722                                                        pf->main_vsi_seid);
10723
10724         /* restart the VSIs that were rebuilt and running before the reset */
10725         i40e_pf_unquiesce_all_vsi(pf);
10726
10727         /* Release the RTNL lock before we start resetting VFs */
10728         if (!lock_acquired)
10729                 rtnl_unlock();
10730
10731         /* Restore promiscuous settings */
10732         ret = i40e_set_promiscuous(pf, pf->cur_promisc);
10733         if (ret)
10734                 dev_warn(&pf->pdev->dev,
10735                          "Failed to restore promiscuous setting: %s, err %s aq_err %s\n",
10736                          pf->cur_promisc ? "on" : "off",
10737                          i40e_stat_str(&pf->hw, ret),
10738                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10739
10740         i40e_reset_all_vfs(pf, true);
10741
10742         /* tell the firmware that we're starting */
10743         i40e_send_version(pf);
10744
10745         /* We've already released the lock, so don't do it again */
10746         goto end_core_reset;
10747
10748 end_unlock:
10749         if (!lock_acquired)
10750                 rtnl_unlock();
10751 end_core_reset:
10752         clear_bit(__I40E_RESET_FAILED, pf->state);
10753 clear_recovery:
10754         clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10755         clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state);
10756 }
10757
10758 /**
10759  * i40e_reset_and_rebuild - reset and rebuild using a saved config
10760  * @pf: board private structure
10761  * @reinit: if the Main VSI needs to re-initialized.
10762  * @lock_acquired: indicates whether or not the lock has been acquired
10763  * before this function was called.
10764  **/
10765 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
10766                                    bool lock_acquired)
10767 {
10768         int ret;
10769         /* Now we wait for GRST to settle out.
10770          * We don't have to delete the VEBs or VSIs from the hw switch
10771          * because the reset will make them disappear.
10772          */
10773         ret = i40e_reset(pf);
10774         if (!ret)
10775                 i40e_rebuild(pf, reinit, lock_acquired);
10776 }
10777
10778 /**
10779  * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
10780  * @pf: board private structure
10781  *
10782  * Close up the VFs and other things in prep for a Core Reset,
10783  * then get ready to rebuild the world.
10784  * @lock_acquired: indicates whether or not the lock has been acquired
10785  * before this function was called.
10786  **/
10787 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
10788 {
10789         i40e_prep_for_reset(pf);
10790         i40e_reset_and_rebuild(pf, false, lock_acquired);
10791 }
10792
10793 /**
10794  * i40e_handle_mdd_event
10795  * @pf: pointer to the PF structure
10796  *
10797  * Called from the MDD irq handler to identify possibly malicious vfs
10798  **/
10799 static void i40e_handle_mdd_event(struct i40e_pf *pf)
10800 {
10801         struct i40e_hw *hw = &pf->hw;
10802         bool mdd_detected = false;
10803         struct i40e_vf *vf;
10804         u32 reg;
10805         int i;
10806
10807         if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state))
10808                 return;
10809
10810         /* find what triggered the MDD event */
10811         reg = rd32(hw, I40E_GL_MDET_TX);
10812         if (reg & I40E_GL_MDET_TX_VALID_MASK) {
10813                 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
10814                                 I40E_GL_MDET_TX_PF_NUM_SHIFT;
10815                 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
10816                                 I40E_GL_MDET_TX_VF_NUM_SHIFT;
10817                 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
10818                                 I40E_GL_MDET_TX_EVENT_SHIFT;
10819                 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
10820                                 I40E_GL_MDET_TX_QUEUE_SHIFT) -
10821                                 pf->hw.func_caps.base_queue;
10822                 if (netif_msg_tx_err(pf))
10823                         dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
10824                                  event, queue, pf_num, vf_num);
10825                 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
10826                 mdd_detected = true;
10827         }
10828         reg = rd32(hw, I40E_GL_MDET_RX);
10829         if (reg & I40E_GL_MDET_RX_VALID_MASK) {
10830                 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
10831                                 I40E_GL_MDET_RX_FUNCTION_SHIFT;
10832                 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
10833                                 I40E_GL_MDET_RX_EVENT_SHIFT;
10834                 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
10835                                 I40E_GL_MDET_RX_QUEUE_SHIFT) -
10836                                 pf->hw.func_caps.base_queue;
10837                 if (netif_msg_rx_err(pf))
10838                         dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
10839                                  event, queue, func);
10840                 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
10841                 mdd_detected = true;
10842         }
10843
10844         if (mdd_detected) {
10845                 reg = rd32(hw, I40E_PF_MDET_TX);
10846                 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
10847                         wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
10848                         dev_dbg(&pf->pdev->dev, "TX driver issue detected on PF\n");
10849                 }
10850                 reg = rd32(hw, I40E_PF_MDET_RX);
10851                 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
10852                         wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
10853                         dev_dbg(&pf->pdev->dev, "RX driver issue detected on PF\n");
10854                 }
10855         }
10856
10857         /* see if one of the VFs needs its hand slapped */
10858         for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
10859                 vf = &(pf->vf[i]);
10860                 reg = rd32(hw, I40E_VP_MDET_TX(i));
10861                 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
10862                         wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
10863                         vf->num_mdd_events++;
10864                         dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
10865                                  i);
10866                         dev_info(&pf->pdev->dev,
10867                                  "Use PF Control I/F to re-enable the VF\n");
10868                         set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
10869                 }
10870
10871                 reg = rd32(hw, I40E_VP_MDET_RX(i));
10872                 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
10873                         wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
10874                         vf->num_mdd_events++;
10875                         dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
10876                                  i);
10877                         dev_info(&pf->pdev->dev,
10878                                  "Use PF Control I/F to re-enable the VF\n");
10879                         set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
10880                 }
10881         }
10882
10883         /* re-enable mdd interrupt cause */
10884         clear_bit(__I40E_MDD_EVENT_PENDING, pf->state);
10885         reg = rd32(hw, I40E_PFINT_ICR0_ENA);
10886         reg |=  I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
10887         wr32(hw, I40E_PFINT_ICR0_ENA, reg);
10888         i40e_flush(hw);
10889 }
10890
10891 /**
10892  * i40e_service_task - Run the driver's async subtasks
10893  * @work: pointer to work_struct containing our data
10894  **/
10895 static void i40e_service_task(struct work_struct *work)
10896 {
10897         struct i40e_pf *pf = container_of(work,
10898                                           struct i40e_pf,
10899                                           service_task);
10900         unsigned long start_time = jiffies;
10901
10902         /* don't bother with service tasks if a reset is in progress */
10903         if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
10904             test_bit(__I40E_SUSPENDED, pf->state))
10905                 return;
10906
10907         if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state))
10908                 return;
10909
10910         if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10911                 i40e_detect_recover_hung(pf->vsi[pf->lan_vsi]);
10912                 i40e_sync_filters_subtask(pf);
10913                 i40e_reset_subtask(pf);
10914                 i40e_handle_mdd_event(pf);
10915                 i40e_vc_process_vflr_event(pf);
10916                 i40e_watchdog_subtask(pf);
10917                 i40e_fdir_reinit_subtask(pf);
10918                 if (test_and_clear_bit(__I40E_CLIENT_RESET, pf->state)) {
10919                         /* Client subtask will reopen next time through. */
10920                         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi],
10921                                                            true);
10922                 } else {
10923                         i40e_client_subtask(pf);
10924                         if (test_and_clear_bit(__I40E_CLIENT_L2_CHANGE,
10925                                                pf->state))
10926                                 i40e_notify_client_of_l2_param_changes(
10927                                                                 pf->vsi[pf->lan_vsi]);
10928                 }
10929                 i40e_sync_filters_subtask(pf);
10930         } else {
10931                 i40e_reset_subtask(pf);
10932         }
10933
10934         i40e_clean_adminq_subtask(pf);
10935
10936         /* flush memory to make sure state is correct before next watchdog */
10937         smp_mb__before_atomic();
10938         clear_bit(__I40E_SERVICE_SCHED, pf->state);
10939
10940         /* If the tasks have taken longer than one timer cycle or there
10941          * is more work to be done, reschedule the service task now
10942          * rather than wait for the timer to tick again.
10943          */
10944         if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
10945             test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state)             ||
10946             test_bit(__I40E_MDD_EVENT_PENDING, pf->state)                ||
10947             test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
10948                 i40e_service_event_schedule(pf);
10949 }
10950
10951 /**
10952  * i40e_service_timer - timer callback
10953  * @t: timer list pointer
10954  **/
10955 static void i40e_service_timer(struct timer_list *t)
10956 {
10957         struct i40e_pf *pf = from_timer(pf, t, service_timer);
10958
10959         mod_timer(&pf->service_timer,
10960                   round_jiffies(jiffies + pf->service_timer_period));
10961         i40e_service_event_schedule(pf);
10962 }
10963
10964 /**
10965  * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
10966  * @vsi: the VSI being configured
10967  **/
10968 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
10969 {
10970         struct i40e_pf *pf = vsi->back;
10971
10972         switch (vsi->type) {
10973         case I40E_VSI_MAIN:
10974                 vsi->alloc_queue_pairs = pf->num_lan_qps;
10975                 if (!vsi->num_tx_desc)
10976                         vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10977                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
10978                 if (!vsi->num_rx_desc)
10979                         vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10980                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
10981                 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
10982                         vsi->num_q_vectors = pf->num_lan_msix;
10983                 else
10984                         vsi->num_q_vectors = 1;
10985
10986                 break;
10987
10988         case I40E_VSI_FDIR:
10989                 vsi->alloc_queue_pairs = 1;
10990                 vsi->num_tx_desc = ALIGN(I40E_FDIR_RING_COUNT,
10991                                          I40E_REQ_DESCRIPTOR_MULTIPLE);
10992                 vsi->num_rx_desc = ALIGN(I40E_FDIR_RING_COUNT,
10993                                          I40E_REQ_DESCRIPTOR_MULTIPLE);
10994                 vsi->num_q_vectors = pf->num_fdsb_msix;
10995                 break;
10996
10997         case I40E_VSI_VMDQ2:
10998                 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
10999                 if (!vsi->num_tx_desc)
11000                         vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11001                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11002                 if (!vsi->num_rx_desc)
11003                         vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11004                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11005                 vsi->num_q_vectors = pf->num_vmdq_msix;
11006                 break;
11007
11008         case I40E_VSI_SRIOV:
11009                 vsi->alloc_queue_pairs = pf->num_vf_qps;
11010                 if (!vsi->num_tx_desc)
11011                         vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11012                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11013                 if (!vsi->num_rx_desc)
11014                         vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11015                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11016                 break;
11017
11018         default:
11019                 WARN_ON(1);
11020                 return -ENODATA;
11021         }
11022
11023         if (is_kdump_kernel()) {
11024                 vsi->num_tx_desc = I40E_MIN_NUM_DESCRIPTORS;
11025                 vsi->num_rx_desc = I40E_MIN_NUM_DESCRIPTORS;
11026         }
11027
11028         return 0;
11029 }
11030
11031 /**
11032  * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
11033  * @vsi: VSI pointer
11034  * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
11035  *
11036  * On error: returns error code (negative)
11037  * On success: returns 0
11038  **/
11039 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
11040 {
11041         struct i40e_ring **next_rings;
11042         int size;
11043         int ret = 0;
11044
11045         /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
11046         size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs *
11047                (i40e_enabled_xdp_vsi(vsi) ? 3 : 2);
11048         vsi->tx_rings = kzalloc(size, GFP_KERNEL);
11049         if (!vsi->tx_rings)
11050                 return -ENOMEM;
11051         next_rings = vsi->tx_rings + vsi->alloc_queue_pairs;
11052         if (i40e_enabled_xdp_vsi(vsi)) {
11053                 vsi->xdp_rings = next_rings;
11054                 next_rings += vsi->alloc_queue_pairs;
11055         }
11056         vsi->rx_rings = next_rings;
11057
11058         if (alloc_qvectors) {
11059                 /* allocate memory for q_vector pointers */
11060                 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
11061                 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
11062                 if (!vsi->q_vectors) {
11063                         ret = -ENOMEM;
11064                         goto err_vectors;
11065                 }
11066         }
11067         return ret;
11068
11069 err_vectors:
11070         kfree(vsi->tx_rings);
11071         return ret;
11072 }
11073
11074 /**
11075  * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
11076  * @pf: board private structure
11077  * @type: type of VSI
11078  *
11079  * On error: returns error code (negative)
11080  * On success: returns vsi index in PF (positive)
11081  **/
11082 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
11083 {
11084         int ret = -ENODEV;
11085         struct i40e_vsi *vsi;
11086         int vsi_idx;
11087         int i;
11088
11089         /* Need to protect the allocation of the VSIs at the PF level */
11090         mutex_lock(&pf->switch_mutex);
11091
11092         /* VSI list may be fragmented if VSI creation/destruction has
11093          * been happening.  We can afford to do a quick scan to look
11094          * for any free VSIs in the list.
11095          *
11096          * find next empty vsi slot, looping back around if necessary
11097          */
11098         i = pf->next_vsi;
11099         while (i < pf->num_alloc_vsi && pf->vsi[i])
11100                 i++;
11101         if (i >= pf->num_alloc_vsi) {
11102                 i = 0;
11103                 while (i < pf->next_vsi && pf->vsi[i])
11104                         i++;
11105         }
11106
11107         if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
11108                 vsi_idx = i;             /* Found one! */
11109         } else {
11110                 ret = -ENODEV;
11111                 goto unlock_pf;  /* out of VSI slots! */
11112         }
11113         pf->next_vsi = ++i;
11114
11115         vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
11116         if (!vsi) {
11117                 ret = -ENOMEM;
11118                 goto unlock_pf;
11119         }
11120         vsi->type = type;
11121         vsi->back = pf;
11122         set_bit(__I40E_VSI_DOWN, vsi->state);
11123         vsi->flags = 0;
11124         vsi->idx = vsi_idx;
11125         vsi->int_rate_limit = 0;
11126         vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
11127                                 pf->rss_table_size : 64;
11128         vsi->netdev_registered = false;
11129         vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
11130         hash_init(vsi->mac_filter_hash);
11131         vsi->irqs_ready = false;
11132
11133         if (type == I40E_VSI_MAIN) {
11134                 vsi->af_xdp_zc_qps = bitmap_zalloc(pf->num_lan_qps, GFP_KERNEL);
11135                 if (!vsi->af_xdp_zc_qps)
11136                         goto err_rings;
11137         }
11138
11139         ret = i40e_set_num_rings_in_vsi(vsi);
11140         if (ret)
11141                 goto err_rings;
11142
11143         ret = i40e_vsi_alloc_arrays(vsi, true);
11144         if (ret)
11145                 goto err_rings;
11146
11147         /* Setup default MSIX irq handler for VSI */
11148         i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
11149
11150         /* Initialize VSI lock */
11151         spin_lock_init(&vsi->mac_filter_hash_lock);
11152         pf->vsi[vsi_idx] = vsi;
11153         ret = vsi_idx;
11154         goto unlock_pf;
11155
11156 err_rings:
11157         bitmap_free(vsi->af_xdp_zc_qps);
11158         pf->next_vsi = i - 1;
11159         kfree(vsi);
11160 unlock_pf:
11161         mutex_unlock(&pf->switch_mutex);
11162         return ret;
11163 }
11164
11165 /**
11166  * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
11167  * @vsi: VSI pointer
11168  * @free_qvectors: a bool to specify if q_vectors need to be freed.
11169  *
11170  * On error: returns error code (negative)
11171  * On success: returns 0
11172  **/
11173 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
11174 {
11175         /* free the ring and vector containers */
11176         if (free_qvectors) {
11177                 kfree(vsi->q_vectors);
11178                 vsi->q_vectors = NULL;
11179         }
11180         kfree(vsi->tx_rings);
11181         vsi->tx_rings = NULL;
11182         vsi->rx_rings = NULL;
11183         vsi->xdp_rings = NULL;
11184 }
11185
11186 /**
11187  * i40e_clear_rss_config_user - clear the user configured RSS hash keys
11188  * and lookup table
11189  * @vsi: Pointer to VSI structure
11190  */
11191 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
11192 {
11193         if (!vsi)
11194                 return;
11195
11196         kfree(vsi->rss_hkey_user);
11197         vsi->rss_hkey_user = NULL;
11198
11199         kfree(vsi->rss_lut_user);
11200         vsi->rss_lut_user = NULL;
11201 }
11202
11203 /**
11204  * i40e_vsi_clear - Deallocate the VSI provided
11205  * @vsi: the VSI being un-configured
11206  **/
11207 static int i40e_vsi_clear(struct i40e_vsi *vsi)
11208 {
11209         struct i40e_pf *pf;
11210
11211         if (!vsi)
11212                 return 0;
11213
11214         if (!vsi->back)
11215                 goto free_vsi;
11216         pf = vsi->back;
11217
11218         mutex_lock(&pf->switch_mutex);
11219         if (!pf->vsi[vsi->idx]) {
11220                 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
11221                         vsi->idx, vsi->idx, vsi->type);
11222                 goto unlock_vsi;
11223         }
11224
11225         if (pf->vsi[vsi->idx] != vsi) {
11226                 dev_err(&pf->pdev->dev,
11227                         "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
11228                         pf->vsi[vsi->idx]->idx,
11229                         pf->vsi[vsi->idx]->type,
11230                         vsi->idx, vsi->type);
11231                 goto unlock_vsi;
11232         }
11233
11234         /* updates the PF for this cleared vsi */
11235         i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
11236         i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
11237
11238         bitmap_free(vsi->af_xdp_zc_qps);
11239         i40e_vsi_free_arrays(vsi, true);
11240         i40e_clear_rss_config_user(vsi);
11241
11242         pf->vsi[vsi->idx] = NULL;
11243         if (vsi->idx < pf->next_vsi)
11244                 pf->next_vsi = vsi->idx;
11245
11246 unlock_vsi:
11247         mutex_unlock(&pf->switch_mutex);
11248 free_vsi:
11249         kfree(vsi);
11250
11251         return 0;
11252 }
11253
11254 /**
11255  * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
11256  * @vsi: the VSI being cleaned
11257  **/
11258 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
11259 {
11260         int i;
11261
11262         if (vsi->tx_rings && vsi->tx_rings[0]) {
11263                 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11264                         kfree_rcu(vsi->tx_rings[i], rcu);
11265                         WRITE_ONCE(vsi->tx_rings[i], NULL);
11266                         WRITE_ONCE(vsi->rx_rings[i], NULL);
11267                         if (vsi->xdp_rings)
11268                                 WRITE_ONCE(vsi->xdp_rings[i], NULL);
11269                 }
11270         }
11271 }
11272
11273 /**
11274  * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
11275  * @vsi: the VSI being configured
11276  **/
11277 static int i40e_alloc_rings(struct i40e_vsi *vsi)
11278 {
11279         int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2;
11280         struct i40e_pf *pf = vsi->back;
11281         struct i40e_ring *ring;
11282
11283         /* Set basic values in the rings to be used later during open() */
11284         for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11285                 /* allocate space for both Tx and Rx in one shot */
11286                 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL);
11287                 if (!ring)
11288                         goto err_out;
11289
11290                 ring->queue_index = i;
11291                 ring->reg_idx = vsi->base_queue + i;
11292                 ring->ring_active = false;
11293                 ring->vsi = vsi;
11294                 ring->netdev = vsi->netdev;
11295                 ring->dev = &pf->pdev->dev;
11296                 ring->count = vsi->num_tx_desc;
11297                 ring->size = 0;
11298                 ring->dcb_tc = 0;
11299                 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11300                         ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11301                 ring->itr_setting = pf->tx_itr_default;
11302                 WRITE_ONCE(vsi->tx_rings[i], ring++);
11303
11304                 if (!i40e_enabled_xdp_vsi(vsi))
11305                         goto setup_rx;
11306
11307                 ring->queue_index = vsi->alloc_queue_pairs + i;
11308                 ring->reg_idx = vsi->base_queue + ring->queue_index;
11309                 ring->ring_active = false;
11310                 ring->vsi = vsi;
11311                 ring->netdev = NULL;
11312                 ring->dev = &pf->pdev->dev;
11313                 ring->count = vsi->num_tx_desc;
11314                 ring->size = 0;
11315                 ring->dcb_tc = 0;
11316                 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11317                         ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11318                 set_ring_xdp(ring);
11319                 ring->itr_setting = pf->tx_itr_default;
11320                 WRITE_ONCE(vsi->xdp_rings[i], ring++);
11321
11322 setup_rx:
11323                 ring->queue_index = i;
11324                 ring->reg_idx = vsi->base_queue + i;
11325                 ring->ring_active = false;
11326                 ring->vsi = vsi;
11327                 ring->netdev = vsi->netdev;
11328                 ring->dev = &pf->pdev->dev;
11329                 ring->count = vsi->num_rx_desc;
11330                 ring->size = 0;
11331                 ring->dcb_tc = 0;
11332                 ring->itr_setting = pf->rx_itr_default;
11333                 WRITE_ONCE(vsi->rx_rings[i], ring);
11334         }
11335
11336         return 0;
11337
11338 err_out:
11339         i40e_vsi_clear_rings(vsi);
11340         return -ENOMEM;
11341 }
11342
11343 /**
11344  * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
11345  * @pf: board private structure
11346  * @vectors: the number of MSI-X vectors to request
11347  *
11348  * Returns the number of vectors reserved, or error
11349  **/
11350 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
11351 {
11352         vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
11353                                         I40E_MIN_MSIX, vectors);
11354         if (vectors < 0) {
11355                 dev_info(&pf->pdev->dev,
11356                          "MSI-X vector reservation failed: %d\n", vectors);
11357                 vectors = 0;
11358         }
11359
11360         return vectors;
11361 }
11362
11363 /**
11364  * i40e_init_msix - Setup the MSIX capability
11365  * @pf: board private structure
11366  *
11367  * Work with the OS to set up the MSIX vectors needed.
11368  *
11369  * Returns the number of vectors reserved or negative on failure
11370  **/
11371 static int i40e_init_msix(struct i40e_pf *pf)
11372 {
11373         struct i40e_hw *hw = &pf->hw;
11374         int cpus, extra_vectors;
11375         int vectors_left;
11376         int v_budget, i;
11377         int v_actual;
11378         int iwarp_requested = 0;
11379
11380         if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
11381                 return -ENODEV;
11382
11383         /* The number of vectors we'll request will be comprised of:
11384          *   - Add 1 for "other" cause for Admin Queue events, etc.
11385          *   - The number of LAN queue pairs
11386          *      - Queues being used for RSS.
11387          *              We don't need as many as max_rss_size vectors.
11388          *              use rss_size instead in the calculation since that
11389          *              is governed by number of cpus in the system.
11390          *      - assumes symmetric Tx/Rx pairing
11391          *   - The number of VMDq pairs
11392          *   - The CPU count within the NUMA node if iWARP is enabled
11393          * Once we count this up, try the request.
11394          *
11395          * If we can't get what we want, we'll simplify to nearly nothing
11396          * and try again.  If that still fails, we punt.
11397          */
11398         vectors_left = hw->func_caps.num_msix_vectors;
11399         v_budget = 0;
11400
11401         /* reserve one vector for miscellaneous handler */
11402         if (vectors_left) {
11403                 v_budget++;
11404                 vectors_left--;
11405         }
11406
11407         /* reserve some vectors for the main PF traffic queues. Initially we
11408          * only reserve at most 50% of the available vectors, in the case that
11409          * the number of online CPUs is large. This ensures that we can enable
11410          * extra features as well. Once we've enabled the other features, we
11411          * will use any remaining vectors to reach as close as we can to the
11412          * number of online CPUs.
11413          */
11414         cpus = num_online_cpus();
11415         pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
11416         vectors_left -= pf->num_lan_msix;
11417
11418         /* reserve one vector for sideband flow director */
11419         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11420                 if (vectors_left) {
11421                         pf->num_fdsb_msix = 1;
11422                         v_budget++;
11423                         vectors_left--;
11424                 } else {
11425                         pf->num_fdsb_msix = 0;
11426                 }
11427         }
11428
11429         /* can we reserve enough for iWARP? */
11430         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11431                 iwarp_requested = pf->num_iwarp_msix;
11432
11433                 if (!vectors_left)
11434                         pf->num_iwarp_msix = 0;
11435                 else if (vectors_left < pf->num_iwarp_msix)
11436                         pf->num_iwarp_msix = 1;
11437                 v_budget += pf->num_iwarp_msix;
11438                 vectors_left -= pf->num_iwarp_msix;
11439         }
11440
11441         /* any vectors left over go for VMDq support */
11442         if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
11443                 if (!vectors_left) {
11444                         pf->num_vmdq_msix = 0;
11445                         pf->num_vmdq_qps = 0;
11446                 } else {
11447                         int vmdq_vecs_wanted =
11448                                 pf->num_vmdq_vsis * pf->num_vmdq_qps;
11449                         int vmdq_vecs =
11450                                 min_t(int, vectors_left, vmdq_vecs_wanted);
11451
11452                         /* if we're short on vectors for what's desired, we limit
11453                          * the queues per vmdq.  If this is still more than are
11454                          * available, the user will need to change the number of
11455                          * queues/vectors used by the PF later with the ethtool
11456                          * channels command
11457                          */
11458                         if (vectors_left < vmdq_vecs_wanted) {
11459                                 pf->num_vmdq_qps = 1;
11460                                 vmdq_vecs_wanted = pf->num_vmdq_vsis;
11461                                 vmdq_vecs = min_t(int,
11462                                                   vectors_left,
11463                                                   vmdq_vecs_wanted);
11464                         }
11465                         pf->num_vmdq_msix = pf->num_vmdq_qps;
11466
11467                         v_budget += vmdq_vecs;
11468                         vectors_left -= vmdq_vecs;
11469                 }
11470         }
11471
11472         /* On systems with a large number of SMP cores, we previously limited
11473          * the number of vectors for num_lan_msix to be at most 50% of the
11474          * available vectors, to allow for other features. Now, we add back
11475          * the remaining vectors. However, we ensure that the total
11476          * num_lan_msix will not exceed num_online_cpus(). To do this, we
11477          * calculate the number of vectors we can add without going over the
11478          * cap of CPUs. For systems with a small number of CPUs this will be
11479          * zero.
11480          */
11481         extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
11482         pf->num_lan_msix += extra_vectors;
11483         vectors_left -= extra_vectors;
11484
11485         WARN(vectors_left < 0,
11486              "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
11487
11488         v_budget += pf->num_lan_msix;
11489         pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
11490                                    GFP_KERNEL);
11491         if (!pf->msix_entries)
11492                 return -ENOMEM;
11493
11494         for (i = 0; i < v_budget; i++)
11495                 pf->msix_entries[i].entry = i;
11496         v_actual = i40e_reserve_msix_vectors(pf, v_budget);
11497
11498         if (v_actual < I40E_MIN_MSIX) {
11499                 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
11500                 kfree(pf->msix_entries);
11501                 pf->msix_entries = NULL;
11502                 pci_disable_msix(pf->pdev);
11503                 return -ENODEV;
11504
11505         } else if (v_actual == I40E_MIN_MSIX) {
11506                 /* Adjust for minimal MSIX use */
11507                 pf->num_vmdq_vsis = 0;
11508                 pf->num_vmdq_qps = 0;
11509                 pf->num_lan_qps = 1;
11510                 pf->num_lan_msix = 1;
11511
11512         } else if (v_actual != v_budget) {
11513                 /* If we have limited resources, we will start with no vectors
11514                  * for the special features and then allocate vectors to some
11515                  * of these features based on the policy and at the end disable
11516                  * the features that did not get any vectors.
11517                  */
11518                 int vec;
11519
11520                 dev_info(&pf->pdev->dev,
11521                          "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
11522                          v_actual, v_budget);
11523                 /* reserve the misc vector */
11524                 vec = v_actual - 1;
11525
11526                 /* Scale vector usage down */
11527                 pf->num_vmdq_msix = 1;    /* force VMDqs to only one vector */
11528                 pf->num_vmdq_vsis = 1;
11529                 pf->num_vmdq_qps = 1;
11530
11531                 /* partition out the remaining vectors */
11532                 switch (vec) {
11533                 case 2:
11534                         pf->num_lan_msix = 1;
11535                         break;
11536                 case 3:
11537                         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11538                                 pf->num_lan_msix = 1;
11539                                 pf->num_iwarp_msix = 1;
11540                         } else {
11541                                 pf->num_lan_msix = 2;
11542                         }
11543                         break;
11544                 default:
11545                         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11546                                 pf->num_iwarp_msix = min_t(int, (vec / 3),
11547                                                  iwarp_requested);
11548                                 pf->num_vmdq_vsis = min_t(int, (vec / 3),
11549                                                   I40E_DEFAULT_NUM_VMDQ_VSI);
11550                         } else {
11551                                 pf->num_vmdq_vsis = min_t(int, (vec / 2),
11552                                                   I40E_DEFAULT_NUM_VMDQ_VSI);
11553                         }
11554                         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11555                                 pf->num_fdsb_msix = 1;
11556                                 vec--;
11557                         }
11558                         pf->num_lan_msix = min_t(int,
11559                                (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
11560                                                               pf->num_lan_msix);
11561                         pf->num_lan_qps = pf->num_lan_msix;
11562                         break;
11563                 }
11564         }
11565
11566         if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
11567             (pf->num_fdsb_msix == 0)) {
11568                 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
11569                 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
11570                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11571         }
11572         if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
11573             (pf->num_vmdq_msix == 0)) {
11574                 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
11575                 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
11576         }
11577
11578         if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
11579             (pf->num_iwarp_msix == 0)) {
11580                 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
11581                 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11582         }
11583         i40e_debug(&pf->hw, I40E_DEBUG_INIT,
11584                    "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
11585                    pf->num_lan_msix,
11586                    pf->num_vmdq_msix * pf->num_vmdq_vsis,
11587                    pf->num_fdsb_msix,
11588                    pf->num_iwarp_msix);
11589
11590         return v_actual;
11591 }
11592
11593 /**
11594  * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
11595  * @vsi: the VSI being configured
11596  * @v_idx: index of the vector in the vsi struct
11597  *
11598  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
11599  **/
11600 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
11601 {
11602         struct i40e_q_vector *q_vector;
11603
11604         /* allocate q_vector */
11605         q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
11606         if (!q_vector)
11607                 return -ENOMEM;
11608
11609         q_vector->vsi = vsi;
11610         q_vector->v_idx = v_idx;
11611         cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask);
11612
11613         if (vsi->netdev)
11614                 netif_napi_add(vsi->netdev, &q_vector->napi,
11615                                i40e_napi_poll, NAPI_POLL_WEIGHT);
11616
11617         /* tie q_vector and vsi together */
11618         vsi->q_vectors[v_idx] = q_vector;
11619
11620         return 0;
11621 }
11622
11623 /**
11624  * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
11625  * @vsi: the VSI being configured
11626  *
11627  * We allocate one q_vector per queue interrupt.  If allocation fails we
11628  * return -ENOMEM.
11629  **/
11630 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
11631 {
11632         struct i40e_pf *pf = vsi->back;
11633         int err, v_idx, num_q_vectors;
11634
11635         /* if not MSIX, give the one vector only to the LAN VSI */
11636         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11637                 num_q_vectors = vsi->num_q_vectors;
11638         else if (vsi == pf->vsi[pf->lan_vsi])
11639                 num_q_vectors = 1;
11640         else
11641                 return -EINVAL;
11642
11643         for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
11644                 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
11645                 if (err)
11646                         goto err_out;
11647         }
11648
11649         return 0;
11650
11651 err_out:
11652         while (v_idx--)
11653                 i40e_free_q_vector(vsi, v_idx);
11654
11655         return err;
11656 }
11657
11658 /**
11659  * i40e_init_interrupt_scheme - Determine proper interrupt scheme
11660  * @pf: board private structure to initialize
11661  **/
11662 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
11663 {
11664         int vectors = 0;
11665         ssize_t size;
11666
11667         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11668                 vectors = i40e_init_msix(pf);
11669                 if (vectors < 0) {
11670                         pf->flags &= ~(I40E_FLAG_MSIX_ENABLED   |
11671                                        I40E_FLAG_IWARP_ENABLED  |
11672                                        I40E_FLAG_RSS_ENABLED    |
11673                                        I40E_FLAG_DCB_CAPABLE    |
11674                                        I40E_FLAG_DCB_ENABLED    |
11675                                        I40E_FLAG_SRIOV_ENABLED  |
11676                                        I40E_FLAG_FD_SB_ENABLED  |
11677                                        I40E_FLAG_FD_ATR_ENABLED |
11678                                        I40E_FLAG_VMDQ_ENABLED);
11679                         pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11680
11681                         /* rework the queue expectations without MSIX */
11682                         i40e_determine_queue_usage(pf);
11683                 }
11684         }
11685
11686         if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11687             (pf->flags & I40E_FLAG_MSI_ENABLED)) {
11688                 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
11689                 vectors = pci_enable_msi(pf->pdev);
11690                 if (vectors < 0) {
11691                         dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
11692                                  vectors);
11693                         pf->flags &= ~I40E_FLAG_MSI_ENABLED;
11694                 }
11695                 vectors = 1;  /* one MSI or Legacy vector */
11696         }
11697
11698         if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
11699                 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
11700
11701         /* set up vector assignment tracking */
11702         size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
11703         pf->irq_pile = kzalloc(size, GFP_KERNEL);
11704         if (!pf->irq_pile)
11705                 return -ENOMEM;
11706
11707         pf->irq_pile->num_entries = vectors;
11708         pf->irq_pile->search_hint = 0;
11709
11710         /* track first vector for misc interrupts, ignore return */
11711         (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
11712
11713         return 0;
11714 }
11715
11716 /**
11717  * i40e_restore_interrupt_scheme - Restore the interrupt scheme
11718  * @pf: private board data structure
11719  *
11720  * Restore the interrupt scheme that was cleared when we suspended the
11721  * device. This should be called during resume to re-allocate the q_vectors
11722  * and reacquire IRQs.
11723  */
11724 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
11725 {
11726         int err, i;
11727
11728         /* We cleared the MSI and MSI-X flags when disabling the old interrupt
11729          * scheme. We need to re-enabled them here in order to attempt to
11730          * re-acquire the MSI or MSI-X vectors
11731          */
11732         pf->flags |= (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
11733
11734         err = i40e_init_interrupt_scheme(pf);
11735         if (err)
11736                 return err;
11737
11738         /* Now that we've re-acquired IRQs, we need to remap the vectors and
11739          * rings together again.
11740          */
11741         for (i = 0; i < pf->num_alloc_vsi; i++) {
11742                 if (pf->vsi[i]) {
11743                         err = i40e_vsi_alloc_q_vectors(pf->vsi[i]);
11744                         if (err)
11745                                 goto err_unwind;
11746                         i40e_vsi_map_rings_to_vectors(pf->vsi[i]);
11747                 }
11748         }
11749
11750         err = i40e_setup_misc_vector(pf);
11751         if (err)
11752                 goto err_unwind;
11753
11754         if (pf->flags & I40E_FLAG_IWARP_ENABLED)
11755                 i40e_client_update_msix_info(pf);
11756
11757         return 0;
11758
11759 err_unwind:
11760         while (i--) {
11761                 if (pf->vsi[i])
11762                         i40e_vsi_free_q_vectors(pf->vsi[i]);
11763         }
11764
11765         return err;
11766 }
11767
11768 /**
11769  * i40e_setup_misc_vector_for_recovery_mode - Setup the misc vector to handle
11770  * non queue events in recovery mode
11771  * @pf: board private structure
11772  *
11773  * This sets up the handler for MSIX 0 or MSI/legacy, which is used to manage
11774  * the non-queue interrupts, e.g. AdminQ and errors in recovery mode.
11775  * This is handled differently than in recovery mode since no Tx/Rx resources
11776  * are being allocated.
11777  **/
11778 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf)
11779 {
11780         int err;
11781
11782         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11783                 err = i40e_setup_misc_vector(pf);
11784
11785                 if (err) {
11786                         dev_info(&pf->pdev->dev,
11787                                  "MSI-X misc vector request failed, error %d\n",
11788                                  err);
11789                         return err;
11790                 }
11791         } else {
11792                 u32 flags = pf->flags & I40E_FLAG_MSI_ENABLED ? 0 : IRQF_SHARED;
11793
11794                 err = request_irq(pf->pdev->irq, i40e_intr, flags,
11795                                   pf->int_name, pf);
11796
11797                 if (err) {
11798                         dev_info(&pf->pdev->dev,
11799                                  "MSI/legacy misc vector request failed, error %d\n",
11800                                  err);
11801                         return err;
11802                 }
11803                 i40e_enable_misc_int_causes(pf);
11804                 i40e_irq_dynamic_enable_icr0(pf);
11805         }
11806
11807         return 0;
11808 }
11809
11810 /**
11811  * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
11812  * @pf: board private structure
11813  *
11814  * This sets up the handler for MSIX 0, which is used to manage the
11815  * non-queue interrupts, e.g. AdminQ and errors.  This is not used
11816  * when in MSI or Legacy interrupt mode.
11817  **/
11818 static int i40e_setup_misc_vector(struct i40e_pf *pf)
11819 {
11820         struct i40e_hw *hw = &pf->hw;
11821         int err = 0;
11822
11823         /* Only request the IRQ once, the first time through. */
11824         if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) {
11825                 err = request_irq(pf->msix_entries[0].vector,
11826                                   i40e_intr, 0, pf->int_name, pf);
11827                 if (err) {
11828                         clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
11829                         dev_info(&pf->pdev->dev,
11830                                  "request_irq for %s failed: %d\n",
11831                                  pf->int_name, err);
11832                         return -EFAULT;
11833                 }
11834         }
11835
11836         i40e_enable_misc_int_causes(pf);
11837
11838         /* associate no queues to the misc vector */
11839         wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
11840         wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K >> 1);
11841
11842         i40e_flush(hw);
11843
11844         i40e_irq_dynamic_enable_icr0(pf);
11845
11846         return err;
11847 }
11848
11849 /**
11850  * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
11851  * @vsi: Pointer to vsi structure
11852  * @seed: Buffter to store the hash keys
11853  * @lut: Buffer to store the lookup table entries
11854  * @lut_size: Size of buffer to store the lookup table entries
11855  *
11856  * Return 0 on success, negative on failure
11857  */
11858 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
11859                            u8 *lut, u16 lut_size)
11860 {
11861         struct i40e_pf *pf = vsi->back;
11862         struct i40e_hw *hw = &pf->hw;
11863         int ret = 0;
11864
11865         if (seed) {
11866                 ret = i40e_aq_get_rss_key(hw, vsi->id,
11867                         (struct i40e_aqc_get_set_rss_key_data *)seed);
11868                 if (ret) {
11869                         dev_info(&pf->pdev->dev,
11870                                  "Cannot get RSS key, err %s aq_err %s\n",
11871                                  i40e_stat_str(&pf->hw, ret),
11872                                  i40e_aq_str(&pf->hw,
11873                                              pf->hw.aq.asq_last_status));
11874                         return ret;
11875                 }
11876         }
11877
11878         if (lut) {
11879                 bool pf_lut = vsi->type == I40E_VSI_MAIN;
11880
11881                 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
11882                 if (ret) {
11883                         dev_info(&pf->pdev->dev,
11884                                  "Cannot get RSS lut, err %s aq_err %s\n",
11885                                  i40e_stat_str(&pf->hw, ret),
11886                                  i40e_aq_str(&pf->hw,
11887                                              pf->hw.aq.asq_last_status));
11888                         return ret;
11889                 }
11890         }
11891
11892         return ret;
11893 }
11894
11895 /**
11896  * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
11897  * @vsi: Pointer to vsi structure
11898  * @seed: RSS hash seed
11899  * @lut: Lookup table
11900  * @lut_size: Lookup table size
11901  *
11902  * Returns 0 on success, negative on failure
11903  **/
11904 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
11905                                const u8 *lut, u16 lut_size)
11906 {
11907         struct i40e_pf *pf = vsi->back;
11908         struct i40e_hw *hw = &pf->hw;
11909         u16 vf_id = vsi->vf_id;
11910         u8 i;
11911
11912         /* Fill out hash function seed */
11913         if (seed) {
11914                 u32 *seed_dw = (u32 *)seed;
11915
11916                 if (vsi->type == I40E_VSI_MAIN) {
11917                         for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
11918                                 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
11919                 } else if (vsi->type == I40E_VSI_SRIOV) {
11920                         for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
11921                                 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
11922                 } else {
11923                         dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
11924                 }
11925         }
11926
11927         if (lut) {
11928                 u32 *lut_dw = (u32 *)lut;
11929
11930                 if (vsi->type == I40E_VSI_MAIN) {
11931                         if (lut_size != I40E_HLUT_ARRAY_SIZE)
11932                                 return -EINVAL;
11933                         for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
11934                                 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
11935                 } else if (vsi->type == I40E_VSI_SRIOV) {
11936                         if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
11937                                 return -EINVAL;
11938                         for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
11939                                 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
11940                 } else {
11941                         dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
11942                 }
11943         }
11944         i40e_flush(hw);
11945
11946         return 0;
11947 }
11948
11949 /**
11950  * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
11951  * @vsi: Pointer to VSI structure
11952  * @seed: Buffer to store the keys
11953  * @lut: Buffer to store the lookup table entries
11954  * @lut_size: Size of buffer to store the lookup table entries
11955  *
11956  * Returns 0 on success, negative on failure
11957  */
11958 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
11959                             u8 *lut, u16 lut_size)
11960 {
11961         struct i40e_pf *pf = vsi->back;
11962         struct i40e_hw *hw = &pf->hw;
11963         u16 i;
11964
11965         if (seed) {
11966                 u32 *seed_dw = (u32 *)seed;
11967
11968                 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
11969                         seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
11970         }
11971         if (lut) {
11972                 u32 *lut_dw = (u32 *)lut;
11973
11974                 if (lut_size != I40E_HLUT_ARRAY_SIZE)
11975                         return -EINVAL;
11976                 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
11977                         lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
11978         }
11979
11980         return 0;
11981 }
11982
11983 /**
11984  * i40e_config_rss - Configure RSS keys and lut
11985  * @vsi: Pointer to VSI structure
11986  * @seed: RSS hash seed
11987  * @lut: Lookup table
11988  * @lut_size: Lookup table size
11989  *
11990  * Returns 0 on success, negative on failure
11991  */
11992 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
11993 {
11994         struct i40e_pf *pf = vsi->back;
11995
11996         if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
11997                 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
11998         else
11999                 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
12000 }
12001
12002 /**
12003  * i40e_get_rss - Get RSS keys and lut
12004  * @vsi: Pointer to VSI structure
12005  * @seed: Buffer to store the keys
12006  * @lut: Buffer to store the lookup table entries
12007  * @lut_size: Size of buffer to store the lookup table entries
12008  *
12009  * Returns 0 on success, negative on failure
12010  */
12011 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12012 {
12013         struct i40e_pf *pf = vsi->back;
12014
12015         if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12016                 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
12017         else
12018                 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
12019 }
12020
12021 /**
12022  * i40e_fill_rss_lut - Fill the RSS lookup table with default values
12023  * @pf: Pointer to board private structure
12024  * @lut: Lookup table
12025  * @rss_table_size: Lookup table size
12026  * @rss_size: Range of queue number for hashing
12027  */
12028 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
12029                        u16 rss_table_size, u16 rss_size)
12030 {
12031         u16 i;
12032
12033         for (i = 0; i < rss_table_size; i++)
12034                 lut[i] = i % rss_size;
12035 }
12036
12037 /**
12038  * i40e_pf_config_rss - Prepare for RSS if used
12039  * @pf: board private structure
12040  **/
12041 static int i40e_pf_config_rss(struct i40e_pf *pf)
12042 {
12043         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12044         u8 seed[I40E_HKEY_ARRAY_SIZE];
12045         u8 *lut;
12046         struct i40e_hw *hw = &pf->hw;
12047         u32 reg_val;
12048         u64 hena;
12049         int ret;
12050
12051         /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
12052         hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
12053                 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
12054         hena |= i40e_pf_get_default_rss_hena(pf);
12055
12056         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
12057         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
12058
12059         /* Determine the RSS table size based on the hardware capabilities */
12060         reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
12061         reg_val = (pf->rss_table_size == 512) ?
12062                         (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
12063                         (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
12064         i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
12065
12066         /* Determine the RSS size of the VSI */
12067         if (!vsi->rss_size) {
12068                 u16 qcount;
12069                 /* If the firmware does something weird during VSI init, we
12070                  * could end up with zero TCs. Check for that to avoid
12071                  * divide-by-zero. It probably won't pass traffic, but it also
12072                  * won't panic.
12073                  */
12074                 qcount = vsi->num_queue_pairs /
12075                          (vsi->tc_config.numtc ? vsi->tc_config.numtc : 1);
12076                 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12077         }
12078         if (!vsi->rss_size)
12079                 return -EINVAL;
12080
12081         lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
12082         if (!lut)
12083                 return -ENOMEM;
12084
12085         /* Use user configured lut if there is one, otherwise use default */
12086         if (vsi->rss_lut_user)
12087                 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
12088         else
12089                 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
12090
12091         /* Use user configured hash key if there is one, otherwise
12092          * use default.
12093          */
12094         if (vsi->rss_hkey_user)
12095                 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
12096         else
12097                 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
12098         ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
12099         kfree(lut);
12100
12101         return ret;
12102 }
12103
12104 /**
12105  * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
12106  * @pf: board private structure
12107  * @queue_count: the requested queue count for rss.
12108  *
12109  * returns 0 if rss is not enabled, if enabled returns the final rss queue
12110  * count which may be different from the requested queue count.
12111  * Note: expects to be called while under rtnl_lock()
12112  **/
12113 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
12114 {
12115         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12116         int new_rss_size;
12117
12118         if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
12119                 return 0;
12120
12121         queue_count = min_t(int, queue_count, num_online_cpus());
12122         new_rss_size = min_t(int, queue_count, pf->rss_size_max);
12123
12124         if (queue_count != vsi->num_queue_pairs) {
12125                 u16 qcount;
12126
12127                 vsi->req_queue_pairs = queue_count;
12128                 i40e_prep_for_reset(pf);
12129
12130                 pf->alloc_rss_size = new_rss_size;
12131
12132                 i40e_reset_and_rebuild(pf, true, true);
12133
12134                 /* Discard the user configured hash keys and lut, if less
12135                  * queues are enabled.
12136                  */
12137                 if (queue_count < vsi->rss_size) {
12138                         i40e_clear_rss_config_user(vsi);
12139                         dev_dbg(&pf->pdev->dev,
12140                                 "discard user configured hash keys and lut\n");
12141                 }
12142
12143                 /* Reset vsi->rss_size, as number of enabled queues changed */
12144                 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
12145                 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12146
12147                 i40e_pf_config_rss(pf);
12148         }
12149         dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count:  %d/%d\n",
12150                  vsi->req_queue_pairs, pf->rss_size_max);
12151         return pf->alloc_rss_size;
12152 }
12153
12154 /**
12155  * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
12156  * @pf: board private structure
12157  **/
12158 i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf)
12159 {
12160         i40e_status status;
12161         bool min_valid, max_valid;
12162         u32 max_bw, min_bw;
12163
12164         status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
12165                                            &min_valid, &max_valid);
12166
12167         if (!status) {
12168                 if (min_valid)
12169                         pf->min_bw = min_bw;
12170                 if (max_valid)
12171                         pf->max_bw = max_bw;
12172         }
12173
12174         return status;
12175 }
12176
12177 /**
12178  * i40e_set_partition_bw_setting - Set BW settings for this PF partition
12179  * @pf: board private structure
12180  **/
12181 i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf)
12182 {
12183         struct i40e_aqc_configure_partition_bw_data bw_data;
12184         i40e_status status;
12185
12186         memset(&bw_data, 0, sizeof(bw_data));
12187
12188         /* Set the valid bit for this PF */
12189         bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
12190         bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
12191         bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
12192
12193         /* Set the new bandwidths */
12194         status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
12195
12196         return status;
12197 }
12198
12199 /**
12200  * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition
12201  * @pf: board private structure
12202  **/
12203 i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf)
12204 {
12205         /* Commit temporary BW setting to permanent NVM image */
12206         enum i40e_admin_queue_err last_aq_status;
12207         i40e_status ret;
12208         u16 nvm_word;
12209
12210         if (pf->hw.partition_id != 1) {
12211                 dev_info(&pf->pdev->dev,
12212                          "Commit BW only works on partition 1! This is partition %d",
12213                          pf->hw.partition_id);
12214                 ret = I40E_NOT_SUPPORTED;
12215                 goto bw_commit_out;
12216         }
12217
12218         /* Acquire NVM for read access */
12219         ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
12220         last_aq_status = pf->hw.aq.asq_last_status;
12221         if (ret) {
12222                 dev_info(&pf->pdev->dev,
12223                          "Cannot acquire NVM for read access, err %s aq_err %s\n",
12224                          i40e_stat_str(&pf->hw, ret),
12225                          i40e_aq_str(&pf->hw, last_aq_status));
12226                 goto bw_commit_out;
12227         }
12228
12229         /* Read word 0x10 of NVM - SW compatibility word 1 */
12230         ret = i40e_aq_read_nvm(&pf->hw,
12231                                I40E_SR_NVM_CONTROL_WORD,
12232                                0x10, sizeof(nvm_word), &nvm_word,
12233                                false, NULL);
12234         /* Save off last admin queue command status before releasing
12235          * the NVM
12236          */
12237         last_aq_status = pf->hw.aq.asq_last_status;
12238         i40e_release_nvm(&pf->hw);
12239         if (ret) {
12240                 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
12241                          i40e_stat_str(&pf->hw, ret),
12242                          i40e_aq_str(&pf->hw, last_aq_status));
12243                 goto bw_commit_out;
12244         }
12245
12246         /* Wait a bit for NVM release to complete */
12247         msleep(50);
12248
12249         /* Acquire NVM for write access */
12250         ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
12251         last_aq_status = pf->hw.aq.asq_last_status;
12252         if (ret) {
12253                 dev_info(&pf->pdev->dev,
12254                          "Cannot acquire NVM for write access, err %s aq_err %s\n",
12255                          i40e_stat_str(&pf->hw, ret),
12256                          i40e_aq_str(&pf->hw, last_aq_status));
12257                 goto bw_commit_out;
12258         }
12259         /* Write it back out unchanged to initiate update NVM,
12260          * which will force a write of the shadow (alt) RAM to
12261          * the NVM - thus storing the bandwidth values permanently.
12262          */
12263         ret = i40e_aq_update_nvm(&pf->hw,
12264                                  I40E_SR_NVM_CONTROL_WORD,
12265                                  0x10, sizeof(nvm_word),
12266                                  &nvm_word, true, 0, NULL);
12267         /* Save off last admin queue command status before releasing
12268          * the NVM
12269          */
12270         last_aq_status = pf->hw.aq.asq_last_status;
12271         i40e_release_nvm(&pf->hw);
12272         if (ret)
12273                 dev_info(&pf->pdev->dev,
12274                          "BW settings NOT SAVED, err %s aq_err %s\n",
12275                          i40e_stat_str(&pf->hw, ret),
12276                          i40e_aq_str(&pf->hw, last_aq_status));
12277 bw_commit_out:
12278
12279         return ret;
12280 }
12281
12282 /**
12283  * i40e_is_total_port_shutdown_enabled - read NVM and return value
12284  * if total port shutdown feature is enabled for this PF
12285  * @pf: board private structure
12286  **/
12287 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf)
12288 {
12289 #define I40E_TOTAL_PORT_SHUTDOWN_ENABLED        BIT(4)
12290 #define I40E_FEATURES_ENABLE_PTR                0x2A
12291 #define I40E_CURRENT_SETTING_PTR                0x2B
12292 #define I40E_LINK_BEHAVIOR_WORD_OFFSET          0x2D
12293 #define I40E_LINK_BEHAVIOR_WORD_LENGTH          0x1
12294 #define I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED    BIT(0)
12295 #define I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH      4
12296         i40e_status read_status = I40E_SUCCESS;
12297         u16 sr_emp_sr_settings_ptr = 0;
12298         u16 features_enable = 0;
12299         u16 link_behavior = 0;
12300         bool ret = false;
12301
12302         read_status = i40e_read_nvm_word(&pf->hw,
12303                                          I40E_SR_EMP_SR_SETTINGS_PTR,
12304                                          &sr_emp_sr_settings_ptr);
12305         if (read_status)
12306                 goto err_nvm;
12307         read_status = i40e_read_nvm_word(&pf->hw,
12308                                          sr_emp_sr_settings_ptr +
12309                                          I40E_FEATURES_ENABLE_PTR,
12310                                          &features_enable);
12311         if (read_status)
12312                 goto err_nvm;
12313         if (I40E_TOTAL_PORT_SHUTDOWN_ENABLED & features_enable) {
12314                 read_status = i40e_read_nvm_module_data(&pf->hw,
12315                                                         I40E_SR_EMP_SR_SETTINGS_PTR,
12316                                                         I40E_CURRENT_SETTING_PTR,
12317                                                         I40E_LINK_BEHAVIOR_WORD_OFFSET,
12318                                                         I40E_LINK_BEHAVIOR_WORD_LENGTH,
12319                                                         &link_behavior);
12320                 if (read_status)
12321                         goto err_nvm;
12322                 link_behavior >>= (pf->hw.port * I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH);
12323                 ret = I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED & link_behavior;
12324         }
12325         return ret;
12326
12327 err_nvm:
12328         dev_warn(&pf->pdev->dev,
12329                  "total-port-shutdown feature is off due to read nvm error: %s\n",
12330                  i40e_stat_str(&pf->hw, read_status));
12331         return ret;
12332 }
12333
12334 /**
12335  * i40e_sw_init - Initialize general software structures (struct i40e_pf)
12336  * @pf: board private structure to initialize
12337  *
12338  * i40e_sw_init initializes the Adapter private data structure.
12339  * Fields are initialized based on PCI device information and
12340  * OS network device settings (MTU size).
12341  **/
12342 static int i40e_sw_init(struct i40e_pf *pf)
12343 {
12344         int err = 0;
12345         int size;
12346         u16 pow;
12347
12348         /* Set default capability flags */
12349         pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
12350                     I40E_FLAG_MSI_ENABLED     |
12351                     I40E_FLAG_MSIX_ENABLED;
12352
12353         /* Set default ITR */
12354         pf->rx_itr_default = I40E_ITR_RX_DEF;
12355         pf->tx_itr_default = I40E_ITR_TX_DEF;
12356
12357         /* Depending on PF configurations, it is possible that the RSS
12358          * maximum might end up larger than the available queues
12359          */
12360         pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
12361         pf->alloc_rss_size = 1;
12362         pf->rss_table_size = pf->hw.func_caps.rss_table_size;
12363         pf->rss_size_max = min_t(int, pf->rss_size_max,
12364                                  pf->hw.func_caps.num_tx_qp);
12365
12366         /* find the next higher power-of-2 of num cpus */
12367         pow = roundup_pow_of_two(num_online_cpus());
12368         pf->rss_size_max = min_t(int, pf->rss_size_max, pow);
12369
12370         if (pf->hw.func_caps.rss) {
12371                 pf->flags |= I40E_FLAG_RSS_ENABLED;
12372                 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
12373                                            num_online_cpus());
12374         }
12375
12376         /* MFP mode enabled */
12377         if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
12378                 pf->flags |= I40E_FLAG_MFP_ENABLED;
12379                 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
12380                 if (i40e_get_partition_bw_setting(pf)) {
12381                         dev_warn(&pf->pdev->dev,
12382                                  "Could not get partition bw settings\n");
12383                 } else {
12384                         dev_info(&pf->pdev->dev,
12385                                  "Partition BW Min = %8.8x, Max = %8.8x\n",
12386                                  pf->min_bw, pf->max_bw);
12387
12388                         /* nudge the Tx scheduler */
12389                         i40e_set_partition_bw_setting(pf);
12390                 }
12391         }
12392
12393         if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
12394             (pf->hw.func_caps.fd_filters_best_effort > 0)) {
12395                 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
12396                 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
12397                 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
12398                     pf->hw.num_partitions > 1)
12399                         dev_info(&pf->pdev->dev,
12400                                  "Flow Director Sideband mode Disabled in MFP mode\n");
12401                 else
12402                         pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12403                 pf->fdir_pf_filter_count =
12404                                  pf->hw.func_caps.fd_filters_guaranteed;
12405                 pf->hw.fdir_shared_filter_count =
12406                                  pf->hw.func_caps.fd_filters_best_effort;
12407         }
12408
12409         if (pf->hw.mac.type == I40E_MAC_X722) {
12410                 pf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE |
12411                                     I40E_HW_128_QP_RSS_CAPABLE |
12412                                     I40E_HW_ATR_EVICT_CAPABLE |
12413                                     I40E_HW_WB_ON_ITR_CAPABLE |
12414                                     I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE |
12415                                     I40E_HW_NO_PCI_LINK_CHECK |
12416                                     I40E_HW_USE_SET_LLDP_MIB |
12417                                     I40E_HW_GENEVE_OFFLOAD_CAPABLE |
12418                                     I40E_HW_PTP_L4_CAPABLE |
12419                                     I40E_HW_WOL_MC_MAGIC_PKT_WAKE |
12420                                     I40E_HW_OUTER_UDP_CSUM_CAPABLE);
12421
12422 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
12423                 if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) !=
12424                     I40E_FDEVICT_PCTYPE_DEFAULT) {
12425                         dev_warn(&pf->pdev->dev,
12426                                  "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
12427                         pf->hw_features &= ~I40E_HW_ATR_EVICT_CAPABLE;
12428                 }
12429         } else if ((pf->hw.aq.api_maj_ver > 1) ||
12430                    ((pf->hw.aq.api_maj_ver == 1) &&
12431                     (pf->hw.aq.api_min_ver > 4))) {
12432                 /* Supported in FW API version higher than 1.4 */
12433                 pf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE;
12434         }
12435
12436         /* Enable HW ATR eviction if possible */
12437         if (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)
12438                 pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED;
12439
12440         if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12441             (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
12442             (pf->hw.aq.fw_maj_ver < 4))) {
12443                 pf->hw_features |= I40E_HW_RESTART_AUTONEG;
12444                 /* No DCB support  for FW < v4.33 */
12445                 pf->hw_features |= I40E_HW_NO_DCB_SUPPORT;
12446         }
12447
12448         /* Disable FW LLDP if FW < v4.3 */
12449         if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12450             (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
12451             (pf->hw.aq.fw_maj_ver < 4)))
12452                 pf->hw_features |= I40E_HW_STOP_FW_LLDP;
12453
12454         /* Use the FW Set LLDP MIB API if FW > v4.40 */
12455         if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12456             (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
12457             (pf->hw.aq.fw_maj_ver >= 5)))
12458                 pf->hw_features |= I40E_HW_USE_SET_LLDP_MIB;
12459
12460         /* Enable PTP L4 if FW > v6.0 */
12461         if (pf->hw.mac.type == I40E_MAC_XL710 &&
12462             pf->hw.aq.fw_maj_ver >= 6)
12463                 pf->hw_features |= I40E_HW_PTP_L4_CAPABLE;
12464
12465         if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
12466                 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
12467                 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
12468                 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
12469         }
12470
12471         if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) {
12472                 pf->flags |= I40E_FLAG_IWARP_ENABLED;
12473                 /* IWARP needs one extra vector for CQP just like MISC.*/
12474                 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
12475         }
12476         /* Stopping FW LLDP engine is supported on XL710 and X722
12477          * starting from FW versions determined in i40e_init_adminq.
12478          * Stopping the FW LLDP engine is not supported on XL710
12479          * if NPAR is functioning so unset this hw flag in this case.
12480          */
12481         if (pf->hw.mac.type == I40E_MAC_XL710 &&
12482             pf->hw.func_caps.npar_enable &&
12483             (pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE))
12484                 pf->hw.flags &= ~I40E_HW_FLAG_FW_LLDP_STOPPABLE;
12485
12486 #ifdef CONFIG_PCI_IOV
12487         if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
12488                 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
12489                 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
12490                 pf->num_req_vfs = min_t(int,
12491                                         pf->hw.func_caps.num_vfs,
12492                                         I40E_MAX_VF_COUNT);
12493         }
12494 #endif /* CONFIG_PCI_IOV */
12495         pf->eeprom_version = 0xDEAD;
12496         pf->lan_veb = I40E_NO_VEB;
12497         pf->lan_vsi = I40E_NO_VSI;
12498
12499         /* By default FW has this off for performance reasons */
12500         pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
12501
12502         /* set up queue assignment tracking */
12503         size = sizeof(struct i40e_lump_tracking)
12504                 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
12505         pf->qp_pile = kzalloc(size, GFP_KERNEL);
12506         if (!pf->qp_pile) {
12507                 err = -ENOMEM;
12508                 goto sw_init_done;
12509         }
12510         pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
12511         pf->qp_pile->search_hint = 0;
12512
12513         pf->tx_timeout_recovery_level = 1;
12514
12515         if (pf->hw.mac.type != I40E_MAC_X722 &&
12516             i40e_is_total_port_shutdown_enabled(pf)) {
12517                 /* Link down on close must be on when total port shutdown
12518                  * is enabled for a given port
12519                  */
12520                 pf->flags |= (I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED |
12521                               I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED);
12522                 dev_info(&pf->pdev->dev,
12523                          "total-port-shutdown was enabled, link-down-on-close is forced on\n");
12524         }
12525         mutex_init(&pf->switch_mutex);
12526
12527 sw_init_done:
12528         return err;
12529 }
12530
12531 /**
12532  * i40e_set_ntuple - set the ntuple feature flag and take action
12533  * @pf: board private structure to initialize
12534  * @features: the feature set that the stack is suggesting
12535  *
12536  * returns a bool to indicate if reset needs to happen
12537  **/
12538 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
12539 {
12540         bool need_reset = false;
12541
12542         /* Check if Flow Director n-tuple support was enabled or disabled.  If
12543          * the state changed, we need to reset.
12544          */
12545         if (features & NETIF_F_NTUPLE) {
12546                 /* Enable filters and mark for reset */
12547                 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
12548                         need_reset = true;
12549                 /* enable FD_SB only if there is MSI-X vector and no cloud
12550                  * filters exist
12551                  */
12552                 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
12553                         pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12554                         pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
12555                 }
12556         } else {
12557                 /* turn off filters, mark for reset and clear SW filter list */
12558                 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
12559                         need_reset = true;
12560                         i40e_fdir_filter_exit(pf);
12561                 }
12562                 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
12563                 clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state);
12564                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
12565
12566                 /* reset fd counters */
12567                 pf->fd_add_err = 0;
12568                 pf->fd_atr_cnt = 0;
12569                 /* if ATR was auto disabled it can be re-enabled. */
12570                 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
12571                         if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
12572                             (I40E_DEBUG_FD & pf->hw.debug_mask))
12573                                 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
12574         }
12575         return need_reset;
12576 }
12577
12578 /**
12579  * i40e_clear_rss_lut - clear the rx hash lookup table
12580  * @vsi: the VSI being configured
12581  **/
12582 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
12583 {
12584         struct i40e_pf *pf = vsi->back;
12585         struct i40e_hw *hw = &pf->hw;
12586         u16 vf_id = vsi->vf_id;
12587         u8 i;
12588
12589         if (vsi->type == I40E_VSI_MAIN) {
12590                 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12591                         wr32(hw, I40E_PFQF_HLUT(i), 0);
12592         } else if (vsi->type == I40E_VSI_SRIOV) {
12593                 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12594                         i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
12595         } else {
12596                 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12597         }
12598 }
12599
12600 /**
12601  * i40e_set_features - set the netdev feature flags
12602  * @netdev: ptr to the netdev being adjusted
12603  * @features: the feature set that the stack is suggesting
12604  * Note: expects to be called while under rtnl_lock()
12605  **/
12606 static int i40e_set_features(struct net_device *netdev,
12607                              netdev_features_t features)
12608 {
12609         struct i40e_netdev_priv *np = netdev_priv(netdev);
12610         struct i40e_vsi *vsi = np->vsi;
12611         struct i40e_pf *pf = vsi->back;
12612         bool need_reset;
12613
12614         if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
12615                 i40e_pf_config_rss(pf);
12616         else if (!(features & NETIF_F_RXHASH) &&
12617                  netdev->features & NETIF_F_RXHASH)
12618                 i40e_clear_rss_lut(vsi);
12619
12620         if (features & NETIF_F_HW_VLAN_CTAG_RX)
12621                 i40e_vlan_stripping_enable(vsi);
12622         else
12623                 i40e_vlan_stripping_disable(vsi);
12624
12625         if (!(features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
12626                 dev_err(&pf->pdev->dev,
12627                         "Offloaded tc filters active, can't turn hw_tc_offload off");
12628                 return -EINVAL;
12629         }
12630
12631         if (!(features & NETIF_F_HW_L2FW_DOFFLOAD) && vsi->macvlan_cnt)
12632                 i40e_del_all_macvlans(vsi);
12633
12634         need_reset = i40e_set_ntuple(pf, features);
12635
12636         if (need_reset)
12637                 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
12638
12639         return 0;
12640 }
12641
12642 static int i40e_udp_tunnel_set_port(struct net_device *netdev,
12643                                     unsigned int table, unsigned int idx,
12644                                     struct udp_tunnel_info *ti)
12645 {
12646         struct i40e_netdev_priv *np = netdev_priv(netdev);
12647         struct i40e_hw *hw = &np->vsi->back->hw;
12648         u8 type, filter_index;
12649         i40e_status ret;
12650
12651         type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? I40E_AQC_TUNNEL_TYPE_VXLAN :
12652                                                    I40E_AQC_TUNNEL_TYPE_NGE;
12653
12654         ret = i40e_aq_add_udp_tunnel(hw, ntohs(ti->port), type, &filter_index,
12655                                      NULL);
12656         if (ret) {
12657                 netdev_info(netdev, "add UDP port failed, err %s aq_err %s\n",
12658                             i40e_stat_str(hw, ret),
12659                             i40e_aq_str(hw, hw->aq.asq_last_status));
12660                 return -EIO;
12661         }
12662
12663         udp_tunnel_nic_set_port_priv(netdev, table, idx, filter_index);
12664         return 0;
12665 }
12666
12667 static int i40e_udp_tunnel_unset_port(struct net_device *netdev,
12668                                       unsigned int table, unsigned int idx,
12669                                       struct udp_tunnel_info *ti)
12670 {
12671         struct i40e_netdev_priv *np = netdev_priv(netdev);
12672         struct i40e_hw *hw = &np->vsi->back->hw;
12673         i40e_status ret;
12674
12675         ret = i40e_aq_del_udp_tunnel(hw, ti->hw_priv, NULL);
12676         if (ret) {
12677                 netdev_info(netdev, "delete UDP port failed, err %s aq_err %s\n",
12678                             i40e_stat_str(hw, ret),
12679                             i40e_aq_str(hw, hw->aq.asq_last_status));
12680                 return -EIO;
12681         }
12682
12683         return 0;
12684 }
12685
12686 static int i40e_get_phys_port_id(struct net_device *netdev,
12687                                  struct netdev_phys_item_id *ppid)
12688 {
12689         struct i40e_netdev_priv *np = netdev_priv(netdev);
12690         struct i40e_pf *pf = np->vsi->back;
12691         struct i40e_hw *hw = &pf->hw;
12692
12693         if (!(pf->hw_features & I40E_HW_PORT_ID_VALID))
12694                 return -EOPNOTSUPP;
12695
12696         ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
12697         memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
12698
12699         return 0;
12700 }
12701
12702 /**
12703  * i40e_ndo_fdb_add - add an entry to the hardware database
12704  * @ndm: the input from the stack
12705  * @tb: pointer to array of nladdr (unused)
12706  * @dev: the net device pointer
12707  * @addr: the MAC address entry being added
12708  * @vid: VLAN ID
12709  * @flags: instructions from stack about fdb operation
12710  * @extack: netlink extended ack, unused currently
12711  */
12712 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
12713                             struct net_device *dev,
12714                             const unsigned char *addr, u16 vid,
12715                             u16 flags,
12716                             struct netlink_ext_ack *extack)
12717 {
12718         struct i40e_netdev_priv *np = netdev_priv(dev);
12719         struct i40e_pf *pf = np->vsi->back;
12720         int err = 0;
12721
12722         if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
12723                 return -EOPNOTSUPP;
12724
12725         if (vid) {
12726                 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
12727                 return -EINVAL;
12728         }
12729
12730         /* Hardware does not support aging addresses so if a
12731          * ndm_state is given only allow permanent addresses
12732          */
12733         if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
12734                 netdev_info(dev, "FDB only supports static addresses\n");
12735                 return -EINVAL;
12736         }
12737
12738         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
12739                 err = dev_uc_add_excl(dev, addr);
12740         else if (is_multicast_ether_addr(addr))
12741                 err = dev_mc_add_excl(dev, addr);
12742         else
12743                 err = -EINVAL;
12744
12745         /* Only return duplicate errors if NLM_F_EXCL is set */
12746         if (err == -EEXIST && !(flags & NLM_F_EXCL))
12747                 err = 0;
12748
12749         return err;
12750 }
12751
12752 /**
12753  * i40e_ndo_bridge_setlink - Set the hardware bridge mode
12754  * @dev: the netdev being configured
12755  * @nlh: RTNL message
12756  * @flags: bridge flags
12757  * @extack: netlink extended ack
12758  *
12759  * Inserts a new hardware bridge if not already created and
12760  * enables the bridging mode requested (VEB or VEPA). If the
12761  * hardware bridge has already been inserted and the request
12762  * is to change the mode then that requires a PF reset to
12763  * allow rebuild of the components with required hardware
12764  * bridge mode enabled.
12765  *
12766  * Note: expects to be called while under rtnl_lock()
12767  **/
12768 static int i40e_ndo_bridge_setlink(struct net_device *dev,
12769                                    struct nlmsghdr *nlh,
12770                                    u16 flags,
12771                                    struct netlink_ext_ack *extack)
12772 {
12773         struct i40e_netdev_priv *np = netdev_priv(dev);
12774         struct i40e_vsi *vsi = np->vsi;
12775         struct i40e_pf *pf = vsi->back;
12776         struct i40e_veb *veb = NULL;
12777         struct nlattr *attr, *br_spec;
12778         int i, rem;
12779
12780         /* Only for PF VSI for now */
12781         if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
12782                 return -EOPNOTSUPP;
12783
12784         /* Find the HW bridge for PF VSI */
12785         for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
12786                 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
12787                         veb = pf->veb[i];
12788         }
12789
12790         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
12791
12792         nla_for_each_nested(attr, br_spec, rem) {
12793                 __u16 mode;
12794
12795                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
12796                         continue;
12797
12798                 mode = nla_get_u16(attr);
12799                 if ((mode != BRIDGE_MODE_VEPA) &&
12800                     (mode != BRIDGE_MODE_VEB))
12801                         return -EINVAL;
12802
12803                 /* Insert a new HW bridge */
12804                 if (!veb) {
12805                         veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
12806                                              vsi->tc_config.enabled_tc);
12807                         if (veb) {
12808                                 veb->bridge_mode = mode;
12809                                 i40e_config_bridge_mode(veb);
12810                         } else {
12811                                 /* No Bridge HW offload available */
12812                                 return -ENOENT;
12813                         }
12814                         break;
12815                 } else if (mode != veb->bridge_mode) {
12816                         /* Existing HW bridge but different mode needs reset */
12817                         veb->bridge_mode = mode;
12818                         /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
12819                         if (mode == BRIDGE_MODE_VEB)
12820                                 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
12821                         else
12822                                 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
12823                         i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
12824                         break;
12825                 }
12826         }
12827
12828         return 0;
12829 }
12830
12831 /**
12832  * i40e_ndo_bridge_getlink - Get the hardware bridge mode
12833  * @skb: skb buff
12834  * @pid: process id
12835  * @seq: RTNL message seq #
12836  * @dev: the netdev being configured
12837  * @filter_mask: unused
12838  * @nlflags: netlink flags passed in
12839  *
12840  * Return the mode in which the hardware bridge is operating in
12841  * i.e VEB or VEPA.
12842  **/
12843 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
12844                                    struct net_device *dev,
12845                                    u32 __always_unused filter_mask,
12846                                    int nlflags)
12847 {
12848         struct i40e_netdev_priv *np = netdev_priv(dev);
12849         struct i40e_vsi *vsi = np->vsi;
12850         struct i40e_pf *pf = vsi->back;
12851         struct i40e_veb *veb = NULL;
12852         int i;
12853
12854         /* Only for PF VSI for now */
12855         if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
12856                 return -EOPNOTSUPP;
12857
12858         /* Find the HW bridge for the PF VSI */
12859         for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
12860                 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
12861                         veb = pf->veb[i];
12862         }
12863
12864         if (!veb)
12865                 return 0;
12866
12867         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
12868                                        0, 0, nlflags, filter_mask, NULL);
12869 }
12870
12871 /**
12872  * i40e_features_check - Validate encapsulated packet conforms to limits
12873  * @skb: skb buff
12874  * @dev: This physical port's netdev
12875  * @features: Offload features that the stack believes apply
12876  **/
12877 static netdev_features_t i40e_features_check(struct sk_buff *skb,
12878                                              struct net_device *dev,
12879                                              netdev_features_t features)
12880 {
12881         size_t len;
12882
12883         /* No point in doing any of this if neither checksum nor GSO are
12884          * being requested for this frame.  We can rule out both by just
12885          * checking for CHECKSUM_PARTIAL
12886          */
12887         if (skb->ip_summed != CHECKSUM_PARTIAL)
12888                 return features;
12889
12890         /* We cannot support GSO if the MSS is going to be less than
12891          * 64 bytes.  If it is then we need to drop support for GSO.
12892          */
12893         if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
12894                 features &= ~NETIF_F_GSO_MASK;
12895
12896         /* MACLEN can support at most 63 words */
12897         len = skb_network_header(skb) - skb->data;
12898         if (len & ~(63 * 2))
12899                 goto out_err;
12900
12901         /* IPLEN and EIPLEN can support at most 127 dwords */
12902         len = skb_transport_header(skb) - skb_network_header(skb);
12903         if (len & ~(127 * 4))
12904                 goto out_err;
12905
12906         if (skb->encapsulation) {
12907                 /* L4TUNLEN can support 127 words */
12908                 len = skb_inner_network_header(skb) - skb_transport_header(skb);
12909                 if (len & ~(127 * 2))
12910                         goto out_err;
12911
12912                 /* IPLEN can support at most 127 dwords */
12913                 len = skb_inner_transport_header(skb) -
12914                       skb_inner_network_header(skb);
12915                 if (len & ~(127 * 4))
12916                         goto out_err;
12917         }
12918
12919         /* No need to validate L4LEN as TCP is the only protocol with a
12920          * a flexible value and we support all possible values supported
12921          * by TCP, which is at most 15 dwords
12922          */
12923
12924         return features;
12925 out_err:
12926         return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
12927 }
12928
12929 /**
12930  * i40e_xdp_setup - add/remove an XDP program
12931  * @vsi: VSI to changed
12932  * @prog: XDP program
12933  * @extack: netlink extended ack
12934  **/
12935 static int i40e_xdp_setup(struct i40e_vsi *vsi, struct bpf_prog *prog,
12936                           struct netlink_ext_ack *extack)
12937 {
12938         int frame_size = vsi->netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
12939         struct i40e_pf *pf = vsi->back;
12940         struct bpf_prog *old_prog;
12941         bool need_reset;
12942         int i;
12943
12944         /* Don't allow frames that span over multiple buffers */
12945         if (frame_size > vsi->rx_buf_len) {
12946                 NL_SET_ERR_MSG_MOD(extack, "MTU too large to enable XDP");
12947                 return -EINVAL;
12948         }
12949
12950         /* When turning XDP on->off/off->on we reset and rebuild the rings. */
12951         need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog);
12952
12953         if (need_reset)
12954                 i40e_prep_for_reset(pf);
12955
12956         old_prog = xchg(&vsi->xdp_prog, prog);
12957
12958         if (need_reset) {
12959                 if (!prog)
12960                         /* Wait until ndo_xsk_wakeup completes. */
12961                         synchronize_rcu();
12962                 i40e_reset_and_rebuild(pf, true, true);
12963         }
12964
12965         for (i = 0; i < vsi->num_queue_pairs; i++)
12966                 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
12967
12968         if (old_prog)
12969                 bpf_prog_put(old_prog);
12970
12971         /* Kick start the NAPI context if there is an AF_XDP socket open
12972          * on that queue id. This so that receiving will start.
12973          */
12974         if (need_reset && prog)
12975                 for (i = 0; i < vsi->num_queue_pairs; i++)
12976                         if (vsi->xdp_rings[i]->xsk_pool)
12977                                 (void)i40e_xsk_wakeup(vsi->netdev, i,
12978                                                       XDP_WAKEUP_RX);
12979
12980         return 0;
12981 }
12982
12983 /**
12984  * i40e_enter_busy_conf - Enters busy config state
12985  * @vsi: vsi
12986  *
12987  * Returns 0 on success, <0 for failure.
12988  **/
12989 static int i40e_enter_busy_conf(struct i40e_vsi *vsi)
12990 {
12991         struct i40e_pf *pf = vsi->back;
12992         int timeout = 50;
12993
12994         while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
12995                 timeout--;
12996                 if (!timeout)
12997                         return -EBUSY;
12998                 usleep_range(1000, 2000);
12999         }
13000
13001         return 0;
13002 }
13003
13004 /**
13005  * i40e_exit_busy_conf - Exits busy config state
13006  * @vsi: vsi
13007  **/
13008 static void i40e_exit_busy_conf(struct i40e_vsi *vsi)
13009 {
13010         struct i40e_pf *pf = vsi->back;
13011
13012         clear_bit(__I40E_CONFIG_BUSY, pf->state);
13013 }
13014
13015 /**
13016  * i40e_queue_pair_reset_stats - Resets all statistics for a queue pair
13017  * @vsi: vsi
13018  * @queue_pair: queue pair
13019  **/
13020 static void i40e_queue_pair_reset_stats(struct i40e_vsi *vsi, int queue_pair)
13021 {
13022         memset(&vsi->rx_rings[queue_pair]->rx_stats, 0,
13023                sizeof(vsi->rx_rings[queue_pair]->rx_stats));
13024         memset(&vsi->tx_rings[queue_pair]->stats, 0,
13025                sizeof(vsi->tx_rings[queue_pair]->stats));
13026         if (i40e_enabled_xdp_vsi(vsi)) {
13027                 memset(&vsi->xdp_rings[queue_pair]->stats, 0,
13028                        sizeof(vsi->xdp_rings[queue_pair]->stats));
13029         }
13030 }
13031
13032 /**
13033  * i40e_queue_pair_clean_rings - Cleans all the rings of a queue pair
13034  * @vsi: vsi
13035  * @queue_pair: queue pair
13036  **/
13037 static void i40e_queue_pair_clean_rings(struct i40e_vsi *vsi, int queue_pair)
13038 {
13039         i40e_clean_tx_ring(vsi->tx_rings[queue_pair]);
13040         if (i40e_enabled_xdp_vsi(vsi)) {
13041                 /* Make sure that in-progress ndo_xdp_xmit calls are
13042                  * completed.
13043                  */
13044                 synchronize_rcu();
13045                 i40e_clean_tx_ring(vsi->xdp_rings[queue_pair]);
13046         }
13047         i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
13048 }
13049
13050 /**
13051  * i40e_queue_pair_toggle_napi - Enables/disables NAPI for a queue pair
13052  * @vsi: vsi
13053  * @queue_pair: queue pair
13054  * @enable: true for enable, false for disable
13055  **/
13056 static void i40e_queue_pair_toggle_napi(struct i40e_vsi *vsi, int queue_pair,
13057                                         bool enable)
13058 {
13059         struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13060         struct i40e_q_vector *q_vector = rxr->q_vector;
13061
13062         if (!vsi->netdev)
13063                 return;
13064
13065         /* All rings in a qp belong to the same qvector. */
13066         if (q_vector->rx.ring || q_vector->tx.ring) {
13067                 if (enable)
13068                         napi_enable(&q_vector->napi);
13069                 else
13070                         napi_disable(&q_vector->napi);
13071         }
13072 }
13073
13074 /**
13075  * i40e_queue_pair_toggle_rings - Enables/disables all rings for a queue pair
13076  * @vsi: vsi
13077  * @queue_pair: queue pair
13078  * @enable: true for enable, false for disable
13079  *
13080  * Returns 0 on success, <0 on failure.
13081  **/
13082 static int i40e_queue_pair_toggle_rings(struct i40e_vsi *vsi, int queue_pair,
13083                                         bool enable)
13084 {
13085         struct i40e_pf *pf = vsi->back;
13086         int pf_q, ret = 0;
13087
13088         pf_q = vsi->base_queue + queue_pair;
13089         ret = i40e_control_wait_tx_q(vsi->seid, pf, pf_q,
13090                                      false /*is xdp*/, enable);
13091         if (ret) {
13092                 dev_info(&pf->pdev->dev,
13093                          "VSI seid %d Tx ring %d %sable timeout\n",
13094                          vsi->seid, pf_q, (enable ? "en" : "dis"));
13095                 return ret;
13096         }
13097
13098         i40e_control_rx_q(pf, pf_q, enable);
13099         ret = i40e_pf_rxq_wait(pf, pf_q, enable);
13100         if (ret) {
13101                 dev_info(&pf->pdev->dev,
13102                          "VSI seid %d Rx ring %d %sable timeout\n",
13103                          vsi->seid, pf_q, (enable ? "en" : "dis"));
13104                 return ret;
13105         }
13106
13107         /* Due to HW errata, on Rx disable only, the register can
13108          * indicate done before it really is. Needs 50ms to be sure
13109          */
13110         if (!enable)
13111                 mdelay(50);
13112
13113         if (!i40e_enabled_xdp_vsi(vsi))
13114                 return ret;
13115
13116         ret = i40e_control_wait_tx_q(vsi->seid, pf,
13117                                      pf_q + vsi->alloc_queue_pairs,
13118                                      true /*is xdp*/, enable);
13119         if (ret) {
13120                 dev_info(&pf->pdev->dev,
13121                          "VSI seid %d XDP Tx ring %d %sable timeout\n",
13122                          vsi->seid, pf_q, (enable ? "en" : "dis"));
13123         }
13124
13125         return ret;
13126 }
13127
13128 /**
13129  * i40e_queue_pair_enable_irq - Enables interrupts for a queue pair
13130  * @vsi: vsi
13131  * @queue_pair: queue_pair
13132  **/
13133 static void i40e_queue_pair_enable_irq(struct i40e_vsi *vsi, int queue_pair)
13134 {
13135         struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13136         struct i40e_pf *pf = vsi->back;
13137         struct i40e_hw *hw = &pf->hw;
13138
13139         /* All rings in a qp belong to the same qvector. */
13140         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
13141                 i40e_irq_dynamic_enable(vsi, rxr->q_vector->v_idx);
13142         else
13143                 i40e_irq_dynamic_enable_icr0(pf);
13144
13145         i40e_flush(hw);
13146 }
13147
13148 /**
13149  * i40e_queue_pair_disable_irq - Disables interrupts for a queue pair
13150  * @vsi: vsi
13151  * @queue_pair: queue_pair
13152  **/
13153 static void i40e_queue_pair_disable_irq(struct i40e_vsi *vsi, int queue_pair)
13154 {
13155         struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13156         struct i40e_pf *pf = vsi->back;
13157         struct i40e_hw *hw = &pf->hw;
13158
13159         /* For simplicity, instead of removing the qp interrupt causes
13160          * from the interrupt linked list, we simply disable the interrupt, and
13161          * leave the list intact.
13162          *
13163          * All rings in a qp belong to the same qvector.
13164          */
13165         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
13166                 u32 intpf = vsi->base_vector + rxr->q_vector->v_idx;
13167
13168                 wr32(hw, I40E_PFINT_DYN_CTLN(intpf - 1), 0);
13169                 i40e_flush(hw);
13170                 synchronize_irq(pf->msix_entries[intpf].vector);
13171         } else {
13172                 /* Legacy and MSI mode - this stops all interrupt handling */
13173                 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
13174                 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
13175                 i40e_flush(hw);
13176                 synchronize_irq(pf->pdev->irq);
13177         }
13178 }
13179
13180 /**
13181  * i40e_queue_pair_disable - Disables a queue pair
13182  * @vsi: vsi
13183  * @queue_pair: queue pair
13184  *
13185  * Returns 0 on success, <0 on failure.
13186  **/
13187 int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair)
13188 {
13189         int err;
13190
13191         err = i40e_enter_busy_conf(vsi);
13192         if (err)
13193                 return err;
13194
13195         i40e_queue_pair_disable_irq(vsi, queue_pair);
13196         err = i40e_queue_pair_toggle_rings(vsi, queue_pair, false /* off */);
13197         i40e_queue_pair_toggle_napi(vsi, queue_pair, false /* off */);
13198         i40e_queue_pair_clean_rings(vsi, queue_pair);
13199         i40e_queue_pair_reset_stats(vsi, queue_pair);
13200
13201         return err;
13202 }
13203
13204 /**
13205  * i40e_queue_pair_enable - Enables a queue pair
13206  * @vsi: vsi
13207  * @queue_pair: queue pair
13208  *
13209  * Returns 0 on success, <0 on failure.
13210  **/
13211 int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair)
13212 {
13213         int err;
13214
13215         err = i40e_configure_tx_ring(vsi->tx_rings[queue_pair]);
13216         if (err)
13217                 return err;
13218
13219         if (i40e_enabled_xdp_vsi(vsi)) {
13220                 err = i40e_configure_tx_ring(vsi->xdp_rings[queue_pair]);
13221                 if (err)
13222                         return err;
13223         }
13224
13225         err = i40e_configure_rx_ring(vsi->rx_rings[queue_pair]);
13226         if (err)
13227                 return err;
13228
13229         err = i40e_queue_pair_toggle_rings(vsi, queue_pair, true /* on */);
13230         i40e_queue_pair_toggle_napi(vsi, queue_pair, true /* on */);
13231         i40e_queue_pair_enable_irq(vsi, queue_pair);
13232
13233         i40e_exit_busy_conf(vsi);
13234
13235         return err;
13236 }
13237
13238 /**
13239  * i40e_xdp - implements ndo_bpf for i40e
13240  * @dev: netdevice
13241  * @xdp: XDP command
13242  **/
13243 static int i40e_xdp(struct net_device *dev,
13244                     struct netdev_bpf *xdp)
13245 {
13246         struct i40e_netdev_priv *np = netdev_priv(dev);
13247         struct i40e_vsi *vsi = np->vsi;
13248
13249         if (vsi->type != I40E_VSI_MAIN)
13250                 return -EINVAL;
13251
13252         switch (xdp->command) {
13253         case XDP_SETUP_PROG:
13254                 return i40e_xdp_setup(vsi, xdp->prog, xdp->extack);
13255         case XDP_SETUP_XSK_POOL:
13256                 return i40e_xsk_pool_setup(vsi, xdp->xsk.pool,
13257                                            xdp->xsk.queue_id);
13258         default:
13259                 return -EINVAL;
13260         }
13261 }
13262
13263 static const struct net_device_ops i40e_netdev_ops = {
13264         .ndo_open               = i40e_open,
13265         .ndo_stop               = i40e_close,
13266         .ndo_start_xmit         = i40e_lan_xmit_frame,
13267         .ndo_get_stats64        = i40e_get_netdev_stats_struct,
13268         .ndo_set_rx_mode        = i40e_set_rx_mode,
13269         .ndo_validate_addr      = eth_validate_addr,
13270         .ndo_set_mac_address    = i40e_set_mac,
13271         .ndo_change_mtu         = i40e_change_mtu,
13272         .ndo_eth_ioctl          = i40e_ioctl,
13273         .ndo_tx_timeout         = i40e_tx_timeout,
13274         .ndo_vlan_rx_add_vid    = i40e_vlan_rx_add_vid,
13275         .ndo_vlan_rx_kill_vid   = i40e_vlan_rx_kill_vid,
13276 #ifdef CONFIG_NET_POLL_CONTROLLER
13277         .ndo_poll_controller    = i40e_netpoll,
13278 #endif
13279         .ndo_setup_tc           = __i40e_setup_tc,
13280         .ndo_select_queue       = i40e_lan_select_queue,
13281         .ndo_set_features       = i40e_set_features,
13282         .ndo_set_vf_mac         = i40e_ndo_set_vf_mac,
13283         .ndo_set_vf_vlan        = i40e_ndo_set_vf_port_vlan,
13284         .ndo_get_vf_stats       = i40e_get_vf_stats,
13285         .ndo_set_vf_rate        = i40e_ndo_set_vf_bw,
13286         .ndo_get_vf_config      = i40e_ndo_get_vf_config,
13287         .ndo_set_vf_link_state  = i40e_ndo_set_vf_link_state,
13288         .ndo_set_vf_spoofchk    = i40e_ndo_set_vf_spoofchk,
13289         .ndo_set_vf_trust       = i40e_ndo_set_vf_trust,
13290         .ndo_get_phys_port_id   = i40e_get_phys_port_id,
13291         .ndo_fdb_add            = i40e_ndo_fdb_add,
13292         .ndo_features_check     = i40e_features_check,
13293         .ndo_bridge_getlink     = i40e_ndo_bridge_getlink,
13294         .ndo_bridge_setlink     = i40e_ndo_bridge_setlink,
13295         .ndo_bpf                = i40e_xdp,
13296         .ndo_xdp_xmit           = i40e_xdp_xmit,
13297         .ndo_xsk_wakeup         = i40e_xsk_wakeup,
13298         .ndo_dfwd_add_station   = i40e_fwd_add,
13299         .ndo_dfwd_del_station   = i40e_fwd_del,
13300 };
13301
13302 /**
13303  * i40e_config_netdev - Setup the netdev flags
13304  * @vsi: the VSI being configured
13305  *
13306  * Returns 0 on success, negative value on failure
13307  **/
13308 static int i40e_config_netdev(struct i40e_vsi *vsi)
13309 {
13310         struct i40e_pf *pf = vsi->back;
13311         struct i40e_hw *hw = &pf->hw;
13312         struct i40e_netdev_priv *np;
13313         struct net_device *netdev;
13314         u8 broadcast[ETH_ALEN];
13315         u8 mac_addr[ETH_ALEN];
13316         int etherdev_size;
13317         netdev_features_t hw_enc_features;
13318         netdev_features_t hw_features;
13319
13320         etherdev_size = sizeof(struct i40e_netdev_priv);
13321         netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
13322         if (!netdev)
13323                 return -ENOMEM;
13324
13325         vsi->netdev = netdev;
13326         np = netdev_priv(netdev);
13327         np->vsi = vsi;
13328
13329         hw_enc_features = NETIF_F_SG                    |
13330                           NETIF_F_IP_CSUM               |
13331                           NETIF_F_IPV6_CSUM             |
13332                           NETIF_F_HIGHDMA               |
13333                           NETIF_F_SOFT_FEATURES         |
13334                           NETIF_F_TSO                   |
13335                           NETIF_F_TSO_ECN               |
13336                           NETIF_F_TSO6                  |
13337                           NETIF_F_GSO_GRE               |
13338                           NETIF_F_GSO_GRE_CSUM          |
13339                           NETIF_F_GSO_PARTIAL           |
13340                           NETIF_F_GSO_IPXIP4            |
13341                           NETIF_F_GSO_IPXIP6            |
13342                           NETIF_F_GSO_UDP_TUNNEL        |
13343                           NETIF_F_GSO_UDP_TUNNEL_CSUM   |
13344                           NETIF_F_GSO_UDP_L4            |
13345                           NETIF_F_SCTP_CRC              |
13346                           NETIF_F_RXHASH                |
13347                           NETIF_F_RXCSUM                |
13348                           0;
13349
13350         if (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE))
13351                 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
13352
13353         netdev->udp_tunnel_nic_info = &pf->udp_tunnel_nic;
13354
13355         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
13356
13357         netdev->hw_enc_features |= hw_enc_features;
13358
13359         /* record features VLANs can make use of */
13360         netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
13361
13362         /* enable macvlan offloads */
13363         netdev->hw_features |= NETIF_F_HW_L2FW_DOFFLOAD;
13364
13365         hw_features = hw_enc_features           |
13366                       NETIF_F_HW_VLAN_CTAG_TX   |
13367                       NETIF_F_HW_VLAN_CTAG_RX;
13368
13369         if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
13370                 hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
13371
13372         netdev->hw_features |= hw_features;
13373
13374         netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
13375         netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
13376
13377         if (vsi->type == I40E_VSI_MAIN) {
13378                 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
13379                 ether_addr_copy(mac_addr, hw->mac.perm_addr);
13380                 /* The following steps are necessary for two reasons. First,
13381                  * some older NVM configurations load a default MAC-VLAN
13382                  * filter that will accept any tagged packet, and we want to
13383                  * replace this with a normal filter. Additionally, it is
13384                  * possible our MAC address was provided by the platform using
13385                  * Open Firmware or similar.
13386                  *
13387                  * Thus, we need to remove the default filter and install one
13388                  * specific to the MAC address.
13389                  */
13390                 i40e_rm_default_mac_filter(vsi, mac_addr);
13391                 spin_lock_bh(&vsi->mac_filter_hash_lock);
13392                 i40e_add_mac_filter(vsi, mac_addr);
13393                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13394         } else {
13395                 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
13396                  * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
13397                  * the end, which is 4 bytes long, so force truncation of the
13398                  * original name by IFNAMSIZ - 4
13399                  */
13400                 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d",
13401                          IFNAMSIZ - 4,
13402                          pf->vsi[pf->lan_vsi]->netdev->name);
13403                 eth_random_addr(mac_addr);
13404
13405                 spin_lock_bh(&vsi->mac_filter_hash_lock);
13406                 i40e_add_mac_filter(vsi, mac_addr);
13407                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13408         }
13409
13410         /* Add the broadcast filter so that we initially will receive
13411          * broadcast packets. Note that when a new VLAN is first added the
13412          * driver will convert all filters marked I40E_VLAN_ANY into VLAN
13413          * specific filters as part of transitioning into "vlan" operation.
13414          * When more VLANs are added, the driver will copy each existing MAC
13415          * filter and add it for the new VLAN.
13416          *
13417          * Broadcast filters are handled specially by
13418          * i40e_sync_filters_subtask, as the driver must to set the broadcast
13419          * promiscuous bit instead of adding this directly as a MAC/VLAN
13420          * filter. The subtask will update the correct broadcast promiscuous
13421          * bits as VLANs become active or inactive.
13422          */
13423         eth_broadcast_addr(broadcast);
13424         spin_lock_bh(&vsi->mac_filter_hash_lock);
13425         i40e_add_mac_filter(vsi, broadcast);
13426         spin_unlock_bh(&vsi->mac_filter_hash_lock);
13427
13428         ether_addr_copy(netdev->dev_addr, mac_addr);
13429         ether_addr_copy(netdev->perm_addr, mac_addr);
13430
13431         /* i40iw_net_event() reads 16 bytes from neigh->primary_key */
13432         netdev->neigh_priv_len = sizeof(u32) * 4;
13433
13434         netdev->priv_flags |= IFF_UNICAST_FLT;
13435         netdev->priv_flags |= IFF_SUPP_NOFCS;
13436         /* Setup netdev TC information */
13437         i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
13438
13439         netdev->netdev_ops = &i40e_netdev_ops;
13440         netdev->watchdog_timeo = 5 * HZ;
13441         i40e_set_ethtool_ops(netdev);
13442
13443         /* MTU range: 68 - 9706 */
13444         netdev->min_mtu = ETH_MIN_MTU;
13445         netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD;
13446
13447         return 0;
13448 }
13449
13450 /**
13451  * i40e_vsi_delete - Delete a VSI from the switch
13452  * @vsi: the VSI being removed
13453  *
13454  * Returns 0 on success, negative value on failure
13455  **/
13456 static void i40e_vsi_delete(struct i40e_vsi *vsi)
13457 {
13458         /* remove default VSI is not allowed */
13459         if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
13460                 return;
13461
13462         i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
13463 }
13464
13465 /**
13466  * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
13467  * @vsi: the VSI being queried
13468  *
13469  * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
13470  **/
13471 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
13472 {
13473         struct i40e_veb *veb;
13474         struct i40e_pf *pf = vsi->back;
13475
13476         /* Uplink is not a bridge so default to VEB */
13477         if (vsi->veb_idx >= I40E_MAX_VEB)
13478                 return 1;
13479
13480         veb = pf->veb[vsi->veb_idx];
13481         if (!veb) {
13482                 dev_info(&pf->pdev->dev,
13483                          "There is no veb associated with the bridge\n");
13484                 return -ENOENT;
13485         }
13486
13487         /* Uplink is a bridge in VEPA mode */
13488         if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
13489                 return 0;
13490         } else {
13491                 /* Uplink is a bridge in VEB mode */
13492                 return 1;
13493         }
13494
13495         /* VEPA is now default bridge, so return 0 */
13496         return 0;
13497 }
13498
13499 /**
13500  * i40e_add_vsi - Add a VSI to the switch
13501  * @vsi: the VSI being configured
13502  *
13503  * This initializes a VSI context depending on the VSI type to be added and
13504  * passes it down to the add_vsi aq command.
13505  **/
13506 static int i40e_add_vsi(struct i40e_vsi *vsi)
13507 {
13508         int ret = -ENODEV;
13509         struct i40e_pf *pf = vsi->back;
13510         struct i40e_hw *hw = &pf->hw;
13511         struct i40e_vsi_context ctxt;
13512         struct i40e_mac_filter *f;
13513         struct hlist_node *h;
13514         int bkt;
13515
13516         u8 enabled_tc = 0x1; /* TC0 enabled */
13517         int f_count = 0;
13518
13519         memset(&ctxt, 0, sizeof(ctxt));
13520         switch (vsi->type) {
13521         case I40E_VSI_MAIN:
13522                 /* The PF's main VSI is already setup as part of the
13523                  * device initialization, so we'll not bother with
13524                  * the add_vsi call, but we will retrieve the current
13525                  * VSI context.
13526                  */
13527                 ctxt.seid = pf->main_vsi_seid;
13528                 ctxt.pf_num = pf->hw.pf_id;
13529                 ctxt.vf_num = 0;
13530                 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
13531                 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13532                 if (ret) {
13533                         dev_info(&pf->pdev->dev,
13534                                  "couldn't get PF vsi config, err %s aq_err %s\n",
13535                                  i40e_stat_str(&pf->hw, ret),
13536                                  i40e_aq_str(&pf->hw,
13537                                              pf->hw.aq.asq_last_status));
13538                         return -ENOENT;
13539                 }
13540                 vsi->info = ctxt.info;
13541                 vsi->info.valid_sections = 0;
13542
13543                 vsi->seid = ctxt.seid;
13544                 vsi->id = ctxt.vsi_number;
13545
13546                 enabled_tc = i40e_pf_get_tc_map(pf);
13547
13548                 /* Source pruning is enabled by default, so the flag is
13549                  * negative logic - if it's set, we need to fiddle with
13550                  * the VSI to disable source pruning.
13551                  */
13552                 if (pf->flags & I40E_FLAG_SOURCE_PRUNING_DISABLED) {
13553                         memset(&ctxt, 0, sizeof(ctxt));
13554                         ctxt.seid = pf->main_vsi_seid;
13555                         ctxt.pf_num = pf->hw.pf_id;
13556                         ctxt.vf_num = 0;
13557                         ctxt.info.valid_sections |=
13558                                      cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13559                         ctxt.info.switch_id =
13560                                    cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
13561                         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13562                         if (ret) {
13563                                 dev_info(&pf->pdev->dev,
13564                                          "update vsi failed, err %s aq_err %s\n",
13565                                          i40e_stat_str(&pf->hw, ret),
13566                                          i40e_aq_str(&pf->hw,
13567                                                      pf->hw.aq.asq_last_status));
13568                                 ret = -ENOENT;
13569                                 goto err;
13570                         }
13571                 }
13572
13573                 /* MFP mode setup queue map and update VSI */
13574                 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
13575                     !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
13576                         memset(&ctxt, 0, sizeof(ctxt));
13577                         ctxt.seid = pf->main_vsi_seid;
13578                         ctxt.pf_num = pf->hw.pf_id;
13579                         ctxt.vf_num = 0;
13580                         i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
13581                         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13582                         if (ret) {
13583                                 dev_info(&pf->pdev->dev,
13584                                          "update vsi failed, err %s aq_err %s\n",
13585                                          i40e_stat_str(&pf->hw, ret),
13586                                          i40e_aq_str(&pf->hw,
13587                                                     pf->hw.aq.asq_last_status));
13588                                 ret = -ENOENT;
13589                                 goto err;
13590                         }
13591                         /* update the local VSI info queue map */
13592                         i40e_vsi_update_queue_map(vsi, &ctxt);
13593                         vsi->info.valid_sections = 0;
13594                 } else {
13595                         /* Default/Main VSI is only enabled for TC0
13596                          * reconfigure it to enable all TCs that are
13597                          * available on the port in SFP mode.
13598                          * For MFP case the iSCSI PF would use this
13599                          * flow to enable LAN+iSCSI TC.
13600                          */
13601                         ret = i40e_vsi_config_tc(vsi, enabled_tc);
13602                         if (ret) {
13603                                 /* Single TC condition is not fatal,
13604                                  * message and continue
13605                                  */
13606                                 dev_info(&pf->pdev->dev,
13607                                          "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
13608                                          enabled_tc,
13609                                          i40e_stat_str(&pf->hw, ret),
13610                                          i40e_aq_str(&pf->hw,
13611                                                     pf->hw.aq.asq_last_status));
13612                         }
13613                 }
13614                 break;
13615
13616         case I40E_VSI_FDIR:
13617                 ctxt.pf_num = hw->pf_id;
13618                 ctxt.vf_num = 0;
13619                 ctxt.uplink_seid = vsi->uplink_seid;
13620                 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13621                 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13622                 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
13623                     (i40e_is_vsi_uplink_mode_veb(vsi))) {
13624                         ctxt.info.valid_sections |=
13625                              cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13626                         ctxt.info.switch_id =
13627                            cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13628                 }
13629                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13630                 break;
13631
13632         case I40E_VSI_VMDQ2:
13633                 ctxt.pf_num = hw->pf_id;
13634                 ctxt.vf_num = 0;
13635                 ctxt.uplink_seid = vsi->uplink_seid;
13636                 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13637                 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
13638
13639                 /* This VSI is connected to VEB so the switch_id
13640                  * should be set to zero by default.
13641                  */
13642                 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13643                         ctxt.info.valid_sections |=
13644                                 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13645                         ctxt.info.switch_id =
13646                                 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13647                 }
13648
13649                 /* Setup the VSI tx/rx queue map for TC0 only for now */
13650                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13651                 break;
13652
13653         case I40E_VSI_SRIOV:
13654                 ctxt.pf_num = hw->pf_id;
13655                 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
13656                 ctxt.uplink_seid = vsi->uplink_seid;
13657                 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13658                 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
13659
13660                 /* This VSI is connected to VEB so the switch_id
13661                  * should be set to zero by default.
13662                  */
13663                 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13664                         ctxt.info.valid_sections |=
13665                                 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13666                         ctxt.info.switch_id =
13667                                 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13668                 }
13669
13670                 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
13671                         ctxt.info.valid_sections |=
13672                                 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
13673                         ctxt.info.queueing_opt_flags |=
13674                                 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
13675                                  I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
13676                 }
13677
13678                 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
13679                 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
13680                 if (pf->vf[vsi->vf_id].spoofchk) {
13681                         ctxt.info.valid_sections |=
13682                                 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
13683                         ctxt.info.sec_flags |=
13684                                 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
13685                                  I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
13686                 }
13687                 /* Setup the VSI tx/rx queue map for TC0 only for now */
13688                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13689                 break;
13690
13691         case I40E_VSI_IWARP:
13692                 /* send down message to iWARP */
13693                 break;
13694
13695         default:
13696                 return -ENODEV;
13697         }
13698
13699         if (vsi->type != I40E_VSI_MAIN) {
13700                 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
13701                 if (ret) {
13702                         dev_info(&vsi->back->pdev->dev,
13703                                  "add vsi failed, err %s aq_err %s\n",
13704                                  i40e_stat_str(&pf->hw, ret),
13705                                  i40e_aq_str(&pf->hw,
13706                                              pf->hw.aq.asq_last_status));
13707                         ret = -ENOENT;
13708                         goto err;
13709                 }
13710                 vsi->info = ctxt.info;
13711                 vsi->info.valid_sections = 0;
13712                 vsi->seid = ctxt.seid;
13713                 vsi->id = ctxt.vsi_number;
13714         }
13715
13716         vsi->active_filters = 0;
13717         clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
13718         spin_lock_bh(&vsi->mac_filter_hash_lock);
13719         /* If macvlan filters already exist, force them to get loaded */
13720         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
13721                 f->state = I40E_FILTER_NEW;
13722                 f_count++;
13723         }
13724         spin_unlock_bh(&vsi->mac_filter_hash_lock);
13725
13726         if (f_count) {
13727                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
13728                 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
13729         }
13730
13731         /* Update VSI BW information */
13732         ret = i40e_vsi_get_bw_info(vsi);
13733         if (ret) {
13734                 dev_info(&pf->pdev->dev,
13735                          "couldn't get vsi bw info, err %s aq_err %s\n",
13736                          i40e_stat_str(&pf->hw, ret),
13737                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13738                 /* VSI is already added so not tearing that up */
13739                 ret = 0;
13740         }
13741
13742 err:
13743         return ret;
13744 }
13745
13746 /**
13747  * i40e_vsi_release - Delete a VSI and free its resources
13748  * @vsi: the VSI being removed
13749  *
13750  * Returns 0 on success or < 0 on error
13751  **/
13752 int i40e_vsi_release(struct i40e_vsi *vsi)
13753 {
13754         struct i40e_mac_filter *f;
13755         struct hlist_node *h;
13756         struct i40e_veb *veb = NULL;
13757         struct i40e_pf *pf;
13758         u16 uplink_seid;
13759         int i, n, bkt;
13760
13761         pf = vsi->back;
13762
13763         /* release of a VEB-owner or last VSI is not allowed */
13764         if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
13765                 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
13766                          vsi->seid, vsi->uplink_seid);
13767                 return -ENODEV;
13768         }
13769         if (vsi == pf->vsi[pf->lan_vsi] &&
13770             !test_bit(__I40E_DOWN, pf->state)) {
13771                 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
13772                 return -ENODEV;
13773         }
13774
13775         uplink_seid = vsi->uplink_seid;
13776         if (vsi->type != I40E_VSI_SRIOV) {
13777                 if (vsi->netdev_registered) {
13778                         vsi->netdev_registered = false;
13779                         if (vsi->netdev) {
13780                                 /* results in a call to i40e_close() */
13781                                 unregister_netdev(vsi->netdev);
13782                         }
13783                 } else {
13784                         i40e_vsi_close(vsi);
13785                 }
13786                 i40e_vsi_disable_irq(vsi);
13787         }
13788
13789         spin_lock_bh(&vsi->mac_filter_hash_lock);
13790
13791         /* clear the sync flag on all filters */
13792         if (vsi->netdev) {
13793                 __dev_uc_unsync(vsi->netdev, NULL);
13794                 __dev_mc_unsync(vsi->netdev, NULL);
13795         }
13796
13797         /* make sure any remaining filters are marked for deletion */
13798         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
13799                 __i40e_del_filter(vsi, f);
13800
13801         spin_unlock_bh(&vsi->mac_filter_hash_lock);
13802
13803         i40e_sync_vsi_filters(vsi);
13804
13805         i40e_vsi_delete(vsi);
13806         i40e_vsi_free_q_vectors(vsi);
13807         if (vsi->netdev) {
13808                 free_netdev(vsi->netdev);
13809                 vsi->netdev = NULL;
13810         }
13811         i40e_vsi_clear_rings(vsi);
13812         i40e_vsi_clear(vsi);
13813
13814         /* If this was the last thing on the VEB, except for the
13815          * controlling VSI, remove the VEB, which puts the controlling
13816          * VSI onto the next level down in the switch.
13817          *
13818          * Well, okay, there's one more exception here: don't remove
13819          * the orphan VEBs yet.  We'll wait for an explicit remove request
13820          * from up the network stack.
13821          */
13822         for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
13823                 if (pf->vsi[i] &&
13824                     pf->vsi[i]->uplink_seid == uplink_seid &&
13825                     (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
13826                         n++;      /* count the VSIs */
13827                 }
13828         }
13829         for (i = 0; i < I40E_MAX_VEB; i++) {
13830                 if (!pf->veb[i])
13831                         continue;
13832                 if (pf->veb[i]->uplink_seid == uplink_seid)
13833                         n++;     /* count the VEBs */
13834                 if (pf->veb[i]->seid == uplink_seid)
13835                         veb = pf->veb[i];
13836         }
13837         if (n == 0 && veb && veb->uplink_seid != 0)
13838                 i40e_veb_release(veb);
13839
13840         return 0;
13841 }
13842
13843 /**
13844  * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
13845  * @vsi: ptr to the VSI
13846  *
13847  * This should only be called after i40e_vsi_mem_alloc() which allocates the
13848  * corresponding SW VSI structure and initializes num_queue_pairs for the
13849  * newly allocated VSI.
13850  *
13851  * Returns 0 on success or negative on failure
13852  **/
13853 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
13854 {
13855         int ret = -ENOENT;
13856         struct i40e_pf *pf = vsi->back;
13857
13858         if (vsi->q_vectors[0]) {
13859                 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
13860                          vsi->seid);
13861                 return -EEXIST;
13862         }
13863
13864         if (vsi->base_vector) {
13865                 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
13866                          vsi->seid, vsi->base_vector);
13867                 return -EEXIST;
13868         }
13869
13870         ret = i40e_vsi_alloc_q_vectors(vsi);
13871         if (ret) {
13872                 dev_info(&pf->pdev->dev,
13873                          "failed to allocate %d q_vector for VSI %d, ret=%d\n",
13874                          vsi->num_q_vectors, vsi->seid, ret);
13875                 vsi->num_q_vectors = 0;
13876                 goto vector_setup_out;
13877         }
13878
13879         /* In Legacy mode, we do not have to get any other vector since we
13880          * piggyback on the misc/ICR0 for queue interrupts.
13881         */
13882         if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
13883                 return ret;
13884         if (vsi->num_q_vectors)
13885                 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
13886                                                  vsi->num_q_vectors, vsi->idx);
13887         if (vsi->base_vector < 0) {
13888                 dev_info(&pf->pdev->dev,
13889                          "failed to get tracking for %d vectors for VSI %d, err=%d\n",
13890                          vsi->num_q_vectors, vsi->seid, vsi->base_vector);
13891                 i40e_vsi_free_q_vectors(vsi);
13892                 ret = -ENOENT;
13893                 goto vector_setup_out;
13894         }
13895
13896 vector_setup_out:
13897         return ret;
13898 }
13899
13900 /**
13901  * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
13902  * @vsi: pointer to the vsi.
13903  *
13904  * This re-allocates a vsi's queue resources.
13905  *
13906  * Returns pointer to the successfully allocated and configured VSI sw struct
13907  * on success, otherwise returns NULL on failure.
13908  **/
13909 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
13910 {
13911         u16 alloc_queue_pairs;
13912         struct i40e_pf *pf;
13913         u8 enabled_tc;
13914         int ret;
13915
13916         if (!vsi)
13917                 return NULL;
13918
13919         pf = vsi->back;
13920
13921         i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
13922         i40e_vsi_clear_rings(vsi);
13923
13924         i40e_vsi_free_arrays(vsi, false);
13925         i40e_set_num_rings_in_vsi(vsi);
13926         ret = i40e_vsi_alloc_arrays(vsi, false);
13927         if (ret)
13928                 goto err_vsi;
13929
13930         alloc_queue_pairs = vsi->alloc_queue_pairs *
13931                             (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
13932
13933         ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
13934         if (ret < 0) {
13935                 dev_info(&pf->pdev->dev,
13936                          "failed to get tracking for %d queues for VSI %d err %d\n",
13937                          alloc_queue_pairs, vsi->seid, ret);
13938                 goto err_vsi;
13939         }
13940         vsi->base_queue = ret;
13941
13942         /* Update the FW view of the VSI. Force a reset of TC and queue
13943          * layout configurations.
13944          */
13945         enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
13946         pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
13947         pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
13948         i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
13949         if (vsi->type == I40E_VSI_MAIN)
13950                 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
13951
13952         /* assign it some queues */
13953         ret = i40e_alloc_rings(vsi);
13954         if (ret)
13955                 goto err_rings;
13956
13957         /* map all of the rings to the q_vectors */
13958         i40e_vsi_map_rings_to_vectors(vsi);
13959         return vsi;
13960
13961 err_rings:
13962         i40e_vsi_free_q_vectors(vsi);
13963         if (vsi->netdev_registered) {
13964                 vsi->netdev_registered = false;
13965                 unregister_netdev(vsi->netdev);
13966                 free_netdev(vsi->netdev);
13967                 vsi->netdev = NULL;
13968         }
13969         i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
13970 err_vsi:
13971         i40e_vsi_clear(vsi);
13972         return NULL;
13973 }
13974
13975 /**
13976  * i40e_vsi_setup - Set up a VSI by a given type
13977  * @pf: board private structure
13978  * @type: VSI type
13979  * @uplink_seid: the switch element to link to
13980  * @param1: usage depends upon VSI type. For VF types, indicates VF id
13981  *
13982  * This allocates the sw VSI structure and its queue resources, then add a VSI
13983  * to the identified VEB.
13984  *
13985  * Returns pointer to the successfully allocated and configure VSI sw struct on
13986  * success, otherwise returns NULL on failure.
13987  **/
13988 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
13989                                 u16 uplink_seid, u32 param1)
13990 {
13991         struct i40e_vsi *vsi = NULL;
13992         struct i40e_veb *veb = NULL;
13993         u16 alloc_queue_pairs;
13994         int ret, i;
13995         int v_idx;
13996
13997         /* The requested uplink_seid must be either
13998          *     - the PF's port seid
13999          *              no VEB is needed because this is the PF
14000          *              or this is a Flow Director special case VSI
14001          *     - seid of an existing VEB
14002          *     - seid of a VSI that owns an existing VEB
14003          *     - seid of a VSI that doesn't own a VEB
14004          *              a new VEB is created and the VSI becomes the owner
14005          *     - seid of the PF VSI, which is what creates the first VEB
14006          *              this is a special case of the previous
14007          *
14008          * Find which uplink_seid we were given and create a new VEB if needed
14009          */
14010         for (i = 0; i < I40E_MAX_VEB; i++) {
14011                 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
14012                         veb = pf->veb[i];
14013                         break;
14014                 }
14015         }
14016
14017         if (!veb && uplink_seid != pf->mac_seid) {
14018
14019                 for (i = 0; i < pf->num_alloc_vsi; i++) {
14020                         if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
14021                                 vsi = pf->vsi[i];
14022                                 break;
14023                         }
14024                 }
14025                 if (!vsi) {
14026                         dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
14027                                  uplink_seid);
14028                         return NULL;
14029                 }
14030
14031                 if (vsi->uplink_seid == pf->mac_seid)
14032                         veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
14033                                              vsi->tc_config.enabled_tc);
14034                 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
14035                         veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
14036                                              vsi->tc_config.enabled_tc);
14037                 if (veb) {
14038                         if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
14039                                 dev_info(&vsi->back->pdev->dev,
14040                                          "New VSI creation error, uplink seid of LAN VSI expected.\n");
14041                                 return NULL;
14042                         }
14043                         /* We come up by default in VEPA mode if SRIOV is not
14044                          * already enabled, in which case we can't force VEPA
14045                          * mode.
14046                          */
14047                         if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
14048                                 veb->bridge_mode = BRIDGE_MODE_VEPA;
14049                                 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
14050                         }
14051                         i40e_config_bridge_mode(veb);
14052                 }
14053                 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
14054                         if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
14055                                 veb = pf->veb[i];
14056                 }
14057                 if (!veb) {
14058                         dev_info(&pf->pdev->dev, "couldn't add VEB\n");
14059                         return NULL;
14060                 }
14061
14062                 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14063                 uplink_seid = veb->seid;
14064         }
14065
14066         /* get vsi sw struct */
14067         v_idx = i40e_vsi_mem_alloc(pf, type);
14068         if (v_idx < 0)
14069                 goto err_alloc;
14070         vsi = pf->vsi[v_idx];
14071         if (!vsi)
14072                 goto err_alloc;
14073         vsi->type = type;
14074         vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
14075
14076         if (type == I40E_VSI_MAIN)
14077                 pf->lan_vsi = v_idx;
14078         else if (type == I40E_VSI_SRIOV)
14079                 vsi->vf_id = param1;
14080         /* assign it some queues */
14081         alloc_queue_pairs = vsi->alloc_queue_pairs *
14082                             (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14083
14084         ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14085         if (ret < 0) {
14086                 dev_info(&pf->pdev->dev,
14087                          "failed to get tracking for %d queues for VSI %d err=%d\n",
14088                          alloc_queue_pairs, vsi->seid, ret);
14089                 goto err_vsi;
14090         }
14091         vsi->base_queue = ret;
14092
14093         /* get a VSI from the hardware */
14094         vsi->uplink_seid = uplink_seid;
14095         ret = i40e_add_vsi(vsi);
14096         if (ret)
14097                 goto err_vsi;
14098
14099         switch (vsi->type) {
14100         /* setup the netdev if needed */
14101         case I40E_VSI_MAIN:
14102         case I40E_VSI_VMDQ2:
14103                 ret = i40e_config_netdev(vsi);
14104                 if (ret)
14105                         goto err_netdev;
14106                 ret = register_netdev(vsi->netdev);
14107                 if (ret)
14108                         goto err_netdev;
14109                 vsi->netdev_registered = true;
14110                 netif_carrier_off(vsi->netdev);
14111 #ifdef CONFIG_I40E_DCB
14112                 /* Setup DCB netlink interface */
14113                 i40e_dcbnl_setup(vsi);
14114 #endif /* CONFIG_I40E_DCB */
14115                 fallthrough;
14116         case I40E_VSI_FDIR:
14117                 /* set up vectors and rings if needed */
14118                 ret = i40e_vsi_setup_vectors(vsi);
14119                 if (ret)
14120                         goto err_msix;
14121
14122                 ret = i40e_alloc_rings(vsi);
14123                 if (ret)
14124                         goto err_rings;
14125
14126                 /* map all of the rings to the q_vectors */
14127                 i40e_vsi_map_rings_to_vectors(vsi);
14128
14129                 i40e_vsi_reset_stats(vsi);
14130                 break;
14131         default:
14132                 /* no netdev or rings for the other VSI types */
14133                 break;
14134         }
14135
14136         if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
14137             (vsi->type == I40E_VSI_VMDQ2)) {
14138                 ret = i40e_vsi_config_rss(vsi);
14139         }
14140         return vsi;
14141
14142 err_rings:
14143         i40e_vsi_free_q_vectors(vsi);
14144 err_msix:
14145         if (vsi->netdev_registered) {
14146                 vsi->netdev_registered = false;
14147                 unregister_netdev(vsi->netdev);
14148                 free_netdev(vsi->netdev);
14149                 vsi->netdev = NULL;
14150         }
14151 err_netdev:
14152         i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14153 err_vsi:
14154         i40e_vsi_clear(vsi);
14155 err_alloc:
14156         return NULL;
14157 }
14158
14159 /**
14160  * i40e_veb_get_bw_info - Query VEB BW information
14161  * @veb: the veb to query
14162  *
14163  * Query the Tx scheduler BW configuration data for given VEB
14164  **/
14165 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
14166 {
14167         struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
14168         struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
14169         struct i40e_pf *pf = veb->pf;
14170         struct i40e_hw *hw = &pf->hw;
14171         u32 tc_bw_max;
14172         int ret = 0;
14173         int i;
14174
14175         ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
14176                                                   &bw_data, NULL);
14177         if (ret) {
14178                 dev_info(&pf->pdev->dev,
14179                          "query veb bw config failed, err %s aq_err %s\n",
14180                          i40e_stat_str(&pf->hw, ret),
14181                          i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14182                 goto out;
14183         }
14184
14185         ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
14186                                                    &ets_data, NULL);
14187         if (ret) {
14188                 dev_info(&pf->pdev->dev,
14189                          "query veb bw ets config failed, err %s aq_err %s\n",
14190                          i40e_stat_str(&pf->hw, ret),
14191                          i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14192                 goto out;
14193         }
14194
14195         veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
14196         veb->bw_max_quanta = ets_data.tc_bw_max;
14197         veb->is_abs_credits = bw_data.absolute_credits_enable;
14198         veb->enabled_tc = ets_data.tc_valid_bits;
14199         tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
14200                     (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
14201         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
14202                 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
14203                 veb->bw_tc_limit_credits[i] =
14204                                         le16_to_cpu(bw_data.tc_bw_limits[i]);
14205                 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
14206         }
14207
14208 out:
14209         return ret;
14210 }
14211
14212 /**
14213  * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
14214  * @pf: board private structure
14215  *
14216  * On error: returns error code (negative)
14217  * On success: returns vsi index in PF (positive)
14218  **/
14219 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
14220 {
14221         int ret = -ENOENT;
14222         struct i40e_veb *veb;
14223         int i;
14224
14225         /* Need to protect the allocation of switch elements at the PF level */
14226         mutex_lock(&pf->switch_mutex);
14227
14228         /* VEB list may be fragmented if VEB creation/destruction has
14229          * been happening.  We can afford to do a quick scan to look
14230          * for any free slots in the list.
14231          *
14232          * find next empty veb slot, looping back around if necessary
14233          */
14234         i = 0;
14235         while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
14236                 i++;
14237         if (i >= I40E_MAX_VEB) {
14238                 ret = -ENOMEM;
14239                 goto err_alloc_veb;  /* out of VEB slots! */
14240         }
14241
14242         veb = kzalloc(sizeof(*veb), GFP_KERNEL);
14243         if (!veb) {
14244                 ret = -ENOMEM;
14245                 goto err_alloc_veb;
14246         }
14247         veb->pf = pf;
14248         veb->idx = i;
14249         veb->enabled_tc = 1;
14250
14251         pf->veb[i] = veb;
14252         ret = i;
14253 err_alloc_veb:
14254         mutex_unlock(&pf->switch_mutex);
14255         return ret;
14256 }
14257
14258 /**
14259  * i40e_switch_branch_release - Delete a branch of the switch tree
14260  * @branch: where to start deleting
14261  *
14262  * This uses recursion to find the tips of the branch to be
14263  * removed, deleting until we get back to and can delete this VEB.
14264  **/
14265 static void i40e_switch_branch_release(struct i40e_veb *branch)
14266 {
14267         struct i40e_pf *pf = branch->pf;
14268         u16 branch_seid = branch->seid;
14269         u16 veb_idx = branch->idx;
14270         int i;
14271
14272         /* release any VEBs on this VEB - RECURSION */
14273         for (i = 0; i < I40E_MAX_VEB; i++) {
14274                 if (!pf->veb[i])
14275                         continue;
14276                 if (pf->veb[i]->uplink_seid == branch->seid)
14277                         i40e_switch_branch_release(pf->veb[i]);
14278         }
14279
14280         /* Release the VSIs on this VEB, but not the owner VSI.
14281          *
14282          * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
14283          *       the VEB itself, so don't use (*branch) after this loop.
14284          */
14285         for (i = 0; i < pf->num_alloc_vsi; i++) {
14286                 if (!pf->vsi[i])
14287                         continue;
14288                 if (pf->vsi[i]->uplink_seid == branch_seid &&
14289                    (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14290                         i40e_vsi_release(pf->vsi[i]);
14291                 }
14292         }
14293
14294         /* There's one corner case where the VEB might not have been
14295          * removed, so double check it here and remove it if needed.
14296          * This case happens if the veb was created from the debugfs
14297          * commands and no VSIs were added to it.
14298          */
14299         if (pf->veb[veb_idx])
14300                 i40e_veb_release(pf->veb[veb_idx]);
14301 }
14302
14303 /**
14304  * i40e_veb_clear - remove veb struct
14305  * @veb: the veb to remove
14306  **/
14307 static void i40e_veb_clear(struct i40e_veb *veb)
14308 {
14309         if (!veb)
14310                 return;
14311
14312         if (veb->pf) {
14313                 struct i40e_pf *pf = veb->pf;
14314
14315                 mutex_lock(&pf->switch_mutex);
14316                 if (pf->veb[veb->idx] == veb)
14317                         pf->veb[veb->idx] = NULL;
14318                 mutex_unlock(&pf->switch_mutex);
14319         }
14320
14321         kfree(veb);
14322 }
14323
14324 /**
14325  * i40e_veb_release - Delete a VEB and free its resources
14326  * @veb: the VEB being removed
14327  **/
14328 void i40e_veb_release(struct i40e_veb *veb)
14329 {
14330         struct i40e_vsi *vsi = NULL;
14331         struct i40e_pf *pf;
14332         int i, n = 0;
14333
14334         pf = veb->pf;
14335
14336         /* find the remaining VSI and check for extras */
14337         for (i = 0; i < pf->num_alloc_vsi; i++) {
14338                 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
14339                         n++;
14340                         vsi = pf->vsi[i];
14341                 }
14342         }
14343         if (n != 1) {
14344                 dev_info(&pf->pdev->dev,
14345                          "can't remove VEB %d with %d VSIs left\n",
14346                          veb->seid, n);
14347                 return;
14348         }
14349
14350         /* move the remaining VSI to uplink veb */
14351         vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
14352         if (veb->uplink_seid) {
14353                 vsi->uplink_seid = veb->uplink_seid;
14354                 if (veb->uplink_seid == pf->mac_seid)
14355                         vsi->veb_idx = I40E_NO_VEB;
14356                 else
14357                         vsi->veb_idx = veb->veb_idx;
14358         } else {
14359                 /* floating VEB */
14360                 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
14361                 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
14362         }
14363
14364         i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14365         i40e_veb_clear(veb);
14366 }
14367
14368 /**
14369  * i40e_add_veb - create the VEB in the switch
14370  * @veb: the VEB to be instantiated
14371  * @vsi: the controlling VSI
14372  **/
14373 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
14374 {
14375         struct i40e_pf *pf = veb->pf;
14376         bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
14377         int ret;
14378
14379         ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
14380                               veb->enabled_tc, false,
14381                               &veb->seid, enable_stats, NULL);
14382
14383         /* get a VEB from the hardware */
14384         if (ret) {
14385                 dev_info(&pf->pdev->dev,
14386                          "couldn't add VEB, err %s aq_err %s\n",
14387                          i40e_stat_str(&pf->hw, ret),
14388                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14389                 return -EPERM;
14390         }
14391
14392         /* get statistics counter */
14393         ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
14394                                          &veb->stats_idx, NULL, NULL, NULL);
14395         if (ret) {
14396                 dev_info(&pf->pdev->dev,
14397                          "couldn't get VEB statistics idx, err %s aq_err %s\n",
14398                          i40e_stat_str(&pf->hw, ret),
14399                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14400                 return -EPERM;
14401         }
14402         ret = i40e_veb_get_bw_info(veb);
14403         if (ret) {
14404                 dev_info(&pf->pdev->dev,
14405                          "couldn't get VEB bw info, err %s aq_err %s\n",
14406                          i40e_stat_str(&pf->hw, ret),
14407                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14408                 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14409                 return -ENOENT;
14410         }
14411
14412         vsi->uplink_seid = veb->seid;
14413         vsi->veb_idx = veb->idx;
14414         vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14415
14416         return 0;
14417 }
14418
14419 /**
14420  * i40e_veb_setup - Set up a VEB
14421  * @pf: board private structure
14422  * @flags: VEB setup flags
14423  * @uplink_seid: the switch element to link to
14424  * @vsi_seid: the initial VSI seid
14425  * @enabled_tc: Enabled TC bit-map
14426  *
14427  * This allocates the sw VEB structure and links it into the switch
14428  * It is possible and legal for this to be a duplicate of an already
14429  * existing VEB.  It is also possible for both uplink and vsi seids
14430  * to be zero, in order to create a floating VEB.
14431  *
14432  * Returns pointer to the successfully allocated VEB sw struct on
14433  * success, otherwise returns NULL on failure.
14434  **/
14435 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
14436                                 u16 uplink_seid, u16 vsi_seid,
14437                                 u8 enabled_tc)
14438 {
14439         struct i40e_veb *veb, *uplink_veb = NULL;
14440         int vsi_idx, veb_idx;
14441         int ret;
14442
14443         /* if one seid is 0, the other must be 0 to create a floating relay */
14444         if ((uplink_seid == 0 || vsi_seid == 0) &&
14445             (uplink_seid + vsi_seid != 0)) {
14446                 dev_info(&pf->pdev->dev,
14447                          "one, not both seid's are 0: uplink=%d vsi=%d\n",
14448                          uplink_seid, vsi_seid);
14449                 return NULL;
14450         }
14451
14452         /* make sure there is such a vsi and uplink */
14453         for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
14454                 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
14455                         break;
14456         if (vsi_idx == pf->num_alloc_vsi && vsi_seid != 0) {
14457                 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
14458                          vsi_seid);
14459                 return NULL;
14460         }
14461
14462         if (uplink_seid && uplink_seid != pf->mac_seid) {
14463                 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
14464                         if (pf->veb[veb_idx] &&
14465                             pf->veb[veb_idx]->seid == uplink_seid) {
14466                                 uplink_veb = pf->veb[veb_idx];
14467                                 break;
14468                         }
14469                 }
14470                 if (!uplink_veb) {
14471                         dev_info(&pf->pdev->dev,
14472                                  "uplink seid %d not found\n", uplink_seid);
14473                         return NULL;
14474                 }
14475         }
14476
14477         /* get veb sw struct */
14478         veb_idx = i40e_veb_mem_alloc(pf);
14479         if (veb_idx < 0)
14480                 goto err_alloc;
14481         veb = pf->veb[veb_idx];
14482         veb->flags = flags;
14483         veb->uplink_seid = uplink_seid;
14484         veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
14485         veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
14486
14487         /* create the VEB in the switch */
14488         ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
14489         if (ret)
14490                 goto err_veb;
14491         if (vsi_idx == pf->lan_vsi)
14492                 pf->lan_veb = veb->idx;
14493
14494         return veb;
14495
14496 err_veb:
14497         i40e_veb_clear(veb);
14498 err_alloc:
14499         return NULL;
14500 }
14501
14502 /**
14503  * i40e_setup_pf_switch_element - set PF vars based on switch type
14504  * @pf: board private structure
14505  * @ele: element we are building info from
14506  * @num_reported: total number of elements
14507  * @printconfig: should we print the contents
14508  *
14509  * helper function to assist in extracting a few useful SEID values.
14510  **/
14511 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
14512                                 struct i40e_aqc_switch_config_element_resp *ele,
14513                                 u16 num_reported, bool printconfig)
14514 {
14515         u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
14516         u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
14517         u8 element_type = ele->element_type;
14518         u16 seid = le16_to_cpu(ele->seid);
14519
14520         if (printconfig)
14521                 dev_info(&pf->pdev->dev,
14522                          "type=%d seid=%d uplink=%d downlink=%d\n",
14523                          element_type, seid, uplink_seid, downlink_seid);
14524
14525         switch (element_type) {
14526         case I40E_SWITCH_ELEMENT_TYPE_MAC:
14527                 pf->mac_seid = seid;
14528                 break;
14529         case I40E_SWITCH_ELEMENT_TYPE_VEB:
14530                 /* Main VEB? */
14531                 if (uplink_seid != pf->mac_seid)
14532                         break;
14533                 if (pf->lan_veb >= I40E_MAX_VEB) {
14534                         int v;
14535
14536                         /* find existing or else empty VEB */
14537                         for (v = 0; v < I40E_MAX_VEB; v++) {
14538                                 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
14539                                         pf->lan_veb = v;
14540                                         break;
14541                                 }
14542                         }
14543                         if (pf->lan_veb >= I40E_MAX_VEB) {
14544                                 v = i40e_veb_mem_alloc(pf);
14545                                 if (v < 0)
14546                                         break;
14547                                 pf->lan_veb = v;
14548                         }
14549                 }
14550                 if (pf->lan_veb >= I40E_MAX_VEB)
14551                         break;
14552
14553                 pf->veb[pf->lan_veb]->seid = seid;
14554                 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
14555                 pf->veb[pf->lan_veb]->pf = pf;
14556                 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
14557                 break;
14558         case I40E_SWITCH_ELEMENT_TYPE_VSI:
14559                 if (num_reported != 1)
14560                         break;
14561                 /* This is immediately after a reset so we can assume this is
14562                  * the PF's VSI
14563                  */
14564                 pf->mac_seid = uplink_seid;
14565                 pf->pf_seid = downlink_seid;
14566                 pf->main_vsi_seid = seid;
14567                 if (printconfig)
14568                         dev_info(&pf->pdev->dev,
14569                                  "pf_seid=%d main_vsi_seid=%d\n",
14570                                  pf->pf_seid, pf->main_vsi_seid);
14571                 break;
14572         case I40E_SWITCH_ELEMENT_TYPE_PF:
14573         case I40E_SWITCH_ELEMENT_TYPE_VF:
14574         case I40E_SWITCH_ELEMENT_TYPE_EMP:
14575         case I40E_SWITCH_ELEMENT_TYPE_BMC:
14576         case I40E_SWITCH_ELEMENT_TYPE_PE:
14577         case I40E_SWITCH_ELEMENT_TYPE_PA:
14578                 /* ignore these for now */
14579                 break;
14580         default:
14581                 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
14582                          element_type, seid);
14583                 break;
14584         }
14585 }
14586
14587 /**
14588  * i40e_fetch_switch_configuration - Get switch config from firmware
14589  * @pf: board private structure
14590  * @printconfig: should we print the contents
14591  *
14592  * Get the current switch configuration from the device and
14593  * extract a few useful SEID values.
14594  **/
14595 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
14596 {
14597         struct i40e_aqc_get_switch_config_resp *sw_config;
14598         u16 next_seid = 0;
14599         int ret = 0;
14600         u8 *aq_buf;
14601         int i;
14602
14603         aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
14604         if (!aq_buf)
14605                 return -ENOMEM;
14606
14607         sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
14608         do {
14609                 u16 num_reported, num_total;
14610
14611                 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
14612                                                 I40E_AQ_LARGE_BUF,
14613                                                 &next_seid, NULL);
14614                 if (ret) {
14615                         dev_info(&pf->pdev->dev,
14616                                  "get switch config failed err %s aq_err %s\n",
14617                                  i40e_stat_str(&pf->hw, ret),
14618                                  i40e_aq_str(&pf->hw,
14619                                              pf->hw.aq.asq_last_status));
14620                         kfree(aq_buf);
14621                         return -ENOENT;
14622                 }
14623
14624                 num_reported = le16_to_cpu(sw_config->header.num_reported);
14625                 num_total = le16_to_cpu(sw_config->header.num_total);
14626
14627                 if (printconfig)
14628                         dev_info(&pf->pdev->dev,
14629                                  "header: %d reported %d total\n",
14630                                  num_reported, num_total);
14631
14632                 for (i = 0; i < num_reported; i++) {
14633                         struct i40e_aqc_switch_config_element_resp *ele =
14634                                 &sw_config->element[i];
14635
14636                         i40e_setup_pf_switch_element(pf, ele, num_reported,
14637                                                      printconfig);
14638                 }
14639         } while (next_seid != 0);
14640
14641         kfree(aq_buf);
14642         return ret;
14643 }
14644
14645 /**
14646  * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
14647  * @pf: board private structure
14648  * @reinit: if the Main VSI needs to re-initialized.
14649  * @lock_acquired: indicates whether or not the lock has been acquired
14650  *
14651  * Returns 0 on success, negative value on failure
14652  **/
14653 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired)
14654 {
14655         u16 flags = 0;
14656         int ret;
14657
14658         /* find out what's out there already */
14659         ret = i40e_fetch_switch_configuration(pf, false);
14660         if (ret) {
14661                 dev_info(&pf->pdev->dev,
14662                          "couldn't fetch switch config, err %s aq_err %s\n",
14663                          i40e_stat_str(&pf->hw, ret),
14664                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14665                 return ret;
14666         }
14667         i40e_pf_reset_stats(pf);
14668
14669         /* set the switch config bit for the whole device to
14670          * support limited promisc or true promisc
14671          * when user requests promisc. The default is limited
14672          * promisc.
14673         */
14674
14675         if ((pf->hw.pf_id == 0) &&
14676             !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
14677                 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14678                 pf->last_sw_conf_flags = flags;
14679         }
14680
14681         if (pf->hw.pf_id == 0) {
14682                 u16 valid_flags;
14683
14684                 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14685                 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
14686                                                 NULL);
14687                 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
14688                         dev_info(&pf->pdev->dev,
14689                                  "couldn't set switch config bits, err %s aq_err %s\n",
14690                                  i40e_stat_str(&pf->hw, ret),
14691                                  i40e_aq_str(&pf->hw,
14692                                              pf->hw.aq.asq_last_status));
14693                         /* not a fatal problem, just keep going */
14694                 }
14695                 pf->last_sw_conf_valid_flags = valid_flags;
14696         }
14697
14698         /* first time setup */
14699         if (pf->lan_vsi == I40E_NO_VSI || reinit) {
14700                 struct i40e_vsi *vsi = NULL;
14701                 u16 uplink_seid;
14702
14703                 /* Set up the PF VSI associated with the PF's main VSI
14704                  * that is already in the HW switch
14705                  */
14706                 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
14707                         uplink_seid = pf->veb[pf->lan_veb]->seid;
14708                 else
14709                         uplink_seid = pf->mac_seid;
14710                 if (pf->lan_vsi == I40E_NO_VSI)
14711                         vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
14712                 else if (reinit)
14713                         vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
14714                 if (!vsi) {
14715                         dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
14716                         i40e_cloud_filter_exit(pf);
14717                         i40e_fdir_teardown(pf);
14718                         return -EAGAIN;
14719                 }
14720         } else {
14721                 /* force a reset of TC and queue layout configurations */
14722                 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
14723
14724                 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
14725                 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
14726                 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
14727         }
14728         i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
14729
14730         i40e_fdir_sb_setup(pf);
14731
14732         /* Setup static PF queue filter control settings */
14733         ret = i40e_setup_pf_filter_control(pf);
14734         if (ret) {
14735                 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
14736                          ret);
14737                 /* Failure here should not stop continuing other steps */
14738         }
14739
14740         /* enable RSS in the HW, even for only one queue, as the stack can use
14741          * the hash
14742          */
14743         if ((pf->flags & I40E_FLAG_RSS_ENABLED))
14744                 i40e_pf_config_rss(pf);
14745
14746         /* fill in link information and enable LSE reporting */
14747         i40e_link_event(pf);
14748
14749         /* Initialize user-specific link properties */
14750         pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
14751                                   I40E_AQ_AN_COMPLETED) ? true : false);
14752
14753         i40e_ptp_init(pf);
14754
14755         if (!lock_acquired)
14756                 rtnl_lock();
14757
14758         /* repopulate tunnel port filters */
14759         udp_tunnel_nic_reset_ntf(pf->vsi[pf->lan_vsi]->netdev);
14760
14761         if (!lock_acquired)
14762                 rtnl_unlock();
14763
14764         return ret;
14765 }
14766
14767 /**
14768  * i40e_determine_queue_usage - Work out queue distribution
14769  * @pf: board private structure
14770  **/
14771 static void i40e_determine_queue_usage(struct i40e_pf *pf)
14772 {
14773         int queues_left;
14774         int q_max;
14775
14776         pf->num_lan_qps = 0;
14777
14778         /* Find the max queues to be put into basic use.  We'll always be
14779          * using TC0, whether or not DCB is running, and TC0 will get the
14780          * big RSS set.
14781          */
14782         queues_left = pf->hw.func_caps.num_tx_qp;
14783
14784         if ((queues_left == 1) ||
14785             !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
14786                 /* one qp for PF, no queues for anything else */
14787                 queues_left = 0;
14788                 pf->alloc_rss_size = pf->num_lan_qps = 1;
14789
14790                 /* make sure all the fancies are disabled */
14791                 pf->flags &= ~(I40E_FLAG_RSS_ENABLED    |
14792                                I40E_FLAG_IWARP_ENABLED  |
14793                                I40E_FLAG_FD_SB_ENABLED  |
14794                                I40E_FLAG_FD_ATR_ENABLED |
14795                                I40E_FLAG_DCB_CAPABLE    |
14796                                I40E_FLAG_DCB_ENABLED    |
14797                                I40E_FLAG_SRIOV_ENABLED  |
14798                                I40E_FLAG_VMDQ_ENABLED);
14799                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
14800         } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
14801                                   I40E_FLAG_FD_SB_ENABLED |
14802                                   I40E_FLAG_FD_ATR_ENABLED |
14803                                   I40E_FLAG_DCB_CAPABLE))) {
14804                 /* one qp for PF */
14805                 pf->alloc_rss_size = pf->num_lan_qps = 1;
14806                 queues_left -= pf->num_lan_qps;
14807
14808                 pf->flags &= ~(I40E_FLAG_RSS_ENABLED    |
14809                                I40E_FLAG_IWARP_ENABLED  |
14810                                I40E_FLAG_FD_SB_ENABLED  |
14811                                I40E_FLAG_FD_ATR_ENABLED |
14812                                I40E_FLAG_DCB_ENABLED    |
14813                                I40E_FLAG_VMDQ_ENABLED);
14814                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
14815         } else {
14816                 /* Not enough queues for all TCs */
14817                 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
14818                     (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
14819                         pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
14820                                         I40E_FLAG_DCB_ENABLED);
14821                         dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
14822                 }
14823
14824                 /* limit lan qps to the smaller of qps, cpus or msix */
14825                 q_max = max_t(int, pf->rss_size_max, num_online_cpus());
14826                 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
14827                 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
14828                 pf->num_lan_qps = q_max;
14829
14830                 queues_left -= pf->num_lan_qps;
14831         }
14832
14833         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
14834                 if (queues_left > 1) {
14835                         queues_left -= 1; /* save 1 queue for FD */
14836                 } else {
14837                         pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
14838                         pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
14839                         dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
14840                 }
14841         }
14842
14843         if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
14844             pf->num_vf_qps && pf->num_req_vfs && queues_left) {
14845                 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
14846                                         (queues_left / pf->num_vf_qps));
14847                 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
14848         }
14849
14850         if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
14851             pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
14852                 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
14853                                           (queues_left / pf->num_vmdq_qps));
14854                 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
14855         }
14856
14857         pf->queues_left = queues_left;
14858         dev_dbg(&pf->pdev->dev,
14859                 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
14860                 pf->hw.func_caps.num_tx_qp,
14861                 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
14862                 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
14863                 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
14864                 queues_left);
14865 }
14866
14867 /**
14868  * i40e_setup_pf_filter_control - Setup PF static filter control
14869  * @pf: PF to be setup
14870  *
14871  * i40e_setup_pf_filter_control sets up a PF's initial filter control
14872  * settings. If PE/FCoE are enabled then it will also set the per PF
14873  * based filter sizes required for them. It also enables Flow director,
14874  * ethertype and macvlan type filter settings for the pf.
14875  *
14876  * Returns 0 on success, negative on failure
14877  **/
14878 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
14879 {
14880         struct i40e_filter_control_settings *settings = &pf->filter_settings;
14881
14882         settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
14883
14884         /* Flow Director is enabled */
14885         if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
14886                 settings->enable_fdir = true;
14887
14888         /* Ethtype and MACVLAN filters enabled for PF */
14889         settings->enable_ethtype = true;
14890         settings->enable_macvlan = true;
14891
14892         if (i40e_set_filter_control(&pf->hw, settings))
14893                 return -ENOENT;
14894
14895         return 0;
14896 }
14897
14898 #define INFO_STRING_LEN 255
14899 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
14900 static void i40e_print_features(struct i40e_pf *pf)
14901 {
14902         struct i40e_hw *hw = &pf->hw;
14903         char *buf;
14904         int i;
14905
14906         buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
14907         if (!buf)
14908                 return;
14909
14910         i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
14911 #ifdef CONFIG_PCI_IOV
14912         i += scnprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
14913 #endif
14914         i += scnprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
14915                       pf->hw.func_caps.num_vsis,
14916                       pf->vsi[pf->lan_vsi]->num_queue_pairs);
14917         if (pf->flags & I40E_FLAG_RSS_ENABLED)
14918                 i += scnprintf(&buf[i], REMAIN(i), " RSS");
14919         if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
14920                 i += scnprintf(&buf[i], REMAIN(i), " FD_ATR");
14921         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
14922                 i += scnprintf(&buf[i], REMAIN(i), " FD_SB");
14923                 i += scnprintf(&buf[i], REMAIN(i), " NTUPLE");
14924         }
14925         if (pf->flags & I40E_FLAG_DCB_CAPABLE)
14926                 i += scnprintf(&buf[i], REMAIN(i), " DCB");
14927         i += scnprintf(&buf[i], REMAIN(i), " VxLAN");
14928         i += scnprintf(&buf[i], REMAIN(i), " Geneve");
14929         if (pf->flags & I40E_FLAG_PTP)
14930                 i += scnprintf(&buf[i], REMAIN(i), " PTP");
14931         if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
14932                 i += scnprintf(&buf[i], REMAIN(i), " VEB");
14933         else
14934                 i += scnprintf(&buf[i], REMAIN(i), " VEPA");
14935
14936         dev_info(&pf->pdev->dev, "%s\n", buf);
14937         kfree(buf);
14938         WARN_ON(i > INFO_STRING_LEN);
14939 }
14940
14941 /**
14942  * i40e_get_platform_mac_addr - get platform-specific MAC address
14943  * @pdev: PCI device information struct
14944  * @pf: board private structure
14945  *
14946  * Look up the MAC address for the device. First we'll try
14947  * eth_platform_get_mac_address, which will check Open Firmware, or arch
14948  * specific fallback. Otherwise, we'll default to the stored value in
14949  * firmware.
14950  **/
14951 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
14952 {
14953         if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
14954                 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
14955 }
14956
14957 /**
14958  * i40e_set_fec_in_flags - helper function for setting FEC options in flags
14959  * @fec_cfg: FEC option to set in flags
14960  * @flags: ptr to flags in which we set FEC option
14961  **/
14962 void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags)
14963 {
14964         if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
14965                 *flags |= I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC;
14966         if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_RS) ||
14967             (fec_cfg & I40E_AQ_SET_FEC_ABILITY_RS)) {
14968                 *flags |= I40E_FLAG_RS_FEC;
14969                 *flags &= ~I40E_FLAG_BASE_R_FEC;
14970         }
14971         if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_KR) ||
14972             (fec_cfg & I40E_AQ_SET_FEC_ABILITY_KR)) {
14973                 *flags |= I40E_FLAG_BASE_R_FEC;
14974                 *flags &= ~I40E_FLAG_RS_FEC;
14975         }
14976         if (fec_cfg == 0)
14977                 *flags &= ~(I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC);
14978 }
14979
14980 /**
14981  * i40e_check_recovery_mode - check if we are running transition firmware
14982  * @pf: board private structure
14983  *
14984  * Check registers indicating the firmware runs in recovery mode. Sets the
14985  * appropriate driver state.
14986  *
14987  * Returns true if the recovery mode was detected, false otherwise
14988  **/
14989 static bool i40e_check_recovery_mode(struct i40e_pf *pf)
14990 {
14991         u32 val = rd32(&pf->hw, I40E_GL_FWSTS);
14992
14993         if (val & I40E_GL_FWSTS_FWS1B_MASK) {
14994                 dev_crit(&pf->pdev->dev, "Firmware recovery mode detected. Limiting functionality.\n");
14995                 dev_crit(&pf->pdev->dev, "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
14996                 set_bit(__I40E_RECOVERY_MODE, pf->state);
14997
14998                 return true;
14999         }
15000         if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15001                 dev_info(&pf->pdev->dev, "Please do Power-On Reset to initialize adapter in normal mode with full functionality.\n");
15002
15003         return false;
15004 }
15005
15006 /**
15007  * i40e_pf_loop_reset - perform reset in a loop.
15008  * @pf: board private structure
15009  *
15010  * This function is useful when a NIC is about to enter recovery mode.
15011  * When a NIC's internal data structures are corrupted the NIC's
15012  * firmware is going to enter recovery mode.
15013  * Right after a POR it takes about 7 minutes for firmware to enter
15014  * recovery mode. Until that time a NIC is in some kind of intermediate
15015  * state. After that time period the NIC almost surely enters
15016  * recovery mode. The only way for a driver to detect intermediate
15017  * state is to issue a series of pf-resets and check a return value.
15018  * If a PF reset returns success then the firmware could be in recovery
15019  * mode so the caller of this code needs to check for recovery mode
15020  * if this function returns success. There is a little chance that
15021  * firmware will hang in intermediate state forever.
15022  * Since waiting 7 minutes is quite a lot of time this function waits
15023  * 10 seconds and then gives up by returning an error.
15024  *
15025  * Return 0 on success, negative on failure.
15026  **/
15027 static i40e_status i40e_pf_loop_reset(struct i40e_pf *pf)
15028 {
15029         /* wait max 10 seconds for PF reset to succeed */
15030         const unsigned long time_end = jiffies + 10 * HZ;
15031
15032         struct i40e_hw *hw = &pf->hw;
15033         i40e_status ret;
15034
15035         ret = i40e_pf_reset(hw);
15036         while (ret != I40E_SUCCESS && time_before(jiffies, time_end)) {
15037                 usleep_range(10000, 20000);
15038                 ret = i40e_pf_reset(hw);
15039         }
15040
15041         if (ret == I40E_SUCCESS)
15042                 pf->pfr_count++;
15043         else
15044                 dev_info(&pf->pdev->dev, "PF reset failed: %d\n", ret);
15045
15046         return ret;
15047 }
15048
15049 /**
15050  * i40e_check_fw_empr - check if FW issued unexpected EMP Reset
15051  * @pf: board private structure
15052  *
15053  * Check FW registers to determine if FW issued unexpected EMP Reset.
15054  * Every time when unexpected EMP Reset occurs the FW increments
15055  * a counter of unexpected EMP Resets. When the counter reaches 10
15056  * the FW should enter the Recovery mode
15057  *
15058  * Returns true if FW issued unexpected EMP Reset
15059  **/
15060 static bool i40e_check_fw_empr(struct i40e_pf *pf)
15061 {
15062         const u32 fw_sts = rd32(&pf->hw, I40E_GL_FWSTS) &
15063                            I40E_GL_FWSTS_FWS1B_MASK;
15064         return (fw_sts > I40E_GL_FWSTS_FWS1B_EMPR_0) &&
15065                (fw_sts <= I40E_GL_FWSTS_FWS1B_EMPR_10);
15066 }
15067
15068 /**
15069  * i40e_handle_resets - handle EMP resets and PF resets
15070  * @pf: board private structure
15071  *
15072  * Handle both EMP resets and PF resets and conclude whether there are
15073  * any issues regarding these resets. If there are any issues then
15074  * generate log entry.
15075  *
15076  * Return 0 if NIC is healthy or negative value when there are issues
15077  * with resets
15078  **/
15079 static i40e_status i40e_handle_resets(struct i40e_pf *pf)
15080 {
15081         const i40e_status pfr = i40e_pf_loop_reset(pf);
15082         const bool is_empr = i40e_check_fw_empr(pf);
15083
15084         if (is_empr || pfr != I40E_SUCCESS)
15085                 dev_crit(&pf->pdev->dev, "Entering recovery mode due to repeated FW resets. This may take several minutes. Refer to the Intel(R) Ethernet Adapters and Devices User Guide.\n");
15086
15087         return is_empr ? I40E_ERR_RESET_FAILED : pfr;
15088 }
15089
15090 /**
15091  * i40e_init_recovery_mode - initialize subsystems needed in recovery mode
15092  * @pf: board private structure
15093  * @hw: ptr to the hardware info
15094  *
15095  * This function does a minimal setup of all subsystems needed for running
15096  * recovery mode.
15097  *
15098  * Returns 0 on success, negative on failure
15099  **/
15100 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw)
15101 {
15102         struct i40e_vsi *vsi;
15103         int err;
15104         int v_idx;
15105
15106         pci_save_state(pf->pdev);
15107
15108         /* set up periodic task facility */
15109         timer_setup(&pf->service_timer, i40e_service_timer, 0);
15110         pf->service_timer_period = HZ;
15111
15112         INIT_WORK(&pf->service_task, i40e_service_task);
15113         clear_bit(__I40E_SERVICE_SCHED, pf->state);
15114
15115         err = i40e_init_interrupt_scheme(pf);
15116         if (err)
15117                 goto err_switch_setup;
15118
15119         /* The number of VSIs reported by the FW is the minimum guaranteed
15120          * to us; HW supports far more and we share the remaining pool with
15121          * the other PFs. We allocate space for more than the guarantee with
15122          * the understanding that we might not get them all later.
15123          */
15124         if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15125                 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15126         else
15127                 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15128
15129         /* Set up the vsi struct and our local tracking of the MAIN PF vsi. */
15130         pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15131                           GFP_KERNEL);
15132         if (!pf->vsi) {
15133                 err = -ENOMEM;
15134                 goto err_switch_setup;
15135         }
15136
15137         /* We allocate one VSI which is needed as absolute minimum
15138          * in order to register the netdev
15139          */
15140         v_idx = i40e_vsi_mem_alloc(pf, I40E_VSI_MAIN);
15141         if (v_idx < 0) {
15142                 err = v_idx;
15143                 goto err_switch_setup;
15144         }
15145         pf->lan_vsi = v_idx;
15146         vsi = pf->vsi[v_idx];
15147         if (!vsi) {
15148                 err = -EFAULT;
15149                 goto err_switch_setup;
15150         }
15151         vsi->alloc_queue_pairs = 1;
15152         err = i40e_config_netdev(vsi);
15153         if (err)
15154                 goto err_switch_setup;
15155         err = register_netdev(vsi->netdev);
15156         if (err)
15157                 goto err_switch_setup;
15158         vsi->netdev_registered = true;
15159         i40e_dbg_pf_init(pf);
15160
15161         err = i40e_setup_misc_vector_for_recovery_mode(pf);
15162         if (err)
15163                 goto err_switch_setup;
15164
15165         /* tell the firmware that we're starting */
15166         i40e_send_version(pf);
15167
15168         /* since everything's happy, start the service_task timer */
15169         mod_timer(&pf->service_timer,
15170                   round_jiffies(jiffies + pf->service_timer_period));
15171
15172         return 0;
15173
15174 err_switch_setup:
15175         i40e_reset_interrupt_capability(pf);
15176         del_timer_sync(&pf->service_timer);
15177         i40e_shutdown_adminq(hw);
15178         iounmap(hw->hw_addr);
15179         pci_disable_pcie_error_reporting(pf->pdev);
15180         pci_release_mem_regions(pf->pdev);
15181         pci_disable_device(pf->pdev);
15182         kfree(pf);
15183
15184         return err;
15185 }
15186
15187 /**
15188  * i40e_set_subsystem_device_id - set subsystem device id
15189  * @hw: pointer to the hardware info
15190  *
15191  * Set PCI subsystem device id either from a pci_dev structure or
15192  * a specific FW register.
15193  **/
15194 static inline void i40e_set_subsystem_device_id(struct i40e_hw *hw)
15195 {
15196         struct pci_dev *pdev = ((struct i40e_pf *)hw->back)->pdev;
15197
15198         hw->subsystem_device_id = pdev->subsystem_device ?
15199                 pdev->subsystem_device :
15200                 (ushort)(rd32(hw, I40E_PFPCI_SUBSYSID) & USHRT_MAX);
15201 }
15202
15203 /**
15204  * i40e_probe - Device initialization routine
15205  * @pdev: PCI device information struct
15206  * @ent: entry in i40e_pci_tbl
15207  *
15208  * i40e_probe initializes a PF identified by a pci_dev structure.
15209  * The OS initialization, configuring of the PF private structure,
15210  * and a hardware reset occur.
15211  *
15212  * Returns 0 on success, negative on failure
15213  **/
15214 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
15215 {
15216         struct i40e_aq_get_phy_abilities_resp abilities;
15217 #ifdef CONFIG_I40E_DCB
15218         enum i40e_get_fw_lldp_status_resp lldp_status;
15219         i40e_status status;
15220 #endif /* CONFIG_I40E_DCB */
15221         struct i40e_pf *pf;
15222         struct i40e_hw *hw;
15223         static u16 pfs_found;
15224         u16 wol_nvm_bits;
15225         u16 link_status;
15226         int err;
15227         u32 val;
15228         u32 i;
15229
15230         err = pci_enable_device_mem(pdev);
15231         if (err)
15232                 return err;
15233
15234         /* set up for high or low dma */
15235         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
15236         if (err) {
15237                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
15238                 if (err) {
15239                         dev_err(&pdev->dev,
15240                                 "DMA configuration failed: 0x%x\n", err);
15241                         goto err_dma;
15242                 }
15243         }
15244
15245         /* set up pci connections */
15246         err = pci_request_mem_regions(pdev, i40e_driver_name);
15247         if (err) {
15248                 dev_info(&pdev->dev,
15249                          "pci_request_selected_regions failed %d\n", err);
15250                 goto err_pci_reg;
15251         }
15252
15253         pci_enable_pcie_error_reporting(pdev);
15254         pci_set_master(pdev);
15255
15256         /* Now that we have a PCI connection, we need to do the
15257          * low level device setup.  This is primarily setting up
15258          * the Admin Queue structures and then querying for the
15259          * device's current profile information.
15260          */
15261         pf = kzalloc(sizeof(*pf), GFP_KERNEL);
15262         if (!pf) {
15263                 err = -ENOMEM;
15264                 goto err_pf_alloc;
15265         }
15266         pf->next_vsi = 0;
15267         pf->pdev = pdev;
15268         set_bit(__I40E_DOWN, pf->state);
15269
15270         hw = &pf->hw;
15271         hw->back = pf;
15272
15273         pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
15274                                 I40E_MAX_CSR_SPACE);
15275         /* We believe that the highest register to read is
15276          * I40E_GLGEN_STAT_CLEAR, so we check if the BAR size
15277          * is not less than that before mapping to prevent a
15278          * kernel panic.
15279          */
15280         if (pf->ioremap_len < I40E_GLGEN_STAT_CLEAR) {
15281                 dev_err(&pdev->dev, "Cannot map registers, bar size 0x%X too small, aborting\n",
15282                         pf->ioremap_len);
15283                 err = -ENOMEM;
15284                 goto err_ioremap;
15285         }
15286         hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
15287         if (!hw->hw_addr) {
15288                 err = -EIO;
15289                 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
15290                          (unsigned int)pci_resource_start(pdev, 0),
15291                          pf->ioremap_len, err);
15292                 goto err_ioremap;
15293         }
15294         hw->vendor_id = pdev->vendor;
15295         hw->device_id = pdev->device;
15296         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
15297         hw->subsystem_vendor_id = pdev->subsystem_vendor;
15298         i40e_set_subsystem_device_id(hw);
15299         hw->bus.device = PCI_SLOT(pdev->devfn);
15300         hw->bus.func = PCI_FUNC(pdev->devfn);
15301         hw->bus.bus_id = pdev->bus->number;
15302         pf->instance = pfs_found;
15303
15304         /* Select something other than the 802.1ad ethertype for the
15305          * switch to use internally and drop on ingress.
15306          */
15307         hw->switch_tag = 0xffff;
15308         hw->first_tag = ETH_P_8021AD;
15309         hw->second_tag = ETH_P_8021Q;
15310
15311         INIT_LIST_HEAD(&pf->l3_flex_pit_list);
15312         INIT_LIST_HEAD(&pf->l4_flex_pit_list);
15313         INIT_LIST_HEAD(&pf->ddp_old_prof);
15314
15315         /* set up the locks for the AQ, do this only once in probe
15316          * and destroy them only once in remove
15317          */
15318         mutex_init(&hw->aq.asq_mutex);
15319         mutex_init(&hw->aq.arq_mutex);
15320
15321         pf->msg_enable = netif_msg_init(debug,
15322                                         NETIF_MSG_DRV |
15323                                         NETIF_MSG_PROBE |
15324                                         NETIF_MSG_LINK);
15325         if (debug < -1)
15326                 pf->hw.debug_mask = debug;
15327
15328         /* do a special CORER for clearing PXE mode once at init */
15329         if (hw->revision_id == 0 &&
15330             (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
15331                 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
15332                 i40e_flush(hw);
15333                 msleep(200);
15334                 pf->corer_count++;
15335
15336                 i40e_clear_pxe_mode(hw);
15337         }
15338
15339         /* Reset here to make sure all is clean and to define PF 'n' */
15340         i40e_clear_hw(hw);
15341
15342         err = i40e_set_mac_type(hw);
15343         if (err) {
15344                 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15345                          err);
15346                 goto err_pf_reset;
15347         }
15348
15349         err = i40e_handle_resets(pf);
15350         if (err)
15351                 goto err_pf_reset;
15352
15353         i40e_check_recovery_mode(pf);
15354
15355         if (is_kdump_kernel()) {
15356                 hw->aq.num_arq_entries = I40E_MIN_ARQ_LEN;
15357                 hw->aq.num_asq_entries = I40E_MIN_ASQ_LEN;
15358         } else {
15359                 hw->aq.num_arq_entries = I40E_AQ_LEN;
15360                 hw->aq.num_asq_entries = I40E_AQ_LEN;
15361         }
15362         hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15363         hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15364         pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
15365
15366         snprintf(pf->int_name, sizeof(pf->int_name) - 1,
15367                  "%s-%s:misc",
15368                  dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
15369
15370         err = i40e_init_shared_code(hw);
15371         if (err) {
15372                 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15373                          err);
15374                 goto err_pf_reset;
15375         }
15376
15377         /* set up a default setting for link flow control */
15378         pf->hw.fc.requested_mode = I40E_FC_NONE;
15379
15380         err = i40e_init_adminq(hw);
15381         if (err) {
15382                 if (err == I40E_ERR_FIRMWARE_API_VERSION)
15383                         dev_info(&pdev->dev,
15384                                  "The driver for the device stopped because the NVM image v%u.%u is newer than expected v%u.%u. You must install the most recent version of the network driver.\n",
15385                                  hw->aq.api_maj_ver,
15386                                  hw->aq.api_min_ver,
15387                                  I40E_FW_API_VERSION_MAJOR,
15388                                  I40E_FW_MINOR_VERSION(hw));
15389                 else
15390                         dev_info(&pdev->dev,
15391                                  "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
15392
15393                 goto err_pf_reset;
15394         }
15395         i40e_get_oem_version(hw);
15396
15397         /* provide nvm, fw, api versions, vendor:device id, subsys vendor:device id */
15398         dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s [%04x:%04x] [%04x:%04x]\n",
15399                  hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
15400                  hw->aq.api_maj_ver, hw->aq.api_min_ver,
15401                  i40e_nvm_version_str(hw), hw->vendor_id, hw->device_id,
15402                  hw->subsystem_vendor_id, hw->subsystem_device_id);
15403
15404         if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
15405             hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw))
15406                 dev_info(&pdev->dev,
15407                          "The driver for the device detected a newer version of the NVM image v%u.%u than expected v%u.%u. Please install the most recent version of the network driver.\n",
15408                          hw->aq.api_maj_ver,
15409                          hw->aq.api_min_ver,
15410                          I40E_FW_API_VERSION_MAJOR,
15411                          I40E_FW_MINOR_VERSION(hw));
15412         else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4)
15413                 dev_info(&pdev->dev,
15414                          "The driver for the device detected an older version of the NVM image v%u.%u than expected v%u.%u. Please update the NVM image.\n",
15415                          hw->aq.api_maj_ver,
15416                          hw->aq.api_min_ver,
15417                          I40E_FW_API_VERSION_MAJOR,
15418                          I40E_FW_MINOR_VERSION(hw));
15419
15420         i40e_verify_eeprom(pf);
15421
15422         /* Rev 0 hardware was never productized */
15423         if (hw->revision_id < 1)
15424                 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
15425
15426         i40e_clear_pxe_mode(hw);
15427
15428         err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
15429         if (err)
15430                 goto err_adminq_setup;
15431
15432         err = i40e_sw_init(pf);
15433         if (err) {
15434                 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
15435                 goto err_sw_init;
15436         }
15437
15438         if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15439                 return i40e_init_recovery_mode(pf, hw);
15440
15441         err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
15442                                 hw->func_caps.num_rx_qp, 0, 0);
15443         if (err) {
15444                 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
15445                 goto err_init_lan_hmc;
15446         }
15447
15448         err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
15449         if (err) {
15450                 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
15451                 err = -ENOENT;
15452                 goto err_configure_lan_hmc;
15453         }
15454
15455         /* Disable LLDP for NICs that have firmware versions lower than v4.3.
15456          * Ignore error return codes because if it was already disabled via
15457          * hardware settings this will fail
15458          */
15459         if (pf->hw_features & I40E_HW_STOP_FW_LLDP) {
15460                 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
15461                 i40e_aq_stop_lldp(hw, true, false, NULL);
15462         }
15463
15464         /* allow a platform config to override the HW addr */
15465         i40e_get_platform_mac_addr(pdev, pf);
15466
15467         if (!is_valid_ether_addr(hw->mac.addr)) {
15468                 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
15469                 err = -EIO;
15470                 goto err_mac_addr;
15471         }
15472         dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
15473         ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
15474         i40e_get_port_mac_addr(hw, hw->mac.port_addr);
15475         if (is_valid_ether_addr(hw->mac.port_addr))
15476                 pf->hw_features |= I40E_HW_PORT_ID_VALID;
15477
15478         i40e_ptp_alloc_pins(pf);
15479         pci_set_drvdata(pdev, pf);
15480         pci_save_state(pdev);
15481
15482 #ifdef CONFIG_I40E_DCB
15483         status = i40e_get_fw_lldp_status(&pf->hw, &lldp_status);
15484         (!status &&
15485          lldp_status == I40E_GET_FW_LLDP_STATUS_ENABLED) ?
15486                 (pf->flags &= ~I40E_FLAG_DISABLE_FW_LLDP) :
15487                 (pf->flags |= I40E_FLAG_DISABLE_FW_LLDP);
15488         dev_info(&pdev->dev,
15489                  (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) ?
15490                         "FW LLDP is disabled\n" :
15491                         "FW LLDP is enabled\n");
15492
15493         /* Enable FW to write default DCB config on link-up */
15494         i40e_aq_set_dcb_parameters(hw, true, NULL);
15495
15496         err = i40e_init_pf_dcb(pf);
15497         if (err) {
15498                 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
15499                 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
15500                 /* Continue without DCB enabled */
15501         }
15502 #endif /* CONFIG_I40E_DCB */
15503
15504         /* set up periodic task facility */
15505         timer_setup(&pf->service_timer, i40e_service_timer, 0);
15506         pf->service_timer_period = HZ;
15507
15508         INIT_WORK(&pf->service_task, i40e_service_task);
15509         clear_bit(__I40E_SERVICE_SCHED, pf->state);
15510
15511         /* NVM bit on means WoL disabled for the port */
15512         i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
15513         if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
15514                 pf->wol_en = false;
15515         else
15516                 pf->wol_en = true;
15517         device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
15518
15519         /* set up the main switch operations */
15520         i40e_determine_queue_usage(pf);
15521         err = i40e_init_interrupt_scheme(pf);
15522         if (err)
15523                 goto err_switch_setup;
15524
15525         /* Reduce Tx and Rx pairs for kdump
15526          * When MSI-X is enabled, it's not allowed to use more TC queue
15527          * pairs than MSI-X vectors (pf->num_lan_msix) exist. Thus
15528          * vsi->num_queue_pairs will be equal to pf->num_lan_msix, i.e., 1.
15529          */
15530         if (is_kdump_kernel())
15531                 pf->num_lan_msix = 1;
15532
15533         pf->udp_tunnel_nic.set_port = i40e_udp_tunnel_set_port;
15534         pf->udp_tunnel_nic.unset_port = i40e_udp_tunnel_unset_port;
15535         pf->udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP;
15536         pf->udp_tunnel_nic.shared = &pf->udp_tunnel_shared;
15537         pf->udp_tunnel_nic.tables[0].n_entries = I40E_MAX_PF_UDP_OFFLOAD_PORTS;
15538         pf->udp_tunnel_nic.tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN |
15539                                                     UDP_TUNNEL_TYPE_GENEVE;
15540
15541         /* The number of VSIs reported by the FW is the minimum guaranteed
15542          * to us; HW supports far more and we share the remaining pool with
15543          * the other PFs. We allocate space for more than the guarantee with
15544          * the understanding that we might not get them all later.
15545          */
15546         if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15547                 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15548         else
15549                 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15550         if (pf->num_alloc_vsi > UDP_TUNNEL_NIC_MAX_SHARING_DEVICES) {
15551                 dev_warn(&pf->pdev->dev,
15552                          "limiting the VSI count due to UDP tunnel limitation %d > %d\n",
15553                          pf->num_alloc_vsi, UDP_TUNNEL_NIC_MAX_SHARING_DEVICES);
15554                 pf->num_alloc_vsi = UDP_TUNNEL_NIC_MAX_SHARING_DEVICES;
15555         }
15556
15557         /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
15558         pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15559                           GFP_KERNEL);
15560         if (!pf->vsi) {
15561                 err = -ENOMEM;
15562                 goto err_switch_setup;
15563         }
15564
15565 #ifdef CONFIG_PCI_IOV
15566         /* prep for VF support */
15567         if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15568             (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15569             !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15570                 if (pci_num_vf(pdev))
15571                         pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
15572         }
15573 #endif
15574         err = i40e_setup_pf_switch(pf, false, false);
15575         if (err) {
15576                 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
15577                 goto err_vsis;
15578         }
15579         INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list);
15580
15581         /* if FDIR VSI was set up, start it now */
15582         for (i = 0; i < pf->num_alloc_vsi; i++) {
15583                 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
15584                         i40e_vsi_open(pf->vsi[i]);
15585                         break;
15586                 }
15587         }
15588
15589         /* The driver only wants link up/down and module qualification
15590          * reports from firmware.  Note the negative logic.
15591          */
15592         err = i40e_aq_set_phy_int_mask(&pf->hw,
15593                                        ~(I40E_AQ_EVENT_LINK_UPDOWN |
15594                                          I40E_AQ_EVENT_MEDIA_NA |
15595                                          I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
15596         if (err)
15597                 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
15598                          i40e_stat_str(&pf->hw, err),
15599                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15600
15601         /* Reconfigure hardware for allowing smaller MSS in the case
15602          * of TSO, so that we avoid the MDD being fired and causing
15603          * a reset in the case of small MSS+TSO.
15604          */
15605         val = rd32(hw, I40E_REG_MSS);
15606         if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
15607                 val &= ~I40E_REG_MSS_MIN_MASK;
15608                 val |= I40E_64BYTE_MSS;
15609                 wr32(hw, I40E_REG_MSS, val);
15610         }
15611
15612         if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
15613                 msleep(75);
15614                 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
15615                 if (err)
15616                         dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
15617                                  i40e_stat_str(&pf->hw, err),
15618                                  i40e_aq_str(&pf->hw,
15619                                              pf->hw.aq.asq_last_status));
15620         }
15621         /* The main driver is (mostly) up and happy. We need to set this state
15622          * before setting up the misc vector or we get a race and the vector
15623          * ends up disabled forever.
15624          */
15625         clear_bit(__I40E_DOWN, pf->state);
15626
15627         /* In case of MSIX we are going to setup the misc vector right here
15628          * to handle admin queue events etc. In case of legacy and MSI
15629          * the misc functionality and queue processing is combined in
15630          * the same vector and that gets setup at open.
15631          */
15632         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
15633                 err = i40e_setup_misc_vector(pf);
15634                 if (err) {
15635                         dev_info(&pdev->dev,
15636                                  "setup of misc vector failed: %d\n", err);
15637                         i40e_cloud_filter_exit(pf);
15638                         i40e_fdir_teardown(pf);
15639                         goto err_vsis;
15640                 }
15641         }
15642
15643 #ifdef CONFIG_PCI_IOV
15644         /* prep for VF support */
15645         if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15646             (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15647             !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15648                 /* disable link interrupts for VFs */
15649                 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
15650                 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
15651                 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
15652                 i40e_flush(hw);
15653
15654                 if (pci_num_vf(pdev)) {
15655                         dev_info(&pdev->dev,
15656                                  "Active VFs found, allocating resources.\n");
15657                         err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
15658                         if (err)
15659                                 dev_info(&pdev->dev,
15660                                          "Error %d allocating resources for existing VFs\n",
15661                                          err);
15662                 }
15663         }
15664 #endif /* CONFIG_PCI_IOV */
15665
15666         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15667                 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
15668                                                       pf->num_iwarp_msix,
15669                                                       I40E_IWARP_IRQ_PILE_ID);
15670                 if (pf->iwarp_base_vector < 0) {
15671                         dev_info(&pdev->dev,
15672                                  "failed to get tracking for %d vectors for IWARP err=%d\n",
15673                                  pf->num_iwarp_msix, pf->iwarp_base_vector);
15674                         pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
15675                 }
15676         }
15677
15678         i40e_dbg_pf_init(pf);
15679
15680         /* tell the firmware that we're starting */
15681         i40e_send_version(pf);
15682
15683         /* since everything's happy, start the service_task timer */
15684         mod_timer(&pf->service_timer,
15685                   round_jiffies(jiffies + pf->service_timer_period));
15686
15687         /* add this PF to client device list and launch a client service task */
15688         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15689                 err = i40e_lan_add_device(pf);
15690                 if (err)
15691                         dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
15692                                  err);
15693         }
15694
15695 #define PCI_SPEED_SIZE 8
15696 #define PCI_WIDTH_SIZE 8
15697         /* Devices on the IOSF bus do not have this information
15698          * and will report PCI Gen 1 x 1 by default so don't bother
15699          * checking them.
15700          */
15701         if (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) {
15702                 char speed[PCI_SPEED_SIZE] = "Unknown";
15703                 char width[PCI_WIDTH_SIZE] = "Unknown";
15704
15705                 /* Get the negotiated link width and speed from PCI config
15706                  * space
15707                  */
15708                 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
15709                                           &link_status);
15710
15711                 i40e_set_pci_config_data(hw, link_status);
15712
15713                 switch (hw->bus.speed) {
15714                 case i40e_bus_speed_8000:
15715                         strlcpy(speed, "8.0", PCI_SPEED_SIZE); break;
15716                 case i40e_bus_speed_5000:
15717                         strlcpy(speed, "5.0", PCI_SPEED_SIZE); break;
15718                 case i40e_bus_speed_2500:
15719                         strlcpy(speed, "2.5", PCI_SPEED_SIZE); break;
15720                 default:
15721                         break;
15722                 }
15723                 switch (hw->bus.width) {
15724                 case i40e_bus_width_pcie_x8:
15725                         strlcpy(width, "8", PCI_WIDTH_SIZE); break;
15726                 case i40e_bus_width_pcie_x4:
15727                         strlcpy(width, "4", PCI_WIDTH_SIZE); break;
15728                 case i40e_bus_width_pcie_x2:
15729                         strlcpy(width, "2", PCI_WIDTH_SIZE); break;
15730                 case i40e_bus_width_pcie_x1:
15731                         strlcpy(width, "1", PCI_WIDTH_SIZE); break;
15732                 default:
15733                         break;
15734                 }
15735
15736                 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
15737                          speed, width);
15738
15739                 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
15740                     hw->bus.speed < i40e_bus_speed_8000) {
15741                         dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
15742                         dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
15743                 }
15744         }
15745
15746         /* get the requested speeds from the fw */
15747         err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
15748         if (err)
15749                 dev_dbg(&pf->pdev->dev, "get requested speeds ret =  %s last_status =  %s\n",
15750                         i40e_stat_str(&pf->hw, err),
15751                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15752         pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
15753
15754         /* set the FEC config due to the board capabilities */
15755         i40e_set_fec_in_flags(abilities.fec_cfg_curr_mod_ext_info, &pf->flags);
15756
15757         /* get the supported phy types from the fw */
15758         err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
15759         if (err)
15760                 dev_dbg(&pf->pdev->dev, "get supported phy types ret =  %s last_status =  %s\n",
15761                         i40e_stat_str(&pf->hw, err),
15762                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15763
15764         /* make sure the MFS hasn't been set lower than the default */
15765 #define MAX_FRAME_SIZE_DEFAULT 0x2600
15766         val = (rd32(&pf->hw, I40E_PRTGL_SAH) &
15767                I40E_PRTGL_SAH_MFS_MASK) >> I40E_PRTGL_SAH_MFS_SHIFT;
15768         if (val < MAX_FRAME_SIZE_DEFAULT)
15769                 dev_warn(&pdev->dev, "MFS for port %x has been set below the default: %x\n",
15770                          i, val);
15771
15772         /* Add a filter to drop all Flow control frames from any VSI from being
15773          * transmitted. By doing so we stop a malicious VF from sending out
15774          * PAUSE or PFC frames and potentially controlling traffic for other
15775          * PF/VF VSIs.
15776          * The FW can still send Flow control frames if enabled.
15777          */
15778         i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
15779                                                        pf->main_vsi_seid);
15780
15781         if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
15782                 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
15783                 pf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS;
15784         if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
15785                 pf->hw_features |= I40E_HW_HAVE_CRT_RETIMER;
15786         /* print a string summarizing features */
15787         i40e_print_features(pf);
15788
15789         return 0;
15790
15791         /* Unwind what we've done if something failed in the setup */
15792 err_vsis:
15793         set_bit(__I40E_DOWN, pf->state);
15794         i40e_clear_interrupt_scheme(pf);
15795         kfree(pf->vsi);
15796 err_switch_setup:
15797         i40e_reset_interrupt_capability(pf);
15798         del_timer_sync(&pf->service_timer);
15799 err_mac_addr:
15800 err_configure_lan_hmc:
15801         (void)i40e_shutdown_lan_hmc(hw);
15802 err_init_lan_hmc:
15803         kfree(pf->qp_pile);
15804 err_sw_init:
15805 err_adminq_setup:
15806 err_pf_reset:
15807         iounmap(hw->hw_addr);
15808 err_ioremap:
15809         kfree(pf);
15810 err_pf_alloc:
15811         pci_disable_pcie_error_reporting(pdev);
15812         pci_release_mem_regions(pdev);
15813 err_pci_reg:
15814 err_dma:
15815         pci_disable_device(pdev);
15816         return err;
15817 }
15818
15819 /**
15820  * i40e_remove - Device removal routine
15821  * @pdev: PCI device information struct
15822  *
15823  * i40e_remove is called by the PCI subsystem to alert the driver
15824  * that is should release a PCI device.  This could be caused by a
15825  * Hot-Plug event, or because the driver is going to be removed from
15826  * memory.
15827  **/
15828 static void i40e_remove(struct pci_dev *pdev)
15829 {
15830         struct i40e_pf *pf = pci_get_drvdata(pdev);
15831         struct i40e_hw *hw = &pf->hw;
15832         i40e_status ret_code;
15833         int i;
15834
15835         i40e_dbg_pf_exit(pf);
15836
15837         i40e_ptp_stop(pf);
15838
15839         /* Disable RSS in hw */
15840         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
15841         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
15842
15843         while (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
15844                 usleep_range(1000, 2000);
15845
15846         if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
15847                 set_bit(__I40E_VF_RESETS_DISABLED, pf->state);
15848                 i40e_free_vfs(pf);
15849                 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
15850         }
15851         /* no more scheduling of any task */
15852         set_bit(__I40E_SUSPENDED, pf->state);
15853         set_bit(__I40E_DOWN, pf->state);
15854         if (pf->service_timer.function)
15855                 del_timer_sync(&pf->service_timer);
15856         if (pf->service_task.func)
15857                 cancel_work_sync(&pf->service_task);
15858
15859         if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
15860                 struct i40e_vsi *vsi = pf->vsi[0];
15861
15862                 /* We know that we have allocated only one vsi for this PF,
15863                  * it was just for registering netdevice, so the interface
15864                  * could be visible in the 'ifconfig' output
15865                  */
15866                 unregister_netdev(vsi->netdev);
15867                 free_netdev(vsi->netdev);
15868
15869                 goto unmap;
15870         }
15871
15872         /* Client close must be called explicitly here because the timer
15873          * has been stopped.
15874          */
15875         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
15876
15877         i40e_fdir_teardown(pf);
15878
15879         /* If there is a switch structure or any orphans, remove them.
15880          * This will leave only the PF's VSI remaining.
15881          */
15882         for (i = 0; i < I40E_MAX_VEB; i++) {
15883                 if (!pf->veb[i])
15884                         continue;
15885
15886                 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
15887                     pf->veb[i]->uplink_seid == 0)
15888                         i40e_switch_branch_release(pf->veb[i]);
15889         }
15890
15891         /* Now we can shutdown the PF's VSI, just before we kill
15892          * adminq and hmc.
15893          */
15894         if (pf->vsi[pf->lan_vsi])
15895                 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
15896
15897         i40e_cloud_filter_exit(pf);
15898
15899         /* remove attached clients */
15900         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15901                 ret_code = i40e_lan_del_device(pf);
15902                 if (ret_code)
15903                         dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
15904                                  ret_code);
15905         }
15906
15907         /* shutdown and destroy the HMC */
15908         if (hw->hmc.hmc_obj) {
15909                 ret_code = i40e_shutdown_lan_hmc(hw);
15910                 if (ret_code)
15911                         dev_warn(&pdev->dev,
15912                                  "Failed to destroy the HMC resources: %d\n",
15913                                  ret_code);
15914         }
15915
15916 unmap:
15917         /* Free MSI/legacy interrupt 0 when in recovery mode. */
15918         if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
15919             !(pf->flags & I40E_FLAG_MSIX_ENABLED))
15920                 free_irq(pf->pdev->irq, pf);
15921
15922         /* shutdown the adminq */
15923         i40e_shutdown_adminq(hw);
15924
15925         /* destroy the locks only once, here */
15926         mutex_destroy(&hw->aq.arq_mutex);
15927         mutex_destroy(&hw->aq.asq_mutex);
15928
15929         /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
15930         rtnl_lock();
15931         i40e_clear_interrupt_scheme(pf);
15932         for (i = 0; i < pf->num_alloc_vsi; i++) {
15933                 if (pf->vsi[i]) {
15934                         if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
15935                                 i40e_vsi_clear_rings(pf->vsi[i]);
15936                         i40e_vsi_clear(pf->vsi[i]);
15937                         pf->vsi[i] = NULL;
15938                 }
15939         }
15940         rtnl_unlock();
15941
15942         for (i = 0; i < I40E_MAX_VEB; i++) {
15943                 kfree(pf->veb[i]);
15944                 pf->veb[i] = NULL;
15945         }
15946
15947         kfree(pf->qp_pile);
15948         kfree(pf->vsi);
15949
15950         iounmap(hw->hw_addr);
15951         kfree(pf);
15952         pci_release_mem_regions(pdev);
15953
15954         pci_disable_pcie_error_reporting(pdev);
15955         pci_disable_device(pdev);
15956 }
15957
15958 /**
15959  * i40e_pci_error_detected - warning that something funky happened in PCI land
15960  * @pdev: PCI device information struct
15961  * @error: the type of PCI error
15962  *
15963  * Called to warn that something happened and the error handling steps
15964  * are in progress.  Allows the driver to quiesce things, be ready for
15965  * remediation.
15966  **/
15967 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
15968                                                 pci_channel_state_t error)
15969 {
15970         struct i40e_pf *pf = pci_get_drvdata(pdev);
15971
15972         dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
15973
15974         if (!pf) {
15975                 dev_info(&pdev->dev,
15976                          "Cannot recover - error happened during device probe\n");
15977                 return PCI_ERS_RESULT_DISCONNECT;
15978         }
15979
15980         /* shutdown all operations */
15981         if (!test_bit(__I40E_SUSPENDED, pf->state))
15982                 i40e_prep_for_reset(pf);
15983
15984         /* Request a slot reset */
15985         return PCI_ERS_RESULT_NEED_RESET;
15986 }
15987
15988 /**
15989  * i40e_pci_error_slot_reset - a PCI slot reset just happened
15990  * @pdev: PCI device information struct
15991  *
15992  * Called to find if the driver can work with the device now that
15993  * the pci slot has been reset.  If a basic connection seems good
15994  * (registers are readable and have sane content) then return a
15995  * happy little PCI_ERS_RESULT_xxx.
15996  **/
15997 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
15998 {
15999         struct i40e_pf *pf = pci_get_drvdata(pdev);
16000         pci_ers_result_t result;
16001         u32 reg;
16002
16003         dev_dbg(&pdev->dev, "%s\n", __func__);
16004         if (pci_enable_device_mem(pdev)) {
16005                 dev_info(&pdev->dev,
16006                          "Cannot re-enable PCI device after reset.\n");
16007                 result = PCI_ERS_RESULT_DISCONNECT;
16008         } else {
16009                 pci_set_master(pdev);
16010                 pci_restore_state(pdev);
16011                 pci_save_state(pdev);
16012                 pci_wake_from_d3(pdev, false);
16013
16014                 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
16015                 if (reg == 0)
16016                         result = PCI_ERS_RESULT_RECOVERED;
16017                 else
16018                         result = PCI_ERS_RESULT_DISCONNECT;
16019         }
16020
16021         return result;
16022 }
16023
16024 /**
16025  * i40e_pci_error_reset_prepare - prepare device driver for pci reset
16026  * @pdev: PCI device information struct
16027  */
16028 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev)
16029 {
16030         struct i40e_pf *pf = pci_get_drvdata(pdev);
16031
16032         i40e_prep_for_reset(pf);
16033 }
16034
16035 /**
16036  * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
16037  * @pdev: PCI device information struct
16038  */
16039 static void i40e_pci_error_reset_done(struct pci_dev *pdev)
16040 {
16041         struct i40e_pf *pf = pci_get_drvdata(pdev);
16042
16043         i40e_reset_and_rebuild(pf, false, false);
16044 }
16045
16046 /**
16047  * i40e_pci_error_resume - restart operations after PCI error recovery
16048  * @pdev: PCI device information struct
16049  *
16050  * Called to allow the driver to bring things back up after PCI error
16051  * and/or reset recovery has finished.
16052  **/
16053 static void i40e_pci_error_resume(struct pci_dev *pdev)
16054 {
16055         struct i40e_pf *pf = pci_get_drvdata(pdev);
16056
16057         dev_dbg(&pdev->dev, "%s\n", __func__);
16058         if (test_bit(__I40E_SUSPENDED, pf->state))
16059                 return;
16060
16061         i40e_handle_reset_warning(pf, false);
16062 }
16063
16064 /**
16065  * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
16066  * using the mac_address_write admin q function
16067  * @pf: pointer to i40e_pf struct
16068  **/
16069 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
16070 {
16071         struct i40e_hw *hw = &pf->hw;
16072         i40e_status ret;
16073         u8 mac_addr[6];
16074         u16 flags = 0;
16075
16076         /* Get current MAC address in case it's an LAA */
16077         if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
16078                 ether_addr_copy(mac_addr,
16079                                 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
16080         } else {
16081                 dev_err(&pf->pdev->dev,
16082                         "Failed to retrieve MAC address; using default\n");
16083                 ether_addr_copy(mac_addr, hw->mac.addr);
16084         }
16085
16086         /* The FW expects the mac address write cmd to first be called with
16087          * one of these flags before calling it again with the multicast
16088          * enable flags.
16089          */
16090         flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
16091
16092         if (hw->func_caps.flex10_enable && hw->partition_id != 1)
16093                 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
16094
16095         ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16096         if (ret) {
16097                 dev_err(&pf->pdev->dev,
16098                         "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
16099                 return;
16100         }
16101
16102         flags = I40E_AQC_MC_MAG_EN
16103                         | I40E_AQC_WOL_PRESERVE_ON_PFR
16104                         | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
16105         ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16106         if (ret)
16107                 dev_err(&pf->pdev->dev,
16108                         "Failed to enable Multicast Magic Packet wake up\n");
16109 }
16110
16111 /**
16112  * i40e_shutdown - PCI callback for shutting down
16113  * @pdev: PCI device information struct
16114  **/
16115 static void i40e_shutdown(struct pci_dev *pdev)
16116 {
16117         struct i40e_pf *pf = pci_get_drvdata(pdev);
16118         struct i40e_hw *hw = &pf->hw;
16119
16120         set_bit(__I40E_SUSPENDED, pf->state);
16121         set_bit(__I40E_DOWN, pf->state);
16122
16123         del_timer_sync(&pf->service_timer);
16124         cancel_work_sync(&pf->service_task);
16125         i40e_cloud_filter_exit(pf);
16126         i40e_fdir_teardown(pf);
16127
16128         /* Client close must be called explicitly here because the timer
16129          * has been stopped.
16130          */
16131         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16132
16133         if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16134                 i40e_enable_mc_magic_wake(pf);
16135
16136         i40e_prep_for_reset(pf);
16137
16138         wr32(hw, I40E_PFPM_APM,
16139              (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16140         wr32(hw, I40E_PFPM_WUFC,
16141              (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16142
16143         /* Free MSI/legacy interrupt 0 when in recovery mode. */
16144         if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16145             !(pf->flags & I40E_FLAG_MSIX_ENABLED))
16146                 free_irq(pf->pdev->irq, pf);
16147
16148         /* Since we're going to destroy queues during the
16149          * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16150          * whole section
16151          */
16152         rtnl_lock();
16153         i40e_clear_interrupt_scheme(pf);
16154         rtnl_unlock();
16155
16156         if (system_state == SYSTEM_POWER_OFF) {
16157                 pci_wake_from_d3(pdev, pf->wol_en);
16158                 pci_set_power_state(pdev, PCI_D3hot);
16159         }
16160 }
16161
16162 /**
16163  * i40e_suspend - PM callback for moving to D3
16164  * @dev: generic device information structure
16165  **/
16166 static int __maybe_unused i40e_suspend(struct device *dev)
16167 {
16168         struct i40e_pf *pf = dev_get_drvdata(dev);
16169         struct i40e_hw *hw = &pf->hw;
16170
16171         /* If we're already suspended, then there is nothing to do */
16172         if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
16173                 return 0;
16174
16175         set_bit(__I40E_DOWN, pf->state);
16176
16177         /* Ensure service task will not be running */
16178         del_timer_sync(&pf->service_timer);
16179         cancel_work_sync(&pf->service_task);
16180
16181         /* Client close must be called explicitly here because the timer
16182          * has been stopped.
16183          */
16184         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16185
16186         if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16187                 i40e_enable_mc_magic_wake(pf);
16188
16189         /* Since we're going to destroy queues during the
16190          * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16191          * whole section
16192          */
16193         rtnl_lock();
16194
16195         i40e_prep_for_reset(pf);
16196
16197         wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16198         wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16199
16200         /* Clear the interrupt scheme and release our IRQs so that the system
16201          * can safely hibernate even when there are a large number of CPUs.
16202          * Otherwise hibernation might fail when mapping all the vectors back
16203          * to CPU0.
16204          */
16205         i40e_clear_interrupt_scheme(pf);
16206
16207         rtnl_unlock();
16208
16209         return 0;
16210 }
16211
16212 /**
16213  * i40e_resume - PM callback for waking up from D3
16214  * @dev: generic device information structure
16215  **/
16216 static int __maybe_unused i40e_resume(struct device *dev)
16217 {
16218         struct i40e_pf *pf = dev_get_drvdata(dev);
16219         int err;
16220
16221         /* If we're not suspended, then there is nothing to do */
16222         if (!test_bit(__I40E_SUSPENDED, pf->state))
16223                 return 0;
16224
16225         /* We need to hold the RTNL lock prior to restoring interrupt schemes,
16226          * since we're going to be restoring queues
16227          */
16228         rtnl_lock();
16229
16230         /* We cleared the interrupt scheme when we suspended, so we need to
16231          * restore it now to resume device functionality.
16232          */
16233         err = i40e_restore_interrupt_scheme(pf);
16234         if (err) {
16235                 dev_err(dev, "Cannot restore interrupt scheme: %d\n",
16236                         err);
16237         }
16238
16239         clear_bit(__I40E_DOWN, pf->state);
16240         i40e_reset_and_rebuild(pf, false, true);
16241
16242         rtnl_unlock();
16243
16244         /* Clear suspended state last after everything is recovered */
16245         clear_bit(__I40E_SUSPENDED, pf->state);
16246
16247         /* Restart the service task */
16248         mod_timer(&pf->service_timer,
16249                   round_jiffies(jiffies + pf->service_timer_period));
16250
16251         return 0;
16252 }
16253
16254 static const struct pci_error_handlers i40e_err_handler = {
16255         .error_detected = i40e_pci_error_detected,
16256         .slot_reset = i40e_pci_error_slot_reset,
16257         .reset_prepare = i40e_pci_error_reset_prepare,
16258         .reset_done = i40e_pci_error_reset_done,
16259         .resume = i40e_pci_error_resume,
16260 };
16261
16262 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume);
16263
16264 static struct pci_driver i40e_driver = {
16265         .name     = i40e_driver_name,
16266         .id_table = i40e_pci_tbl,
16267         .probe    = i40e_probe,
16268         .remove   = i40e_remove,
16269         .driver   = {
16270                 .pm = &i40e_pm_ops,
16271         },
16272         .shutdown = i40e_shutdown,
16273         .err_handler = &i40e_err_handler,
16274         .sriov_configure = i40e_pci_sriov_configure,
16275 };
16276
16277 /**
16278  * i40e_init_module - Driver registration routine
16279  *
16280  * i40e_init_module is the first routine called when the driver is
16281  * loaded. All it does is register with the PCI subsystem.
16282  **/
16283 static int __init i40e_init_module(void)
16284 {
16285         pr_info("%s: %s\n", i40e_driver_name, i40e_driver_string);
16286         pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
16287
16288         /* There is no need to throttle the number of active tasks because
16289          * each device limits its own task using a state bit for scheduling
16290          * the service task, and the device tasks do not interfere with each
16291          * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
16292          * since we need to be able to guarantee forward progress even under
16293          * memory pressure.
16294          */
16295         i40e_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, i40e_driver_name);
16296         if (!i40e_wq) {
16297                 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
16298                 return -ENOMEM;
16299         }
16300
16301         i40e_dbg_init();
16302         return pci_register_driver(&i40e_driver);
16303 }
16304 module_init(i40e_init_module);
16305
16306 /**
16307  * i40e_exit_module - Driver exit cleanup routine
16308  *
16309  * i40e_exit_module is called just before the driver is removed
16310  * from memory.
16311  **/
16312 static void __exit i40e_exit_module(void)
16313 {
16314         pci_unregister_driver(&i40e_driver);
16315         destroy_workqueue(i40e_wq);
16316         ida_destroy(&i40e_client_ida);
16317         i40e_dbg_exit();
16318 }
16319 module_exit(i40e_exit_module);