drivers/net/ethernet/intel/e1000e/netdev.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   5
   6 #include <linux/module.h>
   7 #include <linux/types.h>
   8 #include <linux/init.h>
   9 #include <linux/pci.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/pagemap.h>
  12 #include <linux/delay.h>
  13 #include <linux/netdevice.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/tcp.h>
  16 #include <linux/ipv6.h>
  17 #include <linux/slab.h>
  18 #include <net/checksum.h>
  19 #include <net/ip6_checksum.h>
  20 #include <linux/ethtool.h>
  21 #include <linux/if_vlan.h>
  22 #include <linux/cpu.h>
  23 #include <linux/smp.h>
  24 #include <linux/pm_qos.h>
  25 #include <linux/pm_runtime.h>
  26 #include <linux/aer.h>
  27 #include <linux/prefetch.h>
  28
  29 #include "e1000.h"
  30
  31 char e1000e_driver_name[] = "e1000e";
  32
  33 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  34 static int debug = -1;
  35 module_param(debug, int, 0);
  36 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  37
  38 static const struct e1000_info *e1000_info_tbl[] = {
  39         [board_82571]           = &e1000_82571_info,
  40         [board_82572]           = &e1000_82572_info,
  41         [board_82573]           = &e1000_82573_info,
  42         [board_82574]           = &e1000_82574_info,
  43         [board_82583]           = &e1000_82583_info,
  44         [board_80003es2lan]     = &e1000_es2_info,
  45         [board_ich8lan]         = &e1000_ich8_info,
  46         [board_ich9lan]         = &e1000_ich9_info,
  47         [board_ich10lan]        = &e1000_ich10_info,
  48         [board_pchlan]          = &e1000_pch_info,
  49         [board_pch2lan]         = &e1000_pch2_info,
  50         [board_pch_lpt]         = &e1000_pch_lpt_info,
  51         [board_pch_spt]         = &e1000_pch_spt_info,
  52         [board_pch_cnp]         = &e1000_pch_cnp_info,
  53 };
  54
  55 struct e1000_reg_info {
  56         u32 ofs;
  57         char *name;
  58 };
  59
  60 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
  61         /* General Registers */
  62         {E1000_CTRL, "CTRL"},
  63         {E1000_STATUS, "STATUS"},
  64         {E1000_CTRL_EXT, "CTRL_EXT"},
  65
  66         /* Interrupt Registers */
  67         {E1000_ICR, "ICR"},
  68
  69         /* Rx Registers */
  70         {E1000_RCTL, "RCTL"},
  71         {E1000_RDLEN(0), "RDLEN"},
  72         {E1000_RDH(0), "RDH"},
  73         {E1000_RDT(0), "RDT"},
  74         {E1000_RDTR, "RDTR"},
  75         {E1000_RXDCTL(0), "RXDCTL"},
  76         {E1000_ERT, "ERT"},
  77         {E1000_RDBAL(0), "RDBAL"},
  78         {E1000_RDBAH(0), "RDBAH"},
  79         {E1000_RDFH, "RDFH"},
  80         {E1000_RDFT, "RDFT"},
  81         {E1000_RDFHS, "RDFHS"},
  82         {E1000_RDFTS, "RDFTS"},
  83         {E1000_RDFPC, "RDFPC"},
  84
  85         /* Tx Registers */
  86         {E1000_TCTL, "TCTL"},
  87         {E1000_TDBAL(0), "TDBAL"},
  88         {E1000_TDBAH(0), "TDBAH"},
  89         {E1000_TDLEN(0), "TDLEN"},
  90         {E1000_TDH(0), "TDH"},
  91         {E1000_TDT(0), "TDT"},
  92         {E1000_TIDV, "TIDV"},
  93         {E1000_TXDCTL(0), "TXDCTL"},
  94         {E1000_TADV, "TADV"},
  95         {E1000_TARC(0), "TARC"},
  96         {E1000_TDFH, "TDFH"},
  97         {E1000_TDFT, "TDFT"},
  98         {E1000_TDFHS, "TDFHS"},
  99         {E1000_TDFTS, "TDFTS"},
 100         {E1000_TDFPC, "TDFPC"},
 101
 102         /* List Terminator */
 103         {0, NULL}
 104 };
 105
 106 /**
 107  * __ew32_prepare - prepare to write to MAC CSR register on certain parts
 108  * @hw: pointer to the HW structure
 109  *
 110  * When updating the MAC CSR registers, the Manageability Engine (ME) could
 111  * be accessing the registers at the same time.  Normally, this is handled in
 112  * h/w by an arbiter but on some parts there is a bug that acknowledges Host
 113  * accesses later than it should which could result in the register to have
 114  * an incorrect value.  Workaround this by checking the FWSM register which
 115  * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
 116  * and try again a number of times.
 117  **/
 118 static void __ew32_prepare(struct e1000_hw *hw)
 119 {
 120         s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
 121
 122         while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
 123                 udelay(50);
 124 }
 125
 126 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
 127 {
 128         if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 129                 __ew32_prepare(hw);
 130
 131         writel(val, hw->hw_addr + reg);
 132 }
 133
 134 /**
 135  * e1000_regdump - register printout routine
 136  * @hw: pointer to the HW structure
 137  * @reginfo: pointer to the register info table
 138  **/
 139 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
 140 {
 141         int n = 0;
 142         char rname[16];
 143         u32 regs[8];
 144
 145         switch (reginfo->ofs) {
 146         case E1000_RXDCTL(0):
 147                 for (n = 0; n < 2; n++)
 148                         regs[n] = __er32(hw, E1000_RXDCTL(n));
 149                 break;
 150         case E1000_TXDCTL(0):
 151                 for (n = 0; n < 2; n++)
 152                         regs[n] = __er32(hw, E1000_TXDCTL(n));
 153                 break;
 154         case E1000_TARC(0):
 155                 for (n = 0; n < 2; n++)
 156                         regs[n] = __er32(hw, E1000_TARC(n));
 157                 break;
 158         default:
 159                 pr_info("%-15s %08x\n",
 160                         reginfo->name, __er32(hw, reginfo->ofs));
 161                 return;
 162         }
 163
 164         snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
 165         pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
 166 }
 167
 168 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
 169                                  struct e1000_buffer *bi)
 170 {
 171         int i;
 172         struct e1000_ps_page *ps_page;
 173
 174         for (i = 0; i < adapter->rx_ps_pages; i++) {
 175                 ps_page = &bi->ps_pages[i];
 176
 177                 if (ps_page->page) {
 178                         pr_info("packet dump for ps_page %d:\n", i);
 179                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 180                                        16, 1, page_address(ps_page->page),
 181                                        PAGE_SIZE, true);
 182                 }
 183         }
 184 }
 185
 186 /**
 187  * e1000e_dump - Print registers, Tx-ring and Rx-ring
 188  * @adapter: board private structure
 189  **/
 190 static void e1000e_dump(struct e1000_adapter *adapter)
 191 {
 192         struct net_device *netdev = adapter->netdev;
 193         struct e1000_hw *hw = &adapter->hw;
 194         struct e1000_reg_info *reginfo;
 195         struct e1000_ring *tx_ring = adapter->tx_ring;
 196         struct e1000_tx_desc *tx_desc;
 197         struct my_u0 {
 198                 __le64 a;
 199                 __le64 b;
 200         } *u0;
 201         struct e1000_buffer *buffer_info;
 202         struct e1000_ring *rx_ring = adapter->rx_ring;
 203         union e1000_rx_desc_packet_split *rx_desc_ps;
 204         union e1000_rx_desc_extended *rx_desc;
 205         struct my_u1 {
 206                 __le64 a;
 207                 __le64 b;
 208                 __le64 c;
 209                 __le64 d;
 210         } *u1;
 211         u32 staterr;
 212         int i = 0;
 213
 214         if (!netif_msg_hw(adapter))
 215                 return;
 216
 217         /* Print netdevice Info */
 218         if (netdev) {
 219                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 220                 pr_info("Device Name     state            trans_start\n");
 221                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 222                         netdev->state, dev_trans_start(netdev));
 223         }
 224
 225         /* Print Registers */
 226         dev_info(&adapter->pdev->dev, "Register Dump\n");
 227         pr_info(" Register Name   Value\n");
 228         for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
 229              reginfo->name; reginfo++) {
 230                 e1000_regdump(hw, reginfo);
 231         }
 232
 233         /* Print Tx Ring Summary */
 234         if (!netdev || !netif_running(netdev))
 235                 return;
 236
 237         dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
 238         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 239         buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
 240         pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
 241                 0, tx_ring->next_to_use, tx_ring->next_to_clean,
 242                 (unsigned long long)buffer_info->dma,
 243                 buffer_info->length,
 244                 buffer_info->next_to_watch,
 245                 (unsigned long long)buffer_info->time_stamp);
 246
 247         /* Print Tx Ring */
 248         if (!netif_msg_tx_done(adapter))
 249                 goto rx_ring_summary;
 250
 251         dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
 252
 253         /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
 254          *
 255          * Legacy Transmit Descriptor
 256          *   +--------------------------------------------------------------+
 257          * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
 258          *   +--------------------------------------------------------------+
 259          * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
 260          *   +--------------------------------------------------------------+
 261          *   63       48 47        36 35    32 31     24 23    16 15        0
 262          *
 263          * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
 264          *   63      48 47    40 39       32 31             16 15    8 7      0
 265          *   +----------------------------------------------------------------+
 266          * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
 267          *   +----------------------------------------------------------------+
 268          * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
 269          *   +----------------------------------------------------------------+
 270          *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
 271          *
 272          * Extended Data Descriptor (DTYP=0x1)
 273          *   +----------------------------------------------------------------+
 274          * 0 |                     Buffer Address [63:0]                      |
 275          *   +----------------------------------------------------------------+
 276          * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
 277          *   +----------------------------------------------------------------+
 278          *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
 279          */
 280         pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
 281         pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
 282         pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
 283         for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 284                 const char *next_desc;
 285                 tx_desc = E1000_TX_DESC(*tx_ring, i);
 286                 buffer_info = &tx_ring->buffer_info[i];
 287                 u0 = (struct my_u0 *)tx_desc;
 288                 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
 289                         next_desc = " NTC/U";
 290                 else if (i == tx_ring->next_to_use)
 291                         next_desc = " NTU";
 292                 else if (i == tx_ring->next_to_clean)
 293                         next_desc = " NTC";
 294                 else
 295                         next_desc = "";
 296                 pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
 297                         (!(le64_to_cpu(u0->b) & BIT(29)) ? 'l' :
 298                          ((le64_to_cpu(u0->b) & BIT(20)) ? 'd' : 'c')),
 299                         i,
 300                         (unsigned long long)le64_to_cpu(u0->a),
 301                         (unsigned long long)le64_to_cpu(u0->b),
 302                         (unsigned long long)buffer_info->dma,
 303                         buffer_info->length, buffer_info->next_to_watch,
 304                         (unsigned long long)buffer_info->time_stamp,
 305                         buffer_info->skb, next_desc);
 306
 307                 if (netif_msg_pktdata(adapter) && buffer_info->skb)
 308                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 309                                        16, 1, buffer_info->skb->data,
 310                                        buffer_info->skb->len, true);
 311         }
 312
 313         /* Print Rx Ring Summary */
 314 rx_ring_summary:
 315         dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
 316         pr_info("Queue [NTU] [NTC]\n");
 317         pr_info(" %5d %5X %5X\n",
 318                 0, rx_ring->next_to_use, rx_ring->next_to_clean);
 319
 320         /* Print Rx Ring */
 321         if (!netif_msg_rx_status(adapter))
 322                 return;
 323
 324         dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
 325         switch (adapter->rx_ps_pages) {
 326         case 1:
 327         case 2:
 328         case 3:
 329                 /* [Extended] Packet Split Receive Descriptor Format
 330                  *
 331                  *    +-----------------------------------------------------+
 332                  *  0 |                Buffer Address 0 [63:0]              |
 333                  *    +-----------------------------------------------------+
 334                  *  8 |                Buffer Address 1 [63:0]              |
 335                  *    +-----------------------------------------------------+
 336                  * 16 |                Buffer Address 2 [63:0]              |
 337                  *    +-----------------------------------------------------+
 338                  * 24 |                Buffer Address 3 [63:0]              |
 339                  *    +-----------------------------------------------------+
 340                  */
 341                 pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
 342                 /* [Extended] Receive Descriptor (Write-Back) Format
 343                  *
 344                  *   63       48 47    32 31     13 12    8 7    4 3        0
 345                  *   +------------------------------------------------------+
 346                  * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
 347                  *   | Checksum | Ident  |         | Queue |      |  Type   |
 348                  *   +------------------------------------------------------+
 349                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 350                  *   +------------------------------------------------------+
 351                  *   63       48 47    32 31            20 19               0
 352                  */
 353                 pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
 354                 for (i = 0; i < rx_ring->count; i++) {
 355                         const char *next_desc;
 356                         buffer_info = &rx_ring->buffer_info[i];
 357                         rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
 358                         u1 = (struct my_u1 *)rx_desc_ps;
 359                         staterr =
 360                             le32_to_cpu(rx_desc_ps->wb.middle.status_error);
 361
 362                         if (i == rx_ring->next_to_use)
 363                                 next_desc = " NTU";
 364                         else if (i == rx_ring->next_to_clean)
 365                                 next_desc = " NTC";
 366                         else
 367                                 next_desc = "";
 368
 369                         if (staterr & E1000_RXD_STAT_DD) {
 370                                 /* Descriptor Done */
 371                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
 372                                         "RWB", i,
 373                                         (unsigned long long)le64_to_cpu(u1->a),
 374                                         (unsigned long long)le64_to_cpu(u1->b),
 375                                         (unsigned long long)le64_to_cpu(u1->c),
 376                                         (unsigned long long)le64_to_cpu(u1->d),
 377                                         buffer_info->skb, next_desc);
 378                         } else {
 379                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
 380                                         "R  ", i,
 381                                         (unsigned long long)le64_to_cpu(u1->a),
 382                                         (unsigned long long)le64_to_cpu(u1->b),
 383                                         (unsigned long long)le64_to_cpu(u1->c),
 384                                         (unsigned long long)le64_to_cpu(u1->d),
 385                                         (unsigned long long)buffer_info->dma,
 386                                         buffer_info->skb, next_desc);
 387
 388                                 if (netif_msg_pktdata(adapter))
 389                                         e1000e_dump_ps_pages(adapter,
 390                                                              buffer_info);
 391                         }
 392                 }
 393                 break;
 394         default:
 395         case 0:
 396                 /* Extended Receive Descriptor (Read) Format
 397                  *
 398                  *   +-----------------------------------------------------+
 399                  * 0 |                Buffer Address [63:0]                |
 400                  *   +-----------------------------------------------------+
 401                  * 8 |                      Reserved                       |
 402                  *   +-----------------------------------------------------+
 403                  */
 404                 pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
 405                 /* Extended Receive Descriptor (Write-Back) Format
 406                  *
 407                  *   63       48 47    32 31    24 23            4 3        0
 408                  *   +------------------------------------------------------+
 409                  *   |     RSS Hash      |        |               |         |
 410                  * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
 411                  *   | Packet   | IP     |        |               |  Type   |
 412                  *   | Checksum | Ident  |        |               |         |
 413                  *   +------------------------------------------------------+
 414                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 415                  *   +------------------------------------------------------+
 416                  *   63       48 47    32 31            20 19               0
 417                  */
 418                 pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
 419
 420                 for (i = 0; i < rx_ring->count; i++) {
 421                         const char *next_desc;
 422
 423                         buffer_info = &rx_ring->buffer_info[i];
 424                         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 425                         u1 = (struct my_u1 *)rx_desc;
 426                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 427
 428                         if (i == rx_ring->next_to_use)
 429                                 next_desc = " NTU";
 430                         else if (i == rx_ring->next_to_clean)
 431                                 next_desc = " NTC";
 432                         else
 433                                 next_desc = "";
 434
 435                         if (staterr & E1000_RXD_STAT_DD) {
 436                                 /* Descriptor Done */
 437                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 438                                         "RWB", i,
 439                                         (unsigned long long)le64_to_cpu(u1->a),
 440                                         (unsigned long long)le64_to_cpu(u1->b),
 441                                         buffer_info->skb, next_desc);
 442                         } else {
 443                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
 444                                         "R  ", i,
 445                                         (unsigned long long)le64_to_cpu(u1->a),
 446                                         (unsigned long long)le64_to_cpu(u1->b),
 447                                         (unsigned long long)buffer_info->dma,
 448                                         buffer_info->skb, next_desc);
 449
 450                                 if (netif_msg_pktdata(adapter) &&
 451                                     buffer_info->skb)
 452                                         print_hex_dump(KERN_INFO, "",
 453                                                        DUMP_PREFIX_ADDRESS, 16,
 454                                                        1,
 455                                                        buffer_info->skb->data,
 456                                                        adapter->rx_buffer_len,
 457                                                        true);
 458                         }
 459                 }
 460         }
 461 }
 462
 463 /**
 464  * e1000_desc_unused - calculate if we have unused descriptors
 465  * @ring: pointer to ring struct to perform calculation on
 466  **/
 467 static int e1000_desc_unused(struct e1000_ring *ring)
 468 {
 469         if (ring->next_to_clean > ring->next_to_use)
 470                 return ring->next_to_clean - ring->next_to_use - 1;
 471
 472         return ring->count + ring->next_to_clean - ring->next_to_use - 1;
 473 }
 474
 475 /**
 476  * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
 477  * @adapter: board private structure
 478  * @hwtstamps: time stamp structure to update
 479  * @systim: unsigned 64bit system time value.
 480  *
 481  * Convert the system time value stored in the RX/TXSTMP registers into a
 482  * hwtstamp which can be used by the upper level time stamping functions.
 483  *
 484  * The 'systim_lock' spinlock is used to protect the consistency of the
 485  * system time value. This is needed because reading the 64 bit time
 486  * value involves reading two 32 bit registers. The first read latches the
 487  * value.
 488  **/
 489 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
 490                                       struct skb_shared_hwtstamps *hwtstamps,
 491                                       u64 systim)
 492 {
 493         u64 ns;
 494         unsigned long flags;
 495
 496         spin_lock_irqsave(&adapter->systim_lock, flags);
 497         ns = timecounter_cyc2time(&adapter->tc, systim);
 498         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 499
 500         memset(hwtstamps, 0, sizeof(*hwtstamps));
 501         hwtstamps->hwtstamp = ns_to_ktime(ns);
 502 }
 503
 504 /**
 505  * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
 506  * @adapter: board private structure
 507  * @status: descriptor extended error and status field
 508  * @skb: particular skb to include time stamp
 509  *
 510  * If the time stamp is valid, convert it into the timecounter ns value
 511  * and store that result into the shhwtstamps structure which is passed
 512  * up the network stack.
 513  **/
 514 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
 515                                struct sk_buff *skb)
 516 {
 517         struct e1000_hw *hw = &adapter->hw;
 518         u64 rxstmp;
 519
 520         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
 521             !(status & E1000_RXDEXT_STATERR_TST) ||
 522             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 523                 return;
 524
 525         /* The Rx time stamp registers contain the time stamp.  No other
 526          * received packet will be time stamped until the Rx time stamp
 527          * registers are read.  Because only one packet can be time stamped
 528          * at a time, the register values must belong to this packet and
 529          * therefore none of the other additional attributes need to be
 530          * compared.
 531          */
 532         rxstmp = (u64)er32(RXSTMPL);
 533         rxstmp |= (u64)er32(RXSTMPH) << 32;
 534         e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
 535
 536         adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
 537 }
 538
 539 /**
 540  * e1000_receive_skb - helper function to handle Rx indications
 541  * @adapter: board private structure
 542  * @netdev: pointer to netdev struct
 543  * @staterr: descriptor extended error and status field as written by hardware
 544  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
 545  * @skb: pointer to sk_buff to be indicated to stack
 546  **/
 547 static void e1000_receive_skb(struct e1000_adapter *adapter,
 548                               struct net_device *netdev, struct sk_buff *skb,
 549                               u32 staterr, __le16 vlan)
 550 {
 551         u16 tag = le16_to_cpu(vlan);
 552
 553         e1000e_rx_hwtstamp(adapter, staterr, skb);
 554
 555         skb->protocol = eth_type_trans(skb, netdev);
 556
 557         if (staterr & E1000_RXD_STAT_VP)
 558                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
 559
 560         napi_gro_receive(&adapter->napi, skb);
 561 }
 562
 563 /**
 564  * e1000_rx_checksum - Receive Checksum Offload
 565  * @adapter: board private structure
 566  * @status_err: receive descriptor status and error fields
 567  * @skb: socket buffer with received data
 568  **/
 569 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
 570                               struct sk_buff *skb)
 571 {
 572         u16 status = (u16)status_err;
 573         u8 errors = (u8)(status_err >> 24);
 574
 575         skb_checksum_none_assert(skb);
 576
 577         /* Rx checksum disabled */
 578         if (!(adapter->netdev->features & NETIF_F_RXCSUM))
 579                 return;
 580
 581         /* Ignore Checksum bit is set */
 582         if (status & E1000_RXD_STAT_IXSM)
 583                 return;
 584
 585         /* TCP/UDP checksum error bit or IP checksum error bit is set */
 586         if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
 587                 /* let the stack verify checksum errors */
 588                 adapter->hw_csum_err++;
 589                 return;
 590         }
 591
 592         /* TCP/UDP Checksum has not been calculated */
 593         if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
 594                 return;
 595
 596         /* It must be a TCP or UDP packet with a valid checksum */
 597         skb->ip_summed = CHECKSUM_UNNECESSARY;
 598         adapter->hw_csum_good++;
 599 }
 600
 601 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
 602 {
 603         struct e1000_adapter *adapter = rx_ring->adapter;
 604         struct e1000_hw *hw = &adapter->hw;
 605
 606         __ew32_prepare(hw);
 607         writel(i, rx_ring->tail);
 608
 609         if (unlikely(i != readl(rx_ring->tail))) {
 610                 u32 rctl = er32(RCTL);
 611
 612                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
 613                 e_err("ME firmware caused invalid RDT - resetting\n");
 614                 schedule_work(&adapter->reset_task);
 615         }
 616 }
 617
 618 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
 619 {
 620         struct e1000_adapter *adapter = tx_ring->adapter;
 621         struct e1000_hw *hw = &adapter->hw;
 622
 623         __ew32_prepare(hw);
 624         writel(i, tx_ring->tail);
 625
 626         if (unlikely(i != readl(tx_ring->tail))) {
 627                 u32 tctl = er32(TCTL);
 628
 629                 ew32(TCTL, tctl & ~E1000_TCTL_EN);
 630                 e_err("ME firmware caused invalid TDT - resetting\n");
 631                 schedule_work(&adapter->reset_task);
 632         }
 633 }
 634
 635 /**
 636  * e1000_alloc_rx_buffers - Replace used receive buffers
 637  * @rx_ring: Rx descriptor ring
 638  * @cleaned_count: number to reallocate
 639  * @gfp: flags for allocation
 640  **/
 641 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
 642                                    int cleaned_count, gfp_t gfp)
 643 {
 644         struct e1000_adapter *adapter = rx_ring->adapter;
 645         struct net_device *netdev = adapter->netdev;
 646         struct pci_dev *pdev = adapter->pdev;
 647         union e1000_rx_desc_extended *rx_desc;
 648         struct e1000_buffer *buffer_info;
 649         struct sk_buff *skb;
 650         unsigned int i;
 651         unsigned int bufsz = adapter->rx_buffer_len;
 652
 653         i = rx_ring->next_to_use;
 654         buffer_info = &rx_ring->buffer_info[i];
 655
 656         while (cleaned_count--) {
 657                 skb = buffer_info->skb;
 658                 if (skb) {
 659                         skb_trim(skb, 0);
 660                         goto map_skb;
 661                 }
 662
 663                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 664                 if (!skb) {
 665                         /* Better luck next round */
 666                         adapter->alloc_rx_buff_failed++;
 667                         break;
 668                 }
 669
 670                 buffer_info->skb = skb;
 671 map_skb:
 672                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 673                                                   adapter->rx_buffer_len,
 674                                                   DMA_FROM_DEVICE);
 675                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 676                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 677                         adapter->rx_dma_failed++;
 678                         break;
 679                 }
 680
 681                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 682                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 683
 684                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 685                         /* Force memory writes to complete before letting h/w
 686                          * know there are new descriptors to fetch.  (Only
 687                          * applicable for weak-ordered memory model archs,
 688                          * such as IA-64).
 689                          */
 690                         wmb();
 691                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 692                                 e1000e_update_rdt_wa(rx_ring, i);
 693                         else
 694                                 writel(i, rx_ring->tail);
 695                 }
 696                 i++;
 697                 if (i == rx_ring->count)
 698                         i = 0;
 699                 buffer_info = &rx_ring->buffer_info[i];
 700         }
 701
 702         rx_ring->next_to_use = i;
 703 }
 704
 705 /**
 706  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
 707  * @rx_ring: Rx descriptor ring
 708  * @cleaned_count: number to reallocate
 709  * @gfp: flags for allocation
 710  **/
 711 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
 712                                       int cleaned_count, gfp_t gfp)
 713 {
 714         struct e1000_adapter *adapter = rx_ring->adapter;
 715         struct net_device *netdev = adapter->netdev;
 716         struct pci_dev *pdev = adapter->pdev;
 717         union e1000_rx_desc_packet_split *rx_desc;
 718         struct e1000_buffer *buffer_info;
 719         struct e1000_ps_page *ps_page;
 720         struct sk_buff *skb;
 721         unsigned int i, j;
 722
 723         i = rx_ring->next_to_use;
 724         buffer_info = &rx_ring->buffer_info[i];
 725
 726         while (cleaned_count--) {
 727                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
 728
 729                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
 730                         ps_page = &buffer_info->ps_pages[j];
 731                         if (j >= adapter->rx_ps_pages) {
 732                                 /* all unused desc entries get hw null ptr */
 733                                 rx_desc->read.buffer_addr[j + 1] =
 734                                     ~cpu_to_le64(0);
 735                                 continue;
 736                         }
 737                         if (!ps_page->page) {
 738                                 ps_page->page = alloc_page(gfp);
 739                                 if (!ps_page->page) {
 740                                         adapter->alloc_rx_buff_failed++;
 741                                         goto no_buffers;
 742                                 }
 743                                 ps_page->dma = dma_map_page(&pdev->dev,
 744                                                             ps_page->page,
 745                                                             0, PAGE_SIZE,
 746                                                             DMA_FROM_DEVICE);
 747                                 if (dma_mapping_error(&pdev->dev,
 748                                                       ps_page->dma)) {
 749                                         dev_err(&adapter->pdev->dev,
 750                                                 "Rx DMA page map failed\n");
 751                                         adapter->rx_dma_failed++;
 752                                         goto no_buffers;
 753                                 }
 754                         }
 755                         /* Refresh the desc even if buffer_addrs
 756                          * didn't change because each write-back
 757                          * erases this info.
 758                          */
 759                         rx_desc->read.buffer_addr[j + 1] =
 760                             cpu_to_le64(ps_page->dma);
 761                 }
 762
 763                 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
 764                                                   gfp);
 765
 766                 if (!skb) {
 767                         adapter->alloc_rx_buff_failed++;
 768                         break;
 769                 }
 770
 771                 buffer_info->skb = skb;
 772                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 773                                                   adapter->rx_ps_bsize0,
 774                                                   DMA_FROM_DEVICE);
 775                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 776                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 777                         adapter->rx_dma_failed++;
 778                         /* cleanup skb */
 779                         dev_kfree_skb_any(skb);
 780                         buffer_info->skb = NULL;
 781                         break;
 782                 }
 783
 784                 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
 785
 786                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 787                         /* Force memory writes to complete before letting h/w
 788                          * know there are new descriptors to fetch.  (Only
 789                          * applicable for weak-ordered memory model archs,
 790                          * such as IA-64).
 791                          */
 792                         wmb();
 793                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 794                                 e1000e_update_rdt_wa(rx_ring, i << 1);
 795                         else
 796                                 writel(i << 1, rx_ring->tail);
 797                 }
 798
 799                 i++;
 800                 if (i == rx_ring->count)
 801                         i = 0;
 802                 buffer_info = &rx_ring->buffer_info[i];
 803         }
 804
 805 no_buffers:
 806         rx_ring->next_to_use = i;
 807 }
 808
 809 /**
 810  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
 811  * @rx_ring: Rx descriptor ring
 812  * @cleaned_count: number of buffers to allocate this pass
 813  * @gfp: flags for allocation
 814  **/
 815
 816 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
 817                                          int cleaned_count, gfp_t gfp)
 818 {
 819         struct e1000_adapter *adapter = rx_ring->adapter;
 820         struct net_device *netdev = adapter->netdev;
 821         struct pci_dev *pdev = adapter->pdev;
 822         union e1000_rx_desc_extended *rx_desc;
 823         struct e1000_buffer *buffer_info;
 824         struct sk_buff *skb;
 825         unsigned int i;
 826         unsigned int bufsz = 256 - 16;  /* for skb_reserve */
 827
 828         i = rx_ring->next_to_use;
 829         buffer_info = &rx_ring->buffer_info[i];
 830
 831         while (cleaned_count--) {
 832                 skb = buffer_info->skb;
 833                 if (skb) {
 834                         skb_trim(skb, 0);
 835                         goto check_page;
 836                 }
 837
 838                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 839                 if (unlikely(!skb)) {
 840                         /* Better luck next round */
 841                         adapter->alloc_rx_buff_failed++;
 842                         break;
 843                 }
 844
 845                 buffer_info->skb = skb;
 846 check_page:
 847                 /* allocate a new page if necessary */
 848                 if (!buffer_info->page) {
 849                         buffer_info->page = alloc_page(gfp);
 850                         if (unlikely(!buffer_info->page)) {
 851                                 adapter->alloc_rx_buff_failed++;
 852                                 break;
 853                         }
 854                 }
 855
 856                 if (!buffer_info->dma) {
 857                         buffer_info->dma = dma_map_page(&pdev->dev,
 858                                                         buffer_info->page, 0,
 859                                                         PAGE_SIZE,
 860                                                         DMA_FROM_DEVICE);
 861                         if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 862                                 adapter->alloc_rx_buff_failed++;
 863                                 break;
 864                         }
 865                 }
 866
 867                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 868                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 869
 870                 if (unlikely(++i == rx_ring->count))
 871                         i = 0;
 872                 buffer_info = &rx_ring->buffer_info[i];
 873         }
 874
 875         if (likely(rx_ring->next_to_use != i)) {
 876                 rx_ring->next_to_use = i;
 877                 if (unlikely(i-- == 0))
 878                         i = (rx_ring->count - 1);
 879
 880                 /* Force memory writes to complete before letting h/w
 881                  * know there are new descriptors to fetch.  (Only
 882                  * applicable for weak-ordered memory model archs,
 883                  * such as IA-64).
 884                  */
 885                 wmb();
 886                 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 887                         e1000e_update_rdt_wa(rx_ring, i);
 888                 else
 889                         writel(i, rx_ring->tail);
 890         }
 891 }
 892
 893 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
 894                                  struct sk_buff *skb)
 895 {
 896         if (netdev->features & NETIF_F_RXHASH)
 897                 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
 898 }
 899
 900 /**
 901  * e1000_clean_rx_irq - Send received data up the network stack
 902  * @rx_ring: Rx descriptor ring
 903  * @work_done: output parameter for indicating completed work
 904  * @work_to_do: how many packets we can clean
 905  *
 906  * the return value indicates whether actual cleaning was done, there
 907  * is no guarantee that everything was cleaned
 908  **/
 909 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
 910                                int work_to_do)
 911 {
 912         struct e1000_adapter *adapter = rx_ring->adapter;
 913         struct net_device *netdev = adapter->netdev;
 914         struct pci_dev *pdev = adapter->pdev;
 915         struct e1000_hw *hw = &adapter->hw;
 916         union e1000_rx_desc_extended *rx_desc, *next_rxd;
 917         struct e1000_buffer *buffer_info, *next_buffer;
 918         u32 length, staterr;
 919         unsigned int i;
 920         int cleaned_count = 0;
 921         bool cleaned = false;
 922         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 923
 924         i = rx_ring->next_to_clean;
 925         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 926         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 927         buffer_info = &rx_ring->buffer_info[i];
 928
 929         while (staterr & E1000_RXD_STAT_DD) {
 930                 struct sk_buff *skb;
 931
 932                 if (*work_done >= work_to_do)
 933                         break;
 934                 (*work_done)++;
 935                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
 936
 937                 skb = buffer_info->skb;
 938                 buffer_info->skb = NULL;
 939
 940                 prefetch(skb->data - NET_IP_ALIGN);
 941
 942                 i++;
 943                 if (i == rx_ring->count)
 944                         i = 0;
 945                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
 946                 prefetch(next_rxd);
 947
 948                 next_buffer = &rx_ring->buffer_info[i];
 949
 950                 cleaned = true;
 951                 cleaned_count++;
 952                 dma_unmap_single(&pdev->dev, buffer_info->dma,
 953                                  adapter->rx_buffer_len, DMA_FROM_DEVICE);
 954                 buffer_info->dma = 0;
 955
 956                 length = le16_to_cpu(rx_desc->wb.upper.length);
 957
 958                 /* !EOP means multiple descriptors were used to store a single
 959                  * packet, if that's the case we need to toss it.  In fact, we
 960                  * need to toss every packet with the EOP bit clear and the
 961                  * next frame that _does_ have the EOP bit set, as it is by
 962                  * definition only a frame fragment
 963                  */
 964                 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
 965                         adapter->flags2 |= FLAG2_IS_DISCARDING;
 966
 967                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
 968                         /* All receives must fit into a single buffer */
 969                         e_dbg("Receive packet consumed multiple buffers\n");
 970                         /* recycle */
 971                         buffer_info->skb = skb;
 972                         if (staterr & E1000_RXD_STAT_EOP)
 973                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 974                         goto next_desc;
 975                 }
 976
 977                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
 978                              !(netdev->features & NETIF_F_RXALL))) {
 979                         /* recycle */
 980                         buffer_info->skb = skb;
 981                         goto next_desc;
 982                 }
 983
 984                 /* adjust length to remove Ethernet CRC */
 985                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
 986                         /* If configured to store CRC, don't subtract FCS,
 987                          * but keep the FCS bytes out of the total_rx_bytes
 988                          * counter
 989                          */
 990                         if (netdev->features & NETIF_F_RXFCS)
 991                                 total_rx_bytes -= 4;
 992                         else
 993                                 length -= 4;
 994                 }
 995
 996                 total_rx_bytes += length;
 997                 total_rx_packets++;
 998
 999                 /* code added for copybreak, this should improve
1000                  * performance for small packets with large amounts
1001                  * of reassembly being done in the stack
1002                  */
1003                 if (length < copybreak) {
1004                         struct sk_buff *new_skb =
1005                                 napi_alloc_skb(&adapter->napi, length);
1006                         if (new_skb) {
1007                                 skb_copy_to_linear_data_offset(new_skb,
1008                                                                -NET_IP_ALIGN,
1009                                                                (skb->data -
1010                                                                 NET_IP_ALIGN),
1011                                                                (length +
1012                                                                 NET_IP_ALIGN));
1013                                 /* save the skb in buffer_info as good */
1014                                 buffer_info->skb = skb;
1015                                 skb = new_skb;
1016                         }
1017                         /* else just continue with the old one */
1018                 }
1019                 /* end copybreak code */
1020                 skb_put(skb, length);
1021
1022                 /* Receive Checksum Offload */
1023                 e1000_rx_checksum(adapter, staterr, skb);
1024
1025                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1026
1027                 e1000_receive_skb(adapter, netdev, skb, staterr,
1028                                   rx_desc->wb.upper.vlan);
1029
1030 next_desc:
1031                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1032
1033                 /* return some buffers to hardware, one at a time is too slow */
1034                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1035                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1036                                               GFP_ATOMIC);
1037                         cleaned_count = 0;
1038                 }
1039
1040                 /* use prefetched values */
1041                 rx_desc = next_rxd;
1042                 buffer_info = next_buffer;
1043
1044                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1045         }
1046         rx_ring->next_to_clean = i;
1047
1048         cleaned_count = e1000_desc_unused(rx_ring);
1049         if (cleaned_count)
1050                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1051
1052         adapter->total_rx_bytes += total_rx_bytes;
1053         adapter->total_rx_packets += total_rx_packets;
1054         return cleaned;
1055 }
1056
1057 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1058                             struct e1000_buffer *buffer_info,
1059                             bool drop)
1060 {
1061         struct e1000_adapter *adapter = tx_ring->adapter;
1062
1063         if (buffer_info->dma) {
1064                 if (buffer_info->mapped_as_page)
1065                         dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1066                                        buffer_info->length, DMA_TO_DEVICE);
1067                 else
1068                         dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1069                                          buffer_info->length, DMA_TO_DEVICE);
1070                 buffer_info->dma = 0;
1071         }
1072         if (buffer_info->skb) {
1073                 if (drop)
1074                         dev_kfree_skb_any(buffer_info->skb);
1075                 else
1076                         dev_consume_skb_any(buffer_info->skb);
1077                 buffer_info->skb = NULL;
1078         }
1079         buffer_info->time_stamp = 0;
1080 }
1081
1082 static void e1000_print_hw_hang(struct work_struct *work)
1083 {
1084         struct e1000_adapter *adapter = container_of(work,
1085                                                      struct e1000_adapter,
1086                                                      print_hang_task);
1087         struct net_device *netdev = adapter->netdev;
1088         struct e1000_ring *tx_ring = adapter->tx_ring;
1089         unsigned int i = tx_ring->next_to_clean;
1090         unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1091         struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1092         struct e1000_hw *hw = &adapter->hw;
1093         u16 phy_status, phy_1000t_status, phy_ext_status;
1094         u16 pci_status;
1095
1096         if (test_bit(__E1000_DOWN, &adapter->state))
1097                 return;
1098
1099         if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1100                 /* May be block on write-back, flush and detect again
1101                  * flush pending descriptor writebacks to memory
1102                  */
1103                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1104                 /* execute the writes immediately */
1105                 e1e_flush();
1106                 /* Due to rare timing issues, write to TIDV again to ensure
1107                  * the write is successful
1108                  */
1109                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1110                 /* execute the writes immediately */
1111                 e1e_flush();
1112                 adapter->tx_hang_recheck = true;
1113                 return;
1114         }
1115         adapter->tx_hang_recheck = false;
1116
1117         if (er32(TDH(0)) == er32(TDT(0))) {
1118                 e_dbg("false hang detected, ignoring\n");
1119                 return;
1120         }
1121
1122         /* Real hang detected */
1123         netif_stop_queue(netdev);
1124
1125         e1e_rphy(hw, MII_BMSR, &phy_status);
1126         e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1127         e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1128
1129         pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1130
1131         /* detected Hardware unit hang */
1132         e_err("Detected Hardware Unit Hang:\n"
1133               "  TDH                  <%x>\n"
1134               "  TDT                  <%x>\n"
1135               "  next_to_use          <%x>\n"
1136               "  next_to_clean        <%x>\n"
1137               "buffer_info[next_to_clean]:\n"
1138               "  time_stamp           <%lx>\n"
1139               "  next_to_watch        <%x>\n"
1140               "  jiffies              <%lx>\n"
1141               "  next_to_watch.status <%x>\n"
1142               "MAC Status             <%x>\n"
1143               "PHY Status             <%x>\n"
1144               "PHY 1000BASE-T Status  <%x>\n"
1145               "PHY Extended Status    <%x>\n"
1146               "PCI Status             <%x>\n",
1147               readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1148               tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1149               eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1150               phy_status, phy_1000t_status, phy_ext_status, pci_status);
1151
1152         e1000e_dump(adapter);
1153
1154         /* Suggest workaround for known h/w issue */
1155         if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1156                 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1157 }
1158
1159 /**
1160  * e1000e_tx_hwtstamp_work - check for Tx time stamp
1161  * @work: pointer to work struct
1162  *
1163  * This work function polls the TSYNCTXCTL valid bit to determine when a
1164  * timestamp has been taken for the current stored skb.  The timestamp must
1165  * be for this skb because only one such packet is allowed in the queue.
1166  */
1167 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1168 {
1169         struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1170                                                      tx_hwtstamp_work);
1171         struct e1000_hw *hw = &adapter->hw;
1172
1173         if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1174                 struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1175                 struct skb_shared_hwtstamps shhwtstamps;
1176                 u64 txstmp;
1177
1178                 txstmp = er32(TXSTMPL);
1179                 txstmp |= (u64)er32(TXSTMPH) << 32;
1180
1181                 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1182
1183                 /* Clear the global tx_hwtstamp_skb pointer and force writes
1184                  * prior to notifying the stack of a Tx timestamp.
1185                  */
1186                 adapter->tx_hwtstamp_skb = NULL;
1187                 wmb(); /* force write prior to skb_tstamp_tx */
1188
1189                 skb_tstamp_tx(skb, &shhwtstamps);
1190                 dev_consume_skb_any(skb);
1191         } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1192                               + adapter->tx_timeout_factor * HZ)) {
1193                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1194                 adapter->tx_hwtstamp_skb = NULL;
1195                 adapter->tx_hwtstamp_timeouts++;
1196                 e_warn("clearing Tx timestamp hang\n");
1197         } else {
1198                 /* reschedule to check later */
1199                 schedule_work(&adapter->tx_hwtstamp_work);
1200         }
1201 }
1202
1203 /**
1204  * e1000_clean_tx_irq - Reclaim resources after transmit completes
1205  * @tx_ring: Tx descriptor ring
1206  *
1207  * the return value indicates whether actual cleaning was done, there
1208  * is no guarantee that everything was cleaned
1209  **/
1210 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1211 {
1212         struct e1000_adapter *adapter = tx_ring->adapter;
1213         struct net_device *netdev = adapter->netdev;
1214         struct e1000_hw *hw = &adapter->hw;
1215         struct e1000_tx_desc *tx_desc, *eop_desc;
1216         struct e1000_buffer *buffer_info;
1217         unsigned int i, eop;
1218         unsigned int count = 0;
1219         unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1220         unsigned int bytes_compl = 0, pkts_compl = 0;
1221
1222         i = tx_ring->next_to_clean;
1223         eop = tx_ring->buffer_info[i].next_to_watch;
1224         eop_desc = E1000_TX_DESC(*tx_ring, eop);
1225
1226         while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1227                (count < tx_ring->count)) {
1228                 bool cleaned = false;
1229
1230                 dma_rmb();              /* read buffer_info after eop_desc */
1231                 for (; !cleaned; count++) {
1232                         tx_desc = E1000_TX_DESC(*tx_ring, i);
1233                         buffer_info = &tx_ring->buffer_info[i];
1234                         cleaned = (i == eop);
1235
1236                         if (cleaned) {
1237                                 total_tx_packets += buffer_info->segs;
1238                                 total_tx_bytes += buffer_info->bytecount;
1239                                 if (buffer_info->skb) {
1240                                         bytes_compl += buffer_info->skb->len;
1241                                         pkts_compl++;
1242                                 }
1243                         }
1244
1245                         e1000_put_txbuf(tx_ring, buffer_info, false);
1246                         tx_desc->upper.data = 0;
1247
1248                         i++;
1249                         if (i == tx_ring->count)
1250                                 i = 0;
1251                 }
1252
1253                 if (i == tx_ring->next_to_use)
1254                         break;
1255                 eop = tx_ring->buffer_info[i].next_to_watch;
1256                 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1257         }
1258
1259         tx_ring->next_to_clean = i;
1260
1261         netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1262
1263 #define TX_WAKE_THRESHOLD 32
1264         if (count && netif_carrier_ok(netdev) &&
1265             e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1266                 /* Make sure that anybody stopping the queue after this
1267                  * sees the new next_to_clean.
1268                  */
1269                 smp_mb();
1270
1271                 if (netif_queue_stopped(netdev) &&
1272                     !(test_bit(__E1000_DOWN, &adapter->state))) {
1273                         netif_wake_queue(netdev);
1274                         ++adapter->restart_queue;
1275                 }
1276         }
1277
1278         if (adapter->detect_tx_hung) {
1279                 /* Detect a transmit hang in hardware, this serializes the
1280                  * check with the clearing of time_stamp and movement of i
1281                  */
1282                 adapter->detect_tx_hung = false;
1283                 if (tx_ring->buffer_info[i].time_stamp &&
1284                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1285                                + (adapter->tx_timeout_factor * HZ)) &&
1286                     !(er32(STATUS) & E1000_STATUS_TXOFF))
1287                         schedule_work(&adapter->print_hang_task);
1288                 else
1289                         adapter->tx_hang_recheck = false;
1290         }
1291         adapter->total_tx_bytes += total_tx_bytes;
1292         adapter->total_tx_packets += total_tx_packets;
1293         return count < tx_ring->count;
1294 }
1295
1296 /**
1297  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1298  * @rx_ring: Rx descriptor ring
1299  * @work_done: output parameter for indicating completed work
1300  * @work_to_do: how many packets we can clean
1301  *
1302  * the return value indicates whether actual cleaning was done, there
1303  * is no guarantee that everything was cleaned
1304  **/
1305 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1306                                   int work_to_do)
1307 {
1308         struct e1000_adapter *adapter = rx_ring->adapter;
1309         struct e1000_hw *hw = &adapter->hw;
1310         union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1311         struct net_device *netdev = adapter->netdev;
1312         struct pci_dev *pdev = adapter->pdev;
1313         struct e1000_buffer *buffer_info, *next_buffer;
1314         struct e1000_ps_page *ps_page;
1315         struct sk_buff *skb;
1316         unsigned int i, j;
1317         u32 length, staterr;
1318         int cleaned_count = 0;
1319         bool cleaned = false;
1320         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1321
1322         i = rx_ring->next_to_clean;
1323         rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1324         staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1325         buffer_info = &rx_ring->buffer_info[i];
1326
1327         while (staterr & E1000_RXD_STAT_DD) {
1328                 if (*work_done >= work_to_do)
1329                         break;
1330                 (*work_done)++;
1331                 skb = buffer_info->skb;
1332                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1333
1334                 /* in the packet split case this is header only */
1335                 prefetch(skb->data - NET_IP_ALIGN);
1336
1337                 i++;
1338                 if (i == rx_ring->count)
1339                         i = 0;
1340                 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1341                 prefetch(next_rxd);
1342
1343                 next_buffer = &rx_ring->buffer_info[i];
1344
1345                 cleaned = true;
1346                 cleaned_count++;
1347                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1348                                  adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1349                 buffer_info->dma = 0;
1350
1351                 /* see !EOP comment in other Rx routine */
1352                 if (!(staterr & E1000_RXD_STAT_EOP))
1353                         adapter->flags2 |= FLAG2_IS_DISCARDING;
1354
1355                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1356                         e_dbg("Packet Split buffers didn't pick up the full packet\n");
1357                         dev_kfree_skb_irq(skb);
1358                         if (staterr & E1000_RXD_STAT_EOP)
1359                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1360                         goto next_desc;
1361                 }
1362
1363                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1364                              !(netdev->features & NETIF_F_RXALL))) {
1365                         dev_kfree_skb_irq(skb);
1366                         goto next_desc;
1367                 }
1368
1369                 length = le16_to_cpu(rx_desc->wb.middle.length0);
1370
1371                 if (!length) {
1372                         e_dbg("Last part of the packet spanning multiple descriptors\n");
1373                         dev_kfree_skb_irq(skb);
1374                         goto next_desc;
1375                 }
1376
1377                 /* Good Receive */
1378                 skb_put(skb, length);
1379
1380                 {
1381                         /* this looks ugly, but it seems compiler issues make
1382                          * it more efficient than reusing j
1383                          */
1384                         int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1385
1386                         /* page alloc/put takes too long and effects small
1387                          * packet throughput, so unsplit small packets and
1388                          * save the alloc/put only valid in softirq (napi)
1389                          * context to call kmap_*
1390                          */
1391                         if (l1 && (l1 <= copybreak) &&
1392                             ((length + l1) <= adapter->rx_ps_bsize0)) {
1393                                 u8 *vaddr;
1394
1395                                 ps_page = &buffer_info->ps_pages[0];
1396
1397                                 /* there is no documentation about how to call
1398                                  * kmap_atomic, so we can't hold the mapping
1399                                  * very long
1400                                  */
1401                                 dma_sync_single_for_cpu(&pdev->dev,
1402                                                         ps_page->dma,
1403                                                         PAGE_SIZE,
1404                                                         DMA_FROM_DEVICE);
1405                                 vaddr = kmap_atomic(ps_page->page);
1406                                 memcpy(skb_tail_pointer(skb), vaddr, l1);
1407                                 kunmap_atomic(vaddr);
1408                                 dma_sync_single_for_device(&pdev->dev,
1409                                                            ps_page->dma,
1410                                                            PAGE_SIZE,
1411                                                            DMA_FROM_DEVICE);
1412
1413                                 /* remove the CRC */
1414                                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1415                                         if (!(netdev->features & NETIF_F_RXFCS))
1416                                                 l1 -= 4;
1417                                 }
1418
1419                                 skb_put(skb, l1);
1420                                 goto copydone;
1421                         }       /* if */
1422                 }
1423
1424                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1425                         length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1426                         if (!length)
1427                                 break;
1428
1429                         ps_page = &buffer_info->ps_pages[j];
1430                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1431                                        DMA_FROM_DEVICE);
1432                         ps_page->dma = 0;
1433                         skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1434                         ps_page->page = NULL;
1435                         skb->len += length;
1436                         skb->data_len += length;
1437                         skb->truesize += PAGE_SIZE;
1438                 }
1439
1440                 /* strip the ethernet crc, problem is we're using pages now so
1441                  * this whole operation can get a little cpu intensive
1442                  */
1443                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1444                         if (!(netdev->features & NETIF_F_RXFCS))
1445                                 pskb_trim(skb, skb->len - 4);
1446                 }
1447
1448 copydone:
1449                 total_rx_bytes += skb->len;
1450                 total_rx_packets++;
1451
1452                 e1000_rx_checksum(adapter, staterr, skb);
1453
1454                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1455
1456                 if (rx_desc->wb.upper.header_status &
1457                     cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1458                         adapter->rx_hdr_split++;
1459
1460                 e1000_receive_skb(adapter, netdev, skb, staterr,
1461                                   rx_desc->wb.middle.vlan);
1462
1463 next_desc:
1464                 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1465                 buffer_info->skb = NULL;
1466
1467                 /* return some buffers to hardware, one at a time is too slow */
1468                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1469                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1470                                               GFP_ATOMIC);
1471                         cleaned_count = 0;
1472                 }
1473
1474                 /* use prefetched values */
1475                 rx_desc = next_rxd;
1476                 buffer_info = next_buffer;
1477
1478                 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1479         }
1480         rx_ring->next_to_clean = i;
1481
1482         cleaned_count = e1000_desc_unused(rx_ring);
1483         if (cleaned_count)
1484                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1485
1486         adapter->total_rx_bytes += total_rx_bytes;
1487         adapter->total_rx_packets += total_rx_packets;
1488         return cleaned;
1489 }
1490
1491 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1492                                u16 length)
1493 {
1494         bi->page = NULL;
1495         skb->len += length;
1496         skb->data_len += length;
1497         skb->truesize += PAGE_SIZE;
1498 }
1499
1500 /**
1501  * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1502  * @rx_ring: Rx descriptor ring
1503  * @work_done: output parameter for indicating completed work
1504  * @work_to_do: how many packets we can clean
1505  *
1506  * the return value indicates whether actual cleaning was done, there
1507  * is no guarantee that everything was cleaned
1508  **/
1509 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1510                                      int work_to_do)
1511 {
1512         struct e1000_adapter *adapter = rx_ring->adapter;
1513         struct net_device *netdev = adapter->netdev;
1514         struct pci_dev *pdev = adapter->pdev;
1515         union e1000_rx_desc_extended *rx_desc, *next_rxd;
1516         struct e1000_buffer *buffer_info, *next_buffer;
1517         u32 length, staterr;
1518         unsigned int i;
1519         int cleaned_count = 0;
1520         bool cleaned = false;
1521         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1522         struct skb_shared_info *shinfo;
1523
1524         i = rx_ring->next_to_clean;
1525         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1526         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1527         buffer_info = &rx_ring->buffer_info[i];
1528
1529         while (staterr & E1000_RXD_STAT_DD) {
1530                 struct sk_buff *skb;
1531
1532                 if (*work_done >= work_to_do)
1533                         break;
1534                 (*work_done)++;
1535                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1536
1537                 skb = buffer_info->skb;
1538                 buffer_info->skb = NULL;
1539
1540                 ++i;
1541                 if (i == rx_ring->count)
1542                         i = 0;
1543                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1544                 prefetch(next_rxd);
1545
1546                 next_buffer = &rx_ring->buffer_info[i];
1547
1548                 cleaned = true;
1549                 cleaned_count++;
1550                 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1551                                DMA_FROM_DEVICE);
1552                 buffer_info->dma = 0;
1553
1554                 length = le16_to_cpu(rx_desc->wb.upper.length);
1555
1556                 /* errors is only valid for DD + EOP descriptors */
1557                 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1558                              ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1559                               !(netdev->features & NETIF_F_RXALL)))) {
1560                         /* recycle both page and skb */
1561                         buffer_info->skb = skb;
1562                         /* an error means any chain goes out the window too */
1563                         if (rx_ring->rx_skb_top)
1564                                 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1565                         rx_ring->rx_skb_top = NULL;
1566                         goto next_desc;
1567                 }
1568 #define rxtop (rx_ring->rx_skb_top)
1569                 if (!(staterr & E1000_RXD_STAT_EOP)) {
1570                         /* this descriptor is only the beginning (or middle) */
1571                         if (!rxtop) {
1572                                 /* this is the beginning of a chain */
1573                                 rxtop = skb;
1574                                 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1575                                                    0, length);
1576                         } else {
1577                                 /* this is the middle of a chain */
1578                                 shinfo = skb_shinfo(rxtop);
1579                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1580                                                    buffer_info->page, 0,
1581                                                    length);
1582                                 /* re-use the skb, only consumed the page */
1583                                 buffer_info->skb = skb;
1584                         }
1585                         e1000_consume_page(buffer_info, rxtop, length);
1586                         goto next_desc;
1587                 } else {
1588                         if (rxtop) {
1589                                 /* end of the chain */
1590                                 shinfo = skb_shinfo(rxtop);
1591                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1592                                                    buffer_info->page, 0,
1593                                                    length);
1594                                 /* re-use the current skb, we only consumed the
1595                                  * page
1596                                  */
1597                                 buffer_info->skb = skb;
1598                                 skb = rxtop;
1599                                 rxtop = NULL;
1600                                 e1000_consume_page(buffer_info, skb, length);
1601                         } else {
1602                                 /* no chain, got EOP, this buf is the packet
1603                                  * copybreak to save the put_page/alloc_page
1604                                  */
1605                                 if (length <= copybreak &&
1606                                     skb_tailroom(skb) >= length) {
1607                                         u8 *vaddr;
1608                                         vaddr = kmap_atomic(buffer_info->page);
1609                                         memcpy(skb_tail_pointer(skb), vaddr,
1610                                                length);
1611                                         kunmap_atomic(vaddr);
1612                                         /* re-use the page, so don't erase
1613                                          * buffer_info->page
1614                                          */
1615                                         skb_put(skb, length);
1616                                 } else {
1617                                         skb_fill_page_desc(skb, 0,
1618                                                            buffer_info->page, 0,
1619                                                            length);
1620                                         e1000_consume_page(buffer_info, skb,
1621                                                            length);
1622                                 }
1623                         }
1624                 }
1625
1626                 /* Receive Checksum Offload */
1627                 e1000_rx_checksum(adapter, staterr, skb);
1628
1629                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1630
1631                 /* probably a little skewed due to removing CRC */
1632                 total_rx_bytes += skb->len;
1633                 total_rx_packets++;
1634
1635                 /* eth type trans needs skb->data to point to something */
1636                 if (!pskb_may_pull(skb, ETH_HLEN)) {
1637                         e_err("pskb_may_pull failed.\n");
1638                         dev_kfree_skb_irq(skb);
1639                         goto next_desc;
1640                 }
1641
1642                 e1000_receive_skb(adapter, netdev, skb, staterr,
1643                                   rx_desc->wb.upper.vlan);
1644
1645 next_desc:
1646                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1647
1648                 /* return some buffers to hardware, one at a time is too slow */
1649                 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1650                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1651                                               GFP_ATOMIC);
1652                         cleaned_count = 0;
1653                 }
1654
1655                 /* use prefetched values */
1656                 rx_desc = next_rxd;
1657                 buffer_info = next_buffer;
1658
1659                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1660         }
1661         rx_ring->next_to_clean = i;
1662
1663         cleaned_count = e1000_desc_unused(rx_ring);
1664         if (cleaned_count)
1665                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1666
1667         adapter->total_rx_bytes += total_rx_bytes;
1668         adapter->total_rx_packets += total_rx_packets;
1669         return cleaned;
1670 }
1671
1672 /**
1673  * e1000_clean_rx_ring - Free Rx Buffers per Queue
1674  * @rx_ring: Rx descriptor ring
1675  **/
1676 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1677 {
1678         struct e1000_adapter *adapter = rx_ring->adapter;
1679         struct e1000_buffer *buffer_info;
1680         struct e1000_ps_page *ps_page;
1681         struct pci_dev *pdev = adapter->pdev;
1682         unsigned int i, j;
1683
1684         /* Free all the Rx ring sk_buffs */
1685         for (i = 0; i < rx_ring->count; i++) {
1686                 buffer_info = &rx_ring->buffer_info[i];
1687                 if (buffer_info->dma) {
1688                         if (adapter->clean_rx == e1000_clean_rx_irq)
1689                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1690                                                  adapter->rx_buffer_len,
1691                                                  DMA_FROM_DEVICE);
1692                         else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1693                                 dma_unmap_page(&pdev->dev, buffer_info->dma,
1694                                                PAGE_SIZE, DMA_FROM_DEVICE);
1695                         else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1696                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1697                                                  adapter->rx_ps_bsize0,
1698                                                  DMA_FROM_DEVICE);
1699                         buffer_info->dma = 0;
1700                 }
1701
1702                 if (buffer_info->page) {
1703                         put_page(buffer_info->page);
1704                         buffer_info->page = NULL;
1705                 }
1706
1707                 if (buffer_info->skb) {
1708                         dev_kfree_skb(buffer_info->skb);
1709                         buffer_info->skb = NULL;
1710                 }
1711
1712                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1713                         ps_page = &buffer_info->ps_pages[j];
1714                         if (!ps_page->page)
1715                                 break;
1716                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1717                                        DMA_FROM_DEVICE);
1718                         ps_page->dma = 0;
1719                         put_page(ps_page->page);
1720                         ps_page->page = NULL;
1721                 }
1722         }
1723
1724         /* there also may be some cached data from a chained receive */
1725         if (rx_ring->rx_skb_top) {
1726                 dev_kfree_skb(rx_ring->rx_skb_top);
1727                 rx_ring->rx_skb_top = NULL;
1728         }
1729
1730         /* Zero out the descriptor ring */
1731         memset(rx_ring->desc, 0, rx_ring->size);
1732
1733         rx_ring->next_to_clean = 0;
1734         rx_ring->next_to_use = 0;
1735         adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1736 }
1737
1738 static void e1000e_downshift_workaround(struct work_struct *work)
1739 {
1740         struct e1000_adapter *adapter = container_of(work,
1741                                                      struct e1000_adapter,
1742                                                      downshift_task);
1743
1744         if (test_bit(__E1000_DOWN, &adapter->state))
1745                 return;
1746
1747         e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1748 }
1749
1750 /**
1751  * e1000_intr_msi - Interrupt Handler
1752  * @irq: interrupt number
1753  * @data: pointer to a network interface device structure
1754  **/
1755 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1756 {
1757         struct net_device *netdev = data;
1758         struct e1000_adapter *adapter = netdev_priv(netdev);
1759         struct e1000_hw *hw = &adapter->hw;
1760         u32 icr = er32(ICR);
1761
1762         /* read ICR disables interrupts using IAM */
1763         if (icr & E1000_ICR_LSC) {
1764                 hw->mac.get_link_status = true;
1765                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1766                  * disconnect (LSC) before accessing any PHY registers
1767                  */
1768                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1769                     (!(er32(STATUS) & E1000_STATUS_LU)))
1770                         schedule_work(&adapter->downshift_task);
1771
1772                 /* 80003ES2LAN workaround-- For packet buffer work-around on
1773                  * link down event; disable receives here in the ISR and reset
1774                  * adapter in watchdog
1775                  */
1776                 if (netif_carrier_ok(netdev) &&
1777                     adapter->flags & FLAG_RX_NEEDS_RESTART) {
1778                         /* disable receives */
1779                         u32 rctl = er32(RCTL);
1780
1781                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1782                         adapter->flags |= FLAG_RESTART_NOW;
1783                 }
1784                 /* guard against interrupt when we're going down */
1785                 if (!test_bit(__E1000_DOWN, &adapter->state))
1786                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1787         }
1788
1789         /* Reset on uncorrectable ECC error */
1790         if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1791                 u32 pbeccsts = er32(PBECCSTS);
1792
1793                 adapter->corr_errors +=
1794                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1795                 adapter->uncorr_errors +=
1796                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1797                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1798
1799                 /* Do the reset outside of interrupt context */
1800                 schedule_work(&adapter->reset_task);
1801
1802                 /* return immediately since reset is imminent */
1803                 return IRQ_HANDLED;
1804         }
1805
1806         if (napi_schedule_prep(&adapter->napi)) {
1807                 adapter->total_tx_bytes = 0;
1808                 adapter->total_tx_packets = 0;
1809                 adapter->total_rx_bytes = 0;
1810                 adapter->total_rx_packets = 0;
1811                 __napi_schedule(&adapter->napi);
1812         }
1813
1814         return IRQ_HANDLED;
1815 }
1816
1817 /**
1818  * e1000_intr - Interrupt Handler
1819  * @irq: interrupt number
1820  * @data: pointer to a network interface device structure
1821  **/
1822 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1823 {
1824         struct net_device *netdev = data;
1825         struct e1000_adapter *adapter = netdev_priv(netdev);
1826         struct e1000_hw *hw = &adapter->hw;
1827         u32 rctl, icr = er32(ICR);
1828
1829         if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1830                 return IRQ_NONE;        /* Not our interrupt */
1831
1832         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1833          * not set, then the adapter didn't send an interrupt
1834          */
1835         if (!(icr & E1000_ICR_INT_ASSERTED))
1836                 return IRQ_NONE;
1837
1838         /* Interrupt Auto-Mask...upon reading ICR,
1839          * interrupts are masked.  No need for the
1840          * IMC write
1841          */
1842
1843         if (icr & E1000_ICR_LSC) {
1844                 hw->mac.get_link_status = true;
1845                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1846                  * disconnect (LSC) before accessing any PHY registers
1847                  */
1848                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1849                     (!(er32(STATUS) & E1000_STATUS_LU)))
1850                         schedule_work(&adapter->downshift_task);
1851
1852                 /* 80003ES2LAN workaround--
1853                  * For packet buffer work-around on link down event;
1854                  * disable receives here in the ISR and
1855                  * reset adapter in watchdog
1856                  */
1857                 if (netif_carrier_ok(netdev) &&
1858                     (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1859                         /* disable receives */
1860                         rctl = er32(RCTL);
1861                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1862                         adapter->flags |= FLAG_RESTART_NOW;
1863                 }
1864                 /* guard against interrupt when we're going down */
1865                 if (!test_bit(__E1000_DOWN, &adapter->state))
1866                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1867         }
1868
1869         /* Reset on uncorrectable ECC error */
1870         if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1871                 u32 pbeccsts = er32(PBECCSTS);
1872
1873                 adapter->corr_errors +=
1874                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1875                 adapter->uncorr_errors +=
1876                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1877                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1878
1879                 /* Do the reset outside of interrupt context */
1880                 schedule_work(&adapter->reset_task);
1881
1882                 /* return immediately since reset is imminent */
1883                 return IRQ_HANDLED;
1884         }
1885
1886         if (napi_schedule_prep(&adapter->napi)) {
1887                 adapter->total_tx_bytes = 0;
1888                 adapter->total_tx_packets = 0;
1889                 adapter->total_rx_bytes = 0;
1890                 adapter->total_rx_packets = 0;
1891                 __napi_schedule(&adapter->napi);
1892         }
1893
1894         return IRQ_HANDLED;
1895 }
1896
1897 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1898 {
1899         struct net_device *netdev = data;
1900         struct e1000_adapter *adapter = netdev_priv(netdev);
1901         struct e1000_hw *hw = &adapter->hw;
1902         u32 icr = er32(ICR);
1903
1904         if (icr & adapter->eiac_mask)
1905                 ew32(ICS, (icr & adapter->eiac_mask));
1906
1907         if (icr & E1000_ICR_LSC) {
1908                 hw->mac.get_link_status = true;
1909                 /* guard against interrupt when we're going down */
1910                 if (!test_bit(__E1000_DOWN, &adapter->state))
1911                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1912         }
1913
1914         if (!test_bit(__E1000_DOWN, &adapter->state))
1915                 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
1916
1917         return IRQ_HANDLED;
1918 }
1919
1920 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1921 {
1922         struct net_device *netdev = data;
1923         struct e1000_adapter *adapter = netdev_priv(netdev);
1924         struct e1000_hw *hw = &adapter->hw;
1925         struct e1000_ring *tx_ring = adapter->tx_ring;
1926
1927         adapter->total_tx_bytes = 0;
1928         adapter->total_tx_packets = 0;
1929
1930         if (!e1000_clean_tx_irq(tx_ring))
1931                 /* Ring was not completely cleaned, so fire another interrupt */
1932                 ew32(ICS, tx_ring->ims_val);
1933
1934         if (!test_bit(__E1000_DOWN, &adapter->state))
1935                 ew32(IMS, adapter->tx_ring->ims_val);
1936
1937         return IRQ_HANDLED;
1938 }
1939
1940 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1941 {
1942         struct net_device *netdev = data;
1943         struct e1000_adapter *adapter = netdev_priv(netdev);
1944         struct e1000_ring *rx_ring = adapter->rx_ring;
1945
1946         /* Write the ITR value calculated at the end of the
1947          * previous interrupt.
1948          */
1949         if (rx_ring->set_itr) {
1950                 u32 itr = rx_ring->itr_val ?
1951                           1000000000 / (rx_ring->itr_val * 256) : 0;
1952
1953                 writel(itr, rx_ring->itr_register);
1954                 rx_ring->set_itr = 0;
1955         }
1956
1957         if (napi_schedule_prep(&adapter->napi)) {
1958                 adapter->total_rx_bytes = 0;
1959                 adapter->total_rx_packets = 0;
1960                 __napi_schedule(&adapter->napi);
1961         }
1962         return IRQ_HANDLED;
1963 }
1964
1965 /**
1966  * e1000_configure_msix - Configure MSI-X hardware
1967  * @adapter: board private structure
1968  *
1969  * e1000_configure_msix sets up the hardware to properly
1970  * generate MSI-X interrupts.
1971  **/
1972 static void e1000_configure_msix(struct e1000_adapter *adapter)
1973 {
1974         struct e1000_hw *hw = &adapter->hw;
1975         struct e1000_ring *rx_ring = adapter->rx_ring;
1976         struct e1000_ring *tx_ring = adapter->tx_ring;
1977         int vector = 0;
1978         u32 ctrl_ext, ivar = 0;
1979
1980         adapter->eiac_mask = 0;
1981
1982         /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1983         if (hw->mac.type == e1000_82574) {
1984                 u32 rfctl = er32(RFCTL);
1985
1986                 rfctl |= E1000_RFCTL_ACK_DIS;
1987                 ew32(RFCTL, rfctl);
1988         }
1989
1990         /* Configure Rx vector */
1991         rx_ring->ims_val = E1000_IMS_RXQ0;
1992         adapter->eiac_mask |= rx_ring->ims_val;
1993         if (rx_ring->itr_val)
1994                 writel(1000000000 / (rx_ring->itr_val * 256),
1995                        rx_ring->itr_register);
1996         else
1997                 writel(1, rx_ring->itr_register);
1998         ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1999
2000         /* Configure Tx vector */
2001         tx_ring->ims_val = E1000_IMS_TXQ0;
2002         vector++;
2003         if (tx_ring->itr_val)
2004                 writel(1000000000 / (tx_ring->itr_val * 256),
2005                        tx_ring->itr_register);
2006         else
2007                 writel(1, tx_ring->itr_register);
2008         adapter->eiac_mask |= tx_ring->ims_val;
2009         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2010
2011         /* set vector for Other Causes, e.g. link changes */
2012         vector++;
2013         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2014         if (rx_ring->itr_val)
2015                 writel(1000000000 / (rx_ring->itr_val * 256),
2016                        hw->hw_addr + E1000_EITR_82574(vector));
2017         else
2018                 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2019
2020         /* Cause Tx interrupts on every write back */
2021         ivar |= BIT(31);
2022
2023         ew32(IVAR, ivar);
2024
2025         /* enable MSI-X PBA support */
2026         ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2027         ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2028         ew32(CTRL_EXT, ctrl_ext);
2029         e1e_flush();
2030 }
2031
2032 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2033 {
2034         if (adapter->msix_entries) {
2035                 pci_disable_msix(adapter->pdev);
2036                 kfree(adapter->msix_entries);
2037                 adapter->msix_entries = NULL;
2038         } else if (adapter->flags & FLAG_MSI_ENABLED) {
2039                 pci_disable_msi(adapter->pdev);
2040                 adapter->flags &= ~FLAG_MSI_ENABLED;
2041         }
2042 }
2043
2044 /**
2045  * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2046  * @adapter: board private structure
2047  *
2048  * Attempt to configure interrupts using the best available
2049  * capabilities of the hardware and kernel.
2050  **/
2051 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2052 {
2053         int err;
2054         int i;
2055
2056         switch (adapter->int_mode) {
2057         case E1000E_INT_MODE_MSIX:
2058                 if (adapter->flags & FLAG_HAS_MSIX) {
2059                         adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2060                         adapter->msix_entries = kcalloc(adapter->num_vectors,
2061                                                         sizeof(struct
2062                                                                msix_entry),
2063                                                         GFP_KERNEL);
2064                         if (adapter->msix_entries) {
2065                                 struct e1000_adapter *a = adapter;
2066
2067                                 for (i = 0; i < adapter->num_vectors; i++)
2068                                         adapter->msix_entries[i].entry = i;
2069
2070                                 err = pci_enable_msix_range(a->pdev,
2071                                                             a->msix_entries,
2072                                                             a->num_vectors,
2073                                                             a->num_vectors);
2074                                 if (err > 0)
2075                                         return;
2076                         }
2077                         /* MSI-X failed, so fall through and try MSI */
2078                         e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
2079                         e1000e_reset_interrupt_capability(adapter);
2080                 }
2081                 adapter->int_mode = E1000E_INT_MODE_MSI;
2082                 fallthrough;
2083         case E1000E_INT_MODE_MSI:
2084                 if (!pci_enable_msi(adapter->pdev)) {
2085                         adapter->flags |= FLAG_MSI_ENABLED;
2086                 } else {
2087                         adapter->int_mode = E1000E_INT_MODE_LEGACY;
2088                         e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
2089                 }
2090                 fallthrough;
2091         case E1000E_INT_MODE_LEGACY:
2092                 /* Don't do anything; this is the system default */
2093                 break;
2094         }
2095
2096         /* store the number of vectors being used */
2097         adapter->num_vectors = 1;
2098 }
2099
2100 /**
2101  * e1000_request_msix - Initialize MSI-X interrupts
2102  * @adapter: board private structure
2103  *
2104  * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2105  * kernel.
2106  **/
2107 static int e1000_request_msix(struct e1000_adapter *adapter)
2108 {
2109         struct net_device *netdev = adapter->netdev;
2110         int err = 0, vector = 0;
2111
2112         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2113                 snprintf(adapter->rx_ring->name,
2114                          sizeof(adapter->rx_ring->name) - 1,
2115                          "%.14s-rx-0", netdev->name);
2116         else
2117                 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2118         err = request_irq(adapter->msix_entries[vector].vector,
2119                           e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2120                           netdev);
2121         if (err)
2122                 return err;
2123         adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2124             E1000_EITR_82574(vector);
2125         adapter->rx_ring->itr_val = adapter->itr;
2126         vector++;
2127
2128         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2129                 snprintf(adapter->tx_ring->name,
2130                          sizeof(adapter->tx_ring->name) - 1,
2131                          "%.14s-tx-0", netdev->name);
2132         else
2133                 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2134         err = request_irq(adapter->msix_entries[vector].vector,
2135                           e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2136                           netdev);
2137         if (err)
2138                 return err;
2139         adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2140             E1000_EITR_82574(vector);
2141         adapter->tx_ring->itr_val = adapter->itr;
2142         vector++;
2143
2144         err = request_irq(adapter->msix_entries[vector].vector,
2145                           e1000_msix_other, 0, netdev->name, netdev);
2146         if (err)
2147                 return err;
2148
2149         e1000_configure_msix(adapter);
2150
2151         return 0;
2152 }
2153
2154 /**
2155  * e1000_request_irq - initialize interrupts
2156  * @adapter: board private structure
2157  *
2158  * Attempts to configure interrupts using the best available
2159  * capabilities of the hardware and kernel.
2160  **/
2161 static int e1000_request_irq(struct e1000_adapter *adapter)
2162 {
2163         struct net_device *netdev = adapter->netdev;
2164         int err;
2165
2166         if (adapter->msix_entries) {
2167                 err = e1000_request_msix(adapter);
2168                 if (!err)
2169                         return err;
2170                 /* fall back to MSI */
2171                 e1000e_reset_interrupt_capability(adapter);
2172                 adapter->int_mode = E1000E_INT_MODE_MSI;
2173                 e1000e_set_interrupt_capability(adapter);
2174         }
2175         if (adapter->flags & FLAG_MSI_ENABLED) {
2176                 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2177                                   netdev->name, netdev);
2178                 if (!err)
2179                         return err;
2180
2181                 /* fall back to legacy interrupt */
2182                 e1000e_reset_interrupt_capability(adapter);
2183                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2184         }
2185
2186         err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2187                           netdev->name, netdev);
2188         if (err)
2189                 e_err("Unable to allocate interrupt, Error: %d\n", err);
2190
2191         return err;
2192 }
2193
2194 static void e1000_free_irq(struct e1000_adapter *adapter)
2195 {
2196         struct net_device *netdev = adapter->netdev;
2197
2198         if (adapter->msix_entries) {
2199                 int vector = 0;
2200
2201                 free_irq(adapter->msix_entries[vector].vector, netdev);
2202                 vector++;
2203
2204                 free_irq(adapter->msix_entries[vector].vector, netdev);
2205                 vector++;
2206
2207                 /* Other Causes interrupt vector */
2208                 free_irq(adapter->msix_entries[vector].vector, netdev);
2209                 return;
2210         }
2211
2212         free_irq(adapter->pdev->irq, netdev);
2213 }
2214
2215 /**
2216  * e1000_irq_disable - Mask off interrupt generation on the NIC
2217  * @adapter: board private structure
2218  **/
2219 static void e1000_irq_disable(struct e1000_adapter *adapter)
2220 {
2221         struct e1000_hw *hw = &adapter->hw;
2222
2223         ew32(IMC, ~0);
2224         if (adapter->msix_entries)
2225                 ew32(EIAC_82574, 0);
2226         e1e_flush();
2227
2228         if (adapter->msix_entries) {
2229                 int i;
2230
2231                 for (i = 0; i < adapter->num_vectors; i++)
2232                         synchronize_irq(adapter->msix_entries[i].vector);
2233         } else {
2234                 synchronize_irq(adapter->pdev->irq);
2235         }
2236 }
2237
2238 /**
2239  * e1000_irq_enable - Enable default interrupt generation settings
2240  * @adapter: board private structure
2241  **/
2242 static void e1000_irq_enable(struct e1000_adapter *adapter)
2243 {
2244         struct e1000_hw *hw = &adapter->hw;
2245
2246         if (adapter->msix_entries) {
2247                 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2248                 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
2249                      IMS_OTHER_MASK);
2250         } else if (hw->mac.type >= e1000_pch_lpt) {
2251                 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2252         } else {
2253                 ew32(IMS, IMS_ENABLE_MASK);
2254         }
2255         e1e_flush();
2256 }
2257
2258 /**
2259  * e1000e_get_hw_control - get control of the h/w from f/w
2260  * @adapter: address of board private structure
2261  *
2262  * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2263  * For ASF and Pass Through versions of f/w this means that
2264  * the driver is loaded. For AMT version (only with 82573)
2265  * of the f/w this means that the network i/f is open.
2266  **/
2267 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2268 {
2269         struct e1000_hw *hw = &adapter->hw;
2270         u32 ctrl_ext;
2271         u32 swsm;
2272
2273         /* Let firmware know the driver has taken over */
2274         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2275                 swsm = er32(SWSM);
2276                 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2277         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2278                 ctrl_ext = er32(CTRL_EXT);
2279                 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2280         }
2281 }
2282
2283 /**
2284  * e1000e_release_hw_control - release control of the h/w to f/w
2285  * @adapter: address of board private structure
2286  *
2287  * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2288  * For ASF and Pass Through versions of f/w this means that the
2289  * driver is no longer loaded. For AMT version (only with 82573) i
2290  * of the f/w this means that the network i/f is closed.
2291  *
2292  **/
2293 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2294 {
2295         struct e1000_hw *hw = &adapter->hw;
2296         u32 ctrl_ext;
2297         u32 swsm;
2298
2299         /* Let firmware taken over control of h/w */
2300         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2301                 swsm = er32(SWSM);
2302                 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2303         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2304                 ctrl_ext = er32(CTRL_EXT);
2305                 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2306         }
2307 }
2308
2309 /**
2310  * e1000_alloc_ring_dma - allocate memory for a ring structure
2311  * @adapter: board private structure
2312  * @ring: ring struct for which to allocate dma
2313  **/
2314 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2315                                 struct e1000_ring *ring)
2316 {
2317         struct pci_dev *pdev = adapter->pdev;
2318
2319         ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2320                                         GFP_KERNEL);
2321         if (!ring->desc)
2322                 return -ENOMEM;
2323
2324         return 0;
2325 }
2326
2327 /**
2328  * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2329  * @tx_ring: Tx descriptor ring
2330  *
2331  * Return 0 on success, negative on failure
2332  **/
2333 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2334 {
2335         struct e1000_adapter *adapter = tx_ring->adapter;
2336         int err = -ENOMEM, size;
2337
2338         size = sizeof(struct e1000_buffer) * tx_ring->count;
2339         tx_ring->buffer_info = vzalloc(size);
2340         if (!tx_ring->buffer_info)
2341                 goto err;
2342
2343         /* round up to nearest 4K */
2344         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2345         tx_ring->size = ALIGN(tx_ring->size, 4096);
2346
2347         err = e1000_alloc_ring_dma(adapter, tx_ring);
2348         if (err)
2349                 goto err;
2350
2351         tx_ring->next_to_use = 0;
2352         tx_ring->next_to_clean = 0;
2353
2354         return 0;
2355 err:
2356         vfree(tx_ring->buffer_info);
2357         e_err("Unable to allocate memory for the transmit descriptor ring\n");
2358         return err;
2359 }
2360
2361 /**
2362  * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2363  * @rx_ring: Rx descriptor ring
2364  *
2365  * Returns 0 on success, negative on failure
2366  **/
2367 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2368 {
2369         struct e1000_adapter *adapter = rx_ring->adapter;
2370         struct e1000_buffer *buffer_info;
2371         int i, size, desc_len, err = -ENOMEM;
2372
2373         size = sizeof(struct e1000_buffer) * rx_ring->count;
2374         rx_ring->buffer_info = vzalloc(size);
2375         if (!rx_ring->buffer_info)
2376                 goto err;
2377
2378         for (i = 0; i < rx_ring->count; i++) {
2379                 buffer_info = &rx_ring->buffer_info[i];
2380                 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2381                                                 sizeof(struct e1000_ps_page),
2382                                                 GFP_KERNEL);
2383                 if (!buffer_info->ps_pages)
2384                         goto err_pages;
2385         }
2386
2387         desc_len = sizeof(union e1000_rx_desc_packet_split);
2388
2389         /* Round up to nearest 4K */
2390         rx_ring->size = rx_ring->count * desc_len;
2391         rx_ring->size = ALIGN(rx_ring->size, 4096);
2392
2393         err = e1000_alloc_ring_dma(adapter, rx_ring);
2394         if (err)
2395                 goto err_pages;
2396
2397         rx_ring->next_to_clean = 0;
2398         rx_ring->next_to_use = 0;
2399         rx_ring->rx_skb_top = NULL;
2400
2401         return 0;
2402
2403 err_pages:
2404         for (i = 0; i < rx_ring->count; i++) {
2405                 buffer_info = &rx_ring->buffer_info[i];
2406                 kfree(buffer_info->ps_pages);
2407         }
2408 err:
2409         vfree(rx_ring->buffer_info);
2410         e_err("Unable to allocate memory for the receive descriptor ring\n");
2411         return err;
2412 }
2413
2414 /**
2415  * e1000_clean_tx_ring - Free Tx Buffers
2416  * @tx_ring: Tx descriptor ring
2417  **/
2418 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2419 {
2420         struct e1000_adapter *adapter = tx_ring->adapter;
2421         struct e1000_buffer *buffer_info;
2422         unsigned long size;
2423         unsigned int i;
2424
2425         for (i = 0; i < tx_ring->count; i++) {
2426                 buffer_info = &tx_ring->buffer_info[i];
2427                 e1000_put_txbuf(tx_ring, buffer_info, false);
2428         }
2429
2430         netdev_reset_queue(adapter->netdev);
2431         size = sizeof(struct e1000_buffer) * tx_ring->count;
2432         memset(tx_ring->buffer_info, 0, size);
2433
2434         memset(tx_ring->desc, 0, tx_ring->size);
2435
2436         tx_ring->next_to_use = 0;
2437         tx_ring->next_to_clean = 0;
2438 }
2439
2440 /**
2441  * e1000e_free_tx_resources - Free Tx Resources per Queue
2442  * @tx_ring: Tx descriptor ring
2443  *
2444  * Free all transmit software resources
2445  **/
2446 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2447 {
2448         struct e1000_adapter *adapter = tx_ring->adapter;
2449         struct pci_dev *pdev = adapter->pdev;
2450
2451         e1000_clean_tx_ring(tx_ring);
2452
2453         vfree(tx_ring->buffer_info);
2454         tx_ring->buffer_info = NULL;
2455
2456         dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2457                           tx_ring->dma);
2458         tx_ring->desc = NULL;
2459 }
2460
2461 /**
2462  * e1000e_free_rx_resources - Free Rx Resources
2463  * @rx_ring: Rx descriptor ring
2464  *
2465  * Free all receive software resources
2466  **/
2467 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2468 {
2469         struct e1000_adapter *adapter = rx_ring->adapter;
2470         struct pci_dev *pdev = adapter->pdev;
2471         int i;
2472
2473         e1000_clean_rx_ring(rx_ring);
2474
2475         for (i = 0; i < rx_ring->count; i++)
2476                 kfree(rx_ring->buffer_info[i].ps_pages);
2477
2478         vfree(rx_ring->buffer_info);
2479         rx_ring->buffer_info = NULL;
2480
2481         dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2482                           rx_ring->dma);
2483         rx_ring->desc = NULL;
2484 }
2485
2486 /**
2487  * e1000_update_itr - update the dynamic ITR value based on statistics
2488  * @itr_setting: current adapter->itr
2489  * @packets: the number of packets during this measurement interval
2490  * @bytes: the number of bytes during this measurement interval
2491  *
2492  *      Stores a new ITR value based on packets and byte
2493  *      counts during the last interrupt.  The advantage of per interrupt
2494  *      computation is faster updates and more accurate ITR for the current
2495  *      traffic pattern.  Constants in this function were computed
2496  *      based on theoretical maximum wire speed and thresholds were set based
2497  *      on testing data as well as attempting to minimize response time
2498  *      while increasing bulk throughput.  This functionality is controlled
2499  *      by the InterruptThrottleRate module parameter.
2500  **/
2501 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2502 {
2503         unsigned int retval = itr_setting;
2504
2505         if (packets == 0)
2506                 return itr_setting;
2507
2508         switch (itr_setting) {
2509         case lowest_latency:
2510                 /* handle TSO and jumbo frames */
2511                 if (bytes / packets > 8000)
2512                         retval = bulk_latency;
2513                 else if ((packets < 5) && (bytes > 512))
2514                         retval = low_latency;
2515                 break;
2516         case low_latency:       /* 50 usec aka 20000 ints/s */
2517                 if (bytes > 10000) {
2518                         /* this if handles the TSO accounting */
2519                         if (bytes / packets > 8000)
2520                                 retval = bulk_latency;
2521                         else if ((packets < 10) || ((bytes / packets) > 1200))
2522                                 retval = bulk_latency;
2523                         else if ((packets > 35))
2524                                 retval = lowest_latency;
2525                 } else if (bytes / packets > 2000) {
2526                         retval = bulk_latency;
2527                 } else if (packets <= 2 && bytes < 512) {
2528                         retval = lowest_latency;
2529                 }
2530                 break;
2531         case bulk_latency:      /* 250 usec aka 4000 ints/s */
2532                 if (bytes > 25000) {
2533                         if (packets > 35)
2534                                 retval = low_latency;
2535                 } else if (bytes < 6000) {
2536                         retval = low_latency;
2537                 }
2538                 break;
2539         }
2540
2541         return retval;
2542 }
2543
2544 static void e1000_set_itr(struct e1000_adapter *adapter)
2545 {
2546         u16 current_itr;
2547         u32 new_itr = adapter->itr;
2548
2549         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2550         if (adapter->link_speed != SPEED_1000) {
2551                 current_itr = 0;
2552                 new_itr = 4000;
2553                 goto set_itr_now;
2554         }
2555
2556         if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2557                 new_itr = 0;
2558                 goto set_itr_now;
2559         }
2560
2561         adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2562                                            adapter->total_tx_packets,
2563                                            adapter->total_tx_bytes);
2564         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2565         if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2566                 adapter->tx_itr = low_latency;
2567
2568         adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2569                                            adapter->total_rx_packets,
2570                                            adapter->total_rx_bytes);
2571         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2572         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2573                 adapter->rx_itr = low_latency;
2574
2575         current_itr = max(adapter->rx_itr, adapter->tx_itr);
2576
2577         /* counts and packets in update_itr are dependent on these numbers */
2578         switch (current_itr) {
2579         case lowest_latency:
2580                 new_itr = 70000;
2581                 break;
2582         case low_latency:
2583                 new_itr = 20000;        /* aka hwitr = ~200 */
2584                 break;
2585         case bulk_latency:
2586                 new_itr = 4000;
2587                 break;
2588         default:
2589                 break;
2590         }
2591
2592 set_itr_now:
2593         if (new_itr != adapter->itr) {
2594                 /* this attempts to bias the interrupt rate towards Bulk
2595                  * by adding intermediate steps when interrupt rate is
2596                  * increasing
2597                  */
2598                 new_itr = new_itr > adapter->itr ?
2599                     min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2600                 adapter->itr = new_itr;
2601                 adapter->rx_ring->itr_val = new_itr;
2602                 if (adapter->msix_entries)
2603                         adapter->rx_ring->set_itr = 1;
2604                 else
2605                         e1000e_write_itr(adapter, new_itr);
2606         }
2607 }
2608
2609 /**
2610  * e1000e_write_itr - write the ITR value to the appropriate registers
2611  * @adapter: address of board private structure
2612  * @itr: new ITR value to program
2613  *
2614  * e1000e_write_itr determines if the adapter is in MSI-X mode
2615  * and, if so, writes the EITR registers with the ITR value.
2616  * Otherwise, it writes the ITR value into the ITR register.
2617  **/
2618 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2619 {
2620         struct e1000_hw *hw = &adapter->hw;
2621         u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2622
2623         if (adapter->msix_entries) {
2624                 int vector;
2625
2626                 for (vector = 0; vector < adapter->num_vectors; vector++)
2627                         writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2628         } else {
2629                 ew32(ITR, new_itr);
2630         }
2631 }
2632
2633 /**
2634  * e1000_alloc_queues - Allocate memory for all rings
2635  * @adapter: board private structure to initialize
2636  **/
2637 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2638 {
2639         int size = sizeof(struct e1000_ring);
2640
2641         adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2642         if (!adapter->tx_ring)
2643                 goto err;
2644         adapter->tx_ring->count = adapter->tx_ring_count;
2645         adapter->tx_ring->adapter = adapter;
2646
2647         adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2648         if (!adapter->rx_ring)
2649                 goto err;
2650         adapter->rx_ring->count = adapter->rx_ring_count;
2651         adapter->rx_ring->adapter = adapter;
2652
2653         return 0;
2654 err:
2655         e_err("Unable to allocate memory for queues\n");
2656         kfree(adapter->rx_ring);
2657         kfree(adapter->tx_ring);
2658         return -ENOMEM;
2659 }
2660
2661 /**
2662  * e1000e_poll - NAPI Rx polling callback
2663  * @napi: struct associated with this polling callback
2664  * @budget: number of packets driver is allowed to process this poll
2665  **/
2666 static int e1000e_poll(struct napi_struct *napi, int budget)
2667 {
2668         struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2669                                                      napi);
2670         struct e1000_hw *hw = &adapter->hw;
2671         struct net_device *poll_dev = adapter->netdev;
2672         int tx_cleaned = 1, work_done = 0;
2673
2674         adapter = netdev_priv(poll_dev);
2675
2676         if (!adapter->msix_entries ||
2677             (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2678                 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2679
2680         adapter->clean_rx(adapter->rx_ring, &work_done, budget);
2681
2682         if (!tx_cleaned || work_done == budget)
2683                 return budget;
2684
2685         /* Exit the polling mode, but don't re-enable interrupts if stack might
2686          * poll us due to busy-polling
2687          */
2688         if (likely(napi_complete_done(napi, work_done))) {
2689                 if (adapter->itr_setting & 3)
2690                         e1000_set_itr(adapter);
2691                 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2692                         if (adapter->msix_entries)
2693                                 ew32(IMS, adapter->rx_ring->ims_val);
2694                         else
2695                                 e1000_irq_enable(adapter);
2696                 }
2697         }
2698
2699         return work_done;
2700 }
2701
2702 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2703                                  __always_unused __be16 proto, u16 vid)
2704 {
2705         struct e1000_adapter *adapter = netdev_priv(netdev);
2706         struct e1000_hw *hw = &adapter->hw;
2707         u32 vfta, index;
2708
2709         /* don't update vlan cookie if already programmed */
2710         if ((adapter->hw.mng_cookie.status &
2711              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2712             (vid == adapter->mng_vlan_id))
2713                 return 0;
2714
2715         /* add VID to filter table */
2716         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2717                 index = (vid >> 5) & 0x7F;
2718                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2719                 vfta |= BIT((vid & 0x1F));
2720                 hw->mac.ops.write_vfta(hw, index, vfta);
2721         }
2722
2723         set_bit(vid, adapter->active_vlans);
2724
2725         return 0;
2726 }
2727
2728 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2729                                   __always_unused __be16 proto, u16 vid)
2730 {
2731         struct e1000_adapter *adapter = netdev_priv(netdev);
2732         struct e1000_hw *hw = &adapter->hw;
2733         u32 vfta, index;
2734
2735         if ((adapter->hw.mng_cookie.status &
2736              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2737             (vid == adapter->mng_vlan_id)) {
2738                 /* release control to f/w */
2739                 e1000e_release_hw_control(adapter);
2740                 return 0;
2741         }
2742
2743         /* remove VID from filter table */
2744         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2745                 index = (vid >> 5) & 0x7F;
2746                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2747                 vfta &= ~BIT((vid & 0x1F));
2748                 hw->mac.ops.write_vfta(hw, index, vfta);
2749         }
2750
2751         clear_bit(vid, adapter->active_vlans);
2752
2753         return 0;
2754 }
2755
2756 /**
2757  * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2758  * @adapter: board private structure to initialize
2759  **/
2760 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2761 {
2762         struct net_device *netdev = adapter->netdev;
2763         struct e1000_hw *hw = &adapter->hw;
2764         u32 rctl;
2765
2766         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2767                 /* disable VLAN receive filtering */
2768                 rctl = er32(RCTL);
2769                 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2770                 ew32(RCTL, rctl);
2771
2772                 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2773                         e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2774                                                adapter->mng_vlan_id);
2775                         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2776                 }
2777         }
2778 }
2779
2780 /**
2781  * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2782  * @adapter: board private structure to initialize
2783  **/
2784 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2785 {
2786         struct e1000_hw *hw = &adapter->hw;
2787         u32 rctl;
2788
2789         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2790                 /* enable VLAN receive filtering */
2791                 rctl = er32(RCTL);
2792                 rctl |= E1000_RCTL_VFE;
2793                 rctl &= ~E1000_RCTL_CFIEN;
2794                 ew32(RCTL, rctl);
2795         }
2796 }
2797
2798 /**
2799  * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2800  * @adapter: board private structure to initialize
2801  **/
2802 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2803 {
2804         struct e1000_hw *hw = &adapter->hw;
2805         u32 ctrl;
2806
2807         /* disable VLAN tag insert/strip */
2808         ctrl = er32(CTRL);
2809         ctrl &= ~E1000_CTRL_VME;
2810         ew32(CTRL, ctrl);
2811 }
2812
2813 /**
2814  * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2815  * @adapter: board private structure to initialize
2816  **/
2817 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2818 {
2819         struct e1000_hw *hw = &adapter->hw;
2820         u32 ctrl;
2821
2822         /* enable VLAN tag insert/strip */
2823         ctrl = er32(CTRL);
2824         ctrl |= E1000_CTRL_VME;
2825         ew32(CTRL, ctrl);
2826 }
2827
2828 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2829 {
2830         struct net_device *netdev = adapter->netdev;
2831         u16 vid = adapter->hw.mng_cookie.vlan_id;
2832         u16 old_vid = adapter->mng_vlan_id;
2833
2834         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2835                 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2836                 adapter->mng_vlan_id = vid;
2837         }
2838
2839         if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2840                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2841 }
2842
2843 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2844 {
2845         u16 vid;
2846
2847         e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2848
2849         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2850             e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2851 }
2852
2853 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2854 {
2855         struct e1000_hw *hw = &adapter->hw;
2856         u32 manc, manc2h, mdef, i, j;
2857
2858         if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2859                 return;
2860
2861         manc = er32(MANC);
2862
2863         /* enable receiving management packets to the host. this will probably
2864          * generate destination unreachable messages from the host OS, but
2865          * the packets will be handled on SMBUS
2866          */
2867         manc |= E1000_MANC_EN_MNG2HOST;
2868         manc2h = er32(MANC2H);
2869
2870         switch (hw->mac.type) {
2871         default:
2872                 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2873                 break;
2874         case e1000_82574:
2875         case e1000_82583:
2876                 /* Check if IPMI pass-through decision filter already exists;
2877                  * if so, enable it.
2878                  */
2879                 for (i = 0, j = 0; i < 8; i++) {
2880                         mdef = er32(MDEF(i));
2881
2882                         /* Ignore filters with anything other than IPMI ports */
2883                         if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2884                                 continue;
2885
2886                         /* Enable this decision filter in MANC2H */
2887                         if (mdef)
2888                                 manc2h |= BIT(i);
2889
2890                         j |= mdef;
2891                 }
2892
2893                 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2894                         break;
2895
2896                 /* Create new decision filter in an empty filter */
2897                 for (i = 0, j = 0; i < 8; i++)
2898                         if (er32(MDEF(i)) == 0) {
2899                                 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2900                                                E1000_MDEF_PORT_664));
2901                                 manc2h |= BIT(1);
2902                                 j++;
2903                                 break;
2904                         }
2905
2906                 if (!j)
2907                         e_warn("Unable to create IPMI pass-through filter\n");
2908                 break;
2909         }
2910
2911         ew32(MANC2H, manc2h);
2912         ew32(MANC, manc);
2913 }
2914
2915 /**
2916  * e1000_configure_tx - Configure Transmit Unit after Reset
2917  * @adapter: board private structure
2918  *
2919  * Configure the Tx unit of the MAC after a reset.
2920  **/
2921 static void e1000_configure_tx(struct e1000_adapter *adapter)
2922 {
2923         struct e1000_hw *hw = &adapter->hw;
2924         struct e1000_ring *tx_ring = adapter->tx_ring;
2925         u64 tdba;
2926         u32 tdlen, tctl, tarc;
2927
2928         /* Setup the HW Tx Head and Tail descriptor pointers */
2929         tdba = tx_ring->dma;
2930         tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2931         ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2932         ew32(TDBAH(0), (tdba >> 32));
2933         ew32(TDLEN(0), tdlen);
2934         ew32(TDH(0), 0);
2935         ew32(TDT(0), 0);
2936         tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2937         tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2938
2939         writel(0, tx_ring->head);
2940         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2941                 e1000e_update_tdt_wa(tx_ring, 0);
2942         else
2943                 writel(0, tx_ring->tail);
2944
2945         /* Set the Tx Interrupt Delay register */
2946         ew32(TIDV, adapter->tx_int_delay);
2947         /* Tx irq moderation */
2948         ew32(TADV, adapter->tx_abs_int_delay);
2949
2950         if (adapter->flags2 & FLAG2_DMA_BURST) {
2951                 u32 txdctl = er32(TXDCTL(0));
2952
2953                 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2954                             E1000_TXDCTL_WTHRESH);
2955                 /* set up some performance related parameters to encourage the
2956                  * hardware to use the bus more efficiently in bursts, depends
2957                  * on the tx_int_delay to be enabled,
2958                  * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2959                  * hthresh = 1 ==> prefetch when one or more available
2960                  * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2961                  * BEWARE: this seems to work but should be considered first if
2962                  * there are Tx hangs or other Tx related bugs
2963                  */
2964                 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2965                 ew32(TXDCTL(0), txdctl);
2966         }
2967         /* erratum work around: set txdctl the same for both queues */
2968         ew32(TXDCTL(1), er32(TXDCTL(0)));
2969
2970         /* Program the Transmit Control Register */
2971         tctl = er32(TCTL);
2972         tctl &= ~E1000_TCTL_CT;
2973         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2974                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2975
2976         if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2977                 tarc = er32(TARC(0));
2978                 /* set the speed mode bit, we'll clear it if we're not at
2979                  * gigabit link later
2980                  */
2981 #define SPEED_MODE_BIT BIT(21)
2982                 tarc |= SPEED_MODE_BIT;
2983                 ew32(TARC(0), tarc);
2984         }
2985
2986         /* errata: program both queues to unweighted RR */
2987         if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2988                 tarc = er32(TARC(0));
2989                 tarc |= 1;
2990                 ew32(TARC(0), tarc);
2991                 tarc = er32(TARC(1));
2992                 tarc |= 1;
2993                 ew32(TARC(1), tarc);
2994         }
2995
2996         /* Setup Transmit Descriptor Settings for eop descriptor */
2997         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2998
2999         /* only set IDE if we are delaying interrupts using the timers */
3000         if (adapter->tx_int_delay)
3001                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3002
3003         /* enable Report Status bit */
3004         adapter->txd_cmd |= E1000_TXD_CMD_RS;
3005
3006         ew32(TCTL, tctl);
3007
3008         hw->mac.ops.config_collision_dist(hw);
3009
3010         /* SPT and KBL Si errata workaround to avoid data corruption */
3011         if (hw->mac.type == e1000_pch_spt) {
3012                 u32 reg_val;
3013
3014                 reg_val = er32(IOSFPC);
3015                 reg_val |= E1000_RCTL_RDMTS_HEX;
3016                 ew32(IOSFPC, reg_val);
3017
3018                 reg_val = er32(TARC(0));
3019                 /* SPT and KBL Si errata workaround to avoid Tx hang.
3020                  * Dropping the number of outstanding requests from
3021                  * 3 to 2 in order to avoid a buffer overrun.
3022                  */
3023                 reg_val &= ~E1000_TARC0_CB_MULTIQ_3_REQ;
3024                 reg_val |= E1000_TARC0_CB_MULTIQ_2_REQ;
3025                 ew32(TARC(0), reg_val);
3026         }
3027 }
3028
3029 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3030                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3031
3032 /**
3033  * e1000_setup_rctl - configure the receive control registers
3034  * @adapter: Board private structure
3035  **/
3036 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3037 {
3038         struct e1000_hw *hw = &adapter->hw;
3039         u32 rctl, rfctl;
3040         u32 pages = 0;
3041
3042         /* Workaround Si errata on PCHx - configure jumbo frame flow.
3043          * If jumbo frames not set, program related MAC/PHY registers
3044          * to h/w defaults
3045          */
3046         if (hw->mac.type >= e1000_pch2lan) {
3047                 s32 ret_val;
3048
3049                 if (adapter->netdev->mtu > ETH_DATA_LEN)
3050                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3051                 else
3052                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3053
3054                 if (ret_val)
3055                         e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3056         }
3057
3058         /* Program MC offset vector base */
3059         rctl = er32(RCTL);
3060         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3061         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3062             E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3063             (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3064
3065         /* Do not Store bad packets */
3066         rctl &= ~E1000_RCTL_SBP;
3067
3068         /* Enable Long Packet receive */
3069         if (adapter->netdev->mtu <= ETH_DATA_LEN)
3070                 rctl &= ~E1000_RCTL_LPE;
3071         else
3072                 rctl |= E1000_RCTL_LPE;
3073
3074         /* Some systems expect that the CRC is included in SMBUS traffic. The
3075          * hardware strips the CRC before sending to both SMBUS (BMC) and to
3076          * host memory when this is enabled
3077          */
3078         if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3079                 rctl |= E1000_RCTL_SECRC;
3080
3081         /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3082         if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3083                 u16 phy_data;
3084
3085                 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3086                 phy_data &= 0xfff8;
3087                 phy_data |= BIT(2);
3088                 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3089
3090                 e1e_rphy(hw, 22, &phy_data);
3091                 phy_data &= 0x0fff;
3092                 phy_data |= BIT(14);
3093                 e1e_wphy(hw, 0x10, 0x2823);
3094                 e1e_wphy(hw, 0x11, 0x0003);
3095                 e1e_wphy(hw, 22, phy_data);
3096         }
3097
3098         /* Setup buffer sizes */
3099         rctl &= ~E1000_RCTL_SZ_4096;
3100         rctl |= E1000_RCTL_BSEX;
3101         switch (adapter->rx_buffer_len) {
3102         case 2048:
3103         default:
3104                 rctl |= E1000_RCTL_SZ_2048;
3105                 rctl &= ~E1000_RCTL_BSEX;
3106                 break;
3107         case 4096:
3108                 rctl |= E1000_RCTL_SZ_4096;
3109                 break;
3110         case 8192:
3111                 rctl |= E1000_RCTL_SZ_8192;
3112                 break;
3113         case 16384:
3114                 rctl |= E1000_RCTL_SZ_16384;
3115                 break;
3116         }
3117
3118         /* Enable Extended Status in all Receive Descriptors */
3119         rfctl = er32(RFCTL);
3120         rfctl |= E1000_RFCTL_EXTEN;
3121         ew32(RFCTL, rfctl);
3122
3123         /* 82571 and greater support packet-split where the protocol
3124          * header is placed in skb->data and the packet data is
3125          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3126          * In the case of a non-split, skb->data is linearly filled,
3127          * followed by the page buffers.  Therefore, skb->data is
3128          * sized to hold the largest protocol header.
3129          *
3130          * allocations using alloc_page take too long for regular MTU
3131          * so only enable packet split for jumbo frames
3132          *
3133          * Using pages when the page size is greater than 16k wastes
3134          * a lot of memory, since we allocate 3 pages at all times
3135          * per packet.
3136          */
3137         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3138         if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3139                 adapter->rx_ps_pages = pages;
3140         else
3141                 adapter->rx_ps_pages = 0;
3142
3143         if (adapter->rx_ps_pages) {
3144                 u32 psrctl = 0;
3145
3146                 /* Enable Packet split descriptors */
3147                 rctl |= E1000_RCTL_DTYP_PS;
3148
3149                 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3150
3151                 switch (adapter->rx_ps_pages) {
3152                 case 3:
3153                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3154                         fallthrough;
3155                 case 2:
3156                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3157                         fallthrough;
3158                 case 1:
3159                         psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3160                         break;
3161                 }
3162
3163                 ew32(PSRCTL, psrctl);
3164         }
3165
3166         /* This is useful for sniffing bad packets. */
3167         if (adapter->netdev->features & NETIF_F_RXALL) {
3168                 /* UPE and MPE will be handled by normal PROMISC logic
3169                  * in e1000e_set_rx_mode
3170                  */
3171                 rctl |= (E1000_RCTL_SBP |       /* Receive bad packets */
3172                          E1000_RCTL_BAM |       /* RX All Bcast Pkts */
3173                          E1000_RCTL_PMCF);      /* RX All MAC Ctrl Pkts */
3174
3175                 rctl &= ~(E1000_RCTL_VFE |      /* Disable VLAN filter */
3176                           E1000_RCTL_DPF |      /* Allow filtered pause */
3177                           E1000_RCTL_CFIEN);    /* Dis VLAN CFIEN Filter */
3178                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3179                  * and that breaks VLANs.
3180                  */
3181         }
3182
3183         ew32(RCTL, rctl);
3184         /* just started the receive unit, no need to restart */
3185         adapter->flags &= ~FLAG_RESTART_NOW;
3186 }
3187
3188 /**
3189  * e1000_configure_rx - Configure Receive Unit after Reset
3190  * @adapter: board private structure
3191  *
3192  * Configure the Rx unit of the MAC after a reset.
3193  **/
3194 static void e1000_configure_rx(struct e1000_adapter *adapter)
3195 {
3196         struct e1000_hw *hw = &adapter->hw;
3197         struct e1000_ring *rx_ring = adapter->rx_ring;
3198         u64 rdba;
3199         u32 rdlen, rctl, rxcsum, ctrl_ext;
3200
3201         if (adapter->rx_ps_pages) {
3202                 /* this is a 32 byte descriptor */
3203                 rdlen = rx_ring->count *
3204                     sizeof(union e1000_rx_desc_packet_split);
3205                 adapter->clean_rx = e1000_clean_rx_irq_ps;
3206                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3207         } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3208                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3209                 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3210                 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3211         } else {
3212                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3213                 adapter->clean_rx = e1000_clean_rx_irq;
3214                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3215         }
3216
3217         /* disable receives while setting up the descriptors */
3218         rctl = er32(RCTL);
3219         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3220                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3221         e1e_flush();
3222         usleep_range(10000, 11000);
3223
3224         if (adapter->flags2 & FLAG2_DMA_BURST) {
3225                 /* set the writeback threshold (only takes effect if the RDTR
3226                  * is set). set GRAN=1 and write back up to 0x4 worth, and
3227                  * enable prefetching of 0x20 Rx descriptors
3228                  * granularity = 01
3229                  * wthresh = 04,
3230                  * hthresh = 04,
3231                  * pthresh = 0x20
3232                  */
3233                 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3234                 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3235         }
3236
3237         /* set the Receive Delay Timer Register */
3238         ew32(RDTR, adapter->rx_int_delay);
3239
3240         /* irq moderation */
3241         ew32(RADV, adapter->rx_abs_int_delay);
3242         if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3243                 e1000e_write_itr(adapter, adapter->itr);
3244
3245         ctrl_ext = er32(CTRL_EXT);
3246         /* Auto-Mask interrupts upon ICR access */
3247         ctrl_ext |= E1000_CTRL_EXT_IAME;
3248         ew32(IAM, 0xffffffff);
3249         ew32(CTRL_EXT, ctrl_ext);
3250         e1e_flush();
3251
3252         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3253          * the Base and Length of the Rx Descriptor Ring
3254          */
3255         rdba = rx_ring->dma;
3256         ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3257         ew32(RDBAH(0), (rdba >> 32));
3258         ew32(RDLEN(0), rdlen);
3259         ew32(RDH(0), 0);
3260         ew32(RDT(0), 0);
3261         rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3262         rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3263
3264         writel(0, rx_ring->head);
3265         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3266                 e1000e_update_rdt_wa(rx_ring, 0);
3267         else
3268                 writel(0, rx_ring->tail);
3269
3270         /* Enable Receive Checksum Offload for TCP and UDP */
3271         rxcsum = er32(RXCSUM);
3272         if (adapter->netdev->features & NETIF_F_RXCSUM)
3273                 rxcsum |= E1000_RXCSUM_TUOFL;
3274         else
3275                 rxcsum &= ~E1000_RXCSUM_TUOFL;
3276         ew32(RXCSUM, rxcsum);
3277
3278         /* With jumbo frames, excessive C-state transition latencies result
3279          * in dropped transactions.
3280          */
3281         if (adapter->netdev->mtu > ETH_DATA_LEN) {
3282                 u32 lat =
3283                     ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3284                      adapter->max_frame_size) * 8 / 1000;
3285
3286                 if (adapter->flags & FLAG_IS_ICH) {
3287                         u32 rxdctl = er32(RXDCTL(0));
3288
3289                         ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8));
3290                 }
3291
3292                 dev_info(&adapter->pdev->dev,
3293                          "Some CPU C-states have been disabled in order to enable jumbo frames\n");
3294                 cpu_latency_qos_update_request(&adapter->pm_qos_req, lat);
3295         } else {
3296                 cpu_latency_qos_update_request(&adapter->pm_qos_req,
3297                                                PM_QOS_DEFAULT_VALUE);
3298         }
3299
3300         /* Enable Receives */
3301         ew32(RCTL, rctl);
3302 }
3303
3304 /**
3305  * e1000e_write_mc_addr_list - write multicast addresses to MTA
3306  * @netdev: network interface device structure
3307  *
3308  * Writes multicast address list to the MTA hash table.
3309  * Returns: -ENOMEM on failure
3310  *                0 on no addresses written
3311  *                X on writing X addresses to MTA
3312  */
3313 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3314 {
3315         struct e1000_adapter *adapter = netdev_priv(netdev);
3316         struct e1000_hw *hw = &adapter->hw;
3317         struct netdev_hw_addr *ha;
3318         u8 *mta_list;
3319         int i;
3320
3321         if (netdev_mc_empty(netdev)) {
3322                 /* nothing to program, so clear mc list */
3323                 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3324                 return 0;
3325         }
3326
3327         mta_list = kcalloc(netdev_mc_count(netdev), ETH_ALEN, GFP_ATOMIC);
3328         if (!mta_list)
3329                 return -ENOMEM;
3330
3331         /* update_mc_addr_list expects a packed array of only addresses. */
3332         i = 0;
3333         netdev_for_each_mc_addr(ha, netdev)
3334             memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3335
3336         hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3337         kfree(mta_list);
3338
3339         return netdev_mc_count(netdev);
3340 }
3341
3342 /**
3343  * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3344  * @netdev: network interface device structure
3345  *
3346  * Writes unicast address list to the RAR table.
3347  * Returns: -ENOMEM on failure/insufficient address space
3348  *                0 on no addresses written
3349  *                X on writing X addresses to the RAR table
3350  **/
3351 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3352 {
3353         struct e1000_adapter *adapter = netdev_priv(netdev);
3354         struct e1000_hw *hw = &adapter->hw;
3355         unsigned int rar_entries;
3356         int count = 0;
3357
3358         rar_entries = hw->mac.ops.rar_get_count(hw);
3359
3360         /* save a rar entry for our hardware address */
3361         rar_entries--;
3362
3363         /* save a rar entry for the LAA workaround */
3364         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3365                 rar_entries--;
3366
3367         /* return ENOMEM indicating insufficient memory for addresses */
3368         if (netdev_uc_count(netdev) > rar_entries)
3369                 return -ENOMEM;
3370
3371         if (!netdev_uc_empty(netdev) && rar_entries) {
3372                 struct netdev_hw_addr *ha;
3373
3374                 /* write the addresses in reverse order to avoid write
3375                  * combining
3376                  */
3377                 netdev_for_each_uc_addr(ha, netdev) {
3378                         int ret_val;
3379
3380                         if (!rar_entries)
3381                                 break;
3382                         ret_val = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3383                         if (ret_val < 0)
3384                                 return -ENOMEM;
3385                         count++;
3386                 }
3387         }
3388
3389         /* zero out the remaining RAR entries not used above */
3390         for (; rar_entries > 0; rar_entries--) {
3391                 ew32(RAH(rar_entries), 0);
3392                 ew32(RAL(rar_entries), 0);
3393         }
3394         e1e_flush();
3395
3396         return count;
3397 }
3398
3399 /**
3400  * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3401  * @netdev: network interface device structure
3402  *
3403  * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3404  * address list or the network interface flags are updated.  This routine is
3405  * responsible for configuring the hardware for proper unicast, multicast,
3406  * promiscuous mode, and all-multi behavior.
3407  **/
3408 static void e1000e_set_rx_mode(struct net_device *netdev)
3409 {
3410         struct e1000_adapter *adapter = netdev_priv(netdev);
3411         struct e1000_hw *hw = &adapter->hw;
3412         u32 rctl;
3413
3414         if (pm_runtime_suspended(netdev->dev.parent))
3415                 return;
3416
3417         /* Check for Promiscuous and All Multicast modes */
3418         rctl = er32(RCTL);
3419
3420         /* clear the affected bits */
3421         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3422
3423         if (netdev->flags & IFF_PROMISC) {
3424                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3425                 /* Do not hardware filter VLANs in promisc mode */
3426                 e1000e_vlan_filter_disable(adapter);
3427         } else {
3428                 int count;
3429
3430                 if (netdev->flags & IFF_ALLMULTI) {
3431                         rctl |= E1000_RCTL_MPE;
3432                 } else {
3433                         /* Write addresses to the MTA, if the attempt fails
3434                          * then we should just turn on promiscuous mode so
3435                          * that we can at least receive multicast traffic
3436                          */
3437                         count = e1000e_write_mc_addr_list(netdev);
3438                         if (count < 0)
3439                                 rctl |= E1000_RCTL_MPE;
3440                 }
3441                 e1000e_vlan_filter_enable(adapter);
3442                 /* Write addresses to available RAR registers, if there is not
3443                  * sufficient space to store all the addresses then enable
3444                  * unicast promiscuous mode
3445                  */
3446                 count = e1000e_write_uc_addr_list(netdev);
3447                 if (count < 0)
3448                         rctl |= E1000_RCTL_UPE;
3449         }
3450
3451         ew32(RCTL, rctl);
3452
3453         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3454                 e1000e_vlan_strip_enable(adapter);
3455         else
3456                 e1000e_vlan_strip_disable(adapter);
3457 }
3458
3459 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3460 {
3461         struct e1000_hw *hw = &adapter->hw;
3462         u32 mrqc, rxcsum;
3463         u32 rss_key[10];
3464         int i;
3465
3466         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3467         for (i = 0; i < 10; i++)
3468                 ew32(RSSRK(i), rss_key[i]);
3469
3470         /* Direct all traffic to queue 0 */
3471         for (i = 0; i < 32; i++)
3472                 ew32(RETA(i), 0);
3473
3474         /* Disable raw packet checksumming so that RSS hash is placed in
3475          * descriptor on writeback.
3476          */
3477         rxcsum = er32(RXCSUM);
3478         rxcsum |= E1000_RXCSUM_PCSD;
3479
3480         ew32(RXCSUM, rxcsum);
3481
3482         mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3483                 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3484                 E1000_MRQC_RSS_FIELD_IPV6 |
3485                 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3486                 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3487
3488         ew32(MRQC, mrqc);
3489 }
3490
3491 /**
3492  * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3493  * @adapter: board private structure
3494  * @timinca: pointer to returned time increment attributes
3495  *
3496  * Get attributes for incrementing the System Time Register SYSTIML/H at
3497  * the default base frequency, and set the cyclecounter shift value.
3498  **/
3499 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3500 {
3501         struct e1000_hw *hw = &adapter->hw;
3502         u32 incvalue, incperiod, shift;
3503
3504         /* Make sure clock is enabled on I217/I218/I219  before checking
3505          * the frequency
3506          */
3507         if ((hw->mac.type >= e1000_pch_lpt) &&
3508             !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3509             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3510                 u32 fextnvm7 = er32(FEXTNVM7);
3511
3512                 if (!(fextnvm7 & BIT(0))) {
3513                         ew32(FEXTNVM7, fextnvm7 | BIT(0));
3514                         e1e_flush();
3515                 }
3516         }
3517
3518         switch (hw->mac.type) {
3519         case e1000_pch2lan:
3520                 /* Stable 96MHz frequency */
3521                 incperiod = INCPERIOD_96MHZ;
3522                 incvalue = INCVALUE_96MHZ;
3523                 shift = INCVALUE_SHIFT_96MHZ;
3524                 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3525                 break;
3526         case e1000_pch_lpt:
3527                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3528                         /* Stable 96MHz frequency */
3529                         incperiod = INCPERIOD_96MHZ;
3530                         incvalue = INCVALUE_96MHZ;
3531                         shift = INCVALUE_SHIFT_96MHZ;
3532                         adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3533                 } else {
3534                         /* Stable 25MHz frequency */
3535                         incperiod = INCPERIOD_25MHZ;
3536                         incvalue = INCVALUE_25MHZ;
3537                         shift = INCVALUE_SHIFT_25MHZ;
3538                         adapter->cc.shift = shift;
3539                 }
3540                 break;
3541         case e1000_pch_spt:
3542                 /* Stable 24MHz frequency */
3543                 incperiod = INCPERIOD_24MHZ;
3544                 incvalue = INCVALUE_24MHZ;
3545                 shift = INCVALUE_SHIFT_24MHZ;
3546                 adapter->cc.shift = shift;
3547                 break;
3548         case e1000_pch_cnp:
3549         case e1000_pch_tgp:
3550         case e1000_pch_adp:
3551         case e1000_pch_mtp:
3552                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3553                         /* Stable 24MHz frequency */
3554                         incperiod = INCPERIOD_24MHZ;
3555                         incvalue = INCVALUE_24MHZ;
3556                         shift = INCVALUE_SHIFT_24MHZ;
3557                         adapter->cc.shift = shift;
3558                 } else {
3559                         /* Stable 38400KHz frequency */
3560                         incperiod = INCPERIOD_38400KHZ;
3561                         incvalue = INCVALUE_38400KHZ;
3562                         shift = INCVALUE_SHIFT_38400KHZ;
3563                         adapter->cc.shift = shift;
3564                 }
3565                 break;
3566         case e1000_82574:
3567         case e1000_82583:
3568                 /* Stable 25MHz frequency */
3569                 incperiod = INCPERIOD_25MHZ;
3570                 incvalue = INCVALUE_25MHZ;
3571                 shift = INCVALUE_SHIFT_25MHZ;
3572                 adapter->cc.shift = shift;
3573                 break;
3574         default:
3575                 return -EINVAL;
3576         }
3577
3578         *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3579                     ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3580
3581         return 0;
3582 }
3583
3584 /**
3585  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3586  * @adapter: board private structure
3587  * @config: timestamp configuration
3588  *
3589  * Outgoing time stamping can be enabled and disabled. Play nice and
3590  * disable it when requested, although it shouldn't cause any overhead
3591  * when no packet needs it. At most one packet in the queue may be
3592  * marked for time stamping, otherwise it would be impossible to tell
3593  * for sure to which packet the hardware time stamp belongs.
3594  *
3595  * Incoming time stamping has to be configured via the hardware filters.
3596  * Not all combinations are supported, in particular event type has to be
3597  * specified. Matching the kind of event packet is not supported, with the
3598  * exception of "all V2 events regardless of level 2 or 4".
3599  **/
3600 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3601                                   struct hwtstamp_config *config)
3602 {
3603         struct e1000_hw *hw = &adapter->hw;
3604         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3605         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3606         u32 rxmtrl = 0;
3607         u16 rxudp = 0;
3608         bool is_l4 = false;
3609         bool is_l2 = false;
3610         u32 regval;
3611
3612         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3613                 return -EINVAL;
3614
3615         /* flags reserved for future extensions - must be zero */
3616         if (config->flags)
3617                 return -EINVAL;
3618
3619         switch (config->tx_type) {
3620         case HWTSTAMP_TX_OFF:
3621                 tsync_tx_ctl = 0;
3622                 break;
3623         case HWTSTAMP_TX_ON:
3624                 break;
3625         default:
3626                 return -ERANGE;
3627         }
3628
3629         switch (config->rx_filter) {
3630         case HWTSTAMP_FILTER_NONE:
3631                 tsync_rx_ctl = 0;
3632                 break;
3633         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3634                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3635                 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3636                 is_l4 = true;
3637                 break;
3638         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3639                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3640                 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3641                 is_l4 = true;
3642                 break;
3643         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3644                 /* Also time stamps V2 L2 Path Delay Request/Response */
3645                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3646                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3647                 is_l2 = true;
3648                 break;
3649         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3650                 /* Also time stamps V2 L2 Path Delay Request/Response. */
3651                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3652                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3653                 is_l2 = true;
3654                 break;
3655         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3656                 /* Hardware cannot filter just V2 L4 Sync messages */
3657                 fallthrough;
3658         case HWTSTAMP_FILTER_PTP_V2_SYNC:
3659                 /* Also time stamps V2 Path Delay Request/Response. */
3660                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3661                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3662                 is_l2 = true;
3663                 is_l4 = true;
3664                 break;
3665         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3666                 /* Hardware cannot filter just V2 L4 Delay Request messages */
3667                 fallthrough;
3668         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3669                 /* Also time stamps V2 Path Delay Request/Response. */
3670                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3671                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3672                 is_l2 = true;
3673                 is_l4 = true;
3674                 break;
3675         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3676         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3677                 /* Hardware cannot filter just V2 L4 or L2 Event messages */
3678                 fallthrough;
3679         case HWTSTAMP_FILTER_PTP_V2_EVENT:
3680                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3681                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3682                 is_l2 = true;
3683                 is_l4 = true;
3684                 break;
3685         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3686                 /* For V1, the hardware can only filter Sync messages or
3687                  * Delay Request messages but not both so fall-through to
3688                  * time stamp all packets.
3689                  */
3690                 fallthrough;
3691         case HWTSTAMP_FILTER_NTP_ALL:
3692         case HWTSTAMP_FILTER_ALL:
3693                 is_l2 = true;
3694                 is_l4 = true;
3695                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3696                 config->rx_filter = HWTSTAMP_FILTER_ALL;
3697                 break;
3698         default:
3699                 return -ERANGE;
3700         }
3701
3702         adapter->hwtstamp_config = *config;
3703
3704         /* enable/disable Tx h/w time stamping */
3705         regval = er32(TSYNCTXCTL);
3706         regval &= ~E1000_TSYNCTXCTL_ENABLED;
3707         regval |= tsync_tx_ctl;
3708         ew32(TSYNCTXCTL, regval);
3709         if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3710             (regval & E1000_TSYNCTXCTL_ENABLED)) {
3711                 e_err("Timesync Tx Control register not set as expected\n");
3712                 return -EAGAIN;
3713         }
3714
3715         /* enable/disable Rx h/w time stamping */
3716         regval = er32(TSYNCRXCTL);
3717         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3718         regval |= tsync_rx_ctl;
3719         ew32(TSYNCRXCTL, regval);
3720         if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3721                                  E1000_TSYNCRXCTL_TYPE_MASK)) !=
3722             (regval & (E1000_TSYNCRXCTL_ENABLED |
3723                        E1000_TSYNCRXCTL_TYPE_MASK))) {
3724                 e_err("Timesync Rx Control register not set as expected\n");
3725                 return -EAGAIN;
3726         }
3727
3728         /* L2: define ethertype filter for time stamped packets */
3729         if (is_l2)
3730                 rxmtrl |= ETH_P_1588;
3731
3732         /* define which PTP packets get time stamped */
3733         ew32(RXMTRL, rxmtrl);
3734
3735         /* Filter by destination port */
3736         if (is_l4) {
3737                 rxudp = PTP_EV_PORT;
3738                 cpu_to_be16s(&rxudp);
3739         }
3740         ew32(RXUDP, rxudp);
3741
3742         e1e_flush();
3743
3744         /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3745         er32(RXSTMPH);
3746         er32(TXSTMPH);
3747
3748         return 0;
3749 }
3750
3751 /**
3752  * e1000_configure - configure the hardware for Rx and Tx
3753  * @adapter: private board structure
3754  **/
3755 static void e1000_configure(struct e1000_adapter *adapter)
3756 {
3757         struct e1000_ring *rx_ring = adapter->rx_ring;
3758
3759         e1000e_set_rx_mode(adapter->netdev);
3760
3761         e1000_restore_vlan(adapter);
3762         e1000_init_manageability_pt(adapter);
3763
3764         e1000_configure_tx(adapter);
3765
3766         if (adapter->netdev->features & NETIF_F_RXHASH)
3767                 e1000e_setup_rss_hash(adapter);
3768         e1000_setup_rctl(adapter);
3769         e1000_configure_rx(adapter);
3770         adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3771 }
3772
3773 /**
3774  * e1000e_power_up_phy - restore link in case the phy was powered down
3775  * @adapter: address of board private structure
3776  *
3777  * The phy may be powered down to save power and turn off link when the
3778  * driver is unloaded and wake on lan is not enabled (among others)
3779  * *** this routine MUST be followed by a call to e1000e_reset ***
3780  **/
3781 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3782 {
3783         if (adapter->hw.phy.ops.power_up)
3784                 adapter->hw.phy.ops.power_up(&adapter->hw);
3785
3786         adapter->hw.mac.ops.setup_link(&adapter->hw);
3787 }
3788
3789 /**
3790  * e1000_power_down_phy - Power down the PHY
3791  * @adapter: board private structure
3792  *
3793  * Power down the PHY so no link is implied when interface is down.
3794  * The PHY cannot be powered down if management or WoL is active.
3795  */
3796 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3797 {
3798         if (adapter->hw.phy.ops.power_down)
3799                 adapter->hw.phy.ops.power_down(&adapter->hw);
3800 }
3801
3802 /**
3803  * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3804  * @adapter: board private structure
3805  *
3806  * We want to clear all pending descriptors from the TX ring.
3807  * zeroing happens when the HW reads the regs. We  assign the ring itself as
3808  * the data of the next descriptor. We don't care about the data we are about
3809  * to reset the HW.
3810  */
3811 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3812 {
3813         struct e1000_hw *hw = &adapter->hw;
3814         struct e1000_ring *tx_ring = adapter->tx_ring;
3815         struct e1000_tx_desc *tx_desc = NULL;
3816         u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3817         u16 size = 512;
3818
3819         tctl = er32(TCTL);
3820         ew32(TCTL, tctl | E1000_TCTL_EN);
3821         tdt = er32(TDT(0));
3822         BUG_ON(tdt != tx_ring->next_to_use);
3823         tx_desc =  E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3824         tx_desc->buffer_addr = cpu_to_le64(tx_ring->dma);
3825
3826         tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3827         tx_desc->upper.data = 0;
3828         /* flush descriptors to memory before notifying the HW */
3829         wmb();
3830         tx_ring->next_to_use++;
3831         if (tx_ring->next_to_use == tx_ring->count)
3832                 tx_ring->next_to_use = 0;
3833         ew32(TDT(0), tx_ring->next_to_use);
3834         usleep_range(200, 250);
3835 }
3836
3837 /**
3838  * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3839  * @adapter: board private structure
3840  *
3841  * Mark all descriptors in the RX ring as consumed and disable the rx ring
3842  */
3843 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3844 {
3845         u32 rctl, rxdctl;
3846         struct e1000_hw *hw = &adapter->hw;
3847
3848         rctl = er32(RCTL);
3849         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3850         e1e_flush();
3851         usleep_range(100, 150);
3852
3853         rxdctl = er32(RXDCTL(0));
3854         /* zero the lower 14 bits (prefetch and host thresholds) */
3855         rxdctl &= 0xffffc000;
3856
3857         /* update thresholds: prefetch threshold to 31, host threshold to 1
3858          * and make sure the granularity is "descriptors" and not "cache lines"
3859          */
3860         rxdctl |= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3861
3862         ew32(RXDCTL(0), rxdctl);
3863         /* momentarily enable the RX ring for the changes to take effect */
3864         ew32(RCTL, rctl | E1000_RCTL_EN);
3865         e1e_flush();
3866         usleep_range(100, 150);
3867         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3868 }
3869
3870 /**
3871  * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3872  * @adapter: board private structure
3873  *
3874  * In i219, the descriptor rings must be emptied before resetting the HW
3875  * or before changing the device state to D3 during runtime (runtime PM).
3876  *
3877  * Failure to do this will cause the HW to enter a unit hang state which can
3878  * only be released by PCI reset on the device
3879  *
3880  */
3881
3882 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3883 {
3884         u16 hang_state;
3885         u32 fext_nvm11, tdlen;
3886         struct e1000_hw *hw = &adapter->hw;
3887
3888         /* First, disable MULR fix in FEXTNVM11 */
3889         fext_nvm11 = er32(FEXTNVM11);
3890         fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3891         ew32(FEXTNVM11, fext_nvm11);
3892         /* do nothing if we're not in faulty state, or if the queue is empty */
3893         tdlen = er32(TDLEN(0));
3894         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3895                              &hang_state);
3896         if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3897                 return;
3898         e1000_flush_tx_ring(adapter);
3899         /* recheck, maybe the fault is caused by the rx ring */
3900         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3901                              &hang_state);
3902         if (hang_state & FLUSH_DESC_REQUIRED)
3903                 e1000_flush_rx_ring(adapter);
3904 }
3905
3906 /**
3907  * e1000e_systim_reset - reset the timesync registers after a hardware reset
3908  * @adapter: board private structure
3909  *
3910  * When the MAC is reset, all hardware bits for timesync will be reset to the
3911  * default values. This function will restore the settings last in place.
3912  * Since the clock SYSTIME registers are reset, we will simply restore the
3913  * cyclecounter to the kernel real clock time.
3914  **/
3915 static void e1000e_systim_reset(struct e1000_adapter *adapter)
3916 {
3917         struct ptp_clock_info *info = &adapter->ptp_clock_info;
3918         struct e1000_hw *hw = &adapter->hw;
3919         unsigned long flags;
3920         u32 timinca;
3921         s32 ret_val;
3922
3923         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3924                 return;
3925
3926         if (info->adjfreq) {
3927                 /* restore the previous ptp frequency delta */
3928                 ret_val = info->adjfreq(info, adapter->ptp_delta);
3929         } else {
3930                 /* set the default base frequency if no adjustment possible */
3931                 ret_val = e1000e_get_base_timinca(adapter, &timinca);
3932                 if (!ret_val)
3933                         ew32(TIMINCA, timinca);
3934         }
3935
3936         if (ret_val) {
3937                 dev_warn(&adapter->pdev->dev,
3938                          "Failed to restore TIMINCA clock rate delta: %d\n",
3939                          ret_val);
3940                 return;
3941         }
3942
3943         /* reset the systim ns time counter */
3944         spin_lock_irqsave(&adapter->systim_lock, flags);
3945         timecounter_init(&adapter->tc, &adapter->cc,
3946                          ktime_to_ns(ktime_get_real()));
3947         spin_unlock_irqrestore(&adapter->systim_lock, flags);
3948
3949         /* restore the previous hwtstamp configuration settings */
3950         e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3951 }
3952
3953 /**
3954  * e1000e_reset - bring the hardware into a known good state
3955  * @adapter: board private structure
3956  *
3957  * This function boots the hardware and enables some settings that
3958  * require a configuration cycle of the hardware - those cannot be
3959  * set/changed during runtime. After reset the device needs to be
3960  * properly configured for Rx, Tx etc.
3961  */
3962 void e1000e_reset(struct e1000_adapter *adapter)
3963 {
3964         struct e1000_mac_info *mac = &adapter->hw.mac;
3965         struct e1000_fc_info *fc = &adapter->hw.fc;
3966         struct e1000_hw *hw = &adapter->hw;
3967         u32 tx_space, min_tx_space, min_rx_space;
3968         u32 pba = adapter->pba;
3969         u16 hwm;
3970
3971         /* reset Packet Buffer Allocation to default */
3972         ew32(PBA, pba);
3973
3974         if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3975                 /* To maintain wire speed transmits, the Tx FIFO should be
3976                  * large enough to accommodate two full transmit packets,
3977                  * rounded up to the next 1KB and expressed in KB.  Likewise,
3978                  * the Rx FIFO should be large enough to accommodate at least
3979                  * one full receive packet and is similarly rounded up and
3980                  * expressed in KB.
3981                  */
3982                 pba = er32(PBA);
3983                 /* upper 16 bits has Tx packet buffer allocation size in KB */
3984                 tx_space = pba >> 16;
3985                 /* lower 16 bits has Rx packet buffer allocation size in KB */
3986                 pba &= 0xffff;
3987                 /* the Tx fifo also stores 16 bytes of information about the Tx
3988                  * but don't include ethernet FCS because hardware appends it
3989                  */
3990                 min_tx_space = (adapter->max_frame_size +
3991                                 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3992                 min_tx_space = ALIGN(min_tx_space, 1024);
3993                 min_tx_space >>= 10;
3994                 /* software strips receive CRC, so leave room for it */
3995                 min_rx_space = adapter->max_frame_size;
3996                 min_rx_space = ALIGN(min_rx_space, 1024);
3997                 min_rx_space >>= 10;
3998
3999                 /* If current Tx allocation is less than the min Tx FIFO size,
4000                  * and the min Tx FIFO size is less than the current Rx FIFO
4001                  * allocation, take space away from current Rx allocation
4002                  */
4003                 if ((tx_space < min_tx_space) &&
4004                     ((min_tx_space - tx_space) < pba)) {
4005                         pba -= min_tx_space - tx_space;
4006
4007                         /* if short on Rx space, Rx wins and must trump Tx
4008                          * adjustment
4009                          */
4010                         if (pba < min_rx_space)
4011                                 pba = min_rx_space;
4012                 }
4013
4014                 ew32(PBA, pba);
4015         }
4016
4017         /* flow control settings
4018          *
4019          * The high water mark must be low enough to fit one full frame
4020          * (or the size used for early receive) above it in the Rx FIFO.
4021          * Set it to the lower of:
4022          * - 90% of the Rx FIFO size, and
4023          * - the full Rx FIFO size minus one full frame
4024          */
4025         if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
4026                 fc->pause_time = 0xFFFF;
4027         else
4028                 fc->pause_time = E1000_FC_PAUSE_TIME;
4029         fc->send_xon = true;
4030         fc->current_mode = fc->requested_mode;
4031
4032         switch (hw->mac.type) {
4033         case e1000_ich9lan:
4034         case e1000_ich10lan:
4035                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4036                         pba = 14;
4037                         ew32(PBA, pba);
4038                         fc->high_water = 0x2800;
4039                         fc->low_water = fc->high_water - 8;
4040                         break;
4041                 }
4042                 fallthrough;
4043         default:
4044                 hwm = min(((pba << 10) * 9 / 10),
4045                           ((pba << 10) - adapter->max_frame_size));
4046
4047                 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
4048                 fc->low_water = fc->high_water - 8;
4049                 break;
4050         case e1000_pchlan:
4051                 /* Workaround PCH LOM adapter hangs with certain network
4052                  * loads.  If hangs persist, try disabling Tx flow control.
4053                  */
4054                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4055                         fc->high_water = 0x3500;
4056                         fc->low_water = 0x1500;
4057                 } else {
4058                         fc->high_water = 0x5000;
4059                         fc->low_water = 0x3000;
4060                 }
4061                 fc->refresh_time = 0x1000;
4062                 break;
4063         case e1000_pch2lan:
4064         case e1000_pch_lpt:
4065         case e1000_pch_spt:
4066         case e1000_pch_cnp:
4067         case e1000_pch_tgp:
4068         case e1000_pch_adp:
4069         case e1000_pch_mtp:
4070                 fc->refresh_time = 0xFFFF;
4071                 fc->pause_time = 0xFFFF;
4072
4073                 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4074                         fc->high_water = 0x05C20;
4075                         fc->low_water = 0x05048;
4076                         break;
4077                 }
4078
4079                 pba = 14;
4080                 ew32(PBA, pba);
4081                 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4082                 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4083                 break;
4084         }
4085
4086         /* Alignment of Tx data is on an arbitrary byte boundary with the
4087          * maximum size per Tx descriptor limited only to the transmit
4088          * allocation of the packet buffer minus 96 bytes with an upper
4089          * limit of 24KB due to receive synchronization limitations.
4090          */
4091         adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4092                                        24 << 10);
4093
4094         /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4095          * fit in receive buffer.
4096          */
4097         if (adapter->itr_setting & 0x3) {
4098                 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4099                         if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4100                                 dev_info(&adapter->pdev->dev,
4101                                          "Interrupt Throttle Rate off\n");
4102                                 adapter->flags2 |= FLAG2_DISABLE_AIM;
4103                                 e1000e_write_itr(adapter, 0);
4104                         }
4105                 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4106                         dev_info(&adapter->pdev->dev,
4107                                  "Interrupt Throttle Rate on\n");
4108                         adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4109                         adapter->itr = 20000;
4110                         e1000e_write_itr(adapter, adapter->itr);
4111                 }
4112         }
4113
4114         if (hw->mac.type >= e1000_pch_spt)
4115                 e1000_flush_desc_rings(adapter);
4116         /* Allow time for pending master requests to run */
4117         mac->ops.reset_hw(hw);
4118
4119         /* For parts with AMT enabled, let the firmware know
4120          * that the network interface is in control
4121          */
4122         if (adapter->flags & FLAG_HAS_AMT)
4123                 e1000e_get_hw_control(adapter);
4124
4125         ew32(WUC, 0);
4126
4127         if (mac->ops.init_hw(hw))
4128                 e_err("Hardware Error\n");
4129
4130         e1000_update_mng_vlan(adapter);
4131
4132         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4133         ew32(VET, ETH_P_8021Q);
4134
4135         e1000e_reset_adaptive(hw);
4136
4137         /* restore systim and hwtstamp settings */
4138         e1000e_systim_reset(adapter);
4139
4140         /* Set EEE advertisement as appropriate */
4141         if (adapter->flags2 & FLAG2_HAS_EEE) {
4142                 s32 ret_val;
4143                 u16 adv_addr;
4144
4145                 switch (hw->phy.type) {
4146                 case e1000_phy_82579:
4147                         adv_addr = I82579_EEE_ADVERTISEMENT;
4148                         break;
4149                 case e1000_phy_i217:
4150                         adv_addr = I217_EEE_ADVERTISEMENT;
4151                         break;
4152                 default:
4153                         dev_err(&adapter->pdev->dev,
4154                                 "Invalid PHY type setting EEE advertisement\n");
4155                         return;
4156                 }
4157
4158                 ret_val = hw->phy.ops.acquire(hw);
4159                 if (ret_val) {
4160                         dev_err(&adapter->pdev->dev,
4161                                 "EEE advertisement - unable to acquire PHY\n");
4162                         return;
4163                 }
4164
4165                 e1000_write_emi_reg_locked(hw, adv_addr,
4166                                            hw->dev_spec.ich8lan.eee_disable ?
4167                                            0 : adapter->eee_advert);
4168
4169                 hw->phy.ops.release(hw);
4170         }
4171
4172         if (!netif_running(adapter->netdev) &&
4173             !test_bit(__E1000_TESTING, &adapter->state))
4174                 e1000_power_down_phy(adapter);
4175
4176         e1000_get_phy_info(hw);
4177
4178         if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4179             !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4180                 u16 phy_data = 0;
4181                 /* speed up time to link by disabling smart power down, ignore
4182                  * the return value of this function because there is nothing
4183                  * different we would do if it failed
4184                  */
4185                 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4186                 phy_data &= ~IGP02E1000_PM_SPD;
4187                 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4188         }
4189         if (hw->mac.type >= e1000_pch_spt && adapter->int_mode == 0) {
4190                 u32 reg;
4191
4192                 /* Fextnvm7 @ 0xe4[2] = 1 */
4193                 reg = er32(FEXTNVM7);
4194                 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4195                 ew32(FEXTNVM7, reg);
4196                 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4197                 reg = er32(FEXTNVM9);
4198                 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4199                        E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4200                 ew32(FEXTNVM9, reg);
4201         }
4202
4203 }
4204
4205 /**
4206  * e1000e_trigger_lsc - trigger an LSC interrupt
4207  * @adapter:
4208  *
4209  * Fire a link status change interrupt to start the watchdog.
4210  **/
4211 static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4212 {
4213         struct e1000_hw *hw = &adapter->hw;
4214
4215         if (adapter->msix_entries)
4216                 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
4217         else
4218                 ew32(ICS, E1000_ICS_LSC);
4219 }
4220
4221 void e1000e_up(struct e1000_adapter *adapter)
4222 {
4223         /* hardware has been reset, we need to reload some things */
4224         e1000_configure(adapter);
4225
4226         clear_bit(__E1000_DOWN, &adapter->state);
4227
4228         if (adapter->msix_entries)
4229                 e1000_configure_msix(adapter);
4230         e1000_irq_enable(adapter);
4231
4232         /* Tx queue started by watchdog timer when link is up */
4233
4234         e1000e_trigger_lsc(adapter);
4235 }
4236
4237 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4238 {
4239         struct e1000_hw *hw = &adapter->hw;
4240
4241         if (!(adapter->flags2 & FLAG2_DMA_BURST))
4242                 return;
4243
4244         /* flush pending descriptor writebacks to memory */
4245         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4246         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4247
4248         /* execute the writes immediately */
4249         e1e_flush();
4250
4251         /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4252          * write is successful
4253          */
4254         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4255         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4256
4257         /* execute the writes immediately */
4258         e1e_flush();
4259 }
4260
4261 static void e1000e_update_stats(struct e1000_adapter *adapter);
4262
4263 /**
4264  * e1000e_down - quiesce the device and optionally reset the hardware
4265  * @adapter: board private structure
4266  * @reset: boolean flag to reset the hardware or not
4267  */
4268 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4269 {
4270         struct net_device *netdev = adapter->netdev;
4271         struct e1000_hw *hw = &adapter->hw;
4272         u32 tctl, rctl;
4273
4274         /* signal that we're down so the interrupt handler does not
4275          * reschedule our watchdog timer
4276          */
4277         set_bit(__E1000_DOWN, &adapter->state);
4278
4279         netif_carrier_off(netdev);
4280
4281         /* disable receives in the hardware */
4282         rctl = er32(RCTL);
4283         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4284                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4285         /* flush and sleep below */
4286
4287         netif_stop_queue(netdev);
4288
4289         /* disable transmits in the hardware */
4290         tctl = er32(TCTL);
4291         tctl &= ~E1000_TCTL_EN;
4292         ew32(TCTL, tctl);
4293
4294         /* flush both disables and wait for them to finish */
4295         e1e_flush();
4296         usleep_range(10000, 11000);
4297
4298         e1000_irq_disable(adapter);
4299
4300         napi_synchronize(&adapter->napi);
4301
4302         del_timer_sync(&adapter->watchdog_timer);
4303         del_timer_sync(&adapter->phy_info_timer);
4304
4305         spin_lock(&adapter->stats64_lock);
4306         e1000e_update_stats(adapter);
4307         spin_unlock(&adapter->stats64_lock);
4308
4309         e1000e_flush_descriptors(adapter);
4310
4311         adapter->link_speed = 0;
4312         adapter->link_duplex = 0;
4313
4314         /* Disable Si errata workaround on PCHx for jumbo frame flow */
4315         if ((hw->mac.type >= e1000_pch2lan) &&
4316             (adapter->netdev->mtu > ETH_DATA_LEN) &&
4317             e1000_lv_jumbo_workaround_ich8lan(hw, false))
4318                 e_dbg("failed to disable jumbo frame workaround mode\n");
4319
4320         if (!pci_channel_offline(adapter->pdev)) {
4321                 if (reset)
4322                         e1000e_reset(adapter);
4323                 else if (hw->mac.type >= e1000_pch_spt)
4324                         e1000_flush_desc_rings(adapter);
4325         }
4326         e1000_clean_tx_ring(adapter->tx_ring);
4327         e1000_clean_rx_ring(adapter->rx_ring);
4328 }
4329
4330 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4331 {
4332         might_sleep();
4333         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4334                 usleep_range(1000, 1100);
4335         e1000e_down(adapter, true);
4336         e1000e_up(adapter);
4337         clear_bit(__E1000_RESETTING, &adapter->state);
4338 }
4339
4340 /**
4341  * e1000e_sanitize_systim - sanitize raw cycle counter reads
4342  * @hw: pointer to the HW structure
4343  * @systim: PHC time value read, sanitized and returned
4344  * @sts: structure to hold system time before and after reading SYSTIML,
4345  * may be NULL
4346  *
4347  * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4348  * check to see that the time is incrementing at a reasonable
4349  * rate and is a multiple of incvalue.
4350  **/
4351 static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim,
4352                                   struct ptp_system_timestamp *sts)
4353 {
4354         u64 time_delta, rem, temp;
4355         u64 systim_next;
4356         u32 incvalue;
4357         int i;
4358
4359         incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4360         for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4361                 /* latch SYSTIMH on read of SYSTIML */
4362                 ptp_read_system_prets(sts);
4363                 systim_next = (u64)er32(SYSTIML);
4364                 ptp_read_system_postts(sts);
4365                 systim_next |= (u64)er32(SYSTIMH) << 32;
4366
4367                 time_delta = systim_next - systim;
4368                 temp = time_delta;
4369                 /* VMWare users have seen incvalue of zero, don't div / 0 */
4370                 rem = incvalue ? do_div(temp, incvalue) : (time_delta != 0);
4371
4372                 systim = systim_next;
4373
4374                 if ((time_delta < E1000_82574_SYSTIM_EPSILON) && (rem == 0))
4375                         break;
4376         }
4377
4378         return systim;
4379 }
4380
4381 /**
4382  * e1000e_read_systim - read SYSTIM register
4383  * @adapter: board private structure
4384  * @sts: structure which will contain system time before and after reading
4385  * SYSTIML, may be NULL
4386  **/
4387 u64 e1000e_read_systim(struct e1000_adapter *adapter,
4388                        struct ptp_system_timestamp *sts)
4389 {
4390         struct e1000_hw *hw = &adapter->hw;
4391         u32 systimel, systimel_2, systimeh;
4392         u64 systim;
4393         /* SYSTIMH latching upon SYSTIML read does not work well.
4394          * This means that if SYSTIML overflows after we read it but before
4395          * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4396          * will experience a huge non linear increment in the systime value
4397          * to fix that we test for overflow and if true, we re-read systime.
4398          */
4399         ptp_read_system_prets(sts);
4400         systimel = er32(SYSTIML);
4401         ptp_read_system_postts(sts);
4402         systimeh = er32(SYSTIMH);
4403         /* Is systimel is so large that overflow is possible? */
4404         if (systimel >= (u32)0xffffffff - E1000_TIMINCA_INCVALUE_MASK) {
4405                 ptp_read_system_prets(sts);
4406                 systimel_2 = er32(SYSTIML);
4407                 ptp_read_system_postts(sts);
4408                 if (systimel > systimel_2) {
4409                         /* There was an overflow, read again SYSTIMH, and use
4410                          * systimel_2
4411                          */
4412                         systimeh = er32(SYSTIMH);
4413                         systimel = systimel_2;
4414                 }
4415         }
4416         systim = (u64)systimel;
4417         systim |= (u64)systimeh << 32;
4418
4419         if (adapter->flags2 & FLAG2_CHECK_SYSTIM_OVERFLOW)
4420                 systim = e1000e_sanitize_systim(hw, systim, sts);
4421
4422         return systim;
4423 }
4424
4425 /**
4426  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4427  * @cc: cyclecounter structure
4428  **/
4429 static u64 e1000e_cyclecounter_read(const struct cyclecounter *cc)
4430 {
4431         struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4432                                                      cc);
4433
4434         return e1000e_read_systim(adapter, NULL);
4435 }
4436
4437 /**
4438  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4439  * @adapter: board private structure to initialize
4440  *
4441  * e1000_sw_init initializes the Adapter private data structure.
4442  * Fields are initialized based on PCI device information and
4443  * OS network device settings (MTU size).
4444  **/
4445 static int e1000_sw_init(struct e1000_adapter *adapter)
4446 {
4447         struct net_device *netdev = adapter->netdev;
4448
4449         adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4450         adapter->rx_ps_bsize0 = 128;
4451         adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4452         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4453         adapter->tx_ring_count = E1000_DEFAULT_TXD;
4454         adapter->rx_ring_count = E1000_DEFAULT_RXD;
4455
4456         spin_lock_init(&adapter->stats64_lock);
4457
4458         e1000e_set_interrupt_capability(adapter);
4459
4460         if (e1000_alloc_queues(adapter))
4461                 return -ENOMEM;
4462
4463         /* Setup hardware time stamping cyclecounter */
4464         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4465                 adapter->cc.read = e1000e_cyclecounter_read;
4466                 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4467                 adapter->cc.mult = 1;
4468                 /* cc.shift set in e1000e_get_base_tininca() */
4469
4470                 spin_lock_init(&adapter->systim_lock);
4471                 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4472         }
4473
4474         /* Explicitly disable IRQ since the NIC can be in any state. */
4475         e1000_irq_disable(adapter);
4476
4477         set_bit(__E1000_DOWN, &adapter->state);
4478         return 0;
4479 }
4480
4481 /**
4482  * e1000_intr_msi_test - Interrupt Handler
4483  * @irq: interrupt number
4484  * @data: pointer to a network interface device structure
4485  **/
4486 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4487 {
4488         struct net_device *netdev = data;
4489         struct e1000_adapter *adapter = netdev_priv(netdev);
4490         struct e1000_hw *hw = &adapter->hw;
4491         u32 icr = er32(ICR);
4492
4493         e_dbg("icr is %08X\n", icr);
4494         if (icr & E1000_ICR_RXSEQ) {
4495                 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4496                 /* Force memory writes to complete before acknowledging the
4497                  * interrupt is handled.
4498                  */
4499                 wmb();
4500         }
4501
4502         return IRQ_HANDLED;
4503 }
4504
4505 /**
4506  * e1000_test_msi_interrupt - Returns 0 for successful test
4507  * @adapter: board private struct
4508  *
4509  * code flow taken from tg3.c
4510  **/
4511 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4512 {
4513         struct net_device *netdev = adapter->netdev;
4514         struct e1000_hw *hw = &adapter->hw;
4515         int err;
4516
4517         /* poll_enable hasn't been called yet, so don't need disable */
4518         /* clear any pending events */
4519         er32(ICR);
4520
4521         /* free the real vector and request a test handler */
4522         e1000_free_irq(adapter);
4523         e1000e_reset_interrupt_capability(adapter);
4524
4525         /* Assume that the test fails, if it succeeds then the test
4526          * MSI irq handler will unset this flag
4527          */
4528         adapter->flags |= FLAG_MSI_TEST_FAILED;
4529
4530         err = pci_enable_msi(adapter->pdev);
4531         if (err)
4532                 goto msi_test_failed;
4533
4534         err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4535                           netdev->name, netdev);
4536         if (err) {
4537                 pci_disable_msi(adapter->pdev);
4538                 goto msi_test_failed;
4539         }
4540
4541         /* Force memory writes to complete before enabling and firing an
4542          * interrupt.
4543          */
4544         wmb();
4545
4546         e1000_irq_enable(adapter);
4547
4548         /* fire an unusual interrupt on the test handler */
4549         ew32(ICS, E1000_ICS_RXSEQ);
4550         e1e_flush();
4551         msleep(100);
4552
4553         e1000_irq_disable(adapter);
4554
4555         rmb();                  /* read flags after interrupt has been fired */
4556
4557         if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4558                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4559                 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4560         } else {
4561                 e_dbg("MSI interrupt test succeeded!\n");
4562         }
4563
4564         free_irq(adapter->pdev->irq, netdev);
4565         pci_disable_msi(adapter->pdev);
4566
4567 msi_test_failed:
4568         e1000e_set_interrupt_capability(adapter);
4569         return e1000_request_irq(adapter);
4570 }
4571
4572 /**
4573  * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4574  * @adapter: board private struct
4575  *
4576  * code flow taken from tg3.c, called with e1000 interrupts disabled.
4577  **/
4578 static int e1000_test_msi(struct e1000_adapter *adapter)
4579 {
4580         int err;
4581         u16 pci_cmd;
4582
4583         if (!(adapter->flags & FLAG_MSI_ENABLED))
4584                 return 0;
4585
4586         /* disable SERR in case the MSI write causes a master abort */
4587         pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4588         if (pci_cmd & PCI_COMMAND_SERR)
4589                 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4590                                       pci_cmd & ~PCI_COMMAND_SERR);
4591
4592         err = e1000_test_msi_interrupt(adapter);
4593
4594         /* re-enable SERR */
4595         if (pci_cmd & PCI_COMMAND_SERR) {
4596                 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4597                 pci_cmd |= PCI_COMMAND_SERR;
4598                 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4599         }
4600
4601         return err;
4602 }
4603
4604 /**
4605  * e1000e_open - Called when a network interface is made active
4606  * @netdev: network interface device structure
4607  *
4608  * Returns 0 on success, negative value on failure
4609  *
4610  * The open entry point is called when a network interface is made
4611  * active by the system (IFF_UP).  At this point all resources needed
4612  * for transmit and receive operations are allocated, the interrupt
4613  * handler is registered with the OS, the watchdog timer is started,
4614  * and the stack is notified that the interface is ready.
4615  **/
4616 int e1000e_open(struct net_device *netdev)
4617 {
4618         struct e1000_adapter *adapter = netdev_priv(netdev);
4619         struct e1000_hw *hw = &adapter->hw;
4620         struct pci_dev *pdev = adapter->pdev;
4621         int err;
4622
4623         /* disallow open during test */
4624         if (test_bit(__E1000_TESTING, &adapter->state))
4625                 return -EBUSY;
4626
4627         pm_runtime_get_sync(&pdev->dev);
4628
4629         netif_carrier_off(netdev);
4630         netif_stop_queue(netdev);
4631
4632         /* allocate transmit descriptors */
4633         err = e1000e_setup_tx_resources(adapter->tx_ring);
4634         if (err)
4635                 goto err_setup_tx;
4636
4637         /* allocate receive descriptors */
4638         err = e1000e_setup_rx_resources(adapter->rx_ring);
4639         if (err)
4640                 goto err_setup_rx;
4641
4642         /* If AMT is enabled, let the firmware know that the network
4643          * interface is now open and reset the part to a known state.
4644          */
4645         if (adapter->flags & FLAG_HAS_AMT) {
4646                 e1000e_get_hw_control(adapter);
4647                 e1000e_reset(adapter);
4648         }
4649
4650         e1000e_power_up_phy(adapter);
4651
4652         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4653         if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4654                 e1000_update_mng_vlan(adapter);
4655
4656         /* DMA latency requirement to workaround jumbo issue */
4657         cpu_latency_qos_add_request(&adapter->pm_qos_req, PM_QOS_DEFAULT_VALUE);
4658
4659         /* before we allocate an interrupt, we must be ready to handle it.
4660          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4661          * as soon as we call pci_request_irq, so we have to setup our
4662          * clean_rx handler before we do so.
4663          */
4664         e1000_configure(adapter);
4665
4666         err = e1000_request_irq(adapter);
4667         if (err)
4668                 goto err_req_irq;
4669
4670         /* Work around PCIe errata with MSI interrupts causing some chipsets to
4671          * ignore e1000e MSI messages, which means we need to test our MSI
4672          * interrupt now
4673          */
4674         if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4675                 err = e1000_test_msi(adapter);
4676                 if (err) {
4677                         e_err("Interrupt allocation failed\n");
4678                         goto err_req_irq;
4679                 }
4680         }
4681
4682         /* From here on the code is the same as e1000e_up() */
4683         clear_bit(__E1000_DOWN, &adapter->state);
4684
4685         napi_enable(&adapter->napi);
4686
4687         e1000_irq_enable(adapter);
4688
4689         adapter->tx_hang_recheck = false;
4690
4691         hw->mac.get_link_status = true;
4692         pm_runtime_put(&pdev->dev);
4693
4694         e1000e_trigger_lsc(adapter);
4695
4696         return 0;
4697
4698 err_req_irq:
4699         cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4700         e1000e_release_hw_control(adapter);
4701         e1000_power_down_phy(adapter);
4702         e1000e_free_rx_resources(adapter->rx_ring);
4703 err_setup_rx:
4704         e1000e_free_tx_resources(adapter->tx_ring);
4705 err_setup_tx:
4706         e1000e_reset(adapter);
4707         pm_runtime_put_sync(&pdev->dev);
4708
4709         return err;
4710 }
4711
4712 /**
4713  * e1000e_close - Disables a network interface
4714  * @netdev: network interface device structure
4715  *
4716  * Returns 0, this is not allowed to fail
4717  *
4718  * The close entry point is called when an interface is de-activated
4719  * by the OS.  The hardware is still under the drivers control, but
4720  * needs to be disabled.  A global MAC reset is issued to stop the
4721  * hardware, and all transmit and receive resources are freed.
4722  **/
4723 int e1000e_close(struct net_device *netdev)
4724 {
4725         struct e1000_adapter *adapter = netdev_priv(netdev);
4726         struct pci_dev *pdev = adapter->pdev;
4727         int count = E1000_CHECK_RESET_COUNT;
4728
4729         while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4730                 usleep_range(10000, 11000);
4731
4732         WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4733
4734         pm_runtime_get_sync(&pdev->dev);
4735
4736         if (netif_device_present(netdev)) {
4737                 e1000e_down(adapter, true);
4738                 e1000_free_irq(adapter);
4739
4740                 /* Link status message must follow this format */
4741                 netdev_info(netdev, "NIC Link is Down\n");
4742         }
4743
4744         napi_disable(&adapter->napi);
4745
4746         e1000e_free_tx_resources(adapter->tx_ring);
4747         e1000e_free_rx_resources(adapter->rx_ring);
4748
4749         /* kill manageability vlan ID if supported, but not if a vlan with
4750          * the same ID is registered on the host OS (let 8021q kill it)
4751          */
4752         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4753                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4754                                        adapter->mng_vlan_id);
4755
4756         /* If AMT is enabled, let the firmware know that the network
4757          * interface is now closed
4758          */
4759         if ((adapter->flags & FLAG_HAS_AMT) &&
4760             !test_bit(__E1000_TESTING, &adapter->state))
4761                 e1000e_release_hw_control(adapter);
4762
4763         cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4764
4765         pm_runtime_put_sync(&pdev->dev);
4766
4767         return 0;
4768 }
4769
4770 /**
4771  * e1000_set_mac - Change the Ethernet Address of the NIC
4772  * @netdev: network interface device structure
4773  * @p: pointer to an address structure
4774  *
4775  * Returns 0 on success, negative on failure
4776  **/
4777 static int e1000_set_mac(struct net_device *netdev, void *p)
4778 {
4779         struct e1000_adapter *adapter = netdev_priv(netdev);
4780         struct e1000_hw *hw = &adapter->hw;
4781         struct sockaddr *addr = p;
4782
4783         if (!is_valid_ether_addr(addr->sa_data))
4784                 return -EADDRNOTAVAIL;
4785
4786         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4787         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4788
4789         hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4790
4791         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4792                 /* activate the work around */
4793                 e1000e_set_laa_state_82571(&adapter->hw, 1);
4794
4795                 /* Hold a copy of the LAA in RAR[14] This is done so that
4796                  * between the time RAR[0] gets clobbered  and the time it
4797                  * gets fixed (in e1000_watchdog), the actual LAA is in one
4798                  * of the RARs and no incoming packets directed to this port
4799                  * are dropped. Eventually the LAA will be in RAR[0] and
4800                  * RAR[14]
4801                  */
4802                 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4803                                     adapter->hw.mac.rar_entry_count - 1);
4804         }
4805
4806         return 0;
4807 }
4808
4809 /**
4810  * e1000e_update_phy_task - work thread to update phy
4811  * @work: pointer to our work struct
4812  *
4813  * this worker thread exists because we must acquire a
4814  * semaphore to read the phy, which we could msleep while
4815  * waiting for it, and we can't msleep in a timer.
4816  **/
4817 static void e1000e_update_phy_task(struct work_struct *work)
4818 {
4819         struct e1000_adapter *adapter = container_of(work,
4820                                                      struct e1000_adapter,
4821                                                      update_phy_task);
4822         struct e1000_hw *hw = &adapter->hw;
4823
4824         if (test_bit(__E1000_DOWN, &adapter->state))
4825                 return;
4826
4827         e1000_get_phy_info(hw);
4828
4829         /* Enable EEE on 82579 after link up */
4830         if (hw->phy.type >= e1000_phy_82579)
4831                 e1000_set_eee_pchlan(hw);
4832 }
4833
4834 /**
4835  * e1000_update_phy_info - timre call-back to update PHY info
4836  * @t: pointer to timer_list containing private info adapter
4837  *
4838  * Need to wait a few seconds after link up to get diagnostic information from
4839  * the phy
4840  **/
4841 static void e1000_update_phy_info(struct timer_list *t)
4842 {
4843         struct e1000_adapter *adapter = from_timer(adapter, t, phy_info_timer);
4844
4845         if (test_bit(__E1000_DOWN, &adapter->state))
4846                 return;
4847
4848         schedule_work(&adapter->update_phy_task);
4849 }
4850
4851 /**
4852  * e1000e_update_phy_stats - Update the PHY statistics counters
4853  * @adapter: board private structure
4854  *
4855  * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4856  **/
4857 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4858 {
4859         struct e1000_hw *hw = &adapter->hw;
4860         s32 ret_val;
4861         u16 phy_data;
4862
4863         ret_val = hw->phy.ops.acquire(hw);
4864         if (ret_val)
4865                 return;
4866
4867         /* A page set is expensive so check if already on desired page.
4868          * If not, set to the page with the PHY status registers.
4869          */
4870         hw->phy.addr = 1;
4871         ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4872                                            &phy_data);
4873         if (ret_val)
4874                 goto release;
4875         if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4876                 ret_val = hw->phy.ops.set_page(hw,
4877                                                HV_STATS_PAGE << IGP_PAGE_SHIFT);
4878                 if (ret_val)
4879                         goto release;
4880         }
4881
4882         /* Single Collision Count */
4883         hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4884         ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4885         if (!ret_val)
4886                 adapter->stats.scc += phy_data;
4887
4888         /* Excessive Collision Count */
4889         hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4890         ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4891         if (!ret_val)
4892                 adapter->stats.ecol += phy_data;
4893
4894         /* Multiple Collision Count */
4895         hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4896         ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4897         if (!ret_val)
4898                 adapter->stats.mcc += phy_data;
4899
4900         /* Late Collision Count */
4901         hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4902         ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4903         if (!ret_val)
4904                 adapter->stats.latecol += phy_data;
4905
4906         /* Collision Count - also used for adaptive IFS */
4907         hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4908         ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4909         if (!ret_val)
4910                 hw->mac.collision_delta = phy_data;
4911
4912         /* Defer Count */
4913         hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4914         ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4915         if (!ret_val)
4916                 adapter->stats.dc += phy_data;
4917
4918         /* Transmit with no CRS */
4919         hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4920         ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4921         if (!ret_val)
4922                 adapter->stats.tncrs += phy_data;
4923
4924 release:
4925         hw->phy.ops.release(hw);
4926 }
4927
4928 /**
4929  * e1000e_update_stats - Update the board statistics counters
4930  * @adapter: board private structure
4931  **/
4932 static void e1000e_update_stats(struct e1000_adapter *adapter)
4933 {
4934         struct net_device *netdev = adapter->netdev;
4935         struct e1000_hw *hw = &adapter->hw;
4936         struct pci_dev *pdev = adapter->pdev;
4937
4938         /* Prevent stats update while adapter is being reset, or if the pci
4939          * connection is down.
4940          */
4941         if (adapter->link_speed == 0)
4942                 return;
4943         if (pci_channel_offline(pdev))
4944                 return;
4945
4946         adapter->stats.crcerrs += er32(CRCERRS);
4947         adapter->stats.gprc += er32(GPRC);
4948         adapter->stats.gorc += er32(GORCL);
4949         er32(GORCH);            /* Clear gorc */
4950         adapter->stats.bprc += er32(BPRC);
4951         adapter->stats.mprc += er32(MPRC);
4952         adapter->stats.roc += er32(ROC);
4953
4954         adapter->stats.mpc += er32(MPC);
4955
4956         /* Half-duplex statistics */
4957         if (adapter->link_duplex == HALF_DUPLEX) {
4958                 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4959                         e1000e_update_phy_stats(adapter);
4960                 } else {
4961                         adapter->stats.scc += er32(SCC);
4962                         adapter->stats.ecol += er32(ECOL);
4963                         adapter->stats.mcc += er32(MCC);
4964                         adapter->stats.latecol += er32(LATECOL);
4965                         adapter->stats.dc += er32(DC);
4966
4967                         hw->mac.collision_delta = er32(COLC);
4968
4969                         if ((hw->mac.type != e1000_82574) &&
4970                             (hw->mac.type != e1000_82583))
4971                                 adapter->stats.tncrs += er32(TNCRS);
4972                 }
4973                 adapter->stats.colc += hw->mac.collision_delta;
4974         }
4975
4976         adapter->stats.xonrxc += er32(XONRXC);
4977         adapter->stats.xontxc += er32(XONTXC);
4978         adapter->stats.xoffrxc += er32(XOFFRXC);
4979         adapter->stats.xofftxc += er32(XOFFTXC);
4980         adapter->stats.gptc += er32(GPTC);
4981         adapter->stats.gotc += er32(GOTCL);
4982         er32(GOTCH);            /* Clear gotc */
4983         adapter->stats.rnbc += er32(RNBC);
4984         adapter->stats.ruc += er32(RUC);
4985
4986         adapter->stats.mptc += er32(MPTC);
4987         adapter->stats.bptc += er32(BPTC);
4988
4989         /* used for adaptive IFS */
4990
4991         hw->mac.tx_packet_delta = er32(TPT);
4992         adapter->stats.tpt += hw->mac.tx_packet_delta;
4993
4994         adapter->stats.algnerrc += er32(ALGNERRC);
4995         adapter->stats.rxerrc += er32(RXERRC);
4996         adapter->stats.cexterr += er32(CEXTERR);
4997         adapter->stats.tsctc += er32(TSCTC);
4998         adapter->stats.tsctfc += er32(TSCTFC);
4999
5000         /* Fill out the OS statistics structure */
5001         netdev->stats.multicast = adapter->stats.mprc;
5002         netdev->stats.collisions = adapter->stats.colc;
5003
5004         /* Rx Errors */
5005
5006         /* RLEC on some newer hardware can be incorrect so build
5007          * our own version based on RUC and ROC
5008          */
5009         netdev->stats.rx_errors = adapter->stats.rxerrc +
5010             adapter->stats.crcerrs + adapter->stats.algnerrc +
5011             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5012         netdev->stats.rx_length_errors = adapter->stats.ruc +
5013             adapter->stats.roc;
5014         netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
5015         netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
5016         netdev->stats.rx_missed_errors = adapter->stats.mpc;
5017
5018         /* Tx Errors */
5019         netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5020         netdev->stats.tx_aborted_errors = adapter->stats.ecol;
5021         netdev->stats.tx_window_errors = adapter->stats.latecol;
5022         netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
5023
5024         /* Tx Dropped needs to be maintained elsewhere */
5025
5026         /* Management Stats */
5027         adapter->stats.mgptc += er32(MGTPTC);
5028         adapter->stats.mgprc += er32(MGTPRC);
5029         adapter->stats.mgpdc += er32(MGTPDC);
5030
5031         /* Correctable ECC Errors */
5032         if (hw->mac.type >= e1000_pch_lpt) {
5033                 u32 pbeccsts = er32(PBECCSTS);
5034
5035                 adapter->corr_errors +=
5036                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
5037                 adapter->uncorr_errors +=
5038                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
5039                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
5040         }
5041 }
5042
5043 /**
5044  * e1000_phy_read_status - Update the PHY register status snapshot
5045  * @adapter: board private structure
5046  **/
5047 static void e1000_phy_read_status(struct e1000_adapter *adapter)
5048 {
5049         struct e1000_hw *hw = &adapter->hw;
5050         struct e1000_phy_regs *phy = &adapter->phy_regs;
5051
5052         if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
5053             (er32(STATUS) & E1000_STATUS_LU) &&
5054             (adapter->hw.phy.media_type == e1000_media_type_copper)) {
5055                 int ret_val;
5056
5057                 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
5058                 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
5059                 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
5060                 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
5061                 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
5062                 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
5063                 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
5064                 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
5065                 if (ret_val)
5066                         e_warn("Error reading PHY register\n");
5067         } else {
5068                 /* Do not read PHY registers if link is not up
5069                  * Set values to typical power-on defaults
5070                  */
5071                 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
5072                 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
5073                              BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
5074                              BMSR_ERCAP);
5075                 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
5076                                   ADVERTISE_ALL | ADVERTISE_CSMA);
5077                 phy->lpa = 0;
5078                 phy->expansion = EXPANSION_ENABLENPAGE;
5079                 phy->ctrl1000 = ADVERTISE_1000FULL;
5080                 phy->stat1000 = 0;
5081                 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
5082         }
5083 }
5084
5085 static void e1000_print_link_info(struct e1000_adapter *adapter)
5086 {
5087         struct e1000_hw *hw = &adapter->hw;
5088         u32 ctrl = er32(CTRL);
5089
5090         /* Link status message must follow this format for user tools */
5091         netdev_info(adapter->netdev,
5092                     "NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5093                     adapter->link_speed,
5094                     adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5095                     (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5096                     (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5097                     (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5098 }
5099
5100 static bool e1000e_has_link(struct e1000_adapter *adapter)
5101 {
5102         struct e1000_hw *hw = &adapter->hw;
5103         bool link_active = false;
5104         s32 ret_val = 0;
5105
5106         /* get_link_status is set on LSC (link status) interrupt or
5107          * Rx sequence error interrupt.  get_link_status will stay
5108          * true until the check_for_link establishes link
5109          * for copper adapters ONLY
5110          */
5111         switch (hw->phy.media_type) {
5112         case e1000_media_type_copper:
5113                 if (hw->mac.get_link_status) {
5114                         ret_val = hw->mac.ops.check_for_link(hw);
5115                         link_active = !hw->mac.get_link_status;
5116                 } else {
5117                         link_active = true;
5118                 }
5119                 break;
5120         case e1000_media_type_fiber:
5121                 ret_val = hw->mac.ops.check_for_link(hw);
5122                 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5123                 break;
5124         case e1000_media_type_internal_serdes:
5125                 ret_val = hw->mac.ops.check_for_link(hw);
5126                 link_active = hw->mac.serdes_has_link;
5127                 break;
5128         default:
5129         case e1000_media_type_unknown:
5130                 break;
5131         }
5132
5133         if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5134             (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5135                 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5136                 e_info("Gigabit has been disabled, downgrading speed\n");
5137         }
5138
5139         return link_active;
5140 }
5141
5142 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5143 {
5144         /* make sure the receive unit is started */
5145         if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5146             (adapter->flags & FLAG_RESTART_NOW)) {
5147                 struct e1000_hw *hw = &adapter->hw;
5148                 u32 rctl = er32(RCTL);
5149
5150                 ew32(RCTL, rctl | E1000_RCTL_EN);
5151                 adapter->flags &= ~FLAG_RESTART_NOW;
5152         }
5153 }
5154
5155 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5156 {
5157         struct e1000_hw *hw = &adapter->hw;
5158
5159         /* With 82574 controllers, PHY needs to be checked periodically
5160          * for hung state and reset, if two calls return true
5161          */
5162         if (e1000_check_phy_82574(hw))
5163                 adapter->phy_hang_count++;
5164         else
5165                 adapter->phy_hang_count = 0;
5166
5167         if (adapter->phy_hang_count > 1) {
5168                 adapter->phy_hang_count = 0;
5169                 e_dbg("PHY appears hung - resetting\n");
5170                 schedule_work(&adapter->reset_task);
5171         }
5172 }
5173
5174 /**
5175  * e1000_watchdog - Timer Call-back
5176  * @t: pointer to timer_list containing private info adapter
5177  **/
5178 static void e1000_watchdog(struct timer_list *t)
5179 {
5180         struct e1000_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5181
5182         /* Do the rest outside of interrupt context */
5183         schedule_work(&adapter->watchdog_task);
5184
5185         /* TODO: make this use queue_delayed_work() */
5186 }
5187
5188 static void e1000_watchdog_task(struct work_struct *work)
5189 {
5190         struct e1000_adapter *adapter = container_of(work,
5191                                                      struct e1000_adapter,
5192                                                      watchdog_task);
5193         struct net_device *netdev = adapter->netdev;
5194         struct e1000_mac_info *mac = &adapter->hw.mac;
5195         struct e1000_phy_info *phy = &adapter->hw.phy;
5196         struct e1000_ring *tx_ring = adapter->tx_ring;
5197         u32 dmoff_exit_timeout = 100, tries = 0;
5198         struct e1000_hw *hw = &adapter->hw;
5199         u32 link, tctl, pcim_state;
5200
5201         if (test_bit(__E1000_DOWN, &adapter->state))
5202                 return;
5203
5204         link = e1000e_has_link(adapter);
5205         if ((netif_carrier_ok(netdev)) && link) {
5206                 /* Cancel scheduled suspend requests. */
5207                 pm_runtime_resume(netdev->dev.parent);
5208
5209                 e1000e_enable_receives(adapter);
5210                 goto link_up;
5211         }
5212
5213         if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5214             (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5215                 e1000_update_mng_vlan(adapter);
5216
5217         if (link) {
5218                 if (!netif_carrier_ok(netdev)) {
5219                         bool txb2b = true;
5220
5221                         /* Cancel scheduled suspend requests. */
5222                         pm_runtime_resume(netdev->dev.parent);
5223
5224                         /* Checking if MAC is in DMoff state*/
5225                         pcim_state = er32(STATUS);
5226                         while (pcim_state & E1000_STATUS_PCIM_STATE) {
5227                                 if (tries++ == dmoff_exit_timeout) {
5228                                         e_dbg("Error in exiting dmoff\n");
5229                                         break;
5230                                 }
5231                                 usleep_range(10000, 20000);
5232                                 pcim_state = er32(STATUS);
5233
5234                                 /* Checking if MAC exited DMoff state */
5235                                 if (!(pcim_state & E1000_STATUS_PCIM_STATE))
5236                                         e1000_phy_hw_reset(&adapter->hw);
5237                         }
5238
5239                         /* update snapshot of PHY registers on LSC */
5240                         e1000_phy_read_status(adapter);
5241                         mac->ops.get_link_up_info(&adapter->hw,
5242                                                   &adapter->link_speed,
5243                                                   &adapter->link_duplex);
5244                         e1000_print_link_info(adapter);
5245
5246                         /* check if SmartSpeed worked */
5247                         e1000e_check_downshift(hw);
5248                         if (phy->speed_downgraded)
5249                                 netdev_warn(netdev,
5250                                             "Link Speed was downgraded by SmartSpeed\n");
5251
5252                         /* On supported PHYs, check for duplex mismatch only
5253                          * if link has autonegotiated at 10/100 half
5254                          */
5255                         if ((hw->phy.type == e1000_phy_igp_3 ||
5256                              hw->phy.type == e1000_phy_bm) &&
5257                             hw->mac.autoneg &&
5258                             (adapter->link_speed == SPEED_10 ||
5259                              adapter->link_speed == SPEED_100) &&
5260                             (adapter->link_duplex == HALF_DUPLEX)) {
5261                                 u16 autoneg_exp;
5262
5263                                 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5264
5265                                 if (!(autoneg_exp & EXPANSION_NWAY))
5266                                         e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
5267                         }
5268
5269                         /* adjust timeout factor according to speed/duplex */
5270                         adapter->tx_timeout_factor = 1;
5271                         switch (adapter->link_speed) {
5272                         case SPEED_10:
5273                                 txb2b = false;
5274                                 adapter->tx_timeout_factor = 16;
5275                                 break;
5276                         case SPEED_100:
5277                                 txb2b = false;
5278                                 adapter->tx_timeout_factor = 10;
5279                                 break;
5280                         }
5281
5282                         /* workaround: re-program speed mode bit after
5283                          * link-up event
5284                          */
5285                         if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5286                             !txb2b) {
5287                                 u32 tarc0;
5288
5289                                 tarc0 = er32(TARC(0));
5290                                 tarc0 &= ~SPEED_MODE_BIT;
5291                                 ew32(TARC(0), tarc0);
5292                         }
5293
5294                         /* disable TSO for pcie and 10/100 speeds, to avoid
5295                          * some hardware issues
5296                          */
5297                         if (!(adapter->flags & FLAG_TSO_FORCE)) {
5298                                 switch (adapter->link_speed) {
5299                                 case SPEED_10:
5300                                 case SPEED_100:
5301                                         e_info("10/100 speed: disabling TSO\n");
5302                                         netdev->features &= ~NETIF_F_TSO;
5303                                         netdev->features &= ~NETIF_F_TSO6;
5304                                         break;
5305                                 case SPEED_1000:
5306                                         netdev->features |= NETIF_F_TSO;
5307                                         netdev->features |= NETIF_F_TSO6;
5308                                         break;
5309                                 default:
5310                                         /* oops */
5311                                         break;
5312                                 }
5313                                 if (hw->mac.type == e1000_pch_spt) {
5314                                         netdev->features &= ~NETIF_F_TSO;
5315                                         netdev->features &= ~NETIF_F_TSO6;
5316                                 }
5317                         }
5318
5319                         /* enable transmits in the hardware, need to do this
5320                          * after setting TARC(0)
5321                          */
5322                         tctl = er32(TCTL);
5323                         tctl |= E1000_TCTL_EN;
5324                         ew32(TCTL, tctl);
5325
5326                         /* Perform any post-link-up configuration before
5327                          * reporting link up.
5328                          */
5329                         if (phy->ops.cfg_on_link_up)
5330                                 phy->ops.cfg_on_link_up(hw);
5331
5332                         netif_wake_queue(netdev);
5333                         netif_carrier_on(netdev);
5334
5335                         if (!test_bit(__E1000_DOWN, &adapter->state))
5336                                 mod_timer(&adapter->phy_info_timer,
5337                                           round_jiffies(jiffies + 2 * HZ));
5338                 }
5339         } else {
5340                 if (netif_carrier_ok(netdev)) {
5341                         adapter->link_speed = 0;
5342                         adapter->link_duplex = 0;
5343                         /* Link status message must follow this format */
5344                         netdev_info(netdev, "NIC Link is Down\n");
5345                         netif_carrier_off(netdev);
5346                         netif_stop_queue(netdev);
5347                         if (!test_bit(__E1000_DOWN, &adapter->state))
5348                                 mod_timer(&adapter->phy_info_timer,
5349                                           round_jiffies(jiffies + 2 * HZ));
5350
5351                         /* 8000ES2LAN requires a Rx packet buffer work-around
5352                          * on link down event; reset the controller to flush
5353                          * the Rx packet buffer.
5354                          */
5355                         if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5356                                 adapter->flags |= FLAG_RESTART_NOW;
5357                         else
5358                                 pm_schedule_suspend(netdev->dev.parent,
5359                                                     LINK_TIMEOUT);
5360                 }
5361         }
5362
5363 link_up:
5364         spin_lock(&adapter->stats64_lock);
5365         e1000e_update_stats(adapter);
5366
5367         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5368         adapter->tpt_old = adapter->stats.tpt;
5369         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5370         adapter->colc_old = adapter->stats.colc;
5371
5372         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5373         adapter->gorc_old = adapter->stats.gorc;
5374         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5375         adapter->gotc_old = adapter->stats.gotc;
5376         spin_unlock(&adapter->stats64_lock);
5377
5378         /* If the link is lost the controller stops DMA, but
5379          * if there is queued Tx work it cannot be done.  So
5380          * reset the controller to flush the Tx packet buffers.
5381          */
5382         if (!netif_carrier_ok(netdev) &&
5383             (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5384                 adapter->flags |= FLAG_RESTART_NOW;
5385
5386         /* If reset is necessary, do it outside of interrupt context. */
5387         if (adapter->flags & FLAG_RESTART_NOW) {
5388                 schedule_work(&adapter->reset_task);
5389                 /* return immediately since reset is imminent */
5390                 return;
5391         }
5392
5393         e1000e_update_adaptive(&adapter->hw);
5394
5395         /* Simple mode for Interrupt Throttle Rate (ITR) */
5396         if (adapter->itr_setting == 4) {
5397                 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5398                  * Total asymmetrical Tx or Rx gets ITR=8000;
5399                  * everyone else is between 2000-8000.
5400                  */
5401                 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5402                 u32 dif = (adapter->gotc > adapter->gorc ?
5403                            adapter->gotc - adapter->gorc :
5404                            adapter->gorc - adapter->gotc) / 10000;
5405                 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5406
5407                 e1000e_write_itr(adapter, itr);
5408         }
5409
5410         /* Cause software interrupt to ensure Rx ring is cleaned */
5411         if (adapter->msix_entries)
5412                 ew32(ICS, adapter->rx_ring->ims_val);
5413         else
5414                 ew32(ICS, E1000_ICS_RXDMT0);
5415
5416         /* flush pending descriptors to memory before detecting Tx hang */
5417         e1000e_flush_descriptors(adapter);
5418
5419         /* Force detection of hung controller every watchdog period */
5420         adapter->detect_tx_hung = true;
5421
5422         /* With 82571 controllers, LAA may be overwritten due to controller
5423          * reset from the other port. Set the appropriate LAA in RAR[0]
5424          */
5425         if (e1000e_get_laa_state_82571(hw))
5426                 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5427
5428         if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5429                 e1000e_check_82574_phy_workaround(adapter);
5430
5431         /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5432         if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5433                 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5434                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5435                         er32(RXSTMPH);
5436                         adapter->rx_hwtstamp_cleared++;
5437                 } else {
5438                         adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5439                 }
5440         }
5441
5442         /* Reset the timer */
5443         if (!test_bit(__E1000_DOWN, &adapter->state))
5444                 mod_timer(&adapter->watchdog_timer,
5445                           round_jiffies(jiffies + 2 * HZ));
5446 }
5447
5448 #define E1000_TX_FLAGS_CSUM             0x00000001
5449 #define E1000_TX_FLAGS_VLAN             0x00000002
5450 #define E1000_TX_FLAGS_TSO              0x00000004
5451 #define E1000_TX_FLAGS_IPV4             0x00000008
5452 #define E1000_TX_FLAGS_NO_FCS           0x00000010
5453 #define E1000_TX_FLAGS_HWTSTAMP         0x00000020
5454 #define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
5455 #define E1000_TX_FLAGS_VLAN_SHIFT       16
5456
5457 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5458                      __be16 protocol)
5459 {
5460         struct e1000_context_desc *context_desc;
5461         struct e1000_buffer *buffer_info;
5462         unsigned int i;
5463         u32 cmd_length = 0;
5464         u16 ipcse = 0, mss;
5465         u8 ipcss, ipcso, tucss, tucso, hdr_len;
5466         int err;
5467
5468         if (!skb_is_gso(skb))
5469                 return 0;
5470
5471         err = skb_cow_head(skb, 0);
5472         if (err < 0)
5473                 return err;
5474
5475         hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5476         mss = skb_shinfo(skb)->gso_size;
5477         if (protocol == htons(ETH_P_IP)) {
5478                 struct iphdr *iph = ip_hdr(skb);
5479                 iph->tot_len = 0;
5480                 iph->check = 0;
5481                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5482                                                          0, IPPROTO_TCP, 0);
5483                 cmd_length = E1000_TXD_CMD_IP;
5484                 ipcse = skb_transport_offset(skb) - 1;
5485         } else if (skb_is_gso_v6(skb)) {
5486                 tcp_v6_gso_csum_prep(skb);
5487                 ipcse = 0;
5488         }
5489         ipcss = skb_network_offset(skb);
5490         ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5491         tucss = skb_transport_offset(skb);
5492         tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5493
5494         cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5495                        E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5496
5497         i = tx_ring->next_to_use;
5498         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5499         buffer_info = &tx_ring->buffer_info[i];
5500
5501         context_desc->lower_setup.ip_fields.ipcss = ipcss;
5502         context_desc->lower_setup.ip_fields.ipcso = ipcso;
5503         context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5504         context_desc->upper_setup.tcp_fields.tucss = tucss;
5505         context_desc->upper_setup.tcp_fields.tucso = tucso;
5506         context_desc->upper_setup.tcp_fields.tucse = 0;
5507         context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5508         context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5509         context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5510
5511         buffer_info->time_stamp = jiffies;
5512         buffer_info->next_to_watch = i;
5513
5514         i++;
5515         if (i == tx_ring->count)
5516                 i = 0;
5517         tx_ring->next_to_use = i;
5518
5519         return 1;
5520 }
5521
5522 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5523                           __be16 protocol)
5524 {
5525         struct e1000_adapter *adapter = tx_ring->adapter;
5526         struct e1000_context_desc *context_desc;
5527         struct e1000_buffer *buffer_info;
5528         unsigned int i;
5529         u8 css;
5530         u32 cmd_len = E1000_TXD_CMD_DEXT;
5531
5532         if (skb->ip_summed != CHECKSUM_PARTIAL)
5533                 return false;
5534
5535         switch (protocol) {
5536         case cpu_to_be16(ETH_P_IP):
5537                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5538                         cmd_len |= E1000_TXD_CMD_TCP;
5539                 break;
5540         case cpu_to_be16(ETH_P_IPV6):
5541                 /* XXX not handling all IPV6 headers */
5542                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5543                         cmd_len |= E1000_TXD_CMD_TCP;
5544                 break;
5545         default:
5546                 if (unlikely(net_ratelimit()))
5547                         e_warn("checksum_partial proto=%x!\n",
5548                                be16_to_cpu(protocol));
5549                 break;
5550         }
5551
5552         css = skb_checksum_start_offset(skb);
5553
5554         i = tx_ring->next_to_use;
5555         buffer_info = &tx_ring->buffer_info[i];
5556         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5557
5558         context_desc->lower_setup.ip_config = 0;
5559         context_desc->upper_setup.tcp_fields.tucss = css;
5560         context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5561         context_desc->upper_setup.tcp_fields.tucse = 0;
5562         context_desc->tcp_seg_setup.data = 0;
5563         context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5564
5565         buffer_info->time_stamp = jiffies;
5566         buffer_info->next_to_watch = i;
5567
5568         i++;
5569         if (i == tx_ring->count)
5570                 i = 0;
5571         tx_ring->next_to_use = i;
5572
5573         return true;
5574 }
5575
5576 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5577                         unsigned int first, unsigned int max_per_txd,
5578                         unsigned int nr_frags)
5579 {
5580         struct e1000_adapter *adapter = tx_ring->adapter;
5581         struct pci_dev *pdev = adapter->pdev;
5582         struct e1000_buffer *buffer_info;
5583         unsigned int len = skb_headlen(skb);
5584         unsigned int offset = 0, size, count = 0, i;
5585         unsigned int f, bytecount, segs;
5586
5587         i = tx_ring->next_to_use;
5588
5589         while (len) {
5590                 buffer_info = &tx_ring->buffer_info[i];
5591                 size = min(len, max_per_txd);
5592
5593                 buffer_info->length = size;
5594                 buffer_info->time_stamp = jiffies;
5595                 buffer_info->next_to_watch = i;
5596                 buffer_info->dma = dma_map_single(&pdev->dev,
5597                                                   skb->data + offset,
5598                                                   size, DMA_TO_DEVICE);
5599                 buffer_info->mapped_as_page = false;
5600                 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5601                         goto dma_error;
5602
5603                 len -= size;
5604                 offset += size;
5605                 count++;
5606
5607                 if (len) {
5608                         i++;
5609                         if (i == tx_ring->count)
5610                                 i = 0;
5611                 }
5612         }
5613
5614         for (f = 0; f < nr_frags; f++) {
5615                 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
5616
5617                 len = skb_frag_size(frag);
5618                 offset = 0;
5619
5620                 while (len) {
5621                         i++;
5622                         if (i == tx_ring->count)
5623                                 i = 0;
5624
5625                         buffer_info = &tx_ring->buffer_info[i];
5626                         size = min(len, max_per_txd);
5627
5628                         buffer_info->length = size;
5629                         buffer_info->time_stamp = jiffies;
5630                         buffer_info->next_to_watch = i;
5631                         buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5632                                                             offset, size,
5633                                                             DMA_TO_DEVICE);
5634                         buffer_info->mapped_as_page = true;
5635                         if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5636                                 goto dma_error;
5637
5638                         len -= size;
5639                         offset += size;
5640                         count++;
5641                 }
5642         }
5643
5644         segs = skb_shinfo(skb)->gso_segs ? : 1;
5645         /* multiply data chunks by size of headers */
5646         bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5647
5648         tx_ring->buffer_info[i].skb = skb;
5649         tx_ring->buffer_info[i].segs = segs;
5650         tx_ring->buffer_info[i].bytecount = bytecount;
5651         tx_ring->buffer_info[first].next_to_watch = i;
5652
5653         return count;
5654
5655 dma_error:
5656         dev_err(&pdev->dev, "Tx DMA map failed\n");
5657         buffer_info->dma = 0;
5658         if (count)
5659                 count--;
5660
5661         while (count--) {
5662                 if (i == 0)
5663                         i += tx_ring->count;
5664                 i--;
5665                 buffer_info = &tx_ring->buffer_info[i];
5666                 e1000_put_txbuf(tx_ring, buffer_info, true);
5667         }
5668
5669         return 0;
5670 }
5671
5672 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5673 {
5674         struct e1000_adapter *adapter = tx_ring->adapter;
5675         struct e1000_tx_desc *tx_desc = NULL;
5676         struct e1000_buffer *buffer_info;
5677         u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5678         unsigned int i;
5679
5680         if (tx_flags & E1000_TX_FLAGS_TSO) {
5681                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5682                     E1000_TXD_CMD_TSE;
5683                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5684
5685                 if (tx_flags & E1000_TX_FLAGS_IPV4)
5686                         txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5687         }
5688
5689         if (tx_flags & E1000_TX_FLAGS_CSUM) {
5690                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5691                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5692         }
5693
5694         if (tx_flags & E1000_TX_FLAGS_VLAN) {
5695                 txd_lower |= E1000_TXD_CMD_VLE;
5696                 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5697         }
5698
5699         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5700                 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5701
5702         if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5703                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5704                 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5705         }
5706
5707         i = tx_ring->next_to_use;
5708
5709         do {
5710                 buffer_info = &tx_ring->buffer_info[i];
5711                 tx_desc = E1000_TX_DESC(*tx_ring, i);
5712                 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5713                 tx_desc->lower.data = cpu_to_le32(txd_lower |
5714                                                   buffer_info->length);
5715                 tx_desc->upper.data = cpu_to_le32(txd_upper);
5716
5717                 i++;
5718                 if (i == tx_ring->count)
5719                         i = 0;
5720         } while (--count > 0);
5721
5722         tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5723
5724         /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5725         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5726                 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5727
5728         /* Force memory writes to complete before letting h/w
5729          * know there are new descriptors to fetch.  (Only
5730          * applicable for weak-ordered memory model archs,
5731          * such as IA-64).
5732          */
5733         wmb();
5734
5735         tx_ring->next_to_use = i;
5736 }
5737
5738 #define MINIMUM_DHCP_PACKET_SIZE 282
5739 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5740                                     struct sk_buff *skb)
5741 {
5742         struct e1000_hw *hw = &adapter->hw;
5743         u16 length, offset;
5744
5745         if (skb_vlan_tag_present(skb) &&
5746             !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5747               (adapter->hw.mng_cookie.status &
5748                E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5749                 return 0;
5750
5751         if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5752                 return 0;
5753
5754         if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5755                 return 0;
5756
5757         {
5758                 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5759                 struct udphdr *udp;
5760
5761                 if (ip->protocol != IPPROTO_UDP)
5762                         return 0;
5763
5764                 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5765                 if (ntohs(udp->dest) != 67)
5766                         return 0;
5767
5768                 offset = (u8 *)udp + 8 - skb->data;
5769                 length = skb->len - offset;
5770                 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5771         }
5772
5773         return 0;
5774 }
5775
5776 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5777 {
5778         struct e1000_adapter *adapter = tx_ring->adapter;
5779
5780         netif_stop_queue(adapter->netdev);
5781         /* Herbert's original patch had:
5782          *  smp_mb__after_netif_stop_queue();
5783          * but since that doesn't exist yet, just open code it.
5784          */
5785         smp_mb();
5786
5787         /* We need to check again in a case another CPU has just
5788          * made room available.
5789          */
5790         if (e1000_desc_unused(tx_ring) < size)
5791                 return -EBUSY;
5792
5793         /* A reprieve! */
5794         netif_start_queue(adapter->netdev);
5795         ++adapter->restart_queue;
5796         return 0;
5797 }
5798
5799 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5800 {
5801         BUG_ON(size > tx_ring->count);
5802
5803         if (e1000_desc_unused(tx_ring) >= size)
5804                 return 0;
5805         return __e1000_maybe_stop_tx(tx_ring, size);
5806 }
5807
5808 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5809                                     struct net_device *netdev)
5810 {
5811         struct e1000_adapter *adapter = netdev_priv(netdev);
5812         struct e1000_ring *tx_ring = adapter->tx_ring;
5813         unsigned int first;
5814         unsigned int tx_flags = 0;
5815         unsigned int len = skb_headlen(skb);
5816         unsigned int nr_frags;
5817         unsigned int mss;
5818         int count = 0;
5819         int tso;
5820         unsigned int f;
5821         __be16 protocol = vlan_get_protocol(skb);
5822
5823         if (test_bit(__E1000_DOWN, &adapter->state)) {
5824                 dev_kfree_skb_any(skb);
5825                 return NETDEV_TX_OK;
5826         }
5827
5828         if (skb->len <= 0) {
5829                 dev_kfree_skb_any(skb);
5830                 return NETDEV_TX_OK;
5831         }
5832
5833         /* The minimum packet size with TCTL.PSP set is 17 bytes so
5834          * pad skb in order to meet this minimum size requirement
5835          */
5836         if (skb_put_padto(skb, 17))
5837                 return NETDEV_TX_OK;
5838
5839         mss = skb_shinfo(skb)->gso_size;
5840         if (mss) {
5841                 u8 hdr_len;
5842
5843                 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5844                  * points to just header, pull a few bytes of payload from
5845                  * frags into skb->data
5846                  */
5847                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5848                 /* we do this workaround for ES2LAN, but it is un-necessary,
5849                  * avoiding it could save a lot of cycles
5850                  */
5851                 if (skb->data_len && (hdr_len == len)) {
5852                         unsigned int pull_size;
5853
5854                         pull_size = min_t(unsigned int, 4, skb->data_len);
5855                         if (!__pskb_pull_tail(skb, pull_size)) {
5856                                 e_err("__pskb_pull_tail failed.\n");
5857                                 dev_kfree_skb_any(skb);
5858                                 return NETDEV_TX_OK;
5859                         }
5860                         len = skb_headlen(skb);
5861                 }
5862         }
5863
5864         /* reserve a descriptor for the offload context */
5865         if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5866                 count++;
5867         count++;
5868
5869         count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5870
5871         nr_frags = skb_shinfo(skb)->nr_frags;
5872         for (f = 0; f < nr_frags; f++)
5873                 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5874                                       adapter->tx_fifo_limit);
5875
5876         if (adapter->hw.mac.tx_pkt_filtering)
5877                 e1000_transfer_dhcp_info(adapter, skb);
5878
5879         /* need: count + 2 desc gap to keep tail from touching
5880          * head, otherwise try next time
5881          */
5882         if (e1000_maybe_stop_tx(tx_ring, count + 2))
5883                 return NETDEV_TX_BUSY;
5884
5885         if (skb_vlan_tag_present(skb)) {
5886                 tx_flags |= E1000_TX_FLAGS_VLAN;
5887                 tx_flags |= (skb_vlan_tag_get(skb) <<
5888                              E1000_TX_FLAGS_VLAN_SHIFT);
5889         }
5890
5891         first = tx_ring->next_to_use;
5892
5893         tso = e1000_tso(tx_ring, skb, protocol);
5894         if (tso < 0) {
5895                 dev_kfree_skb_any(skb);
5896                 return NETDEV_TX_OK;
5897         }
5898
5899         if (tso)
5900                 tx_flags |= E1000_TX_FLAGS_TSO;
5901         else if (e1000_tx_csum(tx_ring, skb, protocol))
5902                 tx_flags |= E1000_TX_FLAGS_CSUM;
5903
5904         /* Old method was to assume IPv4 packet by default if TSO was enabled.
5905          * 82571 hardware supports TSO capabilities for IPv6 as well...
5906          * no longer assume, we must.
5907          */
5908         if (protocol == htons(ETH_P_IP))
5909                 tx_flags |= E1000_TX_FLAGS_IPV4;
5910
5911         if (unlikely(skb->no_fcs))
5912                 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5913
5914         /* if count is 0 then mapping error has occurred */
5915         count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5916                              nr_frags);
5917         if (count) {
5918                 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5919                     (adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
5920                         if (!adapter->tx_hwtstamp_skb) {
5921                                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5922                                 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5923                                 adapter->tx_hwtstamp_skb = skb_get(skb);
5924                                 adapter->tx_hwtstamp_start = jiffies;
5925                                 schedule_work(&adapter->tx_hwtstamp_work);
5926                         } else {
5927                                 adapter->tx_hwtstamp_skipped++;
5928                         }
5929                 }
5930
5931                 skb_tx_timestamp(skb);
5932
5933                 netdev_sent_queue(netdev, skb->len);
5934                 e1000_tx_queue(tx_ring, tx_flags, count);
5935                 /* Make sure there is space in the ring for the next send. */
5936                 e1000_maybe_stop_tx(tx_ring,
5937                                     (MAX_SKB_FRAGS *
5938                                      DIV_ROUND_UP(PAGE_SIZE,
5939                                                   adapter->tx_fifo_limit) + 2));
5940
5941                 if (!netdev_xmit_more() ||
5942                     netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5943                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5944                                 e1000e_update_tdt_wa(tx_ring,
5945                                                      tx_ring->next_to_use);
5946                         else
5947                                 writel(tx_ring->next_to_use, tx_ring->tail);
5948                 }
5949         } else {
5950                 dev_kfree_skb_any(skb);
5951                 tx_ring->buffer_info[first].time_stamp = 0;
5952                 tx_ring->next_to_use = first;
5953         }
5954
5955         return NETDEV_TX_OK;
5956 }
5957
5958 /**
5959  * e1000_tx_timeout - Respond to a Tx Hang
5960  * @netdev: network interface device structure
5961  * @txqueue: index of the hung queue (unused)
5962  **/
5963 static void e1000_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
5964 {
5965         struct e1000_adapter *adapter = netdev_priv(netdev);
5966
5967         /* Do the reset outside of interrupt context */
5968         adapter->tx_timeout_count++;
5969         schedule_work(&adapter->reset_task);
5970 }
5971
5972 static void e1000_reset_task(struct work_struct *work)
5973 {
5974         struct e1000_adapter *adapter;
5975         adapter = container_of(work, struct e1000_adapter, reset_task);
5976
5977         /* don't run the task if already down */
5978         if (test_bit(__E1000_DOWN, &adapter->state))
5979                 return;
5980
5981         if (!(adapter->flags & FLAG_RESTART_NOW)) {
5982                 e1000e_dump(adapter);
5983                 e_err("Reset adapter unexpectedly\n");
5984         }
5985         e1000e_reinit_locked(adapter);
5986 }
5987
5988 /**
5989  * e1000_get_stats64 - Get System Network Statistics
5990  * @netdev: network interface device structure
5991  * @stats: rtnl_link_stats64 pointer
5992  *
5993  * Returns the address of the device statistics structure.
5994  **/
5995 void e1000e_get_stats64(struct net_device *netdev,
5996                         struct rtnl_link_stats64 *stats)
5997 {
5998         struct e1000_adapter *adapter = netdev_priv(netdev);
5999
6000         spin_lock(&adapter->stats64_lock);
6001         e1000e_update_stats(adapter);
6002         /* Fill out the OS statistics structure */
6003         stats->rx_bytes = adapter->stats.gorc;
6004         stats->rx_packets = adapter->stats.gprc;
6005         stats->tx_bytes = adapter->stats.gotc;
6006         stats->tx_packets = adapter->stats.gptc;
6007         stats->multicast = adapter->stats.mprc;
6008         stats->collisions = adapter->stats.colc;
6009
6010         /* Rx Errors */
6011
6012         /* RLEC on some newer hardware can be incorrect so build
6013          * our own version based on RUC and ROC
6014          */
6015         stats->rx_errors = adapter->stats.rxerrc +
6016             adapter->stats.crcerrs + adapter->stats.algnerrc +
6017             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
6018         stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
6019         stats->rx_crc_errors = adapter->stats.crcerrs;
6020         stats->rx_frame_errors = adapter->stats.algnerrc;
6021         stats->rx_missed_errors = adapter->stats.mpc;
6022
6023         /* Tx Errors */
6024         stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
6025         stats->tx_aborted_errors = adapter->stats.ecol;
6026         stats->tx_window_errors = adapter->stats.latecol;
6027         stats->tx_carrier_errors = adapter->stats.tncrs;
6028
6029         /* Tx Dropped needs to be maintained elsewhere */
6030
6031         spin_unlock(&adapter->stats64_lock);
6032 }
6033
6034 /**
6035  * e1000_change_mtu - Change the Maximum Transfer Unit
6036  * @netdev: network interface device structure
6037  * @new_mtu: new value for maximum frame size
6038  *
6039  * Returns 0 on success, negative on failure
6040  **/
6041 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
6042 {
6043         struct e1000_adapter *adapter = netdev_priv(netdev);
6044         int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
6045
6046         /* Jumbo frame support */
6047         if ((new_mtu > ETH_DATA_LEN) &&
6048             !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
6049                 e_err("Jumbo Frames not supported.\n");
6050                 return -EINVAL;
6051         }
6052
6053         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6054         if ((adapter->hw.mac.type >= e1000_pch2lan) &&
6055             !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
6056             (new_mtu > ETH_DATA_LEN)) {
6057                 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6058                 return -EINVAL;
6059         }
6060
6061         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
6062                 usleep_range(1000, 1100);
6063         /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6064         adapter->max_frame_size = max_frame;
6065         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6066                    netdev->mtu, new_mtu);
6067         netdev->mtu = new_mtu;
6068
6069         pm_runtime_get_sync(netdev->dev.parent);
6070
6071         if (netif_running(netdev))
6072                 e1000e_down(adapter, true);
6073
6074         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6075          * means we reserve 2 more, this pushes us to allocate from the next
6076          * larger slab size.
6077          * i.e. RXBUFFER_2048 --> size-4096 slab
6078          * However with the new *_jumbo_rx* routines, jumbo receives will use
6079          * fragmented skbs
6080          */
6081
6082         if (max_frame <= 2048)
6083                 adapter->rx_buffer_len = 2048;
6084         else
6085                 adapter->rx_buffer_len = 4096;
6086
6087         /* adjust allocation if LPE protects us, and we aren't using SBP */
6088         if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6089                 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6090
6091         if (netif_running(netdev))
6092                 e1000e_up(adapter);
6093         else
6094                 e1000e_reset(adapter);
6095
6096         pm_runtime_put_sync(netdev->dev.parent);
6097
6098         clear_bit(__E1000_RESETTING, &adapter->state);
6099
6100         return 0;
6101 }
6102
6103 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
6104                            int cmd)
6105 {
6106         struct e1000_adapter *adapter = netdev_priv(netdev);
6107         struct mii_ioctl_data *data = if_mii(ifr);
6108
6109         if (adapter->hw.phy.media_type != e1000_media_type_copper)
6110                 return -EOPNOTSUPP;
6111
6112         switch (cmd) {
6113         case SIOCGMIIPHY:
6114                 data->phy_id = adapter->hw.phy.addr;
6115                 break;
6116         case SIOCGMIIREG:
6117                 e1000_phy_read_status(adapter);
6118
6119                 switch (data->reg_num & 0x1F) {
6120                 case MII_BMCR:
6121                         data->val_out = adapter->phy_regs.bmcr;
6122                         break;
6123                 case MII_BMSR:
6124                         data->val_out = adapter->phy_regs.bmsr;
6125                         break;
6126                 case MII_PHYSID1:
6127                         data->val_out = (adapter->hw.phy.id >> 16);
6128                         break;
6129                 case MII_PHYSID2:
6130                         data->val_out = (adapter->hw.phy.id & 0xFFFF);
6131                         break;
6132                 case MII_ADVERTISE:
6133                         data->val_out = adapter->phy_regs.advertise;
6134                         break;
6135                 case MII_LPA:
6136                         data->val_out = adapter->phy_regs.lpa;
6137                         break;
6138                 case MII_EXPANSION:
6139                         data->val_out = adapter->phy_regs.expansion;
6140                         break;
6141                 case MII_CTRL1000:
6142                         data->val_out = adapter->phy_regs.ctrl1000;
6143                         break;
6144                 case MII_STAT1000:
6145                         data->val_out = adapter->phy_regs.stat1000;
6146                         break;
6147                 case MII_ESTATUS:
6148                         data->val_out = adapter->phy_regs.estatus;
6149                         break;
6150                 default:
6151                         return -EIO;
6152                 }
6153                 break;
6154         case SIOCSMIIREG:
6155         default:
6156                 return -EOPNOTSUPP;
6157         }
6158         return 0;
6159 }
6160
6161 /**
6162  * e1000e_hwtstamp_ioctl - control hardware time stamping
6163  * @netdev: network interface device structure
6164  * @ifr: interface request
6165  *
6166  * Outgoing time stamping can be enabled and disabled. Play nice and
6167  * disable it when requested, although it shouldn't cause any overhead
6168  * when no packet needs it. At most one packet in the queue may be
6169  * marked for time stamping, otherwise it would be impossible to tell
6170  * for sure to which packet the hardware time stamp belongs.
6171  *
6172  * Incoming time stamping has to be configured via the hardware filters.
6173  * Not all combinations are supported, in particular event type has to be
6174  * specified. Matching the kind of event packet is not supported, with the
6175  * exception of "all V2 events regardless of level 2 or 4".
6176  **/
6177 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6178 {
6179         struct e1000_adapter *adapter = netdev_priv(netdev);
6180         struct hwtstamp_config config;
6181         int ret_val;
6182
6183         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6184                 return -EFAULT;
6185
6186         ret_val = e1000e_config_hwtstamp(adapter, &config);
6187         if (ret_val)
6188                 return ret_val;
6189
6190         switch (config.rx_filter) {
6191         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6192         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6193         case HWTSTAMP_FILTER_PTP_V2_SYNC:
6194         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6195         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6196         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6197                 /* With V2 type filters which specify a Sync or Delay Request,
6198                  * Path Delay Request/Response messages are also time stamped
6199                  * by hardware so notify the caller the requested packets plus
6200                  * some others are time stamped.
6201                  */
6202                 config.rx_filter = HWTSTAMP_FILTER_SOME;
6203                 break;
6204         default:
6205                 break;
6206         }
6207
6208         return copy_to_user(ifr->ifr_data, &config,
6209                             sizeof(config)) ? -EFAULT : 0;
6210 }
6211
6212 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6213 {
6214         struct e1000_adapter *adapter = netdev_priv(netdev);
6215
6216         return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6217                             sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6218 }
6219
6220 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6221 {
6222         switch (cmd) {
6223         case SIOCGMIIPHY:
6224         case SIOCGMIIREG:
6225         case SIOCSMIIREG:
6226                 return e1000_mii_ioctl(netdev, ifr, cmd);
6227         case SIOCSHWTSTAMP:
6228                 return e1000e_hwtstamp_set(netdev, ifr);
6229         case SIOCGHWTSTAMP:
6230                 return e1000e_hwtstamp_get(netdev, ifr);
6231         default:
6232                 return -EOPNOTSUPP;
6233         }
6234 }
6235
6236 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6237 {
6238         struct e1000_hw *hw = &adapter->hw;
6239         u32 i, mac_reg, wuc;
6240         u16 phy_reg, wuc_enable;
6241         int retval;
6242
6243         /* copy MAC RARs to PHY RARs */
6244         e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6245
6246         retval = hw->phy.ops.acquire(hw);
6247         if (retval) {
6248                 e_err("Could not acquire PHY\n");
6249                 return retval;
6250         }
6251
6252         /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6253         retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6254         if (retval)
6255                 goto release;
6256
6257         /* copy MAC MTA to PHY MTA - only needed for pchlan */
6258         for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6259                 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6260                 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6261                                            (u16)(mac_reg & 0xFFFF));
6262                 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6263                                            (u16)((mac_reg >> 16) & 0xFFFF));
6264         }
6265
6266         /* configure PHY Rx Control register */
6267         hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6268         mac_reg = er32(RCTL);
6269         if (mac_reg & E1000_RCTL_UPE)
6270                 phy_reg |= BM_RCTL_UPE;
6271         if (mac_reg & E1000_RCTL_MPE)
6272                 phy_reg |= BM_RCTL_MPE;
6273         phy_reg &= ~(BM_RCTL_MO_MASK);
6274         if (mac_reg & E1000_RCTL_MO_3)
6275                 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6276                             << BM_RCTL_MO_SHIFT);
6277         if (mac_reg & E1000_RCTL_BAM)
6278                 phy_reg |= BM_RCTL_BAM;
6279         if (mac_reg & E1000_RCTL_PMCF)
6280                 phy_reg |= BM_RCTL_PMCF;
6281         mac_reg = er32(CTRL);
6282         if (mac_reg & E1000_CTRL_RFCE)
6283                 phy_reg |= BM_RCTL_RFCE;
6284         hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6285
6286         wuc = E1000_WUC_PME_EN;
6287         if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6288                 wuc |= E1000_WUC_APME;
6289
6290         /* enable PHY wakeup in MAC register */
6291         ew32(WUFC, wufc);
6292         ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6293                    E1000_WUC_PME_STATUS | wuc));
6294
6295         /* configure and enable PHY wakeup in PHY registers */
6296         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6297         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6298
6299         /* activate PHY wakeup */
6300         wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6301         retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6302         if (retval)
6303                 e_err("Could not set PHY Host Wakeup bit\n");
6304 release:
6305         hw->phy.ops.release(hw);
6306
6307         return retval;
6308 }
6309
6310 static void e1000e_flush_lpic(struct pci_dev *pdev)
6311 {
6312         struct net_device *netdev = pci_get_drvdata(pdev);
6313         struct e1000_adapter *adapter = netdev_priv(netdev);
6314         struct e1000_hw *hw = &adapter->hw;
6315         u32 ret_val;
6316
6317         pm_runtime_get_sync(netdev->dev.parent);
6318
6319         ret_val = hw->phy.ops.acquire(hw);
6320         if (ret_val)
6321                 goto fl_out;
6322
6323         pr_info("EEE TX LPI TIMER: %08X\n",
6324                 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6325
6326         hw->phy.ops.release(hw);
6327
6328 fl_out:
6329         pm_runtime_put_sync(netdev->dev.parent);
6330 }
6331
6332 /* S0ix implementation */
6333 static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter)
6334 {
6335         struct e1000_hw *hw = &adapter->hw;
6336         u32 mac_data;
6337         u16 phy_data;
6338
6339         /* Disable the periodic inband message,
6340          * don't request PCIe clock in K1 page770_17[10:9] = 10b
6341          */
6342         e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6343         phy_data &= ~HV_PM_CTRL_K1_CLK_REQ;
6344         phy_data |= BIT(10);
6345         e1e_wphy(hw, HV_PM_CTRL, phy_data);
6346
6347         /* Make sure we don't exit K1 every time a new packet arrives
6348          * 772_29[5] = 1 CS_Mode_Stay_In_K1
6349          */
6350         e1e_rphy(hw, I217_CGFREG, &phy_data);
6351         phy_data |= BIT(5);
6352         e1e_wphy(hw, I217_CGFREG, phy_data);
6353
6354         /* Change the MAC/PHY interface to SMBus
6355          * Force the SMBus in PHY page769_23[0] = 1
6356          * Force the SMBus in MAC CTRL_EXT[11] = 1
6357          */
6358         e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6359         phy_data |= CV_SMB_CTRL_FORCE_SMBUS;
6360         e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6361         mac_data = er32(CTRL_EXT);
6362         mac_data |= E1000_CTRL_EXT_FORCE_SMBUS;
6363         ew32(CTRL_EXT, mac_data);
6364
6365         /* DFT control: PHY bit: page769_20[0] = 1
6366          * Gate PPW via EXTCNF_CTRL - set 0x0F00[7] = 1
6367          */
6368         e1e_rphy(hw, I82579_DFT_CTRL, &phy_data);
6369         phy_data |= BIT(0);
6370         e1e_wphy(hw, I82579_DFT_CTRL, phy_data);
6371
6372         mac_data = er32(EXTCNF_CTRL);
6373         mac_data |= E1000_EXTCNF_CTRL_GATE_PHY_CFG;
6374         ew32(EXTCNF_CTRL, mac_data);
6375
6376         /* Check MAC Tx/Rx packet buffer pointers.
6377          * Reset MAC Tx/Rx packet buffer pointers to suppress any
6378          * pending traffic indication that would prevent power gating.
6379          */
6380         mac_data = er32(TDFH);
6381         if (mac_data)
6382                 ew32(TDFH, 0);
6383         mac_data = er32(TDFT);
6384         if (mac_data)
6385                 ew32(TDFT, 0);
6386         mac_data = er32(TDFHS);
6387         if (mac_data)
6388                 ew32(TDFHS, 0);
6389         mac_data = er32(TDFTS);
6390         if (mac_data)
6391                 ew32(TDFTS, 0);
6392         mac_data = er32(TDFPC);
6393         if (mac_data)
6394                 ew32(TDFPC, 0);
6395         mac_data = er32(RDFH);
6396         if (mac_data)
6397                 ew32(RDFH, 0);
6398         mac_data = er32(RDFT);
6399         if (mac_data)
6400                 ew32(RDFT, 0);
6401         mac_data = er32(RDFHS);
6402         if (mac_data)
6403                 ew32(RDFHS, 0);
6404         mac_data = er32(RDFTS);
6405         if (mac_data)
6406                 ew32(RDFTS, 0);
6407         mac_data = er32(RDFPC);
6408         if (mac_data)
6409                 ew32(RDFPC, 0);
6410
6411         /* Enable the Dynamic Power Gating in the MAC */
6412         mac_data = er32(FEXTNVM7);
6413         mac_data |= BIT(22);
6414         ew32(FEXTNVM7, mac_data);
6415
6416         /* Disable the time synchronization clock */
6417         mac_data = er32(FEXTNVM7);
6418         mac_data |= BIT(31);
6419         mac_data &= ~BIT(0);
6420         ew32(FEXTNVM7, mac_data);
6421
6422         /* Dynamic Power Gating Enable */
6423         mac_data = er32(CTRL_EXT);
6424         mac_data |= BIT(3);
6425         ew32(CTRL_EXT, mac_data);
6426
6427         /* Disable disconnected cable conditioning for Power Gating */
6428         mac_data = er32(DPGFR);
6429         mac_data |= BIT(2);
6430         ew32(DPGFR, mac_data);
6431
6432         /* Don't wake from dynamic Power Gating with clock request */
6433         mac_data = er32(FEXTNVM12);
6434         mac_data |= BIT(12);
6435         ew32(FEXTNVM12, mac_data);
6436
6437         /* Ungate PGCB clock */
6438         mac_data = er32(FEXTNVM9);
6439         mac_data &= ~BIT(28);
6440         ew32(FEXTNVM9, mac_data);
6441
6442         /* Enable K1 off to enable mPHY Power Gating */
6443         mac_data = er32(FEXTNVM6);
6444         mac_data |= BIT(31);
6445         ew32(FEXTNVM6, mac_data);
6446
6447         /* Enable mPHY power gating for any link and speed */
6448         mac_data = er32(FEXTNVM8);
6449         mac_data |= BIT(9);
6450         ew32(FEXTNVM8, mac_data);
6451
6452         /* Enable the Dynamic Clock Gating in the DMA and MAC */
6453         mac_data = er32(CTRL_EXT);
6454         mac_data |= E1000_CTRL_EXT_DMA_DYN_CLK_EN;
6455         ew32(CTRL_EXT, mac_data);
6456
6457         /* No MAC DPG gating SLP_S0 in modern standby
6458          * Switch the logic of the lanphypc to use PMC counter
6459          */
6460         mac_data = er32(FEXTNVM5);
6461         mac_data |= BIT(7);
6462         ew32(FEXTNVM5, mac_data);
6463 }
6464
6465 static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter)
6466 {
6467         struct e1000_hw *hw = &adapter->hw;
6468         u32 mac_data;
6469         u16 phy_data;
6470
6471         /* Disable the Dynamic Power Gating in the MAC */
6472         mac_data = er32(FEXTNVM7);
6473         mac_data &= 0xFFBFFFFF;
6474         ew32(FEXTNVM7, mac_data);
6475
6476         /* Enable the time synchronization clock */
6477         mac_data = er32(FEXTNVM7);
6478         mac_data |= BIT(0);
6479         ew32(FEXTNVM7, mac_data);
6480
6481         /* Disable mPHY power gating for any link and speed */
6482         mac_data = er32(FEXTNVM8);
6483         mac_data &= ~BIT(9);
6484         ew32(FEXTNVM8, mac_data);
6485
6486         /* Disable K1 off */
6487         mac_data = er32(FEXTNVM6);
6488         mac_data &= ~BIT(31);
6489         ew32(FEXTNVM6, mac_data);
6490
6491         /* Disable Ungate PGCB clock */
6492         mac_data = er32(FEXTNVM9);
6493         mac_data |= BIT(28);
6494         ew32(FEXTNVM9, mac_data);
6495
6496         /* Cancel not waking from dynamic
6497          * Power Gating with clock request
6498          */
6499         mac_data = er32(FEXTNVM12);
6500         mac_data &= ~BIT(12);
6501         ew32(FEXTNVM12, mac_data);
6502
6503         /* Cancel disable disconnected cable conditioning
6504          * for Power Gating
6505          */
6506         mac_data = er32(DPGFR);
6507         mac_data &= ~BIT(2);
6508         ew32(DPGFR, mac_data);
6509
6510         /* Disable Dynamic Power Gating */
6511         mac_data = er32(CTRL_EXT);
6512         mac_data &= 0xFFFFFFF7;
6513         ew32(CTRL_EXT, mac_data);
6514
6515         /* Disable the Dynamic Clock Gating in the DMA and MAC */
6516         mac_data = er32(CTRL_EXT);
6517         mac_data &= 0xFFF7FFFF;
6518         ew32(CTRL_EXT, mac_data);
6519
6520         /* Revert the lanphypc logic to use the internal Gbe counter
6521          * and not the PMC counter
6522          */
6523         mac_data = er32(FEXTNVM5);
6524         mac_data &= 0xFFFFFF7F;
6525         ew32(FEXTNVM5, mac_data);
6526
6527         /* Enable the periodic inband message,
6528          * Request PCIe clock in K1 page770_17[10:9] =01b
6529          */
6530         e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6531         phy_data &= 0xFBFF;
6532         phy_data |= HV_PM_CTRL_K1_CLK_REQ;
6533         e1e_wphy(hw, HV_PM_CTRL, phy_data);
6534
6535         /* Return back configuration
6536          * 772_29[5] = 0 CS_Mode_Stay_In_K1
6537          */
6538         e1e_rphy(hw, I217_CGFREG, &phy_data);
6539         phy_data &= 0xFFDF;
6540         e1e_wphy(hw, I217_CGFREG, phy_data);
6541
6542         /* Change the MAC/PHY interface to Kumeran
6543          * Unforce the SMBus in PHY page769_23[0] = 0
6544          * Unforce the SMBus in MAC CTRL_EXT[11] = 0
6545          */
6546         e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6547         phy_data &= ~CV_SMB_CTRL_FORCE_SMBUS;
6548         e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6549         mac_data = er32(CTRL_EXT);
6550         mac_data &= ~E1000_CTRL_EXT_FORCE_SMBUS;
6551         ew32(CTRL_EXT, mac_data);
6552 }
6553
6554 static int e1000e_pm_freeze(struct device *dev)
6555 {
6556         struct net_device *netdev = dev_get_drvdata(dev);
6557         struct e1000_adapter *adapter = netdev_priv(netdev);
6558         bool present;
6559
6560         rtnl_lock();
6561
6562         present = netif_device_present(netdev);
6563         netif_device_detach(netdev);
6564
6565         if (present && netif_running(netdev)) {
6566                 int count = E1000_CHECK_RESET_COUNT;
6567
6568                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6569                         usleep_range(10000, 11000);
6570
6571                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6572
6573                 /* Quiesce the device without resetting the hardware */
6574                 e1000e_down(adapter, false);
6575                 e1000_free_irq(adapter);
6576         }
6577         rtnl_unlock();
6578
6579         e1000e_reset_interrupt_capability(adapter);
6580
6581         /* Allow time for pending master requests to run */
6582         e1000e_disable_pcie_master(&adapter->hw);
6583
6584         return 0;
6585 }
6586
6587 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6588 {
6589         struct net_device *netdev = pci_get_drvdata(pdev);
6590         struct e1000_adapter *adapter = netdev_priv(netdev);
6591         struct e1000_hw *hw = &adapter->hw;
6592         u32 ctrl, ctrl_ext, rctl, status, wufc;
6593         int retval = 0;
6594
6595         /* Runtime suspend should only enable wakeup for link changes */
6596         if (runtime)
6597                 wufc = E1000_WUFC_LNKC;
6598         else if (device_may_wakeup(&pdev->dev))
6599                 wufc = adapter->wol;
6600         else
6601                 wufc = 0;
6602
6603         status = er32(STATUS);
6604         if (status & E1000_STATUS_LU)
6605                 wufc &= ~E1000_WUFC_LNKC;
6606
6607         if (wufc) {
6608                 e1000_setup_rctl(adapter);
6609                 e1000e_set_rx_mode(netdev);
6610
6611                 /* turn on all-multi mode if wake on multicast is enabled */
6612                 if (wufc & E1000_WUFC_MC) {
6613                         rctl = er32(RCTL);
6614                         rctl |= E1000_RCTL_MPE;
6615                         ew32(RCTL, rctl);
6616                 }
6617
6618                 ctrl = er32(CTRL);
6619                 ctrl |= E1000_CTRL_ADVD3WUC;
6620                 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6621                         ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6622                 ew32(CTRL, ctrl);
6623
6624                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6625                     adapter->hw.phy.media_type ==
6626                     e1000_media_type_internal_serdes) {
6627                         /* keep the laser running in D3 */
6628                         ctrl_ext = er32(CTRL_EXT);
6629                         ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6630                         ew32(CTRL_EXT, ctrl_ext);
6631                 }
6632
6633                 if (!runtime)
6634                         e1000e_power_up_phy(adapter);
6635
6636                 if (adapter->flags & FLAG_IS_ICH)
6637                         e1000_suspend_workarounds_ich8lan(&adapter->hw);
6638
6639                 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6640                         /* enable wakeup by the PHY */
6641                         retval = e1000_init_phy_wakeup(adapter, wufc);
6642                         if (retval)
6643                                 return retval;
6644                 } else {
6645                         /* enable wakeup by the MAC */
6646                         ew32(WUFC, wufc);
6647                         ew32(WUC, E1000_WUC_PME_EN);
6648                 }
6649         } else {
6650                 ew32(WUC, 0);
6651                 ew32(WUFC, 0);
6652
6653                 e1000_power_down_phy(adapter);
6654         }
6655
6656         if (adapter->hw.phy.type == e1000_phy_igp_3) {
6657                 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6658         } else if (hw->mac.type >= e1000_pch_lpt) {
6659                 if (wufc && !(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6660                         /* ULP does not support wake from unicast, multicast
6661                          * or broadcast.
6662                          */
6663                         retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6664
6665                 if (retval)
6666                         return retval;
6667         }
6668
6669         /* Ensure that the appropriate bits are set in LPI_CTRL
6670          * for EEE in Sx
6671          */
6672         if ((hw->phy.type >= e1000_phy_i217) &&
6673             adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6674                 u16 lpi_ctrl = 0;
6675
6676                 retval = hw->phy.ops.acquire(hw);
6677                 if (!retval) {
6678                         retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6679                                                  &lpi_ctrl);
6680                         if (!retval) {
6681                                 if (adapter->eee_advert &
6682                                     hw->dev_spec.ich8lan.eee_lp_ability &
6683                                     I82579_EEE_100_SUPPORTED)
6684                                         lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6685                                 if (adapter->eee_advert &
6686                                     hw->dev_spec.ich8lan.eee_lp_ability &
6687                                     I82579_EEE_1000_SUPPORTED)
6688                                         lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6689
6690                                 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6691                                                          lpi_ctrl);
6692                         }
6693                 }
6694                 hw->phy.ops.release(hw);
6695         }
6696
6697         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6698          * would have already happened in close and is redundant.
6699          */
6700         e1000e_release_hw_control(adapter);
6701
6702         pci_clear_master(pdev);
6703
6704         /* The pci-e switch on some quad port adapters will report a
6705          * correctable error when the MAC transitions from D0 to D3.  To
6706          * prevent this we need to mask off the correctable errors on the
6707          * downstream port of the pci-e switch.
6708          *
6709          * We don't have the associated upstream bridge while assigning
6710          * the PCI device into guest. For example, the KVM on power is
6711          * one of the cases.
6712          */
6713         if (adapter->flags & FLAG_IS_QUAD_PORT) {
6714                 struct pci_dev *us_dev = pdev->bus->self;
6715                 u16 devctl;
6716
6717                 if (!us_dev)
6718                         return 0;
6719
6720                 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6721                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6722                                            (devctl & ~PCI_EXP_DEVCTL_CERE));
6723
6724                 pci_save_state(pdev);
6725                 pci_prepare_to_sleep(pdev);
6726
6727                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6728         }
6729
6730         return 0;
6731 }
6732
6733 /**
6734  * __e1000e_disable_aspm - Disable ASPM states
6735  * @pdev: pointer to PCI device struct
6736  * @state: bit-mask of ASPM states to disable
6737  * @locked: indication if this context holds pci_bus_sem locked.
6738  *
6739  * Some devices *must* have certain ASPM states disabled per hardware errata.
6740  **/
6741 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6742 {
6743         struct pci_dev *parent = pdev->bus->self;
6744         u16 aspm_dis_mask = 0;
6745         u16 pdev_aspmc, parent_aspmc;
6746
6747         switch (state) {
6748         case PCIE_LINK_STATE_L0S:
6749         case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6750                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6751                 fallthrough; /* can't have L1 without L0s */
6752         case PCIE_LINK_STATE_L1:
6753                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6754                 break;
6755         default:
6756                 return;
6757         }
6758
6759         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6760         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6761
6762         if (parent) {
6763                 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6764                                           &parent_aspmc);
6765                 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6766         }
6767
6768         /* Nothing to do if the ASPM states to be disabled already are */
6769         if (!(pdev_aspmc & aspm_dis_mask) &&
6770             (!parent || !(parent_aspmc & aspm_dis_mask)))
6771                 return;
6772
6773         dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6774                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6775                  "L0s" : "",
6776                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6777                  "L1" : "");
6778
6779 #ifdef CONFIG_PCIEASPM
6780         if (locked)
6781                 pci_disable_link_state_locked(pdev, state);
6782         else
6783                 pci_disable_link_state(pdev, state);
6784
6785         /* Double-check ASPM control.  If not disabled by the above, the
6786          * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6787          * not enabled); override by writing PCI config space directly.
6788          */
6789         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6790         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6791
6792         if (!(aspm_dis_mask & pdev_aspmc))
6793                 return;
6794 #endif
6795
6796         /* Both device and parent should have the same ASPM setting.
6797          * Disable ASPM in downstream component first and then upstream.
6798          */
6799         pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6800
6801         if (parent)
6802                 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6803                                            aspm_dis_mask);
6804 }
6805
6806 /**
6807  * e1000e_disable_aspm - Disable ASPM states.
6808  * @pdev: pointer to PCI device struct
6809  * @state: bit-mask of ASPM states to disable
6810  *
6811  * This function acquires the pci_bus_sem!
6812  * Some devices *must* have certain ASPM states disabled per hardware errata.
6813  **/
6814 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6815 {
6816         __e1000e_disable_aspm(pdev, state, 0);
6817 }
6818
6819 /**
6820  * e1000e_disable_aspm_locked   Disable ASPM states.
6821  * @pdev: pointer to PCI device struct
6822  * @state: bit-mask of ASPM states to disable
6823  *
6824  * This function must be called with pci_bus_sem acquired!
6825  * Some devices *must* have certain ASPM states disabled per hardware errata.
6826  **/
6827 static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6828 {
6829         __e1000e_disable_aspm(pdev, state, 1);
6830 }
6831
6832 static int e1000e_pm_thaw(struct device *dev)
6833 {
6834         struct net_device *netdev = dev_get_drvdata(dev);
6835         struct e1000_adapter *adapter = netdev_priv(netdev);
6836         int rc = 0;
6837
6838         e1000e_set_interrupt_capability(adapter);
6839
6840         rtnl_lock();
6841         if (netif_running(netdev)) {
6842                 rc = e1000_request_irq(adapter);
6843                 if (rc)
6844                         goto err_irq;
6845
6846                 e1000e_up(adapter);
6847         }
6848
6849         netif_device_attach(netdev);
6850 err_irq:
6851         rtnl_unlock();
6852
6853         return rc;
6854 }
6855
6856 static int __e1000_resume(struct pci_dev *pdev)
6857 {
6858         struct net_device *netdev = pci_get_drvdata(pdev);
6859         struct e1000_adapter *adapter = netdev_priv(netdev);
6860         struct e1000_hw *hw = &adapter->hw;
6861         u16 aspm_disable_flag = 0;
6862
6863         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6864                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6865         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6866                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6867         if (aspm_disable_flag)
6868                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6869
6870         pci_set_master(pdev);
6871
6872         if (hw->mac.type >= e1000_pch2lan)
6873                 e1000_resume_workarounds_pchlan(&adapter->hw);
6874
6875         e1000e_power_up_phy(adapter);
6876
6877         /* report the system wakeup cause from S3/S4 */
6878         if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6879                 u16 phy_data;
6880
6881                 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6882                 if (phy_data) {
6883                         e_info("PHY Wakeup cause - %s\n",
6884                                phy_data & E1000_WUS_EX ? "Unicast Packet" :
6885                                phy_data & E1000_WUS_MC ? "Multicast Packet" :
6886                                phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6887                                phy_data & E1000_WUS_MAG ? "Magic Packet" :
6888                                phy_data & E1000_WUS_LNKC ?
6889                                "Link Status Change" : "other");
6890                 }
6891                 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6892         } else {
6893                 u32 wus = er32(WUS);
6894
6895                 if (wus) {
6896                         e_info("MAC Wakeup cause - %s\n",
6897                                wus & E1000_WUS_EX ? "Unicast Packet" :
6898                                wus & E1000_WUS_MC ? "Multicast Packet" :
6899                                wus & E1000_WUS_BC ? "Broadcast Packet" :
6900                                wus & E1000_WUS_MAG ? "Magic Packet" :
6901                                wus & E1000_WUS_LNKC ? "Link Status Change" :
6902                                "other");
6903                 }
6904                 ew32(WUS, ~0);
6905         }
6906
6907         e1000e_reset(adapter);
6908
6909         e1000_init_manageability_pt(adapter);
6910
6911         /* If the controller has AMT, do not set DRV_LOAD until the interface
6912          * is up.  For all other cases, let the f/w know that the h/w is now
6913          * under the control of the driver.
6914          */
6915         if (!(adapter->flags & FLAG_HAS_AMT))
6916                 e1000e_get_hw_control(adapter);
6917
6918         return 0;
6919 }
6920
6921 static __maybe_unused int e1000e_pm_suspend(struct device *dev)
6922 {
6923         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6924         struct e1000_adapter *adapter = netdev_priv(netdev);
6925         struct pci_dev *pdev = to_pci_dev(dev);
6926         int rc;
6927
6928         e1000e_flush_lpic(pdev);
6929
6930         e1000e_pm_freeze(dev);
6931
6932         rc = __e1000_shutdown(pdev, false);
6933         if (rc) {
6934                 e1000e_pm_thaw(dev);
6935         } else {
6936                 /* Introduce S0ix implementation */
6937                 if (adapter->flags2 & FLAG2_ENABLE_S0IX_FLOWS)
6938                         e1000e_s0ix_entry_flow(adapter);
6939         }
6940
6941         return rc;
6942 }
6943
6944 static __maybe_unused int e1000e_pm_resume(struct device *dev)
6945 {
6946         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6947         struct e1000_adapter *adapter = netdev_priv(netdev);
6948         struct pci_dev *pdev = to_pci_dev(dev);
6949         int rc;
6950
6951         /* Introduce S0ix implementation */
6952         if (adapter->flags2 & FLAG2_ENABLE_S0IX_FLOWS)
6953                 e1000e_s0ix_exit_flow(adapter);
6954
6955         rc = __e1000_resume(pdev);
6956         if (rc)
6957                 return rc;
6958
6959         return e1000e_pm_thaw(dev);
6960 }
6961
6962 static __maybe_unused int e1000e_pm_runtime_idle(struct device *dev)
6963 {
6964         struct net_device *netdev = dev_get_drvdata(dev);
6965         struct e1000_adapter *adapter = netdev_priv(netdev);
6966         u16 eee_lp;
6967
6968         eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
6969
6970         if (!e1000e_has_link(adapter)) {
6971                 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
6972                 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
6973         }
6974
6975         return -EBUSY;
6976 }
6977
6978 static __maybe_unused int e1000e_pm_runtime_resume(struct device *dev)
6979 {
6980         struct pci_dev *pdev = to_pci_dev(dev);
6981         struct net_device *netdev = pci_get_drvdata(pdev);
6982         struct e1000_adapter *adapter = netdev_priv(netdev);
6983         int rc;
6984
6985         rc = __e1000_resume(pdev);
6986         if (rc)
6987                 return rc;
6988
6989         if (netdev->flags & IFF_UP)
6990                 e1000e_up(adapter);
6991
6992         return rc;
6993 }
6994
6995 static __maybe_unused int e1000e_pm_runtime_suspend(struct device *dev)
6996 {
6997         struct pci_dev *pdev = to_pci_dev(dev);
6998         struct net_device *netdev = pci_get_drvdata(pdev);
6999         struct e1000_adapter *adapter = netdev_priv(netdev);
7000
7001         if (netdev->flags & IFF_UP) {
7002                 int count = E1000_CHECK_RESET_COUNT;
7003
7004                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
7005                         usleep_range(10000, 11000);
7006
7007                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
7008
7009                 /* Down the device without resetting the hardware */
7010                 e1000e_down(adapter, false);
7011         }
7012
7013         if (__e1000_shutdown(pdev, true)) {
7014                 e1000e_pm_runtime_resume(dev);
7015                 return -EBUSY;
7016         }
7017
7018         return 0;
7019 }
7020
7021 static void e1000_shutdown(struct pci_dev *pdev)
7022 {
7023         e1000e_flush_lpic(pdev);
7024
7025         e1000e_pm_freeze(&pdev->dev);
7026
7027         __e1000_shutdown(pdev, false);
7028 }
7029
7030 #ifdef CONFIG_NET_POLL_CONTROLLER
7031
7032 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
7033 {
7034         struct net_device *netdev = data;
7035         struct e1000_adapter *adapter = netdev_priv(netdev);
7036
7037         if (adapter->msix_entries) {
7038                 int vector, msix_irq;
7039
7040                 vector = 0;
7041                 msix_irq = adapter->msix_entries[vector].vector;
7042                 if (disable_hardirq(msix_irq))
7043                         e1000_intr_msix_rx(msix_irq, netdev);
7044                 enable_irq(msix_irq);
7045
7046                 vector++;
7047                 msix_irq = adapter->msix_entries[vector].vector;
7048                 if (disable_hardirq(msix_irq))
7049                         e1000_intr_msix_tx(msix_irq, netdev);
7050                 enable_irq(msix_irq);
7051
7052                 vector++;
7053                 msix_irq = adapter->msix_entries[vector].vector;
7054                 if (disable_hardirq(msix_irq))
7055                         e1000_msix_other(msix_irq, netdev);
7056                 enable_irq(msix_irq);
7057         }
7058
7059         return IRQ_HANDLED;
7060 }
7061
7062 /**
7063  * e1000_netpoll
7064  * @netdev: network interface device structure
7065  *
7066  * Polling 'interrupt' - used by things like netconsole to send skbs
7067  * without having to re-enable interrupts. It's not called while
7068  * the interrupt routine is executing.
7069  */
7070 static void e1000_netpoll(struct net_device *netdev)
7071 {
7072         struct e1000_adapter *adapter = netdev_priv(netdev);
7073
7074         switch (adapter->int_mode) {
7075         case E1000E_INT_MODE_MSIX:
7076                 e1000_intr_msix(adapter->pdev->irq, netdev);
7077                 break;
7078         case E1000E_INT_MODE_MSI:
7079                 if (disable_hardirq(adapter->pdev->irq))
7080                         e1000_intr_msi(adapter->pdev->irq, netdev);
7081                 enable_irq(adapter->pdev->irq);
7082                 break;
7083         default:                /* E1000E_INT_MODE_LEGACY */
7084                 if (disable_hardirq(adapter->pdev->irq))
7085                         e1000_intr(adapter->pdev->irq, netdev);
7086                 enable_irq(adapter->pdev->irq);
7087                 break;
7088         }
7089 }
7090 #endif
7091
7092 /**
7093  * e1000_io_error_detected - called when PCI error is detected
7094  * @pdev: Pointer to PCI device
7095  * @state: The current pci connection state
7096  *
7097  * This function is called after a PCI bus error affecting
7098  * this device has been detected.
7099  */
7100 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
7101                                                 pci_channel_state_t state)
7102 {
7103         e1000e_pm_freeze(&pdev->dev);
7104
7105         if (state == pci_channel_io_perm_failure)
7106                 return PCI_ERS_RESULT_DISCONNECT;
7107
7108         pci_disable_device(pdev);
7109
7110         /* Request a slot slot reset. */
7111         return PCI_ERS_RESULT_NEED_RESET;
7112 }
7113
7114 /**
7115  * e1000_io_slot_reset - called after the pci bus has been reset.
7116  * @pdev: Pointer to PCI device
7117  *
7118  * Restart the card from scratch, as if from a cold-boot. Implementation
7119  * resembles the first-half of the e1000e_pm_resume routine.
7120  */
7121 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
7122 {
7123         struct net_device *netdev = pci_get_drvdata(pdev);
7124         struct e1000_adapter *adapter = netdev_priv(netdev);
7125         struct e1000_hw *hw = &adapter->hw;
7126         u16 aspm_disable_flag = 0;
7127         int err;
7128         pci_ers_result_t result;
7129
7130         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
7131                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7132         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
7133                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7134         if (aspm_disable_flag)
7135                 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
7136
7137         err = pci_enable_device_mem(pdev);
7138         if (err) {
7139                 dev_err(&pdev->dev,
7140                         "Cannot re-enable PCI device after reset.\n");
7141                 result = PCI_ERS_RESULT_DISCONNECT;
7142         } else {
7143                 pdev->state_saved = true;
7144                 pci_restore_state(pdev);
7145                 pci_set_master(pdev);
7146
7147                 pci_enable_wake(pdev, PCI_D3hot, 0);
7148                 pci_enable_wake(pdev, PCI_D3cold, 0);
7149
7150                 e1000e_reset(adapter);
7151                 ew32(WUS, ~0);
7152                 result = PCI_ERS_RESULT_RECOVERED;
7153         }
7154
7155         return result;
7156 }
7157
7158 /**
7159  * e1000_io_resume - called when traffic can start flowing again.
7160  * @pdev: Pointer to PCI device
7161  *
7162  * This callback is called when the error recovery driver tells us that
7163  * its OK to resume normal operation. Implementation resembles the
7164  * second-half of the e1000e_pm_resume routine.
7165  */
7166 static void e1000_io_resume(struct pci_dev *pdev)
7167 {
7168         struct net_device *netdev = pci_get_drvdata(pdev);
7169         struct e1000_adapter *adapter = netdev_priv(netdev);
7170
7171         e1000_init_manageability_pt(adapter);
7172
7173         e1000e_pm_thaw(&pdev->dev);
7174
7175         /* If the controller has AMT, do not set DRV_LOAD until the interface
7176          * is up.  For all other cases, let the f/w know that the h/w is now
7177          * under the control of the driver.
7178          */
7179         if (!(adapter->flags & FLAG_HAS_AMT))
7180                 e1000e_get_hw_control(adapter);
7181 }
7182
7183 static void e1000_print_device_info(struct e1000_adapter *adapter)
7184 {
7185         struct e1000_hw *hw = &adapter->hw;
7186         struct net_device *netdev = adapter->netdev;
7187         u32 ret_val;
7188         u8 pba_str[E1000_PBANUM_LENGTH];
7189
7190         /* print bus type/speed/width info */
7191         e_info("(PCI Express:2.5GT/s:%s) %pM\n",
7192                /* bus width */
7193                ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
7194                 "Width x1"),
7195                /* MAC address */
7196                netdev->dev_addr);
7197         e_info("Intel(R) PRO/%s Network Connection\n",
7198                (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
7199         ret_val = e1000_read_pba_string_generic(hw, pba_str,
7200                                                 E1000_PBANUM_LENGTH);
7201         if (ret_val)
7202                 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
7203         e_info("MAC: %d, PHY: %d, PBA No: %s\n",
7204                hw->mac.type, hw->phy.type, pba_str);
7205 }
7206
7207 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
7208 {
7209         struct e1000_hw *hw = &adapter->hw;
7210         int ret_val;
7211         u16 buf = 0;
7212
7213         if (hw->mac.type != e1000_82573)
7214                 return;
7215
7216         ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
7217         le16_to_cpus(&buf);
7218         if (!ret_val && (!(buf & BIT(0)))) {
7219                 /* Deep Smart Power Down (DSPD) */
7220                 dev_warn(&adapter->pdev->dev,
7221                          "Warning: detected DSPD enabled in EEPROM\n");
7222         }
7223 }
7224
7225 static netdev_features_t e1000_fix_features(struct net_device *netdev,
7226                                             netdev_features_t features)
7227 {
7228         struct e1000_adapter *adapter = netdev_priv(netdev);
7229         struct e1000_hw *hw = &adapter->hw;
7230
7231         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
7232         if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
7233                 features &= ~NETIF_F_RXFCS;
7234
7235         /* Since there is no support for separate Rx/Tx vlan accel
7236          * enable/disable make sure Tx flag is always in same state as Rx.
7237          */
7238         if (features & NETIF_F_HW_VLAN_CTAG_RX)
7239                 features |= NETIF_F_HW_VLAN_CTAG_TX;
7240         else
7241                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
7242
7243         return features;
7244 }
7245
7246 static int e1000_set_features(struct net_device *netdev,
7247                               netdev_features_t features)
7248 {
7249         struct e1000_adapter *adapter = netdev_priv(netdev);
7250         netdev_features_t changed = features ^ netdev->features;
7251
7252         if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
7253                 adapter->flags |= FLAG_TSO_FORCE;
7254
7255         if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
7256                          NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
7257                          NETIF_F_RXALL)))
7258                 return 0;
7259
7260         if (changed & NETIF_F_RXFCS) {
7261                 if (features & NETIF_F_RXFCS) {
7262                         adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7263                 } else {
7264                         /* We need to take it back to defaults, which might mean
7265                          * stripping is still disabled at the adapter level.
7266                          */
7267                         if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
7268                                 adapter->flags2 |= FLAG2_CRC_STRIPPING;
7269                         else
7270                                 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7271                 }
7272         }
7273
7274         netdev->features = features;
7275
7276         if (netif_running(netdev))
7277                 e1000e_reinit_locked(adapter);
7278         else
7279                 e1000e_reset(adapter);
7280
7281         return 1;
7282 }
7283
7284 static const struct net_device_ops e1000e_netdev_ops = {
7285         .ndo_open               = e1000e_open,
7286         .ndo_stop               = e1000e_close,
7287         .ndo_start_xmit         = e1000_xmit_frame,
7288         .ndo_get_stats64        = e1000e_get_stats64,
7289         .ndo_set_rx_mode        = e1000e_set_rx_mode,
7290         .ndo_set_mac_address    = e1000_set_mac,
7291         .ndo_change_mtu         = e1000_change_mtu,
7292         .ndo_do_ioctl           = e1000_ioctl,
7293         .ndo_tx_timeout         = e1000_tx_timeout,
7294         .ndo_validate_addr      = eth_validate_addr,
7295
7296         .ndo_vlan_rx_add_vid    = e1000_vlan_rx_add_vid,
7297         .ndo_vlan_rx_kill_vid   = e1000_vlan_rx_kill_vid,
7298 #ifdef CONFIG_NET_POLL_CONTROLLER
7299         .ndo_poll_controller    = e1000_netpoll,
7300 #endif
7301         .ndo_set_features = e1000_set_features,
7302         .ndo_fix_features = e1000_fix_features,
7303         .ndo_features_check     = passthru_features_check,
7304 };
7305
7306 /**
7307  * e1000_probe - Device Initialization Routine
7308  * @pdev: PCI device information struct
7309  * @ent: entry in e1000_pci_tbl
7310  *
7311  * Returns 0 on success, negative on failure
7312  *
7313  * e1000_probe initializes an adapter identified by a pci_dev structure.
7314  * The OS initialization, configuring of the adapter private structure,
7315  * and a hardware reset occur.
7316  **/
7317 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7318 {
7319         struct net_device *netdev;
7320         struct e1000_adapter *adapter;
7321         struct e1000_hw *hw;
7322         const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7323         resource_size_t mmio_start, mmio_len;
7324         resource_size_t flash_start, flash_len;
7325         static int cards_found;
7326         u16 aspm_disable_flag = 0;
7327         int bars, i, err, pci_using_dac;
7328         u16 eeprom_data = 0;
7329         u16 eeprom_apme_mask = E1000_EEPROM_APME;
7330         s32 ret_val = 0;
7331
7332         if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7333                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7334         if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7335                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7336         if (aspm_disable_flag)
7337                 e1000e_disable_aspm(pdev, aspm_disable_flag);
7338
7339         err = pci_enable_device_mem(pdev);
7340         if (err)
7341                 return err;
7342
7343         pci_using_dac = 0;
7344         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7345         if (!err) {
7346                 pci_using_dac = 1;
7347         } else {
7348                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7349                 if (err) {
7350                         dev_err(&pdev->dev,
7351                                 "No usable DMA configuration, aborting\n");
7352                         goto err_dma;
7353                 }
7354         }
7355
7356         bars = pci_select_bars(pdev, IORESOURCE_MEM);
7357         err = pci_request_selected_regions_exclusive(pdev, bars,
7358                                                      e1000e_driver_name);
7359         if (err)
7360                 goto err_pci_reg;
7361
7362         /* AER (Advanced Error Reporting) hooks */
7363         pci_enable_pcie_error_reporting(pdev);
7364
7365         pci_set_master(pdev);
7366         /* PCI config space info */
7367         err = pci_save_state(pdev);
7368         if (err)
7369                 goto err_alloc_etherdev;
7370
7371         err = -ENOMEM;
7372         netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7373         if (!netdev)
7374                 goto err_alloc_etherdev;
7375
7376         SET_NETDEV_DEV(netdev, &pdev->dev);
7377
7378         netdev->irq = pdev->irq;
7379
7380         pci_set_drvdata(pdev, netdev);
7381         adapter = netdev_priv(netdev);
7382         hw = &adapter->hw;
7383         adapter->netdev = netdev;
7384         adapter->pdev = pdev;
7385         adapter->ei = ei;
7386         adapter->pba = ei->pba;
7387         adapter->flags = ei->flags;
7388         adapter->flags2 = ei->flags2;
7389         adapter->hw.adapter = adapter;
7390         adapter->hw.mac.type = ei->mac;
7391         adapter->max_hw_frame_size = ei->max_hw_frame_size;
7392         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7393
7394         mmio_start = pci_resource_start(pdev, 0);
7395         mmio_len = pci_resource_len(pdev, 0);
7396
7397         err = -EIO;
7398         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7399         if (!adapter->hw.hw_addr)
7400                 goto err_ioremap;
7401
7402         if ((adapter->flags & FLAG_HAS_FLASH) &&
7403             (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7404             (hw->mac.type < e1000_pch_spt)) {
7405                 flash_start = pci_resource_start(pdev, 1);
7406                 flash_len = pci_resource_len(pdev, 1);
7407                 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7408                 if (!adapter->hw.flash_address)
7409                         goto err_flashmap;
7410         }
7411
7412         /* Set default EEE advertisement */
7413         if (adapter->flags2 & FLAG2_HAS_EEE)
7414                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7415
7416         /* construct the net_device struct */
7417         netdev->netdev_ops = &e1000e_netdev_ops;
7418         e1000e_set_ethtool_ops(netdev);
7419         netdev->watchdog_timeo = 5 * HZ;
7420         netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7421         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7422
7423         netdev->mem_start = mmio_start;
7424         netdev->mem_end = mmio_start + mmio_len;
7425
7426         adapter->bd_number = cards_found++;
7427
7428         e1000e_check_options(adapter);
7429
7430         /* setup adapter struct */
7431         err = e1000_sw_init(adapter);
7432         if (err)
7433                 goto err_sw_init;
7434
7435         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7436         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7437         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7438
7439         err = ei->get_variants(adapter);
7440         if (err)
7441                 goto err_hw_init;
7442
7443         if ((adapter->flags & FLAG_IS_ICH) &&
7444             (adapter->flags & FLAG_READ_ONLY_NVM) &&
7445             (hw->mac.type < e1000_pch_spt))
7446                 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7447
7448         hw->mac.ops.get_bus_info(&adapter->hw);
7449
7450         adapter->hw.phy.autoneg_wait_to_complete = 0;
7451
7452         /* Copper options */
7453         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7454                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7455                 adapter->hw.phy.disable_polarity_correction = 0;
7456                 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7457         }
7458
7459         if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7460                 dev_info(&pdev->dev,
7461                          "PHY reset is blocked due to SOL/IDER session.\n");
7462
7463         /* Set initial default active device features */
7464         netdev->features = (NETIF_F_SG |
7465                             NETIF_F_HW_VLAN_CTAG_RX |
7466                             NETIF_F_HW_VLAN_CTAG_TX |
7467                             NETIF_F_TSO |
7468                             NETIF_F_TSO6 |
7469                             NETIF_F_RXHASH |
7470                             NETIF_F_RXCSUM |
7471                             NETIF_F_HW_CSUM);
7472
7473         /* Set user-changeable features (subset of all device features) */
7474         netdev->hw_features = netdev->features;
7475         netdev->hw_features |= NETIF_F_RXFCS;
7476         netdev->priv_flags |= IFF_SUPP_NOFCS;
7477         netdev->hw_features |= NETIF_F_RXALL;
7478
7479         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7480                 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7481
7482         netdev->vlan_features |= (NETIF_F_SG |
7483                                   NETIF_F_TSO |
7484                                   NETIF_F_TSO6 |
7485                                   NETIF_F_HW_CSUM);
7486
7487         netdev->priv_flags |= IFF_UNICAST_FLT;
7488
7489         if (pci_using_dac) {
7490                 netdev->features |= NETIF_F_HIGHDMA;
7491                 netdev->vlan_features |= NETIF_F_HIGHDMA;
7492         }
7493
7494         /* MTU range: 68 - max_hw_frame_size */
7495         netdev->min_mtu = ETH_MIN_MTU;
7496         netdev->max_mtu = adapter->max_hw_frame_size -
7497                           (VLAN_ETH_HLEN + ETH_FCS_LEN);
7498
7499         if (e1000e_enable_mng_pass_thru(&adapter->hw))
7500                 adapter->flags |= FLAG_MNG_PT_ENABLED;
7501
7502         /* before reading the NVM, reset the controller to
7503          * put the device in a known good starting state
7504          */
7505         adapter->hw.mac.ops.reset_hw(&adapter->hw);
7506
7507         /* systems with ASPM and others may see the checksum fail on the first
7508          * attempt. Let's give it a few tries
7509          */
7510         for (i = 0;; i++) {
7511                 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7512                         break;
7513                 if (i == 2) {
7514                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7515                         err = -EIO;
7516                         goto err_eeprom;
7517                 }
7518         }
7519
7520         e1000_eeprom_checks(adapter);
7521
7522         /* copy the MAC address */
7523         if (e1000e_read_mac_addr(&adapter->hw))
7524                 dev_err(&pdev->dev,
7525                         "NVM Read Error while reading MAC address\n");
7526
7527         memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
7528
7529         if (!is_valid_ether_addr(netdev->dev_addr)) {
7530                 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7531                         netdev->dev_addr);
7532                 err = -EIO;
7533                 goto err_eeprom;
7534         }
7535
7536         timer_setup(&adapter->watchdog_timer, e1000_watchdog, 0);
7537         timer_setup(&adapter->phy_info_timer, e1000_update_phy_info, 0);
7538
7539         INIT_WORK(&adapter->reset_task, e1000_reset_task);
7540         INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7541         INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7542         INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7543         INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7544
7545         /* Initialize link parameters. User can change them with ethtool */
7546         adapter->hw.mac.autoneg = 1;
7547         adapter->fc_autoneg = true;
7548         adapter->hw.fc.requested_mode = e1000_fc_default;
7549         adapter->hw.fc.current_mode = e1000_fc_default;
7550         adapter->hw.phy.autoneg_advertised = 0x2f;
7551
7552         /* Initial Wake on LAN setting - If APM wake is enabled in
7553          * the EEPROM, enable the ACPI Magic Packet filter
7554          */
7555         if (adapter->flags & FLAG_APME_IN_WUC) {
7556                 /* APME bit in EEPROM is mapped to WUC.APME */
7557                 eeprom_data = er32(WUC);
7558                 eeprom_apme_mask = E1000_WUC_APME;
7559                 if ((hw->mac.type > e1000_ich10lan) &&
7560                     (eeprom_data & E1000_WUC_PHY_WAKE))
7561                         adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7562         } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7563                 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7564                     (adapter->hw.bus.func == 1))
7565                         ret_val = e1000_read_nvm(&adapter->hw,
7566                                               NVM_INIT_CONTROL3_PORT_B,
7567                                               1, &eeprom_data);
7568                 else
7569                         ret_val = e1000_read_nvm(&adapter->hw,
7570                                               NVM_INIT_CONTROL3_PORT_A,
7571                                               1, &eeprom_data);
7572         }
7573
7574         /* fetch WoL from EEPROM */
7575         if (ret_val)
7576                 e_dbg("NVM read error getting WoL initial values: %d\n", ret_val);
7577         else if (eeprom_data & eeprom_apme_mask)
7578                 adapter->eeprom_wol |= E1000_WUFC_MAG;
7579
7580         /* now that we have the eeprom settings, apply the special cases
7581          * where the eeprom may be wrong or the board simply won't support
7582          * wake on lan on a particular port
7583          */
7584         if (!(adapter->flags & FLAG_HAS_WOL))
7585                 adapter->eeprom_wol = 0;
7586
7587         /* initialize the wol settings based on the eeprom settings */
7588         adapter->wol = adapter->eeprom_wol;
7589
7590         /* make sure adapter isn't asleep if manageability is enabled */
7591         if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7592             (hw->mac.ops.check_mng_mode(hw)))
7593                 device_wakeup_enable(&pdev->dev);
7594
7595         /* save off EEPROM version number */
7596         ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7597
7598         if (ret_val) {
7599                 e_dbg("NVM read error getting EEPROM version: %d\n", ret_val);
7600                 adapter->eeprom_vers = 0;
7601         }
7602
7603         /* init PTP hardware clock */
7604         e1000e_ptp_init(adapter);
7605
7606         /* reset the hardware with the new settings */
7607         e1000e_reset(adapter);
7608
7609         /* If the controller has AMT, do not set DRV_LOAD until the interface
7610          * is up.  For all other cases, let the f/w know that the h/w is now
7611          * under the control of the driver.
7612          */
7613         if (!(adapter->flags & FLAG_HAS_AMT))
7614                 e1000e_get_hw_control(adapter);
7615
7616         if (hw->mac.type >= e1000_pch_cnp)
7617                 adapter->flags2 |= FLAG2_ENABLE_S0IX_FLOWS;
7618
7619         strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7620         err = register_netdev(netdev);
7621         if (err)
7622                 goto err_register;
7623
7624         /* carrier off reporting is important to ethtool even BEFORE open */
7625         netif_carrier_off(netdev);
7626
7627         e1000_print_device_info(adapter);
7628
7629         dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
7630
7631         if (pci_dev_run_wake(pdev) && hw->mac.type < e1000_pch_cnp)
7632                 pm_runtime_put_noidle(&pdev->dev);
7633
7634         return 0;
7635
7636 err_register:
7637         if (!(adapter->flags & FLAG_HAS_AMT))
7638                 e1000e_release_hw_control(adapter);
7639 err_eeprom:
7640         if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7641                 e1000_phy_hw_reset(&adapter->hw);
7642 err_hw_init:
7643         kfree(adapter->tx_ring);
7644         kfree(adapter->rx_ring);
7645 err_sw_init:
7646         if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7647                 iounmap(adapter->hw.flash_address);
7648         e1000e_reset_interrupt_capability(adapter);
7649 err_flashmap:
7650         iounmap(adapter->hw.hw_addr);
7651 err_ioremap:
7652         free_netdev(netdev);
7653 err_alloc_etherdev:
7654         pci_release_mem_regions(pdev);
7655 err_pci_reg:
7656 err_dma:
7657         pci_disable_device(pdev);
7658         return err;
7659 }
7660
7661 /**
7662  * e1000_remove - Device Removal Routine
7663  * @pdev: PCI device information struct
7664  *
7665  * e1000_remove is called by the PCI subsystem to alert the driver
7666  * that it should release a PCI device.  The could be caused by a
7667  * Hot-Plug event, or because the driver is going to be removed from
7668  * memory.
7669  **/
7670 static void e1000_remove(struct pci_dev *pdev)
7671 {
7672         struct net_device *netdev = pci_get_drvdata(pdev);
7673         struct e1000_adapter *adapter = netdev_priv(netdev);
7674
7675         e1000e_ptp_remove(adapter);
7676
7677         /* The timers may be rescheduled, so explicitly disable them
7678          * from being rescheduled.
7679          */
7680         set_bit(__E1000_DOWN, &adapter->state);
7681         del_timer_sync(&adapter->watchdog_timer);
7682         del_timer_sync(&adapter->phy_info_timer);
7683
7684         cancel_work_sync(&adapter->reset_task);
7685         cancel_work_sync(&adapter->watchdog_task);
7686         cancel_work_sync(&adapter->downshift_task);
7687         cancel_work_sync(&adapter->update_phy_task);
7688         cancel_work_sync(&adapter->print_hang_task);
7689
7690         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7691                 cancel_work_sync(&adapter->tx_hwtstamp_work);
7692                 if (adapter->tx_hwtstamp_skb) {
7693                         dev_consume_skb_any(adapter->tx_hwtstamp_skb);
7694                         adapter->tx_hwtstamp_skb = NULL;
7695                 }
7696         }
7697
7698         unregister_netdev(netdev);
7699
7700         if (pci_dev_run_wake(pdev))
7701                 pm_runtime_get_noresume(&pdev->dev);
7702
7703         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7704          * would have already happened in close and is redundant.
7705          */
7706         e1000e_release_hw_control(adapter);
7707
7708         e1000e_reset_interrupt_capability(adapter);
7709         kfree(adapter->tx_ring);
7710         kfree(adapter->rx_ring);
7711
7712         iounmap(adapter->hw.hw_addr);
7713         if ((adapter->hw.flash_address) &&
7714             (adapter->hw.mac.type < e1000_pch_spt))
7715                 iounmap(adapter->hw.flash_address);
7716         pci_release_mem_regions(pdev);
7717
7718         free_netdev(netdev);
7719
7720         /* AER disable */
7721         pci_disable_pcie_error_reporting(pdev);
7722
7723         pci_disable_device(pdev);
7724 }
7725
7726 /* PCI Error Recovery (ERS) */
7727 static const struct pci_error_handlers e1000_err_handler = {
7728         .error_detected = e1000_io_error_detected,
7729         .slot_reset = e1000_io_slot_reset,
7730         .resume = e1000_io_resume,
7731 };
7732
7733 static const struct pci_device_id e1000_pci_tbl[] = {
7734         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7735         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7736         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7737         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7738           board_82571 },
7739         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7740         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7741         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7742         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7743         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7744
7745         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7746         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7747         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7748         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7749
7750         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7751         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7752         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7753
7754         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7755         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7756         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7757
7758         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7759           board_80003es2lan },
7760         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7761           board_80003es2lan },
7762         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7763           board_80003es2lan },
7764         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7765           board_80003es2lan },
7766
7767         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7768         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7769         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7770         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7771         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7772         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7773         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7774         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7775
7776         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7777         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7778         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7779         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7780         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7781         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7782         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7783         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7784         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7785
7786         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7787         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7788         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7789
7790         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7791         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7792         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7793
7794         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7795         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7796         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7797         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7798
7799         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7800         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7801
7802         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7803         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7804         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7805         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7806         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7807         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7808         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7809         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7810         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7811         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7812         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7813         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7814         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7815         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7816         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7817         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7818         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7819         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM6), board_pch_cnp },
7820         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
7821         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
7822         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
7823         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM8), board_pch_cnp },
7824         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
7825         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
7826         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
7827         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM10), board_pch_cnp },
7828         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V10), board_pch_cnp },
7829         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM11), board_pch_cnp },
7830         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V11), board_pch_cnp },
7831         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM12), board_pch_spt },
7832         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V12), board_pch_spt },
7833         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM13), board_pch_cnp },
7834         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V13), board_pch_cnp },
7835         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM14), board_pch_cnp },
7836         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V14), board_pch_cnp },
7837         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM15), board_pch_cnp },
7838         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V15), board_pch_cnp },
7839         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM16), board_pch_cnp },
7840         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V16), board_pch_cnp },
7841         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM17), board_pch_cnp },
7842         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V17), board_pch_cnp },
7843         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM18), board_pch_cnp },
7844         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V18), board_pch_cnp },
7845         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM19), board_pch_cnp },
7846         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V19), board_pch_cnp },
7847
7848         { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7849 };
7850 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7851
7852 static const struct dev_pm_ops e1000_pm_ops = {
7853 #ifdef CONFIG_PM_SLEEP
7854         .suspend        = e1000e_pm_suspend,
7855         .resume         = e1000e_pm_resume,
7856         .freeze         = e1000e_pm_freeze,
7857         .thaw           = e1000e_pm_thaw,
7858         .poweroff       = e1000e_pm_suspend,
7859         .restore        = e1000e_pm_resume,
7860 #endif
7861         SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7862                            e1000e_pm_runtime_idle)
7863 };
7864
7865 /* PCI Device API Driver */
7866 static struct pci_driver e1000_driver = {
7867         .name     = e1000e_driver_name,
7868         .id_table = e1000_pci_tbl,
7869         .probe    = e1000_probe,
7870         .remove   = e1000_remove,
7871         .driver   = {
7872                 .pm = &e1000_pm_ops,
7873         },
7874         .shutdown = e1000_shutdown,
7875         .err_handler = &e1000_err_handler
7876 };
7877
7878 /**
7879  * e1000_init_module - Driver Registration Routine
7880  *
7881  * e1000_init_module is the first routine called when the driver is
7882  * loaded. All it does is register with the PCI subsystem.
7883  **/
7884 static int __init e1000_init_module(void)
7885 {
7886         pr_info("Intel(R) PRO/1000 Network Driver\n");
7887         pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7888
7889         return pci_register_driver(&e1000_driver);
7890 }
7891 module_init(e1000_init_module);
7892
7893 /**
7894  * e1000_exit_module - Driver Exit Cleanup Routine
7895  *
7896  * e1000_exit_module is called just before the driver is removed
7897  * from memory.
7898  **/
7899 static void __exit e1000_exit_module(void)
7900 {
7901         pci_unregister_driver(&e1000_driver);
7902 }
7903 module_exit(e1000_exit_module);
7904
7905 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7906 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7907 MODULE_LICENSE("GPL v2");
7908
7909 /* netdev.c */