drivers/net/ethernet/intel/e1000e/netdev.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   5
   6 #include <linux/module.h>
   7 #include <linux/types.h>
   8 #include <linux/init.h>
   9 #include <linux/pci.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/pagemap.h>
  12 #include <linux/delay.h>
  13 #include <linux/netdevice.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/tcp.h>
  16 #include <linux/ipv6.h>
  17 #include <linux/slab.h>
  18 #include <net/checksum.h>
  19 #include <net/ip6_checksum.h>
  20 #include <linux/ethtool.h>
  21 #include <linux/if_vlan.h>
  22 #include <linux/cpu.h>
  23 #include <linux/smp.h>
  24 #include <linux/pm_qos.h>
  25 #include <linux/pm_runtime.h>
  26 #include <linux/aer.h>
  27 #include <linux/prefetch.h>
  28 #include <linux/suspend.h>
  29
  30 #include "e1000.h"
  31
  32 char e1000e_driver_name[] = "e1000e";
  33
  34 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  35 static int debug = -1;
  36 module_param(debug, int, 0);
  37 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  38
  39 static const struct e1000_info *e1000_info_tbl[] = {
  40         [board_82571]           = &e1000_82571_info,
  41         [board_82572]           = &e1000_82572_info,
  42         [board_82573]           = &e1000_82573_info,
  43         [board_82574]           = &e1000_82574_info,
  44         [board_82583]           = &e1000_82583_info,
  45         [board_80003es2lan]     = &e1000_es2_info,
  46         [board_ich8lan]         = &e1000_ich8_info,
  47         [board_ich9lan]         = &e1000_ich9_info,
  48         [board_ich10lan]        = &e1000_ich10_info,
  49         [board_pchlan]          = &e1000_pch_info,
  50         [board_pch2lan]         = &e1000_pch2_info,
  51         [board_pch_lpt]         = &e1000_pch_lpt_info,
  52         [board_pch_spt]         = &e1000_pch_spt_info,
  53         [board_pch_cnp]         = &e1000_pch_cnp_info,
  54         [board_pch_tgp]         = &e1000_pch_tgp_info,
  55         [board_pch_adp]         = &e1000_pch_adp_info,
  56 };
  57
  58 struct e1000_reg_info {
  59         u32 ofs;
  60         char *name;
  61 };
  62
  63 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
  64         /* General Registers */
  65         {E1000_CTRL, "CTRL"},
  66         {E1000_STATUS, "STATUS"},
  67         {E1000_CTRL_EXT, "CTRL_EXT"},
  68
  69         /* Interrupt Registers */
  70         {E1000_ICR, "ICR"},
  71
  72         /* Rx Registers */
  73         {E1000_RCTL, "RCTL"},
  74         {E1000_RDLEN(0), "RDLEN"},
  75         {E1000_RDH(0), "RDH"},
  76         {E1000_RDT(0), "RDT"},
  77         {E1000_RDTR, "RDTR"},
  78         {E1000_RXDCTL(0), "RXDCTL"},
  79         {E1000_ERT, "ERT"},
  80         {E1000_RDBAL(0), "RDBAL"},
  81         {E1000_RDBAH(0), "RDBAH"},
  82         {E1000_RDFH, "RDFH"},
  83         {E1000_RDFT, "RDFT"},
  84         {E1000_RDFHS, "RDFHS"},
  85         {E1000_RDFTS, "RDFTS"},
  86         {E1000_RDFPC, "RDFPC"},
  87
  88         /* Tx Registers */
  89         {E1000_TCTL, "TCTL"},
  90         {E1000_TDBAL(0), "TDBAL"},
  91         {E1000_TDBAH(0), "TDBAH"},
  92         {E1000_TDLEN(0), "TDLEN"},
  93         {E1000_TDH(0), "TDH"},
  94         {E1000_TDT(0), "TDT"},
  95         {E1000_TIDV, "TIDV"},
  96         {E1000_TXDCTL(0), "TXDCTL"},
  97         {E1000_TADV, "TADV"},
  98         {E1000_TARC(0), "TARC"},
  99         {E1000_TDFH, "TDFH"},
 100         {E1000_TDFT, "TDFT"},
 101         {E1000_TDFHS, "TDFHS"},
 102         {E1000_TDFTS, "TDFTS"},
 103         {E1000_TDFPC, "TDFPC"},
 104
 105         /* List Terminator */
 106         {0, NULL}
 107 };
 108
 109 /**
 110  * __ew32_prepare - prepare to write to MAC CSR register on certain parts
 111  * @hw: pointer to the HW structure
 112  *
 113  * When updating the MAC CSR registers, the Manageability Engine (ME) could
 114  * be accessing the registers at the same time.  Normally, this is handled in
 115  * h/w by an arbiter but on some parts there is a bug that acknowledges Host
 116  * accesses later than it should which could result in the register to have
 117  * an incorrect value.  Workaround this by checking the FWSM register which
 118  * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
 119  * and try again a number of times.
 120  **/
 121 static void __ew32_prepare(struct e1000_hw *hw)
 122 {
 123         s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
 124
 125         while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
 126                 udelay(50);
 127 }
 128
 129 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
 130 {
 131         if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 132                 __ew32_prepare(hw);
 133
 134         writel(val, hw->hw_addr + reg);
 135 }
 136
 137 /**
 138  * e1000_regdump - register printout routine
 139  * @hw: pointer to the HW structure
 140  * @reginfo: pointer to the register info table
 141  **/
 142 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
 143 {
 144         int n = 0;
 145         char rname[16];
 146         u32 regs[8];
 147
 148         switch (reginfo->ofs) {
 149         case E1000_RXDCTL(0):
 150                 for (n = 0; n < 2; n++)
 151                         regs[n] = __er32(hw, E1000_RXDCTL(n));
 152                 break;
 153         case E1000_TXDCTL(0):
 154                 for (n = 0; n < 2; n++)
 155                         regs[n] = __er32(hw, E1000_TXDCTL(n));
 156                 break;
 157         case E1000_TARC(0):
 158                 for (n = 0; n < 2; n++)
 159                         regs[n] = __er32(hw, E1000_TARC(n));
 160                 break;
 161         default:
 162                 pr_info("%-15s %08x\n",
 163                         reginfo->name, __er32(hw, reginfo->ofs));
 164                 return;
 165         }
 166
 167         snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
 168         pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
 169 }
 170
 171 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
 172                                  struct e1000_buffer *bi)
 173 {
 174         int i;
 175         struct e1000_ps_page *ps_page;
 176
 177         for (i = 0; i < adapter->rx_ps_pages; i++) {
 178                 ps_page = &bi->ps_pages[i];
 179
 180                 if (ps_page->page) {
 181                         pr_info("packet dump for ps_page %d:\n", i);
 182                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 183                                        16, 1, page_address(ps_page->page),
 184                                        PAGE_SIZE, true);
 185                 }
 186         }
 187 }
 188
 189 /**
 190  * e1000e_dump - Print registers, Tx-ring and Rx-ring
 191  * @adapter: board private structure
 192  **/
 193 static void e1000e_dump(struct e1000_adapter *adapter)
 194 {
 195         struct net_device *netdev = adapter->netdev;
 196         struct e1000_hw *hw = &adapter->hw;
 197         struct e1000_reg_info *reginfo;
 198         struct e1000_ring *tx_ring = adapter->tx_ring;
 199         struct e1000_tx_desc *tx_desc;
 200         struct my_u0 {
 201                 __le64 a;
 202                 __le64 b;
 203         } *u0;
 204         struct e1000_buffer *buffer_info;
 205         struct e1000_ring *rx_ring = adapter->rx_ring;
 206         union e1000_rx_desc_packet_split *rx_desc_ps;
 207         union e1000_rx_desc_extended *rx_desc;
 208         struct my_u1 {
 209                 __le64 a;
 210                 __le64 b;
 211                 __le64 c;
 212                 __le64 d;
 213         } *u1;
 214         u32 staterr;
 215         int i = 0;
 216
 217         if (!netif_msg_hw(adapter))
 218                 return;
 219
 220         /* Print netdevice Info */
 221         if (netdev) {
 222                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 223                 pr_info("Device Name     state            trans_start\n");
 224                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 225                         netdev->state, dev_trans_start(netdev));
 226         }
 227
 228         /* Print Registers */
 229         dev_info(&adapter->pdev->dev, "Register Dump\n");
 230         pr_info(" Register Name   Value\n");
 231         for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
 232              reginfo->name; reginfo++) {
 233                 e1000_regdump(hw, reginfo);
 234         }
 235
 236         /* Print Tx Ring Summary */
 237         if (!netdev || !netif_running(netdev))
 238                 return;
 239
 240         dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
 241         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 242         buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
 243         pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
 244                 0, tx_ring->next_to_use, tx_ring->next_to_clean,
 245                 (unsigned long long)buffer_info->dma,
 246                 buffer_info->length,
 247                 buffer_info->next_to_watch,
 248                 (unsigned long long)buffer_info->time_stamp);
 249
 250         /* Print Tx Ring */
 251         if (!netif_msg_tx_done(adapter))
 252                 goto rx_ring_summary;
 253
 254         dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
 255
 256         /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
 257          *
 258          * Legacy Transmit Descriptor
 259          *   +--------------------------------------------------------------+
 260          * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
 261          *   +--------------------------------------------------------------+
 262          * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
 263          *   +--------------------------------------------------------------+
 264          *   63       48 47        36 35    32 31     24 23    16 15        0
 265          *
 266          * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
 267          *   63      48 47    40 39       32 31             16 15    8 7      0
 268          *   +----------------------------------------------------------------+
 269          * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
 270          *   +----------------------------------------------------------------+
 271          * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
 272          *   +----------------------------------------------------------------+
 273          *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
 274          *
 275          * Extended Data Descriptor (DTYP=0x1)
 276          *   +----------------------------------------------------------------+
 277          * 0 |                     Buffer Address [63:0]                      |
 278          *   +----------------------------------------------------------------+
 279          * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
 280          *   +----------------------------------------------------------------+
 281          *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
 282          */
 283         pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
 284         pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
 285         pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
 286         for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 287                 const char *next_desc;
 288                 tx_desc = E1000_TX_DESC(*tx_ring, i);
 289                 buffer_info = &tx_ring->buffer_info[i];
 290                 u0 = (struct my_u0 *)tx_desc;
 291                 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
 292                         next_desc = " NTC/U";
 293                 else if (i == tx_ring->next_to_use)
 294                         next_desc = " NTU";
 295                 else if (i == tx_ring->next_to_clean)
 296                         next_desc = " NTC";
 297                 else
 298                         next_desc = "";
 299                 pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
 300                         (!(le64_to_cpu(u0->b) & BIT(29)) ? 'l' :
 301                          ((le64_to_cpu(u0->b) & BIT(20)) ? 'd' : 'c')),
 302                         i,
 303                         (unsigned long long)le64_to_cpu(u0->a),
 304                         (unsigned long long)le64_to_cpu(u0->b),
 305                         (unsigned long long)buffer_info->dma,
 306                         buffer_info->length, buffer_info->next_to_watch,
 307                         (unsigned long long)buffer_info->time_stamp,
 308                         buffer_info->skb, next_desc);
 309
 310                 if (netif_msg_pktdata(adapter) && buffer_info->skb)
 311                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 312                                        16, 1, buffer_info->skb->data,
 313                                        buffer_info->skb->len, true);
 314         }
 315
 316         /* Print Rx Ring Summary */
 317 rx_ring_summary:
 318         dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
 319         pr_info("Queue [NTU] [NTC]\n");
 320         pr_info(" %5d %5X %5X\n",
 321                 0, rx_ring->next_to_use, rx_ring->next_to_clean);
 322
 323         /* Print Rx Ring */
 324         if (!netif_msg_rx_status(adapter))
 325                 return;
 326
 327         dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
 328         switch (adapter->rx_ps_pages) {
 329         case 1:
 330         case 2:
 331         case 3:
 332                 /* [Extended] Packet Split Receive Descriptor Format
 333                  *
 334                  *    +-----------------------------------------------------+
 335                  *  0 |                Buffer Address 0 [63:0]              |
 336                  *    +-----------------------------------------------------+
 337                  *  8 |                Buffer Address 1 [63:0]              |
 338                  *    +-----------------------------------------------------+
 339                  * 16 |                Buffer Address 2 [63:0]              |
 340                  *    +-----------------------------------------------------+
 341                  * 24 |                Buffer Address 3 [63:0]              |
 342                  *    +-----------------------------------------------------+
 343                  */
 344                 pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
 345                 /* [Extended] Receive Descriptor (Write-Back) Format
 346                  *
 347                  *   63       48 47    32 31     13 12    8 7    4 3        0
 348                  *   +------------------------------------------------------+
 349                  * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
 350                  *   | Checksum | Ident  |         | Queue |      |  Type   |
 351                  *   +------------------------------------------------------+
 352                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 353                  *   +------------------------------------------------------+
 354                  *   63       48 47    32 31            20 19               0
 355                  */
 356                 pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
 357                 for (i = 0; i < rx_ring->count; i++) {
 358                         const char *next_desc;
 359                         buffer_info = &rx_ring->buffer_info[i];
 360                         rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
 361                         u1 = (struct my_u1 *)rx_desc_ps;
 362                         staterr =
 363                             le32_to_cpu(rx_desc_ps->wb.middle.status_error);
 364
 365                         if (i == rx_ring->next_to_use)
 366                                 next_desc = " NTU";
 367                         else if (i == rx_ring->next_to_clean)
 368                                 next_desc = " NTC";
 369                         else
 370                                 next_desc = "";
 371
 372                         if (staterr & E1000_RXD_STAT_DD) {
 373                                 /* Descriptor Done */
 374                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
 375                                         "RWB", i,
 376                                         (unsigned long long)le64_to_cpu(u1->a),
 377                                         (unsigned long long)le64_to_cpu(u1->b),
 378                                         (unsigned long long)le64_to_cpu(u1->c),
 379                                         (unsigned long long)le64_to_cpu(u1->d),
 380                                         buffer_info->skb, next_desc);
 381                         } else {
 382                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
 383                                         "R  ", i,
 384                                         (unsigned long long)le64_to_cpu(u1->a),
 385                                         (unsigned long long)le64_to_cpu(u1->b),
 386                                         (unsigned long long)le64_to_cpu(u1->c),
 387                                         (unsigned long long)le64_to_cpu(u1->d),
 388                                         (unsigned long long)buffer_info->dma,
 389                                         buffer_info->skb, next_desc);
 390
 391                                 if (netif_msg_pktdata(adapter))
 392                                         e1000e_dump_ps_pages(adapter,
 393                                                              buffer_info);
 394                         }
 395                 }
 396                 break;
 397         default:
 398         case 0:
 399                 /* Extended Receive Descriptor (Read) Format
 400                  *
 401                  *   +-----------------------------------------------------+
 402                  * 0 |                Buffer Address [63:0]                |
 403                  *   +-----------------------------------------------------+
 404                  * 8 |                      Reserved                       |
 405                  *   +-----------------------------------------------------+
 406                  */
 407                 pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
 408                 /* Extended Receive Descriptor (Write-Back) Format
 409                  *
 410                  *   63       48 47    32 31    24 23            4 3        0
 411                  *   +------------------------------------------------------+
 412                  *   |     RSS Hash      |        |               |         |
 413                  * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
 414                  *   | Packet   | IP     |        |               |  Type   |
 415                  *   | Checksum | Ident  |        |               |         |
 416                  *   +------------------------------------------------------+
 417                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 418                  *   +------------------------------------------------------+
 419                  *   63       48 47    32 31            20 19               0
 420                  */
 421                 pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
 422
 423                 for (i = 0; i < rx_ring->count; i++) {
 424                         const char *next_desc;
 425
 426                         buffer_info = &rx_ring->buffer_info[i];
 427                         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 428                         u1 = (struct my_u1 *)rx_desc;
 429                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 430
 431                         if (i == rx_ring->next_to_use)
 432                                 next_desc = " NTU";
 433                         else if (i == rx_ring->next_to_clean)
 434                                 next_desc = " NTC";
 435                         else
 436                                 next_desc = "";
 437
 438                         if (staterr & E1000_RXD_STAT_DD) {
 439                                 /* Descriptor Done */
 440                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 441                                         "RWB", i,
 442                                         (unsigned long long)le64_to_cpu(u1->a),
 443                                         (unsigned long long)le64_to_cpu(u1->b),
 444                                         buffer_info->skb, next_desc);
 445                         } else {
 446                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
 447                                         "R  ", i,
 448                                         (unsigned long long)le64_to_cpu(u1->a),
 449                                         (unsigned long long)le64_to_cpu(u1->b),
 450                                         (unsigned long long)buffer_info->dma,
 451                                         buffer_info->skb, next_desc);
 452
 453                                 if (netif_msg_pktdata(adapter) &&
 454                                     buffer_info->skb)
 455                                         print_hex_dump(KERN_INFO, "",
 456                                                        DUMP_PREFIX_ADDRESS, 16,
 457                                                        1,
 458                                                        buffer_info->skb->data,
 459                                                        adapter->rx_buffer_len,
 460                                                        true);
 461                         }
 462                 }
 463         }
 464 }
 465
 466 /**
 467  * e1000_desc_unused - calculate if we have unused descriptors
 468  * @ring: pointer to ring struct to perform calculation on
 469  **/
 470 static int e1000_desc_unused(struct e1000_ring *ring)
 471 {
 472         if (ring->next_to_clean > ring->next_to_use)
 473                 return ring->next_to_clean - ring->next_to_use - 1;
 474
 475         return ring->count + ring->next_to_clean - ring->next_to_use - 1;
 476 }
 477
 478 /**
 479  * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
 480  * @adapter: board private structure
 481  * @hwtstamps: time stamp structure to update
 482  * @systim: unsigned 64bit system time value.
 483  *
 484  * Convert the system time value stored in the RX/TXSTMP registers into a
 485  * hwtstamp which can be used by the upper level time stamping functions.
 486  *
 487  * The 'systim_lock' spinlock is used to protect the consistency of the
 488  * system time value. This is needed because reading the 64 bit time
 489  * value involves reading two 32 bit registers. The first read latches the
 490  * value.
 491  **/
 492 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
 493                                       struct skb_shared_hwtstamps *hwtstamps,
 494                                       u64 systim)
 495 {
 496         u64 ns;
 497         unsigned long flags;
 498
 499         spin_lock_irqsave(&adapter->systim_lock, flags);
 500         ns = timecounter_cyc2time(&adapter->tc, systim);
 501         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 502
 503         memset(hwtstamps, 0, sizeof(*hwtstamps));
 504         hwtstamps->hwtstamp = ns_to_ktime(ns);
 505 }
 506
 507 /**
 508  * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
 509  * @adapter: board private structure
 510  * @status: descriptor extended error and status field
 511  * @skb: particular skb to include time stamp
 512  *
 513  * If the time stamp is valid, convert it into the timecounter ns value
 514  * and store that result into the shhwtstamps structure which is passed
 515  * up the network stack.
 516  **/
 517 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
 518                                struct sk_buff *skb)
 519 {
 520         struct e1000_hw *hw = &adapter->hw;
 521         u64 rxstmp;
 522
 523         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
 524             !(status & E1000_RXDEXT_STATERR_TST) ||
 525             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 526                 return;
 527
 528         /* The Rx time stamp registers contain the time stamp.  No other
 529          * received packet will be time stamped until the Rx time stamp
 530          * registers are read.  Because only one packet can be time stamped
 531          * at a time, the register values must belong to this packet and
 532          * therefore none of the other additional attributes need to be
 533          * compared.
 534          */
 535         rxstmp = (u64)er32(RXSTMPL);
 536         rxstmp |= (u64)er32(RXSTMPH) << 32;
 537         e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
 538
 539         adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
 540 }
 541
 542 /**
 543  * e1000_receive_skb - helper function to handle Rx indications
 544  * @adapter: board private structure
 545  * @netdev: pointer to netdev struct
 546  * @staterr: descriptor extended error and status field as written by hardware
 547  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
 548  * @skb: pointer to sk_buff to be indicated to stack
 549  **/
 550 static void e1000_receive_skb(struct e1000_adapter *adapter,
 551                               struct net_device *netdev, struct sk_buff *skb,
 552                               u32 staterr, __le16 vlan)
 553 {
 554         u16 tag = le16_to_cpu(vlan);
 555
 556         e1000e_rx_hwtstamp(adapter, staterr, skb);
 557
 558         skb->protocol = eth_type_trans(skb, netdev);
 559
 560         if (staterr & E1000_RXD_STAT_VP)
 561                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
 562
 563         napi_gro_receive(&adapter->napi, skb);
 564 }
 565
 566 /**
 567  * e1000_rx_checksum - Receive Checksum Offload
 568  * @adapter: board private structure
 569  * @status_err: receive descriptor status and error fields
 570  * @skb: socket buffer with received data
 571  **/
 572 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
 573                               struct sk_buff *skb)
 574 {
 575         u16 status = (u16)status_err;
 576         u8 errors = (u8)(status_err >> 24);
 577
 578         skb_checksum_none_assert(skb);
 579
 580         /* Rx checksum disabled */
 581         if (!(adapter->netdev->features & NETIF_F_RXCSUM))
 582                 return;
 583
 584         /* Ignore Checksum bit is set */
 585         if (status & E1000_RXD_STAT_IXSM)
 586                 return;
 587
 588         /* TCP/UDP checksum error bit or IP checksum error bit is set */
 589         if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
 590                 /* let the stack verify checksum errors */
 591                 adapter->hw_csum_err++;
 592                 return;
 593         }
 594
 595         /* TCP/UDP Checksum has not been calculated */
 596         if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
 597                 return;
 598
 599         /* It must be a TCP or UDP packet with a valid checksum */
 600         skb->ip_summed = CHECKSUM_UNNECESSARY;
 601         adapter->hw_csum_good++;
 602 }
 603
 604 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
 605 {
 606         struct e1000_adapter *adapter = rx_ring->adapter;
 607         struct e1000_hw *hw = &adapter->hw;
 608
 609         __ew32_prepare(hw);
 610         writel(i, rx_ring->tail);
 611
 612         if (unlikely(i != readl(rx_ring->tail))) {
 613                 u32 rctl = er32(RCTL);
 614
 615                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
 616                 e_err("ME firmware caused invalid RDT - resetting\n");
 617                 schedule_work(&adapter->reset_task);
 618         }
 619 }
 620
 621 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
 622 {
 623         struct e1000_adapter *adapter = tx_ring->adapter;
 624         struct e1000_hw *hw = &adapter->hw;
 625
 626         __ew32_prepare(hw);
 627         writel(i, tx_ring->tail);
 628
 629         if (unlikely(i != readl(tx_ring->tail))) {
 630                 u32 tctl = er32(TCTL);
 631
 632                 ew32(TCTL, tctl & ~E1000_TCTL_EN);
 633                 e_err("ME firmware caused invalid TDT - resetting\n");
 634                 schedule_work(&adapter->reset_task);
 635         }
 636 }
 637
 638 /**
 639  * e1000_alloc_rx_buffers - Replace used receive buffers
 640  * @rx_ring: Rx descriptor ring
 641  * @cleaned_count: number to reallocate
 642  * @gfp: flags for allocation
 643  **/
 644 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
 645                                    int cleaned_count, gfp_t gfp)
 646 {
 647         struct e1000_adapter *adapter = rx_ring->adapter;
 648         struct net_device *netdev = adapter->netdev;
 649         struct pci_dev *pdev = adapter->pdev;
 650         union e1000_rx_desc_extended *rx_desc;
 651         struct e1000_buffer *buffer_info;
 652         struct sk_buff *skb;
 653         unsigned int i;
 654         unsigned int bufsz = adapter->rx_buffer_len;
 655
 656         i = rx_ring->next_to_use;
 657         buffer_info = &rx_ring->buffer_info[i];
 658
 659         while (cleaned_count--) {
 660                 skb = buffer_info->skb;
 661                 if (skb) {
 662                         skb_trim(skb, 0);
 663                         goto map_skb;
 664                 }
 665
 666                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 667                 if (!skb) {
 668                         /* Better luck next round */
 669                         adapter->alloc_rx_buff_failed++;
 670                         break;
 671                 }
 672
 673                 buffer_info->skb = skb;
 674 map_skb:
 675                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 676                                                   adapter->rx_buffer_len,
 677                                                   DMA_FROM_DEVICE);
 678                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 679                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 680                         adapter->rx_dma_failed++;
 681                         break;
 682                 }
 683
 684                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 685                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 686
 687                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 688                         /* Force memory writes to complete before letting h/w
 689                          * know there are new descriptors to fetch.  (Only
 690                          * applicable for weak-ordered memory model archs,
 691                          * such as IA-64).
 692                          */
 693                         wmb();
 694                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 695                                 e1000e_update_rdt_wa(rx_ring, i);
 696                         else
 697                                 writel(i, rx_ring->tail);
 698                 }
 699                 i++;
 700                 if (i == rx_ring->count)
 701                         i = 0;
 702                 buffer_info = &rx_ring->buffer_info[i];
 703         }
 704
 705         rx_ring->next_to_use = i;
 706 }
 707
 708 /**
 709  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
 710  * @rx_ring: Rx descriptor ring
 711  * @cleaned_count: number to reallocate
 712  * @gfp: flags for allocation
 713  **/
 714 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
 715                                       int cleaned_count, gfp_t gfp)
 716 {
 717         struct e1000_adapter *adapter = rx_ring->adapter;
 718         struct net_device *netdev = adapter->netdev;
 719         struct pci_dev *pdev = adapter->pdev;
 720         union e1000_rx_desc_packet_split *rx_desc;
 721         struct e1000_buffer *buffer_info;
 722         struct e1000_ps_page *ps_page;
 723         struct sk_buff *skb;
 724         unsigned int i, j;
 725
 726         i = rx_ring->next_to_use;
 727         buffer_info = &rx_ring->buffer_info[i];
 728
 729         while (cleaned_count--) {
 730                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
 731
 732                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
 733                         ps_page = &buffer_info->ps_pages[j];
 734                         if (j >= adapter->rx_ps_pages) {
 735                                 /* all unused desc entries get hw null ptr */
 736                                 rx_desc->read.buffer_addr[j + 1] =
 737                                     ~cpu_to_le64(0);
 738                                 continue;
 739                         }
 740                         if (!ps_page->page) {
 741                                 ps_page->page = alloc_page(gfp);
 742                                 if (!ps_page->page) {
 743                                         adapter->alloc_rx_buff_failed++;
 744                                         goto no_buffers;
 745                                 }
 746                                 ps_page->dma = dma_map_page(&pdev->dev,
 747                                                             ps_page->page,
 748                                                             0, PAGE_SIZE,
 749                                                             DMA_FROM_DEVICE);
 750                                 if (dma_mapping_error(&pdev->dev,
 751                                                       ps_page->dma)) {
 752                                         dev_err(&adapter->pdev->dev,
 753                                                 "Rx DMA page map failed\n");
 754                                         adapter->rx_dma_failed++;
 755                                         goto no_buffers;
 756                                 }
 757                         }
 758                         /* Refresh the desc even if buffer_addrs
 759                          * didn't change because each write-back
 760                          * erases this info.
 761                          */
 762                         rx_desc->read.buffer_addr[j + 1] =
 763                             cpu_to_le64(ps_page->dma);
 764                 }
 765
 766                 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
 767                                                   gfp);
 768
 769                 if (!skb) {
 770                         adapter->alloc_rx_buff_failed++;
 771                         break;
 772                 }
 773
 774                 buffer_info->skb = skb;
 775                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 776                                                   adapter->rx_ps_bsize0,
 777                                                   DMA_FROM_DEVICE);
 778                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 779                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 780                         adapter->rx_dma_failed++;
 781                         /* cleanup skb */
 782                         dev_kfree_skb_any(skb);
 783                         buffer_info->skb = NULL;
 784                         break;
 785                 }
 786
 787                 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
 788
 789                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 790                         /* Force memory writes to complete before letting h/w
 791                          * know there are new descriptors to fetch.  (Only
 792                          * applicable for weak-ordered memory model archs,
 793                          * such as IA-64).
 794                          */
 795                         wmb();
 796                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 797                                 e1000e_update_rdt_wa(rx_ring, i << 1);
 798                         else
 799                                 writel(i << 1, rx_ring->tail);
 800                 }
 801
 802                 i++;
 803                 if (i == rx_ring->count)
 804                         i = 0;
 805                 buffer_info = &rx_ring->buffer_info[i];
 806         }
 807
 808 no_buffers:
 809         rx_ring->next_to_use = i;
 810 }
 811
 812 /**
 813  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
 814  * @rx_ring: Rx descriptor ring
 815  * @cleaned_count: number of buffers to allocate this pass
 816  * @gfp: flags for allocation
 817  **/
 818
 819 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
 820                                          int cleaned_count, gfp_t gfp)
 821 {
 822         struct e1000_adapter *adapter = rx_ring->adapter;
 823         struct net_device *netdev = adapter->netdev;
 824         struct pci_dev *pdev = adapter->pdev;
 825         union e1000_rx_desc_extended *rx_desc;
 826         struct e1000_buffer *buffer_info;
 827         struct sk_buff *skb;
 828         unsigned int i;
 829         unsigned int bufsz = 256 - 16;  /* for skb_reserve */
 830
 831         i = rx_ring->next_to_use;
 832         buffer_info = &rx_ring->buffer_info[i];
 833
 834         while (cleaned_count--) {
 835                 skb = buffer_info->skb;
 836                 if (skb) {
 837                         skb_trim(skb, 0);
 838                         goto check_page;
 839                 }
 840
 841                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 842                 if (unlikely(!skb)) {
 843                         /* Better luck next round */
 844                         adapter->alloc_rx_buff_failed++;
 845                         break;
 846                 }
 847
 848                 buffer_info->skb = skb;
 849 check_page:
 850                 /* allocate a new page if necessary */
 851                 if (!buffer_info->page) {
 852                         buffer_info->page = alloc_page(gfp);
 853                         if (unlikely(!buffer_info->page)) {
 854                                 adapter->alloc_rx_buff_failed++;
 855                                 break;
 856                         }
 857                 }
 858
 859                 if (!buffer_info->dma) {
 860                         buffer_info->dma = dma_map_page(&pdev->dev,
 861                                                         buffer_info->page, 0,
 862                                                         PAGE_SIZE,
 863                                                         DMA_FROM_DEVICE);
 864                         if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 865                                 adapter->alloc_rx_buff_failed++;
 866                                 break;
 867                         }
 868                 }
 869
 870                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 871                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 872
 873                 if (unlikely(++i == rx_ring->count))
 874                         i = 0;
 875                 buffer_info = &rx_ring->buffer_info[i];
 876         }
 877
 878         if (likely(rx_ring->next_to_use != i)) {
 879                 rx_ring->next_to_use = i;
 880                 if (unlikely(i-- == 0))
 881                         i = (rx_ring->count - 1);
 882
 883                 /* Force memory writes to complete before letting h/w
 884                  * know there are new descriptors to fetch.  (Only
 885                  * applicable for weak-ordered memory model archs,
 886                  * such as IA-64).
 887                  */
 888                 wmb();
 889                 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 890                         e1000e_update_rdt_wa(rx_ring, i);
 891                 else
 892                         writel(i, rx_ring->tail);
 893         }
 894 }
 895
 896 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
 897                                  struct sk_buff *skb)
 898 {
 899         if (netdev->features & NETIF_F_RXHASH)
 900                 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
 901 }
 902
 903 /**
 904  * e1000_clean_rx_irq - Send received data up the network stack
 905  * @rx_ring: Rx descriptor ring
 906  * @work_done: output parameter for indicating completed work
 907  * @work_to_do: how many packets we can clean
 908  *
 909  * the return value indicates whether actual cleaning was done, there
 910  * is no guarantee that everything was cleaned
 911  **/
 912 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
 913                                int work_to_do)
 914 {
 915         struct e1000_adapter *adapter = rx_ring->adapter;
 916         struct net_device *netdev = adapter->netdev;
 917         struct pci_dev *pdev = adapter->pdev;
 918         struct e1000_hw *hw = &adapter->hw;
 919         union e1000_rx_desc_extended *rx_desc, *next_rxd;
 920         struct e1000_buffer *buffer_info, *next_buffer;
 921         u32 length, staterr;
 922         unsigned int i;
 923         int cleaned_count = 0;
 924         bool cleaned = false;
 925         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 926
 927         i = rx_ring->next_to_clean;
 928         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 929         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 930         buffer_info = &rx_ring->buffer_info[i];
 931
 932         while (staterr & E1000_RXD_STAT_DD) {
 933                 struct sk_buff *skb;
 934
 935                 if (*work_done >= work_to_do)
 936                         break;
 937                 (*work_done)++;
 938                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
 939
 940                 skb = buffer_info->skb;
 941                 buffer_info->skb = NULL;
 942
 943                 prefetch(skb->data - NET_IP_ALIGN);
 944
 945                 i++;
 946                 if (i == rx_ring->count)
 947                         i = 0;
 948                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
 949                 prefetch(next_rxd);
 950
 951                 next_buffer = &rx_ring->buffer_info[i];
 952
 953                 cleaned = true;
 954                 cleaned_count++;
 955                 dma_unmap_single(&pdev->dev, buffer_info->dma,
 956                                  adapter->rx_buffer_len, DMA_FROM_DEVICE);
 957                 buffer_info->dma = 0;
 958
 959                 length = le16_to_cpu(rx_desc->wb.upper.length);
 960
 961                 /* !EOP means multiple descriptors were used to store a single
 962                  * packet, if that's the case we need to toss it.  In fact, we
 963                  * need to toss every packet with the EOP bit clear and the
 964                  * next frame that _does_ have the EOP bit set, as it is by
 965                  * definition only a frame fragment
 966                  */
 967                 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
 968                         adapter->flags2 |= FLAG2_IS_DISCARDING;
 969
 970                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
 971                         /* All receives must fit into a single buffer */
 972                         e_dbg("Receive packet consumed multiple buffers\n");
 973                         /* recycle */
 974                         buffer_info->skb = skb;
 975                         if (staterr & E1000_RXD_STAT_EOP)
 976                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 977                         goto next_desc;
 978                 }
 979
 980                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
 981                              !(netdev->features & NETIF_F_RXALL))) {
 982                         /* recycle */
 983                         buffer_info->skb = skb;
 984                         goto next_desc;
 985                 }
 986
 987                 /* adjust length to remove Ethernet CRC */
 988                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
 989                         /* If configured to store CRC, don't subtract FCS,
 990                          * but keep the FCS bytes out of the total_rx_bytes
 991                          * counter
 992                          */
 993                         if (netdev->features & NETIF_F_RXFCS)
 994                                 total_rx_bytes -= 4;
 995                         else
 996                                 length -= 4;
 997                 }
 998
 999                 total_rx_bytes += length;
1000                 total_rx_packets++;
1001
1002                 /* code added for copybreak, this should improve
1003                  * performance for small packets with large amounts
1004                  * of reassembly being done in the stack
1005                  */
1006                 if (length < copybreak) {
1007                         struct sk_buff *new_skb =
1008                                 napi_alloc_skb(&adapter->napi, length);
1009                         if (new_skb) {
1010                                 skb_copy_to_linear_data_offset(new_skb,
1011                                                                -NET_IP_ALIGN,
1012                                                                (skb->data -
1013                                                                 NET_IP_ALIGN),
1014                                                                (length +
1015                                                                 NET_IP_ALIGN));
1016                                 /* save the skb in buffer_info as good */
1017                                 buffer_info->skb = skb;
1018                                 skb = new_skb;
1019                         }
1020                         /* else just continue with the old one */
1021                 }
1022                 /* end copybreak code */
1023                 skb_put(skb, length);
1024
1025                 /* Receive Checksum Offload */
1026                 e1000_rx_checksum(adapter, staterr, skb);
1027
1028                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1029
1030                 e1000_receive_skb(adapter, netdev, skb, staterr,
1031                                   rx_desc->wb.upper.vlan);
1032
1033 next_desc:
1034                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1035
1036                 /* return some buffers to hardware, one at a time is too slow */
1037                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1038                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1039                                               GFP_ATOMIC);
1040                         cleaned_count = 0;
1041                 }
1042
1043                 /* use prefetched values */
1044                 rx_desc = next_rxd;
1045                 buffer_info = next_buffer;
1046
1047                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1048         }
1049         rx_ring->next_to_clean = i;
1050
1051         cleaned_count = e1000_desc_unused(rx_ring);
1052         if (cleaned_count)
1053                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1054
1055         adapter->total_rx_bytes += total_rx_bytes;
1056         adapter->total_rx_packets += total_rx_packets;
1057         return cleaned;
1058 }
1059
1060 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1061                             struct e1000_buffer *buffer_info,
1062                             bool drop)
1063 {
1064         struct e1000_adapter *adapter = tx_ring->adapter;
1065
1066         if (buffer_info->dma) {
1067                 if (buffer_info->mapped_as_page)
1068                         dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1069                                        buffer_info->length, DMA_TO_DEVICE);
1070                 else
1071                         dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1072                                          buffer_info->length, DMA_TO_DEVICE);
1073                 buffer_info->dma = 0;
1074         }
1075         if (buffer_info->skb) {
1076                 if (drop)
1077                         dev_kfree_skb_any(buffer_info->skb);
1078                 else
1079                         dev_consume_skb_any(buffer_info->skb);
1080                 buffer_info->skb = NULL;
1081         }
1082         buffer_info->time_stamp = 0;
1083 }
1084
1085 static void e1000_print_hw_hang(struct work_struct *work)
1086 {
1087         struct e1000_adapter *adapter = container_of(work,
1088                                                      struct e1000_adapter,
1089                                                      print_hang_task);
1090         struct net_device *netdev = adapter->netdev;
1091         struct e1000_ring *tx_ring = adapter->tx_ring;
1092         unsigned int i = tx_ring->next_to_clean;
1093         unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1094         struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1095         struct e1000_hw *hw = &adapter->hw;
1096         u16 phy_status, phy_1000t_status, phy_ext_status;
1097         u16 pci_status;
1098
1099         if (test_bit(__E1000_DOWN, &adapter->state))
1100                 return;
1101
1102         if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1103                 /* May be block on write-back, flush and detect again
1104                  * flush pending descriptor writebacks to memory
1105                  */
1106                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1107                 /* execute the writes immediately */
1108                 e1e_flush();
1109                 /* Due to rare timing issues, write to TIDV again to ensure
1110                  * the write is successful
1111                  */
1112                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1113                 /* execute the writes immediately */
1114                 e1e_flush();
1115                 adapter->tx_hang_recheck = true;
1116                 return;
1117         }
1118         adapter->tx_hang_recheck = false;
1119
1120         if (er32(TDH(0)) == er32(TDT(0))) {
1121                 e_dbg("false hang detected, ignoring\n");
1122                 return;
1123         }
1124
1125         /* Real hang detected */
1126         netif_stop_queue(netdev);
1127
1128         e1e_rphy(hw, MII_BMSR, &phy_status);
1129         e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1130         e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1131
1132         pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1133
1134         /* detected Hardware unit hang */
1135         e_err("Detected Hardware Unit Hang:\n"
1136               "  TDH                  <%x>\n"
1137               "  TDT                  <%x>\n"
1138               "  next_to_use          <%x>\n"
1139               "  next_to_clean        <%x>\n"
1140               "buffer_info[next_to_clean]:\n"
1141               "  time_stamp           <%lx>\n"
1142               "  next_to_watch        <%x>\n"
1143               "  jiffies              <%lx>\n"
1144               "  next_to_watch.status <%x>\n"
1145               "MAC Status             <%x>\n"
1146               "PHY Status             <%x>\n"
1147               "PHY 1000BASE-T Status  <%x>\n"
1148               "PHY Extended Status    <%x>\n"
1149               "PCI Status             <%x>\n",
1150               readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1151               tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1152               eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1153               phy_status, phy_1000t_status, phy_ext_status, pci_status);
1154
1155         e1000e_dump(adapter);
1156
1157         /* Suggest workaround for known h/w issue */
1158         if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1159                 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1160 }
1161
1162 /**
1163  * e1000e_tx_hwtstamp_work - check for Tx time stamp
1164  * @work: pointer to work struct
1165  *
1166  * This work function polls the TSYNCTXCTL valid bit to determine when a
1167  * timestamp has been taken for the current stored skb.  The timestamp must
1168  * be for this skb because only one such packet is allowed in the queue.
1169  */
1170 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1171 {
1172         struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1173                                                      tx_hwtstamp_work);
1174         struct e1000_hw *hw = &adapter->hw;
1175
1176         if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1177                 struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1178                 struct skb_shared_hwtstamps shhwtstamps;
1179                 u64 txstmp;
1180
1181                 txstmp = er32(TXSTMPL);
1182                 txstmp |= (u64)er32(TXSTMPH) << 32;
1183
1184                 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1185
1186                 /* Clear the global tx_hwtstamp_skb pointer and force writes
1187                  * prior to notifying the stack of a Tx timestamp.
1188                  */
1189                 adapter->tx_hwtstamp_skb = NULL;
1190                 wmb(); /* force write prior to skb_tstamp_tx */
1191
1192                 skb_tstamp_tx(skb, &shhwtstamps);
1193                 dev_consume_skb_any(skb);
1194         } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1195                               + adapter->tx_timeout_factor * HZ)) {
1196                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1197                 adapter->tx_hwtstamp_skb = NULL;
1198                 adapter->tx_hwtstamp_timeouts++;
1199                 e_warn("clearing Tx timestamp hang\n");
1200         } else {
1201                 /* reschedule to check later */
1202                 schedule_work(&adapter->tx_hwtstamp_work);
1203         }
1204 }
1205
1206 /**
1207  * e1000_clean_tx_irq - Reclaim resources after transmit completes
1208  * @tx_ring: Tx descriptor ring
1209  *
1210  * the return value indicates whether actual cleaning was done, there
1211  * is no guarantee that everything was cleaned
1212  **/
1213 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1214 {
1215         struct e1000_adapter *adapter = tx_ring->adapter;
1216         struct net_device *netdev = adapter->netdev;
1217         struct e1000_hw *hw = &adapter->hw;
1218         struct e1000_tx_desc *tx_desc, *eop_desc;
1219         struct e1000_buffer *buffer_info;
1220         unsigned int i, eop;
1221         unsigned int count = 0;
1222         unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1223         unsigned int bytes_compl = 0, pkts_compl = 0;
1224
1225         i = tx_ring->next_to_clean;
1226         eop = tx_ring->buffer_info[i].next_to_watch;
1227         eop_desc = E1000_TX_DESC(*tx_ring, eop);
1228
1229         while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1230                (count < tx_ring->count)) {
1231                 bool cleaned = false;
1232
1233                 dma_rmb();              /* read buffer_info after eop_desc */
1234                 for (; !cleaned; count++) {
1235                         tx_desc = E1000_TX_DESC(*tx_ring, i);
1236                         buffer_info = &tx_ring->buffer_info[i];
1237                         cleaned = (i == eop);
1238
1239                         if (cleaned) {
1240                                 total_tx_packets += buffer_info->segs;
1241                                 total_tx_bytes += buffer_info->bytecount;
1242                                 if (buffer_info->skb) {
1243                                         bytes_compl += buffer_info->skb->len;
1244                                         pkts_compl++;
1245                                 }
1246                         }
1247
1248                         e1000_put_txbuf(tx_ring, buffer_info, false);
1249                         tx_desc->upper.data = 0;
1250
1251                         i++;
1252                         if (i == tx_ring->count)
1253                                 i = 0;
1254                 }
1255
1256                 if (i == tx_ring->next_to_use)
1257                         break;
1258                 eop = tx_ring->buffer_info[i].next_to_watch;
1259                 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1260         }
1261
1262         tx_ring->next_to_clean = i;
1263
1264         netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1265
1266 #define TX_WAKE_THRESHOLD 32
1267         if (count && netif_carrier_ok(netdev) &&
1268             e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1269                 /* Make sure that anybody stopping the queue after this
1270                  * sees the new next_to_clean.
1271                  */
1272                 smp_mb();
1273
1274                 if (netif_queue_stopped(netdev) &&
1275                     !(test_bit(__E1000_DOWN, &adapter->state))) {
1276                         netif_wake_queue(netdev);
1277                         ++adapter->restart_queue;
1278                 }
1279         }
1280
1281         if (adapter->detect_tx_hung) {
1282                 /* Detect a transmit hang in hardware, this serializes the
1283                  * check with the clearing of time_stamp and movement of i
1284                  */
1285                 adapter->detect_tx_hung = false;
1286                 if (tx_ring->buffer_info[i].time_stamp &&
1287                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1288                                + (adapter->tx_timeout_factor * HZ)) &&
1289                     !(er32(STATUS) & E1000_STATUS_TXOFF))
1290                         schedule_work(&adapter->print_hang_task);
1291                 else
1292                         adapter->tx_hang_recheck = false;
1293         }
1294         adapter->total_tx_bytes += total_tx_bytes;
1295         adapter->total_tx_packets += total_tx_packets;
1296         return count < tx_ring->count;
1297 }
1298
1299 /**
1300  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1301  * @rx_ring: Rx descriptor ring
1302  * @work_done: output parameter for indicating completed work
1303  * @work_to_do: how many packets we can clean
1304  *
1305  * the return value indicates whether actual cleaning was done, there
1306  * is no guarantee that everything was cleaned
1307  **/
1308 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1309                                   int work_to_do)
1310 {
1311         struct e1000_adapter *adapter = rx_ring->adapter;
1312         struct e1000_hw *hw = &adapter->hw;
1313         union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1314         struct net_device *netdev = adapter->netdev;
1315         struct pci_dev *pdev = adapter->pdev;
1316         struct e1000_buffer *buffer_info, *next_buffer;
1317         struct e1000_ps_page *ps_page;
1318         struct sk_buff *skb;
1319         unsigned int i, j;
1320         u32 length, staterr;
1321         int cleaned_count = 0;
1322         bool cleaned = false;
1323         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1324
1325         i = rx_ring->next_to_clean;
1326         rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1327         staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1328         buffer_info = &rx_ring->buffer_info[i];
1329
1330         while (staterr & E1000_RXD_STAT_DD) {
1331                 if (*work_done >= work_to_do)
1332                         break;
1333                 (*work_done)++;
1334                 skb = buffer_info->skb;
1335                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1336
1337                 /* in the packet split case this is header only */
1338                 prefetch(skb->data - NET_IP_ALIGN);
1339
1340                 i++;
1341                 if (i == rx_ring->count)
1342                         i = 0;
1343                 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1344                 prefetch(next_rxd);
1345
1346                 next_buffer = &rx_ring->buffer_info[i];
1347
1348                 cleaned = true;
1349                 cleaned_count++;
1350                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1351                                  adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1352                 buffer_info->dma = 0;
1353
1354                 /* see !EOP comment in other Rx routine */
1355                 if (!(staterr & E1000_RXD_STAT_EOP))
1356                         adapter->flags2 |= FLAG2_IS_DISCARDING;
1357
1358                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1359                         e_dbg("Packet Split buffers didn't pick up the full packet\n");
1360                         dev_kfree_skb_irq(skb);
1361                         if (staterr & E1000_RXD_STAT_EOP)
1362                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1363                         goto next_desc;
1364                 }
1365
1366                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1367                              !(netdev->features & NETIF_F_RXALL))) {
1368                         dev_kfree_skb_irq(skb);
1369                         goto next_desc;
1370                 }
1371
1372                 length = le16_to_cpu(rx_desc->wb.middle.length0);
1373
1374                 if (!length) {
1375                         e_dbg("Last part of the packet spanning multiple descriptors\n");
1376                         dev_kfree_skb_irq(skb);
1377                         goto next_desc;
1378                 }
1379
1380                 /* Good Receive */
1381                 skb_put(skb, length);
1382
1383                 {
1384                         /* this looks ugly, but it seems compiler issues make
1385                          * it more efficient than reusing j
1386                          */
1387                         int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1388
1389                         /* page alloc/put takes too long and effects small
1390                          * packet throughput, so unsplit small packets and
1391                          * save the alloc/put only valid in softirq (napi)
1392                          * context to call kmap_*
1393                          */
1394                         if (l1 && (l1 <= copybreak) &&
1395                             ((length + l1) <= adapter->rx_ps_bsize0)) {
1396                                 u8 *vaddr;
1397
1398                                 ps_page = &buffer_info->ps_pages[0];
1399
1400                                 /* there is no documentation about how to call
1401                                  * kmap_atomic, so we can't hold the mapping
1402                                  * very long
1403                                  */
1404                                 dma_sync_single_for_cpu(&pdev->dev,
1405                                                         ps_page->dma,
1406                                                         PAGE_SIZE,
1407                                                         DMA_FROM_DEVICE);
1408                                 vaddr = kmap_atomic(ps_page->page);
1409                                 memcpy(skb_tail_pointer(skb), vaddr, l1);
1410                                 kunmap_atomic(vaddr);
1411                                 dma_sync_single_for_device(&pdev->dev,
1412                                                            ps_page->dma,
1413                                                            PAGE_SIZE,
1414                                                            DMA_FROM_DEVICE);
1415
1416                                 /* remove the CRC */
1417                                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1418                                         if (!(netdev->features & NETIF_F_RXFCS))
1419                                                 l1 -= 4;
1420                                 }
1421
1422                                 skb_put(skb, l1);
1423                                 goto copydone;
1424                         }       /* if */
1425                 }
1426
1427                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1428                         length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1429                         if (!length)
1430                                 break;
1431
1432                         ps_page = &buffer_info->ps_pages[j];
1433                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1434                                        DMA_FROM_DEVICE);
1435                         ps_page->dma = 0;
1436                         skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1437                         ps_page->page = NULL;
1438                         skb->len += length;
1439                         skb->data_len += length;
1440                         skb->truesize += PAGE_SIZE;
1441                 }
1442
1443                 /* strip the ethernet crc, problem is we're using pages now so
1444                  * this whole operation can get a little cpu intensive
1445                  */
1446                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1447                         if (!(netdev->features & NETIF_F_RXFCS))
1448                                 pskb_trim(skb, skb->len - 4);
1449                 }
1450
1451 copydone:
1452                 total_rx_bytes += skb->len;
1453                 total_rx_packets++;
1454
1455                 e1000_rx_checksum(adapter, staterr, skb);
1456
1457                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1458
1459                 if (rx_desc->wb.upper.header_status &
1460                     cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1461                         adapter->rx_hdr_split++;
1462
1463                 e1000_receive_skb(adapter, netdev, skb, staterr,
1464                                   rx_desc->wb.middle.vlan);
1465
1466 next_desc:
1467                 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1468                 buffer_info->skb = NULL;
1469
1470                 /* return some buffers to hardware, one at a time is too slow */
1471                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1472                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1473                                               GFP_ATOMIC);
1474                         cleaned_count = 0;
1475                 }
1476
1477                 /* use prefetched values */
1478                 rx_desc = next_rxd;
1479                 buffer_info = next_buffer;
1480
1481                 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1482         }
1483         rx_ring->next_to_clean = i;
1484
1485         cleaned_count = e1000_desc_unused(rx_ring);
1486         if (cleaned_count)
1487                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1488
1489         adapter->total_rx_bytes += total_rx_bytes;
1490         adapter->total_rx_packets += total_rx_packets;
1491         return cleaned;
1492 }
1493
1494 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1495                                u16 length)
1496 {
1497         bi->page = NULL;
1498         skb->len += length;
1499         skb->data_len += length;
1500         skb->truesize += PAGE_SIZE;
1501 }
1502
1503 /**
1504  * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1505  * @rx_ring: Rx descriptor ring
1506  * @work_done: output parameter for indicating completed work
1507  * @work_to_do: how many packets we can clean
1508  *
1509  * the return value indicates whether actual cleaning was done, there
1510  * is no guarantee that everything was cleaned
1511  **/
1512 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1513                                      int work_to_do)
1514 {
1515         struct e1000_adapter *adapter = rx_ring->adapter;
1516         struct net_device *netdev = adapter->netdev;
1517         struct pci_dev *pdev = adapter->pdev;
1518         union e1000_rx_desc_extended *rx_desc, *next_rxd;
1519         struct e1000_buffer *buffer_info, *next_buffer;
1520         u32 length, staterr;
1521         unsigned int i;
1522         int cleaned_count = 0;
1523         bool cleaned = false;
1524         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1525         struct skb_shared_info *shinfo;
1526
1527         i = rx_ring->next_to_clean;
1528         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1529         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1530         buffer_info = &rx_ring->buffer_info[i];
1531
1532         while (staterr & E1000_RXD_STAT_DD) {
1533                 struct sk_buff *skb;
1534
1535                 if (*work_done >= work_to_do)
1536                         break;
1537                 (*work_done)++;
1538                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1539
1540                 skb = buffer_info->skb;
1541                 buffer_info->skb = NULL;
1542
1543                 ++i;
1544                 if (i == rx_ring->count)
1545                         i = 0;
1546                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1547                 prefetch(next_rxd);
1548
1549                 next_buffer = &rx_ring->buffer_info[i];
1550
1551                 cleaned = true;
1552                 cleaned_count++;
1553                 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1554                                DMA_FROM_DEVICE);
1555                 buffer_info->dma = 0;
1556
1557                 length = le16_to_cpu(rx_desc->wb.upper.length);
1558
1559                 /* errors is only valid for DD + EOP descriptors */
1560                 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1561                              ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1562                               !(netdev->features & NETIF_F_RXALL)))) {
1563                         /* recycle both page and skb */
1564                         buffer_info->skb = skb;
1565                         /* an error means any chain goes out the window too */
1566                         if (rx_ring->rx_skb_top)
1567                                 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1568                         rx_ring->rx_skb_top = NULL;
1569                         goto next_desc;
1570                 }
1571 #define rxtop (rx_ring->rx_skb_top)
1572                 if (!(staterr & E1000_RXD_STAT_EOP)) {
1573                         /* this descriptor is only the beginning (or middle) */
1574                         if (!rxtop) {
1575                                 /* this is the beginning of a chain */
1576                                 rxtop = skb;
1577                                 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1578                                                    0, length);
1579                         } else {
1580                                 /* this is the middle of a chain */
1581                                 shinfo = skb_shinfo(rxtop);
1582                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1583                                                    buffer_info->page, 0,
1584                                                    length);
1585                                 /* re-use the skb, only consumed the page */
1586                                 buffer_info->skb = skb;
1587                         }
1588                         e1000_consume_page(buffer_info, rxtop, length);
1589                         goto next_desc;
1590                 } else {
1591                         if (rxtop) {
1592                                 /* end of the chain */
1593                                 shinfo = skb_shinfo(rxtop);
1594                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1595                                                    buffer_info->page, 0,
1596                                                    length);
1597                                 /* re-use the current skb, we only consumed the
1598                                  * page
1599                                  */
1600                                 buffer_info->skb = skb;
1601                                 skb = rxtop;
1602                                 rxtop = NULL;
1603                                 e1000_consume_page(buffer_info, skb, length);
1604                         } else {
1605                                 /* no chain, got EOP, this buf is the packet
1606                                  * copybreak to save the put_page/alloc_page
1607                                  */
1608                                 if (length <= copybreak &&
1609                                     skb_tailroom(skb) >= length) {
1610                                         u8 *vaddr;
1611                                         vaddr = kmap_atomic(buffer_info->page);
1612                                         memcpy(skb_tail_pointer(skb), vaddr,
1613                                                length);
1614                                         kunmap_atomic(vaddr);
1615                                         /* re-use the page, so don't erase
1616                                          * buffer_info->page
1617                                          */
1618                                         skb_put(skb, length);
1619                                 } else {
1620                                         skb_fill_page_desc(skb, 0,
1621                                                            buffer_info->page, 0,
1622                                                            length);
1623                                         e1000_consume_page(buffer_info, skb,
1624                                                            length);
1625                                 }
1626                         }
1627                 }
1628
1629                 /* Receive Checksum Offload */
1630                 e1000_rx_checksum(adapter, staterr, skb);
1631
1632                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1633
1634                 /* probably a little skewed due to removing CRC */
1635                 total_rx_bytes += skb->len;
1636                 total_rx_packets++;
1637
1638                 /* eth type trans needs skb->data to point to something */
1639                 if (!pskb_may_pull(skb, ETH_HLEN)) {
1640                         e_err("pskb_may_pull failed.\n");
1641                         dev_kfree_skb_irq(skb);
1642                         goto next_desc;
1643                 }
1644
1645                 e1000_receive_skb(adapter, netdev, skb, staterr,
1646                                   rx_desc->wb.upper.vlan);
1647
1648 next_desc:
1649                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1650
1651                 /* return some buffers to hardware, one at a time is too slow */
1652                 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1653                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1654                                               GFP_ATOMIC);
1655                         cleaned_count = 0;
1656                 }
1657
1658                 /* use prefetched values */
1659                 rx_desc = next_rxd;
1660                 buffer_info = next_buffer;
1661
1662                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1663         }
1664         rx_ring->next_to_clean = i;
1665
1666         cleaned_count = e1000_desc_unused(rx_ring);
1667         if (cleaned_count)
1668                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1669
1670         adapter->total_rx_bytes += total_rx_bytes;
1671         adapter->total_rx_packets += total_rx_packets;
1672         return cleaned;
1673 }
1674
1675 /**
1676  * e1000_clean_rx_ring - Free Rx Buffers per Queue
1677  * @rx_ring: Rx descriptor ring
1678  **/
1679 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1680 {
1681         struct e1000_adapter *adapter = rx_ring->adapter;
1682         struct e1000_buffer *buffer_info;
1683         struct e1000_ps_page *ps_page;
1684         struct pci_dev *pdev = adapter->pdev;
1685         unsigned int i, j;
1686
1687         /* Free all the Rx ring sk_buffs */
1688         for (i = 0; i < rx_ring->count; i++) {
1689                 buffer_info = &rx_ring->buffer_info[i];
1690                 if (buffer_info->dma) {
1691                         if (adapter->clean_rx == e1000_clean_rx_irq)
1692                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1693                                                  adapter->rx_buffer_len,
1694                                                  DMA_FROM_DEVICE);
1695                         else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1696                                 dma_unmap_page(&pdev->dev, buffer_info->dma,
1697                                                PAGE_SIZE, DMA_FROM_DEVICE);
1698                         else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1699                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1700                                                  adapter->rx_ps_bsize0,
1701                                                  DMA_FROM_DEVICE);
1702                         buffer_info->dma = 0;
1703                 }
1704
1705                 if (buffer_info->page) {
1706                         put_page(buffer_info->page);
1707                         buffer_info->page = NULL;
1708                 }
1709
1710                 if (buffer_info->skb) {
1711                         dev_kfree_skb(buffer_info->skb);
1712                         buffer_info->skb = NULL;
1713                 }
1714
1715                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1716                         ps_page = &buffer_info->ps_pages[j];
1717                         if (!ps_page->page)
1718                                 break;
1719                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1720                                        DMA_FROM_DEVICE);
1721                         ps_page->dma = 0;
1722                         put_page(ps_page->page);
1723                         ps_page->page = NULL;
1724                 }
1725         }
1726
1727         /* there also may be some cached data from a chained receive */
1728         if (rx_ring->rx_skb_top) {
1729                 dev_kfree_skb(rx_ring->rx_skb_top);
1730                 rx_ring->rx_skb_top = NULL;
1731         }
1732
1733         /* Zero out the descriptor ring */
1734         memset(rx_ring->desc, 0, rx_ring->size);
1735
1736         rx_ring->next_to_clean = 0;
1737         rx_ring->next_to_use = 0;
1738         adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1739 }
1740
1741 static void e1000e_downshift_workaround(struct work_struct *work)
1742 {
1743         struct e1000_adapter *adapter = container_of(work,
1744                                                      struct e1000_adapter,
1745                                                      downshift_task);
1746
1747         if (test_bit(__E1000_DOWN, &adapter->state))
1748                 return;
1749
1750         e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1751 }
1752
1753 /**
1754  * e1000_intr_msi - Interrupt Handler
1755  * @irq: interrupt number
1756  * @data: pointer to a network interface device structure
1757  **/
1758 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1759 {
1760         struct net_device *netdev = data;
1761         struct e1000_adapter *adapter = netdev_priv(netdev);
1762         struct e1000_hw *hw = &adapter->hw;
1763         u32 icr = er32(ICR);
1764
1765         /* read ICR disables interrupts using IAM */
1766         if (icr & E1000_ICR_LSC) {
1767                 hw->mac.get_link_status = true;
1768                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1769                  * disconnect (LSC) before accessing any PHY registers
1770                  */
1771                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1772                     (!(er32(STATUS) & E1000_STATUS_LU)))
1773                         schedule_work(&adapter->downshift_task);
1774
1775                 /* 80003ES2LAN workaround-- For packet buffer work-around on
1776                  * link down event; disable receives here in the ISR and reset
1777                  * adapter in watchdog
1778                  */
1779                 if (netif_carrier_ok(netdev) &&
1780                     adapter->flags & FLAG_RX_NEEDS_RESTART) {
1781                         /* disable receives */
1782                         u32 rctl = er32(RCTL);
1783
1784                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1785                         adapter->flags |= FLAG_RESTART_NOW;
1786                 }
1787                 /* guard against interrupt when we're going down */
1788                 if (!test_bit(__E1000_DOWN, &adapter->state))
1789                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1790         }
1791
1792         /* Reset on uncorrectable ECC error */
1793         if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1794                 u32 pbeccsts = er32(PBECCSTS);
1795
1796                 adapter->corr_errors +=
1797                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1798                 adapter->uncorr_errors +=
1799                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1800                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1801
1802                 /* Do the reset outside of interrupt context */
1803                 schedule_work(&adapter->reset_task);
1804
1805                 /* return immediately since reset is imminent */
1806                 return IRQ_HANDLED;
1807         }
1808
1809         if (napi_schedule_prep(&adapter->napi)) {
1810                 adapter->total_tx_bytes = 0;
1811                 adapter->total_tx_packets = 0;
1812                 adapter->total_rx_bytes = 0;
1813                 adapter->total_rx_packets = 0;
1814                 __napi_schedule(&adapter->napi);
1815         }
1816
1817         return IRQ_HANDLED;
1818 }
1819
1820 /**
1821  * e1000_intr - Interrupt Handler
1822  * @irq: interrupt number
1823  * @data: pointer to a network interface device structure
1824  **/
1825 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1826 {
1827         struct net_device *netdev = data;
1828         struct e1000_adapter *adapter = netdev_priv(netdev);
1829         struct e1000_hw *hw = &adapter->hw;
1830         u32 rctl, icr = er32(ICR);
1831
1832         if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1833                 return IRQ_NONE;        /* Not our interrupt */
1834
1835         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1836          * not set, then the adapter didn't send an interrupt
1837          */
1838         if (!(icr & E1000_ICR_INT_ASSERTED))
1839                 return IRQ_NONE;
1840
1841         /* Interrupt Auto-Mask...upon reading ICR,
1842          * interrupts are masked.  No need for the
1843          * IMC write
1844          */
1845
1846         if (icr & E1000_ICR_LSC) {
1847                 hw->mac.get_link_status = true;
1848                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1849                  * disconnect (LSC) before accessing any PHY registers
1850                  */
1851                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1852                     (!(er32(STATUS) & E1000_STATUS_LU)))
1853                         schedule_work(&adapter->downshift_task);
1854
1855                 /* 80003ES2LAN workaround--
1856                  * For packet buffer work-around on link down event;
1857                  * disable receives here in the ISR and
1858                  * reset adapter in watchdog
1859                  */
1860                 if (netif_carrier_ok(netdev) &&
1861                     (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1862                         /* disable receives */
1863                         rctl = er32(RCTL);
1864                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1865                         adapter->flags |= FLAG_RESTART_NOW;
1866                 }
1867                 /* guard against interrupt when we're going down */
1868                 if (!test_bit(__E1000_DOWN, &adapter->state))
1869                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1870         }
1871
1872         /* Reset on uncorrectable ECC error */
1873         if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1874                 u32 pbeccsts = er32(PBECCSTS);
1875
1876                 adapter->corr_errors +=
1877                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1878                 adapter->uncorr_errors +=
1879                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1880                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1881
1882                 /* Do the reset outside of interrupt context */
1883                 schedule_work(&adapter->reset_task);
1884
1885                 /* return immediately since reset is imminent */
1886                 return IRQ_HANDLED;
1887         }
1888
1889         if (napi_schedule_prep(&adapter->napi)) {
1890                 adapter->total_tx_bytes = 0;
1891                 adapter->total_tx_packets = 0;
1892                 adapter->total_rx_bytes = 0;
1893                 adapter->total_rx_packets = 0;
1894                 __napi_schedule(&adapter->napi);
1895         }
1896
1897         return IRQ_HANDLED;
1898 }
1899
1900 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1901 {
1902         struct net_device *netdev = data;
1903         struct e1000_adapter *adapter = netdev_priv(netdev);
1904         struct e1000_hw *hw = &adapter->hw;
1905         u32 icr = er32(ICR);
1906
1907         if (icr & adapter->eiac_mask)
1908                 ew32(ICS, (icr & adapter->eiac_mask));
1909
1910         if (icr & E1000_ICR_LSC) {
1911                 hw->mac.get_link_status = true;
1912                 /* guard against interrupt when we're going down */
1913                 if (!test_bit(__E1000_DOWN, &adapter->state))
1914                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1915         }
1916
1917         if (!test_bit(__E1000_DOWN, &adapter->state))
1918                 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
1919
1920         return IRQ_HANDLED;
1921 }
1922
1923 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1924 {
1925         struct net_device *netdev = data;
1926         struct e1000_adapter *adapter = netdev_priv(netdev);
1927         struct e1000_hw *hw = &adapter->hw;
1928         struct e1000_ring *tx_ring = adapter->tx_ring;
1929
1930         adapter->total_tx_bytes = 0;
1931         adapter->total_tx_packets = 0;
1932
1933         if (!e1000_clean_tx_irq(tx_ring))
1934                 /* Ring was not completely cleaned, so fire another interrupt */
1935                 ew32(ICS, tx_ring->ims_val);
1936
1937         if (!test_bit(__E1000_DOWN, &adapter->state))
1938                 ew32(IMS, adapter->tx_ring->ims_val);
1939
1940         return IRQ_HANDLED;
1941 }
1942
1943 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1944 {
1945         struct net_device *netdev = data;
1946         struct e1000_adapter *adapter = netdev_priv(netdev);
1947         struct e1000_ring *rx_ring = adapter->rx_ring;
1948
1949         /* Write the ITR value calculated at the end of the
1950          * previous interrupt.
1951          */
1952         if (rx_ring->set_itr) {
1953                 u32 itr = rx_ring->itr_val ?
1954                           1000000000 / (rx_ring->itr_val * 256) : 0;
1955
1956                 writel(itr, rx_ring->itr_register);
1957                 rx_ring->set_itr = 0;
1958         }
1959
1960         if (napi_schedule_prep(&adapter->napi)) {
1961                 adapter->total_rx_bytes = 0;
1962                 adapter->total_rx_packets = 0;
1963                 __napi_schedule(&adapter->napi);
1964         }
1965         return IRQ_HANDLED;
1966 }
1967
1968 /**
1969  * e1000_configure_msix - Configure MSI-X hardware
1970  * @adapter: board private structure
1971  *
1972  * e1000_configure_msix sets up the hardware to properly
1973  * generate MSI-X interrupts.
1974  **/
1975 static void e1000_configure_msix(struct e1000_adapter *adapter)
1976 {
1977         struct e1000_hw *hw = &adapter->hw;
1978         struct e1000_ring *rx_ring = adapter->rx_ring;
1979         struct e1000_ring *tx_ring = adapter->tx_ring;
1980         int vector = 0;
1981         u32 ctrl_ext, ivar = 0;
1982
1983         adapter->eiac_mask = 0;
1984
1985         /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1986         if (hw->mac.type == e1000_82574) {
1987                 u32 rfctl = er32(RFCTL);
1988
1989                 rfctl |= E1000_RFCTL_ACK_DIS;
1990                 ew32(RFCTL, rfctl);
1991         }
1992
1993         /* Configure Rx vector */
1994         rx_ring->ims_val = E1000_IMS_RXQ0;
1995         adapter->eiac_mask |= rx_ring->ims_val;
1996         if (rx_ring->itr_val)
1997                 writel(1000000000 / (rx_ring->itr_val * 256),
1998                        rx_ring->itr_register);
1999         else
2000                 writel(1, rx_ring->itr_register);
2001         ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
2002
2003         /* Configure Tx vector */
2004         tx_ring->ims_val = E1000_IMS_TXQ0;
2005         vector++;
2006         if (tx_ring->itr_val)
2007                 writel(1000000000 / (tx_ring->itr_val * 256),
2008                        tx_ring->itr_register);
2009         else
2010                 writel(1, tx_ring->itr_register);
2011         adapter->eiac_mask |= tx_ring->ims_val;
2012         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2013
2014         /* set vector for Other Causes, e.g. link changes */
2015         vector++;
2016         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2017         if (rx_ring->itr_val)
2018                 writel(1000000000 / (rx_ring->itr_val * 256),
2019                        hw->hw_addr + E1000_EITR_82574(vector));
2020         else
2021                 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2022
2023         /* Cause Tx interrupts on every write back */
2024         ivar |= BIT(31);
2025
2026         ew32(IVAR, ivar);
2027
2028         /* enable MSI-X PBA support */
2029         ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2030         ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2031         ew32(CTRL_EXT, ctrl_ext);
2032         e1e_flush();
2033 }
2034
2035 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2036 {
2037         if (adapter->msix_entries) {
2038                 pci_disable_msix(adapter->pdev);
2039                 kfree(adapter->msix_entries);
2040                 adapter->msix_entries = NULL;
2041         } else if (adapter->flags & FLAG_MSI_ENABLED) {
2042                 pci_disable_msi(adapter->pdev);
2043                 adapter->flags &= ~FLAG_MSI_ENABLED;
2044         }
2045 }
2046
2047 /**
2048  * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2049  * @adapter: board private structure
2050  *
2051  * Attempt to configure interrupts using the best available
2052  * capabilities of the hardware and kernel.
2053  **/
2054 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2055 {
2056         int err;
2057         int i;
2058
2059         switch (adapter->int_mode) {
2060         case E1000E_INT_MODE_MSIX:
2061                 if (adapter->flags & FLAG_HAS_MSIX) {
2062                         adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2063                         adapter->msix_entries = kcalloc(adapter->num_vectors,
2064                                                         sizeof(struct
2065                                                                msix_entry),
2066                                                         GFP_KERNEL);
2067                         if (adapter->msix_entries) {
2068                                 struct e1000_adapter *a = adapter;
2069
2070                                 for (i = 0; i < adapter->num_vectors; i++)
2071                                         adapter->msix_entries[i].entry = i;
2072
2073                                 err = pci_enable_msix_range(a->pdev,
2074                                                             a->msix_entries,
2075                                                             a->num_vectors,
2076                                                             a->num_vectors);
2077                                 if (err > 0)
2078                                         return;
2079                         }
2080                         /* MSI-X failed, so fall through and try MSI */
2081                         e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
2082                         e1000e_reset_interrupt_capability(adapter);
2083                 }
2084                 adapter->int_mode = E1000E_INT_MODE_MSI;
2085                 fallthrough;
2086         case E1000E_INT_MODE_MSI:
2087                 if (!pci_enable_msi(adapter->pdev)) {
2088                         adapter->flags |= FLAG_MSI_ENABLED;
2089                 } else {
2090                         adapter->int_mode = E1000E_INT_MODE_LEGACY;
2091                         e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
2092                 }
2093                 fallthrough;
2094         case E1000E_INT_MODE_LEGACY:
2095                 /* Don't do anything; this is the system default */
2096                 break;
2097         }
2098
2099         /* store the number of vectors being used */
2100         adapter->num_vectors = 1;
2101 }
2102
2103 /**
2104  * e1000_request_msix - Initialize MSI-X interrupts
2105  * @adapter: board private structure
2106  *
2107  * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2108  * kernel.
2109  **/
2110 static int e1000_request_msix(struct e1000_adapter *adapter)
2111 {
2112         struct net_device *netdev = adapter->netdev;
2113         int err = 0, vector = 0;
2114
2115         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2116                 snprintf(adapter->rx_ring->name,
2117                          sizeof(adapter->rx_ring->name) - 1,
2118                          "%.14s-rx-0", netdev->name);
2119         else
2120                 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2121         err = request_irq(adapter->msix_entries[vector].vector,
2122                           e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2123                           netdev);
2124         if (err)
2125                 return err;
2126         adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2127             E1000_EITR_82574(vector);
2128         adapter->rx_ring->itr_val = adapter->itr;
2129         vector++;
2130
2131         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2132                 snprintf(adapter->tx_ring->name,
2133                          sizeof(adapter->tx_ring->name) - 1,
2134                          "%.14s-tx-0", netdev->name);
2135         else
2136                 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2137         err = request_irq(adapter->msix_entries[vector].vector,
2138                           e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2139                           netdev);
2140         if (err)
2141                 return err;
2142         adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2143             E1000_EITR_82574(vector);
2144         adapter->tx_ring->itr_val = adapter->itr;
2145         vector++;
2146
2147         err = request_irq(adapter->msix_entries[vector].vector,
2148                           e1000_msix_other, 0, netdev->name, netdev);
2149         if (err)
2150                 return err;
2151
2152         e1000_configure_msix(adapter);
2153
2154         return 0;
2155 }
2156
2157 /**
2158  * e1000_request_irq - initialize interrupts
2159  * @adapter: board private structure
2160  *
2161  * Attempts to configure interrupts using the best available
2162  * capabilities of the hardware and kernel.
2163  **/
2164 static int e1000_request_irq(struct e1000_adapter *adapter)
2165 {
2166         struct net_device *netdev = adapter->netdev;
2167         int err;
2168
2169         if (adapter->msix_entries) {
2170                 err = e1000_request_msix(adapter);
2171                 if (!err)
2172                         return err;
2173                 /* fall back to MSI */
2174                 e1000e_reset_interrupt_capability(adapter);
2175                 adapter->int_mode = E1000E_INT_MODE_MSI;
2176                 e1000e_set_interrupt_capability(adapter);
2177         }
2178         if (adapter->flags & FLAG_MSI_ENABLED) {
2179                 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2180                                   netdev->name, netdev);
2181                 if (!err)
2182                         return err;
2183
2184                 /* fall back to legacy interrupt */
2185                 e1000e_reset_interrupt_capability(adapter);
2186                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2187         }
2188
2189         err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2190                           netdev->name, netdev);
2191         if (err)
2192                 e_err("Unable to allocate interrupt, Error: %d\n", err);
2193
2194         return err;
2195 }
2196
2197 static void e1000_free_irq(struct e1000_adapter *adapter)
2198 {
2199         struct net_device *netdev = adapter->netdev;
2200
2201         if (adapter->msix_entries) {
2202                 int vector = 0;
2203
2204                 free_irq(adapter->msix_entries[vector].vector, netdev);
2205                 vector++;
2206
2207                 free_irq(adapter->msix_entries[vector].vector, netdev);
2208                 vector++;
2209
2210                 /* Other Causes interrupt vector */
2211                 free_irq(adapter->msix_entries[vector].vector, netdev);
2212                 return;
2213         }
2214
2215         free_irq(adapter->pdev->irq, netdev);
2216 }
2217
2218 /**
2219  * e1000_irq_disable - Mask off interrupt generation on the NIC
2220  * @adapter: board private structure
2221  **/
2222 static void e1000_irq_disable(struct e1000_adapter *adapter)
2223 {
2224         struct e1000_hw *hw = &adapter->hw;
2225
2226         ew32(IMC, ~0);
2227         if (adapter->msix_entries)
2228                 ew32(EIAC_82574, 0);
2229         e1e_flush();
2230
2231         if (adapter->msix_entries) {
2232                 int i;
2233
2234                 for (i = 0; i < adapter->num_vectors; i++)
2235                         synchronize_irq(adapter->msix_entries[i].vector);
2236         } else {
2237                 synchronize_irq(adapter->pdev->irq);
2238         }
2239 }
2240
2241 /**
2242  * e1000_irq_enable - Enable default interrupt generation settings
2243  * @adapter: board private structure
2244  **/
2245 static void e1000_irq_enable(struct e1000_adapter *adapter)
2246 {
2247         struct e1000_hw *hw = &adapter->hw;
2248
2249         if (adapter->msix_entries) {
2250                 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2251                 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
2252                      IMS_OTHER_MASK);
2253         } else if (hw->mac.type >= e1000_pch_lpt) {
2254                 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2255         } else {
2256                 ew32(IMS, IMS_ENABLE_MASK);
2257         }
2258         e1e_flush();
2259 }
2260
2261 /**
2262  * e1000e_get_hw_control - get control of the h/w from f/w
2263  * @adapter: address of board private structure
2264  *
2265  * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2266  * For ASF and Pass Through versions of f/w this means that
2267  * the driver is loaded. For AMT version (only with 82573)
2268  * of the f/w this means that the network i/f is open.
2269  **/
2270 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2271 {
2272         struct e1000_hw *hw = &adapter->hw;
2273         u32 ctrl_ext;
2274         u32 swsm;
2275
2276         /* Let firmware know the driver has taken over */
2277         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2278                 swsm = er32(SWSM);
2279                 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2280         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2281                 ctrl_ext = er32(CTRL_EXT);
2282                 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2283         }
2284 }
2285
2286 /**
2287  * e1000e_release_hw_control - release control of the h/w to f/w
2288  * @adapter: address of board private structure
2289  *
2290  * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2291  * For ASF and Pass Through versions of f/w this means that the
2292  * driver is no longer loaded. For AMT version (only with 82573) i
2293  * of the f/w this means that the network i/f is closed.
2294  *
2295  **/
2296 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2297 {
2298         struct e1000_hw *hw = &adapter->hw;
2299         u32 ctrl_ext;
2300         u32 swsm;
2301
2302         /* Let firmware taken over control of h/w */
2303         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2304                 swsm = er32(SWSM);
2305                 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2306         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2307                 ctrl_ext = er32(CTRL_EXT);
2308                 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2309         }
2310 }
2311
2312 /**
2313  * e1000_alloc_ring_dma - allocate memory for a ring structure
2314  * @adapter: board private structure
2315  * @ring: ring struct for which to allocate dma
2316  **/
2317 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2318                                 struct e1000_ring *ring)
2319 {
2320         struct pci_dev *pdev = adapter->pdev;
2321
2322         ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2323                                         GFP_KERNEL);
2324         if (!ring->desc)
2325                 return -ENOMEM;
2326
2327         return 0;
2328 }
2329
2330 /**
2331  * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2332  * @tx_ring: Tx descriptor ring
2333  *
2334  * Return 0 on success, negative on failure
2335  **/
2336 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2337 {
2338         struct e1000_adapter *adapter = tx_ring->adapter;
2339         int err = -ENOMEM, size;
2340
2341         size = sizeof(struct e1000_buffer) * tx_ring->count;
2342         tx_ring->buffer_info = vzalloc(size);
2343         if (!tx_ring->buffer_info)
2344                 goto err;
2345
2346         /* round up to nearest 4K */
2347         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2348         tx_ring->size = ALIGN(tx_ring->size, 4096);
2349
2350         err = e1000_alloc_ring_dma(adapter, tx_ring);
2351         if (err)
2352                 goto err;
2353
2354         tx_ring->next_to_use = 0;
2355         tx_ring->next_to_clean = 0;
2356
2357         return 0;
2358 err:
2359         vfree(tx_ring->buffer_info);
2360         e_err("Unable to allocate memory for the transmit descriptor ring\n");
2361         return err;
2362 }
2363
2364 /**
2365  * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2366  * @rx_ring: Rx descriptor ring
2367  *
2368  * Returns 0 on success, negative on failure
2369  **/
2370 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2371 {
2372         struct e1000_adapter *adapter = rx_ring->adapter;
2373         struct e1000_buffer *buffer_info;
2374         int i, size, desc_len, err = -ENOMEM;
2375
2376         size = sizeof(struct e1000_buffer) * rx_ring->count;
2377         rx_ring->buffer_info = vzalloc(size);
2378         if (!rx_ring->buffer_info)
2379                 goto err;
2380
2381         for (i = 0; i < rx_ring->count; i++) {
2382                 buffer_info = &rx_ring->buffer_info[i];
2383                 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2384                                                 sizeof(struct e1000_ps_page),
2385                                                 GFP_KERNEL);
2386                 if (!buffer_info->ps_pages)
2387                         goto err_pages;
2388         }
2389
2390         desc_len = sizeof(union e1000_rx_desc_packet_split);
2391
2392         /* Round up to nearest 4K */
2393         rx_ring->size = rx_ring->count * desc_len;
2394         rx_ring->size = ALIGN(rx_ring->size, 4096);
2395
2396         err = e1000_alloc_ring_dma(adapter, rx_ring);
2397         if (err)
2398                 goto err_pages;
2399
2400         rx_ring->next_to_clean = 0;
2401         rx_ring->next_to_use = 0;
2402         rx_ring->rx_skb_top = NULL;
2403
2404         return 0;
2405
2406 err_pages:
2407         for (i = 0; i < rx_ring->count; i++) {
2408                 buffer_info = &rx_ring->buffer_info[i];
2409                 kfree(buffer_info->ps_pages);
2410         }
2411 err:
2412         vfree(rx_ring->buffer_info);
2413         e_err("Unable to allocate memory for the receive descriptor ring\n");
2414         return err;
2415 }
2416
2417 /**
2418  * e1000_clean_tx_ring - Free Tx Buffers
2419  * @tx_ring: Tx descriptor ring
2420  **/
2421 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2422 {
2423         struct e1000_adapter *adapter = tx_ring->adapter;
2424         struct e1000_buffer *buffer_info;
2425         unsigned long size;
2426         unsigned int i;
2427
2428         for (i = 0; i < tx_ring->count; i++) {
2429                 buffer_info = &tx_ring->buffer_info[i];
2430                 e1000_put_txbuf(tx_ring, buffer_info, false);
2431         }
2432
2433         netdev_reset_queue(adapter->netdev);
2434         size = sizeof(struct e1000_buffer) * tx_ring->count;
2435         memset(tx_ring->buffer_info, 0, size);
2436
2437         memset(tx_ring->desc, 0, tx_ring->size);
2438
2439         tx_ring->next_to_use = 0;
2440         tx_ring->next_to_clean = 0;
2441 }
2442
2443 /**
2444  * e1000e_free_tx_resources - Free Tx Resources per Queue
2445  * @tx_ring: Tx descriptor ring
2446  *
2447  * Free all transmit software resources
2448  **/
2449 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2450 {
2451         struct e1000_adapter *adapter = tx_ring->adapter;
2452         struct pci_dev *pdev = adapter->pdev;
2453
2454         e1000_clean_tx_ring(tx_ring);
2455
2456         vfree(tx_ring->buffer_info);
2457         tx_ring->buffer_info = NULL;
2458
2459         dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2460                           tx_ring->dma);
2461         tx_ring->desc = NULL;
2462 }
2463
2464 /**
2465  * e1000e_free_rx_resources - Free Rx Resources
2466  * @rx_ring: Rx descriptor ring
2467  *
2468  * Free all receive software resources
2469  **/
2470 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2471 {
2472         struct e1000_adapter *adapter = rx_ring->adapter;
2473         struct pci_dev *pdev = adapter->pdev;
2474         int i;
2475
2476         e1000_clean_rx_ring(rx_ring);
2477
2478         for (i = 0; i < rx_ring->count; i++)
2479                 kfree(rx_ring->buffer_info[i].ps_pages);
2480
2481         vfree(rx_ring->buffer_info);
2482         rx_ring->buffer_info = NULL;
2483
2484         dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2485                           rx_ring->dma);
2486         rx_ring->desc = NULL;
2487 }
2488
2489 /**
2490  * e1000_update_itr - update the dynamic ITR value based on statistics
2491  * @itr_setting: current adapter->itr
2492  * @packets: the number of packets during this measurement interval
2493  * @bytes: the number of bytes during this measurement interval
2494  *
2495  *      Stores a new ITR value based on packets and byte
2496  *      counts during the last interrupt.  The advantage of per interrupt
2497  *      computation is faster updates and more accurate ITR for the current
2498  *      traffic pattern.  Constants in this function were computed
2499  *      based on theoretical maximum wire speed and thresholds were set based
2500  *      on testing data as well as attempting to minimize response time
2501  *      while increasing bulk throughput.  This functionality is controlled
2502  *      by the InterruptThrottleRate module parameter.
2503  **/
2504 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2505 {
2506         unsigned int retval = itr_setting;
2507
2508         if (packets == 0)
2509                 return itr_setting;
2510
2511         switch (itr_setting) {
2512         case lowest_latency:
2513                 /* handle TSO and jumbo frames */
2514                 if (bytes / packets > 8000)
2515                         retval = bulk_latency;
2516                 else if ((packets < 5) && (bytes > 512))
2517                         retval = low_latency;
2518                 break;
2519         case low_latency:       /* 50 usec aka 20000 ints/s */
2520                 if (bytes > 10000) {
2521                         /* this if handles the TSO accounting */
2522                         if (bytes / packets > 8000)
2523                                 retval = bulk_latency;
2524                         else if ((packets < 10) || ((bytes / packets) > 1200))
2525                                 retval = bulk_latency;
2526                         else if ((packets > 35))
2527                                 retval = lowest_latency;
2528                 } else if (bytes / packets > 2000) {
2529                         retval = bulk_latency;
2530                 } else if (packets <= 2 && bytes < 512) {
2531                         retval = lowest_latency;
2532                 }
2533                 break;
2534         case bulk_latency:      /* 250 usec aka 4000 ints/s */
2535                 if (bytes > 25000) {
2536                         if (packets > 35)
2537                                 retval = low_latency;
2538                 } else if (bytes < 6000) {
2539                         retval = low_latency;
2540                 }
2541                 break;
2542         }
2543
2544         return retval;
2545 }
2546
2547 static void e1000_set_itr(struct e1000_adapter *adapter)
2548 {
2549         u16 current_itr;
2550         u32 new_itr = adapter->itr;
2551
2552         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2553         if (adapter->link_speed != SPEED_1000) {
2554                 current_itr = 0;
2555                 new_itr = 4000;
2556                 goto set_itr_now;
2557         }
2558
2559         if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2560                 new_itr = 0;
2561                 goto set_itr_now;
2562         }
2563
2564         adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2565                                            adapter->total_tx_packets,
2566                                            adapter->total_tx_bytes);
2567         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2568         if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2569                 adapter->tx_itr = low_latency;
2570
2571         adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2572                                            adapter->total_rx_packets,
2573                                            adapter->total_rx_bytes);
2574         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2575         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2576                 adapter->rx_itr = low_latency;
2577
2578         current_itr = max(adapter->rx_itr, adapter->tx_itr);
2579
2580         /* counts and packets in update_itr are dependent on these numbers */
2581         switch (current_itr) {
2582         case lowest_latency:
2583                 new_itr = 70000;
2584                 break;
2585         case low_latency:
2586                 new_itr = 20000;        /* aka hwitr = ~200 */
2587                 break;
2588         case bulk_latency:
2589                 new_itr = 4000;
2590                 break;
2591         default:
2592                 break;
2593         }
2594
2595 set_itr_now:
2596         if (new_itr != adapter->itr) {
2597                 /* this attempts to bias the interrupt rate towards Bulk
2598                  * by adding intermediate steps when interrupt rate is
2599                  * increasing
2600                  */
2601                 new_itr = new_itr > adapter->itr ?
2602                     min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2603                 adapter->itr = new_itr;
2604                 adapter->rx_ring->itr_val = new_itr;
2605                 if (adapter->msix_entries)
2606                         adapter->rx_ring->set_itr = 1;
2607                 else
2608                         e1000e_write_itr(adapter, new_itr);
2609         }
2610 }
2611
2612 /**
2613  * e1000e_write_itr - write the ITR value to the appropriate registers
2614  * @adapter: address of board private structure
2615  * @itr: new ITR value to program
2616  *
2617  * e1000e_write_itr determines if the adapter is in MSI-X mode
2618  * and, if so, writes the EITR registers with the ITR value.
2619  * Otherwise, it writes the ITR value into the ITR register.
2620  **/
2621 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2622 {
2623         struct e1000_hw *hw = &adapter->hw;
2624         u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2625
2626         if (adapter->msix_entries) {
2627                 int vector;
2628
2629                 for (vector = 0; vector < adapter->num_vectors; vector++)
2630                         writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2631         } else {
2632                 ew32(ITR, new_itr);
2633         }
2634 }
2635
2636 /**
2637  * e1000_alloc_queues - Allocate memory for all rings
2638  * @adapter: board private structure to initialize
2639  **/
2640 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2641 {
2642         int size = sizeof(struct e1000_ring);
2643
2644         adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2645         if (!adapter->tx_ring)
2646                 goto err;
2647         adapter->tx_ring->count = adapter->tx_ring_count;
2648         adapter->tx_ring->adapter = adapter;
2649
2650         adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2651         if (!adapter->rx_ring)
2652                 goto err;
2653         adapter->rx_ring->count = adapter->rx_ring_count;
2654         adapter->rx_ring->adapter = adapter;
2655
2656         return 0;
2657 err:
2658         e_err("Unable to allocate memory for queues\n");
2659         kfree(adapter->rx_ring);
2660         kfree(adapter->tx_ring);
2661         return -ENOMEM;
2662 }
2663
2664 /**
2665  * e1000e_poll - NAPI Rx polling callback
2666  * @napi: struct associated with this polling callback
2667  * @budget: number of packets driver is allowed to process this poll
2668  **/
2669 static int e1000e_poll(struct napi_struct *napi, int budget)
2670 {
2671         struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2672                                                      napi);
2673         struct e1000_hw *hw = &adapter->hw;
2674         struct net_device *poll_dev = adapter->netdev;
2675         int tx_cleaned = 1, work_done = 0;
2676
2677         adapter = netdev_priv(poll_dev);
2678
2679         if (!adapter->msix_entries ||
2680             (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2681                 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2682
2683         adapter->clean_rx(adapter->rx_ring, &work_done, budget);
2684
2685         if (!tx_cleaned || work_done == budget)
2686                 return budget;
2687
2688         /* Exit the polling mode, but don't re-enable interrupts if stack might
2689          * poll us due to busy-polling
2690          */
2691         if (likely(napi_complete_done(napi, work_done))) {
2692                 if (adapter->itr_setting & 3)
2693                         e1000_set_itr(adapter);
2694                 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2695                         if (adapter->msix_entries)
2696                                 ew32(IMS, adapter->rx_ring->ims_val);
2697                         else
2698                                 e1000_irq_enable(adapter);
2699                 }
2700         }
2701
2702         return work_done;
2703 }
2704
2705 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2706                                  __always_unused __be16 proto, u16 vid)
2707 {
2708         struct e1000_adapter *adapter = netdev_priv(netdev);
2709         struct e1000_hw *hw = &adapter->hw;
2710         u32 vfta, index;
2711
2712         /* don't update vlan cookie if already programmed */
2713         if ((adapter->hw.mng_cookie.status &
2714              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2715             (vid == adapter->mng_vlan_id))
2716                 return 0;
2717
2718         /* add VID to filter table */
2719         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2720                 index = (vid >> 5) & 0x7F;
2721                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2722                 vfta |= BIT((vid & 0x1F));
2723                 hw->mac.ops.write_vfta(hw, index, vfta);
2724         }
2725
2726         set_bit(vid, adapter->active_vlans);
2727
2728         return 0;
2729 }
2730
2731 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2732                                   __always_unused __be16 proto, u16 vid)
2733 {
2734         struct e1000_adapter *adapter = netdev_priv(netdev);
2735         struct e1000_hw *hw = &adapter->hw;
2736         u32 vfta, index;
2737
2738         if ((adapter->hw.mng_cookie.status &
2739              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2740             (vid == adapter->mng_vlan_id)) {
2741                 /* release control to f/w */
2742                 e1000e_release_hw_control(adapter);
2743                 return 0;
2744         }
2745
2746         /* remove VID from filter table */
2747         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2748                 index = (vid >> 5) & 0x7F;
2749                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2750                 vfta &= ~BIT((vid & 0x1F));
2751                 hw->mac.ops.write_vfta(hw, index, vfta);
2752         }
2753
2754         clear_bit(vid, adapter->active_vlans);
2755
2756         return 0;
2757 }
2758
2759 /**
2760  * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2761  * @adapter: board private structure to initialize
2762  **/
2763 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2764 {
2765         struct net_device *netdev = adapter->netdev;
2766         struct e1000_hw *hw = &adapter->hw;
2767         u32 rctl;
2768
2769         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2770                 /* disable VLAN receive filtering */
2771                 rctl = er32(RCTL);
2772                 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2773                 ew32(RCTL, rctl);
2774
2775                 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2776                         e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2777                                                adapter->mng_vlan_id);
2778                         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2779                 }
2780         }
2781 }
2782
2783 /**
2784  * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2785  * @adapter: board private structure to initialize
2786  **/
2787 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2788 {
2789         struct e1000_hw *hw = &adapter->hw;
2790         u32 rctl;
2791
2792         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2793                 /* enable VLAN receive filtering */
2794                 rctl = er32(RCTL);
2795                 rctl |= E1000_RCTL_VFE;
2796                 rctl &= ~E1000_RCTL_CFIEN;
2797                 ew32(RCTL, rctl);
2798         }
2799 }
2800
2801 /**
2802  * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2803  * @adapter: board private structure to initialize
2804  **/
2805 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2806 {
2807         struct e1000_hw *hw = &adapter->hw;
2808         u32 ctrl;
2809
2810         /* disable VLAN tag insert/strip */
2811         ctrl = er32(CTRL);
2812         ctrl &= ~E1000_CTRL_VME;
2813         ew32(CTRL, ctrl);
2814 }
2815
2816 /**
2817  * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2818  * @adapter: board private structure to initialize
2819  **/
2820 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2821 {
2822         struct e1000_hw *hw = &adapter->hw;
2823         u32 ctrl;
2824
2825         /* enable VLAN tag insert/strip */
2826         ctrl = er32(CTRL);
2827         ctrl |= E1000_CTRL_VME;
2828         ew32(CTRL, ctrl);
2829 }
2830
2831 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2832 {
2833         struct net_device *netdev = adapter->netdev;
2834         u16 vid = adapter->hw.mng_cookie.vlan_id;
2835         u16 old_vid = adapter->mng_vlan_id;
2836
2837         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2838                 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2839                 adapter->mng_vlan_id = vid;
2840         }
2841
2842         if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2843                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2844 }
2845
2846 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2847 {
2848         u16 vid;
2849
2850         e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2851
2852         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2853             e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2854 }
2855
2856 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2857 {
2858         struct e1000_hw *hw = &adapter->hw;
2859         u32 manc, manc2h, mdef, i, j;
2860
2861         if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2862                 return;
2863
2864         manc = er32(MANC);
2865
2866         /* enable receiving management packets to the host. this will probably
2867          * generate destination unreachable messages from the host OS, but
2868          * the packets will be handled on SMBUS
2869          */
2870         manc |= E1000_MANC_EN_MNG2HOST;
2871         manc2h = er32(MANC2H);
2872
2873         switch (hw->mac.type) {
2874         default:
2875                 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2876                 break;
2877         case e1000_82574:
2878         case e1000_82583:
2879                 /* Check if IPMI pass-through decision filter already exists;
2880                  * if so, enable it.
2881                  */
2882                 for (i = 0, j = 0; i < 8; i++) {
2883                         mdef = er32(MDEF(i));
2884
2885                         /* Ignore filters with anything other than IPMI ports */
2886                         if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2887                                 continue;
2888
2889                         /* Enable this decision filter in MANC2H */
2890                         if (mdef)
2891                                 manc2h |= BIT(i);
2892
2893                         j |= mdef;
2894                 }
2895
2896                 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2897                         break;
2898
2899                 /* Create new decision filter in an empty filter */
2900                 for (i = 0, j = 0; i < 8; i++)
2901                         if (er32(MDEF(i)) == 0) {
2902                                 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2903                                                E1000_MDEF_PORT_664));
2904                                 manc2h |= BIT(1);
2905                                 j++;
2906                                 break;
2907                         }
2908
2909                 if (!j)
2910                         e_warn("Unable to create IPMI pass-through filter\n");
2911                 break;
2912         }
2913
2914         ew32(MANC2H, manc2h);
2915         ew32(MANC, manc);
2916 }
2917
2918 /**
2919  * e1000_configure_tx - Configure Transmit Unit after Reset
2920  * @adapter: board private structure
2921  *
2922  * Configure the Tx unit of the MAC after a reset.
2923  **/
2924 static void e1000_configure_tx(struct e1000_adapter *adapter)
2925 {
2926         struct e1000_hw *hw = &adapter->hw;
2927         struct e1000_ring *tx_ring = adapter->tx_ring;
2928         u64 tdba;
2929         u32 tdlen, tctl, tarc;
2930
2931         /* Setup the HW Tx Head and Tail descriptor pointers */
2932         tdba = tx_ring->dma;
2933         tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2934         ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2935         ew32(TDBAH(0), (tdba >> 32));
2936         ew32(TDLEN(0), tdlen);
2937         ew32(TDH(0), 0);
2938         ew32(TDT(0), 0);
2939         tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2940         tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2941
2942         writel(0, tx_ring->head);
2943         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2944                 e1000e_update_tdt_wa(tx_ring, 0);
2945         else
2946                 writel(0, tx_ring->tail);
2947
2948         /* Set the Tx Interrupt Delay register */
2949         ew32(TIDV, adapter->tx_int_delay);
2950         /* Tx irq moderation */
2951         ew32(TADV, adapter->tx_abs_int_delay);
2952
2953         if (adapter->flags2 & FLAG2_DMA_BURST) {
2954                 u32 txdctl = er32(TXDCTL(0));
2955
2956                 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2957                             E1000_TXDCTL_WTHRESH);
2958                 /* set up some performance related parameters to encourage the
2959                  * hardware to use the bus more efficiently in bursts, depends
2960                  * on the tx_int_delay to be enabled,
2961                  * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2962                  * hthresh = 1 ==> prefetch when one or more available
2963                  * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2964                  * BEWARE: this seems to work but should be considered first if
2965                  * there are Tx hangs or other Tx related bugs
2966                  */
2967                 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2968                 ew32(TXDCTL(0), txdctl);
2969         }
2970         /* erratum work around: set txdctl the same for both queues */
2971         ew32(TXDCTL(1), er32(TXDCTL(0)));
2972
2973         /* Program the Transmit Control Register */
2974         tctl = er32(TCTL);
2975         tctl &= ~E1000_TCTL_CT;
2976         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2977                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2978
2979         if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2980                 tarc = er32(TARC(0));
2981                 /* set the speed mode bit, we'll clear it if we're not at
2982                  * gigabit link later
2983                  */
2984 #define SPEED_MODE_BIT BIT(21)
2985                 tarc |= SPEED_MODE_BIT;
2986                 ew32(TARC(0), tarc);
2987         }
2988
2989         /* errata: program both queues to unweighted RR */
2990         if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2991                 tarc = er32(TARC(0));
2992                 tarc |= 1;
2993                 ew32(TARC(0), tarc);
2994                 tarc = er32(TARC(1));
2995                 tarc |= 1;
2996                 ew32(TARC(1), tarc);
2997         }
2998
2999         /* Setup Transmit Descriptor Settings for eop descriptor */
3000         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
3001
3002         /* only set IDE if we are delaying interrupts using the timers */
3003         if (adapter->tx_int_delay)
3004                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3005
3006         /* enable Report Status bit */
3007         adapter->txd_cmd |= E1000_TXD_CMD_RS;
3008
3009         ew32(TCTL, tctl);
3010
3011         hw->mac.ops.config_collision_dist(hw);
3012
3013         /* SPT and KBL Si errata workaround to avoid data corruption */
3014         if (hw->mac.type == e1000_pch_spt) {
3015                 u32 reg_val;
3016
3017                 reg_val = er32(IOSFPC);
3018                 reg_val |= E1000_RCTL_RDMTS_HEX;
3019                 ew32(IOSFPC, reg_val);
3020
3021                 reg_val = er32(TARC(0));
3022                 /* SPT and KBL Si errata workaround to avoid Tx hang.
3023                  * Dropping the number of outstanding requests from
3024                  * 3 to 2 in order to avoid a buffer overrun.
3025                  */
3026                 reg_val &= ~E1000_TARC0_CB_MULTIQ_3_REQ;
3027                 reg_val |= E1000_TARC0_CB_MULTIQ_2_REQ;
3028                 ew32(TARC(0), reg_val);
3029         }
3030 }
3031
3032 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3033                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3034
3035 /**
3036  * e1000_setup_rctl - configure the receive control registers
3037  * @adapter: Board private structure
3038  **/
3039 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3040 {
3041         struct e1000_hw *hw = &adapter->hw;
3042         u32 rctl, rfctl;
3043         u32 pages = 0;
3044
3045         /* Workaround Si errata on PCHx - configure jumbo frame flow.
3046          * If jumbo frames not set, program related MAC/PHY registers
3047          * to h/w defaults
3048          */
3049         if (hw->mac.type >= e1000_pch2lan) {
3050                 s32 ret_val;
3051
3052                 if (adapter->netdev->mtu > ETH_DATA_LEN)
3053                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3054                 else
3055                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3056
3057                 if (ret_val)
3058                         e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3059         }
3060
3061         /* Program MC offset vector base */
3062         rctl = er32(RCTL);
3063         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3064         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3065             E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3066             (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3067
3068         /* Do not Store bad packets */
3069         rctl &= ~E1000_RCTL_SBP;
3070
3071         /* Enable Long Packet receive */
3072         if (adapter->netdev->mtu <= ETH_DATA_LEN)
3073                 rctl &= ~E1000_RCTL_LPE;
3074         else
3075                 rctl |= E1000_RCTL_LPE;
3076
3077         /* Some systems expect that the CRC is included in SMBUS traffic. The
3078          * hardware strips the CRC before sending to both SMBUS (BMC) and to
3079          * host memory when this is enabled
3080          */
3081         if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3082                 rctl |= E1000_RCTL_SECRC;
3083
3084         /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3085         if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3086                 u16 phy_data;
3087
3088                 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3089                 phy_data &= 0xfff8;
3090                 phy_data |= BIT(2);
3091                 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3092
3093                 e1e_rphy(hw, 22, &phy_data);
3094                 phy_data &= 0x0fff;
3095                 phy_data |= BIT(14);
3096                 e1e_wphy(hw, 0x10, 0x2823);
3097                 e1e_wphy(hw, 0x11, 0x0003);
3098                 e1e_wphy(hw, 22, phy_data);
3099         }
3100
3101         /* Setup buffer sizes */
3102         rctl &= ~E1000_RCTL_SZ_4096;
3103         rctl |= E1000_RCTL_BSEX;
3104         switch (adapter->rx_buffer_len) {
3105         case 2048:
3106         default:
3107                 rctl |= E1000_RCTL_SZ_2048;
3108                 rctl &= ~E1000_RCTL_BSEX;
3109                 break;
3110         case 4096:
3111                 rctl |= E1000_RCTL_SZ_4096;
3112                 break;
3113         case 8192:
3114                 rctl |= E1000_RCTL_SZ_8192;
3115                 break;
3116         case 16384:
3117                 rctl |= E1000_RCTL_SZ_16384;
3118                 break;
3119         }
3120
3121         /* Enable Extended Status in all Receive Descriptors */
3122         rfctl = er32(RFCTL);
3123         rfctl |= E1000_RFCTL_EXTEN;
3124         ew32(RFCTL, rfctl);
3125
3126         /* 82571 and greater support packet-split where the protocol
3127          * header is placed in skb->data and the packet data is
3128          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3129          * In the case of a non-split, skb->data is linearly filled,
3130          * followed by the page buffers.  Therefore, skb->data is
3131          * sized to hold the largest protocol header.
3132          *
3133          * allocations using alloc_page take too long for regular MTU
3134          * so only enable packet split for jumbo frames
3135          *
3136          * Using pages when the page size is greater than 16k wastes
3137          * a lot of memory, since we allocate 3 pages at all times
3138          * per packet.
3139          */
3140         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3141         if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3142                 adapter->rx_ps_pages = pages;
3143         else
3144                 adapter->rx_ps_pages = 0;
3145
3146         if (adapter->rx_ps_pages) {
3147                 u32 psrctl = 0;
3148
3149                 /* Enable Packet split descriptors */
3150                 rctl |= E1000_RCTL_DTYP_PS;
3151
3152                 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3153
3154                 switch (adapter->rx_ps_pages) {
3155                 case 3:
3156                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3157                         fallthrough;
3158                 case 2:
3159                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3160                         fallthrough;
3161                 case 1:
3162                         psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3163                         break;
3164                 }
3165
3166                 ew32(PSRCTL, psrctl);
3167         }
3168
3169         /* This is useful for sniffing bad packets. */
3170         if (adapter->netdev->features & NETIF_F_RXALL) {
3171                 /* UPE and MPE will be handled by normal PROMISC logic
3172                  * in e1000e_set_rx_mode
3173                  */
3174                 rctl |= (E1000_RCTL_SBP |       /* Receive bad packets */
3175                          E1000_RCTL_BAM |       /* RX All Bcast Pkts */
3176                          E1000_RCTL_PMCF);      /* RX All MAC Ctrl Pkts */
3177
3178                 rctl &= ~(E1000_RCTL_VFE |      /* Disable VLAN filter */
3179                           E1000_RCTL_DPF |      /* Allow filtered pause */
3180                           E1000_RCTL_CFIEN);    /* Dis VLAN CFIEN Filter */
3181                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3182                  * and that breaks VLANs.
3183                  */
3184         }
3185
3186         ew32(RCTL, rctl);
3187         /* just started the receive unit, no need to restart */
3188         adapter->flags &= ~FLAG_RESTART_NOW;
3189 }
3190
3191 /**
3192  * e1000_configure_rx - Configure Receive Unit after Reset
3193  * @adapter: board private structure
3194  *
3195  * Configure the Rx unit of the MAC after a reset.
3196  **/
3197 static void e1000_configure_rx(struct e1000_adapter *adapter)
3198 {
3199         struct e1000_hw *hw = &adapter->hw;
3200         struct e1000_ring *rx_ring = adapter->rx_ring;
3201         u64 rdba;
3202         u32 rdlen, rctl, rxcsum, ctrl_ext;
3203
3204         if (adapter->rx_ps_pages) {
3205                 /* this is a 32 byte descriptor */
3206                 rdlen = rx_ring->count *
3207                     sizeof(union e1000_rx_desc_packet_split);
3208                 adapter->clean_rx = e1000_clean_rx_irq_ps;
3209                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3210         } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3211                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3212                 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3213                 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3214         } else {
3215                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3216                 adapter->clean_rx = e1000_clean_rx_irq;
3217                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3218         }
3219
3220         /* disable receives while setting up the descriptors */
3221         rctl = er32(RCTL);
3222         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3223                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3224         e1e_flush();
3225         usleep_range(10000, 11000);
3226
3227         if (adapter->flags2 & FLAG2_DMA_BURST) {
3228                 /* set the writeback threshold (only takes effect if the RDTR
3229                  * is set). set GRAN=1 and write back up to 0x4 worth, and
3230                  * enable prefetching of 0x20 Rx descriptors
3231                  * granularity = 01
3232                  * wthresh = 04,
3233                  * hthresh = 04,
3234                  * pthresh = 0x20
3235                  */
3236                 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3237                 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3238         }
3239
3240         /* set the Receive Delay Timer Register */
3241         ew32(RDTR, adapter->rx_int_delay);
3242
3243         /* irq moderation */
3244         ew32(RADV, adapter->rx_abs_int_delay);
3245         if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3246                 e1000e_write_itr(adapter, adapter->itr);
3247
3248         ctrl_ext = er32(CTRL_EXT);
3249         /* Auto-Mask interrupts upon ICR access */
3250         ctrl_ext |= E1000_CTRL_EXT_IAME;
3251         ew32(IAM, 0xffffffff);
3252         ew32(CTRL_EXT, ctrl_ext);
3253         e1e_flush();
3254
3255         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3256          * the Base and Length of the Rx Descriptor Ring
3257          */
3258         rdba = rx_ring->dma;
3259         ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3260         ew32(RDBAH(0), (rdba >> 32));
3261         ew32(RDLEN(0), rdlen);
3262         ew32(RDH(0), 0);
3263         ew32(RDT(0), 0);
3264         rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3265         rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3266
3267         writel(0, rx_ring->head);
3268         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3269                 e1000e_update_rdt_wa(rx_ring, 0);
3270         else
3271                 writel(0, rx_ring->tail);
3272
3273         /* Enable Receive Checksum Offload for TCP and UDP */
3274         rxcsum = er32(RXCSUM);
3275         if (adapter->netdev->features & NETIF_F_RXCSUM)
3276                 rxcsum |= E1000_RXCSUM_TUOFL;
3277         else
3278                 rxcsum &= ~E1000_RXCSUM_TUOFL;
3279         ew32(RXCSUM, rxcsum);
3280
3281         /* With jumbo frames, excessive C-state transition latencies result
3282          * in dropped transactions.
3283          */
3284         if (adapter->netdev->mtu > ETH_DATA_LEN) {
3285                 u32 lat =
3286                     ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3287                      adapter->max_frame_size) * 8 / 1000;
3288
3289                 if (adapter->flags & FLAG_IS_ICH) {
3290                         u32 rxdctl = er32(RXDCTL(0));
3291
3292                         ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8));
3293                 }
3294
3295                 dev_info(&adapter->pdev->dev,
3296                          "Some CPU C-states have been disabled in order to enable jumbo frames\n");
3297                 cpu_latency_qos_update_request(&adapter->pm_qos_req, lat);
3298         } else {
3299                 cpu_latency_qos_update_request(&adapter->pm_qos_req,
3300                                                PM_QOS_DEFAULT_VALUE);
3301         }
3302
3303         /* Enable Receives */
3304         ew32(RCTL, rctl);
3305 }
3306
3307 /**
3308  * e1000e_write_mc_addr_list - write multicast addresses to MTA
3309  * @netdev: network interface device structure
3310  *
3311  * Writes multicast address list to the MTA hash table.
3312  * Returns: -ENOMEM on failure
3313  *                0 on no addresses written
3314  *                X on writing X addresses to MTA
3315  */
3316 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3317 {
3318         struct e1000_adapter *adapter = netdev_priv(netdev);
3319         struct e1000_hw *hw = &adapter->hw;
3320         struct netdev_hw_addr *ha;
3321         u8 *mta_list;
3322         int i;
3323
3324         if (netdev_mc_empty(netdev)) {
3325                 /* nothing to program, so clear mc list */
3326                 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3327                 return 0;
3328         }
3329
3330         mta_list = kcalloc(netdev_mc_count(netdev), ETH_ALEN, GFP_ATOMIC);
3331         if (!mta_list)
3332                 return -ENOMEM;
3333
3334         /* update_mc_addr_list expects a packed array of only addresses. */
3335         i = 0;
3336         netdev_for_each_mc_addr(ha, netdev)
3337             memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3338
3339         hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3340         kfree(mta_list);
3341
3342         return netdev_mc_count(netdev);
3343 }
3344
3345 /**
3346  * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3347  * @netdev: network interface device structure
3348  *
3349  * Writes unicast address list to the RAR table.
3350  * Returns: -ENOMEM on failure/insufficient address space
3351  *                0 on no addresses written
3352  *                X on writing X addresses to the RAR table
3353  **/
3354 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3355 {
3356         struct e1000_adapter *adapter = netdev_priv(netdev);
3357         struct e1000_hw *hw = &adapter->hw;
3358         unsigned int rar_entries;
3359         int count = 0;
3360
3361         rar_entries = hw->mac.ops.rar_get_count(hw);
3362
3363         /* save a rar entry for our hardware address */
3364         rar_entries--;
3365
3366         /* save a rar entry for the LAA workaround */
3367         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3368                 rar_entries--;
3369
3370         /* return ENOMEM indicating insufficient memory for addresses */
3371         if (netdev_uc_count(netdev) > rar_entries)
3372                 return -ENOMEM;
3373
3374         if (!netdev_uc_empty(netdev) && rar_entries) {
3375                 struct netdev_hw_addr *ha;
3376
3377                 /* write the addresses in reverse order to avoid write
3378                  * combining
3379                  */
3380                 netdev_for_each_uc_addr(ha, netdev) {
3381                         int ret_val;
3382
3383                         if (!rar_entries)
3384                                 break;
3385                         ret_val = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3386                         if (ret_val < 0)
3387                                 return -ENOMEM;
3388                         count++;
3389                 }
3390         }
3391
3392         /* zero out the remaining RAR entries not used above */
3393         for (; rar_entries > 0; rar_entries--) {
3394                 ew32(RAH(rar_entries), 0);
3395                 ew32(RAL(rar_entries), 0);
3396         }
3397         e1e_flush();
3398
3399         return count;
3400 }
3401
3402 /**
3403  * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3404  * @netdev: network interface device structure
3405  *
3406  * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3407  * address list or the network interface flags are updated.  This routine is
3408  * responsible for configuring the hardware for proper unicast, multicast,
3409  * promiscuous mode, and all-multi behavior.
3410  **/
3411 static void e1000e_set_rx_mode(struct net_device *netdev)
3412 {
3413         struct e1000_adapter *adapter = netdev_priv(netdev);
3414         struct e1000_hw *hw = &adapter->hw;
3415         u32 rctl;
3416
3417         if (pm_runtime_suspended(netdev->dev.parent))
3418                 return;
3419
3420         /* Check for Promiscuous and All Multicast modes */
3421         rctl = er32(RCTL);
3422
3423         /* clear the affected bits */
3424         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3425
3426         if (netdev->flags & IFF_PROMISC) {
3427                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3428                 /* Do not hardware filter VLANs in promisc mode */
3429                 e1000e_vlan_filter_disable(adapter);
3430         } else {
3431                 int count;
3432
3433                 if (netdev->flags & IFF_ALLMULTI) {
3434                         rctl |= E1000_RCTL_MPE;
3435                 } else {
3436                         /* Write addresses to the MTA, if the attempt fails
3437                          * then we should just turn on promiscuous mode so
3438                          * that we can at least receive multicast traffic
3439                          */
3440                         count = e1000e_write_mc_addr_list(netdev);
3441                         if (count < 0)
3442                                 rctl |= E1000_RCTL_MPE;
3443                 }
3444                 e1000e_vlan_filter_enable(adapter);
3445                 /* Write addresses to available RAR registers, if there is not
3446                  * sufficient space to store all the addresses then enable
3447                  * unicast promiscuous mode
3448                  */
3449                 count = e1000e_write_uc_addr_list(netdev);
3450                 if (count < 0)
3451                         rctl |= E1000_RCTL_UPE;
3452         }
3453
3454         ew32(RCTL, rctl);
3455
3456         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3457                 e1000e_vlan_strip_enable(adapter);
3458         else
3459                 e1000e_vlan_strip_disable(adapter);
3460 }
3461
3462 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3463 {
3464         struct e1000_hw *hw = &adapter->hw;
3465         u32 mrqc, rxcsum;
3466         u32 rss_key[10];
3467         int i;
3468
3469         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3470         for (i = 0; i < 10; i++)
3471                 ew32(RSSRK(i), rss_key[i]);
3472
3473         /* Direct all traffic to queue 0 */
3474         for (i = 0; i < 32; i++)
3475                 ew32(RETA(i), 0);
3476
3477         /* Disable raw packet checksumming so that RSS hash is placed in
3478          * descriptor on writeback.
3479          */
3480         rxcsum = er32(RXCSUM);
3481         rxcsum |= E1000_RXCSUM_PCSD;
3482
3483         ew32(RXCSUM, rxcsum);
3484
3485         mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3486                 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3487                 E1000_MRQC_RSS_FIELD_IPV6 |
3488                 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3489                 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3490
3491         ew32(MRQC, mrqc);
3492 }
3493
3494 /**
3495  * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3496  * @adapter: board private structure
3497  * @timinca: pointer to returned time increment attributes
3498  *
3499  * Get attributes for incrementing the System Time Register SYSTIML/H at
3500  * the default base frequency, and set the cyclecounter shift value.
3501  **/
3502 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3503 {
3504         struct e1000_hw *hw = &adapter->hw;
3505         u32 incvalue, incperiod, shift;
3506
3507         /* Make sure clock is enabled on I217/I218/I219  before checking
3508          * the frequency
3509          */
3510         if ((hw->mac.type >= e1000_pch_lpt) &&
3511             !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3512             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3513                 u32 fextnvm7 = er32(FEXTNVM7);
3514
3515                 if (!(fextnvm7 & BIT(0))) {
3516                         ew32(FEXTNVM7, fextnvm7 | BIT(0));
3517                         e1e_flush();
3518                 }
3519         }
3520
3521         switch (hw->mac.type) {
3522         case e1000_pch2lan:
3523                 /* Stable 96MHz frequency */
3524                 incperiod = INCPERIOD_96MHZ;
3525                 incvalue = INCVALUE_96MHZ;
3526                 shift = INCVALUE_SHIFT_96MHZ;
3527                 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3528                 break;
3529         case e1000_pch_lpt:
3530                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3531                         /* Stable 96MHz frequency */
3532                         incperiod = INCPERIOD_96MHZ;
3533                         incvalue = INCVALUE_96MHZ;
3534                         shift = INCVALUE_SHIFT_96MHZ;
3535                         adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3536                 } else {
3537                         /* Stable 25MHz frequency */
3538                         incperiod = INCPERIOD_25MHZ;
3539                         incvalue = INCVALUE_25MHZ;
3540                         shift = INCVALUE_SHIFT_25MHZ;
3541                         adapter->cc.shift = shift;
3542                 }
3543                 break;
3544         case e1000_pch_spt:
3545                 /* Stable 24MHz frequency */
3546                 incperiod = INCPERIOD_24MHZ;
3547                 incvalue = INCVALUE_24MHZ;
3548                 shift = INCVALUE_SHIFT_24MHZ;
3549                 adapter->cc.shift = shift;
3550                 break;
3551         case e1000_pch_cnp:
3552         case e1000_pch_tgp:
3553         case e1000_pch_adp:
3554         case e1000_pch_mtp:
3555         case e1000_pch_lnp:
3556                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3557                         /* Stable 24MHz frequency */
3558                         incperiod = INCPERIOD_24MHZ;
3559                         incvalue = INCVALUE_24MHZ;
3560                         shift = INCVALUE_SHIFT_24MHZ;
3561                         adapter->cc.shift = shift;
3562                 } else {
3563                         /* Stable 38400KHz frequency */
3564                         incperiod = INCPERIOD_38400KHZ;
3565                         incvalue = INCVALUE_38400KHZ;
3566                         shift = INCVALUE_SHIFT_38400KHZ;
3567                         adapter->cc.shift = shift;
3568                 }
3569                 break;
3570         case e1000_82574:
3571         case e1000_82583:
3572                 /* Stable 25MHz frequency */
3573                 incperiod = INCPERIOD_25MHZ;
3574                 incvalue = INCVALUE_25MHZ;
3575                 shift = INCVALUE_SHIFT_25MHZ;
3576                 adapter->cc.shift = shift;
3577                 break;
3578         default:
3579                 return -EINVAL;
3580         }
3581
3582         *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3583                     ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3584
3585         return 0;
3586 }
3587
3588 /**
3589  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3590  * @adapter: board private structure
3591  * @config: timestamp configuration
3592  *
3593  * Outgoing time stamping can be enabled and disabled. Play nice and
3594  * disable it when requested, although it shouldn't cause any overhead
3595  * when no packet needs it. At most one packet in the queue may be
3596  * marked for time stamping, otherwise it would be impossible to tell
3597  * for sure to which packet the hardware time stamp belongs.
3598  *
3599  * Incoming time stamping has to be configured via the hardware filters.
3600  * Not all combinations are supported, in particular event type has to be
3601  * specified. Matching the kind of event packet is not supported, with the
3602  * exception of "all V2 events regardless of level 2 or 4".
3603  **/
3604 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3605                                   struct hwtstamp_config *config)
3606 {
3607         struct e1000_hw *hw = &adapter->hw;
3608         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3609         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3610         u32 rxmtrl = 0;
3611         u16 rxudp = 0;
3612         bool is_l4 = false;
3613         bool is_l2 = false;
3614         u32 regval;
3615
3616         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3617                 return -EINVAL;
3618
3619         /* flags reserved for future extensions - must be zero */
3620         if (config->flags)
3621                 return -EINVAL;
3622
3623         switch (config->tx_type) {
3624         case HWTSTAMP_TX_OFF:
3625                 tsync_tx_ctl = 0;
3626                 break;
3627         case HWTSTAMP_TX_ON:
3628                 break;
3629         default:
3630                 return -ERANGE;
3631         }
3632
3633         switch (config->rx_filter) {
3634         case HWTSTAMP_FILTER_NONE:
3635                 tsync_rx_ctl = 0;
3636                 break;
3637         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3638                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3639                 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3640                 is_l4 = true;
3641                 break;
3642         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3643                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3644                 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3645                 is_l4 = true;
3646                 break;
3647         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3648                 /* Also time stamps V2 L2 Path Delay Request/Response */
3649                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3650                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3651                 is_l2 = true;
3652                 break;
3653         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3654                 /* Also time stamps V2 L2 Path Delay Request/Response. */
3655                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3656                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3657                 is_l2 = true;
3658                 break;
3659         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3660                 /* Hardware cannot filter just V2 L4 Sync messages */
3661                 fallthrough;
3662         case HWTSTAMP_FILTER_PTP_V2_SYNC:
3663                 /* Also time stamps V2 Path Delay Request/Response. */
3664                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3665                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3666                 is_l2 = true;
3667                 is_l4 = true;
3668                 break;
3669         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3670                 /* Hardware cannot filter just V2 L4 Delay Request messages */
3671                 fallthrough;
3672         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3673                 /* Also time stamps V2 Path Delay Request/Response. */
3674                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3675                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3676                 is_l2 = true;
3677                 is_l4 = true;
3678                 break;
3679         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3680         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3681                 /* Hardware cannot filter just V2 L4 or L2 Event messages */
3682                 fallthrough;
3683         case HWTSTAMP_FILTER_PTP_V2_EVENT:
3684                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3685                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3686                 is_l2 = true;
3687                 is_l4 = true;
3688                 break;
3689         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3690                 /* For V1, the hardware can only filter Sync messages or
3691                  * Delay Request messages but not both so fall-through to
3692                  * time stamp all packets.
3693                  */
3694                 fallthrough;
3695         case HWTSTAMP_FILTER_NTP_ALL:
3696         case HWTSTAMP_FILTER_ALL:
3697                 is_l2 = true;
3698                 is_l4 = true;
3699                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3700                 config->rx_filter = HWTSTAMP_FILTER_ALL;
3701                 break;
3702         default:
3703                 return -ERANGE;
3704         }
3705
3706         adapter->hwtstamp_config = *config;
3707
3708         /* enable/disable Tx h/w time stamping */
3709         regval = er32(TSYNCTXCTL);
3710         regval &= ~E1000_TSYNCTXCTL_ENABLED;
3711         regval |= tsync_tx_ctl;
3712         ew32(TSYNCTXCTL, regval);
3713         if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3714             (regval & E1000_TSYNCTXCTL_ENABLED)) {
3715                 e_err("Timesync Tx Control register not set as expected\n");
3716                 return -EAGAIN;
3717         }
3718
3719         /* enable/disable Rx h/w time stamping */
3720         regval = er32(TSYNCRXCTL);
3721         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3722         regval |= tsync_rx_ctl;
3723         ew32(TSYNCRXCTL, regval);
3724         if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3725                                  E1000_TSYNCRXCTL_TYPE_MASK)) !=
3726             (regval & (E1000_TSYNCRXCTL_ENABLED |
3727                        E1000_TSYNCRXCTL_TYPE_MASK))) {
3728                 e_err("Timesync Rx Control register not set as expected\n");
3729                 return -EAGAIN;
3730         }
3731
3732         /* L2: define ethertype filter for time stamped packets */
3733         if (is_l2)
3734                 rxmtrl |= ETH_P_1588;
3735
3736         /* define which PTP packets get time stamped */
3737         ew32(RXMTRL, rxmtrl);
3738
3739         /* Filter by destination port */
3740         if (is_l4) {
3741                 rxudp = PTP_EV_PORT;
3742                 cpu_to_be16s(&rxudp);
3743         }
3744         ew32(RXUDP, rxudp);
3745
3746         e1e_flush();
3747
3748         /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3749         er32(RXSTMPH);
3750         er32(TXSTMPH);
3751
3752         return 0;
3753 }
3754
3755 /**
3756  * e1000_configure - configure the hardware for Rx and Tx
3757  * @adapter: private board structure
3758  **/
3759 static void e1000_configure(struct e1000_adapter *adapter)
3760 {
3761         struct e1000_ring *rx_ring = adapter->rx_ring;
3762
3763         e1000e_set_rx_mode(adapter->netdev);
3764
3765         e1000_restore_vlan(adapter);
3766         e1000_init_manageability_pt(adapter);
3767
3768         e1000_configure_tx(adapter);
3769
3770         if (adapter->netdev->features & NETIF_F_RXHASH)
3771                 e1000e_setup_rss_hash(adapter);
3772         e1000_setup_rctl(adapter);
3773         e1000_configure_rx(adapter);
3774         adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3775 }
3776
3777 /**
3778  * e1000e_power_up_phy - restore link in case the phy was powered down
3779  * @adapter: address of board private structure
3780  *
3781  * The phy may be powered down to save power and turn off link when the
3782  * driver is unloaded and wake on lan is not enabled (among others)
3783  * *** this routine MUST be followed by a call to e1000e_reset ***
3784  **/
3785 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3786 {
3787         if (adapter->hw.phy.ops.power_up)
3788                 adapter->hw.phy.ops.power_up(&adapter->hw);
3789
3790         adapter->hw.mac.ops.setup_link(&adapter->hw);
3791 }
3792
3793 /**
3794  * e1000_power_down_phy - Power down the PHY
3795  * @adapter: board private structure
3796  *
3797  * Power down the PHY so no link is implied when interface is down.
3798  * The PHY cannot be powered down if management or WoL is active.
3799  */
3800 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3801 {
3802         if (adapter->hw.phy.ops.power_down)
3803                 adapter->hw.phy.ops.power_down(&adapter->hw);
3804 }
3805
3806 /**
3807  * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3808  * @adapter: board private structure
3809  *
3810  * We want to clear all pending descriptors from the TX ring.
3811  * zeroing happens when the HW reads the regs. We  assign the ring itself as
3812  * the data of the next descriptor. We don't care about the data we are about
3813  * to reset the HW.
3814  */
3815 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3816 {
3817         struct e1000_hw *hw = &adapter->hw;
3818         struct e1000_ring *tx_ring = adapter->tx_ring;
3819         struct e1000_tx_desc *tx_desc = NULL;
3820         u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3821         u16 size = 512;
3822
3823         tctl = er32(TCTL);
3824         ew32(TCTL, tctl | E1000_TCTL_EN);
3825         tdt = er32(TDT(0));
3826         BUG_ON(tdt != tx_ring->next_to_use);
3827         tx_desc =  E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3828         tx_desc->buffer_addr = cpu_to_le64(tx_ring->dma);
3829
3830         tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3831         tx_desc->upper.data = 0;
3832         /* flush descriptors to memory before notifying the HW */
3833         wmb();
3834         tx_ring->next_to_use++;
3835         if (tx_ring->next_to_use == tx_ring->count)
3836                 tx_ring->next_to_use = 0;
3837         ew32(TDT(0), tx_ring->next_to_use);
3838         usleep_range(200, 250);
3839 }
3840
3841 /**
3842  * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3843  * @adapter: board private structure
3844  *
3845  * Mark all descriptors in the RX ring as consumed and disable the rx ring
3846  */
3847 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3848 {
3849         u32 rctl, rxdctl;
3850         struct e1000_hw *hw = &adapter->hw;
3851
3852         rctl = er32(RCTL);
3853         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3854         e1e_flush();
3855         usleep_range(100, 150);
3856
3857         rxdctl = er32(RXDCTL(0));
3858         /* zero the lower 14 bits (prefetch and host thresholds) */
3859         rxdctl &= 0xffffc000;
3860
3861         /* update thresholds: prefetch threshold to 31, host threshold to 1
3862          * and make sure the granularity is "descriptors" and not "cache lines"
3863          */
3864         rxdctl |= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3865
3866         ew32(RXDCTL(0), rxdctl);
3867         /* momentarily enable the RX ring for the changes to take effect */
3868         ew32(RCTL, rctl | E1000_RCTL_EN);
3869         e1e_flush();
3870         usleep_range(100, 150);
3871         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3872 }
3873
3874 /**
3875  * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3876  * @adapter: board private structure
3877  *
3878  * In i219, the descriptor rings must be emptied before resetting the HW
3879  * or before changing the device state to D3 during runtime (runtime PM).
3880  *
3881  * Failure to do this will cause the HW to enter a unit hang state which can
3882  * only be released by PCI reset on the device
3883  *
3884  */
3885
3886 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3887 {
3888         u16 hang_state;
3889         u32 fext_nvm11, tdlen;
3890         struct e1000_hw *hw = &adapter->hw;
3891
3892         /* First, disable MULR fix in FEXTNVM11 */
3893         fext_nvm11 = er32(FEXTNVM11);
3894         fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3895         ew32(FEXTNVM11, fext_nvm11);
3896         /* do nothing if we're not in faulty state, or if the queue is empty */
3897         tdlen = er32(TDLEN(0));
3898         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3899                              &hang_state);
3900         if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3901                 return;
3902         e1000_flush_tx_ring(adapter);
3903         /* recheck, maybe the fault is caused by the rx ring */
3904         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3905                              &hang_state);
3906         if (hang_state & FLUSH_DESC_REQUIRED)
3907                 e1000_flush_rx_ring(adapter);
3908 }
3909
3910 /**
3911  * e1000e_systim_reset - reset the timesync registers after a hardware reset
3912  * @adapter: board private structure
3913  *
3914  * When the MAC is reset, all hardware bits for timesync will be reset to the
3915  * default values. This function will restore the settings last in place.
3916  * Since the clock SYSTIME registers are reset, we will simply restore the
3917  * cyclecounter to the kernel real clock time.
3918  **/
3919 static void e1000e_systim_reset(struct e1000_adapter *adapter)
3920 {
3921         struct ptp_clock_info *info = &adapter->ptp_clock_info;
3922         struct e1000_hw *hw = &adapter->hw;
3923         unsigned long flags;
3924         u32 timinca;
3925         s32 ret_val;
3926
3927         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3928                 return;
3929
3930         if (info->adjfreq) {
3931                 /* restore the previous ptp frequency delta */
3932                 ret_val = info->adjfreq(info, adapter->ptp_delta);
3933         } else {
3934                 /* set the default base frequency if no adjustment possible */
3935                 ret_val = e1000e_get_base_timinca(adapter, &timinca);
3936                 if (!ret_val)
3937                         ew32(TIMINCA, timinca);
3938         }
3939
3940         if (ret_val) {
3941                 dev_warn(&adapter->pdev->dev,
3942                          "Failed to restore TIMINCA clock rate delta: %d\n",
3943                          ret_val);
3944                 return;
3945         }
3946
3947         /* reset the systim ns time counter */
3948         spin_lock_irqsave(&adapter->systim_lock, flags);
3949         timecounter_init(&adapter->tc, &adapter->cc,
3950                          ktime_to_ns(ktime_get_real()));
3951         spin_unlock_irqrestore(&adapter->systim_lock, flags);
3952
3953         /* restore the previous hwtstamp configuration settings */
3954         e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3955 }
3956
3957 /**
3958  * e1000e_reset - bring the hardware into a known good state
3959  * @adapter: board private structure
3960  *
3961  * This function boots the hardware and enables some settings that
3962  * require a configuration cycle of the hardware - those cannot be
3963  * set/changed during runtime. After reset the device needs to be
3964  * properly configured for Rx, Tx etc.
3965  */
3966 void e1000e_reset(struct e1000_adapter *adapter)
3967 {
3968         struct e1000_mac_info *mac = &adapter->hw.mac;
3969         struct e1000_fc_info *fc = &adapter->hw.fc;
3970         struct e1000_hw *hw = &adapter->hw;
3971         u32 tx_space, min_tx_space, min_rx_space;
3972         u32 pba = adapter->pba;
3973         u16 hwm;
3974
3975         /* reset Packet Buffer Allocation to default */
3976         ew32(PBA, pba);
3977
3978         if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3979                 /* To maintain wire speed transmits, the Tx FIFO should be
3980                  * large enough to accommodate two full transmit packets,
3981                  * rounded up to the next 1KB and expressed in KB.  Likewise,
3982                  * the Rx FIFO should be large enough to accommodate at least
3983                  * one full receive packet and is similarly rounded up and
3984                  * expressed in KB.
3985                  */
3986                 pba = er32(PBA);
3987                 /* upper 16 bits has Tx packet buffer allocation size in KB */
3988                 tx_space = pba >> 16;
3989                 /* lower 16 bits has Rx packet buffer allocation size in KB */
3990                 pba &= 0xffff;
3991                 /* the Tx fifo also stores 16 bytes of information about the Tx
3992                  * but don't include ethernet FCS because hardware appends it
3993                  */
3994                 min_tx_space = (adapter->max_frame_size +
3995                                 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3996                 min_tx_space = ALIGN(min_tx_space, 1024);
3997                 min_tx_space >>= 10;
3998                 /* software strips receive CRC, so leave room for it */
3999                 min_rx_space = adapter->max_frame_size;
4000                 min_rx_space = ALIGN(min_rx_space, 1024);
4001                 min_rx_space >>= 10;
4002
4003                 /* If current Tx allocation is less than the min Tx FIFO size,
4004                  * and the min Tx FIFO size is less than the current Rx FIFO
4005                  * allocation, take space away from current Rx allocation
4006                  */
4007                 if ((tx_space < min_tx_space) &&
4008                     ((min_tx_space - tx_space) < pba)) {
4009                         pba -= min_tx_space - tx_space;
4010
4011                         /* if short on Rx space, Rx wins and must trump Tx
4012                          * adjustment
4013                          */
4014                         if (pba < min_rx_space)
4015                                 pba = min_rx_space;
4016                 }
4017
4018                 ew32(PBA, pba);
4019         }
4020
4021         /* flow control settings
4022          *
4023          * The high water mark must be low enough to fit one full frame
4024          * (or the size used for early receive) above it in the Rx FIFO.
4025          * Set it to the lower of:
4026          * - 90% of the Rx FIFO size, and
4027          * - the full Rx FIFO size minus one full frame
4028          */
4029         if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
4030                 fc->pause_time = 0xFFFF;
4031         else
4032                 fc->pause_time = E1000_FC_PAUSE_TIME;
4033         fc->send_xon = true;
4034         fc->current_mode = fc->requested_mode;
4035
4036         switch (hw->mac.type) {
4037         case e1000_ich9lan:
4038         case e1000_ich10lan:
4039                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4040                         pba = 14;
4041                         ew32(PBA, pba);
4042                         fc->high_water = 0x2800;
4043                         fc->low_water = fc->high_water - 8;
4044                         break;
4045                 }
4046                 fallthrough;
4047         default:
4048                 hwm = min(((pba << 10) * 9 / 10),
4049                           ((pba << 10) - adapter->max_frame_size));
4050
4051                 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
4052                 fc->low_water = fc->high_water - 8;
4053                 break;
4054         case e1000_pchlan:
4055                 /* Workaround PCH LOM adapter hangs with certain network
4056                  * loads.  If hangs persist, try disabling Tx flow control.
4057                  */
4058                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4059                         fc->high_water = 0x3500;
4060                         fc->low_water = 0x1500;
4061                 } else {
4062                         fc->high_water = 0x5000;
4063                         fc->low_water = 0x3000;
4064                 }
4065                 fc->refresh_time = 0x1000;
4066                 break;
4067         case e1000_pch2lan:
4068         case e1000_pch_lpt:
4069         case e1000_pch_spt:
4070         case e1000_pch_cnp:
4071         case e1000_pch_tgp:
4072         case e1000_pch_adp:
4073         case e1000_pch_mtp:
4074         case e1000_pch_lnp:
4075                 fc->refresh_time = 0xFFFF;
4076                 fc->pause_time = 0xFFFF;
4077
4078                 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4079                         fc->high_water = 0x05C20;
4080                         fc->low_water = 0x05048;
4081                         break;
4082                 }
4083
4084                 pba = 14;
4085                 ew32(PBA, pba);
4086                 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4087                 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4088                 break;
4089         }
4090
4091         /* Alignment of Tx data is on an arbitrary byte boundary with the
4092          * maximum size per Tx descriptor limited only to the transmit
4093          * allocation of the packet buffer minus 96 bytes with an upper
4094          * limit of 24KB due to receive synchronization limitations.
4095          */
4096         adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4097                                        24 << 10);
4098
4099         /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4100          * fit in receive buffer.
4101          */
4102         if (adapter->itr_setting & 0x3) {
4103                 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4104                         if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4105                                 dev_info(&adapter->pdev->dev,
4106                                          "Interrupt Throttle Rate off\n");
4107                                 adapter->flags2 |= FLAG2_DISABLE_AIM;
4108                                 e1000e_write_itr(adapter, 0);
4109                         }
4110                 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4111                         dev_info(&adapter->pdev->dev,
4112                                  "Interrupt Throttle Rate on\n");
4113                         adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4114                         adapter->itr = 20000;
4115                         e1000e_write_itr(adapter, adapter->itr);
4116                 }
4117         }
4118
4119         if (hw->mac.type >= e1000_pch_spt)
4120                 e1000_flush_desc_rings(adapter);
4121         /* Allow time for pending master requests to run */
4122         mac->ops.reset_hw(hw);
4123
4124         /* For parts with AMT enabled, let the firmware know
4125          * that the network interface is in control
4126          */
4127         if (adapter->flags & FLAG_HAS_AMT)
4128                 e1000e_get_hw_control(adapter);
4129
4130         ew32(WUC, 0);
4131
4132         if (mac->ops.init_hw(hw))
4133                 e_err("Hardware Error\n");
4134
4135         e1000_update_mng_vlan(adapter);
4136
4137         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4138         ew32(VET, ETH_P_8021Q);
4139
4140         e1000e_reset_adaptive(hw);
4141
4142         /* restore systim and hwtstamp settings */
4143         e1000e_systim_reset(adapter);
4144
4145         /* Set EEE advertisement as appropriate */
4146         if (adapter->flags2 & FLAG2_HAS_EEE) {
4147                 s32 ret_val;
4148                 u16 adv_addr;
4149
4150                 switch (hw->phy.type) {
4151                 case e1000_phy_82579:
4152                         adv_addr = I82579_EEE_ADVERTISEMENT;
4153                         break;
4154                 case e1000_phy_i217:
4155                         adv_addr = I217_EEE_ADVERTISEMENT;
4156                         break;
4157                 default:
4158                         dev_err(&adapter->pdev->dev,
4159                                 "Invalid PHY type setting EEE advertisement\n");
4160                         return;
4161                 }
4162
4163                 ret_val = hw->phy.ops.acquire(hw);
4164                 if (ret_val) {
4165                         dev_err(&adapter->pdev->dev,
4166                                 "EEE advertisement - unable to acquire PHY\n");
4167                         return;
4168                 }
4169
4170                 e1000_write_emi_reg_locked(hw, adv_addr,
4171                                            hw->dev_spec.ich8lan.eee_disable ?
4172                                            0 : adapter->eee_advert);
4173
4174                 hw->phy.ops.release(hw);
4175         }
4176
4177         if (!netif_running(adapter->netdev) &&
4178             !test_bit(__E1000_TESTING, &adapter->state))
4179                 e1000_power_down_phy(adapter);
4180
4181         e1000_get_phy_info(hw);
4182
4183         if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4184             !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4185                 u16 phy_data = 0;
4186                 /* speed up time to link by disabling smart power down, ignore
4187                  * the return value of this function because there is nothing
4188                  * different we would do if it failed
4189                  */
4190                 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4191                 phy_data &= ~IGP02E1000_PM_SPD;
4192                 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4193         }
4194         if (hw->mac.type >= e1000_pch_spt && adapter->int_mode == 0) {
4195                 u32 reg;
4196
4197                 /* Fextnvm7 @ 0xe4[2] = 1 */
4198                 reg = er32(FEXTNVM7);
4199                 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4200                 ew32(FEXTNVM7, reg);
4201                 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4202                 reg = er32(FEXTNVM9);
4203                 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4204                        E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4205                 ew32(FEXTNVM9, reg);
4206         }
4207
4208 }
4209
4210 /**
4211  * e1000e_trigger_lsc - trigger an LSC interrupt
4212  * @adapter:
4213  *
4214  * Fire a link status change interrupt to start the watchdog.
4215  **/
4216 static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4217 {
4218         struct e1000_hw *hw = &adapter->hw;
4219
4220         if (adapter->msix_entries)
4221                 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
4222         else
4223                 ew32(ICS, E1000_ICS_LSC);
4224 }
4225
4226 void e1000e_up(struct e1000_adapter *adapter)
4227 {
4228         /* hardware has been reset, we need to reload some things */
4229         e1000_configure(adapter);
4230
4231         clear_bit(__E1000_DOWN, &adapter->state);
4232
4233         if (adapter->msix_entries)
4234                 e1000_configure_msix(adapter);
4235         e1000_irq_enable(adapter);
4236
4237         /* Tx queue started by watchdog timer when link is up */
4238
4239         e1000e_trigger_lsc(adapter);
4240 }
4241
4242 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4243 {
4244         struct e1000_hw *hw = &adapter->hw;
4245
4246         if (!(adapter->flags2 & FLAG2_DMA_BURST))
4247                 return;
4248
4249         /* flush pending descriptor writebacks to memory */
4250         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4251         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4252
4253         /* execute the writes immediately */
4254         e1e_flush();
4255
4256         /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4257          * write is successful
4258          */
4259         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4260         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4261
4262         /* execute the writes immediately */
4263         e1e_flush();
4264 }
4265
4266 static void e1000e_update_stats(struct e1000_adapter *adapter);
4267
4268 /**
4269  * e1000e_down - quiesce the device and optionally reset the hardware
4270  * @adapter: board private structure
4271  * @reset: boolean flag to reset the hardware or not
4272  */
4273 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4274 {
4275         struct net_device *netdev = adapter->netdev;
4276         struct e1000_hw *hw = &adapter->hw;
4277         u32 tctl, rctl;
4278
4279         /* signal that we're down so the interrupt handler does not
4280          * reschedule our watchdog timer
4281          */
4282         set_bit(__E1000_DOWN, &adapter->state);
4283
4284         netif_carrier_off(netdev);
4285
4286         /* disable receives in the hardware */
4287         rctl = er32(RCTL);
4288         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4289                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4290         /* flush and sleep below */
4291
4292         netif_stop_queue(netdev);
4293
4294         /* disable transmits in the hardware */
4295         tctl = er32(TCTL);
4296         tctl &= ~E1000_TCTL_EN;
4297         ew32(TCTL, tctl);
4298
4299         /* flush both disables and wait for them to finish */
4300         e1e_flush();
4301         usleep_range(10000, 11000);
4302
4303         e1000_irq_disable(adapter);
4304
4305         napi_synchronize(&adapter->napi);
4306
4307         del_timer_sync(&adapter->watchdog_timer);
4308         del_timer_sync(&adapter->phy_info_timer);
4309
4310         spin_lock(&adapter->stats64_lock);
4311         e1000e_update_stats(adapter);
4312         spin_unlock(&adapter->stats64_lock);
4313
4314         e1000e_flush_descriptors(adapter);
4315
4316         adapter->link_speed = 0;
4317         adapter->link_duplex = 0;
4318
4319         /* Disable Si errata workaround on PCHx for jumbo frame flow */
4320         if ((hw->mac.type >= e1000_pch2lan) &&
4321             (adapter->netdev->mtu > ETH_DATA_LEN) &&
4322             e1000_lv_jumbo_workaround_ich8lan(hw, false))
4323                 e_dbg("failed to disable jumbo frame workaround mode\n");
4324
4325         if (!pci_channel_offline(adapter->pdev)) {
4326                 if (reset)
4327                         e1000e_reset(adapter);
4328                 else if (hw->mac.type >= e1000_pch_spt)
4329                         e1000_flush_desc_rings(adapter);
4330         }
4331         e1000_clean_tx_ring(adapter->tx_ring);
4332         e1000_clean_rx_ring(adapter->rx_ring);
4333 }
4334
4335 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4336 {
4337         might_sleep();
4338         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4339                 usleep_range(1000, 1100);
4340         e1000e_down(adapter, true);
4341         e1000e_up(adapter);
4342         clear_bit(__E1000_RESETTING, &adapter->state);
4343 }
4344
4345 /**
4346  * e1000e_sanitize_systim - sanitize raw cycle counter reads
4347  * @hw: pointer to the HW structure
4348  * @systim: PHC time value read, sanitized and returned
4349  * @sts: structure to hold system time before and after reading SYSTIML,
4350  * may be NULL
4351  *
4352  * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4353  * check to see that the time is incrementing at a reasonable
4354  * rate and is a multiple of incvalue.
4355  **/
4356 static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim,
4357                                   struct ptp_system_timestamp *sts)
4358 {
4359         u64 time_delta, rem, temp;
4360         u64 systim_next;
4361         u32 incvalue;
4362         int i;
4363
4364         incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4365         for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4366                 /* latch SYSTIMH on read of SYSTIML */
4367                 ptp_read_system_prets(sts);
4368                 systim_next = (u64)er32(SYSTIML);
4369                 ptp_read_system_postts(sts);
4370                 systim_next |= (u64)er32(SYSTIMH) << 32;
4371
4372                 time_delta = systim_next - systim;
4373                 temp = time_delta;
4374                 /* VMWare users have seen incvalue of zero, don't div / 0 */
4375                 rem = incvalue ? do_div(temp, incvalue) : (time_delta != 0);
4376
4377                 systim = systim_next;
4378
4379                 if ((time_delta < E1000_82574_SYSTIM_EPSILON) && (rem == 0))
4380                         break;
4381         }
4382
4383         return systim;
4384 }
4385
4386 /**
4387  * e1000e_read_systim - read SYSTIM register
4388  * @adapter: board private structure
4389  * @sts: structure which will contain system time before and after reading
4390  * SYSTIML, may be NULL
4391  **/
4392 u64 e1000e_read_systim(struct e1000_adapter *adapter,
4393                        struct ptp_system_timestamp *sts)
4394 {
4395         struct e1000_hw *hw = &adapter->hw;
4396         u32 systimel, systimel_2, systimeh;
4397         u64 systim;
4398         /* SYSTIMH latching upon SYSTIML read does not work well.
4399          * This means that if SYSTIML overflows after we read it but before
4400          * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4401          * will experience a huge non linear increment in the systime value
4402          * to fix that we test for overflow and if true, we re-read systime.
4403          */
4404         ptp_read_system_prets(sts);
4405         systimel = er32(SYSTIML);
4406         ptp_read_system_postts(sts);
4407         systimeh = er32(SYSTIMH);
4408         /* Is systimel is so large that overflow is possible? */
4409         if (systimel >= (u32)0xffffffff - E1000_TIMINCA_INCVALUE_MASK) {
4410                 ptp_read_system_prets(sts);
4411                 systimel_2 = er32(SYSTIML);
4412                 ptp_read_system_postts(sts);
4413                 if (systimel > systimel_2) {
4414                         /* There was an overflow, read again SYSTIMH, and use
4415                          * systimel_2
4416                          */
4417                         systimeh = er32(SYSTIMH);
4418                         systimel = systimel_2;
4419                 }
4420         }
4421         systim = (u64)systimel;
4422         systim |= (u64)systimeh << 32;
4423
4424         if (adapter->flags2 & FLAG2_CHECK_SYSTIM_OVERFLOW)
4425                 systim = e1000e_sanitize_systim(hw, systim, sts);
4426
4427         return systim;
4428 }
4429
4430 /**
4431  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4432  * @cc: cyclecounter structure
4433  **/
4434 static u64 e1000e_cyclecounter_read(const struct cyclecounter *cc)
4435 {
4436         struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4437                                                      cc);
4438
4439         return e1000e_read_systim(adapter, NULL);
4440 }
4441
4442 /**
4443  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4444  * @adapter: board private structure to initialize
4445  *
4446  * e1000_sw_init initializes the Adapter private data structure.
4447  * Fields are initialized based on PCI device information and
4448  * OS network device settings (MTU size).
4449  **/
4450 static int e1000_sw_init(struct e1000_adapter *adapter)
4451 {
4452         struct net_device *netdev = adapter->netdev;
4453
4454         adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4455         adapter->rx_ps_bsize0 = 128;
4456         adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4457         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4458         adapter->tx_ring_count = E1000_DEFAULT_TXD;
4459         adapter->rx_ring_count = E1000_DEFAULT_RXD;
4460
4461         spin_lock_init(&adapter->stats64_lock);
4462
4463         e1000e_set_interrupt_capability(adapter);
4464
4465         if (e1000_alloc_queues(adapter))
4466                 return -ENOMEM;
4467
4468         /* Setup hardware time stamping cyclecounter */
4469         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4470                 adapter->cc.read = e1000e_cyclecounter_read;
4471                 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4472                 adapter->cc.mult = 1;
4473                 /* cc.shift set in e1000e_get_base_tininca() */
4474
4475                 spin_lock_init(&adapter->systim_lock);
4476                 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4477         }
4478
4479         /* Explicitly disable IRQ since the NIC can be in any state. */
4480         e1000_irq_disable(adapter);
4481
4482         set_bit(__E1000_DOWN, &adapter->state);
4483         return 0;
4484 }
4485
4486 /**
4487  * e1000_intr_msi_test - Interrupt Handler
4488  * @irq: interrupt number
4489  * @data: pointer to a network interface device structure
4490  **/
4491 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4492 {
4493         struct net_device *netdev = data;
4494         struct e1000_adapter *adapter = netdev_priv(netdev);
4495         struct e1000_hw *hw = &adapter->hw;
4496         u32 icr = er32(ICR);
4497
4498         e_dbg("icr is %08X\n", icr);
4499         if (icr & E1000_ICR_RXSEQ) {
4500                 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4501                 /* Force memory writes to complete before acknowledging the
4502                  * interrupt is handled.
4503                  */
4504                 wmb();
4505         }
4506
4507         return IRQ_HANDLED;
4508 }
4509
4510 /**
4511  * e1000_test_msi_interrupt - Returns 0 for successful test
4512  * @adapter: board private struct
4513  *
4514  * code flow taken from tg3.c
4515  **/
4516 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4517 {
4518         struct net_device *netdev = adapter->netdev;
4519         struct e1000_hw *hw = &adapter->hw;
4520         int err;
4521
4522         /* poll_enable hasn't been called yet, so don't need disable */
4523         /* clear any pending events */
4524         er32(ICR);
4525
4526         /* free the real vector and request a test handler */
4527         e1000_free_irq(adapter);
4528         e1000e_reset_interrupt_capability(adapter);
4529
4530         /* Assume that the test fails, if it succeeds then the test
4531          * MSI irq handler will unset this flag
4532          */
4533         adapter->flags |= FLAG_MSI_TEST_FAILED;
4534
4535         err = pci_enable_msi(adapter->pdev);
4536         if (err)
4537                 goto msi_test_failed;
4538
4539         err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4540                           netdev->name, netdev);
4541         if (err) {
4542                 pci_disable_msi(adapter->pdev);
4543                 goto msi_test_failed;
4544         }
4545
4546         /* Force memory writes to complete before enabling and firing an
4547          * interrupt.
4548          */
4549         wmb();
4550
4551         e1000_irq_enable(adapter);
4552
4553         /* fire an unusual interrupt on the test handler */
4554         ew32(ICS, E1000_ICS_RXSEQ);
4555         e1e_flush();
4556         msleep(100);
4557
4558         e1000_irq_disable(adapter);
4559
4560         rmb();                  /* read flags after interrupt has been fired */
4561
4562         if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4563                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4564                 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4565         } else {
4566                 e_dbg("MSI interrupt test succeeded!\n");
4567         }
4568
4569         free_irq(adapter->pdev->irq, netdev);
4570         pci_disable_msi(adapter->pdev);
4571
4572 msi_test_failed:
4573         e1000e_set_interrupt_capability(adapter);
4574         return e1000_request_irq(adapter);
4575 }
4576
4577 /**
4578  * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4579  * @adapter: board private struct
4580  *
4581  * code flow taken from tg3.c, called with e1000 interrupts disabled.
4582  **/
4583 static int e1000_test_msi(struct e1000_adapter *adapter)
4584 {
4585         int err;
4586         u16 pci_cmd;
4587
4588         if (!(adapter->flags & FLAG_MSI_ENABLED))
4589                 return 0;
4590
4591         /* disable SERR in case the MSI write causes a master abort */
4592         pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4593         if (pci_cmd & PCI_COMMAND_SERR)
4594                 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4595                                       pci_cmd & ~PCI_COMMAND_SERR);
4596
4597         err = e1000_test_msi_interrupt(adapter);
4598
4599         /* re-enable SERR */
4600         if (pci_cmd & PCI_COMMAND_SERR) {
4601                 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4602                 pci_cmd |= PCI_COMMAND_SERR;
4603                 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4604         }
4605
4606         return err;
4607 }
4608
4609 /**
4610  * e1000e_open - Called when a network interface is made active
4611  * @netdev: network interface device structure
4612  *
4613  * Returns 0 on success, negative value on failure
4614  *
4615  * The open entry point is called when a network interface is made
4616  * active by the system (IFF_UP).  At this point all resources needed
4617  * for transmit and receive operations are allocated, the interrupt
4618  * handler is registered with the OS, the watchdog timer is started,
4619  * and the stack is notified that the interface is ready.
4620  **/
4621 int e1000e_open(struct net_device *netdev)
4622 {
4623         struct e1000_adapter *adapter = netdev_priv(netdev);
4624         struct e1000_hw *hw = &adapter->hw;
4625         struct pci_dev *pdev = adapter->pdev;
4626         int err;
4627
4628         /* disallow open during test */
4629         if (test_bit(__E1000_TESTING, &adapter->state))
4630                 return -EBUSY;
4631
4632         pm_runtime_get_sync(&pdev->dev);
4633
4634         netif_carrier_off(netdev);
4635         netif_stop_queue(netdev);
4636
4637         /* allocate transmit descriptors */
4638         err = e1000e_setup_tx_resources(adapter->tx_ring);
4639         if (err)
4640                 goto err_setup_tx;
4641
4642         /* allocate receive descriptors */
4643         err = e1000e_setup_rx_resources(adapter->rx_ring);
4644         if (err)
4645                 goto err_setup_rx;
4646
4647         /* If AMT is enabled, let the firmware know that the network
4648          * interface is now open and reset the part to a known state.
4649          */
4650         if (adapter->flags & FLAG_HAS_AMT) {
4651                 e1000e_get_hw_control(adapter);
4652                 e1000e_reset(adapter);
4653         }
4654
4655         e1000e_power_up_phy(adapter);
4656
4657         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4658         if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4659                 e1000_update_mng_vlan(adapter);
4660
4661         /* DMA latency requirement to workaround jumbo issue */
4662         cpu_latency_qos_add_request(&adapter->pm_qos_req, PM_QOS_DEFAULT_VALUE);
4663
4664         /* before we allocate an interrupt, we must be ready to handle it.
4665          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4666          * as soon as we call pci_request_irq, so we have to setup our
4667          * clean_rx handler before we do so.
4668          */
4669         e1000_configure(adapter);
4670
4671         err = e1000_request_irq(adapter);
4672         if (err)
4673                 goto err_req_irq;
4674
4675         /* Work around PCIe errata with MSI interrupts causing some chipsets to
4676          * ignore e1000e MSI messages, which means we need to test our MSI
4677          * interrupt now
4678          */
4679         if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4680                 err = e1000_test_msi(adapter);
4681                 if (err) {
4682                         e_err("Interrupt allocation failed\n");
4683                         goto err_req_irq;
4684                 }
4685         }
4686
4687         /* From here on the code is the same as e1000e_up() */
4688         clear_bit(__E1000_DOWN, &adapter->state);
4689
4690         napi_enable(&adapter->napi);
4691
4692         e1000_irq_enable(adapter);
4693
4694         adapter->tx_hang_recheck = false;
4695
4696         hw->mac.get_link_status = true;
4697         pm_runtime_put(&pdev->dev);
4698
4699         e1000e_trigger_lsc(adapter);
4700
4701         return 0;
4702
4703 err_req_irq:
4704         cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4705         e1000e_release_hw_control(adapter);
4706         e1000_power_down_phy(adapter);
4707         e1000e_free_rx_resources(adapter->rx_ring);
4708 err_setup_rx:
4709         e1000e_free_tx_resources(adapter->tx_ring);
4710 err_setup_tx:
4711         e1000e_reset(adapter);
4712         pm_runtime_put_sync(&pdev->dev);
4713
4714         return err;
4715 }
4716
4717 /**
4718  * e1000e_close - Disables a network interface
4719  * @netdev: network interface device structure
4720  *
4721  * Returns 0, this is not allowed to fail
4722  *
4723  * The close entry point is called when an interface is de-activated
4724  * by the OS.  The hardware is still under the drivers control, but
4725  * needs to be disabled.  A global MAC reset is issued to stop the
4726  * hardware, and all transmit and receive resources are freed.
4727  **/
4728 int e1000e_close(struct net_device *netdev)
4729 {
4730         struct e1000_adapter *adapter = netdev_priv(netdev);
4731         struct pci_dev *pdev = adapter->pdev;
4732         int count = E1000_CHECK_RESET_COUNT;
4733
4734         while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4735                 usleep_range(10000, 11000);
4736
4737         WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4738
4739         pm_runtime_get_sync(&pdev->dev);
4740
4741         if (netif_device_present(netdev)) {
4742                 e1000e_down(adapter, true);
4743                 e1000_free_irq(adapter);
4744
4745                 /* Link status message must follow this format */
4746                 netdev_info(netdev, "NIC Link is Down\n");
4747         }
4748
4749         napi_disable(&adapter->napi);
4750
4751         e1000e_free_tx_resources(adapter->tx_ring);
4752         e1000e_free_rx_resources(adapter->rx_ring);
4753
4754         /* kill manageability vlan ID if supported, but not if a vlan with
4755          * the same ID is registered on the host OS (let 8021q kill it)
4756          */
4757         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4758                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4759                                        adapter->mng_vlan_id);
4760
4761         /* If AMT is enabled, let the firmware know that the network
4762          * interface is now closed
4763          */
4764         if ((adapter->flags & FLAG_HAS_AMT) &&
4765             !test_bit(__E1000_TESTING, &adapter->state))
4766                 e1000e_release_hw_control(adapter);
4767
4768         cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4769
4770         pm_runtime_put_sync(&pdev->dev);
4771
4772         return 0;
4773 }
4774
4775 /**
4776  * e1000_set_mac - Change the Ethernet Address of the NIC
4777  * @netdev: network interface device structure
4778  * @p: pointer to an address structure
4779  *
4780  * Returns 0 on success, negative on failure
4781  **/
4782 static int e1000_set_mac(struct net_device *netdev, void *p)
4783 {
4784         struct e1000_adapter *adapter = netdev_priv(netdev);
4785         struct e1000_hw *hw = &adapter->hw;
4786         struct sockaddr *addr = p;
4787
4788         if (!is_valid_ether_addr(addr->sa_data))
4789                 return -EADDRNOTAVAIL;
4790
4791         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4792         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4793
4794         hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4795
4796         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4797                 /* activate the work around */
4798                 e1000e_set_laa_state_82571(&adapter->hw, 1);
4799
4800                 /* Hold a copy of the LAA in RAR[14] This is done so that
4801                  * between the time RAR[0] gets clobbered  and the time it
4802                  * gets fixed (in e1000_watchdog), the actual LAA is in one
4803                  * of the RARs and no incoming packets directed to this port
4804                  * are dropped. Eventually the LAA will be in RAR[0] and
4805                  * RAR[14]
4806                  */
4807                 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4808                                     adapter->hw.mac.rar_entry_count - 1);
4809         }
4810
4811         return 0;
4812 }
4813
4814 /**
4815  * e1000e_update_phy_task - work thread to update phy
4816  * @work: pointer to our work struct
4817  *
4818  * this worker thread exists because we must acquire a
4819  * semaphore to read the phy, which we could msleep while
4820  * waiting for it, and we can't msleep in a timer.
4821  **/
4822 static void e1000e_update_phy_task(struct work_struct *work)
4823 {
4824         struct e1000_adapter *adapter = container_of(work,
4825                                                      struct e1000_adapter,
4826                                                      update_phy_task);
4827         struct e1000_hw *hw = &adapter->hw;
4828
4829         if (test_bit(__E1000_DOWN, &adapter->state))
4830                 return;
4831
4832         e1000_get_phy_info(hw);
4833
4834         /* Enable EEE on 82579 after link up */
4835         if (hw->phy.type >= e1000_phy_82579)
4836                 e1000_set_eee_pchlan(hw);
4837 }
4838
4839 /**
4840  * e1000_update_phy_info - timre call-back to update PHY info
4841  * @t: pointer to timer_list containing private info adapter
4842  *
4843  * Need to wait a few seconds after link up to get diagnostic information from
4844  * the phy
4845  **/
4846 static void e1000_update_phy_info(struct timer_list *t)
4847 {
4848         struct e1000_adapter *adapter = from_timer(adapter, t, phy_info_timer);
4849
4850         if (test_bit(__E1000_DOWN, &adapter->state))
4851                 return;
4852
4853         schedule_work(&adapter->update_phy_task);
4854 }
4855
4856 /**
4857  * e1000e_update_phy_stats - Update the PHY statistics counters
4858  * @adapter: board private structure
4859  *
4860  * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4861  **/
4862 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4863 {
4864         struct e1000_hw *hw = &adapter->hw;
4865         s32 ret_val;
4866         u16 phy_data;
4867
4868         ret_val = hw->phy.ops.acquire(hw);
4869         if (ret_val)
4870                 return;
4871
4872         /* A page set is expensive so check if already on desired page.
4873          * If not, set to the page with the PHY status registers.
4874          */
4875         hw->phy.addr = 1;
4876         ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4877                                            &phy_data);
4878         if (ret_val)
4879                 goto release;
4880         if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4881                 ret_val = hw->phy.ops.set_page(hw,
4882                                                HV_STATS_PAGE << IGP_PAGE_SHIFT);
4883                 if (ret_val)
4884                         goto release;
4885         }
4886
4887         /* Single Collision Count */
4888         hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4889         ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4890         if (!ret_val)
4891                 adapter->stats.scc += phy_data;
4892
4893         /* Excessive Collision Count */
4894         hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4895         ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4896         if (!ret_val)
4897                 adapter->stats.ecol += phy_data;
4898
4899         /* Multiple Collision Count */
4900         hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4901         ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4902         if (!ret_val)
4903                 adapter->stats.mcc += phy_data;
4904
4905         /* Late Collision Count */
4906         hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4907         ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4908         if (!ret_val)
4909                 adapter->stats.latecol += phy_data;
4910
4911         /* Collision Count - also used for adaptive IFS */
4912         hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4913         ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4914         if (!ret_val)
4915                 hw->mac.collision_delta = phy_data;
4916
4917         /* Defer Count */
4918         hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4919         ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4920         if (!ret_val)
4921                 adapter->stats.dc += phy_data;
4922
4923         /* Transmit with no CRS */
4924         hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4925         ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4926         if (!ret_val)
4927                 adapter->stats.tncrs += phy_data;
4928
4929 release:
4930         hw->phy.ops.release(hw);
4931 }
4932
4933 /**
4934  * e1000e_update_stats - Update the board statistics counters
4935  * @adapter: board private structure
4936  **/
4937 static void e1000e_update_stats(struct e1000_adapter *adapter)
4938 {
4939         struct net_device *netdev = adapter->netdev;
4940         struct e1000_hw *hw = &adapter->hw;
4941         struct pci_dev *pdev = adapter->pdev;
4942
4943         /* Prevent stats update while adapter is being reset, or if the pci
4944          * connection is down.
4945          */
4946         if (adapter->link_speed == 0)
4947                 return;
4948         if (pci_channel_offline(pdev))
4949                 return;
4950
4951         adapter->stats.crcerrs += er32(CRCERRS);
4952         adapter->stats.gprc += er32(GPRC);
4953         adapter->stats.gorc += er32(GORCL);
4954         er32(GORCH);            /* Clear gorc */
4955         adapter->stats.bprc += er32(BPRC);
4956         adapter->stats.mprc += er32(MPRC);
4957         adapter->stats.roc += er32(ROC);
4958
4959         adapter->stats.mpc += er32(MPC);
4960
4961         /* Half-duplex statistics */
4962         if (adapter->link_duplex == HALF_DUPLEX) {
4963                 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4964                         e1000e_update_phy_stats(adapter);
4965                 } else {
4966                         adapter->stats.scc += er32(SCC);
4967                         adapter->stats.ecol += er32(ECOL);
4968                         adapter->stats.mcc += er32(MCC);
4969                         adapter->stats.latecol += er32(LATECOL);
4970                         adapter->stats.dc += er32(DC);
4971
4972                         hw->mac.collision_delta = er32(COLC);
4973
4974                         if ((hw->mac.type != e1000_82574) &&
4975                             (hw->mac.type != e1000_82583))
4976                                 adapter->stats.tncrs += er32(TNCRS);
4977                 }
4978                 adapter->stats.colc += hw->mac.collision_delta;
4979         }
4980
4981         adapter->stats.xonrxc += er32(XONRXC);
4982         adapter->stats.xontxc += er32(XONTXC);
4983         adapter->stats.xoffrxc += er32(XOFFRXC);
4984         adapter->stats.xofftxc += er32(XOFFTXC);
4985         adapter->stats.gptc += er32(GPTC);
4986         adapter->stats.gotc += er32(GOTCL);
4987         er32(GOTCH);            /* Clear gotc */
4988         adapter->stats.rnbc += er32(RNBC);
4989         adapter->stats.ruc += er32(RUC);
4990
4991         adapter->stats.mptc += er32(MPTC);
4992         adapter->stats.bptc += er32(BPTC);
4993
4994         /* used for adaptive IFS */
4995
4996         hw->mac.tx_packet_delta = er32(TPT);
4997         adapter->stats.tpt += hw->mac.tx_packet_delta;
4998
4999         adapter->stats.algnerrc += er32(ALGNERRC);
5000         adapter->stats.rxerrc += er32(RXERRC);
5001         adapter->stats.cexterr += er32(CEXTERR);
5002         adapter->stats.tsctc += er32(TSCTC);
5003         adapter->stats.tsctfc += er32(TSCTFC);
5004
5005         /* Fill out the OS statistics structure */
5006         netdev->stats.multicast = adapter->stats.mprc;
5007         netdev->stats.collisions = adapter->stats.colc;
5008
5009         /* Rx Errors */
5010
5011         /* RLEC on some newer hardware can be incorrect so build
5012          * our own version based on RUC and ROC
5013          */
5014         netdev->stats.rx_errors = adapter->stats.rxerrc +
5015             adapter->stats.crcerrs + adapter->stats.algnerrc +
5016             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5017         netdev->stats.rx_length_errors = adapter->stats.ruc +
5018             adapter->stats.roc;
5019         netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
5020         netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
5021         netdev->stats.rx_missed_errors = adapter->stats.mpc;
5022
5023         /* Tx Errors */
5024         netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5025         netdev->stats.tx_aborted_errors = adapter->stats.ecol;
5026         netdev->stats.tx_window_errors = adapter->stats.latecol;
5027         netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
5028
5029         /* Tx Dropped needs to be maintained elsewhere */
5030
5031         /* Management Stats */
5032         adapter->stats.mgptc += er32(MGTPTC);
5033         adapter->stats.mgprc += er32(MGTPRC);
5034         adapter->stats.mgpdc += er32(MGTPDC);
5035
5036         /* Correctable ECC Errors */
5037         if (hw->mac.type >= e1000_pch_lpt) {
5038                 u32 pbeccsts = er32(PBECCSTS);
5039
5040                 adapter->corr_errors +=
5041                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
5042                 adapter->uncorr_errors +=
5043                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
5044                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
5045         }
5046 }
5047
5048 /**
5049  * e1000_phy_read_status - Update the PHY register status snapshot
5050  * @adapter: board private structure
5051  **/
5052 static void e1000_phy_read_status(struct e1000_adapter *adapter)
5053 {
5054         struct e1000_hw *hw = &adapter->hw;
5055         struct e1000_phy_regs *phy = &adapter->phy_regs;
5056
5057         if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
5058             (er32(STATUS) & E1000_STATUS_LU) &&
5059             (adapter->hw.phy.media_type == e1000_media_type_copper)) {
5060                 int ret_val;
5061
5062                 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
5063                 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
5064                 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
5065                 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
5066                 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
5067                 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
5068                 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
5069                 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
5070                 if (ret_val)
5071                         e_warn("Error reading PHY register\n");
5072         } else {
5073                 /* Do not read PHY registers if link is not up
5074                  * Set values to typical power-on defaults
5075                  */
5076                 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
5077                 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
5078                              BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
5079                              BMSR_ERCAP);
5080                 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
5081                                   ADVERTISE_ALL | ADVERTISE_CSMA);
5082                 phy->lpa = 0;
5083                 phy->expansion = EXPANSION_ENABLENPAGE;
5084                 phy->ctrl1000 = ADVERTISE_1000FULL;
5085                 phy->stat1000 = 0;
5086                 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
5087         }
5088 }
5089
5090 static void e1000_print_link_info(struct e1000_adapter *adapter)
5091 {
5092         struct e1000_hw *hw = &adapter->hw;
5093         u32 ctrl = er32(CTRL);
5094
5095         /* Link status message must follow this format for user tools */
5096         netdev_info(adapter->netdev,
5097                     "NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5098                     adapter->link_speed,
5099                     adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5100                     (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5101                     (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5102                     (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5103 }
5104
5105 static bool e1000e_has_link(struct e1000_adapter *adapter)
5106 {
5107         struct e1000_hw *hw = &adapter->hw;
5108         bool link_active = false;
5109         s32 ret_val = 0;
5110
5111         /* get_link_status is set on LSC (link status) interrupt or
5112          * Rx sequence error interrupt.  get_link_status will stay
5113          * true until the check_for_link establishes link
5114          * for copper adapters ONLY
5115          */
5116         switch (hw->phy.media_type) {
5117         case e1000_media_type_copper:
5118                 if (hw->mac.get_link_status) {
5119                         ret_val = hw->mac.ops.check_for_link(hw);
5120                         link_active = !hw->mac.get_link_status;
5121                 } else {
5122                         link_active = true;
5123                 }
5124                 break;
5125         case e1000_media_type_fiber:
5126                 ret_val = hw->mac.ops.check_for_link(hw);
5127                 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5128                 break;
5129         case e1000_media_type_internal_serdes:
5130                 ret_val = hw->mac.ops.check_for_link(hw);
5131                 link_active = hw->mac.serdes_has_link;
5132                 break;
5133         default:
5134         case e1000_media_type_unknown:
5135                 break;
5136         }
5137
5138         if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5139             (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5140                 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5141                 e_info("Gigabit has been disabled, downgrading speed\n");
5142         }
5143
5144         return link_active;
5145 }
5146
5147 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5148 {
5149         /* make sure the receive unit is started */
5150         if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5151             (adapter->flags & FLAG_RESTART_NOW)) {
5152                 struct e1000_hw *hw = &adapter->hw;
5153                 u32 rctl = er32(RCTL);
5154
5155                 ew32(RCTL, rctl | E1000_RCTL_EN);
5156                 adapter->flags &= ~FLAG_RESTART_NOW;
5157         }
5158 }
5159
5160 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5161 {
5162         struct e1000_hw *hw = &adapter->hw;
5163
5164         /* With 82574 controllers, PHY needs to be checked periodically
5165          * for hung state and reset, if two calls return true
5166          */
5167         if (e1000_check_phy_82574(hw))
5168                 adapter->phy_hang_count++;
5169         else
5170                 adapter->phy_hang_count = 0;
5171
5172         if (adapter->phy_hang_count > 1) {
5173                 adapter->phy_hang_count = 0;
5174                 e_dbg("PHY appears hung - resetting\n");
5175                 schedule_work(&adapter->reset_task);
5176         }
5177 }
5178
5179 /**
5180  * e1000_watchdog - Timer Call-back
5181  * @t: pointer to timer_list containing private info adapter
5182  **/
5183 static void e1000_watchdog(struct timer_list *t)
5184 {
5185         struct e1000_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5186
5187         /* Do the rest outside of interrupt context */
5188         schedule_work(&adapter->watchdog_task);
5189
5190         /* TODO: make this use queue_delayed_work() */
5191 }
5192
5193 static void e1000_watchdog_task(struct work_struct *work)
5194 {
5195         struct e1000_adapter *adapter = container_of(work,
5196                                                      struct e1000_adapter,
5197                                                      watchdog_task);
5198         struct net_device *netdev = adapter->netdev;
5199         struct e1000_mac_info *mac = &adapter->hw.mac;
5200         struct e1000_phy_info *phy = &adapter->hw.phy;
5201         struct e1000_ring *tx_ring = adapter->tx_ring;
5202         u32 dmoff_exit_timeout = 100, tries = 0;
5203         struct e1000_hw *hw = &adapter->hw;
5204         u32 link, tctl, pcim_state;
5205
5206         if (test_bit(__E1000_DOWN, &adapter->state))
5207                 return;
5208
5209         link = e1000e_has_link(adapter);
5210         if ((netif_carrier_ok(netdev)) && link) {
5211                 /* Cancel scheduled suspend requests. */
5212                 pm_runtime_resume(netdev->dev.parent);
5213
5214                 e1000e_enable_receives(adapter);
5215                 goto link_up;
5216         }
5217
5218         if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5219             (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5220                 e1000_update_mng_vlan(adapter);
5221
5222         if (link) {
5223                 if (!netif_carrier_ok(netdev)) {
5224                         bool txb2b = true;
5225
5226                         /* Cancel scheduled suspend requests. */
5227                         pm_runtime_resume(netdev->dev.parent);
5228
5229                         /* Checking if MAC is in DMoff state*/
5230                         if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) {
5231                                 pcim_state = er32(STATUS);
5232                                 while (pcim_state & E1000_STATUS_PCIM_STATE) {
5233                                         if (tries++ == dmoff_exit_timeout) {
5234                                                 e_dbg("Error in exiting dmoff\n");
5235                                                 break;
5236                                         }
5237                                         usleep_range(10000, 20000);
5238                                         pcim_state = er32(STATUS);
5239
5240                                         /* Checking if MAC exited DMoff state */
5241                                         if (!(pcim_state & E1000_STATUS_PCIM_STATE))
5242                                                 e1000_phy_hw_reset(&adapter->hw);
5243                                 }
5244                         }
5245
5246                         /* update snapshot of PHY registers on LSC */
5247                         e1000_phy_read_status(adapter);
5248                         mac->ops.get_link_up_info(&adapter->hw,
5249                                                   &adapter->link_speed,
5250                                                   &adapter->link_duplex);
5251                         e1000_print_link_info(adapter);
5252
5253                         /* check if SmartSpeed worked */
5254                         e1000e_check_downshift(hw);
5255                         if (phy->speed_downgraded)
5256                                 netdev_warn(netdev,
5257                                             "Link Speed was downgraded by SmartSpeed\n");
5258
5259                         /* On supported PHYs, check for duplex mismatch only
5260                          * if link has autonegotiated at 10/100 half
5261                          */
5262                         if ((hw->phy.type == e1000_phy_igp_3 ||
5263                              hw->phy.type == e1000_phy_bm) &&
5264                             hw->mac.autoneg &&
5265                             (adapter->link_speed == SPEED_10 ||
5266                              adapter->link_speed == SPEED_100) &&
5267                             (adapter->link_duplex == HALF_DUPLEX)) {
5268                                 u16 autoneg_exp;
5269
5270                                 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5271
5272                                 if (!(autoneg_exp & EXPANSION_NWAY))
5273                                         e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
5274                         }
5275
5276                         /* adjust timeout factor according to speed/duplex */
5277                         adapter->tx_timeout_factor = 1;
5278                         switch (adapter->link_speed) {
5279                         case SPEED_10:
5280                                 txb2b = false;
5281                                 adapter->tx_timeout_factor = 16;
5282                                 break;
5283                         case SPEED_100:
5284                                 txb2b = false;
5285                                 adapter->tx_timeout_factor = 10;
5286                                 break;
5287                         }
5288
5289                         /* workaround: re-program speed mode bit after
5290                          * link-up event
5291                          */
5292                         if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5293                             !txb2b) {
5294                                 u32 tarc0;
5295
5296                                 tarc0 = er32(TARC(0));
5297                                 tarc0 &= ~SPEED_MODE_BIT;
5298                                 ew32(TARC(0), tarc0);
5299                         }
5300
5301                         /* disable TSO for pcie and 10/100 speeds, to avoid
5302                          * some hardware issues
5303                          */
5304                         if (!(adapter->flags & FLAG_TSO_FORCE)) {
5305                                 switch (adapter->link_speed) {
5306                                 case SPEED_10:
5307                                 case SPEED_100:
5308                                         e_info("10/100 speed: disabling TSO\n");
5309                                         netdev->features &= ~NETIF_F_TSO;
5310                                         netdev->features &= ~NETIF_F_TSO6;
5311                                         break;
5312                                 case SPEED_1000:
5313                                         netdev->features |= NETIF_F_TSO;
5314                                         netdev->features |= NETIF_F_TSO6;
5315                                         break;
5316                                 default:
5317                                         /* oops */
5318                                         break;
5319                                 }
5320                                 if (hw->mac.type == e1000_pch_spt) {
5321                                         netdev->features &= ~NETIF_F_TSO;
5322                                         netdev->features &= ~NETIF_F_TSO6;
5323                                 }
5324                         }
5325
5326                         /* enable transmits in the hardware, need to do this
5327                          * after setting TARC(0)
5328                          */
5329                         tctl = er32(TCTL);
5330                         tctl |= E1000_TCTL_EN;
5331                         ew32(TCTL, tctl);
5332
5333                         /* Perform any post-link-up configuration before
5334                          * reporting link up.
5335                          */
5336                         if (phy->ops.cfg_on_link_up)
5337                                 phy->ops.cfg_on_link_up(hw);
5338
5339                         netif_wake_queue(netdev);
5340                         netif_carrier_on(netdev);
5341
5342                         if (!test_bit(__E1000_DOWN, &adapter->state))
5343                                 mod_timer(&adapter->phy_info_timer,
5344                                           round_jiffies(jiffies + 2 * HZ));
5345                 }
5346         } else {
5347                 if (netif_carrier_ok(netdev)) {
5348                         adapter->link_speed = 0;
5349                         adapter->link_duplex = 0;
5350                         /* Link status message must follow this format */
5351                         netdev_info(netdev, "NIC Link is Down\n");
5352                         netif_carrier_off(netdev);
5353                         netif_stop_queue(netdev);
5354                         if (!test_bit(__E1000_DOWN, &adapter->state))
5355                                 mod_timer(&adapter->phy_info_timer,
5356                                           round_jiffies(jiffies + 2 * HZ));
5357
5358                         /* 8000ES2LAN requires a Rx packet buffer work-around
5359                          * on link down event; reset the controller to flush
5360                          * the Rx packet buffer.
5361                          */
5362                         if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5363                                 adapter->flags |= FLAG_RESTART_NOW;
5364                         else
5365                                 pm_schedule_suspend(netdev->dev.parent,
5366                                                     LINK_TIMEOUT);
5367                 }
5368         }
5369
5370 link_up:
5371         spin_lock(&adapter->stats64_lock);
5372         e1000e_update_stats(adapter);
5373
5374         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5375         adapter->tpt_old = adapter->stats.tpt;
5376         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5377         adapter->colc_old = adapter->stats.colc;
5378
5379         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5380         adapter->gorc_old = adapter->stats.gorc;
5381         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5382         adapter->gotc_old = adapter->stats.gotc;
5383         spin_unlock(&adapter->stats64_lock);
5384
5385         /* If the link is lost the controller stops DMA, but
5386          * if there is queued Tx work it cannot be done.  So
5387          * reset the controller to flush the Tx packet buffers.
5388          */
5389         if (!netif_carrier_ok(netdev) &&
5390             (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5391                 adapter->flags |= FLAG_RESTART_NOW;
5392
5393         /* If reset is necessary, do it outside of interrupt context. */
5394         if (adapter->flags & FLAG_RESTART_NOW) {
5395                 schedule_work(&adapter->reset_task);
5396                 /* return immediately since reset is imminent */
5397                 return;
5398         }
5399
5400         e1000e_update_adaptive(&adapter->hw);
5401
5402         /* Simple mode for Interrupt Throttle Rate (ITR) */
5403         if (adapter->itr_setting == 4) {
5404                 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5405                  * Total asymmetrical Tx or Rx gets ITR=8000;
5406                  * everyone else is between 2000-8000.
5407                  */
5408                 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5409                 u32 dif = (adapter->gotc > adapter->gorc ?
5410                            adapter->gotc - adapter->gorc :
5411                            adapter->gorc - adapter->gotc) / 10000;
5412                 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5413
5414                 e1000e_write_itr(adapter, itr);
5415         }
5416
5417         /* Cause software interrupt to ensure Rx ring is cleaned */
5418         if (adapter->msix_entries)
5419                 ew32(ICS, adapter->rx_ring->ims_val);
5420         else
5421                 ew32(ICS, E1000_ICS_RXDMT0);
5422
5423         /* flush pending descriptors to memory before detecting Tx hang */
5424         e1000e_flush_descriptors(adapter);
5425
5426         /* Force detection of hung controller every watchdog period */
5427         adapter->detect_tx_hung = true;
5428
5429         /* With 82571 controllers, LAA may be overwritten due to controller
5430          * reset from the other port. Set the appropriate LAA in RAR[0]
5431          */
5432         if (e1000e_get_laa_state_82571(hw))
5433                 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5434
5435         if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5436                 e1000e_check_82574_phy_workaround(adapter);
5437
5438         /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5439         if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5440                 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5441                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5442                         er32(RXSTMPH);
5443                         adapter->rx_hwtstamp_cleared++;
5444                 } else {
5445                         adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5446                 }
5447         }
5448
5449         /* Reset the timer */
5450         if (!test_bit(__E1000_DOWN, &adapter->state))
5451                 mod_timer(&adapter->watchdog_timer,
5452                           round_jiffies(jiffies + 2 * HZ));
5453 }
5454
5455 #define E1000_TX_FLAGS_CSUM             0x00000001
5456 #define E1000_TX_FLAGS_VLAN             0x00000002
5457 #define E1000_TX_FLAGS_TSO              0x00000004
5458 #define E1000_TX_FLAGS_IPV4             0x00000008
5459 #define E1000_TX_FLAGS_NO_FCS           0x00000010
5460 #define E1000_TX_FLAGS_HWTSTAMP         0x00000020
5461 #define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
5462 #define E1000_TX_FLAGS_VLAN_SHIFT       16
5463
5464 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5465                      __be16 protocol)
5466 {
5467         struct e1000_context_desc *context_desc;
5468         struct e1000_buffer *buffer_info;
5469         unsigned int i;
5470         u32 cmd_length = 0;
5471         u16 ipcse = 0, mss;
5472         u8 ipcss, ipcso, tucss, tucso, hdr_len;
5473         int err;
5474
5475         if (!skb_is_gso(skb))
5476                 return 0;
5477
5478         err = skb_cow_head(skb, 0);
5479         if (err < 0)
5480                 return err;
5481
5482         hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5483         mss = skb_shinfo(skb)->gso_size;
5484         if (protocol == htons(ETH_P_IP)) {
5485                 struct iphdr *iph = ip_hdr(skb);
5486                 iph->tot_len = 0;
5487                 iph->check = 0;
5488                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5489                                                          0, IPPROTO_TCP, 0);
5490                 cmd_length = E1000_TXD_CMD_IP;
5491                 ipcse = skb_transport_offset(skb) - 1;
5492         } else if (skb_is_gso_v6(skb)) {
5493                 tcp_v6_gso_csum_prep(skb);
5494                 ipcse = 0;
5495         }
5496         ipcss = skb_network_offset(skb);
5497         ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5498         tucss = skb_transport_offset(skb);
5499         tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5500
5501         cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5502                        E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5503
5504         i = tx_ring->next_to_use;
5505         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5506         buffer_info = &tx_ring->buffer_info[i];
5507
5508         context_desc->lower_setup.ip_fields.ipcss = ipcss;
5509         context_desc->lower_setup.ip_fields.ipcso = ipcso;
5510         context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5511         context_desc->upper_setup.tcp_fields.tucss = tucss;
5512         context_desc->upper_setup.tcp_fields.tucso = tucso;
5513         context_desc->upper_setup.tcp_fields.tucse = 0;
5514         context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5515         context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5516         context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5517
5518         buffer_info->time_stamp = jiffies;
5519         buffer_info->next_to_watch = i;
5520
5521         i++;
5522         if (i == tx_ring->count)
5523                 i = 0;
5524         tx_ring->next_to_use = i;
5525
5526         return 1;
5527 }
5528
5529 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5530                           __be16 protocol)
5531 {
5532         struct e1000_adapter *adapter = tx_ring->adapter;
5533         struct e1000_context_desc *context_desc;
5534         struct e1000_buffer *buffer_info;
5535         unsigned int i;
5536         u8 css;
5537         u32 cmd_len = E1000_TXD_CMD_DEXT;
5538
5539         if (skb->ip_summed != CHECKSUM_PARTIAL)
5540                 return false;
5541
5542         switch (protocol) {
5543         case cpu_to_be16(ETH_P_IP):
5544                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5545                         cmd_len |= E1000_TXD_CMD_TCP;
5546                 break;
5547         case cpu_to_be16(ETH_P_IPV6):
5548                 /* XXX not handling all IPV6 headers */
5549                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5550                         cmd_len |= E1000_TXD_CMD_TCP;
5551                 break;
5552         default:
5553                 if (unlikely(net_ratelimit()))
5554                         e_warn("checksum_partial proto=%x!\n",
5555                                be16_to_cpu(protocol));
5556                 break;
5557         }
5558
5559         css = skb_checksum_start_offset(skb);
5560
5561         i = tx_ring->next_to_use;
5562         buffer_info = &tx_ring->buffer_info[i];
5563         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5564
5565         context_desc->lower_setup.ip_config = 0;
5566         context_desc->upper_setup.tcp_fields.tucss = css;
5567         context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5568         context_desc->upper_setup.tcp_fields.tucse = 0;
5569         context_desc->tcp_seg_setup.data = 0;
5570         context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5571
5572         buffer_info->time_stamp = jiffies;
5573         buffer_info->next_to_watch = i;
5574
5575         i++;
5576         if (i == tx_ring->count)
5577                 i = 0;
5578         tx_ring->next_to_use = i;
5579
5580         return true;
5581 }
5582
5583 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5584                         unsigned int first, unsigned int max_per_txd,
5585                         unsigned int nr_frags)
5586 {
5587         struct e1000_adapter *adapter = tx_ring->adapter;
5588         struct pci_dev *pdev = adapter->pdev;
5589         struct e1000_buffer *buffer_info;
5590         unsigned int len = skb_headlen(skb);
5591         unsigned int offset = 0, size, count = 0, i;
5592         unsigned int f, bytecount, segs;
5593
5594         i = tx_ring->next_to_use;
5595
5596         while (len) {
5597                 buffer_info = &tx_ring->buffer_info[i];
5598                 size = min(len, max_per_txd);
5599
5600                 buffer_info->length = size;
5601                 buffer_info->time_stamp = jiffies;
5602                 buffer_info->next_to_watch = i;
5603                 buffer_info->dma = dma_map_single(&pdev->dev,
5604                                                   skb->data + offset,
5605                                                   size, DMA_TO_DEVICE);
5606                 buffer_info->mapped_as_page = false;
5607                 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5608                         goto dma_error;
5609
5610                 len -= size;
5611                 offset += size;
5612                 count++;
5613
5614                 if (len) {
5615                         i++;
5616                         if (i == tx_ring->count)
5617                                 i = 0;
5618                 }
5619         }
5620
5621         for (f = 0; f < nr_frags; f++) {
5622                 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
5623
5624                 len = skb_frag_size(frag);
5625                 offset = 0;
5626
5627                 while (len) {
5628                         i++;
5629                         if (i == tx_ring->count)
5630                                 i = 0;
5631
5632                         buffer_info = &tx_ring->buffer_info[i];
5633                         size = min(len, max_per_txd);
5634
5635                         buffer_info->length = size;
5636                         buffer_info->time_stamp = jiffies;
5637                         buffer_info->next_to_watch = i;
5638                         buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5639                                                             offset, size,
5640                                                             DMA_TO_DEVICE);
5641                         buffer_info->mapped_as_page = true;
5642                         if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5643                                 goto dma_error;
5644
5645                         len -= size;
5646                         offset += size;
5647                         count++;
5648                 }
5649         }
5650
5651         segs = skb_shinfo(skb)->gso_segs ? : 1;
5652         /* multiply data chunks by size of headers */
5653         bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5654
5655         tx_ring->buffer_info[i].skb = skb;
5656         tx_ring->buffer_info[i].segs = segs;
5657         tx_ring->buffer_info[i].bytecount = bytecount;
5658         tx_ring->buffer_info[first].next_to_watch = i;
5659
5660         return count;
5661
5662 dma_error:
5663         dev_err(&pdev->dev, "Tx DMA map failed\n");
5664         buffer_info->dma = 0;
5665         if (count)
5666                 count--;
5667
5668         while (count--) {
5669                 if (i == 0)
5670                         i += tx_ring->count;
5671                 i--;
5672                 buffer_info = &tx_ring->buffer_info[i];
5673                 e1000_put_txbuf(tx_ring, buffer_info, true);
5674         }
5675
5676         return 0;
5677 }
5678
5679 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5680 {
5681         struct e1000_adapter *adapter = tx_ring->adapter;
5682         struct e1000_tx_desc *tx_desc = NULL;
5683         struct e1000_buffer *buffer_info;
5684         u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5685         unsigned int i;
5686
5687         if (tx_flags & E1000_TX_FLAGS_TSO) {
5688                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5689                     E1000_TXD_CMD_TSE;
5690                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5691
5692                 if (tx_flags & E1000_TX_FLAGS_IPV4)
5693                         txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5694         }
5695
5696         if (tx_flags & E1000_TX_FLAGS_CSUM) {
5697                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5698                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5699         }
5700
5701         if (tx_flags & E1000_TX_FLAGS_VLAN) {
5702                 txd_lower |= E1000_TXD_CMD_VLE;
5703                 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5704         }
5705
5706         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5707                 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5708
5709         if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5710                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5711                 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5712         }
5713
5714         i = tx_ring->next_to_use;
5715
5716         do {
5717                 buffer_info = &tx_ring->buffer_info[i];
5718                 tx_desc = E1000_TX_DESC(*tx_ring, i);
5719                 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5720                 tx_desc->lower.data = cpu_to_le32(txd_lower |
5721                                                   buffer_info->length);
5722                 tx_desc->upper.data = cpu_to_le32(txd_upper);
5723
5724                 i++;
5725                 if (i == tx_ring->count)
5726                         i = 0;
5727         } while (--count > 0);
5728
5729         tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5730
5731         /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5732         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5733                 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5734
5735         /* Force memory writes to complete before letting h/w
5736          * know there are new descriptors to fetch.  (Only
5737          * applicable for weak-ordered memory model archs,
5738          * such as IA-64).
5739          */
5740         wmb();
5741
5742         tx_ring->next_to_use = i;
5743 }
5744
5745 #define MINIMUM_DHCP_PACKET_SIZE 282
5746 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5747                                     struct sk_buff *skb)
5748 {
5749         struct e1000_hw *hw = &adapter->hw;
5750         u16 length, offset;
5751
5752         if (skb_vlan_tag_present(skb) &&
5753             !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5754               (adapter->hw.mng_cookie.status &
5755                E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5756                 return 0;
5757
5758         if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5759                 return 0;
5760
5761         if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5762                 return 0;
5763
5764         {
5765                 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5766                 struct udphdr *udp;
5767
5768                 if (ip->protocol != IPPROTO_UDP)
5769                         return 0;
5770
5771                 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5772                 if (ntohs(udp->dest) != 67)
5773                         return 0;
5774
5775                 offset = (u8 *)udp + 8 - skb->data;
5776                 length = skb->len - offset;
5777                 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5778         }
5779
5780         return 0;
5781 }
5782
5783 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5784 {
5785         struct e1000_adapter *adapter = tx_ring->adapter;
5786
5787         netif_stop_queue(adapter->netdev);
5788         /* Herbert's original patch had:
5789          *  smp_mb__after_netif_stop_queue();
5790          * but since that doesn't exist yet, just open code it.
5791          */
5792         smp_mb();
5793
5794         /* We need to check again in a case another CPU has just
5795          * made room available.
5796          */
5797         if (e1000_desc_unused(tx_ring) < size)
5798                 return -EBUSY;
5799
5800         /* A reprieve! */
5801         netif_start_queue(adapter->netdev);
5802         ++adapter->restart_queue;
5803         return 0;
5804 }
5805
5806 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5807 {
5808         BUG_ON(size > tx_ring->count);
5809
5810         if (e1000_desc_unused(tx_ring) >= size)
5811                 return 0;
5812         return __e1000_maybe_stop_tx(tx_ring, size);
5813 }
5814
5815 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5816                                     struct net_device *netdev)
5817 {
5818         struct e1000_adapter *adapter = netdev_priv(netdev);
5819         struct e1000_ring *tx_ring = adapter->tx_ring;
5820         unsigned int first;
5821         unsigned int tx_flags = 0;
5822         unsigned int len = skb_headlen(skb);
5823         unsigned int nr_frags;
5824         unsigned int mss;
5825         int count = 0;
5826         int tso;
5827         unsigned int f;
5828         __be16 protocol = vlan_get_protocol(skb);
5829
5830         if (test_bit(__E1000_DOWN, &adapter->state)) {
5831                 dev_kfree_skb_any(skb);
5832                 return NETDEV_TX_OK;
5833         }
5834
5835         if (skb->len <= 0) {
5836                 dev_kfree_skb_any(skb);
5837                 return NETDEV_TX_OK;
5838         }
5839
5840         /* The minimum packet size with TCTL.PSP set is 17 bytes so
5841          * pad skb in order to meet this minimum size requirement
5842          */
5843         if (skb_put_padto(skb, 17))
5844                 return NETDEV_TX_OK;
5845
5846         mss = skb_shinfo(skb)->gso_size;
5847         if (mss) {
5848                 u8 hdr_len;
5849
5850                 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5851                  * points to just header, pull a few bytes of payload from
5852                  * frags into skb->data
5853                  */
5854                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5855                 /* we do this workaround for ES2LAN, but it is un-necessary,
5856                  * avoiding it could save a lot of cycles
5857                  */
5858                 if (skb->data_len && (hdr_len == len)) {
5859                         unsigned int pull_size;
5860
5861                         pull_size = min_t(unsigned int, 4, skb->data_len);
5862                         if (!__pskb_pull_tail(skb, pull_size)) {
5863                                 e_err("__pskb_pull_tail failed.\n");
5864                                 dev_kfree_skb_any(skb);
5865                                 return NETDEV_TX_OK;
5866                         }
5867                         len = skb_headlen(skb);
5868                 }
5869         }
5870
5871         /* reserve a descriptor for the offload context */
5872         if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5873                 count++;
5874         count++;
5875
5876         count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5877
5878         nr_frags = skb_shinfo(skb)->nr_frags;
5879         for (f = 0; f < nr_frags; f++)
5880                 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5881                                       adapter->tx_fifo_limit);
5882
5883         if (adapter->hw.mac.tx_pkt_filtering)
5884                 e1000_transfer_dhcp_info(adapter, skb);
5885
5886         /* need: count + 2 desc gap to keep tail from touching
5887          * head, otherwise try next time
5888          */
5889         if (e1000_maybe_stop_tx(tx_ring, count + 2))
5890                 return NETDEV_TX_BUSY;
5891
5892         if (skb_vlan_tag_present(skb)) {
5893                 tx_flags |= E1000_TX_FLAGS_VLAN;
5894                 tx_flags |= (skb_vlan_tag_get(skb) <<
5895                              E1000_TX_FLAGS_VLAN_SHIFT);
5896         }
5897
5898         first = tx_ring->next_to_use;
5899
5900         tso = e1000_tso(tx_ring, skb, protocol);
5901         if (tso < 0) {
5902                 dev_kfree_skb_any(skb);
5903                 return NETDEV_TX_OK;
5904         }
5905
5906         if (tso)
5907                 tx_flags |= E1000_TX_FLAGS_TSO;
5908         else if (e1000_tx_csum(tx_ring, skb, protocol))
5909                 tx_flags |= E1000_TX_FLAGS_CSUM;
5910
5911         /* Old method was to assume IPv4 packet by default if TSO was enabled.
5912          * 82571 hardware supports TSO capabilities for IPv6 as well...
5913          * no longer assume, we must.
5914          */
5915         if (protocol == htons(ETH_P_IP))
5916                 tx_flags |= E1000_TX_FLAGS_IPV4;
5917
5918         if (unlikely(skb->no_fcs))
5919                 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5920
5921         /* if count is 0 then mapping error has occurred */
5922         count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5923                              nr_frags);
5924         if (count) {
5925                 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5926                     (adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
5927                         if (!adapter->tx_hwtstamp_skb) {
5928                                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5929                                 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5930                                 adapter->tx_hwtstamp_skb = skb_get(skb);
5931                                 adapter->tx_hwtstamp_start = jiffies;
5932                                 schedule_work(&adapter->tx_hwtstamp_work);
5933                         } else {
5934                                 adapter->tx_hwtstamp_skipped++;
5935                         }
5936                 }
5937
5938                 skb_tx_timestamp(skb);
5939
5940                 netdev_sent_queue(netdev, skb->len);
5941                 e1000_tx_queue(tx_ring, tx_flags, count);
5942                 /* Make sure there is space in the ring for the next send. */
5943                 e1000_maybe_stop_tx(tx_ring,
5944                                     (MAX_SKB_FRAGS *
5945                                      DIV_ROUND_UP(PAGE_SIZE,
5946                                                   adapter->tx_fifo_limit) + 2));
5947
5948                 if (!netdev_xmit_more() ||
5949                     netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5950                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5951                                 e1000e_update_tdt_wa(tx_ring,
5952                                                      tx_ring->next_to_use);
5953                         else
5954                                 writel(tx_ring->next_to_use, tx_ring->tail);
5955                 }
5956         } else {
5957                 dev_kfree_skb_any(skb);
5958                 tx_ring->buffer_info[first].time_stamp = 0;
5959                 tx_ring->next_to_use = first;
5960         }
5961
5962         return NETDEV_TX_OK;
5963 }
5964
5965 /**
5966  * e1000_tx_timeout - Respond to a Tx Hang
5967  * @netdev: network interface device structure
5968  * @txqueue: index of the hung queue (unused)
5969  **/
5970 static void e1000_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
5971 {
5972         struct e1000_adapter *adapter = netdev_priv(netdev);
5973
5974         /* Do the reset outside of interrupt context */
5975         adapter->tx_timeout_count++;
5976         schedule_work(&adapter->reset_task);
5977 }
5978
5979 static void e1000_reset_task(struct work_struct *work)
5980 {
5981         struct e1000_adapter *adapter;
5982         adapter = container_of(work, struct e1000_adapter, reset_task);
5983
5984         rtnl_lock();
5985         /* don't run the task if already down */
5986         if (test_bit(__E1000_DOWN, &adapter->state)) {
5987                 rtnl_unlock();
5988                 return;
5989         }
5990
5991         if (!(adapter->flags & FLAG_RESTART_NOW)) {
5992                 e1000e_dump(adapter);
5993                 e_err("Reset adapter unexpectedly\n");
5994         }
5995         e1000e_reinit_locked(adapter);
5996         rtnl_unlock();
5997 }
5998
5999 /**
6000  * e1000e_get_stats64 - Get System Network Statistics
6001  * @netdev: network interface device structure
6002  * @stats: rtnl_link_stats64 pointer
6003  *
6004  * Returns the address of the device statistics structure.
6005  **/
6006 void e1000e_get_stats64(struct net_device *netdev,
6007                         struct rtnl_link_stats64 *stats)
6008 {
6009         struct e1000_adapter *adapter = netdev_priv(netdev);
6010
6011         spin_lock(&adapter->stats64_lock);
6012         e1000e_update_stats(adapter);
6013         /* Fill out the OS statistics structure */
6014         stats->rx_bytes = adapter->stats.gorc;
6015         stats->rx_packets = adapter->stats.gprc;
6016         stats->tx_bytes = adapter->stats.gotc;
6017         stats->tx_packets = adapter->stats.gptc;
6018         stats->multicast = adapter->stats.mprc;
6019         stats->collisions = adapter->stats.colc;
6020
6021         /* Rx Errors */
6022
6023         /* RLEC on some newer hardware can be incorrect so build
6024          * our own version based on RUC and ROC
6025          */
6026         stats->rx_errors = adapter->stats.rxerrc +
6027             adapter->stats.crcerrs + adapter->stats.algnerrc +
6028             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
6029         stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
6030         stats->rx_crc_errors = adapter->stats.crcerrs;
6031         stats->rx_frame_errors = adapter->stats.algnerrc;
6032         stats->rx_missed_errors = adapter->stats.mpc;
6033
6034         /* Tx Errors */
6035         stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
6036         stats->tx_aborted_errors = adapter->stats.ecol;
6037         stats->tx_window_errors = adapter->stats.latecol;
6038         stats->tx_carrier_errors = adapter->stats.tncrs;
6039
6040         /* Tx Dropped needs to be maintained elsewhere */
6041
6042         spin_unlock(&adapter->stats64_lock);
6043 }
6044
6045 /**
6046  * e1000_change_mtu - Change the Maximum Transfer Unit
6047  * @netdev: network interface device structure
6048  * @new_mtu: new value for maximum frame size
6049  *
6050  * Returns 0 on success, negative on failure
6051  **/
6052 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
6053 {
6054         struct e1000_adapter *adapter = netdev_priv(netdev);
6055         int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
6056
6057         /* Jumbo frame support */
6058         if ((new_mtu > ETH_DATA_LEN) &&
6059             !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
6060                 e_err("Jumbo Frames not supported.\n");
6061                 return -EINVAL;
6062         }
6063
6064         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6065         if ((adapter->hw.mac.type >= e1000_pch2lan) &&
6066             !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
6067             (new_mtu > ETH_DATA_LEN)) {
6068                 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6069                 return -EINVAL;
6070         }
6071
6072         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
6073                 usleep_range(1000, 1100);
6074         /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6075         adapter->max_frame_size = max_frame;
6076         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6077                    netdev->mtu, new_mtu);
6078         netdev->mtu = new_mtu;
6079
6080         pm_runtime_get_sync(netdev->dev.parent);
6081
6082         if (netif_running(netdev))
6083                 e1000e_down(adapter, true);
6084
6085         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6086          * means we reserve 2 more, this pushes us to allocate from the next
6087          * larger slab size.
6088          * i.e. RXBUFFER_2048 --> size-4096 slab
6089          * However with the new *_jumbo_rx* routines, jumbo receives will use
6090          * fragmented skbs
6091          */
6092
6093         if (max_frame <= 2048)
6094                 adapter->rx_buffer_len = 2048;
6095         else
6096                 adapter->rx_buffer_len = 4096;
6097
6098         /* adjust allocation if LPE protects us, and we aren't using SBP */
6099         if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6100                 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6101
6102         if (netif_running(netdev))
6103                 e1000e_up(adapter);
6104         else
6105                 e1000e_reset(adapter);
6106
6107         pm_runtime_put_sync(netdev->dev.parent);
6108
6109         clear_bit(__E1000_RESETTING, &adapter->state);
6110
6111         return 0;
6112 }
6113
6114 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
6115                            int cmd)
6116 {
6117         struct e1000_adapter *adapter = netdev_priv(netdev);
6118         struct mii_ioctl_data *data = if_mii(ifr);
6119
6120         if (adapter->hw.phy.media_type != e1000_media_type_copper)
6121                 return -EOPNOTSUPP;
6122
6123         switch (cmd) {
6124         case SIOCGMIIPHY:
6125                 data->phy_id = adapter->hw.phy.addr;
6126                 break;
6127         case SIOCGMIIREG:
6128                 e1000_phy_read_status(adapter);
6129
6130                 switch (data->reg_num & 0x1F) {
6131                 case MII_BMCR:
6132                         data->val_out = adapter->phy_regs.bmcr;
6133                         break;
6134                 case MII_BMSR:
6135                         data->val_out = adapter->phy_regs.bmsr;
6136                         break;
6137                 case MII_PHYSID1:
6138                         data->val_out = (adapter->hw.phy.id >> 16);
6139                         break;
6140                 case MII_PHYSID2:
6141                         data->val_out = (adapter->hw.phy.id & 0xFFFF);
6142                         break;
6143                 case MII_ADVERTISE:
6144                         data->val_out = adapter->phy_regs.advertise;
6145                         break;
6146                 case MII_LPA:
6147                         data->val_out = adapter->phy_regs.lpa;
6148                         break;
6149                 case MII_EXPANSION:
6150                         data->val_out = adapter->phy_regs.expansion;
6151                         break;
6152                 case MII_CTRL1000:
6153                         data->val_out = adapter->phy_regs.ctrl1000;
6154                         break;
6155                 case MII_STAT1000:
6156                         data->val_out = adapter->phy_regs.stat1000;
6157                         break;
6158                 case MII_ESTATUS:
6159                         data->val_out = adapter->phy_regs.estatus;
6160                         break;
6161                 default:
6162                         return -EIO;
6163                 }
6164                 break;
6165         case SIOCSMIIREG:
6166         default:
6167                 return -EOPNOTSUPP;
6168         }
6169         return 0;
6170 }
6171
6172 /**
6173  * e1000e_hwtstamp_set - control hardware time stamping
6174  * @netdev: network interface device structure
6175  * @ifr: interface request
6176  *
6177  * Outgoing time stamping can be enabled and disabled. Play nice and
6178  * disable it when requested, although it shouldn't cause any overhead
6179  * when no packet needs it. At most one packet in the queue may be
6180  * marked for time stamping, otherwise it would be impossible to tell
6181  * for sure to which packet the hardware time stamp belongs.
6182  *
6183  * Incoming time stamping has to be configured via the hardware filters.
6184  * Not all combinations are supported, in particular event type has to be
6185  * specified. Matching the kind of event packet is not supported, with the
6186  * exception of "all V2 events regardless of level 2 or 4".
6187  **/
6188 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6189 {
6190         struct e1000_adapter *adapter = netdev_priv(netdev);
6191         struct hwtstamp_config config;
6192         int ret_val;
6193
6194         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6195                 return -EFAULT;
6196
6197         ret_val = e1000e_config_hwtstamp(adapter, &config);
6198         if (ret_val)
6199                 return ret_val;
6200
6201         switch (config.rx_filter) {
6202         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6203         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6204         case HWTSTAMP_FILTER_PTP_V2_SYNC:
6205         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6206         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6207         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6208                 /* With V2 type filters which specify a Sync or Delay Request,
6209                  * Path Delay Request/Response messages are also time stamped
6210                  * by hardware so notify the caller the requested packets plus
6211                  * some others are time stamped.
6212                  */
6213                 config.rx_filter = HWTSTAMP_FILTER_SOME;
6214                 break;
6215         default:
6216                 break;
6217         }
6218
6219         return copy_to_user(ifr->ifr_data, &config,
6220                             sizeof(config)) ? -EFAULT : 0;
6221 }
6222
6223 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6224 {
6225         struct e1000_adapter *adapter = netdev_priv(netdev);
6226
6227         return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6228                             sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6229 }
6230
6231 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6232 {
6233         switch (cmd) {
6234         case SIOCGMIIPHY:
6235         case SIOCGMIIREG:
6236         case SIOCSMIIREG:
6237                 return e1000_mii_ioctl(netdev, ifr, cmd);
6238         case SIOCSHWTSTAMP:
6239                 return e1000e_hwtstamp_set(netdev, ifr);
6240         case SIOCGHWTSTAMP:
6241                 return e1000e_hwtstamp_get(netdev, ifr);
6242         default:
6243                 return -EOPNOTSUPP;
6244         }
6245 }
6246
6247 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6248 {
6249         struct e1000_hw *hw = &adapter->hw;
6250         u32 i, mac_reg, wuc;
6251         u16 phy_reg, wuc_enable;
6252         int retval;
6253
6254         /* copy MAC RARs to PHY RARs */
6255         e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6256
6257         retval = hw->phy.ops.acquire(hw);
6258         if (retval) {
6259                 e_err("Could not acquire PHY\n");
6260                 return retval;
6261         }
6262
6263         /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6264         retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6265         if (retval)
6266                 goto release;
6267
6268         /* copy MAC MTA to PHY MTA - only needed for pchlan */
6269         for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6270                 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6271                 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6272                                            (u16)(mac_reg & 0xFFFF));
6273                 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6274                                            (u16)((mac_reg >> 16) & 0xFFFF));
6275         }
6276
6277         /* configure PHY Rx Control register */
6278         hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6279         mac_reg = er32(RCTL);
6280         if (mac_reg & E1000_RCTL_UPE)
6281                 phy_reg |= BM_RCTL_UPE;
6282         if (mac_reg & E1000_RCTL_MPE)
6283                 phy_reg |= BM_RCTL_MPE;
6284         phy_reg &= ~(BM_RCTL_MO_MASK);
6285         if (mac_reg & E1000_RCTL_MO_3)
6286                 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6287                             << BM_RCTL_MO_SHIFT);
6288         if (mac_reg & E1000_RCTL_BAM)
6289                 phy_reg |= BM_RCTL_BAM;
6290         if (mac_reg & E1000_RCTL_PMCF)
6291                 phy_reg |= BM_RCTL_PMCF;
6292         mac_reg = er32(CTRL);
6293         if (mac_reg & E1000_CTRL_RFCE)
6294                 phy_reg |= BM_RCTL_RFCE;
6295         hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6296
6297         wuc = E1000_WUC_PME_EN;
6298         if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6299                 wuc |= E1000_WUC_APME;
6300
6301         /* enable PHY wakeup in MAC register */
6302         ew32(WUFC, wufc);
6303         ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6304                    E1000_WUC_PME_STATUS | wuc));
6305
6306         /* configure and enable PHY wakeup in PHY registers */
6307         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6308         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6309
6310         /* activate PHY wakeup */
6311         wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6312         retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6313         if (retval)
6314                 e_err("Could not set PHY Host Wakeup bit\n");
6315 release:
6316         hw->phy.ops.release(hw);
6317
6318         return retval;
6319 }
6320
6321 static void e1000e_flush_lpic(struct pci_dev *pdev)
6322 {
6323         struct net_device *netdev = pci_get_drvdata(pdev);
6324         struct e1000_adapter *adapter = netdev_priv(netdev);
6325         struct e1000_hw *hw = &adapter->hw;
6326         u32 ret_val;
6327
6328         pm_runtime_get_sync(netdev->dev.parent);
6329
6330         ret_val = hw->phy.ops.acquire(hw);
6331         if (ret_val)
6332                 goto fl_out;
6333
6334         pr_info("EEE TX LPI TIMER: %08X\n",
6335                 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6336
6337         hw->phy.ops.release(hw);
6338
6339 fl_out:
6340         pm_runtime_put_sync(netdev->dev.parent);
6341 }
6342
6343 /* S0ix implementation */
6344 static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter)
6345 {
6346         struct e1000_hw *hw = &adapter->hw;
6347         u32 mac_data;
6348         u16 phy_data;
6349
6350         if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID &&
6351             hw->mac.type >= e1000_pch_adp) {
6352                 /* Request ME configure the device for S0ix */
6353                 mac_data = er32(H2ME);
6354                 mac_data |= E1000_H2ME_START_DPG;
6355                 mac_data &= ~E1000_H2ME_EXIT_DPG;
6356                 ew32(H2ME, mac_data);
6357         } else {
6358                 /* Request driver configure the device to S0ix */
6359                 /* Disable the periodic inband message,
6360                  * don't request PCIe clock in K1 page770_17[10:9] = 10b
6361                  */
6362                 e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6363                 phy_data &= ~HV_PM_CTRL_K1_CLK_REQ;
6364                 phy_data |= BIT(10);
6365                 e1e_wphy(hw, HV_PM_CTRL, phy_data);
6366
6367                 /* Make sure we don't exit K1 every time a new packet arrives
6368                  * 772_29[5] = 1 CS_Mode_Stay_In_K1
6369                  */
6370                 e1e_rphy(hw, I217_CGFREG, &phy_data);
6371                 phy_data |= BIT(5);
6372                 e1e_wphy(hw, I217_CGFREG, phy_data);
6373
6374                 /* Change the MAC/PHY interface to SMBus
6375                  * Force the SMBus in PHY page769_23[0] = 1
6376                  * Force the SMBus in MAC CTRL_EXT[11] = 1
6377                  */
6378                 e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6379                 phy_data |= CV_SMB_CTRL_FORCE_SMBUS;
6380                 e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6381                 mac_data = er32(CTRL_EXT);
6382                 mac_data |= E1000_CTRL_EXT_FORCE_SMBUS;
6383                 ew32(CTRL_EXT, mac_data);
6384
6385                 /* DFT control: PHY bit: page769_20[0] = 1
6386                  * page769_20[7] - PHY PLL stop
6387                  * page769_20[8] - PHY go to the electrical idle
6388                  * page769_20[9] - PHY serdes disable
6389                  * Gate PPW via EXTCNF_CTRL - set 0x0F00[7] = 1
6390                  */
6391                 e1e_rphy(hw, I82579_DFT_CTRL, &phy_data);
6392                 phy_data |= BIT(0);
6393                 phy_data |= BIT(7);
6394                 phy_data |= BIT(8);
6395                 phy_data |= BIT(9);
6396                 e1e_wphy(hw, I82579_DFT_CTRL, phy_data);
6397
6398                 mac_data = er32(EXTCNF_CTRL);
6399                 mac_data |= E1000_EXTCNF_CTRL_GATE_PHY_CFG;
6400                 ew32(EXTCNF_CTRL, mac_data);
6401
6402                 /* Enable the Dynamic Power Gating in the MAC */
6403                 mac_data = er32(FEXTNVM7);
6404                 mac_data |= BIT(22);
6405                 ew32(FEXTNVM7, mac_data);
6406
6407                 /* Disable disconnected cable conditioning for Power Gating */
6408                 mac_data = er32(DPGFR);
6409                 mac_data |= BIT(2);
6410                 ew32(DPGFR, mac_data);
6411
6412                 /* Don't wake from dynamic Power Gating with clock request */
6413                 mac_data = er32(FEXTNVM12);
6414                 mac_data |= BIT(12);
6415                 ew32(FEXTNVM12, mac_data);
6416
6417                 /* Ungate PGCB clock */
6418                 mac_data = er32(FEXTNVM9);
6419                 mac_data &= ~BIT(28);
6420                 ew32(FEXTNVM9, mac_data);
6421
6422                 /* Enable K1 off to enable mPHY Power Gating */
6423                 mac_data = er32(FEXTNVM6);
6424                 mac_data |= BIT(31);
6425                 ew32(FEXTNVM6, mac_data);
6426
6427                 /* Enable mPHY power gating for any link and speed */
6428                 mac_data = er32(FEXTNVM8);
6429                 mac_data |= BIT(9);
6430                 ew32(FEXTNVM8, mac_data);
6431
6432                 /* Enable the Dynamic Clock Gating in the DMA and MAC */
6433                 mac_data = er32(CTRL_EXT);
6434                 mac_data |= E1000_CTRL_EXT_DMA_DYN_CLK_EN;
6435                 ew32(CTRL_EXT, mac_data);
6436
6437                 /* No MAC DPG gating SLP_S0 in modern standby
6438                  * Switch the logic of the lanphypc to use PMC counter
6439                  */
6440                 mac_data = er32(FEXTNVM5);
6441                 mac_data |= BIT(7);
6442                 ew32(FEXTNVM5, mac_data);
6443         }
6444
6445         /* Disable the time synchronization clock */
6446         mac_data = er32(FEXTNVM7);
6447         mac_data |= BIT(31);
6448         mac_data &= ~BIT(0);
6449         ew32(FEXTNVM7, mac_data);
6450
6451         /* Dynamic Power Gating Enable */
6452         mac_data = er32(CTRL_EXT);
6453         mac_data |= BIT(3);
6454         ew32(CTRL_EXT, mac_data);
6455
6456         /* Check MAC Tx/Rx packet buffer pointers.
6457          * Reset MAC Tx/Rx packet buffer pointers to suppress any
6458          * pending traffic indication that would prevent power gating.
6459          */
6460         mac_data = er32(TDFH);
6461         if (mac_data)
6462                 ew32(TDFH, 0);
6463         mac_data = er32(TDFT);
6464         if (mac_data)
6465                 ew32(TDFT, 0);
6466         mac_data = er32(TDFHS);
6467         if (mac_data)
6468                 ew32(TDFHS, 0);
6469         mac_data = er32(TDFTS);
6470         if (mac_data)
6471                 ew32(TDFTS, 0);
6472         mac_data = er32(TDFPC);
6473         if (mac_data)
6474                 ew32(TDFPC, 0);
6475         mac_data = er32(RDFH);
6476         if (mac_data)
6477                 ew32(RDFH, 0);
6478         mac_data = er32(RDFT);
6479         if (mac_data)
6480                 ew32(RDFT, 0);
6481         mac_data = er32(RDFHS);
6482         if (mac_data)
6483                 ew32(RDFHS, 0);
6484         mac_data = er32(RDFTS);
6485         if (mac_data)
6486                 ew32(RDFTS, 0);
6487         mac_data = er32(RDFPC);
6488         if (mac_data)
6489                 ew32(RDFPC, 0);
6490 }
6491
6492 static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter)
6493 {
6494         struct e1000_hw *hw = &adapter->hw;
6495         bool firmware_bug = false;
6496         u32 mac_data;
6497         u16 phy_data;
6498         u32 i = 0;
6499
6500         if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID &&
6501             hw->mac.type >= e1000_pch_adp) {
6502                 /* Keep the GPT clock enabled for CSME */
6503                 mac_data = er32(FEXTNVM);
6504                 mac_data |= BIT(3);
6505                 ew32(FEXTNVM, mac_data);
6506                 /* Request ME unconfigure the device from S0ix */
6507                 mac_data = er32(H2ME);
6508                 mac_data &= ~E1000_H2ME_START_DPG;
6509                 mac_data |= E1000_H2ME_EXIT_DPG;
6510                 ew32(H2ME, mac_data);
6511
6512                 /* Poll up to 2.5 seconds for ME to unconfigure DPG.
6513                  * If this takes more than 1 second, show a warning indicating a
6514                  * firmware bug
6515                  */
6516                 while (!(er32(EXFWSM) & E1000_EXFWSM_DPG_EXIT_DONE)) {
6517                         if (i > 100 && !firmware_bug)
6518                                 firmware_bug = true;
6519
6520                         if (i++ == 250) {
6521                                 e_dbg("Timeout (firmware bug): %d msec\n",
6522                                       i * 10);
6523                                 break;
6524                         }
6525
6526                         usleep_range(10000, 11000);
6527                 }
6528                 if (firmware_bug)
6529                         e_warn("DPG_EXIT_DONE took %d msec. This is a firmware bug\n",
6530                                i * 10);
6531                 else
6532                         e_dbg("DPG_EXIT_DONE cleared after %d msec\n", i * 10);
6533         } else {
6534                 /* Request driver unconfigure the device from S0ix */
6535
6536                 /* Disable the Dynamic Power Gating in the MAC */
6537                 mac_data = er32(FEXTNVM7);
6538                 mac_data &= 0xFFBFFFFF;
6539                 ew32(FEXTNVM7, mac_data);
6540
6541                 /* Disable mPHY power gating for any link and speed */
6542                 mac_data = er32(FEXTNVM8);
6543                 mac_data &= ~BIT(9);
6544                 ew32(FEXTNVM8, mac_data);
6545
6546                 /* Disable K1 off */
6547                 mac_data = er32(FEXTNVM6);
6548                 mac_data &= ~BIT(31);
6549                 ew32(FEXTNVM6, mac_data);
6550
6551                 /* Disable Ungate PGCB clock */
6552                 mac_data = er32(FEXTNVM9);
6553                 mac_data |= BIT(28);
6554                 ew32(FEXTNVM9, mac_data);
6555
6556                 /* Cancel not waking from dynamic
6557                  * Power Gating with clock request
6558                  */
6559                 mac_data = er32(FEXTNVM12);
6560                 mac_data &= ~BIT(12);
6561                 ew32(FEXTNVM12, mac_data);
6562
6563                 /* Cancel disable disconnected cable conditioning
6564                  * for Power Gating
6565                  */
6566                 mac_data = er32(DPGFR);
6567                 mac_data &= ~BIT(2);
6568                 ew32(DPGFR, mac_data);
6569
6570                 /* Disable the Dynamic Clock Gating in the DMA and MAC */
6571                 mac_data = er32(CTRL_EXT);
6572                 mac_data &= 0xFFF7FFFF;
6573                 ew32(CTRL_EXT, mac_data);
6574
6575                 /* Revert the lanphypc logic to use the internal Gbe counter
6576                  * and not the PMC counter
6577                  */
6578                 mac_data = er32(FEXTNVM5);
6579                 mac_data &= 0xFFFFFF7F;
6580                 ew32(FEXTNVM5, mac_data);
6581
6582                 /* Enable the periodic inband message,
6583                  * Request PCIe clock in K1 page770_17[10:9] =01b
6584                  */
6585                 e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6586                 phy_data &= 0xFBFF;
6587                 phy_data |= HV_PM_CTRL_K1_CLK_REQ;
6588                 e1e_wphy(hw, HV_PM_CTRL, phy_data);
6589
6590                 /* Return back configuration
6591                  * 772_29[5] = 0 CS_Mode_Stay_In_K1
6592                  */
6593                 e1e_rphy(hw, I217_CGFREG, &phy_data);
6594                 phy_data &= 0xFFDF;
6595                 e1e_wphy(hw, I217_CGFREG, phy_data);
6596
6597                 /* Change the MAC/PHY interface to Kumeran
6598                  * Unforce the SMBus in PHY page769_23[0] = 0
6599                  * Unforce the SMBus in MAC CTRL_EXT[11] = 0
6600                  */
6601                 e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6602                 phy_data &= ~CV_SMB_CTRL_FORCE_SMBUS;
6603                 e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6604                 mac_data = er32(CTRL_EXT);
6605                 mac_data &= ~E1000_CTRL_EXT_FORCE_SMBUS;
6606                 ew32(CTRL_EXT, mac_data);
6607         }
6608
6609         /* Disable Dynamic Power Gating */
6610         mac_data = er32(CTRL_EXT);
6611         mac_data &= 0xFFFFFFF7;
6612         ew32(CTRL_EXT, mac_data);
6613
6614         /* Enable the time synchronization clock */
6615         mac_data = er32(FEXTNVM7);
6616         mac_data &= ~BIT(31);
6617         mac_data |= BIT(0);
6618         ew32(FEXTNVM7, mac_data);
6619 }
6620
6621 static int e1000e_pm_freeze(struct device *dev)
6622 {
6623         struct net_device *netdev = dev_get_drvdata(dev);
6624         struct e1000_adapter *adapter = netdev_priv(netdev);
6625         bool present;
6626
6627         rtnl_lock();
6628
6629         present = netif_device_present(netdev);
6630         netif_device_detach(netdev);
6631
6632         if (present && netif_running(netdev)) {
6633                 int count = E1000_CHECK_RESET_COUNT;
6634
6635                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6636                         usleep_range(10000, 11000);
6637
6638                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6639
6640                 /* Quiesce the device without resetting the hardware */
6641                 e1000e_down(adapter, false);
6642                 e1000_free_irq(adapter);
6643         }
6644         rtnl_unlock();
6645
6646         e1000e_reset_interrupt_capability(adapter);
6647
6648         /* Allow time for pending master requests to run */
6649         e1000e_disable_pcie_master(&adapter->hw);
6650
6651         return 0;
6652 }
6653
6654 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6655 {
6656         struct net_device *netdev = pci_get_drvdata(pdev);
6657         struct e1000_adapter *adapter = netdev_priv(netdev);
6658         struct e1000_hw *hw = &adapter->hw;
6659         u32 ctrl, ctrl_ext, rctl, status, wufc;
6660         int retval = 0;
6661
6662         /* Runtime suspend should only enable wakeup for link changes */
6663         if (runtime)
6664                 wufc = E1000_WUFC_LNKC;
6665         else if (device_may_wakeup(&pdev->dev))
6666                 wufc = adapter->wol;
6667         else
6668                 wufc = 0;
6669
6670         status = er32(STATUS);
6671         if (status & E1000_STATUS_LU)
6672                 wufc &= ~E1000_WUFC_LNKC;
6673
6674         if (wufc) {
6675                 e1000_setup_rctl(adapter);
6676                 e1000e_set_rx_mode(netdev);
6677
6678                 /* turn on all-multi mode if wake on multicast is enabled */
6679                 if (wufc & E1000_WUFC_MC) {
6680                         rctl = er32(RCTL);
6681                         rctl |= E1000_RCTL_MPE;
6682                         ew32(RCTL, rctl);
6683                 }
6684
6685                 ctrl = er32(CTRL);
6686                 ctrl |= E1000_CTRL_ADVD3WUC;
6687                 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6688                         ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6689                 ew32(CTRL, ctrl);
6690
6691                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6692                     adapter->hw.phy.media_type ==
6693                     e1000_media_type_internal_serdes) {
6694                         /* keep the laser running in D3 */
6695                         ctrl_ext = er32(CTRL_EXT);
6696                         ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6697                         ew32(CTRL_EXT, ctrl_ext);
6698                 }
6699
6700                 if (!runtime)
6701                         e1000e_power_up_phy(adapter);
6702
6703                 if (adapter->flags & FLAG_IS_ICH)
6704                         e1000_suspend_workarounds_ich8lan(&adapter->hw);
6705
6706                 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6707                         /* enable wakeup by the PHY */
6708                         retval = e1000_init_phy_wakeup(adapter, wufc);
6709                         if (retval)
6710                                 return retval;
6711                 } else {
6712                         /* enable wakeup by the MAC */
6713                         ew32(WUFC, wufc);
6714                         ew32(WUC, E1000_WUC_PME_EN);
6715                 }
6716         } else {
6717                 ew32(WUC, 0);
6718                 ew32(WUFC, 0);
6719
6720                 e1000_power_down_phy(adapter);
6721         }
6722
6723         if (adapter->hw.phy.type == e1000_phy_igp_3) {
6724                 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6725         } else if (hw->mac.type >= e1000_pch_lpt) {
6726                 if (wufc && !(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6727                         /* ULP does not support wake from unicast, multicast
6728                          * or broadcast.
6729                          */
6730                         retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6731
6732                 if (retval)
6733                         return retval;
6734         }
6735
6736         /* Ensure that the appropriate bits are set in LPI_CTRL
6737          * for EEE in Sx
6738          */
6739         if ((hw->phy.type >= e1000_phy_i217) &&
6740             adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6741                 u16 lpi_ctrl = 0;
6742
6743                 retval = hw->phy.ops.acquire(hw);
6744                 if (!retval) {
6745                         retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6746                                                  &lpi_ctrl);
6747                         if (!retval) {
6748                                 if (adapter->eee_advert &
6749                                     hw->dev_spec.ich8lan.eee_lp_ability &
6750                                     I82579_EEE_100_SUPPORTED)
6751                                         lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6752                                 if (adapter->eee_advert &
6753                                     hw->dev_spec.ich8lan.eee_lp_ability &
6754                                     I82579_EEE_1000_SUPPORTED)
6755                                         lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6756
6757                                 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6758                                                          lpi_ctrl);
6759                         }
6760                 }
6761                 hw->phy.ops.release(hw);
6762         }
6763
6764         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6765          * would have already happened in close and is redundant.
6766          */
6767         e1000e_release_hw_control(adapter);
6768
6769         pci_clear_master(pdev);
6770
6771         /* The pci-e switch on some quad port adapters will report a
6772          * correctable error when the MAC transitions from D0 to D3.  To
6773          * prevent this we need to mask off the correctable errors on the
6774          * downstream port of the pci-e switch.
6775          *
6776          * We don't have the associated upstream bridge while assigning
6777          * the PCI device into guest. For example, the KVM on power is
6778          * one of the cases.
6779          */
6780         if (adapter->flags & FLAG_IS_QUAD_PORT) {
6781                 struct pci_dev *us_dev = pdev->bus->self;
6782                 u16 devctl;
6783
6784                 if (!us_dev)
6785                         return 0;
6786
6787                 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6788                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6789                                            (devctl & ~PCI_EXP_DEVCTL_CERE));
6790
6791                 pci_save_state(pdev);
6792                 pci_prepare_to_sleep(pdev);
6793
6794                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6795         }
6796
6797         return 0;
6798 }
6799
6800 /**
6801  * __e1000e_disable_aspm - Disable ASPM states
6802  * @pdev: pointer to PCI device struct
6803  * @state: bit-mask of ASPM states to disable
6804  * @locked: indication if this context holds pci_bus_sem locked.
6805  *
6806  * Some devices *must* have certain ASPM states disabled per hardware errata.
6807  **/
6808 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6809 {
6810         struct pci_dev *parent = pdev->bus->self;
6811         u16 aspm_dis_mask = 0;
6812         u16 pdev_aspmc, parent_aspmc;
6813
6814         switch (state) {
6815         case PCIE_LINK_STATE_L0S:
6816         case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6817                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6818                 fallthrough; /* can't have L1 without L0s */
6819         case PCIE_LINK_STATE_L1:
6820                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6821                 break;
6822         default:
6823                 return;
6824         }
6825
6826         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6827         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6828
6829         if (parent) {
6830                 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6831                                           &parent_aspmc);
6832                 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6833         }
6834
6835         /* Nothing to do if the ASPM states to be disabled already are */
6836         if (!(pdev_aspmc & aspm_dis_mask) &&
6837             (!parent || !(parent_aspmc & aspm_dis_mask)))
6838                 return;
6839
6840         dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6841                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6842                  "L0s" : "",
6843                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6844                  "L1" : "");
6845
6846 #ifdef CONFIG_PCIEASPM
6847         if (locked)
6848                 pci_disable_link_state_locked(pdev, state);
6849         else
6850                 pci_disable_link_state(pdev, state);
6851
6852         /* Double-check ASPM control.  If not disabled by the above, the
6853          * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6854          * not enabled); override by writing PCI config space directly.
6855          */
6856         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6857         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6858
6859         if (!(aspm_dis_mask & pdev_aspmc))
6860                 return;
6861 #endif
6862
6863         /* Both device and parent should have the same ASPM setting.
6864          * Disable ASPM in downstream component first and then upstream.
6865          */
6866         pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6867
6868         if (parent)
6869                 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6870                                            aspm_dis_mask);
6871 }
6872
6873 /**
6874  * e1000e_disable_aspm - Disable ASPM states.
6875  * @pdev: pointer to PCI device struct
6876  * @state: bit-mask of ASPM states to disable
6877  *
6878  * This function acquires the pci_bus_sem!
6879  * Some devices *must* have certain ASPM states disabled per hardware errata.
6880  **/
6881 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6882 {
6883         __e1000e_disable_aspm(pdev, state, 0);
6884 }
6885
6886 /**
6887  * e1000e_disable_aspm_locked - Disable ASPM states.
6888  * @pdev: pointer to PCI device struct
6889  * @state: bit-mask of ASPM states to disable
6890  *
6891  * This function must be called with pci_bus_sem acquired!
6892  * Some devices *must* have certain ASPM states disabled per hardware errata.
6893  **/
6894 static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6895 {
6896         __e1000e_disable_aspm(pdev, state, 1);
6897 }
6898
6899 static int e1000e_pm_thaw(struct device *dev)
6900 {
6901         struct net_device *netdev = dev_get_drvdata(dev);
6902         struct e1000_adapter *adapter = netdev_priv(netdev);
6903         int rc = 0;
6904
6905         e1000e_set_interrupt_capability(adapter);
6906
6907         rtnl_lock();
6908         if (netif_running(netdev)) {
6909                 rc = e1000_request_irq(adapter);
6910                 if (rc)
6911                         goto err_irq;
6912
6913                 e1000e_up(adapter);
6914         }
6915
6916         netif_device_attach(netdev);
6917 err_irq:
6918         rtnl_unlock();
6919
6920         return rc;
6921 }
6922
6923 static int __e1000_resume(struct pci_dev *pdev)
6924 {
6925         struct net_device *netdev = pci_get_drvdata(pdev);
6926         struct e1000_adapter *adapter = netdev_priv(netdev);
6927         struct e1000_hw *hw = &adapter->hw;
6928         u16 aspm_disable_flag = 0;
6929
6930         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6931                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6932         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6933                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6934         if (aspm_disable_flag)
6935                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6936
6937         pci_set_master(pdev);
6938
6939         if (hw->mac.type >= e1000_pch2lan)
6940                 e1000_resume_workarounds_pchlan(&adapter->hw);
6941
6942         e1000e_power_up_phy(adapter);
6943
6944         /* report the system wakeup cause from S3/S4 */
6945         if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6946                 u16 phy_data;
6947
6948                 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6949                 if (phy_data) {
6950                         e_info("PHY Wakeup cause - %s\n",
6951                                phy_data & E1000_WUS_EX ? "Unicast Packet" :
6952                                phy_data & E1000_WUS_MC ? "Multicast Packet" :
6953                                phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6954                                phy_data & E1000_WUS_MAG ? "Magic Packet" :
6955                                phy_data & E1000_WUS_LNKC ?
6956                                "Link Status Change" : "other");
6957                 }
6958                 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6959         } else {
6960                 u32 wus = er32(WUS);
6961
6962                 if (wus) {
6963                         e_info("MAC Wakeup cause - %s\n",
6964                                wus & E1000_WUS_EX ? "Unicast Packet" :
6965                                wus & E1000_WUS_MC ? "Multicast Packet" :
6966                                wus & E1000_WUS_BC ? "Broadcast Packet" :
6967                                wus & E1000_WUS_MAG ? "Magic Packet" :
6968                                wus & E1000_WUS_LNKC ? "Link Status Change" :
6969                                "other");
6970                 }
6971                 ew32(WUS, ~0);
6972         }
6973
6974         e1000e_reset(adapter);
6975
6976         e1000_init_manageability_pt(adapter);
6977
6978         /* If the controller has AMT, do not set DRV_LOAD until the interface
6979          * is up.  For all other cases, let the f/w know that the h/w is now
6980          * under the control of the driver.
6981          */
6982         if (!(adapter->flags & FLAG_HAS_AMT))
6983                 e1000e_get_hw_control(adapter);
6984
6985         return 0;
6986 }
6987
6988 static __maybe_unused int e1000e_pm_prepare(struct device *dev)
6989 {
6990         return pm_runtime_suspended(dev) &&
6991                 pm_suspend_via_firmware();
6992 }
6993
6994 static __maybe_unused int e1000e_pm_suspend(struct device *dev)
6995 {
6996         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6997         struct e1000_adapter *adapter = netdev_priv(netdev);
6998         struct pci_dev *pdev = to_pci_dev(dev);
6999         struct e1000_hw *hw = &adapter->hw;
7000         u16 phy_data;
7001         int rc;
7002
7003         if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID &&
7004             hw->mac.type >= e1000_pch_adp) {
7005                 /* Mask OEM Bits / Gig Disable / Restart AN (772_26[12] = 1) */
7006                 e1e_rphy(hw, I217_MEMPWR, &phy_data);
7007                 phy_data |= I217_MEMPWR_MOEM;
7008                 e1e_wphy(hw, I217_MEMPWR, phy_data);
7009
7010                 /* Disable LCD reset */
7011                 hw->phy.reset_disable = true;
7012         }
7013
7014         e1000e_flush_lpic(pdev);
7015
7016         e1000e_pm_freeze(dev);
7017
7018         rc = __e1000_shutdown(pdev, false);
7019         if (rc) {
7020                 e1000e_pm_thaw(dev);
7021         } else {
7022                 /* Introduce S0ix implementation */
7023                 if (adapter->flags2 & FLAG2_ENABLE_S0IX_FLOWS)
7024                         e1000e_s0ix_entry_flow(adapter);
7025         }
7026
7027         return rc;
7028 }
7029
7030 static __maybe_unused int e1000e_pm_resume(struct device *dev)
7031 {
7032         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
7033         struct e1000_adapter *adapter = netdev_priv(netdev);
7034         struct pci_dev *pdev = to_pci_dev(dev);
7035         struct e1000_hw *hw = &adapter->hw;
7036         u16 phy_data;
7037         int rc;
7038
7039         /* Introduce S0ix implementation */
7040         if (adapter->flags2 & FLAG2_ENABLE_S0IX_FLOWS)
7041                 e1000e_s0ix_exit_flow(adapter);
7042
7043         rc = __e1000_resume(pdev);
7044         if (rc)
7045                 return rc;
7046
7047         if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID &&
7048             hw->mac.type >= e1000_pch_adp) {
7049                 /* Unmask OEM Bits / Gig Disable / Restart AN 772_26[12] = 0 */
7050                 e1e_rphy(hw, I217_MEMPWR, &phy_data);
7051                 phy_data &= ~I217_MEMPWR_MOEM;
7052                 e1e_wphy(hw, I217_MEMPWR, phy_data);
7053
7054                 /* Enable LCD reset */
7055                 hw->phy.reset_disable = false;
7056         }
7057
7058         return e1000e_pm_thaw(dev);
7059 }
7060
7061 static __maybe_unused int e1000e_pm_runtime_idle(struct device *dev)
7062 {
7063         struct net_device *netdev = dev_get_drvdata(dev);
7064         struct e1000_adapter *adapter = netdev_priv(netdev);
7065         u16 eee_lp;
7066
7067         eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
7068
7069         if (!e1000e_has_link(adapter)) {
7070                 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
7071                 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
7072         }
7073
7074         return -EBUSY;
7075 }
7076
7077 static __maybe_unused int e1000e_pm_runtime_resume(struct device *dev)
7078 {
7079         struct pci_dev *pdev = to_pci_dev(dev);
7080         struct net_device *netdev = pci_get_drvdata(pdev);
7081         struct e1000_adapter *adapter = netdev_priv(netdev);
7082         int rc;
7083
7084         rc = __e1000_resume(pdev);
7085         if (rc)
7086                 return rc;
7087
7088         if (netdev->flags & IFF_UP)
7089                 e1000e_up(adapter);
7090
7091         return rc;
7092 }
7093
7094 static __maybe_unused int e1000e_pm_runtime_suspend(struct device *dev)
7095 {
7096         struct pci_dev *pdev = to_pci_dev(dev);
7097         struct net_device *netdev = pci_get_drvdata(pdev);
7098         struct e1000_adapter *adapter = netdev_priv(netdev);
7099
7100         if (netdev->flags & IFF_UP) {
7101                 int count = E1000_CHECK_RESET_COUNT;
7102
7103                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
7104                         usleep_range(10000, 11000);
7105
7106                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
7107
7108                 /* Down the device without resetting the hardware */
7109                 e1000e_down(adapter, false);
7110         }
7111
7112         if (__e1000_shutdown(pdev, true)) {
7113                 e1000e_pm_runtime_resume(dev);
7114                 return -EBUSY;
7115         }
7116
7117         return 0;
7118 }
7119
7120 static void e1000_shutdown(struct pci_dev *pdev)
7121 {
7122         e1000e_flush_lpic(pdev);
7123
7124         e1000e_pm_freeze(&pdev->dev);
7125
7126         __e1000_shutdown(pdev, false);
7127 }
7128
7129 #ifdef CONFIG_NET_POLL_CONTROLLER
7130
7131 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
7132 {
7133         struct net_device *netdev = data;
7134         struct e1000_adapter *adapter = netdev_priv(netdev);
7135
7136         if (adapter->msix_entries) {
7137                 int vector, msix_irq;
7138
7139                 vector = 0;
7140                 msix_irq = adapter->msix_entries[vector].vector;
7141                 if (disable_hardirq(msix_irq))
7142                         e1000_intr_msix_rx(msix_irq, netdev);
7143                 enable_irq(msix_irq);
7144
7145                 vector++;
7146                 msix_irq = adapter->msix_entries[vector].vector;
7147                 if (disable_hardirq(msix_irq))
7148                         e1000_intr_msix_tx(msix_irq, netdev);
7149                 enable_irq(msix_irq);
7150
7151                 vector++;
7152                 msix_irq = adapter->msix_entries[vector].vector;
7153                 if (disable_hardirq(msix_irq))
7154                         e1000_msix_other(msix_irq, netdev);
7155                 enable_irq(msix_irq);
7156         }
7157
7158         return IRQ_HANDLED;
7159 }
7160
7161 /**
7162  * e1000_netpoll
7163  * @netdev: network interface device structure
7164  *
7165  * Polling 'interrupt' - used by things like netconsole to send skbs
7166  * without having to re-enable interrupts. It's not called while
7167  * the interrupt routine is executing.
7168  */
7169 static void e1000_netpoll(struct net_device *netdev)
7170 {
7171         struct e1000_adapter *adapter = netdev_priv(netdev);
7172
7173         switch (adapter->int_mode) {
7174         case E1000E_INT_MODE_MSIX:
7175                 e1000_intr_msix(adapter->pdev->irq, netdev);
7176                 break;
7177         case E1000E_INT_MODE_MSI:
7178                 if (disable_hardirq(adapter->pdev->irq))
7179                         e1000_intr_msi(adapter->pdev->irq, netdev);
7180                 enable_irq(adapter->pdev->irq);
7181                 break;
7182         default:                /* E1000E_INT_MODE_LEGACY */
7183                 if (disable_hardirq(adapter->pdev->irq))
7184                         e1000_intr(adapter->pdev->irq, netdev);
7185                 enable_irq(adapter->pdev->irq);
7186                 break;
7187         }
7188 }
7189 #endif
7190
7191 /**
7192  * e1000_io_error_detected - called when PCI error is detected
7193  * @pdev: Pointer to PCI device
7194  * @state: The current pci connection state
7195  *
7196  * This function is called after a PCI bus error affecting
7197  * this device has been detected.
7198  */
7199 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
7200                                                 pci_channel_state_t state)
7201 {
7202         e1000e_pm_freeze(&pdev->dev);
7203
7204         if (state == pci_channel_io_perm_failure)
7205                 return PCI_ERS_RESULT_DISCONNECT;
7206
7207         pci_disable_device(pdev);
7208
7209         /* Request a slot reset. */
7210         return PCI_ERS_RESULT_NEED_RESET;
7211 }
7212
7213 /**
7214  * e1000_io_slot_reset - called after the pci bus has been reset.
7215  * @pdev: Pointer to PCI device
7216  *
7217  * Restart the card from scratch, as if from a cold-boot. Implementation
7218  * resembles the first-half of the e1000e_pm_resume routine.
7219  */
7220 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
7221 {
7222         struct net_device *netdev = pci_get_drvdata(pdev);
7223         struct e1000_adapter *adapter = netdev_priv(netdev);
7224         struct e1000_hw *hw = &adapter->hw;
7225         u16 aspm_disable_flag = 0;
7226         int err;
7227         pci_ers_result_t result;
7228
7229         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
7230                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7231         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
7232                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7233         if (aspm_disable_flag)
7234                 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
7235
7236         err = pci_enable_device_mem(pdev);
7237         if (err) {
7238                 dev_err(&pdev->dev,
7239                         "Cannot re-enable PCI device after reset.\n");
7240                 result = PCI_ERS_RESULT_DISCONNECT;
7241         } else {
7242                 pdev->state_saved = true;
7243                 pci_restore_state(pdev);
7244                 pci_set_master(pdev);
7245
7246                 pci_enable_wake(pdev, PCI_D3hot, 0);
7247                 pci_enable_wake(pdev, PCI_D3cold, 0);
7248
7249                 e1000e_reset(adapter);
7250                 ew32(WUS, ~0);
7251                 result = PCI_ERS_RESULT_RECOVERED;
7252         }
7253
7254         return result;
7255 }
7256
7257 /**
7258  * e1000_io_resume - called when traffic can start flowing again.
7259  * @pdev: Pointer to PCI device
7260  *
7261  * This callback is called when the error recovery driver tells us that
7262  * its OK to resume normal operation. Implementation resembles the
7263  * second-half of the e1000e_pm_resume routine.
7264  */
7265 static void e1000_io_resume(struct pci_dev *pdev)
7266 {
7267         struct net_device *netdev = pci_get_drvdata(pdev);
7268         struct e1000_adapter *adapter = netdev_priv(netdev);
7269
7270         e1000_init_manageability_pt(adapter);
7271
7272         e1000e_pm_thaw(&pdev->dev);
7273
7274         /* If the controller has AMT, do not set DRV_LOAD until the interface
7275          * is up.  For all other cases, let the f/w know that the h/w is now
7276          * under the control of the driver.
7277          */
7278         if (!(adapter->flags & FLAG_HAS_AMT))
7279                 e1000e_get_hw_control(adapter);
7280 }
7281
7282 static void e1000_print_device_info(struct e1000_adapter *adapter)
7283 {
7284         struct e1000_hw *hw = &adapter->hw;
7285         struct net_device *netdev = adapter->netdev;
7286         u32 ret_val;
7287         u8 pba_str[E1000_PBANUM_LENGTH];
7288
7289         /* print bus type/speed/width info */
7290         e_info("(PCI Express:2.5GT/s:%s) %pM\n",
7291                /* bus width */
7292                ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
7293                 "Width x1"),
7294                /* MAC address */
7295                netdev->dev_addr);
7296         e_info("Intel(R) PRO/%s Network Connection\n",
7297                (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
7298         ret_val = e1000_read_pba_string_generic(hw, pba_str,
7299                                                 E1000_PBANUM_LENGTH);
7300         if (ret_val)
7301                 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
7302         e_info("MAC: %d, PHY: %d, PBA No: %s\n",
7303                hw->mac.type, hw->phy.type, pba_str);
7304 }
7305
7306 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
7307 {
7308         struct e1000_hw *hw = &adapter->hw;
7309         int ret_val;
7310         u16 buf = 0;
7311
7312         if (hw->mac.type != e1000_82573)
7313                 return;
7314
7315         ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
7316         le16_to_cpus(&buf);
7317         if (!ret_val && (!(buf & BIT(0)))) {
7318                 /* Deep Smart Power Down (DSPD) */
7319                 dev_warn(&adapter->pdev->dev,
7320                          "Warning: detected DSPD enabled in EEPROM\n");
7321         }
7322 }
7323
7324 static netdev_features_t e1000_fix_features(struct net_device *netdev,
7325                                             netdev_features_t features)
7326 {
7327         struct e1000_adapter *adapter = netdev_priv(netdev);
7328         struct e1000_hw *hw = &adapter->hw;
7329
7330         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
7331         if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
7332                 features &= ~NETIF_F_RXFCS;
7333
7334         /* Since there is no support for separate Rx/Tx vlan accel
7335          * enable/disable make sure Tx flag is always in same state as Rx.
7336          */
7337         if (features & NETIF_F_HW_VLAN_CTAG_RX)
7338                 features |= NETIF_F_HW_VLAN_CTAG_TX;
7339         else
7340                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
7341
7342         return features;
7343 }
7344
7345 static int e1000_set_features(struct net_device *netdev,
7346                               netdev_features_t features)
7347 {
7348         struct e1000_adapter *adapter = netdev_priv(netdev);
7349         netdev_features_t changed = features ^ netdev->features;
7350
7351         if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
7352                 adapter->flags |= FLAG_TSO_FORCE;
7353
7354         if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
7355                          NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
7356                          NETIF_F_RXALL)))
7357                 return 0;
7358
7359         if (changed & NETIF_F_RXFCS) {
7360                 if (features & NETIF_F_RXFCS) {
7361                         adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7362                 } else {
7363                         /* We need to take it back to defaults, which might mean
7364                          * stripping is still disabled at the adapter level.
7365                          */
7366                         if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
7367                                 adapter->flags2 |= FLAG2_CRC_STRIPPING;
7368                         else
7369                                 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7370                 }
7371         }
7372
7373         netdev->features = features;
7374
7375         if (netif_running(netdev))
7376                 e1000e_reinit_locked(adapter);
7377         else
7378                 e1000e_reset(adapter);
7379
7380         return 1;
7381 }
7382
7383 static const struct net_device_ops e1000e_netdev_ops = {
7384         .ndo_open               = e1000e_open,
7385         .ndo_stop               = e1000e_close,
7386         .ndo_start_xmit         = e1000_xmit_frame,
7387         .ndo_get_stats64        = e1000e_get_stats64,
7388         .ndo_set_rx_mode        = e1000e_set_rx_mode,
7389         .ndo_set_mac_address    = e1000_set_mac,
7390         .ndo_change_mtu         = e1000_change_mtu,
7391         .ndo_eth_ioctl          = e1000_ioctl,
7392         .ndo_tx_timeout         = e1000_tx_timeout,
7393         .ndo_validate_addr      = eth_validate_addr,
7394
7395         .ndo_vlan_rx_add_vid    = e1000_vlan_rx_add_vid,
7396         .ndo_vlan_rx_kill_vid   = e1000_vlan_rx_kill_vid,
7397 #ifdef CONFIG_NET_POLL_CONTROLLER
7398         .ndo_poll_controller    = e1000_netpoll,
7399 #endif
7400         .ndo_set_features = e1000_set_features,
7401         .ndo_fix_features = e1000_fix_features,
7402         .ndo_features_check     = passthru_features_check,
7403 };
7404
7405 /**
7406  * e1000_probe - Device Initialization Routine
7407  * @pdev: PCI device information struct
7408  * @ent: entry in e1000_pci_tbl
7409  *
7410  * Returns 0 on success, negative on failure
7411  *
7412  * e1000_probe initializes an adapter identified by a pci_dev structure.
7413  * The OS initialization, configuring of the adapter private structure,
7414  * and a hardware reset occur.
7415  **/
7416 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7417 {
7418         struct net_device *netdev;
7419         struct e1000_adapter *adapter;
7420         struct e1000_hw *hw;
7421         const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7422         resource_size_t mmio_start, mmio_len;
7423         resource_size_t flash_start, flash_len;
7424         static int cards_found;
7425         u16 aspm_disable_flag = 0;
7426         int bars, i, err, pci_using_dac;
7427         u16 eeprom_data = 0;
7428         u16 eeprom_apme_mask = E1000_EEPROM_APME;
7429         s32 ret_val = 0;
7430
7431         if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7432                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7433         if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7434                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7435         if (aspm_disable_flag)
7436                 e1000e_disable_aspm(pdev, aspm_disable_flag);
7437
7438         err = pci_enable_device_mem(pdev);
7439         if (err)
7440                 return err;
7441
7442         pci_using_dac = 0;
7443         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7444         if (!err) {
7445                 pci_using_dac = 1;
7446         } else {
7447                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7448                 if (err) {
7449                         dev_err(&pdev->dev,
7450                                 "No usable DMA configuration, aborting\n");
7451                         goto err_dma;
7452                 }
7453         }
7454
7455         bars = pci_select_bars(pdev, IORESOURCE_MEM);
7456         err = pci_request_selected_regions_exclusive(pdev, bars,
7457                                                      e1000e_driver_name);
7458         if (err)
7459                 goto err_pci_reg;
7460
7461         /* AER (Advanced Error Reporting) hooks */
7462         pci_enable_pcie_error_reporting(pdev);
7463
7464         pci_set_master(pdev);
7465         /* PCI config space info */
7466         err = pci_save_state(pdev);
7467         if (err)
7468                 goto err_alloc_etherdev;
7469
7470         err = -ENOMEM;
7471         netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7472         if (!netdev)
7473                 goto err_alloc_etherdev;
7474
7475         SET_NETDEV_DEV(netdev, &pdev->dev);
7476
7477         netdev->irq = pdev->irq;
7478
7479         pci_set_drvdata(pdev, netdev);
7480         adapter = netdev_priv(netdev);
7481         hw = &adapter->hw;
7482         adapter->netdev = netdev;
7483         adapter->pdev = pdev;
7484         adapter->ei = ei;
7485         adapter->pba = ei->pba;
7486         adapter->flags = ei->flags;
7487         adapter->flags2 = ei->flags2;
7488         adapter->hw.adapter = adapter;
7489         adapter->hw.mac.type = ei->mac;
7490         adapter->max_hw_frame_size = ei->max_hw_frame_size;
7491         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7492
7493         mmio_start = pci_resource_start(pdev, 0);
7494         mmio_len = pci_resource_len(pdev, 0);
7495
7496         err = -EIO;
7497         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7498         if (!adapter->hw.hw_addr)
7499                 goto err_ioremap;
7500
7501         if ((adapter->flags & FLAG_HAS_FLASH) &&
7502             (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7503             (hw->mac.type < e1000_pch_spt)) {
7504                 flash_start = pci_resource_start(pdev, 1);
7505                 flash_len = pci_resource_len(pdev, 1);
7506                 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7507                 if (!adapter->hw.flash_address)
7508                         goto err_flashmap;
7509         }
7510
7511         /* Set default EEE advertisement */
7512         if (adapter->flags2 & FLAG2_HAS_EEE)
7513                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7514
7515         /* construct the net_device struct */
7516         netdev->netdev_ops = &e1000e_netdev_ops;
7517         e1000e_set_ethtool_ops(netdev);
7518         netdev->watchdog_timeo = 5 * HZ;
7519         netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7520         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7521
7522         netdev->mem_start = mmio_start;
7523         netdev->mem_end = mmio_start + mmio_len;
7524
7525         adapter->bd_number = cards_found++;
7526
7527         e1000e_check_options(adapter);
7528
7529         /* setup adapter struct */
7530         err = e1000_sw_init(adapter);
7531         if (err)
7532                 goto err_sw_init;
7533
7534         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7535         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7536         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7537
7538         err = ei->get_variants(adapter);
7539         if (err)
7540                 goto err_hw_init;
7541
7542         if ((adapter->flags & FLAG_IS_ICH) &&
7543             (adapter->flags & FLAG_READ_ONLY_NVM) &&
7544             (hw->mac.type < e1000_pch_spt))
7545                 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7546
7547         hw->mac.ops.get_bus_info(&adapter->hw);
7548
7549         adapter->hw.phy.autoneg_wait_to_complete = 0;
7550
7551         /* Copper options */
7552         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7553                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7554                 adapter->hw.phy.disable_polarity_correction = 0;
7555                 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7556         }
7557
7558         if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7559                 dev_info(&pdev->dev,
7560                          "PHY reset is blocked due to SOL/IDER session.\n");
7561
7562         /* Set initial default active device features */
7563         netdev->features = (NETIF_F_SG |
7564                             NETIF_F_HW_VLAN_CTAG_RX |
7565                             NETIF_F_HW_VLAN_CTAG_TX |
7566                             NETIF_F_TSO |
7567                             NETIF_F_TSO6 |
7568                             NETIF_F_RXHASH |
7569                             NETIF_F_RXCSUM |
7570                             NETIF_F_HW_CSUM);
7571
7572         /* Set user-changeable features (subset of all device features) */
7573         netdev->hw_features = netdev->features;
7574         netdev->hw_features |= NETIF_F_RXFCS;
7575         netdev->priv_flags |= IFF_SUPP_NOFCS;
7576         netdev->hw_features |= NETIF_F_RXALL;
7577
7578         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7579                 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7580
7581         netdev->vlan_features |= (NETIF_F_SG |
7582                                   NETIF_F_TSO |
7583                                   NETIF_F_TSO6 |
7584                                   NETIF_F_HW_CSUM);
7585
7586         netdev->priv_flags |= IFF_UNICAST_FLT;
7587
7588         if (pci_using_dac) {
7589                 netdev->features |= NETIF_F_HIGHDMA;
7590                 netdev->vlan_features |= NETIF_F_HIGHDMA;
7591         }
7592
7593         /* MTU range: 68 - max_hw_frame_size */
7594         netdev->min_mtu = ETH_MIN_MTU;
7595         netdev->max_mtu = adapter->max_hw_frame_size -
7596                           (VLAN_ETH_HLEN + ETH_FCS_LEN);
7597
7598         if (e1000e_enable_mng_pass_thru(&adapter->hw))
7599                 adapter->flags |= FLAG_MNG_PT_ENABLED;
7600
7601         /* before reading the NVM, reset the controller to
7602          * put the device in a known good starting state
7603          */
7604         adapter->hw.mac.ops.reset_hw(&adapter->hw);
7605
7606         /* systems with ASPM and others may see the checksum fail on the first
7607          * attempt. Let's give it a few tries
7608          */
7609         for (i = 0;; i++) {
7610                 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7611                         break;
7612                 if (i == 2) {
7613                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7614                         err = -EIO;
7615                         goto err_eeprom;
7616                 }
7617         }
7618
7619         e1000_eeprom_checks(adapter);
7620
7621         /* copy the MAC address */
7622         if (e1000e_read_mac_addr(&adapter->hw))
7623                 dev_err(&pdev->dev,
7624                         "NVM Read Error while reading MAC address\n");
7625
7626         memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
7627
7628         if (!is_valid_ether_addr(netdev->dev_addr)) {
7629                 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7630                         netdev->dev_addr);
7631                 err = -EIO;
7632                 goto err_eeprom;
7633         }
7634
7635         timer_setup(&adapter->watchdog_timer, e1000_watchdog, 0);
7636         timer_setup(&adapter->phy_info_timer, e1000_update_phy_info, 0);
7637
7638         INIT_WORK(&adapter->reset_task, e1000_reset_task);
7639         INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7640         INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7641         INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7642         INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7643
7644         /* Initialize link parameters. User can change them with ethtool */
7645         adapter->hw.mac.autoneg = 1;
7646         adapter->fc_autoneg = true;
7647         adapter->hw.fc.requested_mode = e1000_fc_default;
7648         adapter->hw.fc.current_mode = e1000_fc_default;
7649         adapter->hw.phy.autoneg_advertised = 0x2f;
7650
7651         /* Initial Wake on LAN setting - If APM wake is enabled in
7652          * the EEPROM, enable the ACPI Magic Packet filter
7653          */
7654         if (adapter->flags & FLAG_APME_IN_WUC) {
7655                 /* APME bit in EEPROM is mapped to WUC.APME */
7656                 eeprom_data = er32(WUC);
7657                 eeprom_apme_mask = E1000_WUC_APME;
7658                 if ((hw->mac.type > e1000_ich10lan) &&
7659                     (eeprom_data & E1000_WUC_PHY_WAKE))
7660                         adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7661         } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7662                 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7663                     (adapter->hw.bus.func == 1))
7664                         ret_val = e1000_read_nvm(&adapter->hw,
7665                                               NVM_INIT_CONTROL3_PORT_B,
7666                                               1, &eeprom_data);
7667                 else
7668                         ret_val = e1000_read_nvm(&adapter->hw,
7669                                               NVM_INIT_CONTROL3_PORT_A,
7670                                               1, &eeprom_data);
7671         }
7672
7673         /* fetch WoL from EEPROM */
7674         if (ret_val)
7675                 e_dbg("NVM read error getting WoL initial values: %d\n", ret_val);
7676         else if (eeprom_data & eeprom_apme_mask)
7677                 adapter->eeprom_wol |= E1000_WUFC_MAG;
7678
7679         /* now that we have the eeprom settings, apply the special cases
7680          * where the eeprom may be wrong or the board simply won't support
7681          * wake on lan on a particular port
7682          */
7683         if (!(adapter->flags & FLAG_HAS_WOL))
7684                 adapter->eeprom_wol = 0;
7685
7686         /* initialize the wol settings based on the eeprom settings */
7687         adapter->wol = adapter->eeprom_wol;
7688
7689         /* make sure adapter isn't asleep if manageability is enabled */
7690         if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7691             (hw->mac.ops.check_mng_mode(hw)))
7692                 device_wakeup_enable(&pdev->dev);
7693
7694         /* save off EEPROM version number */
7695         ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7696
7697         if (ret_val) {
7698                 e_dbg("NVM read error getting EEPROM version: %d\n", ret_val);
7699                 adapter->eeprom_vers = 0;
7700         }
7701
7702         /* init PTP hardware clock */
7703         e1000e_ptp_init(adapter);
7704
7705         /* reset the hardware with the new settings */
7706         e1000e_reset(adapter);
7707
7708         /* If the controller has AMT, do not set DRV_LOAD until the interface
7709          * is up.  For all other cases, let the f/w know that the h/w is now
7710          * under the control of the driver.
7711          */
7712         if (!(adapter->flags & FLAG_HAS_AMT))
7713                 e1000e_get_hw_control(adapter);
7714
7715         if (hw->mac.type >= e1000_pch_cnp)
7716                 adapter->flags2 |= FLAG2_ENABLE_S0IX_FLOWS;
7717
7718         strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7719         err = register_netdev(netdev);
7720         if (err)
7721                 goto err_register;
7722
7723         /* carrier off reporting is important to ethtool even BEFORE open */
7724         netif_carrier_off(netdev);
7725
7726         e1000_print_device_info(adapter);
7727
7728         dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_SMART_PREPARE);
7729
7730         if (pci_dev_run_wake(pdev) && hw->mac.type != e1000_pch_cnp)
7731                 pm_runtime_put_noidle(&pdev->dev);
7732
7733         return 0;
7734
7735 err_register:
7736         if (!(adapter->flags & FLAG_HAS_AMT))
7737                 e1000e_release_hw_control(adapter);
7738 err_eeprom:
7739         if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7740                 e1000_phy_hw_reset(&adapter->hw);
7741 err_hw_init:
7742         kfree(adapter->tx_ring);
7743         kfree(adapter->rx_ring);
7744 err_sw_init:
7745         if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7746                 iounmap(adapter->hw.flash_address);
7747         e1000e_reset_interrupt_capability(adapter);
7748 err_flashmap:
7749         iounmap(adapter->hw.hw_addr);
7750 err_ioremap:
7751         free_netdev(netdev);
7752 err_alloc_etherdev:
7753         pci_disable_pcie_error_reporting(pdev);
7754         pci_release_mem_regions(pdev);
7755 err_pci_reg:
7756 err_dma:
7757         pci_disable_device(pdev);
7758         return err;
7759 }
7760
7761 /**
7762  * e1000_remove - Device Removal Routine
7763  * @pdev: PCI device information struct
7764  *
7765  * e1000_remove is called by the PCI subsystem to alert the driver
7766  * that it should release a PCI device.  This could be caused by a
7767  * Hot-Plug event, or because the driver is going to be removed from
7768  * memory.
7769  **/
7770 static void e1000_remove(struct pci_dev *pdev)
7771 {
7772         struct net_device *netdev = pci_get_drvdata(pdev);
7773         struct e1000_adapter *adapter = netdev_priv(netdev);
7774
7775         e1000e_ptp_remove(adapter);
7776
7777         /* The timers may be rescheduled, so explicitly disable them
7778          * from being rescheduled.
7779          */
7780         set_bit(__E1000_DOWN, &adapter->state);
7781         del_timer_sync(&adapter->watchdog_timer);
7782         del_timer_sync(&adapter->phy_info_timer);
7783
7784         cancel_work_sync(&adapter->reset_task);
7785         cancel_work_sync(&adapter->watchdog_task);
7786         cancel_work_sync(&adapter->downshift_task);
7787         cancel_work_sync(&adapter->update_phy_task);
7788         cancel_work_sync(&adapter->print_hang_task);
7789
7790         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7791                 cancel_work_sync(&adapter->tx_hwtstamp_work);
7792                 if (adapter->tx_hwtstamp_skb) {
7793                         dev_consume_skb_any(adapter->tx_hwtstamp_skb);
7794                         adapter->tx_hwtstamp_skb = NULL;
7795                 }
7796         }
7797
7798         unregister_netdev(netdev);
7799
7800         if (pci_dev_run_wake(pdev))
7801                 pm_runtime_get_noresume(&pdev->dev);
7802
7803         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7804          * would have already happened in close and is redundant.
7805          */
7806         e1000e_release_hw_control(adapter);
7807
7808         e1000e_reset_interrupt_capability(adapter);
7809         kfree(adapter->tx_ring);
7810         kfree(adapter->rx_ring);
7811
7812         iounmap(adapter->hw.hw_addr);
7813         if ((adapter->hw.flash_address) &&
7814             (adapter->hw.mac.type < e1000_pch_spt))
7815                 iounmap(adapter->hw.flash_address);
7816         pci_release_mem_regions(pdev);
7817
7818         free_netdev(netdev);
7819
7820         /* AER disable */
7821         pci_disable_pcie_error_reporting(pdev);
7822
7823         pci_disable_device(pdev);
7824 }
7825
7826 /* PCI Error Recovery (ERS) */
7827 static const struct pci_error_handlers e1000_err_handler = {
7828         .error_detected = e1000_io_error_detected,
7829         .slot_reset = e1000_io_slot_reset,
7830         .resume = e1000_io_resume,
7831 };
7832
7833 static const struct pci_device_id e1000_pci_tbl[] = {
7834         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7835         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7836         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7837         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7838           board_82571 },
7839         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7840         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7841         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7842         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7843         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7844
7845         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7846         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7847         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7848         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7849
7850         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7851         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7852         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7853
7854         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7855         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7856         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7857
7858         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7859           board_80003es2lan },
7860         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7861           board_80003es2lan },
7862         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7863           board_80003es2lan },
7864         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7865           board_80003es2lan },
7866
7867         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7868         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7869         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7870         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7871         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7872         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7873         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7874         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7875
7876         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7877         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7878         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7879         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7880         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7881         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7882         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7883         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7884         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7885
7886         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7887         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7888         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7889
7890         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7891         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7892         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7893
7894         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7895         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7896         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7897         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7898
7899         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7900         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7901
7902         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7903         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7904         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7905         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7906         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7907         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7908         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7909         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7910         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7911         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7912         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7913         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7914         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7915         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7916         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7917         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7918         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7919         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM6), board_pch_cnp },
7920         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
7921         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
7922         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
7923         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM8), board_pch_cnp },
7924         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
7925         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
7926         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
7927         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM10), board_pch_cnp },
7928         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V10), board_pch_cnp },
7929         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM11), board_pch_cnp },
7930         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V11), board_pch_cnp },
7931         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM12), board_pch_spt },
7932         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V12), board_pch_spt },
7933         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM13), board_pch_tgp },
7934         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V13), board_pch_tgp },
7935         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM14), board_pch_tgp },
7936         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V14), board_pch_tgp },
7937         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM15), board_pch_tgp },
7938         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V15), board_pch_tgp },
7939         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM23), board_pch_adp },
7940         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V23), board_pch_adp },
7941         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM16), board_pch_adp },
7942         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V16), board_pch_adp },
7943         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM17), board_pch_adp },
7944         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V17), board_pch_adp },
7945         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM22), board_pch_adp },
7946         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V22), board_pch_adp },
7947         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM18), board_pch_adp },
7948         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V18), board_pch_adp },
7949         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM19), board_pch_adp },
7950         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V19), board_pch_adp },
7951         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM20), board_pch_adp },
7952         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V20), board_pch_adp },
7953         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM21), board_pch_adp },
7954         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V21), board_pch_adp },
7955
7956         { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7957 };
7958 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7959
7960 static const struct dev_pm_ops e1000_pm_ops = {
7961 #ifdef CONFIG_PM_SLEEP
7962         .prepare        = e1000e_pm_prepare,
7963         .suspend        = e1000e_pm_suspend,
7964         .resume         = e1000e_pm_resume,
7965         .freeze         = e1000e_pm_freeze,
7966         .thaw           = e1000e_pm_thaw,
7967         .poweroff       = e1000e_pm_suspend,
7968         .restore        = e1000e_pm_resume,
7969 #endif
7970         SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7971                            e1000e_pm_runtime_idle)
7972 };
7973
7974 /* PCI Device API Driver */
7975 static struct pci_driver e1000_driver = {
7976         .name     = e1000e_driver_name,
7977         .id_table = e1000_pci_tbl,
7978         .probe    = e1000_probe,
7979         .remove   = e1000_remove,
7980         .driver   = {
7981                 .pm = &e1000_pm_ops,
7982         },
7983         .shutdown = e1000_shutdown,
7984         .err_handler = &e1000_err_handler
7985 };
7986
7987 /**
7988  * e1000_init_module - Driver Registration Routine
7989  *
7990  * e1000_init_module is the first routine called when the driver is
7991  * loaded. All it does is register with the PCI subsystem.
7992  **/
7993 static int __init e1000_init_module(void)
7994 {
7995         pr_info("Intel(R) PRO/1000 Network Driver\n");
7996         pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7997
7998         return pci_register_driver(&e1000_driver);
7999 }
8000 module_init(e1000_init_module);
8001
8002 /**
8003  * e1000_exit_module - Driver Exit Cleanup Routine
8004  *
8005  * e1000_exit_module is called just before the driver is removed
8006  * from memory.
8007  **/
8008 static void __exit e1000_exit_module(void)
8009 {
8010         pci_unregister_driver(&e1000_driver);
8011 }
8012 module_exit(e1000_exit_module);
8013
8014 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
8015 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
8016 MODULE_LICENSE("GPL v2");
8017
8018 /* netdev.c */