drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #include <linux/etherdevice.h>
   5 #include <net/rtnetlink.h>
   6 #include "hclgevf_cmd.h"
   7 #include "hclgevf_main.h"
   8 #include "hclge_mbx.h"
   9 #include "hnae3.h"
  10
  11 #define HCLGEVF_NAME    "hclgevf"
  12
  13 static int hclgevf_init_hdev(struct hclgevf_dev *hdev);
  14 static void hclgevf_uninit_hdev(struct hclgevf_dev *hdev);
  15 static struct hnae3_ae_algo ae_algovf;
  16
  17 static const struct pci_device_id ae_algovf_pci_tbl[] = {
  18         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
  19         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF), 0},
  20         /* required last entry */
  21         {0, }
  22 };
  23
  24 MODULE_DEVICE_TABLE(pci, ae_algovf_pci_tbl);
  25
  26 static inline struct hclgevf_dev *hclgevf_ae_get_hdev(
  27         struct hnae3_handle *handle)
  28 {
  29         return container_of(handle, struct hclgevf_dev, nic);
  30 }
  31
  32 static int hclgevf_tqps_update_stats(struct hnae3_handle *handle)
  33 {
  34         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
  35         struct hnae3_queue *queue;
  36         struct hclgevf_desc desc;
  37         struct hclgevf_tqp *tqp;
  38         int status;
  39         int i;
  40
  41         for (i = 0; i < hdev->num_tqps; i++) {
  42                 queue = handle->kinfo.tqp[i];
  43                 tqp = container_of(queue, struct hclgevf_tqp, q);
  44                 hclgevf_cmd_setup_basic_desc(&desc,
  45                                              HCLGEVF_OPC_QUERY_RX_STATUS,
  46                                              true);
  47
  48                 desc.data[0] = cpu_to_le32(tqp->index & 0x1ff);
  49                 status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
  50                 if (status) {
  51                         dev_err(&hdev->pdev->dev,
  52                                 "Query tqp stat fail, status = %d,queue = %d\n",
  53                                 status, i);
  54                         return status;
  55                 }
  56                 tqp->tqp_stats.rcb_rx_ring_pktnum_rcd +=
  57                         le32_to_cpu(desc.data[1]);
  58
  59                 hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_QUERY_TX_STATUS,
  60                                              true);
  61
  62                 desc.data[0] = cpu_to_le32(tqp->index & 0x1ff);
  63                 status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
  64                 if (status) {
  65                         dev_err(&hdev->pdev->dev,
  66                                 "Query tqp stat fail, status = %d,queue = %d\n",
  67                                 status, i);
  68                         return status;
  69                 }
  70                 tqp->tqp_stats.rcb_tx_ring_pktnum_rcd +=
  71                         le32_to_cpu(desc.data[1]);
  72         }
  73
  74         return 0;
  75 }
  76
  77 static u64 *hclgevf_tqps_get_stats(struct hnae3_handle *handle, u64 *data)
  78 {
  79         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
  80         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
  81         struct hclgevf_tqp *tqp;
  82         u64 *buff = data;
  83         int i;
  84
  85         for (i = 0; i < hdev->num_tqps; i++) {
  86                 tqp = container_of(handle->kinfo.tqp[i], struct hclgevf_tqp, q);
  87                 *buff++ = tqp->tqp_stats.rcb_tx_ring_pktnum_rcd;
  88         }
  89         for (i = 0; i < kinfo->num_tqps; i++) {
  90                 tqp = container_of(handle->kinfo.tqp[i], struct hclgevf_tqp, q);
  91                 *buff++ = tqp->tqp_stats.rcb_rx_ring_pktnum_rcd;
  92         }
  93
  94         return buff;
  95 }
  96
  97 static int hclgevf_tqps_get_sset_count(struct hnae3_handle *handle, int strset)
  98 {
  99         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 100
 101         return hdev->num_tqps * 2;
 102 }
 103
 104 static u8 *hclgevf_tqps_get_strings(struct hnae3_handle *handle, u8 *data)
 105 {
 106         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 107         u8 *buff = data;
 108         int i = 0;
 109
 110         for (i = 0; i < hdev->num_tqps; i++) {
 111                 struct hclgevf_tqp *tqp = container_of(handle->kinfo.tqp[i],
 112                         struct hclgevf_tqp, q);
 113                 snprintf(buff, ETH_GSTRING_LEN, "txq#%d_pktnum_rcd",
 114                          tqp->index);
 115                 buff += ETH_GSTRING_LEN;
 116         }
 117
 118         for (i = 0; i < hdev->num_tqps; i++) {
 119                 struct hclgevf_tqp *tqp = container_of(handle->kinfo.tqp[i],
 120                         struct hclgevf_tqp, q);
 121                 snprintf(buff, ETH_GSTRING_LEN, "rxq#%d_pktnum_rcd",
 122                          tqp->index);
 123                 buff += ETH_GSTRING_LEN;
 124         }
 125
 126         return buff;
 127 }
 128
 129 static void hclgevf_update_stats(struct hnae3_handle *handle,
 130                                  struct net_device_stats *net_stats)
 131 {
 132         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 133         int status;
 134
 135         status = hclgevf_tqps_update_stats(handle);
 136         if (status)
 137                 dev_err(&hdev->pdev->dev,
 138                         "VF update of TQPS stats fail, status = %d.\n",
 139                         status);
 140 }
 141
 142 static int hclgevf_get_sset_count(struct hnae3_handle *handle, int strset)
 143 {
 144         if (strset == ETH_SS_TEST)
 145                 return -EOPNOTSUPP;
 146         else if (strset == ETH_SS_STATS)
 147                 return hclgevf_tqps_get_sset_count(handle, strset);
 148
 149         return 0;
 150 }
 151
 152 static void hclgevf_get_strings(struct hnae3_handle *handle, u32 strset,
 153                                 u8 *data)
 154 {
 155         u8 *p = (char *)data;
 156
 157         if (strset == ETH_SS_STATS)
 158                 p = hclgevf_tqps_get_strings(handle, p);
 159 }
 160
 161 static void hclgevf_get_stats(struct hnae3_handle *handle, u64 *data)
 162 {
 163         hclgevf_tqps_get_stats(handle, data);
 164 }
 165
 166 static int hclgevf_get_tc_info(struct hclgevf_dev *hdev)
 167 {
 168         u8 resp_msg;
 169         int status;
 170
 171         status = hclgevf_send_mbx_msg(hdev, HCLGE_MBX_GET_TCINFO, 0, NULL, 0,
 172                                       true, &resp_msg, sizeof(u8));
 173         if (status) {
 174                 dev_err(&hdev->pdev->dev,
 175                         "VF request to get TC info from PF failed %d",
 176                         status);
 177                 return status;
 178         }
 179
 180         hdev->hw_tc_map = resp_msg;
 181
 182         return 0;
 183 }
 184
 185 static int hclge_get_queue_info(struct hclgevf_dev *hdev)
 186 {
 187 #define HCLGEVF_TQPS_RSS_INFO_LEN       8
 188         u8 resp_msg[HCLGEVF_TQPS_RSS_INFO_LEN];
 189         int status;
 190
 191         status = hclgevf_send_mbx_msg(hdev, HCLGE_MBX_GET_QINFO, 0, NULL, 0,
 192                                       true, resp_msg,
 193                                       HCLGEVF_TQPS_RSS_INFO_LEN);
 194         if (status) {
 195                 dev_err(&hdev->pdev->dev,
 196                         "VF request to get tqp info from PF failed %d",
 197                         status);
 198                 return status;
 199         }
 200
 201         memcpy(&hdev->num_tqps, &resp_msg[0], sizeof(u16));
 202         memcpy(&hdev->rss_size_max, &resp_msg[2], sizeof(u16));
 203         memcpy(&hdev->num_desc, &resp_msg[4], sizeof(u16));
 204         memcpy(&hdev->rx_buf_len, &resp_msg[6], sizeof(u16));
 205
 206         return 0;
 207 }
 208
 209 static int hclgevf_alloc_tqps(struct hclgevf_dev *hdev)
 210 {
 211         struct hclgevf_tqp *tqp;
 212         int i;
 213
 214         /* if this is on going reset then we need to re-allocate the TPQs
 215          * since we cannot assume we would get same number of TPQs back from PF
 216          */
 217         if (hclgevf_dev_ongoing_reset(hdev))
 218                 devm_kfree(&hdev->pdev->dev, hdev->htqp);
 219
 220         hdev->htqp = devm_kcalloc(&hdev->pdev->dev, hdev->num_tqps,
 221                                   sizeof(struct hclgevf_tqp), GFP_KERNEL);
 222         if (!hdev->htqp)
 223                 return -ENOMEM;
 224
 225         tqp = hdev->htqp;
 226
 227         for (i = 0; i < hdev->num_tqps; i++) {
 228                 tqp->dev = &hdev->pdev->dev;
 229                 tqp->index = i;
 230
 231                 tqp->q.ae_algo = &ae_algovf;
 232                 tqp->q.buf_size = hdev->rx_buf_len;
 233                 tqp->q.desc_num = hdev->num_desc;
 234                 tqp->q.io_base = hdev->hw.io_base + HCLGEVF_TQP_REG_OFFSET +
 235                         i * HCLGEVF_TQP_REG_SIZE;
 236
 237                 tqp++;
 238         }
 239
 240         return 0;
 241 }
 242
 243 static int hclgevf_knic_setup(struct hclgevf_dev *hdev)
 244 {
 245         struct hnae3_handle *nic = &hdev->nic;
 246         struct hnae3_knic_private_info *kinfo;
 247         u16 new_tqps = hdev->num_tqps;
 248         int i;
 249
 250         kinfo = &nic->kinfo;
 251         kinfo->num_tc = 0;
 252         kinfo->num_desc = hdev->num_desc;
 253         kinfo->rx_buf_len = hdev->rx_buf_len;
 254         for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++)
 255                 if (hdev->hw_tc_map & BIT(i))
 256                         kinfo->num_tc++;
 257
 258         kinfo->rss_size
 259                 = min_t(u16, hdev->rss_size_max, new_tqps / kinfo->num_tc);
 260         new_tqps = kinfo->rss_size * kinfo->num_tc;
 261         kinfo->num_tqps = min(new_tqps, hdev->num_tqps);
 262
 263         /* if this is on going reset then we need to re-allocate the hnae queues
 264          * as well since number of TPQs from PF might have changed.
 265          */
 266         if (hclgevf_dev_ongoing_reset(hdev))
 267                 devm_kfree(&hdev->pdev->dev, kinfo->tqp);
 268
 269         kinfo->tqp = devm_kcalloc(&hdev->pdev->dev, kinfo->num_tqps,
 270                                   sizeof(struct hnae3_queue *), GFP_KERNEL);
 271         if (!kinfo->tqp)
 272                 return -ENOMEM;
 273
 274         for (i = 0; i < kinfo->num_tqps; i++) {
 275                 hdev->htqp[i].q.handle = &hdev->nic;
 276                 hdev->htqp[i].q.tqp_index = i;
 277                 kinfo->tqp[i] = &hdev->htqp[i].q;
 278         }
 279
 280         return 0;
 281 }
 282
 283 static void hclgevf_request_link_info(struct hclgevf_dev *hdev)
 284 {
 285         int status;
 286         u8 resp_msg;
 287
 288         status = hclgevf_send_mbx_msg(hdev, HCLGE_MBX_GET_LINK_STATUS, 0, NULL,
 289                                       0, false, &resp_msg, sizeof(u8));
 290         if (status)
 291                 dev_err(&hdev->pdev->dev,
 292                         "VF failed to fetch link status(%d) from PF", status);
 293 }
 294
 295 void hclgevf_update_link_status(struct hclgevf_dev *hdev, int link_state)
 296 {
 297         struct hnae3_handle *handle = &hdev->nic;
 298         struct hnae3_client *client;
 299
 300         client = handle->client;
 301
 302         if (link_state != hdev->hw.mac.link) {
 303                 client->ops->link_status_change(handle, !!link_state);
 304                 hdev->hw.mac.link = link_state;
 305         }
 306 }
 307
 308 static int hclgevf_set_handle_info(struct hclgevf_dev *hdev)
 309 {
 310         struct hnae3_handle *nic = &hdev->nic;
 311         int ret;
 312
 313         nic->ae_algo = &ae_algovf;
 314         nic->pdev = hdev->pdev;
 315         nic->numa_node_mask = hdev->numa_node_mask;
 316         nic->flags |= HNAE3_SUPPORT_VF;
 317
 318         if (hdev->ae_dev->dev_type != HNAE3_DEV_KNIC) {
 319                 dev_err(&hdev->pdev->dev, "unsupported device type %d\n",
 320                         hdev->ae_dev->dev_type);
 321                 return -EINVAL;
 322         }
 323
 324         ret = hclgevf_knic_setup(hdev);
 325         if (ret)
 326                 dev_err(&hdev->pdev->dev, "VF knic setup failed %d\n",
 327                         ret);
 328         return ret;
 329 }
 330
 331 static void hclgevf_free_vector(struct hclgevf_dev *hdev, int vector_id)
 332 {
 333         if (hdev->vector_status[vector_id] == HCLGEVF_INVALID_VPORT) {
 334                 dev_warn(&hdev->pdev->dev,
 335                          "vector(vector_id %d) has been freed.\n", vector_id);
 336                 return;
 337         }
 338
 339         hdev->vector_status[vector_id] = HCLGEVF_INVALID_VPORT;
 340         hdev->num_msi_left += 1;
 341         hdev->num_msi_used -= 1;
 342 }
 343
 344 static int hclgevf_get_vector(struct hnae3_handle *handle, u16 vector_num,
 345                               struct hnae3_vector_info *vector_info)
 346 {
 347         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 348         struct hnae3_vector_info *vector = vector_info;
 349         int alloc = 0;
 350         int i, j;
 351
 352         vector_num = min(hdev->num_msi_left, vector_num);
 353
 354         for (j = 0; j < vector_num; j++) {
 355                 for (i = HCLGEVF_MISC_VECTOR_NUM + 1; i < hdev->num_msi; i++) {
 356                         if (hdev->vector_status[i] == HCLGEVF_INVALID_VPORT) {
 357                                 vector->vector = pci_irq_vector(hdev->pdev, i);
 358                                 vector->io_addr = hdev->hw.io_base +
 359                                         HCLGEVF_VECTOR_REG_BASE +
 360                                         (i - 1) * HCLGEVF_VECTOR_REG_OFFSET;
 361                                 hdev->vector_status[i] = 0;
 362                                 hdev->vector_irq[i] = vector->vector;
 363
 364                                 vector++;
 365                                 alloc++;
 366
 367                                 break;
 368                         }
 369                 }
 370         }
 371         hdev->num_msi_left -= alloc;
 372         hdev->num_msi_used += alloc;
 373
 374         return alloc;
 375 }
 376
 377 static int hclgevf_get_vector_index(struct hclgevf_dev *hdev, int vector)
 378 {
 379         int i;
 380
 381         for (i = 0; i < hdev->num_msi; i++)
 382                 if (vector == hdev->vector_irq[i])
 383                         return i;
 384
 385         return -EINVAL;
 386 }
 387
 388 static u32 hclgevf_get_rss_key_size(struct hnae3_handle *handle)
 389 {
 390         return HCLGEVF_RSS_KEY_SIZE;
 391 }
 392
 393 static u32 hclgevf_get_rss_indir_size(struct hnae3_handle *handle)
 394 {
 395         return HCLGEVF_RSS_IND_TBL_SIZE;
 396 }
 397
 398 static int hclgevf_set_rss_indir_table(struct hclgevf_dev *hdev)
 399 {
 400         const u8 *indir = hdev->rss_cfg.rss_indirection_tbl;
 401         struct hclgevf_rss_indirection_table_cmd *req;
 402         struct hclgevf_desc desc;
 403         int status;
 404         int i, j;
 405
 406         req = (struct hclgevf_rss_indirection_table_cmd *)desc.data;
 407
 408         for (i = 0; i < HCLGEVF_RSS_CFG_TBL_NUM; i++) {
 409                 hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_INDIR_TABLE,
 410                                              false);
 411                 req->start_table_index = i * HCLGEVF_RSS_CFG_TBL_SIZE;
 412                 req->rss_set_bitmap = HCLGEVF_RSS_SET_BITMAP_MSK;
 413                 for (j = 0; j < HCLGEVF_RSS_CFG_TBL_SIZE; j++)
 414                         req->rss_result[j] =
 415                                 indir[i * HCLGEVF_RSS_CFG_TBL_SIZE + j];
 416
 417                 status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
 418                 if (status) {
 419                         dev_err(&hdev->pdev->dev,
 420                                 "VF failed(=%d) to set RSS indirection table\n",
 421                                 status);
 422                         return status;
 423                 }
 424         }
 425
 426         return 0;
 427 }
 428
 429 static int hclgevf_set_rss_tc_mode(struct hclgevf_dev *hdev,  u16 rss_size)
 430 {
 431         struct hclgevf_rss_tc_mode_cmd *req;
 432         u16 tc_offset[HCLGEVF_MAX_TC_NUM];
 433         u16 tc_valid[HCLGEVF_MAX_TC_NUM];
 434         u16 tc_size[HCLGEVF_MAX_TC_NUM];
 435         struct hclgevf_desc desc;
 436         u16 roundup_size;
 437         int status;
 438         int i;
 439
 440         req = (struct hclgevf_rss_tc_mode_cmd *)desc.data;
 441
 442         roundup_size = roundup_pow_of_two(rss_size);
 443         roundup_size = ilog2(roundup_size);
 444
 445         for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) {
 446                 tc_valid[i] = !!(hdev->hw_tc_map & BIT(i));
 447                 tc_size[i] = roundup_size;
 448                 tc_offset[i] = rss_size * i;
 449         }
 450
 451         hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_TC_MODE, false);
 452         for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) {
 453                 hnae3_set_bit(req->rss_tc_mode[i], HCLGEVF_RSS_TC_VALID_B,
 454                               (tc_valid[i] & 0x1));
 455                 hnae3_set_field(req->rss_tc_mode[i], HCLGEVF_RSS_TC_SIZE_M,
 456                                 HCLGEVF_RSS_TC_SIZE_S, tc_size[i]);
 457                 hnae3_set_field(req->rss_tc_mode[i], HCLGEVF_RSS_TC_OFFSET_M,
 458                                 HCLGEVF_RSS_TC_OFFSET_S, tc_offset[i]);
 459         }
 460         status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
 461         if (status)
 462                 dev_err(&hdev->pdev->dev,
 463                         "VF failed(=%d) to set rss tc mode\n", status);
 464
 465         return status;
 466 }
 467
 468 static int hclgevf_get_rss_hw_cfg(struct hnae3_handle *handle, u8 *hash,
 469                                   u8 *key)
 470 {
 471         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 472         struct hclgevf_rss_config_cmd *req;
 473         int lkup_times = key ? 3 : 1;
 474         struct hclgevf_desc desc;
 475         int key_offset;
 476         int key_size;
 477         int status;
 478
 479         req = (struct hclgevf_rss_config_cmd *)desc.data;
 480         lkup_times = (lkup_times == 3) ? 3 : ((hash) ? 1 : 0);
 481
 482         for (key_offset = 0; key_offset < lkup_times; key_offset++) {
 483                 hclgevf_cmd_setup_basic_desc(&desc,
 484                                              HCLGEVF_OPC_RSS_GENERIC_CONFIG,
 485                                              true);
 486                 req->hash_config |= (key_offset << HCLGEVF_RSS_HASH_KEY_OFFSET);
 487
 488                 status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
 489                 if (status) {
 490                         dev_err(&hdev->pdev->dev,
 491                                 "failed to get hardware RSS cfg, status = %d\n",
 492                                 status);
 493                         return status;
 494                 }
 495
 496                 if (key_offset == 2)
 497                         key_size =
 498                         HCLGEVF_RSS_KEY_SIZE - HCLGEVF_RSS_HASH_KEY_NUM * 2;
 499                 else
 500                         key_size = HCLGEVF_RSS_HASH_KEY_NUM;
 501
 502                 if (key)
 503                         memcpy(key + key_offset * HCLGEVF_RSS_HASH_KEY_NUM,
 504                                req->hash_key,
 505                                key_size);
 506         }
 507
 508         if (hash) {
 509                 if ((req->hash_config & 0xf) == HCLGEVF_RSS_HASH_ALGO_TOEPLITZ)
 510                         *hash = ETH_RSS_HASH_TOP;
 511                 else
 512                         *hash = ETH_RSS_HASH_UNKNOWN;
 513         }
 514
 515         return 0;
 516 }
 517
 518 static int hclgevf_get_rss(struct hnae3_handle *handle, u32 *indir, u8 *key,
 519                            u8 *hfunc)
 520 {
 521         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 522         struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg;
 523         int i;
 524
 525         if (indir)
 526                 for (i = 0; i < HCLGEVF_RSS_IND_TBL_SIZE; i++)
 527                         indir[i] = rss_cfg->rss_indirection_tbl[i];
 528
 529         return hclgevf_get_rss_hw_cfg(handle, hfunc, key);
 530 }
 531
 532 static int hclgevf_set_rss(struct hnae3_handle *handle, const u32 *indir,
 533                            const  u8 *key, const  u8 hfunc)
 534 {
 535         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 536         struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg;
 537         int i;
 538
 539         /* update the shadow RSS table with user specified qids */
 540         for (i = 0; i < HCLGEVF_RSS_IND_TBL_SIZE; i++)
 541                 rss_cfg->rss_indirection_tbl[i] = indir[i];
 542
 543         /* update the hardware */
 544         return hclgevf_set_rss_indir_table(hdev);
 545 }
 546
 547 static int hclgevf_get_tc_size(struct hnae3_handle *handle)
 548 {
 549         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 550         struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg;
 551
 552         return rss_cfg->rss_size;
 553 }
 554
 555 static int hclgevf_bind_ring_to_vector(struct hnae3_handle *handle, bool en,
 556                                        int vector_id,
 557                                        struct hnae3_ring_chain_node *ring_chain)
 558 {
 559         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 560         struct hnae3_ring_chain_node *node;
 561         struct hclge_mbx_vf_to_pf_cmd *req;
 562         struct hclgevf_desc desc;
 563         int i = 0;
 564         int status;
 565         u8 type;
 566
 567         req = (struct hclge_mbx_vf_to_pf_cmd *)desc.data;
 568
 569         for (node = ring_chain; node; node = node->next) {
 570                 int idx_offset = HCLGE_MBX_RING_MAP_BASIC_MSG_NUM +
 571                                         HCLGE_MBX_RING_NODE_VARIABLE_NUM * i;
 572
 573                 if (i == 0) {
 574                         hclgevf_cmd_setup_basic_desc(&desc,
 575                                                      HCLGEVF_OPC_MBX_VF_TO_PF,
 576                                                      false);
 577                         type = en ?
 578                                 HCLGE_MBX_MAP_RING_TO_VECTOR :
 579                                 HCLGE_MBX_UNMAP_RING_TO_VECTOR;
 580                         req->msg[0] = type;
 581                         req->msg[1] = vector_id;
 582                 }
 583
 584                 req->msg[idx_offset] =
 585                                 hnae3_get_bit(node->flag, HNAE3_RING_TYPE_B);
 586                 req->msg[idx_offset + 1] = node->tqp_index;
 587                 req->msg[idx_offset + 2] = hnae3_get_field(node->int_gl_idx,
 588                                                            HNAE3_RING_GL_IDX_M,
 589                                                            HNAE3_RING_GL_IDX_S);
 590
 591                 i++;
 592                 if ((i == (HCLGE_MBX_VF_MSG_DATA_NUM -
 593                      HCLGE_MBX_RING_MAP_BASIC_MSG_NUM) /
 594                      HCLGE_MBX_RING_NODE_VARIABLE_NUM) ||
 595                     !node->next) {
 596                         req->msg[2] = i;
 597
 598                         status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
 599                         if (status) {
 600                                 dev_err(&hdev->pdev->dev,
 601                                         "Map TQP fail, status is %d.\n",
 602                                         status);
 603                                 return status;
 604                         }
 605                         i = 0;
 606                         hclgevf_cmd_setup_basic_desc(&desc,
 607                                                      HCLGEVF_OPC_MBX_VF_TO_PF,
 608                                                      false);
 609                         req->msg[0] = type;
 610                         req->msg[1] = vector_id;
 611                 }
 612         }
 613
 614         return 0;
 615 }
 616
 617 static int hclgevf_map_ring_to_vector(struct hnae3_handle *handle, int vector,
 618                                       struct hnae3_ring_chain_node *ring_chain)
 619 {
 620         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 621         int vector_id;
 622
 623         vector_id = hclgevf_get_vector_index(hdev, vector);
 624         if (vector_id < 0) {
 625                 dev_err(&handle->pdev->dev,
 626                         "Get vector index fail. ret =%d\n", vector_id);
 627                 return vector_id;
 628         }
 629
 630         return hclgevf_bind_ring_to_vector(handle, true, vector_id, ring_chain);
 631 }
 632
 633 static int hclgevf_unmap_ring_from_vector(
 634                                 struct hnae3_handle *handle,
 635                                 int vector,
 636                                 struct hnae3_ring_chain_node *ring_chain)
 637 {
 638         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 639         int ret, vector_id;
 640
 641         vector_id = hclgevf_get_vector_index(hdev, vector);
 642         if (vector_id < 0) {
 643                 dev_err(&handle->pdev->dev,
 644                         "Get vector index fail. ret =%d\n", vector_id);
 645                 return vector_id;
 646         }
 647
 648         ret = hclgevf_bind_ring_to_vector(handle, false, vector_id, ring_chain);
 649         if (ret)
 650                 dev_err(&handle->pdev->dev,
 651                         "Unmap ring from vector fail. vector=%d, ret =%d\n",
 652                         vector_id,
 653                         ret);
 654
 655         return ret;
 656 }
 657
 658 static int hclgevf_put_vector(struct hnae3_handle *handle, int vector)
 659 {
 660         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 661         int vector_id;
 662
 663         vector_id = hclgevf_get_vector_index(hdev, vector);
 664         if (vector_id < 0) {
 665                 dev_err(&handle->pdev->dev,
 666                         "hclgevf_put_vector get vector index fail. ret =%d\n",
 667                         vector_id);
 668                 return vector_id;
 669         }
 670
 671         hclgevf_free_vector(hdev, vector_id);
 672
 673         return 0;
 674 }
 675
 676 static int hclgevf_cmd_set_promisc_mode(struct hclgevf_dev *hdev,
 677                                         bool en_uc_pmc, bool en_mc_pmc)
 678 {
 679         struct hclge_mbx_vf_to_pf_cmd *req;
 680         struct hclgevf_desc desc;
 681         int status;
 682
 683         req = (struct hclge_mbx_vf_to_pf_cmd *)desc.data;
 684
 685         hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_VF_TO_PF, false);
 686         req->msg[0] = HCLGE_MBX_SET_PROMISC_MODE;
 687         req->msg[1] = en_uc_pmc ? 1 : 0;
 688         req->msg[2] = en_mc_pmc ? 1 : 0;
 689
 690         status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
 691         if (status)
 692                 dev_err(&hdev->pdev->dev,
 693                         "Set promisc mode fail, status is %d.\n", status);
 694
 695         return status;
 696 }
 697
 698 static void hclgevf_set_promisc_mode(struct hnae3_handle *handle,
 699                                      bool en_uc_pmc, bool en_mc_pmc)
 700 {
 701         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 702
 703         hclgevf_cmd_set_promisc_mode(hdev, en_uc_pmc, en_mc_pmc);
 704 }
 705
 706 static int hclgevf_tqp_enable(struct hclgevf_dev *hdev, int tqp_id,
 707                               int stream_id, bool enable)
 708 {
 709         struct hclgevf_cfg_com_tqp_queue_cmd *req;
 710         struct hclgevf_desc desc;
 711         int status;
 712
 713         req = (struct hclgevf_cfg_com_tqp_queue_cmd *)desc.data;
 714
 715         hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_CFG_COM_TQP_QUEUE,
 716                                      false);
 717         req->tqp_id = cpu_to_le16(tqp_id & HCLGEVF_RING_ID_MASK);
 718         req->stream_id = cpu_to_le16(stream_id);
 719         req->enable |= enable << HCLGEVF_TQP_ENABLE_B;
 720
 721         status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
 722         if (status)
 723                 dev_err(&hdev->pdev->dev,
 724                         "TQP enable fail, status =%d.\n", status);
 725
 726         return status;
 727 }
 728
 729 static int hclgevf_get_queue_id(struct hnae3_queue *queue)
 730 {
 731         struct hclgevf_tqp *tqp = container_of(queue, struct hclgevf_tqp, q);
 732
 733         return tqp->index;
 734 }
 735
 736 static void hclgevf_reset_tqp_stats(struct hnae3_handle *handle)
 737 {
 738         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 739         struct hnae3_queue *queue;
 740         struct hclgevf_tqp *tqp;
 741         int i;
 742
 743         for (i = 0; i < hdev->num_tqps; i++) {
 744                 queue = handle->kinfo.tqp[i];
 745                 tqp = container_of(queue, struct hclgevf_tqp, q);
 746                 memset(&tqp->tqp_stats, 0, sizeof(tqp->tqp_stats));
 747         }
 748 }
 749
 750 static int hclgevf_cfg_func_mta_type(struct hclgevf_dev *hdev)
 751 {
 752         u8 resp_msg = HCLGEVF_MTA_TYPE_SEL_MAX;
 753         int ret;
 754
 755         ret = hclgevf_send_mbx_msg(hdev, HCLGE_MBX_SET_MULTICAST,
 756                                    HCLGE_MBX_MAC_VLAN_MTA_TYPE_READ,
 757                                    NULL, 0, true, &resp_msg, sizeof(u8));
 758
 759         if (ret) {
 760                 dev_err(&hdev->pdev->dev,
 761                         "Read mta type fail, ret=%d.\n", ret);
 762                 return ret;
 763         }
 764
 765         if (resp_msg > HCLGEVF_MTA_TYPE_SEL_MAX) {
 766                 dev_err(&hdev->pdev->dev,
 767                         "Read mta type invalid, resp=%d.\n", resp_msg);
 768                 return -EINVAL;
 769         }
 770
 771         hdev->mta_mac_sel_type = resp_msg;
 772
 773         return 0;
 774 }
 775
 776 static u16 hclgevf_get_mac_addr_to_mta_index(struct hclgevf_dev *hdev,
 777                                              const u8 *addr)
 778 {
 779         u32 rsh = HCLGEVF_MTA_TYPE_SEL_MAX - hdev->mta_mac_sel_type;
 780         u16 high_val = addr[1] | (addr[0] << 8);
 781
 782         return (high_val >> rsh) & 0xfff;
 783 }
 784
 785 static int hclgevf_do_update_mta_status(struct hclgevf_dev *hdev,
 786                                         unsigned long *status)
 787 {
 788 #define HCLGEVF_MTA_STATUS_MSG_SIZE 13
 789 #define HCLGEVF_MTA_STATUS_MSG_BITS \
 790                         (HCLGEVF_MTA_STATUS_MSG_SIZE * BITS_PER_BYTE)
 791 #define HCLGEVF_MTA_STATUS_MSG_END_BITS \
 792                         (HCLGEVF_MTA_TBL_SIZE % HCLGEVF_MTA_STATUS_MSG_BITS)
 793         u16 tbl_cnt;
 794         u16 tbl_idx;
 795         u8 msg_cnt;
 796         u8 msg_idx;
 797         int ret;
 798
 799         msg_cnt = DIV_ROUND_UP(HCLGEVF_MTA_TBL_SIZE,
 800                                HCLGEVF_MTA_STATUS_MSG_BITS);
 801         tbl_idx = 0;
 802         msg_idx = 0;
 803         while (msg_cnt--) {
 804                 u8 msg[HCLGEVF_MTA_STATUS_MSG_SIZE + 1];
 805                 u8 *p = &msg[1];
 806                 u8 msg_ofs;
 807                 u8 msg_bit;
 808
 809                 memset(msg, 0, sizeof(msg));
 810
 811                 /* set index field */
 812                 msg[0] = 0x7F & msg_idx;
 813
 814                 /* set end flag field */
 815                 if (msg_cnt == 0) {
 816                         msg[0] |= 0x80;
 817                         tbl_cnt = HCLGEVF_MTA_STATUS_MSG_END_BITS;
 818                 } else {
 819                         tbl_cnt = HCLGEVF_MTA_STATUS_MSG_BITS;
 820                 }
 821
 822                 /* set status field */
 823                 msg_ofs = 0;
 824                 msg_bit = 0;
 825                 while (tbl_cnt--) {
 826                         if (test_bit(tbl_idx, status))
 827                                 p[msg_ofs] |= BIT(msg_bit);
 828
 829                         tbl_idx++;
 830
 831                         msg_bit++;
 832                         if (msg_bit == BITS_PER_BYTE) {
 833                                 msg_bit = 0;
 834                                 msg_ofs++;
 835                         }
 836                 }
 837
 838                 ret = hclgevf_send_mbx_msg(hdev, HCLGE_MBX_SET_MULTICAST,
 839                                            HCLGE_MBX_MAC_VLAN_MTA_STATUS_UPDATE,
 840                                            msg, sizeof(msg), false, NULL, 0);
 841                 if (ret)
 842                         break;
 843
 844                 msg_idx++;
 845         }
 846
 847         return ret;
 848 }
 849
 850 static int hclgevf_update_mta_status(struct hnae3_handle *handle)
 851 {
 852         unsigned long mta_status[BITS_TO_LONGS(HCLGEVF_MTA_TBL_SIZE)];
 853         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 854         struct net_device *netdev = hdev->nic.kinfo.netdev;
 855         struct netdev_hw_addr *ha;
 856         u16 tbl_idx;
 857
 858         /* clear status */
 859         memset(mta_status, 0, sizeof(mta_status));
 860
 861         /* update status from mc addr list */
 862         netdev_for_each_mc_addr(ha, netdev) {
 863                 tbl_idx = hclgevf_get_mac_addr_to_mta_index(hdev, ha->addr);
 864                 set_bit(tbl_idx, mta_status);
 865         }
 866
 867         return hclgevf_do_update_mta_status(hdev, mta_status);
 868 }
 869
 870 static void hclgevf_get_mac_addr(struct hnae3_handle *handle, u8 *p)
 871 {
 872         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 873
 874         ether_addr_copy(p, hdev->hw.mac.mac_addr);
 875 }
 876
 877 static int hclgevf_set_mac_addr(struct hnae3_handle *handle, void *p,
 878                                 bool is_first)
 879 {
 880         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 881         u8 *old_mac_addr = (u8 *)hdev->hw.mac.mac_addr;
 882         u8 *new_mac_addr = (u8 *)p;
 883         u8 msg_data[ETH_ALEN * 2];
 884         u16 subcode;
 885         int status;
 886
 887         ether_addr_copy(msg_data, new_mac_addr);
 888         ether_addr_copy(&msg_data[ETH_ALEN], old_mac_addr);
 889
 890         subcode = is_first ? HCLGE_MBX_MAC_VLAN_UC_ADD :
 891                         HCLGE_MBX_MAC_VLAN_UC_MODIFY;
 892
 893         status = hclgevf_send_mbx_msg(hdev, HCLGE_MBX_SET_UNICAST,
 894                                       subcode, msg_data, ETH_ALEN * 2,
 895                                       true, NULL, 0);
 896         if (!status)
 897                 ether_addr_copy(hdev->hw.mac.mac_addr, new_mac_addr);
 898
 899         return status;
 900 }
 901
 902 static int hclgevf_add_uc_addr(struct hnae3_handle *handle,
 903                                const unsigned char *addr)
 904 {
 905         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 906
 907         return hclgevf_send_mbx_msg(hdev, HCLGE_MBX_SET_UNICAST,
 908                                     HCLGE_MBX_MAC_VLAN_UC_ADD,
 909                                     addr, ETH_ALEN, false, NULL, 0);
 910 }
 911
 912 static int hclgevf_rm_uc_addr(struct hnae3_handle *handle,
 913                               const unsigned char *addr)
 914 {
 915         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 916
 917         return hclgevf_send_mbx_msg(hdev, HCLGE_MBX_SET_UNICAST,
 918                                     HCLGE_MBX_MAC_VLAN_UC_REMOVE,
 919                                     addr, ETH_ALEN, false, NULL, 0);
 920 }
 921
 922 static int hclgevf_add_mc_addr(struct hnae3_handle *handle,
 923                                const unsigned char *addr)
 924 {
 925         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 926
 927         return hclgevf_send_mbx_msg(hdev, HCLGE_MBX_SET_MULTICAST,
 928                                     HCLGE_MBX_MAC_VLAN_MC_ADD,
 929                                     addr, ETH_ALEN, false, NULL, 0);
 930 }
 931
 932 static int hclgevf_rm_mc_addr(struct hnae3_handle *handle,
 933                               const unsigned char *addr)
 934 {
 935         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 936
 937         return hclgevf_send_mbx_msg(hdev, HCLGE_MBX_SET_MULTICAST,
 938                                     HCLGE_MBX_MAC_VLAN_MC_REMOVE,
 939                                     addr, ETH_ALEN, false, NULL, 0);
 940 }
 941
 942 static int hclgevf_set_vlan_filter(struct hnae3_handle *handle,
 943                                    __be16 proto, u16 vlan_id,
 944                                    bool is_kill)
 945 {
 946 #define HCLGEVF_VLAN_MBX_MSG_LEN 5
 947         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 948         u8 msg_data[HCLGEVF_VLAN_MBX_MSG_LEN];
 949
 950         if (vlan_id > 4095)
 951                 return -EINVAL;
 952
 953         if (proto != htons(ETH_P_8021Q))
 954                 return -EPROTONOSUPPORT;
 955
 956         msg_data[0] = is_kill;
 957         memcpy(&msg_data[1], &vlan_id, sizeof(vlan_id));
 958         memcpy(&msg_data[3], &proto, sizeof(proto));
 959         return hclgevf_send_mbx_msg(hdev, HCLGE_MBX_SET_VLAN,
 960                                     HCLGE_MBX_VLAN_FILTER, msg_data,
 961                                     HCLGEVF_VLAN_MBX_MSG_LEN, false, NULL, 0);
 962 }
 963
 964 static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable)
 965 {
 966         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 967         u8 msg_data;
 968
 969         msg_data = enable ? 1 : 0;
 970         return hclgevf_send_mbx_msg(hdev, HCLGE_MBX_SET_VLAN,
 971                                     HCLGE_MBX_VLAN_RX_OFF_CFG, &msg_data,
 972                                     1, false, NULL, 0);
 973 }
 974
 975 static void hclgevf_reset_tqp(struct hnae3_handle *handle, u16 queue_id)
 976 {
 977         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 978         u8 msg_data[2];
 979         int ret;
 980
 981         memcpy(&msg_data[0], &queue_id, sizeof(queue_id));
 982
 983         /* disable vf queue before send queue reset msg to PF */
 984         ret = hclgevf_tqp_enable(hdev, queue_id, 0, false);
 985         if (ret)
 986                 return;
 987
 988         hclgevf_send_mbx_msg(hdev, HCLGE_MBX_QUEUE_RESET, 0, msg_data,
 989                              2, true, NULL, 0);
 990 }
 991
 992 static int hclgevf_notify_client(struct hclgevf_dev *hdev,
 993                                  enum hnae3_reset_notify_type type)
 994 {
 995         struct hnae3_client *client = hdev->nic_client;
 996         struct hnae3_handle *handle = &hdev->nic;
 997
 998         if (!client->ops->reset_notify)
 999                 return -EOPNOTSUPP;
1000
1001         return client->ops->reset_notify(handle, type);
1002 }
1003
1004 static int hclgevf_reset_wait(struct hclgevf_dev *hdev)
1005 {
1006 #define HCLGEVF_RESET_WAIT_MS   500
1007 #define HCLGEVF_RESET_WAIT_CNT  20
1008         u32 val, cnt = 0;
1009
1010         /* wait to check the hardware reset completion status */
1011         val = hclgevf_read_dev(&hdev->hw, HCLGEVF_FUN_RST_ING);
1012         while (hnae3_get_bit(val, HCLGEVF_FUN_RST_ING_B) &&
1013                (cnt < HCLGEVF_RESET_WAIT_CNT)) {
1014                 msleep(HCLGEVF_RESET_WAIT_MS);
1015                 val = hclgevf_read_dev(&hdev->hw, HCLGEVF_FUN_RST_ING);
1016                 cnt++;
1017         }
1018
1019         /* hardware completion status should be available by this time */
1020         if (cnt >= HCLGEVF_RESET_WAIT_CNT) {
1021                 dev_warn(&hdev->pdev->dev,
1022                          "could'nt get reset done status from h/w, timeout!\n");
1023                 return -EBUSY;
1024         }
1025
1026         /* we will wait a bit more to let reset of the stack to complete. This
1027          * might happen in case reset assertion was made by PF. Yes, this also
1028          * means we might end up waiting bit more even for VF reset.
1029          */
1030         msleep(5000);
1031
1032         return 0;
1033 }
1034
1035 static int hclgevf_reset_stack(struct hclgevf_dev *hdev)
1036 {
1037         int ret;
1038
1039         /* uninitialize the nic client */
1040         hclgevf_notify_client(hdev, HNAE3_UNINIT_CLIENT);
1041
1042         /* re-initialize the hclge device */
1043         ret = hclgevf_init_hdev(hdev);
1044         if (ret) {
1045                 dev_err(&hdev->pdev->dev,
1046                         "hclge device re-init failed, VF is disabled!\n");
1047                 return ret;
1048         }
1049
1050         /* bring up the nic client again */
1051         hclgevf_notify_client(hdev, HNAE3_INIT_CLIENT);
1052
1053         return 0;
1054 }
1055
1056 static int hclgevf_reset(struct hclgevf_dev *hdev)
1057 {
1058         int ret;
1059
1060         rtnl_lock();
1061
1062         /* bring down the nic to stop any ongoing TX/RX */
1063         hclgevf_notify_client(hdev, HNAE3_DOWN_CLIENT);
1064
1065         /* check if VF could successfully fetch the hardware reset completion
1066          * status from the hardware
1067          */
1068         ret = hclgevf_reset_wait(hdev);
1069         if (ret) {
1070                 /* can't do much in this situation, will disable VF */
1071                 dev_err(&hdev->pdev->dev,
1072                         "VF failed(=%d) to fetch H/W reset completion status\n",
1073                         ret);
1074
1075                 dev_warn(&hdev->pdev->dev, "VF reset failed, disabling VF!\n");
1076                 hclgevf_notify_client(hdev, HNAE3_UNINIT_CLIENT);
1077
1078                 rtnl_unlock();
1079                 return ret;
1080         }
1081
1082         /* now, re-initialize the nic client and ae device*/
1083         ret = hclgevf_reset_stack(hdev);
1084         if (ret)
1085                 dev_err(&hdev->pdev->dev, "failed to reset VF stack\n");
1086
1087         /* bring up the nic to enable TX/RX again */
1088         hclgevf_notify_client(hdev, HNAE3_UP_CLIENT);
1089
1090         rtnl_unlock();
1091
1092         return ret;
1093 }
1094
1095 static int hclgevf_do_reset(struct hclgevf_dev *hdev)
1096 {
1097         int status;
1098         u8 respmsg;
1099
1100         status = hclgevf_send_mbx_msg(hdev, HCLGE_MBX_RESET, 0, NULL,
1101                                       0, false, &respmsg, sizeof(u8));
1102         if (status)
1103                 dev_err(&hdev->pdev->dev,
1104                         "VF reset request to PF failed(=%d)\n", status);
1105
1106         return status;
1107 }
1108
1109 static void hclgevf_reset_event(struct hnae3_handle *handle)
1110 {
1111         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
1112
1113         dev_info(&hdev->pdev->dev, "received reset request from VF enet\n");
1114
1115         handle->reset_level = HNAE3_VF_RESET;
1116
1117         /* reset of this VF requested */
1118         set_bit(HCLGEVF_RESET_REQUESTED, &hdev->reset_state);
1119         hclgevf_reset_task_schedule(hdev);
1120
1121         handle->last_reset_time = jiffies;
1122 }
1123
1124 static u32 hclgevf_get_fw_version(struct hnae3_handle *handle)
1125 {
1126         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
1127
1128         return hdev->fw_version;
1129 }
1130
1131 static void hclgevf_get_misc_vector(struct hclgevf_dev *hdev)
1132 {
1133         struct hclgevf_misc_vector *vector = &hdev->misc_vector;
1134
1135         vector->vector_irq = pci_irq_vector(hdev->pdev,
1136                                             HCLGEVF_MISC_VECTOR_NUM);
1137         vector->addr = hdev->hw.io_base + HCLGEVF_MISC_VECTOR_REG_BASE;
1138         /* vector status always valid for Vector 0 */
1139         hdev->vector_status[HCLGEVF_MISC_VECTOR_NUM] = 0;
1140         hdev->vector_irq[HCLGEVF_MISC_VECTOR_NUM] = vector->vector_irq;
1141
1142         hdev->num_msi_left -= 1;
1143         hdev->num_msi_used += 1;
1144 }
1145
1146 void hclgevf_reset_task_schedule(struct hclgevf_dev *hdev)
1147 {
1148         if (!test_bit(HCLGEVF_STATE_RST_SERVICE_SCHED, &hdev->state) &&
1149             !test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) {
1150                 set_bit(HCLGEVF_STATE_RST_SERVICE_SCHED, &hdev->state);
1151                 schedule_work(&hdev->rst_service_task);
1152         }
1153 }
1154
1155 void hclgevf_mbx_task_schedule(struct hclgevf_dev *hdev)
1156 {
1157         if (!test_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state) &&
1158             !test_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state)) {
1159                 set_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state);
1160                 schedule_work(&hdev->mbx_service_task);
1161         }
1162 }
1163
1164 static void hclgevf_task_schedule(struct hclgevf_dev *hdev)
1165 {
1166         if (!test_bit(HCLGEVF_STATE_DOWN, &hdev->state)  &&
1167             !test_and_set_bit(HCLGEVF_STATE_SERVICE_SCHED, &hdev->state))
1168                 schedule_work(&hdev->service_task);
1169 }
1170
1171 static void hclgevf_deferred_task_schedule(struct hclgevf_dev *hdev)
1172 {
1173         /* if we have any pending mailbox event then schedule the mbx task */
1174         if (hdev->mbx_event_pending)
1175                 hclgevf_mbx_task_schedule(hdev);
1176
1177         if (test_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state))
1178                 hclgevf_reset_task_schedule(hdev);
1179 }
1180
1181 static void hclgevf_service_timer(struct timer_list *t)
1182 {
1183         struct hclgevf_dev *hdev = from_timer(hdev, t, service_timer);
1184
1185         mod_timer(&hdev->service_timer, jiffies + 5 * HZ);
1186
1187         hclgevf_task_schedule(hdev);
1188 }
1189
1190 static void hclgevf_reset_service_task(struct work_struct *work)
1191 {
1192         struct hclgevf_dev *hdev =
1193                 container_of(work, struct hclgevf_dev, rst_service_task);
1194         int ret;
1195
1196         if (test_and_set_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state))
1197                 return;
1198
1199         clear_bit(HCLGEVF_STATE_RST_SERVICE_SCHED, &hdev->state);
1200
1201         if (test_and_clear_bit(HCLGEVF_RESET_PENDING,
1202                                &hdev->reset_state)) {
1203                 /* PF has initmated that it is about to reset the hardware.
1204                  * We now have to poll & check if harware has actually completed
1205                  * the reset sequence. On hardware reset completion, VF needs to
1206                  * reset the client and ae device.
1207                  */
1208                 hdev->reset_attempts = 0;
1209
1210                 ret = hclgevf_reset(hdev);
1211                 if (ret)
1212                         dev_err(&hdev->pdev->dev, "VF stack reset failed.\n");
1213         } else if (test_and_clear_bit(HCLGEVF_RESET_REQUESTED,
1214                                       &hdev->reset_state)) {
1215                 /* we could be here when either of below happens:
1216                  * 1. reset was initiated due to watchdog timeout due to
1217                  *    a. IMP was earlier reset and our TX got choked down and
1218                  *       which resulted in watchdog reacting and inducing VF
1219                  *       reset. This also means our cmdq would be unreliable.
1220                  *    b. problem in TX due to other lower layer(example link
1221                  *       layer not functioning properly etc.)
1222                  * 2. VF reset might have been initiated due to some config
1223                  *    change.
1224                  *
1225                  * NOTE: Theres no clear way to detect above cases than to react
1226                  * to the response of PF for this reset request. PF will ack the
1227                  * 1b and 2. cases but we will not get any intimation about 1a
1228                  * from PF as cmdq would be in unreliable state i.e. mailbox
1229                  * communication between PF and VF would be broken.
1230                  */
1231
1232                 /* if we are never geting into pending state it means either:
1233                  * 1. PF is not receiving our request which could be due to IMP
1234                  *    reset
1235                  * 2. PF is screwed
1236                  * We cannot do much for 2. but to check first we can try reset
1237                  * our PCIe + stack and see if it alleviates the problem.
1238                  */
1239                 if (hdev->reset_attempts > 3) {
1240                         /* prepare for full reset of stack + pcie interface */
1241                         hdev->nic.reset_level = HNAE3_VF_FULL_RESET;
1242
1243                         /* "defer" schedule the reset task again */
1244                         set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state);
1245                 } else {
1246                         hdev->reset_attempts++;
1247
1248                         /* request PF for resetting this VF via mailbox */
1249                         ret = hclgevf_do_reset(hdev);
1250                         if (ret)
1251                                 dev_warn(&hdev->pdev->dev,
1252                                          "VF rst fail, stack will call\n");
1253                 }
1254         }
1255
1256         clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state);
1257 }
1258
1259 static void hclgevf_mailbox_service_task(struct work_struct *work)
1260 {
1261         struct hclgevf_dev *hdev;
1262
1263         hdev = container_of(work, struct hclgevf_dev, mbx_service_task);
1264
1265         if (test_and_set_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state))
1266                 return;
1267
1268         clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state);
1269
1270         hclgevf_mbx_async_handler(hdev);
1271
1272         clear_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state);
1273 }
1274
1275 static void hclgevf_service_task(struct work_struct *work)
1276 {
1277         struct hclgevf_dev *hdev;
1278
1279         hdev = container_of(work, struct hclgevf_dev, service_task);
1280
1281         /* request the link status from the PF. PF would be able to tell VF
1282          * about such updates in future so we might remove this later
1283          */
1284         hclgevf_request_link_info(hdev);
1285
1286         hclgevf_deferred_task_schedule(hdev);
1287
1288         clear_bit(HCLGEVF_STATE_SERVICE_SCHED, &hdev->state);
1289 }
1290
1291 static void hclgevf_clear_event_cause(struct hclgevf_dev *hdev, u32 regclr)
1292 {
1293         hclgevf_write_dev(&hdev->hw, HCLGEVF_VECTOR0_CMDQ_SRC_REG, regclr);
1294 }
1295
1296 static bool hclgevf_check_event_cause(struct hclgevf_dev *hdev, u32 *clearval)
1297 {
1298         u32 cmdq_src_reg;
1299
1300         /* fetch the events from their corresponding regs */
1301         cmdq_src_reg = hclgevf_read_dev(&hdev->hw,
1302                                         HCLGEVF_VECTOR0_CMDQ_SRC_REG);
1303
1304         /* check for vector0 mailbox(=CMDQ RX) event source */
1305         if (BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B) & cmdq_src_reg) {
1306                 cmdq_src_reg &= ~BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B);
1307                 *clearval = cmdq_src_reg;
1308                 return true;
1309         }
1310
1311         dev_dbg(&hdev->pdev->dev, "vector 0 interrupt from unknown source\n");
1312
1313         return false;
1314 }
1315
1316 static void hclgevf_enable_vector(struct hclgevf_misc_vector *vector, bool en)
1317 {
1318         writel(en ? 1 : 0, vector->addr);
1319 }
1320
1321 static irqreturn_t hclgevf_misc_irq_handle(int irq, void *data)
1322 {
1323         struct hclgevf_dev *hdev = data;
1324         u32 clearval;
1325
1326         hclgevf_enable_vector(&hdev->misc_vector, false);
1327         if (!hclgevf_check_event_cause(hdev, &clearval))
1328                 goto skip_sched;
1329
1330         hclgevf_mbx_handler(hdev);
1331
1332         hclgevf_clear_event_cause(hdev, clearval);
1333
1334 skip_sched:
1335         hclgevf_enable_vector(&hdev->misc_vector, true);
1336
1337         return IRQ_HANDLED;
1338 }
1339
1340 static int hclgevf_configure(struct hclgevf_dev *hdev)
1341 {
1342         int ret;
1343
1344         /* get queue configuration from PF */
1345         ret = hclge_get_queue_info(hdev);
1346         if (ret)
1347                 return ret;
1348         /* get tc configuration from PF */
1349         return hclgevf_get_tc_info(hdev);
1350 }
1351
1352 static int hclgevf_alloc_hdev(struct hnae3_ae_dev *ae_dev)
1353 {
1354         struct pci_dev *pdev = ae_dev->pdev;
1355         struct hclgevf_dev *hdev = ae_dev->priv;
1356
1357         hdev = devm_kzalloc(&pdev->dev, sizeof(*hdev), GFP_KERNEL);
1358         if (!hdev)
1359                 return -ENOMEM;
1360
1361         hdev->pdev = pdev;
1362         hdev->ae_dev = ae_dev;
1363         ae_dev->priv = hdev;
1364
1365         return 0;
1366 }
1367
1368 static int hclgevf_init_roce_base_info(struct hclgevf_dev *hdev)
1369 {
1370         struct hnae3_handle *roce = &hdev->roce;
1371         struct hnae3_handle *nic = &hdev->nic;
1372
1373         roce->rinfo.num_vectors = HCLGEVF_ROCEE_VECTOR_NUM;
1374
1375         if (hdev->num_msi_left < roce->rinfo.num_vectors ||
1376             hdev->num_msi_left == 0)
1377                 return -EINVAL;
1378
1379         roce->rinfo.base_vector =
1380                 hdev->vector_status[hdev->num_msi_used];
1381
1382         roce->rinfo.netdev = nic->kinfo.netdev;
1383         roce->rinfo.roce_io_base = hdev->hw.io_base;
1384
1385         roce->pdev = nic->pdev;
1386         roce->ae_algo = nic->ae_algo;
1387         roce->numa_node_mask = nic->numa_node_mask;
1388
1389         return 0;
1390 }
1391
1392 static int hclgevf_rss_init_hw(struct hclgevf_dev *hdev)
1393 {
1394         struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg;
1395         int i, ret;
1396
1397         rss_cfg->rss_size = hdev->rss_size_max;
1398
1399         /* Initialize RSS indirect table for each vport */
1400         for (i = 0; i < HCLGEVF_RSS_IND_TBL_SIZE; i++)
1401                 rss_cfg->rss_indirection_tbl[i] = i % hdev->rss_size_max;
1402
1403         ret = hclgevf_set_rss_indir_table(hdev);
1404         if (ret)
1405                 return ret;
1406
1407         return hclgevf_set_rss_tc_mode(hdev, hdev->rss_size_max);
1408 }
1409
1410 static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev)
1411 {
1412         /* other vlan config(like, VLAN TX/RX offload) would also be added
1413          * here later
1414          */
1415         return hclgevf_set_vlan_filter(&hdev->nic, htons(ETH_P_8021Q), 0,
1416                                        false);
1417 }
1418
1419 static int hclgevf_ae_start(struct hnae3_handle *handle)
1420 {
1421         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
1422         int i, queue_id;
1423
1424         for (i = 0; i < handle->kinfo.num_tqps; i++) {
1425                 /* ring enable */
1426                 queue_id = hclgevf_get_queue_id(handle->kinfo.tqp[i]);
1427                 if (queue_id < 0) {
1428                         dev_warn(&hdev->pdev->dev,
1429                                  "Get invalid queue id, ignore it\n");
1430                         continue;
1431                 }
1432
1433                 hclgevf_tqp_enable(hdev, queue_id, 0, true);
1434         }
1435
1436         /* reset tqp stats */
1437         hclgevf_reset_tqp_stats(handle);
1438
1439         hclgevf_request_link_info(hdev);
1440
1441         clear_bit(HCLGEVF_STATE_DOWN, &hdev->state);
1442         mod_timer(&hdev->service_timer, jiffies + HZ);
1443
1444         return 0;
1445 }
1446
1447 static void hclgevf_ae_stop(struct hnae3_handle *handle)
1448 {
1449         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
1450         int i, queue_id;
1451
1452         for (i = 0; i < hdev->num_tqps; i++) {
1453                 /* Ring disable */
1454                 queue_id = hclgevf_get_queue_id(handle->kinfo.tqp[i]);
1455                 if (queue_id < 0) {
1456                         dev_warn(&hdev->pdev->dev,
1457                                  "Get invalid queue id, ignore it\n");
1458                         continue;
1459                 }
1460
1461                 hclgevf_tqp_enable(hdev, queue_id, 0, false);
1462         }
1463
1464         /* reset tqp stats */
1465         hclgevf_reset_tqp_stats(handle);
1466         del_timer_sync(&hdev->service_timer);
1467         cancel_work_sync(&hdev->service_task);
1468         clear_bit(HCLGEVF_STATE_SERVICE_SCHED, &hdev->state);
1469         hclgevf_update_link_status(hdev, 0);
1470 }
1471
1472 static void hclgevf_state_init(struct hclgevf_dev *hdev)
1473 {
1474         /* if this is on going reset then skip this initialization */
1475         if (hclgevf_dev_ongoing_reset(hdev))
1476                 return;
1477
1478         /* setup tasks for the MBX */
1479         INIT_WORK(&hdev->mbx_service_task, hclgevf_mailbox_service_task);
1480         clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state);
1481         clear_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state);
1482
1483         /* setup tasks for service timer */
1484         timer_setup(&hdev->service_timer, hclgevf_service_timer, 0);
1485
1486         INIT_WORK(&hdev->service_task, hclgevf_service_task);
1487         clear_bit(HCLGEVF_STATE_SERVICE_SCHED, &hdev->state);
1488
1489         INIT_WORK(&hdev->rst_service_task, hclgevf_reset_service_task);
1490
1491         mutex_init(&hdev->mbx_resp.mbx_mutex);
1492
1493         /* bring the device down */
1494         set_bit(HCLGEVF_STATE_DOWN, &hdev->state);
1495 }
1496
1497 static void hclgevf_state_uninit(struct hclgevf_dev *hdev)
1498 {
1499         set_bit(HCLGEVF_STATE_DOWN, &hdev->state);
1500
1501         if (hdev->service_timer.function)
1502                 del_timer_sync(&hdev->service_timer);
1503         if (hdev->service_task.func)
1504                 cancel_work_sync(&hdev->service_task);
1505         if (hdev->mbx_service_task.func)
1506                 cancel_work_sync(&hdev->mbx_service_task);
1507         if (hdev->rst_service_task.func)
1508                 cancel_work_sync(&hdev->rst_service_task);
1509
1510         mutex_destroy(&hdev->mbx_resp.mbx_mutex);
1511 }
1512
1513 static int hclgevf_init_msi(struct hclgevf_dev *hdev)
1514 {
1515         struct pci_dev *pdev = hdev->pdev;
1516         int vectors;
1517         int i;
1518
1519         /* if this is on going reset then skip this initialization */
1520         if (hclgevf_dev_ongoing_reset(hdev))
1521                 return 0;
1522
1523         hdev->num_msi = HCLGEVF_MAX_VF_VECTOR_NUM;
1524
1525         vectors = pci_alloc_irq_vectors(pdev, 1, hdev->num_msi,
1526                                         PCI_IRQ_MSI | PCI_IRQ_MSIX);
1527         if (vectors < 0) {
1528                 dev_err(&pdev->dev,
1529                         "failed(%d) to allocate MSI/MSI-X vectors\n",
1530                         vectors);
1531                 return vectors;
1532         }
1533         if (vectors < hdev->num_msi)
1534                 dev_warn(&hdev->pdev->dev,
1535                          "requested %d MSI/MSI-X, but allocated %d MSI/MSI-X\n",
1536                          hdev->num_msi, vectors);
1537
1538         hdev->num_msi = vectors;
1539         hdev->num_msi_left = vectors;
1540         hdev->base_msi_vector = pdev->irq;
1541
1542         hdev->vector_status = devm_kcalloc(&pdev->dev, hdev->num_msi,
1543                                            sizeof(u16), GFP_KERNEL);
1544         if (!hdev->vector_status) {
1545                 pci_free_irq_vectors(pdev);
1546                 return -ENOMEM;
1547         }
1548
1549         for (i = 0; i < hdev->num_msi; i++)
1550                 hdev->vector_status[i] = HCLGEVF_INVALID_VPORT;
1551
1552         hdev->vector_irq = devm_kcalloc(&pdev->dev, hdev->num_msi,
1553                                         sizeof(int), GFP_KERNEL);
1554         if (!hdev->vector_irq) {
1555                 pci_free_irq_vectors(pdev);
1556                 return -ENOMEM;
1557         }
1558
1559         return 0;
1560 }
1561
1562 static void hclgevf_uninit_msi(struct hclgevf_dev *hdev)
1563 {
1564         struct pci_dev *pdev = hdev->pdev;
1565
1566         pci_free_irq_vectors(pdev);
1567 }
1568
1569 static int hclgevf_misc_irq_init(struct hclgevf_dev *hdev)
1570 {
1571         int ret = 0;
1572
1573         /* if this is on going reset then skip this initialization */
1574         if (hclgevf_dev_ongoing_reset(hdev))
1575                 return 0;
1576
1577         hclgevf_get_misc_vector(hdev);
1578
1579         ret = request_irq(hdev->misc_vector.vector_irq, hclgevf_misc_irq_handle,
1580                           0, "hclgevf_cmd", hdev);
1581         if (ret) {
1582                 dev_err(&hdev->pdev->dev, "VF failed to request misc irq(%d)\n",
1583                         hdev->misc_vector.vector_irq);
1584                 return ret;
1585         }
1586
1587         hclgevf_clear_event_cause(hdev, 0);
1588
1589         /* enable misc. vector(vector 0) */
1590         hclgevf_enable_vector(&hdev->misc_vector, true);
1591
1592         return ret;
1593 }
1594
1595 static void hclgevf_misc_irq_uninit(struct hclgevf_dev *hdev)
1596 {
1597         /* disable misc vector(vector 0) */
1598         hclgevf_enable_vector(&hdev->misc_vector, false);
1599         synchronize_irq(hdev->misc_vector.vector_irq);
1600         free_irq(hdev->misc_vector.vector_irq, hdev);
1601         hclgevf_free_vector(hdev, 0);
1602 }
1603
1604 static int hclgevf_init_client_instance(struct hnae3_client *client,
1605                                         struct hnae3_ae_dev *ae_dev)
1606 {
1607         struct hclgevf_dev *hdev = ae_dev->priv;
1608         int ret;
1609
1610         switch (client->type) {
1611         case HNAE3_CLIENT_KNIC:
1612                 hdev->nic_client = client;
1613                 hdev->nic.client = client;
1614
1615                 ret = client->ops->init_instance(&hdev->nic);
1616                 if (ret)
1617                         return ret;
1618
1619                 if (hdev->roce_client && hnae3_dev_roce_supported(hdev)) {
1620                         struct hnae3_client *rc = hdev->roce_client;
1621
1622                         ret = hclgevf_init_roce_base_info(hdev);
1623                         if (ret)
1624                                 return ret;
1625                         ret = rc->ops->init_instance(&hdev->roce);
1626                         if (ret)
1627                                 return ret;
1628                 }
1629                 break;
1630         case HNAE3_CLIENT_UNIC:
1631                 hdev->nic_client = client;
1632                 hdev->nic.client = client;
1633
1634                 ret = client->ops->init_instance(&hdev->nic);
1635                 if (ret)
1636                         return ret;
1637                 break;
1638         case HNAE3_CLIENT_ROCE:
1639                 if (hnae3_dev_roce_supported(hdev)) {
1640                         hdev->roce_client = client;
1641                         hdev->roce.client = client;
1642                 }
1643
1644                 if (hdev->roce_client && hdev->nic_client) {
1645                         ret = hclgevf_init_roce_base_info(hdev);
1646                         if (ret)
1647                                 return ret;
1648
1649                         ret = client->ops->init_instance(&hdev->roce);
1650                         if (ret)
1651                                 return ret;
1652                 }
1653         }
1654
1655         return 0;
1656 }
1657
1658 static void hclgevf_uninit_client_instance(struct hnae3_client *client,
1659                                            struct hnae3_ae_dev *ae_dev)
1660 {
1661         struct hclgevf_dev *hdev = ae_dev->priv;
1662
1663         /* un-init roce, if it exists */
1664         if (hdev->roce_client)
1665                 hdev->roce_client->ops->uninit_instance(&hdev->roce, 0);
1666
1667         /* un-init nic/unic, if this was not called by roce client */
1668         if ((client->ops->uninit_instance) &&
1669             (client->type != HNAE3_CLIENT_ROCE))
1670                 client->ops->uninit_instance(&hdev->nic, 0);
1671 }
1672
1673 static int hclgevf_pci_init(struct hclgevf_dev *hdev)
1674 {
1675         struct pci_dev *pdev = hdev->pdev;
1676         struct hclgevf_hw *hw;
1677         int ret;
1678
1679         /* check if we need to skip initialization of pci. This will happen if
1680          * device is undergoing VF reset. Otherwise, we would need to
1681          * re-initialize pci interface again i.e. when device is not going
1682          * through *any* reset or actually undergoing full reset.
1683          */
1684         if (hclgevf_dev_ongoing_reset(hdev))
1685                 return 0;
1686
1687         ret = pci_enable_device(pdev);
1688         if (ret) {
1689                 dev_err(&pdev->dev, "failed to enable PCI device\n");
1690                 return ret;
1691         }
1692
1693         ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
1694         if (ret) {
1695                 dev_err(&pdev->dev, "can't set consistent PCI DMA, exiting");
1696                 goto err_disable_device;
1697         }
1698
1699         ret = pci_request_regions(pdev, HCLGEVF_DRIVER_NAME);
1700         if (ret) {
1701                 dev_err(&pdev->dev, "PCI request regions failed %d\n", ret);
1702                 goto err_disable_device;
1703         }
1704
1705         pci_set_master(pdev);
1706         hw = &hdev->hw;
1707         hw->hdev = hdev;
1708         hw->io_base = pci_iomap(pdev, 2, 0);
1709         if (!hw->io_base) {
1710                 dev_err(&pdev->dev, "can't map configuration register space\n");
1711                 ret = -ENOMEM;
1712                 goto err_clr_master;
1713         }
1714
1715         return 0;
1716
1717 err_clr_master:
1718         pci_clear_master(pdev);
1719         pci_release_regions(pdev);
1720 err_disable_device:
1721         pci_disable_device(pdev);
1722
1723         return ret;
1724 }
1725
1726 static void hclgevf_pci_uninit(struct hclgevf_dev *hdev)
1727 {
1728         struct pci_dev *pdev = hdev->pdev;
1729
1730         pci_iounmap(pdev, hdev->hw.io_base);
1731         pci_clear_master(pdev);
1732         pci_release_regions(pdev);
1733         pci_disable_device(pdev);
1734 }
1735
1736 static int hclgevf_init_hdev(struct hclgevf_dev *hdev)
1737 {
1738         struct pci_dev *pdev = hdev->pdev;
1739         int ret;
1740
1741         /* check if device is on-going full reset(i.e. pcie as well) */
1742         if (hclgevf_dev_ongoing_full_reset(hdev)) {
1743                 dev_warn(&pdev->dev, "device is going full reset\n");
1744                 hclgevf_uninit_hdev(hdev);
1745         }
1746
1747         ret = hclgevf_pci_init(hdev);
1748         if (ret) {
1749                 dev_err(&pdev->dev, "PCI initialization failed\n");
1750                 return ret;
1751         }
1752
1753         ret = hclgevf_init_msi(hdev);
1754         if (ret) {
1755                 dev_err(&pdev->dev, "failed(%d) to init MSI/MSI-X\n", ret);
1756                 goto err_irq_init;
1757         }
1758
1759         hclgevf_state_init(hdev);
1760
1761         ret = hclgevf_cmd_init(hdev);
1762         if (ret)
1763                 goto err_cmd_init;
1764
1765         ret = hclgevf_misc_irq_init(hdev);
1766         if (ret) {
1767                 dev_err(&pdev->dev, "failed(%d) to init Misc IRQ(vector0)\n",
1768                         ret);
1769                 goto err_misc_irq_init;
1770         }
1771
1772         ret = hclgevf_configure(hdev);
1773         if (ret) {
1774                 dev_err(&pdev->dev, "failed(%d) to fetch configuration\n", ret);
1775                 goto err_config;
1776         }
1777
1778         ret = hclgevf_alloc_tqps(hdev);
1779         if (ret) {
1780                 dev_err(&pdev->dev, "failed(%d) to allocate TQPs\n", ret);
1781                 goto err_config;
1782         }
1783
1784         ret = hclgevf_set_handle_info(hdev);
1785         if (ret) {
1786                 dev_err(&pdev->dev, "failed(%d) to set handle info\n", ret);
1787                 goto err_config;
1788         }
1789
1790         /* Initialize mta type for this VF */
1791         ret = hclgevf_cfg_func_mta_type(hdev);
1792         if (ret) {
1793                 dev_err(&hdev->pdev->dev,
1794                         "failed(%d) to initialize MTA type\n", ret);
1795                 goto err_config;
1796         }
1797
1798         /* Initialize RSS for this VF */
1799         ret = hclgevf_rss_init_hw(hdev);
1800         if (ret) {
1801                 dev_err(&hdev->pdev->dev,
1802                         "failed(%d) to initialize RSS\n", ret);
1803                 goto err_config;
1804         }
1805
1806         ret = hclgevf_init_vlan_config(hdev);
1807         if (ret) {
1808                 dev_err(&hdev->pdev->dev,
1809                         "failed(%d) to initialize VLAN config\n", ret);
1810                 goto err_config;
1811         }
1812
1813         pr_info("finished initializing %s driver\n", HCLGEVF_DRIVER_NAME);
1814
1815         return 0;
1816
1817 err_config:
1818         hclgevf_misc_irq_uninit(hdev);
1819 err_misc_irq_init:
1820         hclgevf_cmd_uninit(hdev);
1821 err_cmd_init:
1822         hclgevf_state_uninit(hdev);
1823         hclgevf_uninit_msi(hdev);
1824 err_irq_init:
1825         hclgevf_pci_uninit(hdev);
1826         return ret;
1827 }
1828
1829 static void hclgevf_uninit_hdev(struct hclgevf_dev *hdev)
1830 {
1831         hclgevf_state_uninit(hdev);
1832         hclgevf_misc_irq_uninit(hdev);
1833         hclgevf_cmd_uninit(hdev);
1834         hclgevf_uninit_msi(hdev);
1835         hclgevf_pci_uninit(hdev);
1836 }
1837
1838 static int hclgevf_init_ae_dev(struct hnae3_ae_dev *ae_dev)
1839 {
1840         struct pci_dev *pdev = ae_dev->pdev;
1841         int ret;
1842
1843         ret = hclgevf_alloc_hdev(ae_dev);
1844         if (ret) {
1845                 dev_err(&pdev->dev, "hclge device allocation failed\n");
1846                 return ret;
1847         }
1848
1849         ret = hclgevf_init_hdev(ae_dev->priv);
1850         if (ret)
1851                 dev_err(&pdev->dev, "hclge device initialization failed\n");
1852
1853         return ret;
1854 }
1855
1856 static void hclgevf_uninit_ae_dev(struct hnae3_ae_dev *ae_dev)
1857 {
1858         struct hclgevf_dev *hdev = ae_dev->priv;
1859
1860         hclgevf_uninit_hdev(hdev);
1861         ae_dev->priv = NULL;
1862 }
1863
1864 static u32 hclgevf_get_max_channels(struct hclgevf_dev *hdev)
1865 {
1866         struct hnae3_handle *nic = &hdev->nic;
1867         struct hnae3_knic_private_info *kinfo = &nic->kinfo;
1868
1869         return min_t(u32, hdev->rss_size_max * kinfo->num_tc, hdev->num_tqps);
1870 }
1871
1872 /**
1873  * hclgevf_get_channels - Get the current channels enabled and max supported.
1874  * @handle: hardware information for network interface
1875  * @ch: ethtool channels structure
1876  *
1877  * We don't support separate tx and rx queues as channels. The other count
1878  * represents how many queues are being used for control. max_combined counts
1879  * how many queue pairs we can support. They may not be mapped 1 to 1 with
1880  * q_vectors since we support a lot more queue pairs than q_vectors.
1881  **/
1882 static void hclgevf_get_channels(struct hnae3_handle *handle,
1883                                  struct ethtool_channels *ch)
1884 {
1885         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
1886
1887         ch->max_combined = hclgevf_get_max_channels(hdev);
1888         ch->other_count = 0;
1889         ch->max_other = 0;
1890         ch->combined_count = hdev->num_tqps;
1891 }
1892
1893 static void hclgevf_get_tqps_and_rss_info(struct hnae3_handle *handle,
1894                                           u16 *free_tqps, u16 *max_rss_size)
1895 {
1896         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
1897
1898         *free_tqps = 0;
1899         *max_rss_size = hdev->rss_size_max;
1900 }
1901
1902 static int hclgevf_get_status(struct hnae3_handle *handle)
1903 {
1904         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
1905
1906         return hdev->hw.mac.link;
1907 }
1908
1909 static void hclgevf_get_ksettings_an_result(struct hnae3_handle *handle,
1910                                             u8 *auto_neg, u32 *speed,
1911                                             u8 *duplex)
1912 {
1913         struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
1914
1915         if (speed)
1916                 *speed = hdev->hw.mac.speed;
1917         if (duplex)
1918                 *duplex = hdev->hw.mac.duplex;
1919         if (auto_neg)
1920                 *auto_neg = AUTONEG_DISABLE;
1921 }
1922
1923 void hclgevf_update_speed_duplex(struct hclgevf_dev *hdev, u32 speed,
1924                                  u8 duplex)
1925 {
1926         hdev->hw.mac.speed = speed;
1927         hdev->hw.mac.duplex = duplex;
1928 }
1929
1930 static const struct hnae3_ae_ops hclgevf_ops = {
1931         .init_ae_dev = hclgevf_init_ae_dev,
1932         .uninit_ae_dev = hclgevf_uninit_ae_dev,
1933         .init_client_instance = hclgevf_init_client_instance,
1934         .uninit_client_instance = hclgevf_uninit_client_instance,
1935         .start = hclgevf_ae_start,
1936         .stop = hclgevf_ae_stop,
1937         .map_ring_to_vector = hclgevf_map_ring_to_vector,
1938         .unmap_ring_from_vector = hclgevf_unmap_ring_from_vector,
1939         .get_vector = hclgevf_get_vector,
1940         .put_vector = hclgevf_put_vector,
1941         .reset_queue = hclgevf_reset_tqp,
1942         .set_promisc_mode = hclgevf_set_promisc_mode,
1943         .get_mac_addr = hclgevf_get_mac_addr,
1944         .set_mac_addr = hclgevf_set_mac_addr,
1945         .add_uc_addr = hclgevf_add_uc_addr,
1946         .rm_uc_addr = hclgevf_rm_uc_addr,
1947         .add_mc_addr = hclgevf_add_mc_addr,
1948         .rm_mc_addr = hclgevf_rm_mc_addr,
1949         .update_mta_status = hclgevf_update_mta_status,
1950         .get_stats = hclgevf_get_stats,
1951         .update_stats = hclgevf_update_stats,
1952         .get_strings = hclgevf_get_strings,
1953         .get_sset_count = hclgevf_get_sset_count,
1954         .get_rss_key_size = hclgevf_get_rss_key_size,
1955         .get_rss_indir_size = hclgevf_get_rss_indir_size,
1956         .get_rss = hclgevf_get_rss,
1957         .set_rss = hclgevf_set_rss,
1958         .get_tc_size = hclgevf_get_tc_size,
1959         .get_fw_version = hclgevf_get_fw_version,
1960         .set_vlan_filter = hclgevf_set_vlan_filter,
1961         .enable_hw_strip_rxvtag = hclgevf_en_hw_strip_rxvtag,
1962         .reset_event = hclgevf_reset_event,
1963         .get_channels = hclgevf_get_channels,
1964         .get_tqps_and_rss_info = hclgevf_get_tqps_and_rss_info,
1965         .get_status = hclgevf_get_status,
1966         .get_ksettings_an_result = hclgevf_get_ksettings_an_result,
1967 };
1968
1969 static struct hnae3_ae_algo ae_algovf = {
1970         .ops = &hclgevf_ops,
1971         .pdev_id_table = ae_algovf_pci_tbl,
1972 };
1973
1974 static int hclgevf_init(void)
1975 {
1976         pr_info("%s is initializing\n", HCLGEVF_NAME);
1977
1978         hnae3_register_ae_algo(&ae_algovf);
1979
1980         return 0;
1981 }
1982
1983 static void hclgevf_exit(void)
1984 {
1985         hnae3_unregister_ae_algo(&ae_algovf);
1986 }
1987 module_init(hclgevf_init);
1988 module_exit(hclgevf_exit);
1989
1990 MODULE_LICENSE("GPL");
1991 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
1992 MODULE_DESCRIPTION("HCLGEVF Driver");
1993 MODULE_VERSION(HCLGEVF_MOD_VERSION);