drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #include <linux/dma-mapping.h>
   5 #include <linux/etherdevice.h>
   6 #include <linux/interrupt.h>
   7 #include <linux/if_vlan.h>
   8 #include <linux/ip.h>
   9 #include <linux/ipv6.h>
  10 #include <linux/module.h>
  11 #include <linux/pci.h>
  12 #include <linux/aer.h>
  13 #include <linux/skbuff.h>
  14 #include <linux/sctp.h>
  15 #include <linux/vermagic.h>
  16 #include <net/gre.h>
  17 #include <net/pkt_cls.h>
  18 #include <net/tcp.h>
  19 #include <net/vxlan.h>
  20
  21 #include "hnae3.h"
  22 #include "hns3_enet.h"
  23
  24 #define hns3_set_field(origin, shift, val)      ((origin) |= ((val) << (shift)))
  25 #define hns3_tx_bd_count(S)     DIV_ROUND_UP(S, HNS3_MAX_BD_SIZE)
  26
  27 static void hns3_clear_all_ring(struct hnae3_handle *h);
  28 static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h);
  29 static void hns3_remove_hw_addr(struct net_device *netdev);
  30
  31 static const char hns3_driver_name[] = "hns3";
  32 const char hns3_driver_version[] = VERMAGIC_STRING;
  33 static const char hns3_driver_string[] =
  34                         "Hisilicon Ethernet Network Driver for Hip08 Family";
  35 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
  36 static struct hnae3_client client;
  37
  38 /* hns3_pci_tbl - PCI Device ID Table
  39  *
  40  * Last entry must be all 0s
  41  *
  42  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  43  *   Class, Class Mask, private data (not used) }
  44  */
  45 static const struct pci_device_id hns3_pci_tbl[] = {
  46         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
  47         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
  48         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
  49          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  50         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
  51          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  52         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
  53          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  54         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
  55          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  56         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
  57          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  58         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
  59         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF),
  60          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  61         /* required last entry */
  62         {0, }
  63 };
  64 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
  65
  66 static irqreturn_t hns3_irq_handle(int irq, void *vector)
  67 {
  68         struct hns3_enet_tqp_vector *tqp_vector = vector;
  69
  70         napi_schedule(&tqp_vector->napi);
  71
  72         return IRQ_HANDLED;
  73 }
  74
  75 /* This callback function is used to set affinity changes to the irq affinity
  76  * masks when the irq_set_affinity_notifier function is used.
  77  */
  78 static void hns3_nic_irq_affinity_notify(struct irq_affinity_notify *notify,
  79                                          const cpumask_t *mask)
  80 {
  81         struct hns3_enet_tqp_vector *tqp_vectors =
  82                 container_of(notify, struct hns3_enet_tqp_vector,
  83                              affinity_notify);
  84
  85         tqp_vectors->affinity_mask = *mask;
  86 }
  87
  88 static void hns3_nic_irq_affinity_release(struct kref *ref)
  89 {
  90 }
  91
  92 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
  93 {
  94         struct hns3_enet_tqp_vector *tqp_vectors;
  95         unsigned int i;
  96
  97         for (i = 0; i < priv->vector_num; i++) {
  98                 tqp_vectors = &priv->tqp_vector[i];
  99
 100                 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
 101                         continue;
 102
 103                 /* clear the affinity notifier and affinity mask */
 104                 irq_set_affinity_notifier(tqp_vectors->vector_irq, NULL);
 105                 irq_set_affinity_hint(tqp_vectors->vector_irq, NULL);
 106
 107                 /* release the irq resource */
 108                 free_irq(tqp_vectors->vector_irq, tqp_vectors);
 109                 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
 110         }
 111 }
 112
 113 static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
 114 {
 115         struct hns3_enet_tqp_vector *tqp_vectors;
 116         int txrx_int_idx = 0;
 117         int rx_int_idx = 0;
 118         int tx_int_idx = 0;
 119         unsigned int i;
 120         int ret;
 121
 122         for (i = 0; i < priv->vector_num; i++) {
 123                 tqp_vectors = &priv->tqp_vector[i];
 124
 125                 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
 126                         continue;
 127
 128                 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
 129                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 130                                  "%s-%s-%d", priv->netdev->name, "TxRx",
 131                                  txrx_int_idx++);
 132                         txrx_int_idx++;
 133                 } else if (tqp_vectors->rx_group.ring) {
 134                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 135                                  "%s-%s-%d", priv->netdev->name, "Rx",
 136                                  rx_int_idx++);
 137                 } else if (tqp_vectors->tx_group.ring) {
 138                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 139                                  "%s-%s-%d", priv->netdev->name, "Tx",
 140                                  tx_int_idx++);
 141                 } else {
 142                         /* Skip this unused q_vector */
 143                         continue;
 144                 }
 145
 146                 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
 147
 148                 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
 149                                   tqp_vectors->name,
 150                                        tqp_vectors);
 151                 if (ret) {
 152                         netdev_err(priv->netdev, "request irq(%d) fail\n",
 153                                    tqp_vectors->vector_irq);
 154                         return ret;
 155                 }
 156
 157                 tqp_vectors->affinity_notify.notify =
 158                                         hns3_nic_irq_affinity_notify;
 159                 tqp_vectors->affinity_notify.release =
 160                                         hns3_nic_irq_affinity_release;
 161                 irq_set_affinity_notifier(tqp_vectors->vector_irq,
 162                                           &tqp_vectors->affinity_notify);
 163                 irq_set_affinity_hint(tqp_vectors->vector_irq,
 164                                       &tqp_vectors->affinity_mask);
 165
 166                 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
 167         }
 168
 169         return 0;
 170 }
 171
 172 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
 173                                  u32 mask_en)
 174 {
 175         writel(mask_en, tqp_vector->mask_addr);
 176 }
 177
 178 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
 179 {
 180         napi_enable(&tqp_vector->napi);
 181
 182         /* enable vector */
 183         hns3_mask_vector_irq(tqp_vector, 1);
 184 }
 185
 186 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
 187 {
 188         /* disable vector */
 189         hns3_mask_vector_irq(tqp_vector, 0);
 190
 191         disable_irq(tqp_vector->vector_irq);
 192         napi_disable(&tqp_vector->napi);
 193 }
 194
 195 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
 196                                  u32 rl_value)
 197 {
 198         u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
 199
 200         /* this defines the configuration for RL (Interrupt Rate Limiter).
 201          * Rl defines rate of interrupts i.e. number of interrupts-per-second
 202          * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
 203          */
 204
 205         if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
 206             !tqp_vector->rx_group.coal.gl_adapt_enable)
 207                 /* According to the hardware, the range of rl_reg is
 208                  * 0-59 and the unit is 4.
 209                  */
 210                 rl_reg |=  HNS3_INT_RL_ENABLE_MASK;
 211
 212         writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
 213 }
 214
 215 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 216                                     u32 gl_value)
 217 {
 218         u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 219
 220         writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
 221 }
 222
 223 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 224                                     u32 gl_value)
 225 {
 226         u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 227
 228         writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
 229 }
 230
 231 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
 232                                    struct hns3_nic_priv *priv)
 233 {
 234         /* initialize the configuration for interrupt coalescing.
 235          * 1. GL (Interrupt Gap Limiter)
 236          * 2. RL (Interrupt Rate Limiter)
 237          */
 238
 239         /* Default: enable interrupt coalescing self-adaptive and GL */
 240         tqp_vector->tx_group.coal.gl_adapt_enable = 1;
 241         tqp_vector->rx_group.coal.gl_adapt_enable = 1;
 242
 243         tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
 244         tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
 245
 246         tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
 247         tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
 248 }
 249
 250 static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
 251                                       struct hns3_nic_priv *priv)
 252 {
 253         struct hnae3_handle *h = priv->ae_handle;
 254
 255         hns3_set_vector_coalesce_tx_gl(tqp_vector,
 256                                        tqp_vector->tx_group.coal.int_gl);
 257         hns3_set_vector_coalesce_rx_gl(tqp_vector,
 258                                        tqp_vector->rx_group.coal.int_gl);
 259         hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
 260 }
 261
 262 static int hns3_nic_set_real_num_queue(struct net_device *netdev)
 263 {
 264         struct hnae3_handle *h = hns3_get_handle(netdev);
 265         struct hnae3_knic_private_info *kinfo = &h->kinfo;
 266         unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
 267         int i, ret;
 268
 269         if (kinfo->num_tc <= 1) {
 270                 netdev_reset_tc(netdev);
 271         } else {
 272                 ret = netdev_set_num_tc(netdev, kinfo->num_tc);
 273                 if (ret) {
 274                         netdev_err(netdev,
 275                                    "netdev_set_num_tc fail, ret=%d!\n", ret);
 276                         return ret;
 277                 }
 278
 279                 for (i = 0; i < HNAE3_MAX_TC; i++) {
 280                         if (!kinfo->tc_info[i].enable)
 281                                 continue;
 282
 283                         netdev_set_tc_queue(netdev,
 284                                             kinfo->tc_info[i].tc,
 285                                             kinfo->tc_info[i].tqp_count,
 286                                             kinfo->tc_info[i].tqp_offset);
 287                 }
 288         }
 289
 290         ret = netif_set_real_num_tx_queues(netdev, queue_size);
 291         if (ret) {
 292                 netdev_err(netdev,
 293                            "netif_set_real_num_tx_queues fail, ret=%d!\n",
 294                            ret);
 295                 return ret;
 296         }
 297
 298         ret = netif_set_real_num_rx_queues(netdev, queue_size);
 299         if (ret) {
 300                 netdev_err(netdev,
 301                            "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
 302                 return ret;
 303         }
 304
 305         return 0;
 306 }
 307
 308 static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
 309 {
 310         u16 alloc_tqps, max_rss_size, rss_size;
 311
 312         h->ae_algo->ops->get_tqps_and_rss_info(h, &alloc_tqps, &max_rss_size);
 313         rss_size = alloc_tqps / h->kinfo.num_tc;
 314
 315         return min_t(u16, rss_size, max_rss_size);
 316 }
 317
 318 static void hns3_tqp_enable(struct hnae3_queue *tqp)
 319 {
 320         u32 rcb_reg;
 321
 322         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 323         rcb_reg |= BIT(HNS3_RING_EN_B);
 324         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 325 }
 326
 327 static void hns3_tqp_disable(struct hnae3_queue *tqp)
 328 {
 329         u32 rcb_reg;
 330
 331         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 332         rcb_reg &= ~BIT(HNS3_RING_EN_B);
 333         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 334 }
 335
 336 static int hns3_nic_net_up(struct net_device *netdev)
 337 {
 338         struct hns3_nic_priv *priv = netdev_priv(netdev);
 339         struct hnae3_handle *h = priv->ae_handle;
 340         int i, j;
 341         int ret;
 342
 343         ret = hns3_nic_reset_all_ring(h);
 344         if (ret)
 345                 return ret;
 346
 347         /* get irq resource for all vectors */
 348         ret = hns3_nic_init_irq(priv);
 349         if (ret) {
 350                 netdev_err(netdev, "hns init irq failed! ret=%d\n", ret);
 351                 return ret;
 352         }
 353
 354         clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 355
 356         /* enable the vectors */
 357         for (i = 0; i < priv->vector_num; i++)
 358                 hns3_vector_enable(&priv->tqp_vector[i]);
 359
 360         /* enable rcb */
 361         for (j = 0; j < h->kinfo.num_tqps; j++)
 362                 hns3_tqp_enable(h->kinfo.tqp[j]);
 363
 364         /* start the ae_dev */
 365         ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
 366         if (ret)
 367                 goto out_start_err;
 368
 369         return 0;
 370
 371 out_start_err:
 372         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 373         while (j--)
 374                 hns3_tqp_disable(h->kinfo.tqp[j]);
 375
 376         for (j = i - 1; j >= 0; j--)
 377                 hns3_vector_disable(&priv->tqp_vector[j]);
 378
 379         hns3_nic_uninit_irq(priv);
 380
 381         return ret;
 382 }
 383
 384 static void hns3_config_xps(struct hns3_nic_priv *priv)
 385 {
 386         int i;
 387
 388         for (i = 0; i < priv->vector_num; i++) {
 389                 struct hns3_enet_tqp_vector *tqp_vector = &priv->tqp_vector[i];
 390                 struct hns3_enet_ring *ring = tqp_vector->tx_group.ring;
 391
 392                 while (ring) {
 393                         int ret;
 394
 395                         ret = netif_set_xps_queue(priv->netdev,
 396                                                   &tqp_vector->affinity_mask,
 397                                                   ring->tqp->tqp_index);
 398                         if (ret)
 399                                 netdev_warn(priv->netdev,
 400                                             "set xps queue failed: %d", ret);
 401
 402                         ring = ring->next;
 403                 }
 404         }
 405 }
 406
 407 static int hns3_nic_net_open(struct net_device *netdev)
 408 {
 409         struct hns3_nic_priv *priv = netdev_priv(netdev);
 410         struct hnae3_handle *h = hns3_get_handle(netdev);
 411         struct hnae3_knic_private_info *kinfo;
 412         int i, ret;
 413
 414         if (hns3_nic_resetting(netdev))
 415                 return -EBUSY;
 416
 417         netif_carrier_off(netdev);
 418
 419         ret = hns3_nic_set_real_num_queue(netdev);
 420         if (ret)
 421                 return ret;
 422
 423         ret = hns3_nic_net_up(netdev);
 424         if (ret) {
 425                 netdev_err(netdev,
 426                            "hns net up fail, ret=%d!\n", ret);
 427                 return ret;
 428         }
 429
 430         kinfo = &h->kinfo;
 431         for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) {
 432                 netdev_set_prio_tc_map(netdev, i,
 433                                        kinfo->prio_tc[i]);
 434         }
 435
 436         if (h->ae_algo->ops->set_timer_task)
 437                 h->ae_algo->ops->set_timer_task(priv->ae_handle, true);
 438
 439         hns3_config_xps(priv);
 440         return 0;
 441 }
 442
 443 static void hns3_nic_net_down(struct net_device *netdev)
 444 {
 445         struct hns3_nic_priv *priv = netdev_priv(netdev);
 446         struct hnae3_handle *h = hns3_get_handle(netdev);
 447         const struct hnae3_ae_ops *ops;
 448         int i;
 449
 450         /* disable vectors */
 451         for (i = 0; i < priv->vector_num; i++)
 452                 hns3_vector_disable(&priv->tqp_vector[i]);
 453
 454         /* disable rcb */
 455         for (i = 0; i < h->kinfo.num_tqps; i++)
 456                 hns3_tqp_disable(h->kinfo.tqp[i]);
 457
 458         /* stop ae_dev */
 459         ops = priv->ae_handle->ae_algo->ops;
 460         if (ops->stop)
 461                 ops->stop(priv->ae_handle);
 462
 463         /* free irq resources */
 464         hns3_nic_uninit_irq(priv);
 465
 466         hns3_clear_all_ring(priv->ae_handle);
 467 }
 468
 469 static int hns3_nic_net_stop(struct net_device *netdev)
 470 {
 471         struct hns3_nic_priv *priv = netdev_priv(netdev);
 472         struct hnae3_handle *h = hns3_get_handle(netdev);
 473
 474         if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
 475                 return 0;
 476
 477         if (h->ae_algo->ops->set_timer_task)
 478                 h->ae_algo->ops->set_timer_task(priv->ae_handle, false);
 479
 480         netif_tx_stop_all_queues(netdev);
 481         netif_carrier_off(netdev);
 482
 483         hns3_nic_net_down(netdev);
 484
 485         return 0;
 486 }
 487
 488 static int hns3_nic_uc_sync(struct net_device *netdev,
 489                             const unsigned char *addr)
 490 {
 491         struct hnae3_handle *h = hns3_get_handle(netdev);
 492
 493         if (h->ae_algo->ops->add_uc_addr)
 494                 return h->ae_algo->ops->add_uc_addr(h, addr);
 495
 496         return 0;
 497 }
 498
 499 static int hns3_nic_uc_unsync(struct net_device *netdev,
 500                               const unsigned char *addr)
 501 {
 502         struct hnae3_handle *h = hns3_get_handle(netdev);
 503
 504         if (h->ae_algo->ops->rm_uc_addr)
 505                 return h->ae_algo->ops->rm_uc_addr(h, addr);
 506
 507         return 0;
 508 }
 509
 510 static int hns3_nic_mc_sync(struct net_device *netdev,
 511                             const unsigned char *addr)
 512 {
 513         struct hnae3_handle *h = hns3_get_handle(netdev);
 514
 515         if (h->ae_algo->ops->add_mc_addr)
 516                 return h->ae_algo->ops->add_mc_addr(h, addr);
 517
 518         return 0;
 519 }
 520
 521 static int hns3_nic_mc_unsync(struct net_device *netdev,
 522                               const unsigned char *addr)
 523 {
 524         struct hnae3_handle *h = hns3_get_handle(netdev);
 525
 526         if (h->ae_algo->ops->rm_mc_addr)
 527                 return h->ae_algo->ops->rm_mc_addr(h, addr);
 528
 529         return 0;
 530 }
 531
 532 static u8 hns3_get_netdev_flags(struct net_device *netdev)
 533 {
 534         u8 flags = 0;
 535
 536         if (netdev->flags & IFF_PROMISC) {
 537                 flags = HNAE3_USER_UPE | HNAE3_USER_MPE | HNAE3_BPE;
 538         } else {
 539                 flags |= HNAE3_VLAN_FLTR;
 540                 if (netdev->flags & IFF_ALLMULTI)
 541                         flags |= HNAE3_USER_MPE;
 542         }
 543
 544         return flags;
 545 }
 546
 547 static void hns3_nic_set_rx_mode(struct net_device *netdev)
 548 {
 549         struct hnae3_handle *h = hns3_get_handle(netdev);
 550         u8 new_flags;
 551         int ret;
 552
 553         new_flags = hns3_get_netdev_flags(netdev);
 554
 555         ret = __dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync);
 556         if (ret) {
 557                 netdev_err(netdev, "sync uc address fail\n");
 558                 if (ret == -ENOSPC)
 559                         new_flags |= HNAE3_OVERFLOW_UPE;
 560         }
 561
 562         if (netdev->flags & IFF_MULTICAST) {
 563                 ret = __dev_mc_sync(netdev, hns3_nic_mc_sync,
 564                                     hns3_nic_mc_unsync);
 565                 if (ret) {
 566                         netdev_err(netdev, "sync mc address fail\n");
 567                         if (ret == -ENOSPC)
 568                                 new_flags |= HNAE3_OVERFLOW_MPE;
 569                 }
 570         }
 571
 572         /* User mode Promisc mode enable and vlan filtering is disabled to
 573          * let all packets in. MAC-VLAN Table overflow Promisc enabled and
 574          * vlan fitering is enabled
 575          */
 576         hns3_enable_vlan_filter(netdev, new_flags & HNAE3_VLAN_FLTR);
 577         h->netdev_flags = new_flags;
 578         hns3_update_promisc_mode(netdev, new_flags);
 579 }
 580
 581 int hns3_update_promisc_mode(struct net_device *netdev, u8 promisc_flags)
 582 {
 583         struct hns3_nic_priv *priv = netdev_priv(netdev);
 584         struct hnae3_handle *h = priv->ae_handle;
 585
 586         if (h->ae_algo->ops->set_promisc_mode) {
 587                 return h->ae_algo->ops->set_promisc_mode(h,
 588                                                 promisc_flags & HNAE3_UPE,
 589                                                 promisc_flags & HNAE3_MPE);
 590         }
 591
 592         return 0;
 593 }
 594
 595 void hns3_enable_vlan_filter(struct net_device *netdev, bool enable)
 596 {
 597         struct hns3_nic_priv *priv = netdev_priv(netdev);
 598         struct hnae3_handle *h = priv->ae_handle;
 599         bool last_state;
 600
 601         if (h->pdev->revision >= 0x21 && h->ae_algo->ops->enable_vlan_filter) {
 602                 last_state = h->netdev_flags & HNAE3_VLAN_FLTR ? true : false;
 603                 if (enable != last_state) {
 604                         netdev_info(netdev,
 605                                     "%s vlan filter\n",
 606                                     enable ? "enable" : "disable");
 607                         h->ae_algo->ops->enable_vlan_filter(h, enable);
 608                 }
 609         }
 610 }
 611
 612 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
 613                         u16 *mss, u32 *type_cs_vlan_tso)
 614 {
 615         u32 l4_offset, hdr_len;
 616         union l3_hdr_info l3;
 617         union l4_hdr_info l4;
 618         u32 l4_paylen;
 619         int ret;
 620
 621         if (!skb_is_gso(skb))
 622                 return 0;
 623
 624         ret = skb_cow_head(skb, 0);
 625         if (unlikely(ret))
 626                 return ret;
 627
 628         l3.hdr = skb_network_header(skb);
 629         l4.hdr = skb_transport_header(skb);
 630
 631         /* Software should clear the IPv4's checksum field when tso is
 632          * needed.
 633          */
 634         if (l3.v4->version == 4)
 635                 l3.v4->check = 0;
 636
 637         /* tunnel packet.*/
 638         if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
 639                                          SKB_GSO_GRE_CSUM |
 640                                          SKB_GSO_UDP_TUNNEL |
 641                                          SKB_GSO_UDP_TUNNEL_CSUM)) {
 642                 if ((!(skb_shinfo(skb)->gso_type &
 643                     SKB_GSO_PARTIAL)) &&
 644                     (skb_shinfo(skb)->gso_type &
 645                     SKB_GSO_UDP_TUNNEL_CSUM)) {
 646                         /* Software should clear the udp's checksum
 647                          * field when tso is needed.
 648                          */
 649                         l4.udp->check = 0;
 650                 }
 651                 /* reset l3&l4 pointers from outer to inner headers */
 652                 l3.hdr = skb_inner_network_header(skb);
 653                 l4.hdr = skb_inner_transport_header(skb);
 654
 655                 /* Software should clear the IPv4's checksum field when
 656                  * tso is needed.
 657                  */
 658                 if (l3.v4->version == 4)
 659                         l3.v4->check = 0;
 660         }
 661
 662         /* normal or tunnel packet*/
 663         l4_offset = l4.hdr - skb->data;
 664         hdr_len = (l4.tcp->doff << 2) + l4_offset;
 665
 666         /* remove payload length from inner pseudo checksum when tso*/
 667         l4_paylen = skb->len - l4_offset;
 668         csum_replace_by_diff(&l4.tcp->check,
 669                              (__force __wsum)htonl(l4_paylen));
 670
 671         /* find the txbd field values */
 672         *paylen = skb->len - hdr_len;
 673         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_TSO_B, 1);
 674
 675         /* get MSS for TSO */
 676         *mss = skb_shinfo(skb)->gso_size;
 677
 678         return 0;
 679 }
 680
 681 static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
 682                                 u8 *il4_proto)
 683 {
 684         union l3_hdr_info l3;
 685         unsigned char *l4_hdr;
 686         unsigned char *exthdr;
 687         u8 l4_proto_tmp;
 688         __be16 frag_off;
 689
 690         /* find outer header point */
 691         l3.hdr = skb_network_header(skb);
 692         l4_hdr = skb_transport_header(skb);
 693
 694         if (skb->protocol == htons(ETH_P_IPV6)) {
 695                 exthdr = l3.hdr + sizeof(*l3.v6);
 696                 l4_proto_tmp = l3.v6->nexthdr;
 697                 if (l4_hdr != exthdr)
 698                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 699                                          &l4_proto_tmp, &frag_off);
 700         } else if (skb->protocol == htons(ETH_P_IP)) {
 701                 l4_proto_tmp = l3.v4->protocol;
 702         } else {
 703                 return -EINVAL;
 704         }
 705
 706         *ol4_proto = l4_proto_tmp;
 707
 708         /* tunnel packet */
 709         if (!skb->encapsulation) {
 710                 *il4_proto = 0;
 711                 return 0;
 712         }
 713
 714         /* find inner header point */
 715         l3.hdr = skb_inner_network_header(skb);
 716         l4_hdr = skb_inner_transport_header(skb);
 717
 718         if (l3.v6->version == 6) {
 719                 exthdr = l3.hdr + sizeof(*l3.v6);
 720                 l4_proto_tmp = l3.v6->nexthdr;
 721                 if (l4_hdr != exthdr)
 722                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 723                                          &l4_proto_tmp, &frag_off);
 724         } else if (l3.v4->version == 4) {
 725                 l4_proto_tmp = l3.v4->protocol;
 726         }
 727
 728         *il4_proto = l4_proto_tmp;
 729
 730         return 0;
 731 }
 732
 733 static void hns3_set_l2l3l4_len(struct sk_buff *skb, u8 ol4_proto,
 734                                 u8 il4_proto, u32 *type_cs_vlan_tso,
 735                                 u32 *ol_type_vlan_len_msec)
 736 {
 737         union l3_hdr_info l3;
 738         union l4_hdr_info l4;
 739         unsigned char *l2_hdr;
 740         u8 l4_proto = ol4_proto;
 741         u32 ol2_len;
 742         u32 ol3_len;
 743         u32 ol4_len;
 744         u32 l2_len;
 745         u32 l3_len;
 746
 747         l3.hdr = skb_network_header(skb);
 748         l4.hdr = skb_transport_header(skb);
 749
 750         /* compute L2 header size for normal packet, defined in 2 Bytes */
 751         l2_len = l3.hdr - skb->data;
 752         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S, l2_len >> 1);
 753
 754         /* tunnel packet*/
 755         if (skb->encapsulation) {
 756                 /* compute OL2 header size, defined in 2 Bytes */
 757                 ol2_len = l2_len;
 758                 hns3_set_field(*ol_type_vlan_len_msec,
 759                                HNS3_TXD_L2LEN_S, ol2_len >> 1);
 760
 761                 /* compute OL3 header size, defined in 4 Bytes */
 762                 ol3_len = l4.hdr - l3.hdr;
 763                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_S,
 764                                ol3_len >> 2);
 765
 766                 /* MAC in UDP, MAC in GRE (0x6558)*/
 767                 if ((ol4_proto == IPPROTO_UDP) || (ol4_proto == IPPROTO_GRE)) {
 768                         /* switch MAC header ptr from outer to inner header.*/
 769                         l2_hdr = skb_inner_mac_header(skb);
 770
 771                         /* compute OL4 header size, defined in 4 Bytes. */
 772                         ol4_len = l2_hdr - l4.hdr;
 773                         hns3_set_field(*ol_type_vlan_len_msec,
 774                                        HNS3_TXD_L4LEN_S, ol4_len >> 2);
 775
 776                         /* switch IP header ptr from outer to inner header */
 777                         l3.hdr = skb_inner_network_header(skb);
 778
 779                         /* compute inner l2 header size, defined in 2 Bytes. */
 780                         l2_len = l3.hdr - l2_hdr;
 781                         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S,
 782                                        l2_len >> 1);
 783                 } else {
 784                         /* skb packet types not supported by hardware,
 785                          * txbd len fild doesn't be filled.
 786                          */
 787                         return;
 788                 }
 789
 790                 /* switch L4 header pointer from outer to inner */
 791                 l4.hdr = skb_inner_transport_header(skb);
 792
 793                 l4_proto = il4_proto;
 794         }
 795
 796         /* compute inner(/normal) L3 header size, defined in 4 Bytes */
 797         l3_len = l4.hdr - l3.hdr;
 798         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_S, l3_len >> 2);
 799
 800         /* compute inner(/normal) L4 header size, defined in 4 Bytes */
 801         switch (l4_proto) {
 802         case IPPROTO_TCP:
 803                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 804                                l4.tcp->doff);
 805                 break;
 806         case IPPROTO_SCTP:
 807                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 808                                (sizeof(struct sctphdr) >> 2));
 809                 break;
 810         case IPPROTO_UDP:
 811                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 812                                (sizeof(struct udphdr) >> 2));
 813                 break;
 814         default:
 815                 /* skb packet types not supported by hardware,
 816                  * txbd len fild doesn't be filled.
 817                  */
 818                 return;
 819         }
 820 }
 821
 822 /* when skb->encapsulation is 0, skb->ip_summed is CHECKSUM_PARTIAL
 823  * and it is udp packet, which has a dest port as the IANA assigned.
 824  * the hardware is expected to do the checksum offload, but the
 825  * hardware will not do the checksum offload when udp dest port is
 826  * 4789.
 827  */
 828 static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
 829 {
 830         union l4_hdr_info l4;
 831
 832         l4.hdr = skb_transport_header(skb);
 833
 834         if (!(!skb->encapsulation &&
 835               l4.udp->dest == htons(IANA_VXLAN_UDP_PORT)))
 836                 return false;
 837
 838         skb_checksum_help(skb);
 839
 840         return true;
 841 }
 842
 843 static int hns3_set_l3l4_type_csum(struct sk_buff *skb, u8 ol4_proto,
 844                                    u8 il4_proto, u32 *type_cs_vlan_tso,
 845                                    u32 *ol_type_vlan_len_msec)
 846 {
 847         union l3_hdr_info l3;
 848         u32 l4_proto = ol4_proto;
 849
 850         l3.hdr = skb_network_header(skb);
 851
 852         /* define OL3 type and tunnel type(OL4).*/
 853         if (skb->encapsulation) {
 854                 /* define outer network header type.*/
 855                 if (skb->protocol == htons(ETH_P_IP)) {
 856                         if (skb_is_gso(skb))
 857                                 hns3_set_field(*ol_type_vlan_len_msec,
 858                                                HNS3_TXD_OL3T_S,
 859                                                HNS3_OL3T_IPV4_CSUM);
 860                         else
 861                                 hns3_set_field(*ol_type_vlan_len_msec,
 862                                                HNS3_TXD_OL3T_S,
 863                                                HNS3_OL3T_IPV4_NO_CSUM);
 864
 865                 } else if (skb->protocol == htons(ETH_P_IPV6)) {
 866                         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_S,
 867                                        HNS3_OL3T_IPV6);
 868                 }
 869
 870                 /* define tunnel type(OL4).*/
 871                 switch (l4_proto) {
 872                 case IPPROTO_UDP:
 873                         hns3_set_field(*ol_type_vlan_len_msec,
 874                                        HNS3_TXD_TUNTYPE_S,
 875                                        HNS3_TUN_MAC_IN_UDP);
 876                         break;
 877                 case IPPROTO_GRE:
 878                         hns3_set_field(*ol_type_vlan_len_msec,
 879                                        HNS3_TXD_TUNTYPE_S,
 880                                        HNS3_TUN_NVGRE);
 881                         break;
 882                 default:
 883                         /* drop the skb tunnel packet if hardware don't support,
 884                          * because hardware can't calculate csum when TSO.
 885                          */
 886                         if (skb_is_gso(skb))
 887                                 return -EDOM;
 888
 889                         /* the stack computes the IP header already,
 890                          * driver calculate l4 checksum when not TSO.
 891                          */
 892                         skb_checksum_help(skb);
 893                         return 0;
 894                 }
 895
 896                 l3.hdr = skb_inner_network_header(skb);
 897                 l4_proto = il4_proto;
 898         }
 899
 900         if (l3.v4->version == 4) {
 901                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 902                                HNS3_L3T_IPV4);
 903
 904                 /* the stack computes the IP header already, the only time we
 905                  * need the hardware to recompute it is in the case of TSO.
 906                  */
 907                 if (skb_is_gso(skb))
 908                         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
 909         } else if (l3.v6->version == 6) {
 910                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 911                                HNS3_L3T_IPV6);
 912         }
 913
 914         switch (l4_proto) {
 915         case IPPROTO_TCP:
 916                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 917                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 918                                HNS3_L4T_TCP);
 919                 break;
 920         case IPPROTO_UDP:
 921                 if (hns3_tunnel_csum_bug(skb))
 922                         break;
 923
 924                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 925                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 926                                HNS3_L4T_UDP);
 927                 break;
 928         case IPPROTO_SCTP:
 929                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 930                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 931                                HNS3_L4T_SCTP);
 932                 break;
 933         default:
 934                 /* drop the skb tunnel packet if hardware don't support,
 935                  * because hardware can't calculate csum when TSO.
 936                  */
 937                 if (skb_is_gso(skb))
 938                         return -EDOM;
 939
 940                 /* the stack computes the IP header already,
 941                  * driver calculate l4 checksum when not TSO.
 942                  */
 943                 skb_checksum_help(skb);
 944                 return 0;
 945         }
 946
 947         return 0;
 948 }
 949
 950 static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
 951 {
 952         /* Config bd buffer end */
 953         hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
 954         hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
 955 }
 956
 957 static int hns3_fill_desc_vtags(struct sk_buff *skb,
 958                                 struct hns3_enet_ring *tx_ring,
 959                                 u32 *inner_vlan_flag,
 960                                 u32 *out_vlan_flag,
 961                                 u16 *inner_vtag,
 962                                 u16 *out_vtag)
 963 {
 964 #define HNS3_TX_VLAN_PRIO_SHIFT 13
 965
 966         struct hnae3_handle *handle = tx_ring->tqp->handle;
 967
 968         /* Since HW limitation, if port based insert VLAN enabled, only one VLAN
 969          * header is allowed in skb, otherwise it will cause RAS error.
 970          */
 971         if (unlikely(skb_vlan_tagged_multi(skb) &&
 972                      handle->port_base_vlan_state ==
 973                      HNAE3_PORT_BASE_VLAN_ENABLE))
 974                 return -EINVAL;
 975
 976         if (skb->protocol == htons(ETH_P_8021Q) &&
 977             !(tx_ring->tqp->handle->kinfo.netdev->features &
 978             NETIF_F_HW_VLAN_CTAG_TX)) {
 979                 /* When HW VLAN acceleration is turned off, and the stack
 980                  * sets the protocol to 802.1q, the driver just need to
 981                  * set the protocol to the encapsulated ethertype.
 982                  */
 983                 skb->protocol = vlan_get_protocol(skb);
 984                 return 0;
 985         }
 986
 987         if (skb_vlan_tag_present(skb)) {
 988                 u16 vlan_tag;
 989
 990                 vlan_tag = skb_vlan_tag_get(skb);
 991                 vlan_tag |= (skb->priority & 0x7) << HNS3_TX_VLAN_PRIO_SHIFT;
 992
 993                 /* Based on hw strategy, use out_vtag in two layer tag case,
 994                  * and use inner_vtag in one tag case.
 995                  */
 996                 if (skb->protocol == htons(ETH_P_8021Q)) {
 997                         if (handle->port_base_vlan_state ==
 998                             HNAE3_PORT_BASE_VLAN_DISABLE){
 999                                 hns3_set_field(*out_vlan_flag,
1000                                                HNS3_TXD_OVLAN_B, 1);
1001                                 *out_vtag = vlan_tag;
1002                         } else {
1003                                 hns3_set_field(*inner_vlan_flag,
1004                                                HNS3_TXD_VLAN_B, 1);
1005                                 *inner_vtag = vlan_tag;
1006                         }
1007                 } else {
1008                         hns3_set_field(*inner_vlan_flag, HNS3_TXD_VLAN_B, 1);
1009                         *inner_vtag = vlan_tag;
1010                 }
1011         } else if (skb->protocol == htons(ETH_P_8021Q)) {
1012                 struct vlan_ethhdr *vhdr;
1013                 int rc;
1014
1015                 rc = skb_cow_head(skb, 0);
1016                 if (unlikely(rc < 0))
1017                         return rc;
1018                 vhdr = (struct vlan_ethhdr *)skb->data;
1019                 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority & 0x7)
1020                                         << HNS3_TX_VLAN_PRIO_SHIFT);
1021         }
1022
1023         skb->protocol = vlan_get_protocol(skb);
1024         return 0;
1025 }
1026
1027 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
1028                           int size, int frag_end, enum hns_desc_type type)
1029 {
1030         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
1031         struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1032         struct device *dev = ring_to_dev(ring);
1033         struct skb_frag_struct *frag;
1034         unsigned int frag_buf_num;
1035         int k, sizeoflast;
1036         dma_addr_t dma;
1037
1038         if (type == DESC_TYPE_SKB) {
1039                 struct sk_buff *skb = (struct sk_buff *)priv;
1040                 u32 ol_type_vlan_len_msec = 0;
1041                 u32 type_cs_vlan_tso = 0;
1042                 u32 paylen = skb->len;
1043                 u16 inner_vtag = 0;
1044                 u16 out_vtag = 0;
1045                 u16 mss = 0;
1046                 int ret;
1047
1048                 ret = hns3_fill_desc_vtags(skb, ring, &type_cs_vlan_tso,
1049                                            &ol_type_vlan_len_msec,
1050                                            &inner_vtag, &out_vtag);
1051                 if (unlikely(ret))
1052                         return ret;
1053
1054                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1055                         u8 ol4_proto, il4_proto;
1056
1057                         skb_reset_mac_len(skb);
1058
1059                         ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
1060                         if (unlikely(ret))
1061                                 return ret;
1062                         hns3_set_l2l3l4_len(skb, ol4_proto, il4_proto,
1063                                             &type_cs_vlan_tso,
1064                                             &ol_type_vlan_len_msec);
1065                         ret = hns3_set_l3l4_type_csum(skb, ol4_proto, il4_proto,
1066                                                       &type_cs_vlan_tso,
1067                                                       &ol_type_vlan_len_msec);
1068                         if (unlikely(ret))
1069                                 return ret;
1070
1071                         ret = hns3_set_tso(skb, &paylen, &mss,
1072                                            &type_cs_vlan_tso);
1073                         if (unlikely(ret))
1074                                 return ret;
1075                 }
1076
1077                 /* Set txbd */
1078                 desc->tx.ol_type_vlan_len_msec =
1079                         cpu_to_le32(ol_type_vlan_len_msec);
1080                 desc->tx.type_cs_vlan_tso_len =
1081                         cpu_to_le32(type_cs_vlan_tso);
1082                 desc->tx.paylen = cpu_to_le32(paylen);
1083                 desc->tx.mss = cpu_to_le16(mss);
1084                 desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
1085                 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
1086
1087                 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1088         } else {
1089                 frag = (struct skb_frag_struct *)priv;
1090                 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1091         }
1092
1093         if (unlikely(dma_mapping_error(ring->dev, dma))) {
1094                 ring->stats.sw_err_cnt++;
1095                 return -ENOMEM;
1096         }
1097
1098         desc_cb->length = size;
1099
1100         if (likely(size <= HNS3_MAX_BD_SIZE)) {
1101                 u16 bdtp_fe_sc_vld_ra_ri = 0;
1102
1103                 desc_cb->priv = priv;
1104                 desc_cb->dma = dma;
1105                 desc_cb->type = type;
1106                 desc->addr = cpu_to_le64(dma);
1107                 desc->tx.send_size = cpu_to_le16(size);
1108                 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
1109                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1110                         cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1111
1112                 ring_ptr_move_fw(ring, next_to_use);
1113                 return 0;
1114         }
1115
1116         frag_buf_num = hns3_tx_bd_count(size);
1117         sizeoflast = size & HNS3_TX_LAST_SIZE_M;
1118         sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
1119
1120         /* When frag size is bigger than hardware limit, split this frag */
1121         for (k = 0; k < frag_buf_num; k++) {
1122                 u16 bdtp_fe_sc_vld_ra_ri = 0;
1123
1124                 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
1125                 desc_cb->priv = priv;
1126                 desc_cb->dma = dma + HNS3_MAX_BD_SIZE * k;
1127                 desc_cb->type = (type == DESC_TYPE_SKB && !k) ?
1128                                         DESC_TYPE_SKB : DESC_TYPE_PAGE;
1129
1130                 /* now, fill the descriptor */
1131                 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);
1132                 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?
1133                                 (u16)sizeoflast : (u16)HNS3_MAX_BD_SIZE);
1134                 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri,
1135                                        frag_end && (k == frag_buf_num - 1) ?
1136                                                 1 : 0);
1137                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1138                                 cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1139
1140                 /* move ring pointer to next.*/
1141                 ring_ptr_move_fw(ring, next_to_use);
1142
1143                 desc_cb = &ring->desc_cb[ring->next_to_use];
1144                 desc = &ring->desc[ring->next_to_use];
1145         }
1146
1147         return 0;
1148 }
1149
1150 static int hns3_nic_maybe_stop_tso(struct sk_buff **out_skb, int *bnum,
1151                                    struct hns3_enet_ring *ring)
1152 {
1153         struct sk_buff *skb = *out_skb;
1154         struct sk_buff *new_skb = NULL;
1155         struct skb_frag_struct *frag;
1156         int bdnum_for_frag;
1157         int frag_num;
1158         int buf_num;
1159         int size;
1160         int i;
1161
1162         size = skb_headlen(skb);
1163         buf_num = hns3_tx_bd_count(size);
1164
1165         frag_num = skb_shinfo(skb)->nr_frags;
1166         for (i = 0; i < frag_num; i++) {
1167                 frag = &skb_shinfo(skb)->frags[i];
1168                 size = skb_frag_size(frag);
1169                 bdnum_for_frag = hns3_tx_bd_count(size);
1170                 if (unlikely(bdnum_for_frag > HNS3_MAX_BD_PER_FRAG))
1171                         return -ENOMEM;
1172
1173                 buf_num += bdnum_for_frag;
1174         }
1175
1176         if (unlikely(buf_num > HNS3_MAX_BD_PER_FRAG)) {
1177                 buf_num = hns3_tx_bd_count(skb->len);
1178                 if (ring_space(ring) < buf_num)
1179                         return -EBUSY;
1180                 /* manual split the send packet */
1181                 new_skb = skb_copy(skb, GFP_ATOMIC);
1182                 if (!new_skb)
1183                         return -ENOMEM;
1184                 dev_kfree_skb_any(skb);
1185                 *out_skb = new_skb;
1186         }
1187
1188         if (unlikely(ring_space(ring) < buf_num))
1189                 return -EBUSY;
1190
1191         *bnum = buf_num;
1192         return 0;
1193 }
1194
1195 static int hns3_nic_maybe_stop_tx(struct sk_buff **out_skb, int *bnum,
1196                                   struct hns3_enet_ring *ring)
1197 {
1198         struct sk_buff *skb = *out_skb;
1199         struct sk_buff *new_skb = NULL;
1200         int buf_num;
1201
1202         /* No. of segments (plus a header) */
1203         buf_num = skb_shinfo(skb)->nr_frags + 1;
1204
1205         if (unlikely(buf_num > HNS3_MAX_BD_PER_FRAG)) {
1206                 buf_num = hns3_tx_bd_count(skb->len);
1207                 if (ring_space(ring) < buf_num)
1208                         return -EBUSY;
1209                 /* manual split the send packet */
1210                 new_skb = skb_copy(skb, GFP_ATOMIC);
1211                 if (!new_skb)
1212                         return -ENOMEM;
1213                 dev_kfree_skb_any(skb);
1214                 *out_skb = new_skb;
1215         }
1216
1217         if (unlikely(ring_space(ring) < buf_num))
1218                 return -EBUSY;
1219
1220         *bnum = buf_num;
1221
1222         return 0;
1223 }
1224
1225 static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig)
1226 {
1227         struct device *dev = ring_to_dev(ring);
1228         unsigned int i;
1229
1230         for (i = 0; i < ring->desc_num; i++) {
1231                 /* check if this is where we started */
1232                 if (ring->next_to_use == next_to_use_orig)
1233                         break;
1234
1235                 /* unmap the descriptor dma address */
1236                 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
1237                         dma_unmap_single(dev,
1238                                          ring->desc_cb[ring->next_to_use].dma,
1239                                         ring->desc_cb[ring->next_to_use].length,
1240                                         DMA_TO_DEVICE);
1241                 else if (ring->desc_cb[ring->next_to_use].length)
1242                         dma_unmap_page(dev,
1243                                        ring->desc_cb[ring->next_to_use].dma,
1244                                        ring->desc_cb[ring->next_to_use].length,
1245                                        DMA_TO_DEVICE);
1246
1247                 ring->desc_cb[ring->next_to_use].length = 0;
1248
1249                 /* rollback one */
1250                 ring_ptr_move_bw(ring, next_to_use);
1251         }
1252 }
1253
1254 netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
1255 {
1256         struct hns3_nic_priv *priv = netdev_priv(netdev);
1257         struct hns3_nic_ring_data *ring_data =
1258                 &tx_ring_data(priv, skb->queue_mapping);
1259         struct hns3_enet_ring *ring = ring_data->ring;
1260         struct netdev_queue *dev_queue;
1261         struct skb_frag_struct *frag;
1262         int next_to_use_head;
1263         int next_to_use_frag;
1264         int buf_num;
1265         int seg_num;
1266         int size;
1267         int ret;
1268         int i;
1269
1270         /* Prefetch the data used later */
1271         prefetch(skb->data);
1272
1273         switch (priv->ops.maybe_stop_tx(&skb, &buf_num, ring)) {
1274         case -EBUSY:
1275                 u64_stats_update_begin(&ring->syncp);
1276                 ring->stats.tx_busy++;
1277                 u64_stats_update_end(&ring->syncp);
1278
1279                 goto out_net_tx_busy;
1280         case -ENOMEM:
1281                 u64_stats_update_begin(&ring->syncp);
1282                 ring->stats.sw_err_cnt++;
1283                 u64_stats_update_end(&ring->syncp);
1284                 netdev_err(netdev, "no memory to xmit!\n");
1285
1286                 goto out_err_tx_ok;
1287         default:
1288                 break;
1289         }
1290
1291         /* No. of segments (plus a header) */
1292         seg_num = skb_shinfo(skb)->nr_frags + 1;
1293         /* Fill the first part */
1294         size = skb_headlen(skb);
1295
1296         next_to_use_head = ring->next_to_use;
1297
1298         ret = hns3_fill_desc(ring, skb, size, seg_num == 1 ? 1 : 0,
1299                              DESC_TYPE_SKB);
1300         if (unlikely(ret))
1301                 goto head_fill_err;
1302
1303         next_to_use_frag = ring->next_to_use;
1304         /* Fill the fragments */
1305         for (i = 1; i < seg_num; i++) {
1306                 frag = &skb_shinfo(skb)->frags[i - 1];
1307                 size = skb_frag_size(frag);
1308
1309                 ret = hns3_fill_desc(ring, frag, size,
1310                                      seg_num - 1 == i ? 1 : 0,
1311                                      DESC_TYPE_PAGE);
1312
1313                 if (unlikely(ret))
1314                         goto frag_fill_err;
1315         }
1316
1317         /* Complete translate all packets */
1318         dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1319         netdev_tx_sent_queue(dev_queue, skb->len);
1320
1321         wmb(); /* Commit all data before submit */
1322
1323         hnae3_queue_xmit(ring->tqp, buf_num);
1324
1325         return NETDEV_TX_OK;
1326
1327 frag_fill_err:
1328         hns3_clear_desc(ring, next_to_use_frag);
1329
1330 head_fill_err:
1331         hns3_clear_desc(ring, next_to_use_head);
1332
1333 out_err_tx_ok:
1334         dev_kfree_skb_any(skb);
1335         return NETDEV_TX_OK;
1336
1337 out_net_tx_busy:
1338         netif_stop_subqueue(netdev, ring_data->queue_index);
1339         smp_mb(); /* Commit all data before submit */
1340
1341         return NETDEV_TX_BUSY;
1342 }
1343
1344 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1345 {
1346         struct hnae3_handle *h = hns3_get_handle(netdev);
1347         struct sockaddr *mac_addr = p;
1348         int ret;
1349
1350         if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1351                 return -EADDRNOTAVAIL;
1352
1353         if (ether_addr_equal(netdev->dev_addr, mac_addr->sa_data)) {
1354                 netdev_info(netdev, "already using mac address %pM\n",
1355                             mac_addr->sa_data);
1356                 return 0;
1357         }
1358
1359         ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
1360         if (ret) {
1361                 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1362                 return ret;
1363         }
1364
1365         ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1366
1367         return 0;
1368 }
1369
1370 static int hns3_nic_do_ioctl(struct net_device *netdev,
1371                              struct ifreq *ifr, int cmd)
1372 {
1373         struct hnae3_handle *h = hns3_get_handle(netdev);
1374
1375         if (!netif_running(netdev))
1376                 return -EINVAL;
1377
1378         if (!h->ae_algo->ops->do_ioctl)
1379                 return -EOPNOTSUPP;
1380
1381         return h->ae_algo->ops->do_ioctl(h, ifr, cmd);
1382 }
1383
1384 static int hns3_nic_set_features(struct net_device *netdev,
1385                                  netdev_features_t features)
1386 {
1387         netdev_features_t changed = netdev->features ^ features;
1388         struct hns3_nic_priv *priv = netdev_priv(netdev);
1389         struct hnae3_handle *h = priv->ae_handle;
1390         bool enable;
1391         int ret;
1392
1393         if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) {
1394                 if (features & (NETIF_F_TSO | NETIF_F_TSO6))
1395                         priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
1396                 else
1397                         priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
1398         }
1399
1400         if (changed & (NETIF_F_GRO_HW) && h->ae_algo->ops->set_gro_en) {
1401                 enable = !!(features & NETIF_F_GRO_HW);
1402                 ret = h->ae_algo->ops->set_gro_en(h, enable);
1403                 if (ret)
1404                         return ret;
1405         }
1406
1407         if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1408             h->ae_algo->ops->enable_vlan_filter) {
1409                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_FILTER);
1410                 h->ae_algo->ops->enable_vlan_filter(h, enable);
1411         }
1412
1413         if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1414             h->ae_algo->ops->enable_hw_strip_rxvtag) {
1415                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
1416                 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, enable);
1417                 if (ret)
1418                         return ret;
1419         }
1420
1421         if ((changed & NETIF_F_NTUPLE) && h->ae_algo->ops->enable_fd) {
1422                 enable = !!(features & NETIF_F_NTUPLE);
1423                 h->ae_algo->ops->enable_fd(h, enable);
1424         }
1425
1426         netdev->features = features;
1427         return 0;
1428 }
1429
1430 static void hns3_nic_get_stats64(struct net_device *netdev,
1431                                  struct rtnl_link_stats64 *stats)
1432 {
1433         struct hns3_nic_priv *priv = netdev_priv(netdev);
1434         int queue_num = priv->ae_handle->kinfo.num_tqps;
1435         struct hnae3_handle *handle = priv->ae_handle;
1436         struct hns3_enet_ring *ring;
1437         u64 rx_length_errors = 0;
1438         u64 rx_crc_errors = 0;
1439         u64 rx_multicast = 0;
1440         unsigned int start;
1441         u64 tx_errors = 0;
1442         u64 rx_errors = 0;
1443         unsigned int idx;
1444         u64 tx_bytes = 0;
1445         u64 rx_bytes = 0;
1446         u64 tx_pkts = 0;
1447         u64 rx_pkts = 0;
1448         u64 tx_drop = 0;
1449         u64 rx_drop = 0;
1450
1451         if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1452                 return;
1453
1454         handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1455
1456         for (idx = 0; idx < queue_num; idx++) {
1457                 /* fetch the tx stats */
1458                 ring = priv->ring_data[idx].ring;
1459                 do {
1460                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1461                         tx_bytes += ring->stats.tx_bytes;
1462                         tx_pkts += ring->stats.tx_pkts;
1463                         tx_drop += ring->stats.sw_err_cnt;
1464                         tx_errors += ring->stats.sw_err_cnt;
1465                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1466
1467                 /* fetch the rx stats */
1468                 ring = priv->ring_data[idx + queue_num].ring;
1469                 do {
1470                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1471                         rx_bytes += ring->stats.rx_bytes;
1472                         rx_pkts += ring->stats.rx_pkts;
1473                         rx_drop += ring->stats.non_vld_descs;
1474                         rx_drop += ring->stats.l2_err;
1475                         rx_errors += ring->stats.non_vld_descs;
1476                         rx_errors += ring->stats.l2_err;
1477                         rx_crc_errors += ring->stats.l2_err;
1478                         rx_crc_errors += ring->stats.l3l4_csum_err;
1479                         rx_multicast += ring->stats.rx_multicast;
1480                         rx_length_errors += ring->stats.err_pkt_len;
1481                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1482         }
1483
1484         stats->tx_bytes = tx_bytes;
1485         stats->tx_packets = tx_pkts;
1486         stats->rx_bytes = rx_bytes;
1487         stats->rx_packets = rx_pkts;
1488
1489         stats->rx_errors = rx_errors;
1490         stats->multicast = rx_multicast;
1491         stats->rx_length_errors = rx_length_errors;
1492         stats->rx_crc_errors = rx_crc_errors;
1493         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1494
1495         stats->tx_errors = tx_errors;
1496         stats->rx_dropped = rx_drop;
1497         stats->tx_dropped = tx_drop;
1498         stats->collisions = netdev->stats.collisions;
1499         stats->rx_over_errors = netdev->stats.rx_over_errors;
1500         stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1501         stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1502         stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1503         stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1504         stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1505         stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1506         stats->tx_window_errors = netdev->stats.tx_window_errors;
1507         stats->rx_compressed = netdev->stats.rx_compressed;
1508         stats->tx_compressed = netdev->stats.tx_compressed;
1509 }
1510
1511 static int hns3_setup_tc(struct net_device *netdev, void *type_data)
1512 {
1513         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
1514         struct hnae3_handle *h = hns3_get_handle(netdev);
1515         struct hnae3_knic_private_info *kinfo = &h->kinfo;
1516         u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1517         u8 tc = mqprio_qopt->qopt.num_tc;
1518         u16 mode = mqprio_qopt->mode;
1519         u8 hw = mqprio_qopt->qopt.hw;
1520
1521         if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1522                mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1523                 return -EOPNOTSUPP;
1524
1525         if (tc > HNAE3_MAX_TC)
1526                 return -EINVAL;
1527
1528         if (!netdev)
1529                 return -EINVAL;
1530
1531         return (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1532                 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
1533 }
1534
1535 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
1536                              void *type_data)
1537 {
1538         if (type != TC_SETUP_QDISC_MQPRIO)
1539                 return -EOPNOTSUPP;
1540
1541         return hns3_setup_tc(dev, type_data);
1542 }
1543
1544 static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1545                                 __be16 proto, u16 vid)
1546 {
1547         struct hnae3_handle *h = hns3_get_handle(netdev);
1548         struct hns3_nic_priv *priv = netdev_priv(netdev);
1549         int ret = -EIO;
1550
1551         if (h->ae_algo->ops->set_vlan_filter)
1552                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1553
1554         if (!ret)
1555                 set_bit(vid, priv->active_vlans);
1556
1557         return ret;
1558 }
1559
1560 static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1561                                  __be16 proto, u16 vid)
1562 {
1563         struct hnae3_handle *h = hns3_get_handle(netdev);
1564         struct hns3_nic_priv *priv = netdev_priv(netdev);
1565         int ret = -EIO;
1566
1567         if (h->ae_algo->ops->set_vlan_filter)
1568                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1569
1570         if (!ret)
1571                 clear_bit(vid, priv->active_vlans);
1572
1573         return ret;
1574 }
1575
1576 static int hns3_restore_vlan(struct net_device *netdev)
1577 {
1578         struct hns3_nic_priv *priv = netdev_priv(netdev);
1579         int ret = 0;
1580         u16 vid;
1581
1582         for_each_set_bit(vid, priv->active_vlans, VLAN_N_VID) {
1583                 ret = hns3_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
1584                 if (ret) {
1585                         netdev_err(netdev, "Restore vlan: %d filter, ret:%d\n",
1586                                    vid, ret);
1587                         return ret;
1588                 }
1589         }
1590
1591         return ret;
1592 }
1593
1594 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1595                                 u8 qos, __be16 vlan_proto)
1596 {
1597         struct hnae3_handle *h = hns3_get_handle(netdev);
1598         int ret = -EIO;
1599
1600         if (h->ae_algo->ops->set_vf_vlan_filter)
1601                 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1602                                                    qos, vlan_proto);
1603
1604         return ret;
1605 }
1606
1607 static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1608 {
1609         struct hnae3_handle *h = hns3_get_handle(netdev);
1610         int ret;
1611
1612         if (hns3_nic_resetting(netdev))
1613                 return -EBUSY;
1614
1615         if (!h->ae_algo->ops->set_mtu)
1616                 return -EOPNOTSUPP;
1617
1618         ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1619         if (ret)
1620                 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1621                            ret);
1622         else
1623                 netdev->mtu = new_mtu;
1624
1625         return ret;
1626 }
1627
1628 static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1629 {
1630         struct hns3_nic_priv *priv = netdev_priv(ndev);
1631         struct hnae3_handle *h = hns3_get_handle(ndev);
1632         struct hns3_enet_ring *tx_ring = NULL;
1633         struct napi_struct *napi;
1634         int timeout_queue = 0;
1635         int hw_head, hw_tail;
1636         int fbd_num, fbd_oft;
1637         int ebd_num, ebd_oft;
1638         int bd_num, bd_err;
1639         int ring_en, tc;
1640         int i;
1641
1642         /* Find the stopped queue the same way the stack does */
1643         for (i = 0; i < ndev->num_tx_queues; i++) {
1644                 struct netdev_queue *q;
1645                 unsigned long trans_start;
1646
1647                 q = netdev_get_tx_queue(ndev, i);
1648                 trans_start = q->trans_start;
1649                 if (netif_xmit_stopped(q) &&
1650                     time_after(jiffies,
1651                                (trans_start + ndev->watchdog_timeo))) {
1652                         timeout_queue = i;
1653                         break;
1654                 }
1655         }
1656
1657         if (i == ndev->num_tx_queues) {
1658                 netdev_info(ndev,
1659                             "no netdev TX timeout queue found, timeout count: %llu\n",
1660                             priv->tx_timeout_count);
1661                 return false;
1662         }
1663
1664         priv->tx_timeout_count++;
1665
1666         tx_ring = priv->ring_data[timeout_queue].ring;
1667         napi = &tx_ring->tqp_vector->napi;
1668
1669         netdev_info(ndev,
1670                     "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, napi state: %lu\n",
1671                     priv->tx_timeout_count, timeout_queue, tx_ring->next_to_use,
1672                     tx_ring->next_to_clean, napi->state);
1673
1674         netdev_info(ndev,
1675                     "tx_pkts: %llu, tx_bytes: %llu, io_err_cnt: %llu, sw_err_cnt: %llu\n",
1676                     tx_ring->stats.tx_pkts, tx_ring->stats.tx_bytes,
1677                     tx_ring->stats.io_err_cnt, tx_ring->stats.sw_err_cnt);
1678
1679         netdev_info(ndev,
1680                     "seg_pkt_cnt: %llu, tx_err_cnt: %llu, restart_queue: %llu, tx_busy: %llu\n",
1681                     tx_ring->stats.seg_pkt_cnt, tx_ring->stats.tx_err_cnt,
1682                     tx_ring->stats.restart_queue, tx_ring->stats.tx_busy);
1683
1684         /* When mac received many pause frames continuous, it's unable to send
1685          * packets, which may cause tx timeout
1686          */
1687         if (h->ae_algo->ops->update_stats &&
1688             h->ae_algo->ops->get_mac_pause_stats) {
1689                 u64 tx_pause_cnt, rx_pause_cnt;
1690
1691                 h->ae_algo->ops->update_stats(h, &ndev->stats);
1692                 h->ae_algo->ops->get_mac_pause_stats(h, &tx_pause_cnt,
1693                                                      &rx_pause_cnt);
1694                 netdev_info(ndev, "tx_pause_cnt: %llu, rx_pause_cnt: %llu\n",
1695                             tx_pause_cnt, rx_pause_cnt);
1696         }
1697
1698         hw_head = readl_relaxed(tx_ring->tqp->io_base +
1699                                 HNS3_RING_TX_RING_HEAD_REG);
1700         hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1701                                 HNS3_RING_TX_RING_TAIL_REG);
1702         fbd_num = readl_relaxed(tx_ring->tqp->io_base +
1703                                 HNS3_RING_TX_RING_FBDNUM_REG);
1704         fbd_oft = readl_relaxed(tx_ring->tqp->io_base +
1705                                 HNS3_RING_TX_RING_OFFSET_REG);
1706         ebd_num = readl_relaxed(tx_ring->tqp->io_base +
1707                                 HNS3_RING_TX_RING_EBDNUM_REG);
1708         ebd_oft = readl_relaxed(tx_ring->tqp->io_base +
1709                                 HNS3_RING_TX_RING_EBD_OFFSET_REG);
1710         bd_num = readl_relaxed(tx_ring->tqp->io_base +
1711                                HNS3_RING_TX_RING_BD_NUM_REG);
1712         bd_err = readl_relaxed(tx_ring->tqp->io_base +
1713                                HNS3_RING_TX_RING_BD_ERR_REG);
1714         ring_en = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_EN_REG);
1715         tc = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_TX_RING_TC_REG);
1716
1717         netdev_info(ndev,
1718                     "BD_NUM: 0x%x HW_HEAD: 0x%x, HW_TAIL: 0x%x, BD_ERR: 0x%x, INT: 0x%x\n",
1719                     bd_num, hw_head, hw_tail, bd_err,
1720                     readl(tx_ring->tqp_vector->mask_addr));
1721         netdev_info(ndev,
1722                     "RING_EN: 0x%x, TC: 0x%x, FBD_NUM: 0x%x FBD_OFT: 0x%x, EBD_NUM: 0x%x, EBD_OFT: 0x%x\n",
1723                     ring_en, tc, fbd_num, fbd_oft, ebd_num, ebd_oft);
1724
1725         return true;
1726 }
1727
1728 static void hns3_nic_net_timeout(struct net_device *ndev)
1729 {
1730         struct hns3_nic_priv *priv = netdev_priv(ndev);
1731         struct hnae3_handle *h = priv->ae_handle;
1732
1733         if (!hns3_get_tx_timeo_queue_info(ndev))
1734                 return;
1735
1736         /* request the reset, and let the hclge to determine
1737          * which reset level should be done
1738          */
1739         if (h->ae_algo->ops->reset_event)
1740                 h->ae_algo->ops->reset_event(h->pdev, h);
1741 }
1742
1743 static const struct net_device_ops hns3_nic_netdev_ops = {
1744         .ndo_open               = hns3_nic_net_open,
1745         .ndo_stop               = hns3_nic_net_stop,
1746         .ndo_start_xmit         = hns3_nic_net_xmit,
1747         .ndo_tx_timeout         = hns3_nic_net_timeout,
1748         .ndo_set_mac_address    = hns3_nic_net_set_mac_address,
1749         .ndo_do_ioctl           = hns3_nic_do_ioctl,
1750         .ndo_change_mtu         = hns3_nic_change_mtu,
1751         .ndo_set_features       = hns3_nic_set_features,
1752         .ndo_get_stats64        = hns3_nic_get_stats64,
1753         .ndo_setup_tc           = hns3_nic_setup_tc,
1754         .ndo_set_rx_mode        = hns3_nic_set_rx_mode,
1755         .ndo_vlan_rx_add_vid    = hns3_vlan_rx_add_vid,
1756         .ndo_vlan_rx_kill_vid   = hns3_vlan_rx_kill_vid,
1757         .ndo_set_vf_vlan        = hns3_ndo_set_vf_vlan,
1758 };
1759
1760 static bool hns3_is_phys_func(struct pci_dev *pdev)
1761 {
1762         u32 dev_id = pdev->device;
1763
1764         switch (dev_id) {
1765         case HNAE3_DEV_ID_GE:
1766         case HNAE3_DEV_ID_25GE:
1767         case HNAE3_DEV_ID_25GE_RDMA:
1768         case HNAE3_DEV_ID_25GE_RDMA_MACSEC:
1769         case HNAE3_DEV_ID_50GE_RDMA:
1770         case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
1771         case HNAE3_DEV_ID_100G_RDMA_MACSEC:
1772                 return true;
1773         case HNAE3_DEV_ID_100G_VF:
1774         case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF:
1775                 return false;
1776         default:
1777                 dev_warn(&pdev->dev, "un-recognized pci device-id %d",
1778                          dev_id);
1779         }
1780
1781         return false;
1782 }
1783
1784 static void hns3_disable_sriov(struct pci_dev *pdev)
1785 {
1786         /* If our VFs are assigned we cannot shut down SR-IOV
1787          * without causing issues, so just leave the hardware
1788          * available but disabled
1789          */
1790         if (pci_vfs_assigned(pdev)) {
1791                 dev_warn(&pdev->dev,
1792                          "disabling driver while VFs are assigned\n");
1793                 return;
1794         }
1795
1796         pci_disable_sriov(pdev);
1797 }
1798
1799 static void hns3_get_dev_capability(struct pci_dev *pdev,
1800                                     struct hnae3_ae_dev *ae_dev)
1801 {
1802         if (pdev->revision >= 0x21) {
1803                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B, 1);
1804                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B, 1);
1805         }
1806 }
1807
1808 /* hns3_probe - Device initialization routine
1809  * @pdev: PCI device information struct
1810  * @ent: entry in hns3_pci_tbl
1811  *
1812  * hns3_probe initializes a PF identified by a pci_dev structure.
1813  * The OS initialization, configuring of the PF private structure,
1814  * and a hardware reset occur.
1815  *
1816  * Returns 0 on success, negative on failure
1817  */
1818 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1819 {
1820         struct hnae3_ae_dev *ae_dev;
1821         int ret;
1822
1823         ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev),
1824                               GFP_KERNEL);
1825         if (!ae_dev) {
1826                 ret = -ENOMEM;
1827                 return ret;
1828         }
1829
1830         ae_dev->pdev = pdev;
1831         ae_dev->flag = ent->driver_data;
1832         ae_dev->dev_type = HNAE3_DEV_KNIC;
1833         ae_dev->reset_type = HNAE3_NONE_RESET;
1834         hns3_get_dev_capability(pdev, ae_dev);
1835         pci_set_drvdata(pdev, ae_dev);
1836
1837         ret = hnae3_register_ae_dev(ae_dev);
1838         if (ret) {
1839                 devm_kfree(&pdev->dev, ae_dev);
1840                 pci_set_drvdata(pdev, NULL);
1841         }
1842
1843         return ret;
1844 }
1845
1846 /* hns3_remove - Device removal routine
1847  * @pdev: PCI device information struct
1848  */
1849 static void hns3_remove(struct pci_dev *pdev)
1850 {
1851         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1852
1853         if (hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))
1854                 hns3_disable_sriov(pdev);
1855
1856         hnae3_unregister_ae_dev(ae_dev);
1857         pci_set_drvdata(pdev, NULL);
1858 }
1859
1860 /**
1861  * hns3_pci_sriov_configure
1862  * @pdev: pointer to a pci_dev structure
1863  * @num_vfs: number of VFs to allocate
1864  *
1865  * Enable or change the number of VFs. Called when the user updates the number
1866  * of VFs in sysfs.
1867  **/
1868 static int hns3_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1869 {
1870         int ret;
1871
1872         if (!(hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))) {
1873                 dev_warn(&pdev->dev, "Can not config SRIOV\n");
1874                 return -EINVAL;
1875         }
1876
1877         if (num_vfs) {
1878                 ret = pci_enable_sriov(pdev, num_vfs);
1879                 if (ret)
1880                         dev_err(&pdev->dev, "SRIOV enable failed %d\n", ret);
1881                 else
1882                         return num_vfs;
1883         } else if (!pci_vfs_assigned(pdev)) {
1884                 pci_disable_sriov(pdev);
1885         } else {
1886                 dev_warn(&pdev->dev,
1887                          "Unable to free VFs because some are assigned to VMs.\n");
1888         }
1889
1890         return 0;
1891 }
1892
1893 static void hns3_shutdown(struct pci_dev *pdev)
1894 {
1895         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1896
1897         hnae3_unregister_ae_dev(ae_dev);
1898         devm_kfree(&pdev->dev, ae_dev);
1899         pci_set_drvdata(pdev, NULL);
1900
1901         if (system_state == SYSTEM_POWER_OFF)
1902                 pci_set_power_state(pdev, PCI_D3hot);
1903 }
1904
1905 static pci_ers_result_t hns3_error_detected(struct pci_dev *pdev,
1906                                             pci_channel_state_t state)
1907 {
1908         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1909         pci_ers_result_t ret;
1910
1911         dev_info(&pdev->dev, "PCI error detected, state(=%d)!!\n", state);
1912
1913         if (state == pci_channel_io_perm_failure)
1914                 return PCI_ERS_RESULT_DISCONNECT;
1915
1916         if (!ae_dev) {
1917                 dev_err(&pdev->dev,
1918                         "Can't recover - error happened during device init\n");
1919                 return PCI_ERS_RESULT_NONE;
1920         }
1921
1922         if (ae_dev->ops->handle_hw_ras_error)
1923                 ret = ae_dev->ops->handle_hw_ras_error(ae_dev);
1924         else
1925                 return PCI_ERS_RESULT_NONE;
1926
1927         return ret;
1928 }
1929
1930 static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev)
1931 {
1932         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1933         struct device *dev = &pdev->dev;
1934
1935         dev_info(dev, "requesting reset due to PCI error\n");
1936
1937         /* request the reset */
1938         if (ae_dev->ops->reset_event) {
1939                 if (!ae_dev->override_pci_need_reset)
1940                         ae_dev->ops->reset_event(pdev, NULL);
1941
1942                 return PCI_ERS_RESULT_RECOVERED;
1943         }
1944
1945         return PCI_ERS_RESULT_DISCONNECT;
1946 }
1947
1948 static void hns3_reset_prepare(struct pci_dev *pdev)
1949 {
1950         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1951
1952         dev_info(&pdev->dev, "hns3 flr prepare\n");
1953         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_prepare)
1954                 ae_dev->ops->flr_prepare(ae_dev);
1955 }
1956
1957 static void hns3_reset_done(struct pci_dev *pdev)
1958 {
1959         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1960
1961         dev_info(&pdev->dev, "hns3 flr done\n");
1962         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_done)
1963                 ae_dev->ops->flr_done(ae_dev);
1964 }
1965
1966 static const struct pci_error_handlers hns3_err_handler = {
1967         .error_detected = hns3_error_detected,
1968         .slot_reset     = hns3_slot_reset,
1969         .reset_prepare  = hns3_reset_prepare,
1970         .reset_done     = hns3_reset_done,
1971 };
1972
1973 static struct pci_driver hns3_driver = {
1974         .name     = hns3_driver_name,
1975         .id_table = hns3_pci_tbl,
1976         .probe    = hns3_probe,
1977         .remove   = hns3_remove,
1978         .shutdown = hns3_shutdown,
1979         .sriov_configure = hns3_pci_sriov_configure,
1980         .err_handler    = &hns3_err_handler,
1981 };
1982
1983 /* set default feature to hns3 */
1984 static void hns3_set_default_feature(struct net_device *netdev)
1985 {
1986         struct hnae3_handle *h = hns3_get_handle(netdev);
1987         struct pci_dev *pdev = h->pdev;
1988
1989         netdev->priv_flags |= IFF_UNICAST_FLT;
1990
1991         netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1992                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1993                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1994                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1995                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
1996
1997         netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
1998
1999         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
2000
2001         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2002                 NETIF_F_HW_VLAN_CTAG_FILTER |
2003                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2004                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2005                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2006                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2007                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2008
2009         netdev->vlan_features |=
2010                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
2011                 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
2012                 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2013                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2014                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2015
2016         netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2017                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2018                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2019                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2020                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2021                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2022
2023         if (pdev->revision >= 0x21) {
2024                 netdev->hw_features |= NETIF_F_GRO_HW;
2025                 netdev->features |= NETIF_F_GRO_HW;
2026
2027                 if (!(h->flags & HNAE3_SUPPORT_VF)) {
2028                         netdev->hw_features |= NETIF_F_NTUPLE;
2029                         netdev->features |= NETIF_F_NTUPLE;
2030                 }
2031         }
2032 }
2033
2034 static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
2035                              struct hns3_desc_cb *cb)
2036 {
2037         unsigned int order = hnae3_page_order(ring);
2038         struct page *p;
2039
2040         p = dev_alloc_pages(order);
2041         if (!p)
2042                 return -ENOMEM;
2043
2044         cb->priv = p;
2045         cb->page_offset = 0;
2046         cb->reuse_flag = 0;
2047         cb->buf  = page_address(p);
2048         cb->length = hnae3_page_size(ring);
2049         cb->type = DESC_TYPE_PAGE;
2050
2051         return 0;
2052 }
2053
2054 static void hns3_free_buffer(struct hns3_enet_ring *ring,
2055                              struct hns3_desc_cb *cb)
2056 {
2057         if (cb->type == DESC_TYPE_SKB)
2058                 dev_kfree_skb_any((struct sk_buff *)cb->priv);
2059         else if (!HNAE3_IS_TX_RING(ring))
2060                 put_page((struct page *)cb->priv);
2061         memset(cb, 0, sizeof(*cb));
2062 }
2063
2064 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
2065 {
2066         cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
2067                                cb->length, ring_to_dma_dir(ring));
2068
2069         if (unlikely(dma_mapping_error(ring_to_dev(ring), cb->dma)))
2070                 return -EIO;
2071
2072         return 0;
2073 }
2074
2075 static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
2076                               struct hns3_desc_cb *cb)
2077 {
2078         if (cb->type == DESC_TYPE_SKB)
2079                 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
2080                                  ring_to_dma_dir(ring));
2081         else if (cb->length)
2082                 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
2083                                ring_to_dma_dir(ring));
2084 }
2085
2086 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
2087 {
2088         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2089         ring->desc[i].addr = 0;
2090 }
2091
2092 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
2093 {
2094         struct hns3_desc_cb *cb = &ring->desc_cb[i];
2095
2096         if (!ring->desc_cb[i].dma)
2097                 return;
2098
2099         hns3_buffer_detach(ring, i);
2100         hns3_free_buffer(ring, cb);
2101 }
2102
2103 static void hns3_free_buffers(struct hns3_enet_ring *ring)
2104 {
2105         int i;
2106
2107         for (i = 0; i < ring->desc_num; i++)
2108                 hns3_free_buffer_detach(ring, i);
2109 }
2110
2111 /* free desc along with its attached buffer */
2112 static void hns3_free_desc(struct hns3_enet_ring *ring)
2113 {
2114         int size = ring->desc_num * sizeof(ring->desc[0]);
2115
2116         hns3_free_buffers(ring);
2117
2118         if (ring->desc) {
2119                 dma_free_coherent(ring_to_dev(ring), size,
2120                                   ring->desc, ring->desc_dma_addr);
2121                 ring->desc = NULL;
2122         }
2123 }
2124
2125 static int hns3_alloc_desc(struct hns3_enet_ring *ring)
2126 {
2127         int size = ring->desc_num * sizeof(ring->desc[0]);
2128
2129         ring->desc = dma_alloc_coherent(ring_to_dev(ring), size,
2130                                         &ring->desc_dma_addr, GFP_KERNEL);
2131         if (!ring->desc)
2132                 return -ENOMEM;
2133
2134         return 0;
2135 }
2136
2137 static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
2138                                    struct hns3_desc_cb *cb)
2139 {
2140         int ret;
2141
2142         ret = hns3_alloc_buffer(ring, cb);
2143         if (ret)
2144                 goto out;
2145
2146         ret = hns3_map_buffer(ring, cb);
2147         if (ret)
2148                 goto out_with_buf;
2149
2150         return 0;
2151
2152 out_with_buf:
2153         hns3_free_buffer(ring, cb);
2154 out:
2155         return ret;
2156 }
2157
2158 static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
2159 {
2160         int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
2161
2162         if (ret)
2163                 return ret;
2164
2165         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2166
2167         return 0;
2168 }
2169
2170 /* Allocate memory for raw pkg, and map with dma */
2171 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
2172 {
2173         int i, j, ret;
2174
2175         for (i = 0; i < ring->desc_num; i++) {
2176                 ret = hns3_alloc_buffer_attach(ring, i);
2177                 if (ret)
2178                         goto out_buffer_fail;
2179         }
2180
2181         return 0;
2182
2183 out_buffer_fail:
2184         for (j = i - 1; j >= 0; j--)
2185                 hns3_free_buffer_detach(ring, j);
2186         return ret;
2187 }
2188
2189 /* detach a in-used buffer and replace with a reserved one  */
2190 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
2191                                 struct hns3_desc_cb *res_cb)
2192 {
2193         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2194         ring->desc_cb[i] = *res_cb;
2195         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2196         ring->desc[i].rx.bd_base_info = 0;
2197 }
2198
2199 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
2200 {
2201         ring->desc_cb[i].reuse_flag = 0;
2202         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
2203                 + ring->desc_cb[i].page_offset);
2204         ring->desc[i].rx.bd_base_info = 0;
2205 }
2206
2207 static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring *ring, int *bytes,
2208                                       int *pkts)
2209 {
2210         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
2211
2212         (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
2213         (*bytes) += desc_cb->length;
2214         /* desc_cb will be cleaned, after hnae3_free_buffer_detach*/
2215         hns3_free_buffer_detach(ring, ring->next_to_clean);
2216
2217         ring_ptr_move_fw(ring, next_to_clean);
2218 }
2219
2220 static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
2221 {
2222         int u = ring->next_to_use;
2223         int c = ring->next_to_clean;
2224
2225         if (unlikely(h > ring->desc_num))
2226                 return 0;
2227
2228         return u > c ? (h > c && h <= u) : (h > c || h <= u);
2229 }
2230
2231 void hns3_clean_tx_ring(struct hns3_enet_ring *ring)
2232 {
2233         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2234         struct hns3_nic_priv *priv = netdev_priv(netdev);
2235         struct netdev_queue *dev_queue;
2236         int bytes, pkts;
2237         int head;
2238
2239         head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
2240         rmb(); /* Make sure head is ready before touch any data */
2241
2242         if (is_ring_empty(ring) || head == ring->next_to_clean)
2243                 return; /* no data to poll */
2244
2245         if (unlikely(!is_valid_clean_head(ring, head))) {
2246                 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
2247                            ring->next_to_use, ring->next_to_clean);
2248
2249                 u64_stats_update_begin(&ring->syncp);
2250                 ring->stats.io_err_cnt++;
2251                 u64_stats_update_end(&ring->syncp);
2252                 return;
2253         }
2254
2255         bytes = 0;
2256         pkts = 0;
2257         while (head != ring->next_to_clean) {
2258                 hns3_nic_reclaim_one_desc(ring, &bytes, &pkts);
2259                 /* Issue prefetch for next Tx descriptor */
2260                 prefetch(&ring->desc_cb[ring->next_to_clean]);
2261         }
2262
2263         ring->tqp_vector->tx_group.total_bytes += bytes;
2264         ring->tqp_vector->tx_group.total_packets += pkts;
2265
2266         u64_stats_update_begin(&ring->syncp);
2267         ring->stats.tx_bytes += bytes;
2268         ring->stats.tx_pkts += pkts;
2269         u64_stats_update_end(&ring->syncp);
2270
2271         dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
2272         netdev_tx_completed_queue(dev_queue, pkts, bytes);
2273
2274         if (unlikely(pkts && netif_carrier_ok(netdev) &&
2275                      (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
2276                 /* Make sure that anybody stopping the queue after this
2277                  * sees the new next_to_clean.
2278                  */
2279                 smp_mb();
2280                 if (netif_tx_queue_stopped(dev_queue) &&
2281                     !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
2282                         netif_tx_wake_queue(dev_queue);
2283                         ring->stats.restart_queue++;
2284                 }
2285         }
2286 }
2287
2288 static int hns3_desc_unused(struct hns3_enet_ring *ring)
2289 {
2290         int ntc = ring->next_to_clean;
2291         int ntu = ring->next_to_use;
2292
2293         return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
2294 }
2295
2296 static void
2297 hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring, int cleand_count)
2298 {
2299         struct hns3_desc_cb *desc_cb;
2300         struct hns3_desc_cb res_cbs;
2301         int i, ret;
2302
2303         for (i = 0; i < cleand_count; i++) {
2304                 desc_cb = &ring->desc_cb[ring->next_to_use];
2305                 if (desc_cb->reuse_flag) {
2306                         u64_stats_update_begin(&ring->syncp);
2307                         ring->stats.reuse_pg_cnt++;
2308                         u64_stats_update_end(&ring->syncp);
2309
2310                         hns3_reuse_buffer(ring, ring->next_to_use);
2311                 } else {
2312                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
2313                         if (ret) {
2314                                 u64_stats_update_begin(&ring->syncp);
2315                                 ring->stats.sw_err_cnt++;
2316                                 u64_stats_update_end(&ring->syncp);
2317
2318                                 netdev_err(ring->tqp->handle->kinfo.netdev,
2319                                            "hnae reserve buffer map failed.\n");
2320                                 break;
2321                         }
2322                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
2323                 }
2324
2325                 ring_ptr_move_fw(ring, next_to_use);
2326         }
2327
2328         wmb(); /* Make all data has been write before submit */
2329         writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
2330 }
2331
2332 static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2333                                 struct hns3_enet_ring *ring, int pull_len,
2334                                 struct hns3_desc_cb *desc_cb)
2335 {
2336         struct hns3_desc *desc;
2337         u32 truesize;
2338         int size;
2339         int last_offset;
2340         bool twobufs;
2341
2342         twobufs = ((PAGE_SIZE < 8192) &&
2343                 hnae3_buf_size(ring) == HNS3_BUFFER_SIZE_2048);
2344
2345         desc = &ring->desc[ring->next_to_clean];
2346         size = le16_to_cpu(desc->rx.size);
2347
2348         truesize = hnae3_buf_size(ring);
2349
2350         if (!twobufs)
2351                 last_offset = hnae3_page_size(ring) - hnae3_buf_size(ring);
2352
2353         skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2354                         size - pull_len, truesize);
2355
2356          /* Avoid re-using remote pages,flag default unreuse */
2357         if (unlikely(page_to_nid(desc_cb->priv) != numa_node_id()))
2358                 return;
2359
2360         if (twobufs) {
2361                 /* If we are only owner of page we can reuse it */
2362                 if (likely(page_count(desc_cb->priv) == 1)) {
2363                         /* Flip page offset to other buffer */
2364                         desc_cb->page_offset ^= truesize;
2365
2366                         desc_cb->reuse_flag = 1;
2367                         /* bump ref count on page before it is given*/
2368                         get_page(desc_cb->priv);
2369                 }
2370                 return;
2371         }
2372
2373         /* Move offset up to the next cache line */
2374         desc_cb->page_offset += truesize;
2375
2376         if (desc_cb->page_offset <= last_offset) {
2377                 desc_cb->reuse_flag = 1;
2378                 /* Bump ref count on page before it is given*/
2379                 get_page(desc_cb->priv);
2380         }
2381 }
2382
2383 static int hns3_gro_complete(struct sk_buff *skb)
2384 {
2385         __be16 type = skb->protocol;
2386         struct tcphdr *th;
2387         int depth = 0;
2388
2389         while (type == htons(ETH_P_8021Q)) {
2390                 struct vlan_hdr *vh;
2391
2392                 if ((depth + VLAN_HLEN) > skb_headlen(skb))
2393                         return -EFAULT;
2394
2395                 vh = (struct vlan_hdr *)(skb->data + depth);
2396                 type = vh->h_vlan_encapsulated_proto;
2397                 depth += VLAN_HLEN;
2398         }
2399
2400         if (type == htons(ETH_P_IP)) {
2401                 depth += sizeof(struct iphdr);
2402         } else if (type == htons(ETH_P_IPV6)) {
2403                 depth += sizeof(struct ipv6hdr);
2404         } else {
2405                 netdev_err(skb->dev,
2406                            "Error: FW GRO supports only IPv4/IPv6, not 0x%04x, depth: %d\n",
2407                            be16_to_cpu(type), depth);
2408                 return -EFAULT;
2409         }
2410
2411         th = (struct tcphdr *)(skb->data + depth);
2412         skb_shinfo(skb)->gso_segs = NAPI_GRO_CB(skb)->count;
2413         if (th->cwr)
2414                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_ECN;
2415
2416         skb->ip_summed = CHECKSUM_UNNECESSARY;
2417
2418         return 0;
2419 }
2420
2421 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2422                              u32 l234info, u32 bd_base_info)
2423 {
2424         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2425         int l3_type, l4_type;
2426         int ol4_type;
2427
2428         skb->ip_summed = CHECKSUM_NONE;
2429
2430         skb_checksum_none_assert(skb);
2431
2432         if (!(netdev->features & NETIF_F_RXCSUM))
2433                 return;
2434
2435         /* check if hardware has done checksum */
2436         if (!(bd_base_info & BIT(HNS3_RXD_L3L4P_B)))
2437                 return;
2438
2439         if (unlikely(l234info & (BIT(HNS3_RXD_L3E_B) | BIT(HNS3_RXD_L4E_B) |
2440                                  BIT(HNS3_RXD_OL3E_B) |
2441                                  BIT(HNS3_RXD_OL4E_B)))) {
2442                 u64_stats_update_begin(&ring->syncp);
2443                 ring->stats.l3l4_csum_err++;
2444                 u64_stats_update_end(&ring->syncp);
2445
2446                 return;
2447         }
2448
2449         ol4_type = hnae3_get_field(l234info, HNS3_RXD_OL4ID_M,
2450                                    HNS3_RXD_OL4ID_S);
2451         switch (ol4_type) {
2452         case HNS3_OL4_TYPE_MAC_IN_UDP:
2453         case HNS3_OL4_TYPE_NVGRE:
2454                 skb->csum_level = 1;
2455                 /* fall through */
2456         case HNS3_OL4_TYPE_NO_TUN:
2457                 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2458                                           HNS3_RXD_L3ID_S);
2459                 l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
2460                                           HNS3_RXD_L4ID_S);
2461
2462                 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2463                 if ((l3_type == HNS3_L3_TYPE_IPV4 ||
2464                      l3_type == HNS3_L3_TYPE_IPV6) &&
2465                     (l4_type == HNS3_L4_TYPE_UDP ||
2466                      l4_type == HNS3_L4_TYPE_TCP ||
2467                      l4_type == HNS3_L4_TYPE_SCTP))
2468                         skb->ip_summed = CHECKSUM_UNNECESSARY;
2469                 break;
2470         default:
2471                 break;
2472         }
2473 }
2474
2475 static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2476 {
2477         if (skb_has_frag_list(skb))
2478                 napi_gro_flush(&ring->tqp_vector->napi, false);
2479
2480         napi_gro_receive(&ring->tqp_vector->napi, skb);
2481 }
2482
2483 static bool hns3_parse_vlan_tag(struct hns3_enet_ring *ring,
2484                                 struct hns3_desc *desc, u32 l234info,
2485                                 u16 *vlan_tag)
2486 {
2487         struct hnae3_handle *handle = ring->tqp->handle;
2488         struct pci_dev *pdev = ring->tqp->handle->pdev;
2489
2490         if (pdev->revision == 0x20) {
2491                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2492                 if (!(*vlan_tag & VLAN_VID_MASK))
2493                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2494
2495                 return (*vlan_tag != 0);
2496         }
2497
2498 #define HNS3_STRP_OUTER_VLAN    0x1
2499 #define HNS3_STRP_INNER_VLAN    0x2
2500 #define HNS3_STRP_BOTH          0x3
2501
2502         /* Hardware always insert VLAN tag into RX descriptor when
2503          * remove the tag from packet, driver needs to determine
2504          * reporting which tag to stack.
2505          */
2506         switch (hnae3_get_field(l234info, HNS3_RXD_STRP_TAGP_M,
2507                                 HNS3_RXD_STRP_TAGP_S)) {
2508         case HNS3_STRP_OUTER_VLAN:
2509                 if (handle->port_base_vlan_state !=
2510                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2511                         return false;
2512
2513                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2514                 return true;
2515         case HNS3_STRP_INNER_VLAN:
2516                 if (handle->port_base_vlan_state !=
2517                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2518                         return false;
2519
2520                 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2521                 return true;
2522         case HNS3_STRP_BOTH:
2523                 if (handle->port_base_vlan_state ==
2524                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2525                         *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2526                 else
2527                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2528
2529                 return true;
2530         default:
2531                 return false;
2532         }
2533 }
2534
2535 static int hns3_alloc_skb(struct hns3_enet_ring *ring, int length,
2536                           unsigned char *va)
2537 {
2538 #define HNS3_NEED_ADD_FRAG      1
2539         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
2540         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2541         struct sk_buff *skb;
2542
2543         ring->skb = napi_alloc_skb(&ring->tqp_vector->napi, HNS3_RX_HEAD_SIZE);
2544         skb = ring->skb;
2545         if (unlikely(!skb)) {
2546                 netdev_err(netdev, "alloc rx skb fail\n");
2547
2548                 u64_stats_update_begin(&ring->syncp);
2549                 ring->stats.sw_err_cnt++;
2550                 u64_stats_update_end(&ring->syncp);
2551
2552                 return -ENOMEM;
2553         }
2554
2555         prefetchw(skb->data);
2556
2557         ring->pending_buf = 1;
2558         ring->frag_num = 0;
2559         ring->tail_skb = NULL;
2560         if (length <= HNS3_RX_HEAD_SIZE) {
2561                 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2562
2563                 /* We can reuse buffer as-is, just make sure it is local */
2564                 if (likely(page_to_nid(desc_cb->priv) == numa_node_id()))
2565                         desc_cb->reuse_flag = 1;
2566                 else /* This page cannot be reused so discard it */
2567                         put_page(desc_cb->priv);
2568
2569                 ring_ptr_move_fw(ring, next_to_clean);
2570                 return 0;
2571         }
2572         u64_stats_update_begin(&ring->syncp);
2573         ring->stats.seg_pkt_cnt++;
2574         u64_stats_update_end(&ring->syncp);
2575
2576         ring->pull_len = eth_get_headlen(va, HNS3_RX_HEAD_SIZE);
2577         __skb_put(skb, ring->pull_len);
2578         hns3_nic_reuse_page(skb, ring->frag_num++, ring, ring->pull_len,
2579                             desc_cb);
2580         ring_ptr_move_fw(ring, next_to_clean);
2581
2582         return HNS3_NEED_ADD_FRAG;
2583 }
2584
2585 static int hns3_add_frag(struct hns3_enet_ring *ring, struct hns3_desc *desc,
2586                          struct sk_buff **out_skb, bool pending)
2587 {
2588         struct sk_buff *skb = *out_skb;
2589         struct sk_buff *head_skb = *out_skb;
2590         struct sk_buff *new_skb;
2591         struct hns3_desc_cb *desc_cb;
2592         struct hns3_desc *pre_desc;
2593         u32 bd_base_info;
2594         int pre_bd;
2595
2596         /* if there is pending bd, the SW param next_to_clean has moved
2597          * to next and the next is NULL
2598          */
2599         if (pending) {
2600                 pre_bd = (ring->next_to_clean - 1 + ring->desc_num) %
2601                         ring->desc_num;
2602                 pre_desc = &ring->desc[pre_bd];
2603                 bd_base_info = le32_to_cpu(pre_desc->rx.bd_base_info);
2604         } else {
2605                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2606         }
2607
2608         while (!(bd_base_info & BIT(HNS3_RXD_FE_B))) {
2609                 desc = &ring->desc[ring->next_to_clean];
2610                 desc_cb = &ring->desc_cb[ring->next_to_clean];
2611                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2612                 /* make sure HW write desc complete */
2613                 dma_rmb();
2614                 if (!(bd_base_info & BIT(HNS3_RXD_VLD_B)))
2615                         return -ENXIO;
2616
2617                 if (unlikely(ring->frag_num >= MAX_SKB_FRAGS)) {
2618                         new_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2619                                                  HNS3_RX_HEAD_SIZE);
2620                         if (unlikely(!new_skb)) {
2621                                 netdev_err(ring->tqp->handle->kinfo.netdev,
2622                                            "alloc rx skb frag fail\n");
2623                                 return -ENXIO;
2624                         }
2625                         ring->frag_num = 0;
2626
2627                         if (ring->tail_skb) {
2628                                 ring->tail_skb->next = new_skb;
2629                                 ring->tail_skb = new_skb;
2630                         } else {
2631                                 skb_shinfo(skb)->frag_list = new_skb;
2632                                 ring->tail_skb = new_skb;
2633                         }
2634                 }
2635
2636                 if (ring->tail_skb) {
2637                         head_skb->truesize += hnae3_buf_size(ring);
2638                         head_skb->data_len += le16_to_cpu(desc->rx.size);
2639                         head_skb->len += le16_to_cpu(desc->rx.size);
2640                         skb = ring->tail_skb;
2641                 }
2642
2643                 hns3_nic_reuse_page(skb, ring->frag_num++, ring, 0, desc_cb);
2644                 ring_ptr_move_fw(ring, next_to_clean);
2645                 ring->pending_buf++;
2646         }
2647
2648         return 0;
2649 }
2650
2651 static int hns3_set_gro_and_checksum(struct hns3_enet_ring *ring,
2652                                      struct sk_buff *skb, u32 l234info,
2653                                      u32 bd_base_info)
2654 {
2655         u16 gro_count;
2656         u32 l3_type;
2657
2658         gro_count = hnae3_get_field(l234info, HNS3_RXD_GRO_COUNT_M,
2659                                     HNS3_RXD_GRO_COUNT_S);
2660         /* if there is no HW GRO, do not set gro params */
2661         if (!gro_count) {
2662                 hns3_rx_checksum(ring, skb, l234info, bd_base_info);
2663                 return 0;
2664         }
2665
2666         NAPI_GRO_CB(skb)->count = gro_count;
2667
2668         l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2669                                   HNS3_RXD_L3ID_S);
2670         if (l3_type == HNS3_L3_TYPE_IPV4)
2671                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
2672         else if (l3_type == HNS3_L3_TYPE_IPV6)
2673                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
2674         else
2675                 return -EFAULT;
2676
2677         skb_shinfo(skb)->gso_size = hnae3_get_field(bd_base_info,
2678                                                     HNS3_RXD_GRO_SIZE_M,
2679                                                     HNS3_RXD_GRO_SIZE_S);
2680
2681         return  hns3_gro_complete(skb);
2682 }
2683
2684 static void hns3_set_rx_skb_rss_type(struct hns3_enet_ring *ring,
2685                                      struct sk_buff *skb)
2686 {
2687         struct hnae3_handle *handle = ring->tqp->handle;
2688         enum pkt_hash_types rss_type;
2689         struct hns3_desc *desc;
2690         int last_bd;
2691
2692         /* When driver handle the rss type, ring->next_to_clean indicates the
2693          * first descriptor of next packet, need -1 here.
2694          */
2695         last_bd = (ring->next_to_clean - 1 + ring->desc_num) % ring->desc_num;
2696         desc = &ring->desc[last_bd];
2697
2698         if (le32_to_cpu(desc->rx.rss_hash))
2699                 rss_type = handle->kinfo.rss_type;
2700         else
2701                 rss_type = PKT_HASH_TYPE_NONE;
2702
2703         skb_set_hash(skb, le32_to_cpu(desc->rx.rss_hash), rss_type);
2704 }
2705
2706 static int hns3_handle_bdinfo(struct hns3_enet_ring *ring, struct sk_buff *skb,
2707                               struct hns3_desc *desc)
2708 {
2709         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2710         u32 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2711         u32 l234info = le32_to_cpu(desc->rx.l234_info);
2712         enum hns3_pkt_l2t_type l2_frame_type;
2713         unsigned int len;
2714         int ret;
2715
2716         /* Based on hw strategy, the tag offloaded will be stored at
2717          * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2718          * in one layer tag case.
2719          */
2720         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2721                 u16 vlan_tag;
2722
2723                 if (hns3_parse_vlan_tag(ring, desc, l234info, &vlan_tag))
2724                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
2725                                                vlan_tag);
2726         }
2727
2728         if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B)))) {
2729                 u64_stats_update_begin(&ring->syncp);
2730                 ring->stats.non_vld_descs++;
2731                 u64_stats_update_end(&ring->syncp);
2732
2733                 return -EINVAL;
2734         }
2735
2736         if (unlikely(!desc->rx.pkt_len || (l234info & (BIT(HNS3_RXD_TRUNCAT_B) |
2737                                   BIT(HNS3_RXD_L2E_B))))) {
2738                 u64_stats_update_begin(&ring->syncp);
2739                 if (l234info & BIT(HNS3_RXD_L2E_B))
2740                         ring->stats.l2_err++;
2741                 else
2742                         ring->stats.err_pkt_len++;
2743                 u64_stats_update_end(&ring->syncp);
2744
2745                 return -EFAULT;
2746         }
2747
2748         len = skb->len;
2749
2750         /* Do update ip stack process */
2751         skb->protocol = eth_type_trans(skb, netdev);
2752
2753         /* This is needed in order to enable forwarding support */
2754         ret = hns3_set_gro_and_checksum(ring, skb, l234info, bd_base_info);
2755         if (unlikely(ret)) {
2756                 u64_stats_update_begin(&ring->syncp);
2757                 ring->stats.rx_err_cnt++;
2758                 u64_stats_update_end(&ring->syncp);
2759                 return ret;
2760         }
2761
2762         l2_frame_type = hnae3_get_field(l234info, HNS3_RXD_DMAC_M,
2763                                         HNS3_RXD_DMAC_S);
2764
2765         u64_stats_update_begin(&ring->syncp);
2766         ring->stats.rx_pkts++;
2767         ring->stats.rx_bytes += len;
2768
2769         if (l2_frame_type == HNS3_L2_TYPE_MULTICAST)
2770                 ring->stats.rx_multicast++;
2771
2772         u64_stats_update_end(&ring->syncp);
2773
2774         ring->tqp_vector->rx_group.total_bytes += len;
2775         return 0;
2776 }
2777
2778 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2779                              struct sk_buff **out_skb)
2780 {
2781         struct sk_buff *skb = ring->skb;
2782         struct hns3_desc_cb *desc_cb;
2783         struct hns3_desc *desc;
2784         u32 bd_base_info;
2785         int length;
2786         int ret;
2787
2788         desc = &ring->desc[ring->next_to_clean];
2789         desc_cb = &ring->desc_cb[ring->next_to_clean];
2790
2791         prefetch(desc);
2792
2793         length = le16_to_cpu(desc->rx.size);
2794         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2795
2796         /* Check valid BD */
2797         if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B))))
2798                 return -ENXIO;
2799
2800         if (!skb)
2801                 ring->va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2802
2803         /* Prefetch first cache line of first page
2804          * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2805          * line size is 64B so need to prefetch twice to make it 128B. But in
2806          * actual we can have greater size of caches with 128B Level 1 cache
2807          * lines. In such a case, single fetch would suffice to cache in the
2808          * relevant part of the header.
2809          */
2810         prefetch(ring->va);
2811 #if L1_CACHE_BYTES < 128
2812         prefetch(ring->va + L1_CACHE_BYTES);
2813 #endif
2814
2815         if (!skb) {
2816                 ret = hns3_alloc_skb(ring, length, ring->va);
2817                 *out_skb = skb = ring->skb;
2818
2819                 if (ret < 0) /* alloc buffer fail */
2820                         return ret;
2821                 if (ret > 0) { /* need add frag */
2822                         ret = hns3_add_frag(ring, desc, &skb, false);
2823                         if (ret)
2824                                 return ret;
2825
2826                         /* As the head data may be changed when GRO enable, copy
2827                          * the head data in after other data rx completed
2828                          */
2829                         memcpy(skb->data, ring->va,
2830                                ALIGN(ring->pull_len, sizeof(long)));
2831                 }
2832         } else {
2833                 ret = hns3_add_frag(ring, desc, &skb, true);
2834                 if (ret)
2835                         return ret;
2836
2837                 /* As the head data may be changed when GRO enable, copy
2838                  * the head data in after other data rx completed
2839                  */
2840                 memcpy(skb->data, ring->va,
2841                        ALIGN(ring->pull_len, sizeof(long)));
2842         }
2843
2844         ret = hns3_handle_bdinfo(ring, skb, desc);
2845         if (unlikely(ret)) {
2846                 dev_kfree_skb_any(skb);
2847                 return ret;
2848         }
2849
2850         *out_skb = skb;
2851         hns3_set_rx_skb_rss_type(ring, skb);
2852
2853         return 0;
2854 }
2855
2856 int hns3_clean_rx_ring(
2857                 struct hns3_enet_ring *ring, int budget,
2858                 void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
2859 {
2860 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2861         int recv_pkts, recv_bds, clean_count, err;
2862         int unused_count = hns3_desc_unused(ring) - ring->pending_buf;
2863         struct sk_buff *skb = ring->skb;
2864         int num;
2865
2866         num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2867         rmb(); /* Make sure num taken effect before the other data is touched */
2868
2869         recv_pkts = 0, recv_bds = 0, clean_count = 0;
2870         num -= unused_count;
2871
2872         while (recv_pkts < budget && recv_bds < num) {
2873                 /* Reuse or realloc buffers */
2874                 if (clean_count + unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2875                         hns3_nic_alloc_rx_buffers(ring,
2876                                                   clean_count + unused_count);
2877                         clean_count = 0;
2878                         unused_count = hns3_desc_unused(ring) -
2879                                         ring->pending_buf;
2880                 }
2881
2882                 /* Poll one pkt */
2883                 err = hns3_handle_rx_bd(ring, &skb);
2884                 if (unlikely(!skb)) /* This fault cannot be repaired */
2885                         goto out;
2886
2887                 if (err == -ENXIO) { /* Do not get FE for the packet */
2888                         goto out;
2889                 } else if (unlikely(err)) {  /* Do jump the err */
2890                         recv_bds += ring->pending_buf;
2891                         clean_count += ring->pending_buf;
2892                         ring->skb = NULL;
2893                         ring->pending_buf = 0;
2894                         continue;
2895                 }
2896
2897                 rx_fn(ring, skb);
2898                 recv_bds += ring->pending_buf;
2899                 clean_count += ring->pending_buf;
2900                 ring->skb = NULL;
2901                 ring->pending_buf = 0;
2902
2903                 recv_pkts++;
2904         }
2905
2906 out:
2907         /* Make all data has been write before submit */
2908         if (clean_count + unused_count > 0)
2909                 hns3_nic_alloc_rx_buffers(ring,
2910                                           clean_count + unused_count);
2911
2912         return recv_pkts;
2913 }
2914
2915 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
2916 {
2917         struct hns3_enet_tqp_vector *tqp_vector =
2918                                         ring_group->ring->tqp_vector;
2919         enum hns3_flow_level_range new_flow_level;
2920         int packets_per_msecs;
2921         int bytes_per_msecs;
2922         u32 time_passed_ms;
2923         u16 new_int_gl;
2924
2925         if (!tqp_vector->last_jiffies)
2926                 return false;
2927
2928         if (ring_group->total_packets == 0) {
2929                 ring_group->coal.int_gl = HNS3_INT_GL_50K;
2930                 ring_group->coal.flow_level = HNS3_FLOW_LOW;
2931                 return true;
2932         }
2933
2934         /* Simple throttlerate management
2935          * 0-10MB/s   lower     (50000 ints/s)
2936          * 10-20MB/s   middle    (20000 ints/s)
2937          * 20-1249MB/s high      (18000 ints/s)
2938          * > 40000pps  ultra     (8000 ints/s)
2939          */
2940         new_flow_level = ring_group->coal.flow_level;
2941         new_int_gl = ring_group->coal.int_gl;
2942         time_passed_ms =
2943                 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
2944
2945         if (!time_passed_ms)
2946                 return false;
2947
2948         do_div(ring_group->total_packets, time_passed_ms);
2949         packets_per_msecs = ring_group->total_packets;
2950
2951         do_div(ring_group->total_bytes, time_passed_ms);
2952         bytes_per_msecs = ring_group->total_bytes;
2953
2954 #define HNS3_RX_LOW_BYTE_RATE 10000
2955 #define HNS3_RX_MID_BYTE_RATE 20000
2956
2957         switch (new_flow_level) {
2958         case HNS3_FLOW_LOW:
2959                 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
2960                         new_flow_level = HNS3_FLOW_MID;
2961                 break;
2962         case HNS3_FLOW_MID:
2963                 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
2964                         new_flow_level = HNS3_FLOW_HIGH;
2965                 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
2966                         new_flow_level = HNS3_FLOW_LOW;
2967                 break;
2968         case HNS3_FLOW_HIGH:
2969         case HNS3_FLOW_ULTRA:
2970         default:
2971                 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
2972                         new_flow_level = HNS3_FLOW_MID;
2973                 break;
2974         }
2975
2976 #define HNS3_RX_ULTRA_PACKET_RATE 40
2977
2978         if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
2979             &tqp_vector->rx_group == ring_group)
2980                 new_flow_level = HNS3_FLOW_ULTRA;
2981
2982         switch (new_flow_level) {
2983         case HNS3_FLOW_LOW:
2984                 new_int_gl = HNS3_INT_GL_50K;
2985                 break;
2986         case HNS3_FLOW_MID:
2987                 new_int_gl = HNS3_INT_GL_20K;
2988                 break;
2989         case HNS3_FLOW_HIGH:
2990                 new_int_gl = HNS3_INT_GL_18K;
2991                 break;
2992         case HNS3_FLOW_ULTRA:
2993                 new_int_gl = HNS3_INT_GL_8K;
2994                 break;
2995         default:
2996                 break;
2997         }
2998
2999         ring_group->total_bytes = 0;
3000         ring_group->total_packets = 0;
3001         ring_group->coal.flow_level = new_flow_level;
3002         if (new_int_gl != ring_group->coal.int_gl) {
3003                 ring_group->coal.int_gl = new_int_gl;
3004                 return true;
3005         }
3006         return false;
3007 }
3008
3009 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
3010 {
3011         struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
3012         struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
3013         bool rx_update, tx_update;
3014
3015         /* update param every 1000ms */
3016         if (time_before(jiffies,
3017                         tqp_vector->last_jiffies + msecs_to_jiffies(1000)))
3018                 return;
3019
3020         if (rx_group->coal.gl_adapt_enable) {
3021                 rx_update = hns3_get_new_int_gl(rx_group);
3022                 if (rx_update)
3023                         hns3_set_vector_coalesce_rx_gl(tqp_vector,
3024                                                        rx_group->coal.int_gl);
3025         }
3026
3027         if (tx_group->coal.gl_adapt_enable) {
3028                 tx_update = hns3_get_new_int_gl(tx_group);
3029                 if (tx_update)
3030                         hns3_set_vector_coalesce_tx_gl(tqp_vector,
3031                                                        tx_group->coal.int_gl);
3032         }
3033
3034         tqp_vector->last_jiffies = jiffies;
3035 }
3036
3037 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
3038 {
3039         struct hns3_nic_priv *priv = netdev_priv(napi->dev);
3040         struct hns3_enet_ring *ring;
3041         int rx_pkt_total = 0;
3042
3043         struct hns3_enet_tqp_vector *tqp_vector =
3044                 container_of(napi, struct hns3_enet_tqp_vector, napi);
3045         bool clean_complete = true;
3046         int rx_budget = budget;
3047
3048         if (unlikely(test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3049                 napi_complete(napi);
3050                 return 0;
3051         }
3052
3053         /* Since the actual Tx work is minimal, we can give the Tx a larger
3054          * budget and be more aggressive about cleaning up the Tx descriptors.
3055          */
3056         hns3_for_each_ring(ring, tqp_vector->tx_group)
3057                 hns3_clean_tx_ring(ring);
3058
3059         /* make sure rx ring budget not smaller than 1 */
3060         if (tqp_vector->num_tqps > 1)
3061                 rx_budget = max(budget / tqp_vector->num_tqps, 1);
3062
3063         hns3_for_each_ring(ring, tqp_vector->rx_group) {
3064                 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
3065                                                     hns3_rx_skb);
3066
3067                 if (rx_cleaned >= rx_budget)
3068                         clean_complete = false;
3069
3070                 rx_pkt_total += rx_cleaned;
3071         }
3072
3073         tqp_vector->rx_group.total_packets += rx_pkt_total;
3074
3075         if (!clean_complete)
3076                 return budget;
3077
3078         if (napi_complete(napi) &&
3079             likely(!test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3080                 hns3_update_new_int_gl(tqp_vector);
3081                 hns3_mask_vector_irq(tqp_vector, 1);
3082         }
3083
3084         return rx_pkt_total;
3085 }
3086
3087 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3088                                       struct hnae3_ring_chain_node *head)
3089 {
3090         struct pci_dev *pdev = tqp_vector->handle->pdev;
3091         struct hnae3_ring_chain_node *cur_chain = head;
3092         struct hnae3_ring_chain_node *chain;
3093         struct hns3_enet_ring *tx_ring;
3094         struct hns3_enet_ring *rx_ring;
3095
3096         tx_ring = tqp_vector->tx_group.ring;
3097         if (tx_ring) {
3098                 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
3099                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3100                               HNAE3_RING_TYPE_TX);
3101                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3102                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
3103
3104                 cur_chain->next = NULL;
3105
3106                 while (tx_ring->next) {
3107                         tx_ring = tx_ring->next;
3108
3109                         chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
3110                                              GFP_KERNEL);
3111                         if (!chain)
3112                                 goto err_free_chain;
3113
3114                         cur_chain->next = chain;
3115                         chain->tqp_index = tx_ring->tqp->tqp_index;
3116                         hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3117                                       HNAE3_RING_TYPE_TX);
3118                         hnae3_set_field(chain->int_gl_idx,
3119                                         HNAE3_RING_GL_IDX_M,
3120                                         HNAE3_RING_GL_IDX_S,
3121                                         HNAE3_RING_GL_TX);
3122
3123                         cur_chain = chain;
3124                 }
3125         }
3126
3127         rx_ring = tqp_vector->rx_group.ring;
3128         if (!tx_ring && rx_ring) {
3129                 cur_chain->next = NULL;
3130                 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
3131                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3132                               HNAE3_RING_TYPE_RX);
3133                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3134                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3135
3136                 rx_ring = rx_ring->next;
3137         }
3138
3139         while (rx_ring) {
3140                 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
3141                 if (!chain)
3142                         goto err_free_chain;
3143
3144                 cur_chain->next = chain;
3145                 chain->tqp_index = rx_ring->tqp->tqp_index;
3146                 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3147                               HNAE3_RING_TYPE_RX);
3148                 hnae3_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3149                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3150
3151                 cur_chain = chain;
3152
3153                 rx_ring = rx_ring->next;
3154         }
3155
3156         return 0;
3157
3158 err_free_chain:
3159         cur_chain = head->next;
3160         while (cur_chain) {
3161                 chain = cur_chain->next;
3162                 devm_kfree(&pdev->dev, cur_chain);
3163                 cur_chain = chain;
3164         }
3165         head->next = NULL;
3166
3167         return -ENOMEM;
3168 }
3169
3170 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3171                                         struct hnae3_ring_chain_node *head)
3172 {
3173         struct pci_dev *pdev = tqp_vector->handle->pdev;
3174         struct hnae3_ring_chain_node *chain_tmp, *chain;
3175
3176         chain = head->next;
3177
3178         while (chain) {
3179                 chain_tmp = chain->next;
3180                 devm_kfree(&pdev->dev, chain);
3181                 chain = chain_tmp;
3182         }
3183 }
3184
3185 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
3186                                    struct hns3_enet_ring *ring)
3187 {
3188         ring->next = group->ring;
3189         group->ring = ring;
3190
3191         group->count++;
3192 }
3193
3194 static void hns3_nic_set_cpumask(struct hns3_nic_priv *priv)
3195 {
3196         struct pci_dev *pdev = priv->ae_handle->pdev;
3197         struct hns3_enet_tqp_vector *tqp_vector;
3198         int num_vectors = priv->vector_num;
3199         int numa_node;
3200         int vector_i;
3201
3202         numa_node = dev_to_node(&pdev->dev);
3203
3204         for (vector_i = 0; vector_i < num_vectors; vector_i++) {
3205                 tqp_vector = &priv->tqp_vector[vector_i];
3206                 cpumask_set_cpu(cpumask_local_spread(vector_i, numa_node),
3207                                 &tqp_vector->affinity_mask);
3208         }
3209 }
3210
3211 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
3212 {
3213         struct hnae3_ring_chain_node vector_ring_chain;
3214         struct hnae3_handle *h = priv->ae_handle;
3215         struct hns3_enet_tqp_vector *tqp_vector;
3216         int ret = 0;
3217         int i;
3218
3219         hns3_nic_set_cpumask(priv);
3220
3221         for (i = 0; i < priv->vector_num; i++) {
3222                 tqp_vector = &priv->tqp_vector[i];
3223                 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
3224                 tqp_vector->num_tqps = 0;
3225         }
3226
3227         for (i = 0; i < h->kinfo.num_tqps; i++) {
3228                 u16 vector_i = i % priv->vector_num;
3229                 u16 tqp_num = h->kinfo.num_tqps;
3230
3231                 tqp_vector = &priv->tqp_vector[vector_i];
3232
3233                 hns3_add_ring_to_group(&tqp_vector->tx_group,
3234                                        priv->ring_data[i].ring);
3235
3236                 hns3_add_ring_to_group(&tqp_vector->rx_group,
3237                                        priv->ring_data[i + tqp_num].ring);
3238
3239                 priv->ring_data[i].ring->tqp_vector = tqp_vector;
3240                 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
3241                 tqp_vector->num_tqps++;
3242         }
3243
3244         for (i = 0; i < priv->vector_num; i++) {
3245                 tqp_vector = &priv->tqp_vector[i];
3246
3247                 tqp_vector->rx_group.total_bytes = 0;
3248                 tqp_vector->rx_group.total_packets = 0;
3249                 tqp_vector->tx_group.total_bytes = 0;
3250                 tqp_vector->tx_group.total_packets = 0;
3251                 tqp_vector->handle = h;
3252
3253                 ret = hns3_get_vector_ring_chain(tqp_vector,
3254                                                  &vector_ring_chain);
3255                 if (ret)
3256                         goto map_ring_fail;
3257
3258                 ret = h->ae_algo->ops->map_ring_to_vector(h,
3259                         tqp_vector->vector_irq, &vector_ring_chain);
3260
3261                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3262
3263                 if (ret)
3264                         goto map_ring_fail;
3265
3266                 netif_napi_add(priv->netdev, &tqp_vector->napi,
3267                                hns3_nic_common_poll, NAPI_POLL_WEIGHT);
3268         }
3269
3270         return 0;
3271
3272 map_ring_fail:
3273         while (i--)
3274                 netif_napi_del(&priv->tqp_vector[i].napi);
3275
3276         return ret;
3277 }
3278
3279 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
3280 {
3281 #define HNS3_VECTOR_PF_MAX_NUM          64
3282
3283         struct hnae3_handle *h = priv->ae_handle;
3284         struct hns3_enet_tqp_vector *tqp_vector;
3285         struct hnae3_vector_info *vector;
3286         struct pci_dev *pdev = h->pdev;
3287         u16 tqp_num = h->kinfo.num_tqps;
3288         u16 vector_num;
3289         int ret = 0;
3290         u16 i;
3291
3292         /* RSS size, cpu online and vector_num should be the same */
3293         /* Should consider 2p/4p later */
3294         vector_num = min_t(u16, num_online_cpus(), tqp_num);
3295         vector_num = min_t(u16, vector_num, HNS3_VECTOR_PF_MAX_NUM);
3296
3297         vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
3298                               GFP_KERNEL);
3299         if (!vector)
3300                 return -ENOMEM;
3301
3302         vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
3303
3304         priv->vector_num = vector_num;
3305         priv->tqp_vector = (struct hns3_enet_tqp_vector *)
3306                 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
3307                              GFP_KERNEL);
3308         if (!priv->tqp_vector) {
3309                 ret = -ENOMEM;
3310                 goto out;
3311         }
3312
3313         for (i = 0; i < priv->vector_num; i++) {
3314                 tqp_vector = &priv->tqp_vector[i];
3315                 tqp_vector->idx = i;
3316                 tqp_vector->mask_addr = vector[i].io_addr;
3317                 tqp_vector->vector_irq = vector[i].vector;
3318                 hns3_vector_gl_rl_init(tqp_vector, priv);
3319         }
3320
3321 out:
3322         devm_kfree(&pdev->dev, vector);
3323         return ret;
3324 }
3325
3326 static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
3327 {
3328         group->ring = NULL;
3329         group->count = 0;
3330 }
3331
3332 static void hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
3333 {
3334         struct hnae3_ring_chain_node vector_ring_chain;
3335         struct hnae3_handle *h = priv->ae_handle;
3336         struct hns3_enet_tqp_vector *tqp_vector;
3337         int i;
3338
3339         for (i = 0; i < priv->vector_num; i++) {
3340                 tqp_vector = &priv->tqp_vector[i];
3341
3342                 if (!tqp_vector->rx_group.ring && !tqp_vector->tx_group.ring)
3343                         continue;
3344
3345                 hns3_get_vector_ring_chain(tqp_vector, &vector_ring_chain);
3346
3347                 h->ae_algo->ops->unmap_ring_from_vector(h,
3348                         tqp_vector->vector_irq, &vector_ring_chain);
3349
3350                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3351
3352                 if (tqp_vector->irq_init_flag == HNS3_VECTOR_INITED) {
3353                         irq_set_affinity_notifier(tqp_vector->vector_irq,
3354                                                   NULL);
3355                         irq_set_affinity_hint(tqp_vector->vector_irq, NULL);
3356                         free_irq(tqp_vector->vector_irq, tqp_vector);
3357                         tqp_vector->irq_init_flag = HNS3_VECTOR_NOT_INITED;
3358                 }
3359
3360                 hns3_clear_ring_group(&tqp_vector->rx_group);
3361                 hns3_clear_ring_group(&tqp_vector->tx_group);
3362                 netif_napi_del(&priv->tqp_vector[i].napi);
3363         }
3364 }
3365
3366 static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
3367 {
3368         struct hnae3_handle *h = priv->ae_handle;
3369         struct pci_dev *pdev = h->pdev;
3370         int i, ret;
3371
3372         for (i = 0; i < priv->vector_num; i++) {
3373                 struct hns3_enet_tqp_vector *tqp_vector;
3374
3375                 tqp_vector = &priv->tqp_vector[i];
3376                 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
3377                 if (ret)
3378                         return ret;
3379         }
3380
3381         devm_kfree(&pdev->dev, priv->tqp_vector);
3382         return 0;
3383 }
3384
3385 static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
3386                              int ring_type)
3387 {
3388         struct hns3_nic_ring_data *ring_data = priv->ring_data;
3389         int queue_num = priv->ae_handle->kinfo.num_tqps;
3390         struct pci_dev *pdev = priv->ae_handle->pdev;
3391         struct hns3_enet_ring *ring;
3392         int desc_num;
3393
3394         ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
3395         if (!ring)
3396                 return -ENOMEM;
3397
3398         if (ring_type == HNAE3_RING_TYPE_TX) {
3399                 desc_num = priv->ae_handle->kinfo.num_tx_desc;
3400                 ring_data[q->tqp_index].ring = ring;
3401                 ring_data[q->tqp_index].queue_index = q->tqp_index;
3402                 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
3403         } else {
3404                 desc_num = priv->ae_handle->kinfo.num_rx_desc;
3405                 ring_data[q->tqp_index + queue_num].ring = ring;
3406                 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
3407                 ring->io_base = q->io_base;
3408         }
3409
3410         hnae3_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
3411
3412         ring->tqp = q;
3413         ring->desc = NULL;
3414         ring->desc_cb = NULL;
3415         ring->dev = priv->dev;
3416         ring->desc_dma_addr = 0;
3417         ring->buf_size = q->buf_size;
3418         ring->desc_num = desc_num;
3419         ring->next_to_use = 0;
3420         ring->next_to_clean = 0;
3421
3422         return 0;
3423 }
3424
3425 static int hns3_queue_to_ring(struct hnae3_queue *tqp,
3426                               struct hns3_nic_priv *priv)
3427 {
3428         int ret;
3429
3430         ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
3431         if (ret)
3432                 return ret;
3433
3434         ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
3435         if (ret) {
3436                 devm_kfree(priv->dev, priv->ring_data[tqp->tqp_index].ring);
3437                 return ret;
3438         }
3439
3440         return 0;
3441 }
3442
3443 static int hns3_get_ring_config(struct hns3_nic_priv *priv)
3444 {
3445         struct hnae3_handle *h = priv->ae_handle;
3446         struct pci_dev *pdev = h->pdev;
3447         int i, ret;
3448
3449         priv->ring_data =  devm_kzalloc(&pdev->dev,
3450                                         array3_size(h->kinfo.num_tqps,
3451                                                     sizeof(*priv->ring_data),
3452                                                     2),
3453                                         GFP_KERNEL);
3454         if (!priv->ring_data)
3455                 return -ENOMEM;
3456
3457         for (i = 0; i < h->kinfo.num_tqps; i++) {
3458                 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
3459                 if (ret)
3460                         goto err;
3461         }
3462
3463         return 0;
3464 err:
3465         while (i--) {
3466                 devm_kfree(priv->dev, priv->ring_data[i].ring);
3467                 devm_kfree(priv->dev,
3468                            priv->ring_data[i + h->kinfo.num_tqps].ring);
3469         }
3470
3471         devm_kfree(&pdev->dev, priv->ring_data);
3472         return ret;
3473 }
3474
3475 static void hns3_put_ring_config(struct hns3_nic_priv *priv)
3476 {
3477         struct hnae3_handle *h = priv->ae_handle;
3478         int i;
3479
3480         for (i = 0; i < h->kinfo.num_tqps; i++) {
3481                 devm_kfree(priv->dev, priv->ring_data[i].ring);
3482                 devm_kfree(priv->dev,
3483                            priv->ring_data[i + h->kinfo.num_tqps].ring);
3484         }
3485         devm_kfree(priv->dev, priv->ring_data);
3486 }
3487
3488 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
3489 {
3490         int ret;
3491
3492         if (ring->desc_num <= 0 || ring->buf_size <= 0)
3493                 return -EINVAL;
3494
3495         ring->desc_cb = kcalloc(ring->desc_num, sizeof(ring->desc_cb[0]),
3496                                 GFP_KERNEL);
3497         if (!ring->desc_cb) {
3498                 ret = -ENOMEM;
3499                 goto out;
3500         }
3501
3502         ret = hns3_alloc_desc(ring);
3503         if (ret)
3504                 goto out_with_desc_cb;
3505
3506         if (!HNAE3_IS_TX_RING(ring)) {
3507                 ret = hns3_alloc_ring_buffers(ring);
3508                 if (ret)
3509                         goto out_with_desc;
3510         }
3511
3512         return 0;
3513
3514 out_with_desc:
3515         hns3_free_desc(ring);
3516 out_with_desc_cb:
3517         kfree(ring->desc_cb);
3518         ring->desc_cb = NULL;
3519 out:
3520         return ret;
3521 }
3522
3523 static void hns3_fini_ring(struct hns3_enet_ring *ring)
3524 {
3525         hns3_free_desc(ring);
3526         kfree(ring->desc_cb);
3527         ring->desc_cb = NULL;
3528         ring->next_to_clean = 0;
3529         ring->next_to_use = 0;
3530         ring->pending_buf = 0;
3531         if (ring->skb) {
3532                 dev_kfree_skb_any(ring->skb);
3533                 ring->skb = NULL;
3534         }
3535 }
3536
3537 static int hns3_buf_size2type(u32 buf_size)
3538 {
3539         int bd_size_type;
3540
3541         switch (buf_size) {
3542         case 512:
3543                 bd_size_type = HNS3_BD_SIZE_512_TYPE;
3544                 break;
3545         case 1024:
3546                 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
3547                 break;
3548         case 2048:
3549                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3550                 break;
3551         case 4096:
3552                 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
3553                 break;
3554         default:
3555                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3556         }
3557
3558         return bd_size_type;
3559 }
3560
3561 static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
3562 {
3563         dma_addr_t dma = ring->desc_dma_addr;
3564         struct hnae3_queue *q = ring->tqp;
3565
3566         if (!HNAE3_IS_TX_RING(ring)) {
3567                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG,
3568                                (u32)dma);
3569                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
3570                                (u32)((dma >> 31) >> 1));
3571
3572                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
3573                                hns3_buf_size2type(ring->buf_size));
3574                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
3575                                ring->desc_num / 8 - 1);
3576
3577         } else {
3578                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
3579                                (u32)dma);
3580                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
3581                                (u32)((dma >> 31) >> 1));
3582
3583                 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3584                                ring->desc_num / 8 - 1);
3585         }
3586 }
3587
3588 static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
3589 {
3590         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3591         int i;
3592
3593         for (i = 0; i < HNAE3_MAX_TC; i++) {
3594                 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3595                 int j;
3596
3597                 if (!tc_info->enable)
3598                         continue;
3599
3600                 for (j = 0; j < tc_info->tqp_count; j++) {
3601                         struct hnae3_queue *q;
3602
3603                         q = priv->ring_data[tc_info->tqp_offset + j].ring->tqp;
3604                         hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
3605                                        tc_info->tc);
3606                 }
3607         }
3608 }
3609
3610 int hns3_init_all_ring(struct hns3_nic_priv *priv)
3611 {
3612         struct hnae3_handle *h = priv->ae_handle;
3613         int ring_num = h->kinfo.num_tqps * 2;
3614         int i, j;
3615         int ret;
3616
3617         for (i = 0; i < ring_num; i++) {
3618                 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
3619                 if (ret) {
3620                         dev_err(priv->dev,
3621                                 "Alloc ring memory fail! ret=%d\n", ret);
3622                         goto out_when_alloc_ring_memory;
3623                 }
3624
3625                 u64_stats_init(&priv->ring_data[i].ring->syncp);
3626         }
3627
3628         return 0;
3629
3630 out_when_alloc_ring_memory:
3631         for (j = i - 1; j >= 0; j--)
3632                 hns3_fini_ring(priv->ring_data[j].ring);
3633
3634         return -ENOMEM;
3635 }
3636
3637 int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
3638 {
3639         struct hnae3_handle *h = priv->ae_handle;
3640         int i;
3641
3642         for (i = 0; i < h->kinfo.num_tqps; i++) {
3643                 hns3_fini_ring(priv->ring_data[i].ring);
3644                 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
3645         }
3646         return 0;
3647 }
3648
3649 /* Set mac addr if it is configured. or leave it to the AE driver */
3650 static int hns3_init_mac_addr(struct net_device *netdev, bool init)
3651 {
3652         struct hns3_nic_priv *priv = netdev_priv(netdev);
3653         struct hnae3_handle *h = priv->ae_handle;
3654         u8 mac_addr_temp[ETH_ALEN];
3655         int ret = 0;
3656
3657         if (h->ae_algo->ops->get_mac_addr && init) {
3658                 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3659                 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3660         }
3661
3662         /* Check if the MAC address is valid, if not get a random one */
3663         if (!is_valid_ether_addr(netdev->dev_addr)) {
3664                 eth_hw_addr_random(netdev);
3665                 dev_warn(priv->dev, "using random MAC address %pM\n",
3666                          netdev->dev_addr);
3667         }
3668
3669         if (h->ae_algo->ops->set_mac_addr)
3670                 ret = h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
3671
3672         return ret;
3673 }
3674
3675 static int hns3_init_phy(struct net_device *netdev)
3676 {
3677         struct hnae3_handle *h = hns3_get_handle(netdev);
3678         int ret = 0;
3679
3680         if (h->ae_algo->ops->mac_connect_phy)
3681                 ret = h->ae_algo->ops->mac_connect_phy(h);
3682
3683         return ret;
3684 }
3685
3686 static void hns3_uninit_phy(struct net_device *netdev)
3687 {
3688         struct hnae3_handle *h = hns3_get_handle(netdev);
3689
3690         if (h->ae_algo->ops->mac_disconnect_phy)
3691                 h->ae_algo->ops->mac_disconnect_phy(h);
3692 }
3693
3694 static int hns3_restore_fd_rules(struct net_device *netdev)
3695 {
3696         struct hnae3_handle *h = hns3_get_handle(netdev);
3697         int ret = 0;
3698
3699         if (h->ae_algo->ops->restore_fd_rules)
3700                 ret = h->ae_algo->ops->restore_fd_rules(h);
3701
3702         return ret;
3703 }
3704
3705 static void hns3_del_all_fd_rules(struct net_device *netdev, bool clear_list)
3706 {
3707         struct hnae3_handle *h = hns3_get_handle(netdev);
3708
3709         if (h->ae_algo->ops->del_all_fd_entries)
3710                 h->ae_algo->ops->del_all_fd_entries(h, clear_list);
3711 }
3712
3713 static void hns3_nic_set_priv_ops(struct net_device *netdev)
3714 {
3715         struct hns3_nic_priv *priv = netdev_priv(netdev);
3716
3717         if ((netdev->features & NETIF_F_TSO) ||
3718             (netdev->features & NETIF_F_TSO6))
3719                 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
3720         else
3721                 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
3722 }
3723
3724 static int hns3_client_start(struct hnae3_handle *handle)
3725 {
3726         if (!handle->ae_algo->ops->client_start)
3727                 return 0;
3728
3729         return handle->ae_algo->ops->client_start(handle);
3730 }
3731
3732 static void hns3_client_stop(struct hnae3_handle *handle)
3733 {
3734         if (!handle->ae_algo->ops->client_stop)
3735                 return;
3736
3737         handle->ae_algo->ops->client_stop(handle);
3738 }
3739
3740 static int hns3_client_init(struct hnae3_handle *handle)
3741 {
3742         struct pci_dev *pdev = handle->pdev;
3743         u16 alloc_tqps, max_rss_size;
3744         struct hns3_nic_priv *priv;
3745         struct net_device *netdev;
3746         int ret;
3747
3748         handle->ae_algo->ops->get_tqps_and_rss_info(handle, &alloc_tqps,
3749                                                     &max_rss_size);
3750         netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);
3751         if (!netdev)
3752                 return -ENOMEM;
3753
3754         priv = netdev_priv(netdev);
3755         priv->dev = &pdev->dev;
3756         priv->netdev = netdev;
3757         priv->ae_handle = handle;
3758         priv->tx_timeout_count = 0;
3759         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
3760
3761         handle->kinfo.netdev = netdev;
3762         handle->priv = (void *)priv;
3763
3764         hns3_init_mac_addr(netdev, true);
3765
3766         hns3_set_default_feature(netdev);
3767
3768         netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3769         netdev->priv_flags |= IFF_UNICAST_FLT;
3770         netdev->netdev_ops = &hns3_nic_netdev_ops;
3771         SET_NETDEV_DEV(netdev, &pdev->dev);
3772         hns3_ethtool_set_ops(netdev);
3773         hns3_nic_set_priv_ops(netdev);
3774
3775         /* Carrier off reporting is important to ethtool even BEFORE open */
3776         netif_carrier_off(netdev);
3777
3778         ret = hns3_get_ring_config(priv);
3779         if (ret) {
3780                 ret = -ENOMEM;
3781                 goto out_get_ring_cfg;
3782         }
3783
3784         ret = hns3_nic_alloc_vector_data(priv);
3785         if (ret) {
3786                 ret = -ENOMEM;
3787                 goto out_alloc_vector_data;
3788         }
3789
3790         ret = hns3_nic_init_vector_data(priv);
3791         if (ret) {
3792                 ret = -ENOMEM;
3793                 goto out_init_vector_data;
3794         }
3795
3796         ret = hns3_init_all_ring(priv);
3797         if (ret) {
3798                 ret = -ENOMEM;
3799                 goto out_init_ring_data;
3800         }
3801
3802         ret = hns3_init_phy(netdev);
3803         if (ret)
3804                 goto out_init_phy;
3805
3806         ret = register_netdev(netdev);
3807         if (ret) {
3808                 dev_err(priv->dev, "probe register netdev fail!\n");
3809                 goto out_reg_netdev_fail;
3810         }
3811
3812         ret = hns3_client_start(handle);
3813         if (ret) {
3814                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
3815                         goto out_client_start;
3816         }
3817
3818         hns3_dcbnl_setup(handle);
3819
3820         hns3_dbg_init(handle);
3821
3822         /* MTU range: (ETH_MIN_MTU(kernel default) - 9702) */
3823         netdev->max_mtu = HNS3_MAX_MTU;
3824
3825         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
3826
3827         return ret;
3828
3829 out_client_start:
3830         unregister_netdev(netdev);
3831 out_reg_netdev_fail:
3832         hns3_uninit_phy(netdev);
3833 out_init_phy:
3834         hns3_uninit_all_ring(priv);
3835 out_init_ring_data:
3836         hns3_nic_uninit_vector_data(priv);
3837 out_init_vector_data:
3838         hns3_nic_dealloc_vector_data(priv);
3839 out_alloc_vector_data:
3840         priv->ring_data = NULL;
3841 out_get_ring_cfg:
3842         priv->ae_handle = NULL;
3843         free_netdev(netdev);
3844         return ret;
3845 }
3846
3847 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
3848 {
3849         struct net_device *netdev = handle->kinfo.netdev;
3850         struct hns3_nic_priv *priv = netdev_priv(netdev);
3851         int ret;
3852
3853         hns3_remove_hw_addr(netdev);
3854
3855         if (netdev->reg_state != NETREG_UNINITIALIZED)
3856                 unregister_netdev(netdev);
3857
3858         hns3_client_stop(handle);
3859
3860         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
3861                 netdev_warn(netdev, "already uninitialized\n");
3862                 goto out_netdev_free;
3863         }
3864
3865         hns3_del_all_fd_rules(netdev, true);
3866
3867         hns3_force_clear_all_rx_ring(handle);
3868
3869         hns3_uninit_phy(netdev);
3870
3871         hns3_nic_uninit_vector_data(priv);
3872
3873         ret = hns3_nic_dealloc_vector_data(priv);
3874         if (ret)
3875                 netdev_err(netdev, "dealloc vector error\n");
3876
3877         ret = hns3_uninit_all_ring(priv);
3878         if (ret)
3879                 netdev_err(netdev, "uninit ring error\n");
3880
3881         hns3_put_ring_config(priv);
3882
3883         hns3_dbg_uninit(handle);
3884
3885         priv->ring_data = NULL;
3886
3887 out_netdev_free:
3888         free_netdev(netdev);
3889 }
3890
3891 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
3892 {
3893         struct net_device *netdev = handle->kinfo.netdev;
3894
3895         if (!netdev)
3896                 return;
3897
3898         if (linkup) {
3899                 netif_carrier_on(netdev);
3900                 netif_tx_wake_all_queues(netdev);
3901                 netdev_info(netdev, "link up\n");
3902         } else {
3903                 netif_carrier_off(netdev);
3904                 netif_tx_stop_all_queues(netdev);
3905                 netdev_info(netdev, "link down\n");
3906         }
3907 }
3908
3909 static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
3910 {
3911         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3912         struct net_device *ndev = kinfo->netdev;
3913
3914         if (tc > HNAE3_MAX_TC)
3915                 return -EINVAL;
3916
3917         if (!ndev)
3918                 return -ENODEV;
3919
3920         return hns3_nic_set_real_num_queue(ndev);
3921 }
3922
3923 static int hns3_recover_hw_addr(struct net_device *ndev)
3924 {
3925         struct netdev_hw_addr_list *list;
3926         struct netdev_hw_addr *ha, *tmp;
3927         int ret = 0;
3928
3929         netif_addr_lock_bh(ndev);
3930         /* go through and sync uc_addr entries to the device */
3931         list = &ndev->uc;
3932         list_for_each_entry_safe(ha, tmp, &list->list, list) {
3933                 ret = hns3_nic_uc_sync(ndev, ha->addr);
3934                 if (ret)
3935                         goto out;
3936         }
3937
3938         /* go through and sync mc_addr entries to the device */
3939         list = &ndev->mc;
3940         list_for_each_entry_safe(ha, tmp, &list->list, list) {
3941                 ret = hns3_nic_mc_sync(ndev, ha->addr);
3942                 if (ret)
3943                         goto out;
3944         }
3945
3946 out:
3947         netif_addr_unlock_bh(ndev);
3948         return ret;
3949 }
3950
3951 static void hns3_remove_hw_addr(struct net_device *netdev)
3952 {
3953         struct netdev_hw_addr_list *list;
3954         struct netdev_hw_addr *ha, *tmp;
3955
3956         hns3_nic_uc_unsync(netdev, netdev->dev_addr);
3957
3958         netif_addr_lock_bh(netdev);
3959         /* go through and unsync uc_addr entries to the device */
3960         list = &netdev->uc;
3961         list_for_each_entry_safe(ha, tmp, &list->list, list)
3962                 hns3_nic_uc_unsync(netdev, ha->addr);
3963
3964         /* go through and unsync mc_addr entries to the device */
3965         list = &netdev->mc;
3966         list_for_each_entry_safe(ha, tmp, &list->list, list)
3967                 if (ha->refcount > 1)
3968                         hns3_nic_mc_unsync(netdev, ha->addr);
3969
3970         netif_addr_unlock_bh(netdev);
3971 }
3972
3973 static void hns3_clear_tx_ring(struct hns3_enet_ring *ring)
3974 {
3975         while (ring->next_to_clean != ring->next_to_use) {
3976                 ring->desc[ring->next_to_clean].tx.bdtp_fe_sc_vld_ra_ri = 0;
3977                 hns3_free_buffer_detach(ring, ring->next_to_clean);
3978                 ring_ptr_move_fw(ring, next_to_clean);
3979         }
3980 }
3981
3982 static int hns3_clear_rx_ring(struct hns3_enet_ring *ring)
3983 {
3984         struct hns3_desc_cb res_cbs;
3985         int ret;
3986
3987         while (ring->next_to_use != ring->next_to_clean) {
3988                 /* When a buffer is not reused, it's memory has been
3989                  * freed in hns3_handle_rx_bd or will be freed by
3990                  * stack, so we need to replace the buffer here.
3991                  */
3992                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
3993                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
3994                         if (ret) {
3995                                 u64_stats_update_begin(&ring->syncp);
3996                                 ring->stats.sw_err_cnt++;
3997                                 u64_stats_update_end(&ring->syncp);
3998                                 /* if alloc new buffer fail, exit directly
3999                                  * and reclear in up flow.
4000                                  */
4001                                 netdev_warn(ring->tqp->handle->kinfo.netdev,
4002                                             "reserve buffer map failed, ret = %d\n",
4003                                             ret);
4004                                 return ret;
4005                         }
4006                         hns3_replace_buffer(ring, ring->next_to_use,
4007                                             &res_cbs);
4008                 }
4009                 ring_ptr_move_fw(ring, next_to_use);
4010         }
4011
4012         /* Free the pending skb in rx ring */
4013         if (ring->skb) {
4014                 dev_kfree_skb_any(ring->skb);
4015                 ring->skb = NULL;
4016                 ring->pending_buf = 0;
4017         }
4018
4019         return 0;
4020 }
4021
4022 static void hns3_force_clear_rx_ring(struct hns3_enet_ring *ring)
4023 {
4024         while (ring->next_to_use != ring->next_to_clean) {
4025                 /* When a buffer is not reused, it's memory has been
4026                  * freed in hns3_handle_rx_bd or will be freed by
4027                  * stack, so only need to unmap the buffer here.
4028                  */
4029                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4030                         hns3_unmap_buffer(ring,
4031                                           &ring->desc_cb[ring->next_to_use]);
4032                         ring->desc_cb[ring->next_to_use].dma = 0;
4033                 }
4034
4035                 ring_ptr_move_fw(ring, next_to_use);
4036         }
4037 }
4038
4039 static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h)
4040 {
4041         struct net_device *ndev = h->kinfo.netdev;
4042         struct hns3_nic_priv *priv = netdev_priv(ndev);
4043         struct hns3_enet_ring *ring;
4044         u32 i;
4045
4046         for (i = 0; i < h->kinfo.num_tqps; i++) {
4047                 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4048                 hns3_force_clear_rx_ring(ring);
4049         }
4050 }
4051
4052 static void hns3_clear_all_ring(struct hnae3_handle *h)
4053 {
4054         struct net_device *ndev = h->kinfo.netdev;
4055         struct hns3_nic_priv *priv = netdev_priv(ndev);
4056         u32 i;
4057
4058         for (i = 0; i < h->kinfo.num_tqps; i++) {
4059                 struct netdev_queue *dev_queue;
4060                 struct hns3_enet_ring *ring;
4061
4062                 ring = priv->ring_data[i].ring;
4063                 hns3_clear_tx_ring(ring);
4064                 dev_queue = netdev_get_tx_queue(ndev,
4065                                                 priv->ring_data[i].queue_index);
4066                 netdev_tx_reset_queue(dev_queue);
4067
4068                 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4069                 /* Continue to clear other rings even if clearing some
4070                  * rings failed.
4071                  */
4072                 hns3_clear_rx_ring(ring);
4073         }
4074 }
4075
4076 int hns3_nic_reset_all_ring(struct hnae3_handle *h)
4077 {
4078         struct net_device *ndev = h->kinfo.netdev;
4079         struct hns3_nic_priv *priv = netdev_priv(ndev);
4080         struct hns3_enet_ring *rx_ring;
4081         int i, j;
4082         int ret;
4083
4084         for (i = 0; i < h->kinfo.num_tqps; i++) {
4085                 ret = h->ae_algo->ops->reset_queue(h, i);
4086                 if (ret)
4087                         return ret;
4088
4089                 hns3_init_ring_hw(priv->ring_data[i].ring);
4090
4091                 /* We need to clear tx ring here because self test will
4092                  * use the ring and will not run down before up
4093                  */
4094                 hns3_clear_tx_ring(priv->ring_data[i].ring);
4095                 priv->ring_data[i].ring->next_to_clean = 0;
4096                 priv->ring_data[i].ring->next_to_use = 0;
4097
4098                 rx_ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4099                 hns3_init_ring_hw(rx_ring);
4100                 ret = hns3_clear_rx_ring(rx_ring);
4101                 if (ret)
4102                         return ret;
4103
4104                 /* We can not know the hardware head and tail when this
4105                  * function is called in reset flow, so we reuse all desc.
4106                  */
4107                 for (j = 0; j < rx_ring->desc_num; j++)
4108                         hns3_reuse_buffer(rx_ring, j);
4109
4110                 rx_ring->next_to_clean = 0;
4111                 rx_ring->next_to_use = 0;
4112         }
4113
4114         hns3_init_tx_ring_tc(priv);
4115
4116         return 0;
4117 }
4118
4119 static void hns3_store_coal(struct hns3_nic_priv *priv)
4120 {
4121         /* ethtool only support setting and querying one coal
4122          * configuation for now, so save the vector 0' coal
4123          * configuation here in order to restore it.
4124          */
4125         memcpy(&priv->tx_coal, &priv->tqp_vector[0].tx_group.coal,
4126                sizeof(struct hns3_enet_coalesce));
4127         memcpy(&priv->rx_coal, &priv->tqp_vector[0].rx_group.coal,
4128                sizeof(struct hns3_enet_coalesce));
4129 }
4130
4131 static void hns3_restore_coal(struct hns3_nic_priv *priv)
4132 {
4133         u16 vector_num = priv->vector_num;
4134         int i;
4135
4136         for (i = 0; i < vector_num; i++) {
4137                 memcpy(&priv->tqp_vector[i].tx_group.coal, &priv->tx_coal,
4138                        sizeof(struct hns3_enet_coalesce));
4139                 memcpy(&priv->tqp_vector[i].rx_group.coal, &priv->rx_coal,
4140                        sizeof(struct hns3_enet_coalesce));
4141         }
4142 }
4143
4144 static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
4145 {
4146         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
4147         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4148         struct net_device *ndev = kinfo->netdev;
4149         struct hns3_nic_priv *priv = netdev_priv(ndev);
4150
4151         if (test_and_set_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
4152                 return 0;
4153
4154         /* it is cumbersome for hardware to pick-and-choose entries for deletion
4155          * from table space. Hence, for function reset software intervention is
4156          * required to delete the entries
4157          */
4158         if (hns3_dev_ongoing_func_reset(ae_dev)) {
4159                 hns3_remove_hw_addr(ndev);
4160                 hns3_del_all_fd_rules(ndev, false);
4161         }
4162
4163         if (!netif_running(ndev))
4164                 return 0;
4165
4166         return hns3_nic_net_stop(ndev);
4167 }
4168
4169 static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
4170 {
4171         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4172         struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
4173         int ret = 0;
4174
4175         clear_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4176
4177         if (netif_running(kinfo->netdev)) {
4178                 ret = hns3_nic_net_open(kinfo->netdev);
4179                 if (ret) {
4180                         set_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4181                         netdev_err(kinfo->netdev,
4182                                    "hns net up fail, ret=%d!\n", ret);
4183                         return ret;
4184                 }
4185         }
4186
4187         return ret;
4188 }
4189
4190 static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
4191 {
4192         struct net_device *netdev = handle->kinfo.netdev;
4193         struct hns3_nic_priv *priv = netdev_priv(netdev);
4194         int ret;
4195
4196         /* Carrier off reporting is important to ethtool even BEFORE open */
4197         netif_carrier_off(netdev);
4198
4199         ret = hns3_get_ring_config(priv);
4200         if (ret)
4201                 return ret;
4202
4203         ret = hns3_nic_alloc_vector_data(priv);
4204         if (ret)
4205                 goto err_put_ring;
4206
4207         hns3_restore_coal(priv);
4208
4209         ret = hns3_nic_init_vector_data(priv);
4210         if (ret)
4211                 goto err_dealloc_vector;
4212
4213         ret = hns3_init_all_ring(priv);
4214         if (ret)
4215                 goto err_uninit_vector;
4216
4217         ret = hns3_client_start(handle);
4218         if (ret) {
4219                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4220                 goto err_uninit_ring;
4221         }
4222
4223         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4224
4225         return ret;
4226
4227 err_uninit_ring:
4228         hns3_uninit_all_ring(priv);
4229 err_uninit_vector:
4230         hns3_nic_uninit_vector_data(priv);
4231         priv->ring_data = NULL;
4232 err_dealloc_vector:
4233         hns3_nic_dealloc_vector_data(priv);
4234 err_put_ring:
4235         hns3_put_ring_config(priv);
4236         priv->ring_data = NULL;
4237
4238         return ret;
4239 }
4240
4241 static int hns3_reset_notify_restore_enet(struct hnae3_handle *handle)
4242 {
4243         struct net_device *netdev = handle->kinfo.netdev;
4244         bool vlan_filter_enable;
4245         int ret;
4246
4247         ret = hns3_init_mac_addr(netdev, false);
4248         if (ret)
4249                 return ret;
4250
4251         ret = hns3_recover_hw_addr(netdev);
4252         if (ret)
4253                 return ret;
4254
4255         ret = hns3_update_promisc_mode(netdev, handle->netdev_flags);
4256         if (ret)
4257                 return ret;
4258
4259         vlan_filter_enable = netdev->flags & IFF_PROMISC ? false : true;
4260         hns3_enable_vlan_filter(netdev, vlan_filter_enable);
4261
4262         /* Hardware table is only clear when pf resets */
4263         if (!(handle->flags & HNAE3_SUPPORT_VF)) {
4264                 ret = hns3_restore_vlan(netdev);
4265                 if (ret)
4266                         return ret;
4267         }
4268
4269         return hns3_restore_fd_rules(netdev);
4270 }
4271
4272 static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
4273 {
4274         struct net_device *netdev = handle->kinfo.netdev;
4275         struct hns3_nic_priv *priv = netdev_priv(netdev);
4276         int ret;
4277
4278         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4279                 netdev_warn(netdev, "already uninitialized\n");
4280                 return 0;
4281         }
4282
4283         hns3_force_clear_all_rx_ring(handle);
4284
4285         hns3_nic_uninit_vector_data(priv);
4286
4287         hns3_store_coal(priv);
4288
4289         ret = hns3_nic_dealloc_vector_data(priv);
4290         if (ret)
4291                 netdev_err(netdev, "dealloc vector error\n");
4292
4293         ret = hns3_uninit_all_ring(priv);
4294         if (ret)
4295                 netdev_err(netdev, "uninit ring error\n");
4296
4297         hns3_put_ring_config(priv);
4298         priv->ring_data = NULL;
4299
4300         return ret;
4301 }
4302
4303 static int hns3_reset_notify(struct hnae3_handle *handle,
4304                              enum hnae3_reset_notify_type type)
4305 {
4306         int ret = 0;
4307
4308         switch (type) {
4309         case HNAE3_UP_CLIENT:
4310                 ret = hns3_reset_notify_up_enet(handle);
4311                 break;
4312         case HNAE3_DOWN_CLIENT:
4313                 ret = hns3_reset_notify_down_enet(handle);
4314                 break;
4315         case HNAE3_INIT_CLIENT:
4316                 ret = hns3_reset_notify_init_enet(handle);
4317                 break;
4318         case HNAE3_UNINIT_CLIENT:
4319                 ret = hns3_reset_notify_uninit_enet(handle);
4320                 break;
4321         case HNAE3_RESTORE_CLIENT:
4322                 ret = hns3_reset_notify_restore_enet(handle);
4323                 break;
4324         default:
4325                 break;
4326         }
4327
4328         return ret;
4329 }
4330
4331 int hns3_set_channels(struct net_device *netdev,
4332                       struct ethtool_channels *ch)
4333 {
4334         struct hnae3_handle *h = hns3_get_handle(netdev);
4335         struct hnae3_knic_private_info *kinfo = &h->kinfo;
4336         bool rxfh_configured = netif_is_rxfh_configured(netdev);
4337         u32 new_tqp_num = ch->combined_count;
4338         u16 org_tqp_num;
4339         int ret;
4340
4341         if (ch->rx_count || ch->tx_count)
4342                 return -EINVAL;
4343
4344         if (new_tqp_num > hns3_get_max_available_channels(h) ||
4345             new_tqp_num < 1) {
4346                 dev_err(&netdev->dev,
4347                         "Change tqps fail, the tqp range is from 1 to %d",
4348                         hns3_get_max_available_channels(h));
4349                 return -EINVAL;
4350         }
4351
4352         if (kinfo->rss_size == new_tqp_num)
4353                 return 0;
4354
4355         ret = hns3_reset_notify(h, HNAE3_DOWN_CLIENT);
4356         if (ret)
4357                 return ret;
4358
4359         ret = hns3_reset_notify(h, HNAE3_UNINIT_CLIENT);
4360         if (ret)
4361                 return ret;
4362
4363         org_tqp_num = h->kinfo.num_tqps;
4364         ret = h->ae_algo->ops->set_channels(h, new_tqp_num, rxfh_configured);
4365         if (ret) {
4366                 ret = h->ae_algo->ops->set_channels(h, org_tqp_num,
4367                                                     rxfh_configured);
4368                 if (ret) {
4369                         /* If revert to old tqp failed, fatal error occurred */
4370                         dev_err(&netdev->dev,
4371                                 "Revert to old tqp num fail, ret=%d", ret);
4372                         return ret;
4373                 }
4374                 dev_info(&netdev->dev,
4375                          "Change tqp num fail, Revert to old tqp num");
4376         }
4377         ret = hns3_reset_notify(h, HNAE3_INIT_CLIENT);
4378         if (ret)
4379                 return ret;
4380
4381         return hns3_reset_notify(h, HNAE3_UP_CLIENT);
4382 }
4383
4384 static const struct hnae3_client_ops client_ops = {
4385         .init_instance = hns3_client_init,
4386         .uninit_instance = hns3_client_uninit,
4387         .link_status_change = hns3_link_status_change,
4388         .setup_tc = hns3_client_setup_tc,
4389         .reset_notify = hns3_reset_notify,
4390 };
4391
4392 /* hns3_init_module - Driver registration routine
4393  * hns3_init_module is the first routine called when the driver is
4394  * loaded. All it does is register with the PCI subsystem.
4395  */
4396 static int __init hns3_init_module(void)
4397 {
4398         int ret;
4399
4400         pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
4401         pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
4402
4403         client.type = HNAE3_CLIENT_KNIC;
4404         snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
4405                  hns3_driver_name);
4406
4407         client.ops = &client_ops;
4408
4409         INIT_LIST_HEAD(&client.node);
4410
4411         hns3_dbg_register_debugfs(hns3_driver_name);
4412
4413         ret = hnae3_register_client(&client);
4414         if (ret)
4415                 goto err_reg_client;
4416
4417         ret = pci_register_driver(&hns3_driver);
4418         if (ret)
4419                 goto err_reg_driver;
4420
4421         return ret;
4422
4423 err_reg_driver:
4424         hnae3_unregister_client(&client);
4425 err_reg_client:
4426         hns3_dbg_unregister_debugfs();
4427         return ret;
4428 }
4429 module_init(hns3_init_module);
4430
4431 /* hns3_exit_module - Driver exit cleanup routine
4432  * hns3_exit_module is called just before the driver is removed
4433  * from memory.
4434  */
4435 static void __exit hns3_exit_module(void)
4436 {
4437         pci_unregister_driver(&hns3_driver);
4438         hnae3_unregister_client(&client);
4439         hns3_dbg_unregister_debugfs();
4440 }
4441 module_exit(hns3_exit_module);
4442
4443 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
4444 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
4445 MODULE_LICENSE("GPL");
4446 MODULE_ALIAS("pci:hns-nic");
4447 MODULE_VERSION(HNS3_MOD_VERSION);