drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #include <linux/dma-mapping.h>
   5 #include <linux/etherdevice.h>
   6 #include <linux/interrupt.h>
   7 #ifdef CONFIG_RFS_ACCEL
   8 #include <linux/cpu_rmap.h>
   9 #endif
  10 #include <linux/if_vlan.h>
  11 #include <linux/ip.h>
  12 #include <linux/ipv6.h>
  13 #include <linux/module.h>
  14 #include <linux/pci.h>
  15 #include <linux/aer.h>
  16 #include <linux/skbuff.h>
  17 #include <linux/sctp.h>
  18 #include <linux/vermagic.h>
  19 #include <net/gre.h>
  20 #include <net/ip6_checksum.h>
  21 #include <net/pkt_cls.h>
  22 #include <net/tcp.h>
  23 #include <net/vxlan.h>
  24
  25 #include "hnae3.h"
  26 #include "hns3_enet.h"
  27
  28 #define hns3_set_field(origin, shift, val)      ((origin) |= ((val) << (shift)))
  29 #define hns3_tx_bd_count(S)     DIV_ROUND_UP(S, HNS3_MAX_BD_SIZE)
  30
  31 static void hns3_clear_all_ring(struct hnae3_handle *h, bool force);
  32 static void hns3_remove_hw_addr(struct net_device *netdev);
  33
  34 static const char hns3_driver_name[] = "hns3";
  35 const char hns3_driver_version[] = VERMAGIC_STRING;
  36 static const char hns3_driver_string[] =
  37                         "Hisilicon Ethernet Network Driver for Hip08 Family";
  38 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
  39 static struct hnae3_client client;
  40
  41 static int debug = -1;
  42 module_param(debug, int, 0);
  43 MODULE_PARM_DESC(debug, " Network interface message level setting");
  44
  45 #define DEFAULT_MSG_LEVEL (NETIF_MSG_PROBE | NETIF_MSG_LINK | \
  46                            NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
  47
  48 /* hns3_pci_tbl - PCI Device ID Table
  49  *
  50  * Last entry must be all 0s
  51  *
  52  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  53  *   Class, Class Mask, private data (not used) }
  54  */
  55 static const struct pci_device_id hns3_pci_tbl[] = {
  56         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
  57         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
  58         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
  59          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  60         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
  61          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  62         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
  63          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  64         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
  65          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  66         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
  67          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  68         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
  69         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF),
  70          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  71         /* required last entry */
  72         {0, }
  73 };
  74 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
  75
  76 static irqreturn_t hns3_irq_handle(int irq, void *vector)
  77 {
  78         struct hns3_enet_tqp_vector *tqp_vector = vector;
  79
  80         napi_schedule_irqoff(&tqp_vector->napi);
  81
  82         return IRQ_HANDLED;
  83 }
  84
  85 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
  86 {
  87         struct hns3_enet_tqp_vector *tqp_vectors;
  88         unsigned int i;
  89
  90         for (i = 0; i < priv->vector_num; i++) {
  91                 tqp_vectors = &priv->tqp_vector[i];
  92
  93                 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
  94                         continue;
  95
  96                 /* clear the affinity mask */
  97                 irq_set_affinity_hint(tqp_vectors->vector_irq, NULL);
  98
  99                 /* release the irq resource */
 100                 free_irq(tqp_vectors->vector_irq, tqp_vectors);
 101                 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
 102         }
 103 }
 104
 105 static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
 106 {
 107         struct hns3_enet_tqp_vector *tqp_vectors;
 108         int txrx_int_idx = 0;
 109         int rx_int_idx = 0;
 110         int tx_int_idx = 0;
 111         unsigned int i;
 112         int ret;
 113
 114         for (i = 0; i < priv->vector_num; i++) {
 115                 tqp_vectors = &priv->tqp_vector[i];
 116
 117                 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
 118                         continue;
 119
 120                 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
 121                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 122                                  "%s-%s-%d", priv->netdev->name, "TxRx",
 123                                  txrx_int_idx++);
 124                         txrx_int_idx++;
 125                 } else if (tqp_vectors->rx_group.ring) {
 126                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 127                                  "%s-%s-%d", priv->netdev->name, "Rx",
 128                                  rx_int_idx++);
 129                 } else if (tqp_vectors->tx_group.ring) {
 130                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 131                                  "%s-%s-%d", priv->netdev->name, "Tx",
 132                                  tx_int_idx++);
 133                 } else {
 134                         /* Skip this unused q_vector */
 135                         continue;
 136                 }
 137
 138                 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
 139
 140                 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
 141                                   tqp_vectors->name, tqp_vectors);
 142                 if (ret) {
 143                         netdev_err(priv->netdev, "request irq(%d) fail\n",
 144                                    tqp_vectors->vector_irq);
 145                         hns3_nic_uninit_irq(priv);
 146                         return ret;
 147                 }
 148
 149                 irq_set_affinity_hint(tqp_vectors->vector_irq,
 150                                       &tqp_vectors->affinity_mask);
 151
 152                 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
 153         }
 154
 155         return 0;
 156 }
 157
 158 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
 159                                  u32 mask_en)
 160 {
 161         writel(mask_en, tqp_vector->mask_addr);
 162 }
 163
 164 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
 165 {
 166         napi_enable(&tqp_vector->napi);
 167
 168         /* enable vector */
 169         hns3_mask_vector_irq(tqp_vector, 1);
 170 }
 171
 172 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
 173 {
 174         /* disable vector */
 175         hns3_mask_vector_irq(tqp_vector, 0);
 176
 177         disable_irq(tqp_vector->vector_irq);
 178         napi_disable(&tqp_vector->napi);
 179 }
 180
 181 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
 182                                  u32 rl_value)
 183 {
 184         u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
 185
 186         /* this defines the configuration for RL (Interrupt Rate Limiter).
 187          * Rl defines rate of interrupts i.e. number of interrupts-per-second
 188          * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
 189          */
 190
 191         if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
 192             !tqp_vector->rx_group.coal.gl_adapt_enable)
 193                 /* According to the hardware, the range of rl_reg is
 194                  * 0-59 and the unit is 4.
 195                  */
 196                 rl_reg |=  HNS3_INT_RL_ENABLE_MASK;
 197
 198         writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
 199 }
 200
 201 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 202                                     u32 gl_value)
 203 {
 204         u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 205
 206         writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
 207 }
 208
 209 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 210                                     u32 gl_value)
 211 {
 212         u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 213
 214         writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
 215 }
 216
 217 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
 218                                    struct hns3_nic_priv *priv)
 219 {
 220         /* initialize the configuration for interrupt coalescing.
 221          * 1. GL (Interrupt Gap Limiter)
 222          * 2. RL (Interrupt Rate Limiter)
 223          */
 224
 225         /* Default: enable interrupt coalescing self-adaptive and GL */
 226         tqp_vector->tx_group.coal.gl_adapt_enable = 1;
 227         tqp_vector->rx_group.coal.gl_adapt_enable = 1;
 228
 229         tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
 230         tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
 231
 232         tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
 233         tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
 234 }
 235
 236 static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
 237                                       struct hns3_nic_priv *priv)
 238 {
 239         struct hnae3_handle *h = priv->ae_handle;
 240
 241         hns3_set_vector_coalesce_tx_gl(tqp_vector,
 242                                        tqp_vector->tx_group.coal.int_gl);
 243         hns3_set_vector_coalesce_rx_gl(tqp_vector,
 244                                        tqp_vector->rx_group.coal.int_gl);
 245         hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
 246 }
 247
 248 static int hns3_nic_set_real_num_queue(struct net_device *netdev)
 249 {
 250         struct hnae3_handle *h = hns3_get_handle(netdev);
 251         struct hnae3_knic_private_info *kinfo = &h->kinfo;
 252         unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
 253         int i, ret;
 254
 255         if (kinfo->num_tc <= 1) {
 256                 netdev_reset_tc(netdev);
 257         } else {
 258                 ret = netdev_set_num_tc(netdev, kinfo->num_tc);
 259                 if (ret) {
 260                         netdev_err(netdev,
 261                                    "netdev_set_num_tc fail, ret=%d!\n", ret);
 262                         return ret;
 263                 }
 264
 265                 for (i = 0; i < HNAE3_MAX_TC; i++) {
 266                         if (!kinfo->tc_info[i].enable)
 267                                 continue;
 268
 269                         netdev_set_tc_queue(netdev,
 270                                             kinfo->tc_info[i].tc,
 271                                             kinfo->tc_info[i].tqp_count,
 272                                             kinfo->tc_info[i].tqp_offset);
 273                 }
 274         }
 275
 276         ret = netif_set_real_num_tx_queues(netdev, queue_size);
 277         if (ret) {
 278                 netdev_err(netdev,
 279                            "netif_set_real_num_tx_queues fail, ret=%d!\n", ret);
 280                 return ret;
 281         }
 282
 283         ret = netif_set_real_num_rx_queues(netdev, queue_size);
 284         if (ret) {
 285                 netdev_err(netdev,
 286                            "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
 287                 return ret;
 288         }
 289
 290         return 0;
 291 }
 292
 293 static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
 294 {
 295         u16 alloc_tqps, max_rss_size, rss_size;
 296
 297         h->ae_algo->ops->get_tqps_and_rss_info(h, &alloc_tqps, &max_rss_size);
 298         rss_size = alloc_tqps / h->kinfo.num_tc;
 299
 300         return min_t(u16, rss_size, max_rss_size);
 301 }
 302
 303 static void hns3_tqp_enable(struct hnae3_queue *tqp)
 304 {
 305         u32 rcb_reg;
 306
 307         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 308         rcb_reg |= BIT(HNS3_RING_EN_B);
 309         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 310 }
 311
 312 static void hns3_tqp_disable(struct hnae3_queue *tqp)
 313 {
 314         u32 rcb_reg;
 315
 316         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 317         rcb_reg &= ~BIT(HNS3_RING_EN_B);
 318         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 319 }
 320
 321 static void hns3_free_rx_cpu_rmap(struct net_device *netdev)
 322 {
 323 #ifdef CONFIG_RFS_ACCEL
 324         free_irq_cpu_rmap(netdev->rx_cpu_rmap);
 325         netdev->rx_cpu_rmap = NULL;
 326 #endif
 327 }
 328
 329 static int hns3_set_rx_cpu_rmap(struct net_device *netdev)
 330 {
 331 #ifdef CONFIG_RFS_ACCEL
 332         struct hns3_nic_priv *priv = netdev_priv(netdev);
 333         struct hns3_enet_tqp_vector *tqp_vector;
 334         int i, ret;
 335
 336         if (!netdev->rx_cpu_rmap) {
 337                 netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->vector_num);
 338                 if (!netdev->rx_cpu_rmap)
 339                         return -ENOMEM;
 340         }
 341
 342         for (i = 0; i < priv->vector_num; i++) {
 343                 tqp_vector = &priv->tqp_vector[i];
 344                 ret = irq_cpu_rmap_add(netdev->rx_cpu_rmap,
 345                                        tqp_vector->vector_irq);
 346                 if (ret) {
 347                         hns3_free_rx_cpu_rmap(netdev);
 348                         return ret;
 349                 }
 350         }
 351 #endif
 352         return 0;
 353 }
 354
 355 static int hns3_nic_net_up(struct net_device *netdev)
 356 {
 357         struct hns3_nic_priv *priv = netdev_priv(netdev);
 358         struct hnae3_handle *h = priv->ae_handle;
 359         int i, j;
 360         int ret;
 361
 362         ret = hns3_nic_reset_all_ring(h);
 363         if (ret)
 364                 return ret;
 365
 366         /* the device can work without cpu rmap, only aRFS needs it */
 367         ret = hns3_set_rx_cpu_rmap(netdev);
 368         if (ret)
 369                 netdev_warn(netdev, "set rx cpu rmap fail, ret=%d!\n", ret);
 370
 371         /* get irq resource for all vectors */
 372         ret = hns3_nic_init_irq(priv);
 373         if (ret) {
 374                 netdev_err(netdev, "init irq failed! ret=%d\n", ret);
 375                 goto free_rmap;
 376         }
 377
 378         clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 379
 380         /* enable the vectors */
 381         for (i = 0; i < priv->vector_num; i++)
 382                 hns3_vector_enable(&priv->tqp_vector[i]);
 383
 384         /* enable rcb */
 385         for (j = 0; j < h->kinfo.num_tqps; j++)
 386                 hns3_tqp_enable(h->kinfo.tqp[j]);
 387
 388         /* start the ae_dev */
 389         ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
 390         if (ret)
 391                 goto out_start_err;
 392
 393         return 0;
 394
 395 out_start_err:
 396         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 397         while (j--)
 398                 hns3_tqp_disable(h->kinfo.tqp[j]);
 399
 400         for (j = i - 1; j >= 0; j--)
 401                 hns3_vector_disable(&priv->tqp_vector[j]);
 402
 403         hns3_nic_uninit_irq(priv);
 404 free_rmap:
 405         hns3_free_rx_cpu_rmap(netdev);
 406         return ret;
 407 }
 408
 409 static void hns3_config_xps(struct hns3_nic_priv *priv)
 410 {
 411         int i;
 412
 413         for (i = 0; i < priv->vector_num; i++) {
 414                 struct hns3_enet_tqp_vector *tqp_vector = &priv->tqp_vector[i];
 415                 struct hns3_enet_ring *ring = tqp_vector->tx_group.ring;
 416
 417                 while (ring) {
 418                         int ret;
 419
 420                         ret = netif_set_xps_queue(priv->netdev,
 421                                                   &tqp_vector->affinity_mask,
 422                                                   ring->tqp->tqp_index);
 423                         if (ret)
 424                                 netdev_warn(priv->netdev,
 425                                             "set xps queue failed: %d", ret);
 426
 427                         ring = ring->next;
 428                 }
 429         }
 430 }
 431
 432 static int hns3_nic_net_open(struct net_device *netdev)
 433 {
 434         struct hns3_nic_priv *priv = netdev_priv(netdev);
 435         struct hnae3_handle *h = hns3_get_handle(netdev);
 436         struct hnae3_knic_private_info *kinfo;
 437         int i, ret;
 438
 439         if (hns3_nic_resetting(netdev))
 440                 return -EBUSY;
 441
 442         netif_carrier_off(netdev);
 443
 444         ret = hns3_nic_set_real_num_queue(netdev);
 445         if (ret)
 446                 return ret;
 447
 448         ret = hns3_nic_net_up(netdev);
 449         if (ret) {
 450                 netdev_err(netdev, "net up fail, ret=%d!\n", ret);
 451                 return ret;
 452         }
 453
 454         kinfo = &h->kinfo;
 455         for (i = 0; i < HNAE3_MAX_USER_PRIO; i++)
 456                 netdev_set_prio_tc_map(netdev, i, kinfo->prio_tc[i]);
 457
 458         if (h->ae_algo->ops->set_timer_task)
 459                 h->ae_algo->ops->set_timer_task(priv->ae_handle, true);
 460
 461         hns3_config_xps(priv);
 462
 463         netif_dbg(h, drv, netdev, "net open\n");
 464
 465         return 0;
 466 }
 467
 468 static void hns3_reset_tx_queue(struct hnae3_handle *h)
 469 {
 470         struct net_device *ndev = h->kinfo.netdev;
 471         struct hns3_nic_priv *priv = netdev_priv(ndev);
 472         struct netdev_queue *dev_queue;
 473         u32 i;
 474
 475         for (i = 0; i < h->kinfo.num_tqps; i++) {
 476                 dev_queue = netdev_get_tx_queue(ndev,
 477                                                 priv->ring_data[i].queue_index);
 478                 netdev_tx_reset_queue(dev_queue);
 479         }
 480 }
 481
 482 static void hns3_nic_net_down(struct net_device *netdev)
 483 {
 484         struct hns3_nic_priv *priv = netdev_priv(netdev);
 485         struct hnae3_handle *h = hns3_get_handle(netdev);
 486         const struct hnae3_ae_ops *ops;
 487         int i;
 488
 489         /* disable vectors */
 490         for (i = 0; i < priv->vector_num; i++)
 491                 hns3_vector_disable(&priv->tqp_vector[i]);
 492
 493         /* disable rcb */
 494         for (i = 0; i < h->kinfo.num_tqps; i++)
 495                 hns3_tqp_disable(h->kinfo.tqp[i]);
 496
 497         /* stop ae_dev */
 498         ops = priv->ae_handle->ae_algo->ops;
 499         if (ops->stop)
 500                 ops->stop(priv->ae_handle);
 501
 502         hns3_free_rx_cpu_rmap(netdev);
 503
 504         /* free irq resources */
 505         hns3_nic_uninit_irq(priv);
 506
 507         /* delay ring buffer clearing to hns3_reset_notify_uninit_enet
 508          * during reset process, because driver may not be able
 509          * to disable the ring through firmware when downing the netdev.
 510          */
 511         if (!hns3_nic_resetting(netdev))
 512                 hns3_clear_all_ring(priv->ae_handle, false);
 513
 514         hns3_reset_tx_queue(priv->ae_handle);
 515 }
 516
 517 static int hns3_nic_net_stop(struct net_device *netdev)
 518 {
 519         struct hns3_nic_priv *priv = netdev_priv(netdev);
 520         struct hnae3_handle *h = hns3_get_handle(netdev);
 521
 522         if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
 523                 return 0;
 524
 525         netif_dbg(h, drv, netdev, "net stop\n");
 526
 527         if (h->ae_algo->ops->set_timer_task)
 528                 h->ae_algo->ops->set_timer_task(priv->ae_handle, false);
 529
 530         netif_tx_stop_all_queues(netdev);
 531         netif_carrier_off(netdev);
 532
 533         hns3_nic_net_down(netdev);
 534
 535         return 0;
 536 }
 537
 538 static int hns3_nic_uc_sync(struct net_device *netdev,
 539                             const unsigned char *addr)
 540 {
 541         struct hnae3_handle *h = hns3_get_handle(netdev);
 542
 543         if (h->ae_algo->ops->add_uc_addr)
 544                 return h->ae_algo->ops->add_uc_addr(h, addr);
 545
 546         return 0;
 547 }
 548
 549 static int hns3_nic_uc_unsync(struct net_device *netdev,
 550                               const unsigned char *addr)
 551 {
 552         struct hnae3_handle *h = hns3_get_handle(netdev);
 553
 554         if (h->ae_algo->ops->rm_uc_addr)
 555                 return h->ae_algo->ops->rm_uc_addr(h, addr);
 556
 557         return 0;
 558 }
 559
 560 static int hns3_nic_mc_sync(struct net_device *netdev,
 561                             const unsigned char *addr)
 562 {
 563         struct hnae3_handle *h = hns3_get_handle(netdev);
 564
 565         if (h->ae_algo->ops->add_mc_addr)
 566                 return h->ae_algo->ops->add_mc_addr(h, addr);
 567
 568         return 0;
 569 }
 570
 571 static int hns3_nic_mc_unsync(struct net_device *netdev,
 572                               const unsigned char *addr)
 573 {
 574         struct hnae3_handle *h = hns3_get_handle(netdev);
 575
 576         if (h->ae_algo->ops->rm_mc_addr)
 577                 return h->ae_algo->ops->rm_mc_addr(h, addr);
 578
 579         return 0;
 580 }
 581
 582 static u8 hns3_get_netdev_flags(struct net_device *netdev)
 583 {
 584         u8 flags = 0;
 585
 586         if (netdev->flags & IFF_PROMISC) {
 587                 flags = HNAE3_USER_UPE | HNAE3_USER_MPE | HNAE3_BPE;
 588         } else {
 589                 flags |= HNAE3_VLAN_FLTR;
 590                 if (netdev->flags & IFF_ALLMULTI)
 591                         flags |= HNAE3_USER_MPE;
 592         }
 593
 594         return flags;
 595 }
 596
 597 static void hns3_nic_set_rx_mode(struct net_device *netdev)
 598 {
 599         struct hnae3_handle *h = hns3_get_handle(netdev);
 600         u8 new_flags;
 601         int ret;
 602
 603         new_flags = hns3_get_netdev_flags(netdev);
 604
 605         ret = __dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync);
 606         if (ret) {
 607                 netdev_err(netdev, "sync uc address fail\n");
 608                 if (ret == -ENOSPC)
 609                         new_flags |= HNAE3_OVERFLOW_UPE;
 610         }
 611
 612         if (netdev->flags & IFF_MULTICAST) {
 613                 ret = __dev_mc_sync(netdev, hns3_nic_mc_sync,
 614                                     hns3_nic_mc_unsync);
 615                 if (ret) {
 616                         netdev_err(netdev, "sync mc address fail\n");
 617                         if (ret == -ENOSPC)
 618                                 new_flags |= HNAE3_OVERFLOW_MPE;
 619                 }
 620         }
 621
 622         /* User mode Promisc mode enable and vlan filtering is disabled to
 623          * let all packets in. MAC-VLAN Table overflow Promisc enabled and
 624          * vlan fitering is enabled
 625          */
 626         hns3_enable_vlan_filter(netdev, new_flags & HNAE3_VLAN_FLTR);
 627         h->netdev_flags = new_flags;
 628         hns3_update_promisc_mode(netdev, new_flags);
 629 }
 630
 631 int hns3_update_promisc_mode(struct net_device *netdev, u8 promisc_flags)
 632 {
 633         struct hns3_nic_priv *priv = netdev_priv(netdev);
 634         struct hnae3_handle *h = priv->ae_handle;
 635
 636         if (h->ae_algo->ops->set_promisc_mode) {
 637                 return h->ae_algo->ops->set_promisc_mode(h,
 638                                                 promisc_flags & HNAE3_UPE,
 639                                                 promisc_flags & HNAE3_MPE);
 640         }
 641
 642         return 0;
 643 }
 644
 645 void hns3_enable_vlan_filter(struct net_device *netdev, bool enable)
 646 {
 647         struct hns3_nic_priv *priv = netdev_priv(netdev);
 648         struct hnae3_handle *h = priv->ae_handle;
 649         bool last_state;
 650
 651         if (h->pdev->revision >= 0x21 && h->ae_algo->ops->enable_vlan_filter) {
 652                 last_state = h->netdev_flags & HNAE3_VLAN_FLTR ? true : false;
 653                 if (enable != last_state) {
 654                         netdev_info(netdev,
 655                                     "%s vlan filter\n",
 656                                     enable ? "enable" : "disable");
 657                         h->ae_algo->ops->enable_vlan_filter(h, enable);
 658                 }
 659         }
 660 }
 661
 662 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
 663                         u16 *mss, u32 *type_cs_vlan_tso)
 664 {
 665         u32 l4_offset, hdr_len;
 666         union l3_hdr_info l3;
 667         union l4_hdr_info l4;
 668         u32 l4_paylen;
 669         int ret;
 670
 671         if (!skb_is_gso(skb))
 672                 return 0;
 673
 674         ret = skb_cow_head(skb, 0);
 675         if (unlikely(ret))
 676                 return ret;
 677
 678         l3.hdr = skb_network_header(skb);
 679         l4.hdr = skb_transport_header(skb);
 680
 681         /* Software should clear the IPv4's checksum field when tso is
 682          * needed.
 683          */
 684         if (l3.v4->version == 4)
 685                 l3.v4->check = 0;
 686
 687         /* tunnel packet */
 688         if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
 689                                          SKB_GSO_GRE_CSUM |
 690                                          SKB_GSO_UDP_TUNNEL |
 691                                          SKB_GSO_UDP_TUNNEL_CSUM)) {
 692                 if ((!(skb_shinfo(skb)->gso_type &
 693                     SKB_GSO_PARTIAL)) &&
 694                     (skb_shinfo(skb)->gso_type &
 695                     SKB_GSO_UDP_TUNNEL_CSUM)) {
 696                         /* Software should clear the udp's checksum
 697                          * field when tso is needed.
 698                          */
 699                         l4.udp->check = 0;
 700                 }
 701                 /* reset l3&l4 pointers from outer to inner headers */
 702                 l3.hdr = skb_inner_network_header(skb);
 703                 l4.hdr = skb_inner_transport_header(skb);
 704
 705                 /* Software should clear the IPv4's checksum field when
 706                  * tso is needed.
 707                  */
 708                 if (l3.v4->version == 4)
 709                         l3.v4->check = 0;
 710         }
 711
 712         /* normal or tunnel packet */
 713         l4_offset = l4.hdr - skb->data;
 714         hdr_len = (l4.tcp->doff << 2) + l4_offset;
 715
 716         /* remove payload length from inner pseudo checksum when tso */
 717         l4_paylen = skb->len - l4_offset;
 718         csum_replace_by_diff(&l4.tcp->check,
 719                              (__force __wsum)htonl(l4_paylen));
 720
 721         /* find the txbd field values */
 722         *paylen = skb->len - hdr_len;
 723         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_TSO_B, 1);
 724
 725         /* get MSS for TSO */
 726         *mss = skb_shinfo(skb)->gso_size;
 727
 728         return 0;
 729 }
 730
 731 static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
 732                                 u8 *il4_proto)
 733 {
 734         union l3_hdr_info l3;
 735         unsigned char *l4_hdr;
 736         unsigned char *exthdr;
 737         u8 l4_proto_tmp;
 738         __be16 frag_off;
 739
 740         /* find outer header point */
 741         l3.hdr = skb_network_header(skb);
 742         l4_hdr = skb_transport_header(skb);
 743
 744         if (skb->protocol == htons(ETH_P_IPV6)) {
 745                 exthdr = l3.hdr + sizeof(*l3.v6);
 746                 l4_proto_tmp = l3.v6->nexthdr;
 747                 if (l4_hdr != exthdr)
 748                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 749                                          &l4_proto_tmp, &frag_off);
 750         } else if (skb->protocol == htons(ETH_P_IP)) {
 751                 l4_proto_tmp = l3.v4->protocol;
 752         } else {
 753                 return -EINVAL;
 754         }
 755
 756         *ol4_proto = l4_proto_tmp;
 757
 758         /* tunnel packet */
 759         if (!skb->encapsulation) {
 760                 *il4_proto = 0;
 761                 return 0;
 762         }
 763
 764         /* find inner header point */
 765         l3.hdr = skb_inner_network_header(skb);
 766         l4_hdr = skb_inner_transport_header(skb);
 767
 768         if (l3.v6->version == 6) {
 769                 exthdr = l3.hdr + sizeof(*l3.v6);
 770                 l4_proto_tmp = l3.v6->nexthdr;
 771                 if (l4_hdr != exthdr)
 772                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 773                                          &l4_proto_tmp, &frag_off);
 774         } else if (l3.v4->version == 4) {
 775                 l4_proto_tmp = l3.v4->protocol;
 776         }
 777
 778         *il4_proto = l4_proto_tmp;
 779
 780         return 0;
 781 }
 782
 783 /* when skb->encapsulation is 0, skb->ip_summed is CHECKSUM_PARTIAL
 784  * and it is udp packet, which has a dest port as the IANA assigned.
 785  * the hardware is expected to do the checksum offload, but the
 786  * hardware will not do the checksum offload when udp dest port is
 787  * 4789.
 788  */
 789 static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
 790 {
 791         union l4_hdr_info l4;
 792
 793         l4.hdr = skb_transport_header(skb);
 794
 795         if (!(!skb->encapsulation &&
 796               l4.udp->dest == htons(IANA_VXLAN_UDP_PORT)))
 797                 return false;
 798
 799         skb_checksum_help(skb);
 800
 801         return true;
 802 }
 803
 804 static void hns3_set_outer_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
 805                                   u32 *ol_type_vlan_len_msec)
 806 {
 807         u32 l2_len, l3_len, l4_len;
 808         unsigned char *il2_hdr;
 809         union l3_hdr_info l3;
 810         union l4_hdr_info l4;
 811
 812         l3.hdr = skb_network_header(skb);
 813         l4.hdr = skb_transport_header(skb);
 814
 815         /* compute OL2 header size, defined in 2 Bytes */
 816         l2_len = l3.hdr - skb->data;
 817         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L2LEN_S, l2_len >> 1);
 818
 819         /* compute OL3 header size, defined in 4 Bytes */
 820         l3_len = l4.hdr - l3.hdr;
 821         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_S, l3_len >> 2);
 822
 823         il2_hdr = skb_inner_mac_header(skb);
 824         /* compute OL4 header size, defined in 4 Bytes */
 825         l4_len = il2_hdr - l4.hdr;
 826         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_S, l4_len >> 2);
 827
 828         /* define outer network header type */
 829         if (skb->protocol == htons(ETH_P_IP)) {
 830                 if (skb_is_gso(skb))
 831                         hns3_set_field(*ol_type_vlan_len_msec,
 832                                        HNS3_TXD_OL3T_S,
 833                                        HNS3_OL3T_IPV4_CSUM);
 834                 else
 835                         hns3_set_field(*ol_type_vlan_len_msec,
 836                                        HNS3_TXD_OL3T_S,
 837                                        HNS3_OL3T_IPV4_NO_CSUM);
 838
 839         } else if (skb->protocol == htons(ETH_P_IPV6)) {
 840                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_S,
 841                                HNS3_OL3T_IPV6);
 842         }
 843
 844         if (ol4_proto == IPPROTO_UDP)
 845                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
 846                                HNS3_TUN_MAC_IN_UDP);
 847         else if (ol4_proto == IPPROTO_GRE)
 848                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
 849                                HNS3_TUN_NVGRE);
 850 }
 851
 852 static int hns3_set_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
 853                            u8 il4_proto, u32 *type_cs_vlan_tso,
 854                            u32 *ol_type_vlan_len_msec)
 855 {
 856         unsigned char *l2_hdr = skb->data;
 857         u32 l4_proto = ol4_proto;
 858         union l4_hdr_info l4;
 859         union l3_hdr_info l3;
 860         u32 l2_len, l3_len;
 861
 862         l4.hdr = skb_transport_header(skb);
 863         l3.hdr = skb_network_header(skb);
 864
 865         /* handle encapsulation skb */
 866         if (skb->encapsulation) {
 867                 /* If this is a not UDP/GRE encapsulation skb */
 868                 if (!(ol4_proto == IPPROTO_UDP || ol4_proto == IPPROTO_GRE)) {
 869                         /* drop the skb tunnel packet if hardware don't support,
 870                          * because hardware can't calculate csum when TSO.
 871                          */
 872                         if (skb_is_gso(skb))
 873                                 return -EDOM;
 874
 875                         /* the stack computes the IP header already,
 876                          * driver calculate l4 checksum when not TSO.
 877                          */
 878                         skb_checksum_help(skb);
 879                         return 0;
 880                 }
 881
 882                 hns3_set_outer_l2l3l4(skb, ol4_proto, ol_type_vlan_len_msec);
 883
 884                 /* switch to inner header */
 885                 l2_hdr = skb_inner_mac_header(skb);
 886                 l3.hdr = skb_inner_network_header(skb);
 887                 l4.hdr = skb_inner_transport_header(skb);
 888                 l4_proto = il4_proto;
 889         }
 890
 891         if (l3.v4->version == 4) {
 892                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 893                                HNS3_L3T_IPV4);
 894
 895                 /* the stack computes the IP header already, the only time we
 896                  * need the hardware to recompute it is in the case of TSO.
 897                  */
 898                 if (skb_is_gso(skb))
 899                         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
 900         } else if (l3.v6->version == 6) {
 901                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 902                                HNS3_L3T_IPV6);
 903         }
 904
 905         /* compute inner(/normal) L2 header size, defined in 2 Bytes */
 906         l2_len = l3.hdr - l2_hdr;
 907         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S, l2_len >> 1);
 908
 909         /* compute inner(/normal) L3 header size, defined in 4 Bytes */
 910         l3_len = l4.hdr - l3.hdr;
 911         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_S, l3_len >> 2);
 912
 913         /* compute inner(/normal) L4 header size, defined in 4 Bytes */
 914         switch (l4_proto) {
 915         case IPPROTO_TCP:
 916                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 917                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 918                                HNS3_L4T_TCP);
 919                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 920                                l4.tcp->doff);
 921                 break;
 922         case IPPROTO_UDP:
 923                 if (hns3_tunnel_csum_bug(skb))
 924                         break;
 925
 926                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 927                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 928                                HNS3_L4T_UDP);
 929                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 930                                (sizeof(struct udphdr) >> 2));
 931                 break;
 932         case IPPROTO_SCTP:
 933                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 934                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 935                                HNS3_L4T_SCTP);
 936                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 937                                (sizeof(struct sctphdr) >> 2));
 938                 break;
 939         default:
 940                 /* drop the skb tunnel packet if hardware don't support,
 941                  * because hardware can't calculate csum when TSO.
 942                  */
 943                 if (skb_is_gso(skb))
 944                         return -EDOM;
 945
 946                 /* the stack computes the IP header already,
 947                  * driver calculate l4 checksum when not TSO.
 948                  */
 949                 skb_checksum_help(skb);
 950                 return 0;
 951         }
 952
 953         return 0;
 954 }
 955
 956 static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
 957 {
 958         /* Config bd buffer end */
 959         if (!!frag_end)
 960                 hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, 1U);
 961         hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1U);
 962 }
 963
 964 static int hns3_fill_desc_vtags(struct sk_buff *skb,
 965                                 struct hns3_enet_ring *tx_ring,
 966                                 u32 *inner_vlan_flag,
 967                                 u32 *out_vlan_flag,
 968                                 u16 *inner_vtag,
 969                                 u16 *out_vtag)
 970 {
 971 #define HNS3_TX_VLAN_PRIO_SHIFT 13
 972
 973         struct hnae3_handle *handle = tx_ring->tqp->handle;
 974
 975         /* Since HW limitation, if port based insert VLAN enabled, only one VLAN
 976          * header is allowed in skb, otherwise it will cause RAS error.
 977          */
 978         if (unlikely(skb_vlan_tagged_multi(skb) &&
 979                      handle->port_base_vlan_state ==
 980                      HNAE3_PORT_BASE_VLAN_ENABLE))
 981                 return -EINVAL;
 982
 983         if (skb->protocol == htons(ETH_P_8021Q) &&
 984             !(tx_ring->tqp->handle->kinfo.netdev->features &
 985             NETIF_F_HW_VLAN_CTAG_TX)) {
 986                 /* When HW VLAN acceleration is turned off, and the stack
 987                  * sets the protocol to 802.1q, the driver just need to
 988                  * set the protocol to the encapsulated ethertype.
 989                  */
 990                 skb->protocol = vlan_get_protocol(skb);
 991                 return 0;
 992         }
 993
 994         if (skb_vlan_tag_present(skb)) {
 995                 u16 vlan_tag;
 996
 997                 vlan_tag = skb_vlan_tag_get(skb);
 998                 vlan_tag |= (skb->priority & 0x7) << HNS3_TX_VLAN_PRIO_SHIFT;
 999
1000                 /* Based on hw strategy, use out_vtag in two layer tag case,
1001                  * and use inner_vtag in one tag case.
1002                  */
1003                 if (skb->protocol == htons(ETH_P_8021Q)) {
1004                         if (handle->port_base_vlan_state ==
1005                             HNAE3_PORT_BASE_VLAN_DISABLE){
1006                                 hns3_set_field(*out_vlan_flag,
1007                                                HNS3_TXD_OVLAN_B, 1);
1008                                 *out_vtag = vlan_tag;
1009                         } else {
1010                                 hns3_set_field(*inner_vlan_flag,
1011                                                HNS3_TXD_VLAN_B, 1);
1012                                 *inner_vtag = vlan_tag;
1013                         }
1014                 } else {
1015                         hns3_set_field(*inner_vlan_flag, HNS3_TXD_VLAN_B, 1);
1016                         *inner_vtag = vlan_tag;
1017                 }
1018         } else if (skb->protocol == htons(ETH_P_8021Q)) {
1019                 struct vlan_ethhdr *vhdr;
1020                 int rc;
1021
1022                 rc = skb_cow_head(skb, 0);
1023                 if (unlikely(rc < 0))
1024                         return rc;
1025                 vhdr = (struct vlan_ethhdr *)skb->data;
1026                 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority & 0x7)
1027                                         << HNS3_TX_VLAN_PRIO_SHIFT);
1028         }
1029
1030         skb->protocol = vlan_get_protocol(skb);
1031         return 0;
1032 }
1033
1034 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
1035                           unsigned int size, int frag_end,
1036                           enum hns_desc_type type)
1037 {
1038         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
1039         struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1040         struct device *dev = ring_to_dev(ring);
1041         skb_frag_t *frag;
1042         unsigned int frag_buf_num;
1043         int k, sizeoflast;
1044         dma_addr_t dma;
1045
1046         if (type == DESC_TYPE_SKB) {
1047                 struct sk_buff *skb = (struct sk_buff *)priv;
1048                 u32 ol_type_vlan_len_msec = 0;
1049                 u32 type_cs_vlan_tso = 0;
1050                 u32 paylen = skb->len;
1051                 u16 inner_vtag = 0;
1052                 u16 out_vtag = 0;
1053                 u16 mss = 0;
1054                 int ret;
1055
1056                 ret = hns3_fill_desc_vtags(skb, ring, &type_cs_vlan_tso,
1057                                            &ol_type_vlan_len_msec,
1058                                            &inner_vtag, &out_vtag);
1059                 if (unlikely(ret))
1060                         return ret;
1061
1062                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1063                         u8 ol4_proto, il4_proto;
1064
1065                         skb_reset_mac_len(skb);
1066
1067                         ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
1068                         if (unlikely(ret))
1069                                 return ret;
1070
1071                         ret = hns3_set_l2l3l4(skb, ol4_proto, il4_proto,
1072                                               &type_cs_vlan_tso,
1073                                               &ol_type_vlan_len_msec);
1074                         if (unlikely(ret))
1075                                 return ret;
1076
1077                         ret = hns3_set_tso(skb, &paylen, &mss,
1078                                            &type_cs_vlan_tso);
1079                         if (unlikely(ret))
1080                                 return ret;
1081                 }
1082
1083                 /* Set txbd */
1084                 desc->tx.ol_type_vlan_len_msec =
1085                         cpu_to_le32(ol_type_vlan_len_msec);
1086                 desc->tx.type_cs_vlan_tso_len = cpu_to_le32(type_cs_vlan_tso);
1087                 desc->tx.paylen = cpu_to_le32(paylen);
1088                 desc->tx.mss = cpu_to_le16(mss);
1089                 desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
1090                 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
1091
1092                 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1093         } else {
1094                 frag = (skb_frag_t *)priv;
1095                 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1096         }
1097
1098         if (unlikely(dma_mapping_error(dev, dma))) {
1099                 ring->stats.sw_err_cnt++;
1100                 return -ENOMEM;
1101         }
1102
1103         desc_cb->length = size;
1104
1105         if (likely(size <= HNS3_MAX_BD_SIZE)) {
1106                 u16 bdtp_fe_sc_vld_ra_ri = 0;
1107
1108                 desc_cb->priv = priv;
1109                 desc_cb->dma = dma;
1110                 desc_cb->type = type;
1111                 desc->addr = cpu_to_le64(dma);
1112                 desc->tx.send_size = cpu_to_le16(size);
1113                 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
1114                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1115                         cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1116
1117                 ring_ptr_move_fw(ring, next_to_use);
1118                 return 0;
1119         }
1120
1121         frag_buf_num = hns3_tx_bd_count(size);
1122         sizeoflast = size & HNS3_TX_LAST_SIZE_M;
1123         sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
1124
1125         /* When frag size is bigger than hardware limit, split this frag */
1126         for (k = 0; k < frag_buf_num; k++) {
1127                 u16 bdtp_fe_sc_vld_ra_ri = 0;
1128
1129                 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
1130                 desc_cb->priv = priv;
1131                 desc_cb->dma = dma + HNS3_MAX_BD_SIZE * k;
1132                 desc_cb->type = (type == DESC_TYPE_SKB && !k) ?
1133                                 DESC_TYPE_SKB : DESC_TYPE_PAGE;
1134
1135                 /* now, fill the descriptor */
1136                 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);
1137                 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?
1138                                      (u16)sizeoflast : (u16)HNS3_MAX_BD_SIZE);
1139                 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri,
1140                                        frag_end && (k == frag_buf_num - 1) ?
1141                                                 1 : 0);
1142                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1143                                 cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1144
1145                 /* move ring pointer to next */
1146                 ring_ptr_move_fw(ring, next_to_use);
1147
1148                 desc_cb = &ring->desc_cb[ring->next_to_use];
1149                 desc = &ring->desc[ring->next_to_use];
1150         }
1151
1152         return 0;
1153 }
1154
1155 static int hns3_nic_bd_num(struct sk_buff *skb)
1156 {
1157         int size = skb_headlen(skb);
1158         int i, bd_num;
1159
1160         /* if the total len is within the max bd limit */
1161         if (likely(skb->len <= HNS3_MAX_BD_SIZE))
1162                 return skb_shinfo(skb)->nr_frags + 1;
1163
1164         bd_num = hns3_tx_bd_count(size);
1165
1166         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1167                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1168                 int frag_bd_num;
1169
1170                 size = skb_frag_size(frag);
1171                 frag_bd_num = hns3_tx_bd_count(size);
1172
1173                 if (unlikely(frag_bd_num > HNS3_MAX_BD_PER_FRAG))
1174                         return -ENOMEM;
1175
1176                 bd_num += frag_bd_num;
1177         }
1178
1179         return bd_num;
1180 }
1181
1182 static unsigned int hns3_gso_hdr_len(struct sk_buff *skb)
1183 {
1184         if (!skb->encapsulation)
1185                 return skb_transport_offset(skb) + tcp_hdrlen(skb);
1186
1187         return skb_inner_transport_offset(skb) + inner_tcp_hdrlen(skb);
1188 }
1189
1190 /* HW need every continuous 8 buffer data to be larger than MSS,
1191  * we simplify it by ensuring skb_headlen + the first continuous
1192  * 7 frags to to be larger than gso header len + mss, and the remaining
1193  * continuous 7 frags to be larger than MSS except the last 7 frags.
1194  */
1195 static bool hns3_skb_need_linearized(struct sk_buff *skb)
1196 {
1197         int bd_limit = HNS3_MAX_BD_PER_FRAG - 1;
1198         unsigned int tot_len = 0;
1199         int i;
1200
1201         for (i = 0; i < bd_limit; i++)
1202                 tot_len += skb_frag_size(&skb_shinfo(skb)->frags[i]);
1203
1204         /* ensure headlen + the first 7 frags is greater than mss + header
1205          * and the first 7 frags is greater than mss.
1206          */
1207         if (((tot_len + skb_headlen(skb)) < (skb_shinfo(skb)->gso_size +
1208             hns3_gso_hdr_len(skb))) || (tot_len < skb_shinfo(skb)->gso_size))
1209                 return true;
1210
1211         /* ensure the remaining continuous 7 buffer is greater than mss */
1212         for (i = 0; i < (skb_shinfo(skb)->nr_frags - bd_limit - 1); i++) {
1213                 tot_len -= skb_frag_size(&skb_shinfo(skb)->frags[i]);
1214                 tot_len += skb_frag_size(&skb_shinfo(skb)->frags[i + bd_limit]);
1215
1216                 if (tot_len < skb_shinfo(skb)->gso_size)
1217                         return true;
1218         }
1219
1220         return false;
1221 }
1222
1223 static int hns3_nic_maybe_stop_tx(struct hns3_enet_ring *ring,
1224                                   struct sk_buff **out_skb)
1225 {
1226         struct sk_buff *skb = *out_skb;
1227         int bd_num;
1228
1229         bd_num = hns3_nic_bd_num(skb);
1230         if (bd_num < 0)
1231                 return bd_num;
1232
1233         if (unlikely(bd_num > HNS3_MAX_BD_PER_FRAG)) {
1234                 struct sk_buff *new_skb;
1235
1236                 if (skb_is_gso(skb) && !hns3_skb_need_linearized(skb))
1237                         goto out;
1238
1239                 bd_num = hns3_tx_bd_count(skb->len);
1240                 if (unlikely(ring_space(ring) < bd_num))
1241                         return -EBUSY;
1242                 /* manual split the send packet */
1243                 new_skb = skb_copy(skb, GFP_ATOMIC);
1244                 if (!new_skb)
1245                         return -ENOMEM;
1246                 dev_kfree_skb_any(skb);
1247                 *out_skb = new_skb;
1248
1249                 u64_stats_update_begin(&ring->syncp);
1250                 ring->stats.tx_copy++;
1251                 u64_stats_update_end(&ring->syncp);
1252         }
1253
1254 out:
1255         if (unlikely(ring_space(ring) < bd_num))
1256                 return -EBUSY;
1257
1258         return bd_num;
1259 }
1260
1261 static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig)
1262 {
1263         struct device *dev = ring_to_dev(ring);
1264         unsigned int i;
1265
1266         for (i = 0; i < ring->desc_num; i++) {
1267                 /* check if this is where we started */
1268                 if (ring->next_to_use == next_to_use_orig)
1269                         break;
1270
1271                 /* rollback one */
1272                 ring_ptr_move_bw(ring, next_to_use);
1273
1274                 /* unmap the descriptor dma address */
1275                 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
1276                         dma_unmap_single(dev,
1277                                          ring->desc_cb[ring->next_to_use].dma,
1278                                         ring->desc_cb[ring->next_to_use].length,
1279                                         DMA_TO_DEVICE);
1280                 else if (ring->desc_cb[ring->next_to_use].length)
1281                         dma_unmap_page(dev,
1282                                        ring->desc_cb[ring->next_to_use].dma,
1283                                        ring->desc_cb[ring->next_to_use].length,
1284                                        DMA_TO_DEVICE);
1285
1286                 ring->desc_cb[ring->next_to_use].length = 0;
1287                 ring->desc_cb[ring->next_to_use].dma = 0;
1288         }
1289 }
1290
1291 netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
1292 {
1293         struct hns3_nic_priv *priv = netdev_priv(netdev);
1294         struct hns3_nic_ring_data *ring_data =
1295                 &tx_ring_data(priv, skb->queue_mapping);
1296         struct hns3_enet_ring *ring = ring_data->ring;
1297         struct netdev_queue *dev_queue;
1298         skb_frag_t *frag;
1299         int next_to_use_head;
1300         int buf_num;
1301         int seg_num;
1302         int size;
1303         int ret;
1304         int i;
1305
1306         /* Prefetch the data used later */
1307         prefetch(skb->data);
1308
1309         buf_num = hns3_nic_maybe_stop_tx(ring, &skb);
1310         if (unlikely(buf_num <= 0)) {
1311                 if (buf_num == -EBUSY) {
1312                         u64_stats_update_begin(&ring->syncp);
1313                         ring->stats.tx_busy++;
1314                         u64_stats_update_end(&ring->syncp);
1315                         goto out_net_tx_busy;
1316                 } else if (buf_num == -ENOMEM) {
1317                         u64_stats_update_begin(&ring->syncp);
1318                         ring->stats.sw_err_cnt++;
1319                         u64_stats_update_end(&ring->syncp);
1320                 }
1321
1322                 if (net_ratelimit())
1323                         netdev_err(netdev, "xmit error: %d!\n", buf_num);
1324
1325                 goto out_err_tx_ok;
1326         }
1327
1328         /* No. of segments (plus a header) */
1329         seg_num = skb_shinfo(skb)->nr_frags + 1;
1330         /* Fill the first part */
1331         size = skb_headlen(skb);
1332
1333         next_to_use_head = ring->next_to_use;
1334
1335         ret = hns3_fill_desc(ring, skb, size, seg_num == 1 ? 1 : 0,
1336                              DESC_TYPE_SKB);
1337         if (unlikely(ret))
1338                 goto fill_err;
1339
1340         /* Fill the fragments */
1341         for (i = 1; i < seg_num; i++) {
1342                 frag = &skb_shinfo(skb)->frags[i - 1];
1343                 size = skb_frag_size(frag);
1344
1345                 ret = hns3_fill_desc(ring, frag, size,
1346                                      seg_num - 1 == i ? 1 : 0,
1347                                      DESC_TYPE_PAGE);
1348
1349                 if (unlikely(ret))
1350                         goto fill_err;
1351         }
1352
1353         /* Complete translate all packets */
1354         dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1355         netdev_tx_sent_queue(dev_queue, skb->len);
1356
1357         wmb(); /* Commit all data before submit */
1358
1359         hnae3_queue_xmit(ring->tqp, buf_num);
1360
1361         return NETDEV_TX_OK;
1362
1363 fill_err:
1364         hns3_clear_desc(ring, next_to_use_head);
1365
1366 out_err_tx_ok:
1367         dev_kfree_skb_any(skb);
1368         return NETDEV_TX_OK;
1369
1370 out_net_tx_busy:
1371         netif_stop_subqueue(netdev, ring_data->queue_index);
1372         smp_mb(); /* Commit all data before submit */
1373
1374         return NETDEV_TX_BUSY;
1375 }
1376
1377 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1378 {
1379         struct hnae3_handle *h = hns3_get_handle(netdev);
1380         struct sockaddr *mac_addr = p;
1381         int ret;
1382
1383         if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1384                 return -EADDRNOTAVAIL;
1385
1386         if (ether_addr_equal(netdev->dev_addr, mac_addr->sa_data)) {
1387                 netdev_info(netdev, "already using mac address %pM\n",
1388                             mac_addr->sa_data);
1389                 return 0;
1390         }
1391
1392         ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
1393         if (ret) {
1394                 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1395                 return ret;
1396         }
1397
1398         ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1399
1400         return 0;
1401 }
1402
1403 static int hns3_nic_do_ioctl(struct net_device *netdev,
1404                              struct ifreq *ifr, int cmd)
1405 {
1406         struct hnae3_handle *h = hns3_get_handle(netdev);
1407
1408         if (!netif_running(netdev))
1409                 return -EINVAL;
1410
1411         if (!h->ae_algo->ops->do_ioctl)
1412                 return -EOPNOTSUPP;
1413
1414         return h->ae_algo->ops->do_ioctl(h, ifr, cmd);
1415 }
1416
1417 static int hns3_nic_set_features(struct net_device *netdev,
1418                                  netdev_features_t features)
1419 {
1420         netdev_features_t changed = netdev->features ^ features;
1421         struct hns3_nic_priv *priv = netdev_priv(netdev);
1422         struct hnae3_handle *h = priv->ae_handle;
1423         bool enable;
1424         int ret;
1425
1426         if (changed & (NETIF_F_GRO_HW) && h->ae_algo->ops->set_gro_en) {
1427                 enable = !!(features & NETIF_F_GRO_HW);
1428                 ret = h->ae_algo->ops->set_gro_en(h, enable);
1429                 if (ret)
1430                         return ret;
1431         }
1432
1433         if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1434             h->ae_algo->ops->enable_vlan_filter) {
1435                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_FILTER);
1436                 h->ae_algo->ops->enable_vlan_filter(h, enable);
1437         }
1438
1439         if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1440             h->ae_algo->ops->enable_hw_strip_rxvtag) {
1441                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
1442                 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, enable);
1443                 if (ret)
1444                         return ret;
1445         }
1446
1447         if ((changed & NETIF_F_NTUPLE) && h->ae_algo->ops->enable_fd) {
1448                 enable = !!(features & NETIF_F_NTUPLE);
1449                 h->ae_algo->ops->enable_fd(h, enable);
1450         }
1451
1452         netdev->features = features;
1453         return 0;
1454 }
1455
1456 static void hns3_nic_get_stats64(struct net_device *netdev,
1457                                  struct rtnl_link_stats64 *stats)
1458 {
1459         struct hns3_nic_priv *priv = netdev_priv(netdev);
1460         int queue_num = priv->ae_handle->kinfo.num_tqps;
1461         struct hnae3_handle *handle = priv->ae_handle;
1462         struct hns3_enet_ring *ring;
1463         u64 rx_length_errors = 0;
1464         u64 rx_crc_errors = 0;
1465         u64 rx_multicast = 0;
1466         unsigned int start;
1467         u64 tx_errors = 0;
1468         u64 rx_errors = 0;
1469         unsigned int idx;
1470         u64 tx_bytes = 0;
1471         u64 rx_bytes = 0;
1472         u64 tx_pkts = 0;
1473         u64 rx_pkts = 0;
1474         u64 tx_drop = 0;
1475         u64 rx_drop = 0;
1476
1477         if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1478                 return;
1479
1480         handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1481
1482         for (idx = 0; idx < queue_num; idx++) {
1483                 /* fetch the tx stats */
1484                 ring = priv->ring_data[idx].ring;
1485                 do {
1486                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1487                         tx_bytes += ring->stats.tx_bytes;
1488                         tx_pkts += ring->stats.tx_pkts;
1489                         tx_drop += ring->stats.sw_err_cnt;
1490                         tx_errors += ring->stats.sw_err_cnt;
1491                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1492
1493                 /* fetch the rx stats */
1494                 ring = priv->ring_data[idx + queue_num].ring;
1495                 do {
1496                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1497                         rx_bytes += ring->stats.rx_bytes;
1498                         rx_pkts += ring->stats.rx_pkts;
1499                         rx_drop += ring->stats.l2_err;
1500                         rx_errors += ring->stats.l2_err;
1501                         rx_errors += ring->stats.l3l4_csum_err;
1502                         rx_crc_errors += ring->stats.l2_err;
1503                         rx_multicast += ring->stats.rx_multicast;
1504                         rx_length_errors += ring->stats.err_pkt_len;
1505                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1506         }
1507
1508         stats->tx_bytes = tx_bytes;
1509         stats->tx_packets = tx_pkts;
1510         stats->rx_bytes = rx_bytes;
1511         stats->rx_packets = rx_pkts;
1512
1513         stats->rx_errors = rx_errors;
1514         stats->multicast = rx_multicast;
1515         stats->rx_length_errors = rx_length_errors;
1516         stats->rx_crc_errors = rx_crc_errors;
1517         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1518
1519         stats->tx_errors = tx_errors;
1520         stats->rx_dropped = rx_drop;
1521         stats->tx_dropped = tx_drop;
1522         stats->collisions = netdev->stats.collisions;
1523         stats->rx_over_errors = netdev->stats.rx_over_errors;
1524         stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1525         stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1526         stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1527         stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1528         stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1529         stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1530         stats->tx_window_errors = netdev->stats.tx_window_errors;
1531         stats->rx_compressed = netdev->stats.rx_compressed;
1532         stats->tx_compressed = netdev->stats.tx_compressed;
1533 }
1534
1535 static int hns3_setup_tc(struct net_device *netdev, void *type_data)
1536 {
1537         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
1538         u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1539         struct hnae3_knic_private_info *kinfo;
1540         u8 tc = mqprio_qopt->qopt.num_tc;
1541         u16 mode = mqprio_qopt->mode;
1542         u8 hw = mqprio_qopt->qopt.hw;
1543         struct hnae3_handle *h;
1544
1545         if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1546                mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1547                 return -EOPNOTSUPP;
1548
1549         if (tc > HNAE3_MAX_TC)
1550                 return -EINVAL;
1551
1552         if (!netdev)
1553                 return -EINVAL;
1554
1555         h = hns3_get_handle(netdev);
1556         kinfo = &h->kinfo;
1557
1558         netif_dbg(h, drv, netdev, "setup tc: num_tc=%u\n", tc);
1559
1560         return (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1561                 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
1562 }
1563
1564 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
1565                              void *type_data)
1566 {
1567         if (type != TC_SETUP_QDISC_MQPRIO)
1568                 return -EOPNOTSUPP;
1569
1570         return hns3_setup_tc(dev, type_data);
1571 }
1572
1573 static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1574                                 __be16 proto, u16 vid)
1575 {
1576         struct hnae3_handle *h = hns3_get_handle(netdev);
1577         int ret = -EIO;
1578
1579         if (h->ae_algo->ops->set_vlan_filter)
1580                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1581
1582         return ret;
1583 }
1584
1585 static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1586                                  __be16 proto, u16 vid)
1587 {
1588         struct hnae3_handle *h = hns3_get_handle(netdev);
1589         int ret = -EIO;
1590
1591         if (h->ae_algo->ops->set_vlan_filter)
1592                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1593
1594         return ret;
1595 }
1596
1597 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1598                                 u8 qos, __be16 vlan_proto)
1599 {
1600         struct hnae3_handle *h = hns3_get_handle(netdev);
1601         int ret = -EIO;
1602
1603         netif_dbg(h, drv, netdev,
1604                   "set vf vlan: vf=%d, vlan=%u, qos=%u, vlan_proto=%u\n",
1605                   vf, vlan, qos, vlan_proto);
1606
1607         if (h->ae_algo->ops->set_vf_vlan_filter)
1608                 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1609                                                           qos, vlan_proto);
1610
1611         return ret;
1612 }
1613
1614 static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1615 {
1616         struct hnae3_handle *h = hns3_get_handle(netdev);
1617         int ret;
1618
1619         if (hns3_nic_resetting(netdev))
1620                 return -EBUSY;
1621
1622         if (!h->ae_algo->ops->set_mtu)
1623                 return -EOPNOTSUPP;
1624
1625         netif_dbg(h, drv, netdev,
1626                   "change mtu from %u to %d\n", netdev->mtu, new_mtu);
1627
1628         ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1629         if (ret)
1630                 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1631                            ret);
1632         else
1633                 netdev->mtu = new_mtu;
1634
1635         return ret;
1636 }
1637
1638 static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1639 {
1640         struct hns3_nic_priv *priv = netdev_priv(ndev);
1641         struct hnae3_handle *h = hns3_get_handle(ndev);
1642         struct hns3_enet_ring *tx_ring = NULL;
1643         struct napi_struct *napi;
1644         int timeout_queue = 0;
1645         int hw_head, hw_tail;
1646         int fbd_num, fbd_oft;
1647         int ebd_num, ebd_oft;
1648         int bd_num, bd_err;
1649         int ring_en, tc;
1650         int i;
1651
1652         /* Find the stopped queue the same way the stack does */
1653         for (i = 0; i < ndev->num_tx_queues; i++) {
1654                 struct netdev_queue *q;
1655                 unsigned long trans_start;
1656
1657                 q = netdev_get_tx_queue(ndev, i);
1658                 trans_start = q->trans_start;
1659                 if (netif_xmit_stopped(q) &&
1660                     time_after(jiffies,
1661                                (trans_start + ndev->watchdog_timeo))) {
1662                         timeout_queue = i;
1663                         break;
1664                 }
1665         }
1666
1667         if (i == ndev->num_tx_queues) {
1668                 netdev_info(ndev,
1669                             "no netdev TX timeout queue found, timeout count: %llu\n",
1670                             priv->tx_timeout_count);
1671                 return false;
1672         }
1673
1674         priv->tx_timeout_count++;
1675
1676         tx_ring = priv->ring_data[timeout_queue].ring;
1677         napi = &tx_ring->tqp_vector->napi;
1678
1679         netdev_info(ndev,
1680                     "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, napi state: %lu\n",
1681                     priv->tx_timeout_count, timeout_queue, tx_ring->next_to_use,
1682                     tx_ring->next_to_clean, napi->state);
1683
1684         netdev_info(ndev,
1685                     "tx_pkts: %llu, tx_bytes: %llu, io_err_cnt: %llu, sw_err_cnt: %llu\n",
1686                     tx_ring->stats.tx_pkts, tx_ring->stats.tx_bytes,
1687                     tx_ring->stats.io_err_cnt, tx_ring->stats.sw_err_cnt);
1688
1689         netdev_info(ndev,
1690                     "seg_pkt_cnt: %llu, tx_err_cnt: %llu, restart_queue: %llu, tx_busy: %llu\n",
1691                     tx_ring->stats.seg_pkt_cnt, tx_ring->stats.tx_err_cnt,
1692                     tx_ring->stats.restart_queue, tx_ring->stats.tx_busy);
1693
1694         /* When mac received many pause frames continuous, it's unable to send
1695          * packets, which may cause tx timeout
1696          */
1697         if (h->ae_algo->ops->update_stats &&
1698             h->ae_algo->ops->get_mac_pause_stats) {
1699                 u64 tx_pause_cnt, rx_pause_cnt;
1700
1701                 h->ae_algo->ops->update_stats(h, &ndev->stats);
1702                 h->ae_algo->ops->get_mac_pause_stats(h, &tx_pause_cnt,
1703                                                      &rx_pause_cnt);
1704                 netdev_info(ndev, "tx_pause_cnt: %llu, rx_pause_cnt: %llu\n",
1705                             tx_pause_cnt, rx_pause_cnt);
1706         }
1707
1708         hw_head = readl_relaxed(tx_ring->tqp->io_base +
1709                                 HNS3_RING_TX_RING_HEAD_REG);
1710         hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1711                                 HNS3_RING_TX_RING_TAIL_REG);
1712         fbd_num = readl_relaxed(tx_ring->tqp->io_base +
1713                                 HNS3_RING_TX_RING_FBDNUM_REG);
1714         fbd_oft = readl_relaxed(tx_ring->tqp->io_base +
1715                                 HNS3_RING_TX_RING_OFFSET_REG);
1716         ebd_num = readl_relaxed(tx_ring->tqp->io_base +
1717                                 HNS3_RING_TX_RING_EBDNUM_REG);
1718         ebd_oft = readl_relaxed(tx_ring->tqp->io_base +
1719                                 HNS3_RING_TX_RING_EBD_OFFSET_REG);
1720         bd_num = readl_relaxed(tx_ring->tqp->io_base +
1721                                HNS3_RING_TX_RING_BD_NUM_REG);
1722         bd_err = readl_relaxed(tx_ring->tqp->io_base +
1723                                HNS3_RING_TX_RING_BD_ERR_REG);
1724         ring_en = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_EN_REG);
1725         tc = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_TX_RING_TC_REG);
1726
1727         netdev_info(ndev,
1728                     "BD_NUM: 0x%x HW_HEAD: 0x%x, HW_TAIL: 0x%x, BD_ERR: 0x%x, INT: 0x%x\n",
1729                     bd_num, hw_head, hw_tail, bd_err,
1730                     readl(tx_ring->tqp_vector->mask_addr));
1731         netdev_info(ndev,
1732                     "RING_EN: 0x%x, TC: 0x%x, FBD_NUM: 0x%x FBD_OFT: 0x%x, EBD_NUM: 0x%x, EBD_OFT: 0x%x\n",
1733                     ring_en, tc, fbd_num, fbd_oft, ebd_num, ebd_oft);
1734
1735         return true;
1736 }
1737
1738 static void hns3_nic_net_timeout(struct net_device *ndev)
1739 {
1740         struct hns3_nic_priv *priv = netdev_priv(ndev);
1741         struct hnae3_handle *h = priv->ae_handle;
1742
1743         if (!hns3_get_tx_timeo_queue_info(ndev))
1744                 return;
1745
1746         /* request the reset, and let the hclge to determine
1747          * which reset level should be done
1748          */
1749         if (h->ae_algo->ops->reset_event)
1750                 h->ae_algo->ops->reset_event(h->pdev, h);
1751 }
1752
1753 #ifdef CONFIG_RFS_ACCEL
1754 static int hns3_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb,
1755                               u16 rxq_index, u32 flow_id)
1756 {
1757         struct hnae3_handle *h = hns3_get_handle(dev);
1758         struct flow_keys fkeys;
1759
1760         if (!h->ae_algo->ops->add_arfs_entry)
1761                 return -EOPNOTSUPP;
1762
1763         if (skb->encapsulation)
1764                 return -EPROTONOSUPPORT;
1765
1766         if (!skb_flow_dissect_flow_keys(skb, &fkeys, 0))
1767                 return -EPROTONOSUPPORT;
1768
1769         if ((fkeys.basic.n_proto != htons(ETH_P_IP) &&
1770              fkeys.basic.n_proto != htons(ETH_P_IPV6)) ||
1771             (fkeys.basic.ip_proto != IPPROTO_TCP &&
1772              fkeys.basic.ip_proto != IPPROTO_UDP))
1773                 return -EPROTONOSUPPORT;
1774
1775         return h->ae_algo->ops->add_arfs_entry(h, rxq_index, flow_id, &fkeys);
1776 }
1777 #endif
1778
1779 static const struct net_device_ops hns3_nic_netdev_ops = {
1780         .ndo_open               = hns3_nic_net_open,
1781         .ndo_stop               = hns3_nic_net_stop,
1782         .ndo_start_xmit         = hns3_nic_net_xmit,
1783         .ndo_tx_timeout         = hns3_nic_net_timeout,
1784         .ndo_set_mac_address    = hns3_nic_net_set_mac_address,
1785         .ndo_do_ioctl           = hns3_nic_do_ioctl,
1786         .ndo_change_mtu         = hns3_nic_change_mtu,
1787         .ndo_set_features       = hns3_nic_set_features,
1788         .ndo_get_stats64        = hns3_nic_get_stats64,
1789         .ndo_setup_tc           = hns3_nic_setup_tc,
1790         .ndo_set_rx_mode        = hns3_nic_set_rx_mode,
1791         .ndo_vlan_rx_add_vid    = hns3_vlan_rx_add_vid,
1792         .ndo_vlan_rx_kill_vid   = hns3_vlan_rx_kill_vid,
1793         .ndo_set_vf_vlan        = hns3_ndo_set_vf_vlan,
1794 #ifdef CONFIG_RFS_ACCEL
1795         .ndo_rx_flow_steer      = hns3_rx_flow_steer,
1796 #endif
1797
1798 };
1799
1800 bool hns3_is_phys_func(struct pci_dev *pdev)
1801 {
1802         u32 dev_id = pdev->device;
1803
1804         switch (dev_id) {
1805         case HNAE3_DEV_ID_GE:
1806         case HNAE3_DEV_ID_25GE:
1807         case HNAE3_DEV_ID_25GE_RDMA:
1808         case HNAE3_DEV_ID_25GE_RDMA_MACSEC:
1809         case HNAE3_DEV_ID_50GE_RDMA:
1810         case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
1811         case HNAE3_DEV_ID_100G_RDMA_MACSEC:
1812                 return true;
1813         case HNAE3_DEV_ID_100G_VF:
1814         case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF:
1815                 return false;
1816         default:
1817                 dev_warn(&pdev->dev, "un-recognized pci device-id %d",
1818                          dev_id);
1819         }
1820
1821         return false;
1822 }
1823
1824 static void hns3_disable_sriov(struct pci_dev *pdev)
1825 {
1826         /* If our VFs are assigned we cannot shut down SR-IOV
1827          * without causing issues, so just leave the hardware
1828          * available but disabled
1829          */
1830         if (pci_vfs_assigned(pdev)) {
1831                 dev_warn(&pdev->dev,
1832                          "disabling driver while VFs are assigned\n");
1833                 return;
1834         }
1835
1836         pci_disable_sriov(pdev);
1837 }
1838
1839 static void hns3_get_dev_capability(struct pci_dev *pdev,
1840                                     struct hnae3_ae_dev *ae_dev)
1841 {
1842         if (pdev->revision >= 0x21) {
1843                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B, 1);
1844                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B, 1);
1845         }
1846 }
1847
1848 /* hns3_probe - Device initialization routine
1849  * @pdev: PCI device information struct
1850  * @ent: entry in hns3_pci_tbl
1851  *
1852  * hns3_probe initializes a PF identified by a pci_dev structure.
1853  * The OS initialization, configuring of the PF private structure,
1854  * and a hardware reset occur.
1855  *
1856  * Returns 0 on success, negative on failure
1857  */
1858 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1859 {
1860         struct hnae3_ae_dev *ae_dev;
1861         int ret;
1862
1863         ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev), GFP_KERNEL);
1864         if (!ae_dev) {
1865                 ret = -ENOMEM;
1866                 return ret;
1867         }
1868
1869         ae_dev->pdev = pdev;
1870         ae_dev->flag = ent->driver_data;
1871         ae_dev->reset_type = HNAE3_NONE_RESET;
1872         hns3_get_dev_capability(pdev, ae_dev);
1873         pci_set_drvdata(pdev, ae_dev);
1874
1875         ret = hnae3_register_ae_dev(ae_dev);
1876         if (ret) {
1877                 devm_kfree(&pdev->dev, ae_dev);
1878                 pci_set_drvdata(pdev, NULL);
1879         }
1880
1881         return ret;
1882 }
1883
1884 /* hns3_remove - Device removal routine
1885  * @pdev: PCI device information struct
1886  */
1887 static void hns3_remove(struct pci_dev *pdev)
1888 {
1889         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1890
1891         if (hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))
1892                 hns3_disable_sriov(pdev);
1893
1894         hnae3_unregister_ae_dev(ae_dev);
1895         pci_set_drvdata(pdev, NULL);
1896 }
1897
1898 /**
1899  * hns3_pci_sriov_configure
1900  * @pdev: pointer to a pci_dev structure
1901  * @num_vfs: number of VFs to allocate
1902  *
1903  * Enable or change the number of VFs. Called when the user updates the number
1904  * of VFs in sysfs.
1905  **/
1906 static int hns3_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1907 {
1908         int ret;
1909
1910         if (!(hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))) {
1911                 dev_warn(&pdev->dev, "Can not config SRIOV\n");
1912                 return -EINVAL;
1913         }
1914
1915         if (num_vfs) {
1916                 ret = pci_enable_sriov(pdev, num_vfs);
1917                 if (ret)
1918                         dev_err(&pdev->dev, "SRIOV enable failed %d\n", ret);
1919                 else
1920                         return num_vfs;
1921         } else if (!pci_vfs_assigned(pdev)) {
1922                 pci_disable_sriov(pdev);
1923         } else {
1924                 dev_warn(&pdev->dev,
1925                          "Unable to free VFs because some are assigned to VMs.\n");
1926         }
1927
1928         return 0;
1929 }
1930
1931 static void hns3_shutdown(struct pci_dev *pdev)
1932 {
1933         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1934
1935         hnae3_unregister_ae_dev(ae_dev);
1936         devm_kfree(&pdev->dev, ae_dev);
1937         pci_set_drvdata(pdev, NULL);
1938
1939         if (system_state == SYSTEM_POWER_OFF)
1940                 pci_set_power_state(pdev, PCI_D3hot);
1941 }
1942
1943 static pci_ers_result_t hns3_error_detected(struct pci_dev *pdev,
1944                                             pci_channel_state_t state)
1945 {
1946         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1947         pci_ers_result_t ret;
1948
1949         dev_info(&pdev->dev, "PCI error detected, state(=%d)!!\n", state);
1950
1951         if (state == pci_channel_io_perm_failure)
1952                 return PCI_ERS_RESULT_DISCONNECT;
1953
1954         if (!ae_dev || !ae_dev->ops) {
1955                 dev_err(&pdev->dev,
1956                         "Can't recover - error happened before device initialized\n");
1957                 return PCI_ERS_RESULT_NONE;
1958         }
1959
1960         if (ae_dev->ops->handle_hw_ras_error)
1961                 ret = ae_dev->ops->handle_hw_ras_error(ae_dev);
1962         else
1963                 return PCI_ERS_RESULT_NONE;
1964
1965         return ret;
1966 }
1967
1968 static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev)
1969 {
1970         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1971         const struct hnae3_ae_ops *ops;
1972         enum hnae3_reset_type reset_type;
1973         struct device *dev = &pdev->dev;
1974
1975         if (!ae_dev || !ae_dev->ops)
1976                 return PCI_ERS_RESULT_NONE;
1977
1978         ops = ae_dev->ops;
1979         /* request the reset */
1980         if (ops->reset_event && ops->get_reset_level) {
1981                 if (ae_dev->hw_err_reset_req) {
1982                         reset_type = ops->get_reset_level(ae_dev,
1983                                                 &ae_dev->hw_err_reset_req);
1984                         ops->set_default_reset_request(ae_dev, reset_type);
1985                         dev_info(dev, "requesting reset due to PCI error\n");
1986                         ops->reset_event(pdev, NULL);
1987                 }
1988
1989                 return PCI_ERS_RESULT_RECOVERED;
1990         }
1991
1992         return PCI_ERS_RESULT_DISCONNECT;
1993 }
1994
1995 static void hns3_reset_prepare(struct pci_dev *pdev)
1996 {
1997         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1998
1999         dev_info(&pdev->dev, "hns3 flr prepare\n");
2000         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_prepare)
2001                 ae_dev->ops->flr_prepare(ae_dev);
2002 }
2003
2004 static void hns3_reset_done(struct pci_dev *pdev)
2005 {
2006         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2007
2008         dev_info(&pdev->dev, "hns3 flr done\n");
2009         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_done)
2010                 ae_dev->ops->flr_done(ae_dev);
2011 }
2012
2013 static const struct pci_error_handlers hns3_err_handler = {
2014         .error_detected = hns3_error_detected,
2015         .slot_reset     = hns3_slot_reset,
2016         .reset_prepare  = hns3_reset_prepare,
2017         .reset_done     = hns3_reset_done,
2018 };
2019
2020 static struct pci_driver hns3_driver = {
2021         .name     = hns3_driver_name,
2022         .id_table = hns3_pci_tbl,
2023         .probe    = hns3_probe,
2024         .remove   = hns3_remove,
2025         .shutdown = hns3_shutdown,
2026         .sriov_configure = hns3_pci_sriov_configure,
2027         .err_handler    = &hns3_err_handler,
2028 };
2029
2030 /* set default feature to hns3 */
2031 static void hns3_set_default_feature(struct net_device *netdev)
2032 {
2033         struct hnae3_handle *h = hns3_get_handle(netdev);
2034         struct pci_dev *pdev = h->pdev;
2035
2036         netdev->priv_flags |= IFF_UNICAST_FLT;
2037
2038         netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2039                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2040                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2041                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2042                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2043
2044         netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
2045
2046         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
2047
2048         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2049                 NETIF_F_HW_VLAN_CTAG_FILTER |
2050                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2051                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2052                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2053                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2054                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2055
2056         netdev->vlan_features |=
2057                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
2058                 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
2059                 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2060                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2061                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2062
2063         netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2064                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2065                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2066                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2067                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2068                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2069
2070         if (pdev->revision >= 0x21) {
2071                 netdev->hw_features |= NETIF_F_GRO_HW;
2072                 netdev->features |= NETIF_F_GRO_HW;
2073
2074                 if (!(h->flags & HNAE3_SUPPORT_VF)) {
2075                         netdev->hw_features |= NETIF_F_NTUPLE;
2076                         netdev->features |= NETIF_F_NTUPLE;
2077                 }
2078         }
2079 }
2080
2081 static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
2082                              struct hns3_desc_cb *cb)
2083 {
2084         unsigned int order = hns3_page_order(ring);
2085         struct page *p;
2086
2087         p = dev_alloc_pages(order);
2088         if (!p)
2089                 return -ENOMEM;
2090
2091         cb->priv = p;
2092         cb->page_offset = 0;
2093         cb->reuse_flag = 0;
2094         cb->buf  = page_address(p);
2095         cb->length = hns3_page_size(ring);
2096         cb->type = DESC_TYPE_PAGE;
2097
2098         return 0;
2099 }
2100
2101 static void hns3_free_buffer(struct hns3_enet_ring *ring,
2102                              struct hns3_desc_cb *cb)
2103 {
2104         if (cb->type == DESC_TYPE_SKB)
2105                 dev_kfree_skb_any((struct sk_buff *)cb->priv);
2106         else if (!HNAE3_IS_TX_RING(ring))
2107                 put_page((struct page *)cb->priv);
2108         memset(cb, 0, sizeof(*cb));
2109 }
2110
2111 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
2112 {
2113         cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
2114                                cb->length, ring_to_dma_dir(ring));
2115
2116         if (unlikely(dma_mapping_error(ring_to_dev(ring), cb->dma)))
2117                 return -EIO;
2118
2119         return 0;
2120 }
2121
2122 static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
2123                               struct hns3_desc_cb *cb)
2124 {
2125         if (cb->type == DESC_TYPE_SKB)
2126                 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
2127                                  ring_to_dma_dir(ring));
2128         else if (cb->length)
2129                 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
2130                                ring_to_dma_dir(ring));
2131 }
2132
2133 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
2134 {
2135         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2136         ring->desc[i].addr = 0;
2137 }
2138
2139 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
2140 {
2141         struct hns3_desc_cb *cb = &ring->desc_cb[i];
2142
2143         if (!ring->desc_cb[i].dma)
2144                 return;
2145
2146         hns3_buffer_detach(ring, i);
2147         hns3_free_buffer(ring, cb);
2148 }
2149
2150 static void hns3_free_buffers(struct hns3_enet_ring *ring)
2151 {
2152         int i;
2153
2154         for (i = 0; i < ring->desc_num; i++)
2155                 hns3_free_buffer_detach(ring, i);
2156 }
2157
2158 /* free desc along with its attached buffer */
2159 static void hns3_free_desc(struct hns3_enet_ring *ring)
2160 {
2161         int size = ring->desc_num * sizeof(ring->desc[0]);
2162
2163         hns3_free_buffers(ring);
2164
2165         if (ring->desc) {
2166                 dma_free_coherent(ring_to_dev(ring), size,
2167                                   ring->desc, ring->desc_dma_addr);
2168                 ring->desc = NULL;
2169         }
2170 }
2171
2172 static int hns3_alloc_desc(struct hns3_enet_ring *ring)
2173 {
2174         int size = ring->desc_num * sizeof(ring->desc[0]);
2175
2176         ring->desc = dma_alloc_coherent(ring_to_dev(ring), size,
2177                                         &ring->desc_dma_addr, GFP_KERNEL);
2178         if (!ring->desc)
2179                 return -ENOMEM;
2180
2181         return 0;
2182 }
2183
2184 static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
2185                                    struct hns3_desc_cb *cb)
2186 {
2187         int ret;
2188
2189         ret = hns3_alloc_buffer(ring, cb);
2190         if (ret)
2191                 goto out;
2192
2193         ret = hns3_map_buffer(ring, cb);
2194         if (ret)
2195                 goto out_with_buf;
2196
2197         return 0;
2198
2199 out_with_buf:
2200         hns3_free_buffer(ring, cb);
2201 out:
2202         return ret;
2203 }
2204
2205 static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
2206 {
2207         int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
2208
2209         if (ret)
2210                 return ret;
2211
2212         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2213
2214         return 0;
2215 }
2216
2217 /* Allocate memory for raw pkg, and map with dma */
2218 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
2219 {
2220         int i, j, ret;
2221
2222         for (i = 0; i < ring->desc_num; i++) {
2223                 ret = hns3_alloc_buffer_attach(ring, i);
2224                 if (ret)
2225                         goto out_buffer_fail;
2226         }
2227
2228         return 0;
2229
2230 out_buffer_fail:
2231         for (j = i - 1; j >= 0; j--)
2232                 hns3_free_buffer_detach(ring, j);
2233         return ret;
2234 }
2235
2236 /* detach a in-used buffer and replace with a reserved one */
2237 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
2238                                 struct hns3_desc_cb *res_cb)
2239 {
2240         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2241         ring->desc_cb[i] = *res_cb;
2242         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2243         ring->desc[i].rx.bd_base_info = 0;
2244 }
2245
2246 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
2247 {
2248         ring->desc_cb[i].reuse_flag = 0;
2249         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma +
2250                                          ring->desc_cb[i].page_offset);
2251         ring->desc[i].rx.bd_base_info = 0;
2252 }
2253
2254 static void hns3_nic_reclaim_desc(struct hns3_enet_ring *ring, int head,
2255                                   int *bytes, int *pkts)
2256 {
2257         int ntc = ring->next_to_clean;
2258         struct hns3_desc_cb *desc_cb;
2259
2260         while (head != ntc) {
2261                 desc_cb = &ring->desc_cb[ntc];
2262                 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
2263                 (*bytes) += desc_cb->length;
2264                 /* desc_cb will be cleaned, after hnae3_free_buffer_detach */
2265                 hns3_free_buffer_detach(ring, ntc);
2266
2267                 if (++ntc == ring->desc_num)
2268                         ntc = 0;
2269
2270                 /* Issue prefetch for next Tx descriptor */
2271                 prefetch(&ring->desc_cb[ntc]);
2272         }
2273
2274         /* This smp_store_release() pairs with smp_load_acquire() in
2275          * ring_space called by hns3_nic_net_xmit.
2276          */
2277         smp_store_release(&ring->next_to_clean, ntc);
2278 }
2279
2280 static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
2281 {
2282         int u = ring->next_to_use;
2283         int c = ring->next_to_clean;
2284
2285         if (unlikely(h > ring->desc_num))
2286                 return 0;
2287
2288         return u > c ? (h > c && h <= u) : (h > c || h <= u);
2289 }
2290
2291 void hns3_clean_tx_ring(struct hns3_enet_ring *ring)
2292 {
2293         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2294         struct hns3_nic_priv *priv = netdev_priv(netdev);
2295         struct netdev_queue *dev_queue;
2296         int bytes, pkts;
2297         int head;
2298
2299         head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
2300         rmb(); /* Make sure head is ready before touch any data */
2301
2302         if (is_ring_empty(ring) || head == ring->next_to_clean)
2303                 return; /* no data to poll */
2304
2305         if (unlikely(!is_valid_clean_head(ring, head))) {
2306                 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
2307                            ring->next_to_use, ring->next_to_clean);
2308
2309                 u64_stats_update_begin(&ring->syncp);
2310                 ring->stats.io_err_cnt++;
2311                 u64_stats_update_end(&ring->syncp);
2312                 return;
2313         }
2314
2315         bytes = 0;
2316         pkts = 0;
2317         hns3_nic_reclaim_desc(ring, head, &bytes, &pkts);
2318
2319         ring->tqp_vector->tx_group.total_bytes += bytes;
2320         ring->tqp_vector->tx_group.total_packets += pkts;
2321
2322         u64_stats_update_begin(&ring->syncp);
2323         ring->stats.tx_bytes += bytes;
2324         ring->stats.tx_pkts += pkts;
2325         u64_stats_update_end(&ring->syncp);
2326
2327         dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
2328         netdev_tx_completed_queue(dev_queue, pkts, bytes);
2329
2330         if (unlikely(pkts && netif_carrier_ok(netdev) &&
2331                      (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
2332                 /* Make sure that anybody stopping the queue after this
2333                  * sees the new next_to_clean.
2334                  */
2335                 smp_mb();
2336                 if (netif_tx_queue_stopped(dev_queue) &&
2337                     !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
2338                         netif_tx_wake_queue(dev_queue);
2339                         ring->stats.restart_queue++;
2340                 }
2341         }
2342 }
2343
2344 static int hns3_desc_unused(struct hns3_enet_ring *ring)
2345 {
2346         int ntc = ring->next_to_clean;
2347         int ntu = ring->next_to_use;
2348
2349         return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
2350 }
2351
2352 static void hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring,
2353                                       int cleand_count)
2354 {
2355         struct hns3_desc_cb *desc_cb;
2356         struct hns3_desc_cb res_cbs;
2357         int i, ret;
2358
2359         for (i = 0; i < cleand_count; i++) {
2360                 desc_cb = &ring->desc_cb[ring->next_to_use];
2361                 if (desc_cb->reuse_flag) {
2362                         u64_stats_update_begin(&ring->syncp);
2363                         ring->stats.reuse_pg_cnt++;
2364                         u64_stats_update_end(&ring->syncp);
2365
2366                         hns3_reuse_buffer(ring, ring->next_to_use);
2367                 } else {
2368                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
2369                         if (ret) {
2370                                 u64_stats_update_begin(&ring->syncp);
2371                                 ring->stats.sw_err_cnt++;
2372                                 u64_stats_update_end(&ring->syncp);
2373
2374                                 netdev_err(ring->tqp->handle->kinfo.netdev,
2375                                            "hnae reserve buffer map failed.\n");
2376                                 break;
2377                         }
2378                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
2379
2380                         u64_stats_update_begin(&ring->syncp);
2381                         ring->stats.non_reuse_pg++;
2382                         u64_stats_update_end(&ring->syncp);
2383                 }
2384
2385                 ring_ptr_move_fw(ring, next_to_use);
2386         }
2387
2388         wmb(); /* Make all data has been write before submit */
2389         writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
2390 }
2391
2392 static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2393                                 struct hns3_enet_ring *ring, int pull_len,
2394                                 struct hns3_desc_cb *desc_cb)
2395 {
2396         struct hns3_desc *desc = &ring->desc[ring->next_to_clean];
2397         int size = le16_to_cpu(desc->rx.size);
2398         u32 truesize = hns3_buf_size(ring);
2399
2400         skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2401                         size - pull_len, truesize);
2402
2403         /* Avoid re-using remote pages, or the stack is still using the page
2404          * when page_offset rollback to zero, flag default unreuse
2405          */
2406         if (unlikely(page_to_nid(desc_cb->priv) != numa_mem_id()) ||
2407             (!desc_cb->page_offset && page_count(desc_cb->priv) > 1))
2408                 return;
2409
2410         /* Move offset up to the next cache line */
2411         desc_cb->page_offset += truesize;
2412
2413         if (desc_cb->page_offset + truesize <= hns3_page_size(ring)) {
2414                 desc_cb->reuse_flag = 1;
2415                 /* Bump ref count on page before it is given */
2416                 get_page(desc_cb->priv);
2417         } else if (page_count(desc_cb->priv) == 1) {
2418                 desc_cb->reuse_flag = 1;
2419                 desc_cb->page_offset = 0;
2420                 get_page(desc_cb->priv);
2421         }
2422 }
2423
2424 static int hns3_gro_complete(struct sk_buff *skb, u32 l234info)
2425 {
2426         __be16 type = skb->protocol;
2427         struct tcphdr *th;
2428         int depth = 0;
2429
2430         while (eth_type_vlan(type)) {
2431                 struct vlan_hdr *vh;
2432
2433                 if ((depth + VLAN_HLEN) > skb_headlen(skb))
2434                         return -EFAULT;
2435
2436                 vh = (struct vlan_hdr *)(skb->data + depth);
2437                 type = vh->h_vlan_encapsulated_proto;
2438                 depth += VLAN_HLEN;
2439         }
2440
2441         skb_set_network_header(skb, depth);
2442
2443         if (type == htons(ETH_P_IP)) {
2444                 const struct iphdr *iph = ip_hdr(skb);
2445
2446                 depth += sizeof(struct iphdr);
2447                 skb_set_transport_header(skb, depth);
2448                 th = tcp_hdr(skb);
2449                 th->check = ~tcp_v4_check(skb->len - depth, iph->saddr,
2450                                           iph->daddr, 0);
2451         } else if (type == htons(ETH_P_IPV6)) {
2452                 const struct ipv6hdr *iph = ipv6_hdr(skb);
2453
2454                 depth += sizeof(struct ipv6hdr);
2455                 skb_set_transport_header(skb, depth);
2456                 th = tcp_hdr(skb);
2457                 th->check = ~tcp_v6_check(skb->len - depth, &iph->saddr,
2458                                           &iph->daddr, 0);
2459         } else {
2460                 netdev_err(skb->dev,
2461                            "Error: FW GRO supports only IPv4/IPv6, not 0x%04x, depth: %d\n",
2462                            be16_to_cpu(type), depth);
2463                 return -EFAULT;
2464         }
2465
2466         skb_shinfo(skb)->gso_segs = NAPI_GRO_CB(skb)->count;
2467         if (th->cwr)
2468                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_ECN;
2469
2470         if (l234info & BIT(HNS3_RXD_GRO_FIXID_B))
2471                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_FIXEDID;
2472
2473         skb->csum_start = (unsigned char *)th - skb->head;
2474         skb->csum_offset = offsetof(struct tcphdr, check);
2475         skb->ip_summed = CHECKSUM_PARTIAL;
2476         return 0;
2477 }
2478
2479 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2480                              u32 l234info, u32 bd_base_info, u32 ol_info)
2481 {
2482         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2483         int l3_type, l4_type;
2484         int ol4_type;
2485
2486         skb->ip_summed = CHECKSUM_NONE;
2487
2488         skb_checksum_none_assert(skb);
2489
2490         if (!(netdev->features & NETIF_F_RXCSUM))
2491                 return;
2492
2493         /* check if hardware has done checksum */
2494         if (!(bd_base_info & BIT(HNS3_RXD_L3L4P_B)))
2495                 return;
2496
2497         if (unlikely(l234info & (BIT(HNS3_RXD_L3E_B) | BIT(HNS3_RXD_L4E_B) |
2498                                  BIT(HNS3_RXD_OL3E_B) |
2499                                  BIT(HNS3_RXD_OL4E_B)))) {
2500                 u64_stats_update_begin(&ring->syncp);
2501                 ring->stats.l3l4_csum_err++;
2502                 u64_stats_update_end(&ring->syncp);
2503
2504                 return;
2505         }
2506
2507         ol4_type = hnae3_get_field(ol_info, HNS3_RXD_OL4ID_M,
2508                                    HNS3_RXD_OL4ID_S);
2509         switch (ol4_type) {
2510         case HNS3_OL4_TYPE_MAC_IN_UDP:
2511         case HNS3_OL4_TYPE_NVGRE:
2512                 skb->csum_level = 1;
2513                 /* fall through */
2514         case HNS3_OL4_TYPE_NO_TUN:
2515                 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2516                                           HNS3_RXD_L3ID_S);
2517                 l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
2518                                           HNS3_RXD_L4ID_S);
2519
2520                 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2521                 if ((l3_type == HNS3_L3_TYPE_IPV4 ||
2522                      l3_type == HNS3_L3_TYPE_IPV6) &&
2523                     (l4_type == HNS3_L4_TYPE_UDP ||
2524                      l4_type == HNS3_L4_TYPE_TCP ||
2525                      l4_type == HNS3_L4_TYPE_SCTP))
2526                         skb->ip_summed = CHECKSUM_UNNECESSARY;
2527                 break;
2528         default:
2529                 break;
2530         }
2531 }
2532
2533 static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2534 {
2535         if (skb_has_frag_list(skb))
2536                 napi_gro_flush(&ring->tqp_vector->napi, false);
2537
2538         napi_gro_receive(&ring->tqp_vector->napi, skb);
2539 }
2540
2541 static bool hns3_parse_vlan_tag(struct hns3_enet_ring *ring,
2542                                 struct hns3_desc *desc, u32 l234info,
2543                                 u16 *vlan_tag)
2544 {
2545         struct hnae3_handle *handle = ring->tqp->handle;
2546         struct pci_dev *pdev = ring->tqp->handle->pdev;
2547
2548         if (pdev->revision == 0x20) {
2549                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2550                 if (!(*vlan_tag & VLAN_VID_MASK))
2551                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2552
2553                 return (*vlan_tag != 0);
2554         }
2555
2556 #define HNS3_STRP_OUTER_VLAN    0x1
2557 #define HNS3_STRP_INNER_VLAN    0x2
2558 #define HNS3_STRP_BOTH          0x3
2559
2560         /* Hardware always insert VLAN tag into RX descriptor when
2561          * remove the tag from packet, driver needs to determine
2562          * reporting which tag to stack.
2563          */
2564         switch (hnae3_get_field(l234info, HNS3_RXD_STRP_TAGP_M,
2565                                 HNS3_RXD_STRP_TAGP_S)) {
2566         case HNS3_STRP_OUTER_VLAN:
2567                 if (handle->port_base_vlan_state !=
2568                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2569                         return false;
2570
2571                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2572                 return true;
2573         case HNS3_STRP_INNER_VLAN:
2574                 if (handle->port_base_vlan_state !=
2575                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2576                         return false;
2577
2578                 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2579                 return true;
2580         case HNS3_STRP_BOTH:
2581                 if (handle->port_base_vlan_state ==
2582                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2583                         *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2584                 else
2585                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2586
2587                 return true;
2588         default:
2589                 return false;
2590         }
2591 }
2592
2593 static int hns3_alloc_skb(struct hns3_enet_ring *ring, unsigned int length,
2594                           unsigned char *va)
2595 {
2596 #define HNS3_NEED_ADD_FRAG      1
2597         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
2598         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2599         struct sk_buff *skb;
2600
2601         ring->skb = napi_alloc_skb(&ring->tqp_vector->napi, HNS3_RX_HEAD_SIZE);
2602         skb = ring->skb;
2603         if (unlikely(!skb)) {
2604                 netdev_err(netdev, "alloc rx skb fail\n");
2605
2606                 u64_stats_update_begin(&ring->syncp);
2607                 ring->stats.sw_err_cnt++;
2608                 u64_stats_update_end(&ring->syncp);
2609
2610                 return -ENOMEM;
2611         }
2612
2613         prefetchw(skb->data);
2614
2615         ring->pending_buf = 1;
2616         ring->frag_num = 0;
2617         ring->tail_skb = NULL;
2618         if (length <= HNS3_RX_HEAD_SIZE) {
2619                 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2620
2621                 /* We can reuse buffer as-is, just make sure it is local */
2622                 if (likely(page_to_nid(desc_cb->priv) == numa_mem_id()))
2623                         desc_cb->reuse_flag = 1;
2624                 else /* This page cannot be reused so discard it */
2625                         put_page(desc_cb->priv);
2626
2627                 ring_ptr_move_fw(ring, next_to_clean);
2628                 return 0;
2629         }
2630         u64_stats_update_begin(&ring->syncp);
2631         ring->stats.seg_pkt_cnt++;
2632         u64_stats_update_end(&ring->syncp);
2633
2634         ring->pull_len = eth_get_headlen(netdev, va, HNS3_RX_HEAD_SIZE);
2635         __skb_put(skb, ring->pull_len);
2636         hns3_nic_reuse_page(skb, ring->frag_num++, ring, ring->pull_len,
2637                             desc_cb);
2638         ring_ptr_move_fw(ring, next_to_clean);
2639
2640         return HNS3_NEED_ADD_FRAG;
2641 }
2642
2643 static int hns3_add_frag(struct hns3_enet_ring *ring, struct hns3_desc *desc,
2644                          struct sk_buff **out_skb, bool pending)
2645 {
2646         struct sk_buff *skb = *out_skb;
2647         struct sk_buff *head_skb = *out_skb;
2648         struct sk_buff *new_skb;
2649         struct hns3_desc_cb *desc_cb;
2650         struct hns3_desc *pre_desc;
2651         u32 bd_base_info;
2652         int pre_bd;
2653
2654         /* if there is pending bd, the SW param next_to_clean has moved
2655          * to next and the next is NULL
2656          */
2657         if (pending) {
2658                 pre_bd = (ring->next_to_clean - 1 + ring->desc_num) %
2659                          ring->desc_num;
2660                 pre_desc = &ring->desc[pre_bd];
2661                 bd_base_info = le32_to_cpu(pre_desc->rx.bd_base_info);
2662         } else {
2663                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2664         }
2665
2666         while (!(bd_base_info & BIT(HNS3_RXD_FE_B))) {
2667                 desc = &ring->desc[ring->next_to_clean];
2668                 desc_cb = &ring->desc_cb[ring->next_to_clean];
2669                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2670                 /* make sure HW write desc complete */
2671                 dma_rmb();
2672                 if (!(bd_base_info & BIT(HNS3_RXD_VLD_B)))
2673                         return -ENXIO;
2674
2675                 if (unlikely(ring->frag_num >= MAX_SKB_FRAGS)) {
2676                         new_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2677                                                  HNS3_RX_HEAD_SIZE);
2678                         if (unlikely(!new_skb)) {
2679                                 netdev_err(ring->tqp->handle->kinfo.netdev,
2680                                            "alloc rx skb frag fail\n");
2681                                 return -ENXIO;
2682                         }
2683                         ring->frag_num = 0;
2684
2685                         if (ring->tail_skb) {
2686                                 ring->tail_skb->next = new_skb;
2687                                 ring->tail_skb = new_skb;
2688                         } else {
2689                                 skb_shinfo(skb)->frag_list = new_skb;
2690                                 ring->tail_skb = new_skb;
2691                         }
2692                 }
2693
2694                 if (ring->tail_skb) {
2695                         head_skb->truesize += hns3_buf_size(ring);
2696                         head_skb->data_len += le16_to_cpu(desc->rx.size);
2697                         head_skb->len += le16_to_cpu(desc->rx.size);
2698                         skb = ring->tail_skb;
2699                 }
2700
2701                 hns3_nic_reuse_page(skb, ring->frag_num++, ring, 0, desc_cb);
2702                 ring_ptr_move_fw(ring, next_to_clean);
2703                 ring->pending_buf++;
2704         }
2705
2706         return 0;
2707 }
2708
2709 static int hns3_set_gro_and_checksum(struct hns3_enet_ring *ring,
2710                                      struct sk_buff *skb, u32 l234info,
2711                                      u32 bd_base_info, u32 ol_info)
2712 {
2713         u32 l3_type;
2714
2715         skb_shinfo(skb)->gso_size = hnae3_get_field(bd_base_info,
2716                                                     HNS3_RXD_GRO_SIZE_M,
2717                                                     HNS3_RXD_GRO_SIZE_S);
2718         /* if there is no HW GRO, do not set gro params */
2719         if (!skb_shinfo(skb)->gso_size) {
2720                 hns3_rx_checksum(ring, skb, l234info, bd_base_info, ol_info);
2721                 return 0;
2722         }
2723
2724         NAPI_GRO_CB(skb)->count = hnae3_get_field(l234info,
2725                                                   HNS3_RXD_GRO_COUNT_M,
2726                                                   HNS3_RXD_GRO_COUNT_S);
2727
2728         l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S);
2729         if (l3_type == HNS3_L3_TYPE_IPV4)
2730                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
2731         else if (l3_type == HNS3_L3_TYPE_IPV6)
2732                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
2733         else
2734                 return -EFAULT;
2735
2736         return  hns3_gro_complete(skb, l234info);
2737 }
2738
2739 static void hns3_set_rx_skb_rss_type(struct hns3_enet_ring *ring,
2740                                      struct sk_buff *skb, u32 rss_hash)
2741 {
2742         struct hnae3_handle *handle = ring->tqp->handle;
2743         enum pkt_hash_types rss_type;
2744
2745         if (rss_hash)
2746                 rss_type = handle->kinfo.rss_type;
2747         else
2748                 rss_type = PKT_HASH_TYPE_NONE;
2749
2750         skb_set_hash(skb, rss_hash, rss_type);
2751 }
2752
2753 static int hns3_handle_bdinfo(struct hns3_enet_ring *ring, struct sk_buff *skb)
2754 {
2755         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2756         enum hns3_pkt_l2t_type l2_frame_type;
2757         u32 bd_base_info, l234info, ol_info;
2758         struct hns3_desc *desc;
2759         unsigned int len;
2760         int pre_ntc, ret;
2761
2762         /* bdinfo handled below is only valid on the last BD of the
2763          * current packet, and ring->next_to_clean indicates the first
2764          * descriptor of next packet, so need - 1 below.
2765          */
2766         pre_ntc = ring->next_to_clean ? (ring->next_to_clean - 1) :
2767                                         (ring->desc_num - 1);
2768         desc = &ring->desc[pre_ntc];
2769         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2770         l234info = le32_to_cpu(desc->rx.l234_info);
2771         ol_info = le32_to_cpu(desc->rx.ol_info);
2772
2773         /* Based on hw strategy, the tag offloaded will be stored at
2774          * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2775          * in one layer tag case.
2776          */
2777         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2778                 u16 vlan_tag;
2779
2780                 if (hns3_parse_vlan_tag(ring, desc, l234info, &vlan_tag))
2781                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
2782                                                vlan_tag);
2783         }
2784
2785         if (unlikely(!desc->rx.pkt_len || (l234info & (BIT(HNS3_RXD_TRUNCAT_B) |
2786                                   BIT(HNS3_RXD_L2E_B))))) {
2787                 u64_stats_update_begin(&ring->syncp);
2788                 if (l234info & BIT(HNS3_RXD_L2E_B))
2789                         ring->stats.l2_err++;
2790                 else
2791                         ring->stats.err_pkt_len++;
2792                 u64_stats_update_end(&ring->syncp);
2793
2794                 return -EFAULT;
2795         }
2796
2797         len = skb->len;
2798
2799         /* Do update ip stack process */
2800         skb->protocol = eth_type_trans(skb, netdev);
2801
2802         /* This is needed in order to enable forwarding support */
2803         ret = hns3_set_gro_and_checksum(ring, skb, l234info,
2804                                         bd_base_info, ol_info);
2805         if (unlikely(ret)) {
2806                 u64_stats_update_begin(&ring->syncp);
2807                 ring->stats.rx_err_cnt++;
2808                 u64_stats_update_end(&ring->syncp);
2809                 return ret;
2810         }
2811
2812         l2_frame_type = hnae3_get_field(l234info, HNS3_RXD_DMAC_M,
2813                                         HNS3_RXD_DMAC_S);
2814
2815         u64_stats_update_begin(&ring->syncp);
2816         ring->stats.rx_pkts++;
2817         ring->stats.rx_bytes += len;
2818
2819         if (l2_frame_type == HNS3_L2_TYPE_MULTICAST)
2820                 ring->stats.rx_multicast++;
2821
2822         u64_stats_update_end(&ring->syncp);
2823
2824         ring->tqp_vector->rx_group.total_bytes += len;
2825
2826         hns3_set_rx_skb_rss_type(ring, skb, le32_to_cpu(desc->rx.rss_hash));
2827         return 0;
2828 }
2829
2830 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2831                              struct sk_buff **out_skb)
2832 {
2833         struct sk_buff *skb = ring->skb;
2834         struct hns3_desc_cb *desc_cb;
2835         struct hns3_desc *desc;
2836         unsigned int length;
2837         u32 bd_base_info;
2838         int ret;
2839
2840         desc = &ring->desc[ring->next_to_clean];
2841         desc_cb = &ring->desc_cb[ring->next_to_clean];
2842
2843         prefetch(desc);
2844
2845         length = le16_to_cpu(desc->rx.size);
2846         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2847
2848         /* Check valid BD */
2849         if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B))))
2850                 return -ENXIO;
2851
2852         if (!skb)
2853                 ring->va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2854
2855         /* Prefetch first cache line of first page
2856          * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2857          * line size is 64B so need to prefetch twice to make it 128B. But in
2858          * actual we can have greater size of caches with 128B Level 1 cache
2859          * lines. In such a case, single fetch would suffice to cache in the
2860          * relevant part of the header.
2861          */
2862         prefetch(ring->va);
2863 #if L1_CACHE_BYTES < 128
2864         prefetch(ring->va + L1_CACHE_BYTES);
2865 #endif
2866
2867         if (!skb) {
2868                 ret = hns3_alloc_skb(ring, length, ring->va);
2869                 *out_skb = skb = ring->skb;
2870
2871                 if (ret < 0) /* alloc buffer fail */
2872                         return ret;
2873                 if (ret > 0) { /* need add frag */
2874                         ret = hns3_add_frag(ring, desc, &skb, false);
2875                         if (ret)
2876                                 return ret;
2877
2878                         /* As the head data may be changed when GRO enable, copy
2879                          * the head data in after other data rx completed
2880                          */
2881                         memcpy(skb->data, ring->va,
2882                                ALIGN(ring->pull_len, sizeof(long)));
2883                 }
2884         } else {
2885                 ret = hns3_add_frag(ring, desc, &skb, true);
2886                 if (ret)
2887                         return ret;
2888
2889                 /* As the head data may be changed when GRO enable, copy
2890                  * the head data in after other data rx completed
2891                  */
2892                 memcpy(skb->data, ring->va,
2893                        ALIGN(ring->pull_len, sizeof(long)));
2894         }
2895
2896         ret = hns3_handle_bdinfo(ring, skb);
2897         if (unlikely(ret)) {
2898                 dev_kfree_skb_any(skb);
2899                 return ret;
2900         }
2901
2902         skb_record_rx_queue(skb, ring->tqp->tqp_index);
2903         *out_skb = skb;
2904
2905         return 0;
2906 }
2907
2908 int hns3_clean_rx_ring(struct hns3_enet_ring *ring, int budget,
2909                        void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
2910 {
2911 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2912         int unused_count = hns3_desc_unused(ring);
2913         struct sk_buff *skb = ring->skb;
2914         int recv_pkts = 0;
2915         int recv_bds = 0;
2916         int err, num;
2917
2918         num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2919         rmb(); /* Make sure num taken effect before the other data is touched */
2920
2921         num -= unused_count;
2922         unused_count -= ring->pending_buf;
2923
2924         while (recv_pkts < budget && recv_bds < num) {
2925                 /* Reuse or realloc buffers */
2926                 if (unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2927                         hns3_nic_alloc_rx_buffers(ring, unused_count);
2928                         unused_count = hns3_desc_unused(ring) -
2929                                         ring->pending_buf;
2930                 }
2931
2932                 /* Poll one pkt */
2933                 err = hns3_handle_rx_bd(ring, &skb);
2934                 if (unlikely(!skb)) /* This fault cannot be repaired */
2935                         goto out;
2936
2937                 if (err == -ENXIO) { /* Do not get FE for the packet */
2938                         goto out;
2939                 } else if (unlikely(err)) {  /* Do jump the err */
2940                         recv_bds += ring->pending_buf;
2941                         unused_count += ring->pending_buf;
2942                         ring->skb = NULL;
2943                         ring->pending_buf = 0;
2944                         continue;
2945                 }
2946
2947                 rx_fn(ring, skb);
2948                 recv_bds += ring->pending_buf;
2949                 unused_count += ring->pending_buf;
2950                 ring->skb = NULL;
2951                 ring->pending_buf = 0;
2952
2953                 recv_pkts++;
2954         }
2955
2956 out:
2957         /* Make all data has been write before submit */
2958         if (unused_count > 0)
2959                 hns3_nic_alloc_rx_buffers(ring, unused_count);
2960
2961         return recv_pkts;
2962 }
2963
2964 static bool hns3_get_new_flow_lvl(struct hns3_enet_ring_group *ring_group)
2965 {
2966 #define HNS3_RX_LOW_BYTE_RATE 10000
2967 #define HNS3_RX_MID_BYTE_RATE 20000
2968 #define HNS3_RX_ULTRA_PACKET_RATE 40
2969
2970         enum hns3_flow_level_range new_flow_level;
2971         struct hns3_enet_tqp_vector *tqp_vector;
2972         int packets_per_msecs, bytes_per_msecs;
2973         u32 time_passed_ms;
2974
2975         tqp_vector = ring_group->ring->tqp_vector;
2976         time_passed_ms =
2977                 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
2978         if (!time_passed_ms)
2979                 return false;
2980
2981         do_div(ring_group->total_packets, time_passed_ms);
2982         packets_per_msecs = ring_group->total_packets;
2983
2984         do_div(ring_group->total_bytes, time_passed_ms);
2985         bytes_per_msecs = ring_group->total_bytes;
2986
2987         new_flow_level = ring_group->coal.flow_level;
2988
2989         /* Simple throttlerate management
2990          * 0-10MB/s   lower     (50000 ints/s)
2991          * 10-20MB/s   middle    (20000 ints/s)
2992          * 20-1249MB/s high      (18000 ints/s)
2993          * > 40000pps  ultra     (8000 ints/s)
2994          */
2995         switch (new_flow_level) {
2996         case HNS3_FLOW_LOW:
2997                 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
2998                         new_flow_level = HNS3_FLOW_MID;
2999                 break;
3000         case HNS3_FLOW_MID:
3001                 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
3002                         new_flow_level = HNS3_FLOW_HIGH;
3003                 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
3004                         new_flow_level = HNS3_FLOW_LOW;
3005                 break;
3006         case HNS3_FLOW_HIGH:
3007         case HNS3_FLOW_ULTRA:
3008         default:
3009                 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
3010                         new_flow_level = HNS3_FLOW_MID;
3011                 break;
3012         }
3013
3014         if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
3015             &tqp_vector->rx_group == ring_group)
3016                 new_flow_level = HNS3_FLOW_ULTRA;
3017
3018         ring_group->total_bytes = 0;
3019         ring_group->total_packets = 0;
3020         ring_group->coal.flow_level = new_flow_level;
3021
3022         return true;
3023 }
3024
3025 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
3026 {
3027         struct hns3_enet_tqp_vector *tqp_vector;
3028         u16 new_int_gl;
3029
3030         if (!ring_group->ring)
3031                 return false;
3032
3033         tqp_vector = ring_group->ring->tqp_vector;
3034         if (!tqp_vector->last_jiffies)
3035                 return false;
3036
3037         if (ring_group->total_packets == 0) {
3038                 ring_group->coal.int_gl = HNS3_INT_GL_50K;
3039                 ring_group->coal.flow_level = HNS3_FLOW_LOW;
3040                 return true;
3041         }
3042
3043         if (!hns3_get_new_flow_lvl(ring_group))
3044                 return false;
3045
3046         new_int_gl = ring_group->coal.int_gl;
3047         switch (ring_group->coal.flow_level) {
3048         case HNS3_FLOW_LOW:
3049                 new_int_gl = HNS3_INT_GL_50K;
3050                 break;
3051         case HNS3_FLOW_MID:
3052                 new_int_gl = HNS3_INT_GL_20K;
3053                 break;
3054         case HNS3_FLOW_HIGH:
3055                 new_int_gl = HNS3_INT_GL_18K;
3056                 break;
3057         case HNS3_FLOW_ULTRA:
3058                 new_int_gl = HNS3_INT_GL_8K;
3059                 break;
3060         default:
3061                 break;
3062         }
3063
3064         if (new_int_gl != ring_group->coal.int_gl) {
3065                 ring_group->coal.int_gl = new_int_gl;
3066                 return true;
3067         }
3068         return false;
3069 }
3070
3071 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
3072 {
3073         struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
3074         struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
3075         bool rx_update, tx_update;
3076
3077         /* update param every 1000ms */
3078         if (time_before(jiffies,
3079                         tqp_vector->last_jiffies + msecs_to_jiffies(1000)))
3080                 return;
3081
3082         if (rx_group->coal.gl_adapt_enable) {
3083                 rx_update = hns3_get_new_int_gl(rx_group);
3084                 if (rx_update)
3085                         hns3_set_vector_coalesce_rx_gl(tqp_vector,
3086                                                        rx_group->coal.int_gl);
3087         }
3088
3089         if (tx_group->coal.gl_adapt_enable) {
3090                 tx_update = hns3_get_new_int_gl(tx_group);
3091                 if (tx_update)
3092                         hns3_set_vector_coalesce_tx_gl(tqp_vector,
3093                                                        tx_group->coal.int_gl);
3094         }
3095
3096         tqp_vector->last_jiffies = jiffies;
3097 }
3098
3099 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
3100 {
3101         struct hns3_nic_priv *priv = netdev_priv(napi->dev);
3102         struct hns3_enet_ring *ring;
3103         int rx_pkt_total = 0;
3104
3105         struct hns3_enet_tqp_vector *tqp_vector =
3106                 container_of(napi, struct hns3_enet_tqp_vector, napi);
3107         bool clean_complete = true;
3108         int rx_budget = budget;
3109
3110         if (unlikely(test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3111                 napi_complete(napi);
3112                 return 0;
3113         }
3114
3115         /* Since the actual Tx work is minimal, we can give the Tx a larger
3116          * budget and be more aggressive about cleaning up the Tx descriptors.
3117          */
3118         hns3_for_each_ring(ring, tqp_vector->tx_group)
3119                 hns3_clean_tx_ring(ring);
3120
3121         /* make sure rx ring budget not smaller than 1 */
3122         if (tqp_vector->num_tqps > 1)
3123                 rx_budget = max(budget / tqp_vector->num_tqps, 1);
3124
3125         hns3_for_each_ring(ring, tqp_vector->rx_group) {
3126                 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
3127                                                     hns3_rx_skb);
3128
3129                 if (rx_cleaned >= rx_budget)
3130                         clean_complete = false;
3131
3132                 rx_pkt_total += rx_cleaned;
3133         }
3134
3135         tqp_vector->rx_group.total_packets += rx_pkt_total;
3136
3137         if (!clean_complete)
3138                 return budget;
3139
3140         if (napi_complete(napi) &&
3141             likely(!test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3142                 hns3_update_new_int_gl(tqp_vector);
3143                 hns3_mask_vector_irq(tqp_vector, 1);
3144         }
3145
3146         return rx_pkt_total;
3147 }
3148
3149 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3150                                       struct hnae3_ring_chain_node *head)
3151 {
3152         struct pci_dev *pdev = tqp_vector->handle->pdev;
3153         struct hnae3_ring_chain_node *cur_chain = head;
3154         struct hnae3_ring_chain_node *chain;
3155         struct hns3_enet_ring *tx_ring;
3156         struct hns3_enet_ring *rx_ring;
3157
3158         tx_ring = tqp_vector->tx_group.ring;
3159         if (tx_ring) {
3160                 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
3161                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3162                               HNAE3_RING_TYPE_TX);
3163                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3164                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
3165
3166                 cur_chain->next = NULL;
3167
3168                 while (tx_ring->next) {
3169                         tx_ring = tx_ring->next;
3170
3171                         chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
3172                                              GFP_KERNEL);
3173                         if (!chain)
3174                                 goto err_free_chain;
3175
3176                         cur_chain->next = chain;
3177                         chain->tqp_index = tx_ring->tqp->tqp_index;
3178                         hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3179                                       HNAE3_RING_TYPE_TX);
3180                         hnae3_set_field(chain->int_gl_idx,
3181                                         HNAE3_RING_GL_IDX_M,
3182                                         HNAE3_RING_GL_IDX_S,
3183                                         HNAE3_RING_GL_TX);
3184
3185                         cur_chain = chain;
3186                 }
3187         }
3188
3189         rx_ring = tqp_vector->rx_group.ring;
3190         if (!tx_ring && rx_ring) {
3191                 cur_chain->next = NULL;
3192                 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
3193                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3194                               HNAE3_RING_TYPE_RX);
3195                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3196                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3197
3198                 rx_ring = rx_ring->next;
3199         }
3200
3201         while (rx_ring) {
3202                 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
3203                 if (!chain)
3204                         goto err_free_chain;
3205
3206                 cur_chain->next = chain;
3207                 chain->tqp_index = rx_ring->tqp->tqp_index;
3208                 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3209                               HNAE3_RING_TYPE_RX);
3210                 hnae3_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3211                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3212
3213                 cur_chain = chain;
3214
3215                 rx_ring = rx_ring->next;
3216         }
3217
3218         return 0;
3219
3220 err_free_chain:
3221         cur_chain = head->next;
3222         while (cur_chain) {
3223                 chain = cur_chain->next;
3224                 devm_kfree(&pdev->dev, cur_chain);
3225                 cur_chain = chain;
3226         }
3227         head->next = NULL;
3228
3229         return -ENOMEM;
3230 }
3231
3232 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3233                                         struct hnae3_ring_chain_node *head)
3234 {
3235         struct pci_dev *pdev = tqp_vector->handle->pdev;
3236         struct hnae3_ring_chain_node *chain_tmp, *chain;
3237
3238         chain = head->next;
3239
3240         while (chain) {
3241                 chain_tmp = chain->next;
3242                 devm_kfree(&pdev->dev, chain);
3243                 chain = chain_tmp;
3244         }
3245 }
3246
3247 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
3248                                    struct hns3_enet_ring *ring)
3249 {
3250         ring->next = group->ring;
3251         group->ring = ring;
3252
3253         group->count++;
3254 }
3255
3256 static void hns3_nic_set_cpumask(struct hns3_nic_priv *priv)
3257 {
3258         struct pci_dev *pdev = priv->ae_handle->pdev;
3259         struct hns3_enet_tqp_vector *tqp_vector;
3260         int num_vectors = priv->vector_num;
3261         int numa_node;
3262         int vector_i;
3263
3264         numa_node = dev_to_node(&pdev->dev);
3265
3266         for (vector_i = 0; vector_i < num_vectors; vector_i++) {
3267                 tqp_vector = &priv->tqp_vector[vector_i];
3268                 cpumask_set_cpu(cpumask_local_spread(vector_i, numa_node),
3269                                 &tqp_vector->affinity_mask);
3270         }
3271 }
3272
3273 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
3274 {
3275         struct hnae3_ring_chain_node vector_ring_chain;
3276         struct hnae3_handle *h = priv->ae_handle;
3277         struct hns3_enet_tqp_vector *tqp_vector;
3278         int ret = 0;
3279         int i;
3280
3281         hns3_nic_set_cpumask(priv);
3282
3283         for (i = 0; i < priv->vector_num; i++) {
3284                 tqp_vector = &priv->tqp_vector[i];
3285                 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
3286                 tqp_vector->num_tqps = 0;
3287         }
3288
3289         for (i = 0; i < h->kinfo.num_tqps; i++) {
3290                 u16 vector_i = i % priv->vector_num;
3291                 u16 tqp_num = h->kinfo.num_tqps;
3292
3293                 tqp_vector = &priv->tqp_vector[vector_i];
3294
3295                 hns3_add_ring_to_group(&tqp_vector->tx_group,
3296                                        priv->ring_data[i].ring);
3297
3298                 hns3_add_ring_to_group(&tqp_vector->rx_group,
3299                                        priv->ring_data[i + tqp_num].ring);
3300
3301                 priv->ring_data[i].ring->tqp_vector = tqp_vector;
3302                 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
3303                 tqp_vector->num_tqps++;
3304         }
3305
3306         for (i = 0; i < priv->vector_num; i++) {
3307                 tqp_vector = &priv->tqp_vector[i];
3308
3309                 tqp_vector->rx_group.total_bytes = 0;
3310                 tqp_vector->rx_group.total_packets = 0;
3311                 tqp_vector->tx_group.total_bytes = 0;
3312                 tqp_vector->tx_group.total_packets = 0;
3313                 tqp_vector->handle = h;
3314
3315                 ret = hns3_get_vector_ring_chain(tqp_vector,
3316                                                  &vector_ring_chain);
3317                 if (ret)
3318                         goto map_ring_fail;
3319
3320                 ret = h->ae_algo->ops->map_ring_to_vector(h,
3321                         tqp_vector->vector_irq, &vector_ring_chain);
3322
3323                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3324
3325                 if (ret)
3326                         goto map_ring_fail;
3327
3328                 netif_napi_add(priv->netdev, &tqp_vector->napi,
3329                                hns3_nic_common_poll, NAPI_POLL_WEIGHT);
3330         }
3331
3332         return 0;
3333
3334 map_ring_fail:
3335         while (i--)
3336                 netif_napi_del(&priv->tqp_vector[i].napi);
3337
3338         return ret;
3339 }
3340
3341 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
3342 {
3343 #define HNS3_VECTOR_PF_MAX_NUM          64
3344
3345         struct hnae3_handle *h = priv->ae_handle;
3346         struct hns3_enet_tqp_vector *tqp_vector;
3347         struct hnae3_vector_info *vector;
3348         struct pci_dev *pdev = h->pdev;
3349         u16 tqp_num = h->kinfo.num_tqps;
3350         u16 vector_num;
3351         int ret = 0;
3352         u16 i;
3353
3354         /* RSS size, cpu online and vector_num should be the same */
3355         /* Should consider 2p/4p later */
3356         vector_num = min_t(u16, num_online_cpus(), tqp_num);
3357         vector_num = min_t(u16, vector_num, HNS3_VECTOR_PF_MAX_NUM);
3358
3359         vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
3360                               GFP_KERNEL);
3361         if (!vector)
3362                 return -ENOMEM;
3363
3364         /* save the actual available vector number */
3365         vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
3366
3367         priv->vector_num = vector_num;
3368         priv->tqp_vector = (struct hns3_enet_tqp_vector *)
3369                 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
3370                              GFP_KERNEL);
3371         if (!priv->tqp_vector) {
3372                 ret = -ENOMEM;
3373                 goto out;
3374         }
3375
3376         for (i = 0; i < priv->vector_num; i++) {
3377                 tqp_vector = &priv->tqp_vector[i];
3378                 tqp_vector->idx = i;
3379                 tqp_vector->mask_addr = vector[i].io_addr;
3380                 tqp_vector->vector_irq = vector[i].vector;
3381                 hns3_vector_gl_rl_init(tqp_vector, priv);
3382         }
3383
3384 out:
3385         devm_kfree(&pdev->dev, vector);
3386         return ret;
3387 }
3388
3389 static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
3390 {
3391         group->ring = NULL;
3392         group->count = 0;
3393 }
3394
3395 static void hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
3396 {
3397         struct hnae3_ring_chain_node vector_ring_chain;
3398         struct hnae3_handle *h = priv->ae_handle;
3399         struct hns3_enet_tqp_vector *tqp_vector;
3400         int i;
3401
3402         for (i = 0; i < priv->vector_num; i++) {
3403                 tqp_vector = &priv->tqp_vector[i];
3404
3405                 if (!tqp_vector->rx_group.ring && !tqp_vector->tx_group.ring)
3406                         continue;
3407
3408                 hns3_get_vector_ring_chain(tqp_vector, &vector_ring_chain);
3409
3410                 h->ae_algo->ops->unmap_ring_from_vector(h,
3411                         tqp_vector->vector_irq, &vector_ring_chain);
3412
3413                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3414
3415                 if (tqp_vector->irq_init_flag == HNS3_VECTOR_INITED) {
3416                         irq_set_affinity_hint(tqp_vector->vector_irq, NULL);
3417                         free_irq(tqp_vector->vector_irq, tqp_vector);
3418                         tqp_vector->irq_init_flag = HNS3_VECTOR_NOT_INITED;
3419                 }
3420
3421                 hns3_clear_ring_group(&tqp_vector->rx_group);
3422                 hns3_clear_ring_group(&tqp_vector->tx_group);
3423                 netif_napi_del(&priv->tqp_vector[i].napi);
3424         }
3425 }
3426
3427 static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
3428 {
3429         struct hnae3_handle *h = priv->ae_handle;
3430         struct pci_dev *pdev = h->pdev;
3431         int i, ret;
3432
3433         for (i = 0; i < priv->vector_num; i++) {
3434                 struct hns3_enet_tqp_vector *tqp_vector;
3435
3436                 tqp_vector = &priv->tqp_vector[i];
3437                 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
3438                 if (ret)
3439                         return ret;
3440         }
3441
3442         devm_kfree(&pdev->dev, priv->tqp_vector);
3443         return 0;
3444 }
3445
3446 static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
3447                              unsigned int ring_type)
3448 {
3449         struct hns3_nic_ring_data *ring_data = priv->ring_data;
3450         int queue_num = priv->ae_handle->kinfo.num_tqps;
3451         struct pci_dev *pdev = priv->ae_handle->pdev;
3452         struct hns3_enet_ring *ring;
3453         int desc_num;
3454
3455         ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
3456         if (!ring)
3457                 return -ENOMEM;
3458
3459         if (ring_type == HNAE3_RING_TYPE_TX) {
3460                 desc_num = priv->ae_handle->kinfo.num_tx_desc;
3461                 ring_data[q->tqp_index].ring = ring;
3462                 ring_data[q->tqp_index].queue_index = q->tqp_index;
3463                 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
3464         } else {
3465                 desc_num = priv->ae_handle->kinfo.num_rx_desc;
3466                 ring_data[q->tqp_index + queue_num].ring = ring;
3467                 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
3468                 ring->io_base = q->io_base;
3469         }
3470
3471         hnae3_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
3472
3473         ring->tqp = q;
3474         ring->desc = NULL;
3475         ring->desc_cb = NULL;
3476         ring->dev = priv->dev;
3477         ring->desc_dma_addr = 0;
3478         ring->buf_size = q->buf_size;
3479         ring->desc_num = desc_num;
3480         ring->next_to_use = 0;
3481         ring->next_to_clean = 0;
3482
3483         return 0;
3484 }
3485
3486 static int hns3_queue_to_ring(struct hnae3_queue *tqp,
3487                               struct hns3_nic_priv *priv)
3488 {
3489         int ret;
3490
3491         ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
3492         if (ret)
3493                 return ret;
3494
3495         ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
3496         if (ret) {
3497                 devm_kfree(priv->dev, priv->ring_data[tqp->tqp_index].ring);
3498                 return ret;
3499         }
3500
3501         return 0;
3502 }
3503
3504 static int hns3_get_ring_config(struct hns3_nic_priv *priv)
3505 {
3506         struct hnae3_handle *h = priv->ae_handle;
3507         struct pci_dev *pdev = h->pdev;
3508         int i, ret;
3509
3510         priv->ring_data =  devm_kzalloc(&pdev->dev,
3511                                         array3_size(h->kinfo.num_tqps,
3512                                                     sizeof(*priv->ring_data),
3513                                                     2),
3514                                         GFP_KERNEL);
3515         if (!priv->ring_data)
3516                 return -ENOMEM;
3517
3518         for (i = 0; i < h->kinfo.num_tqps; i++) {
3519                 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
3520                 if (ret)
3521                         goto err;
3522         }
3523
3524         return 0;
3525 err:
3526         while (i--) {
3527                 devm_kfree(priv->dev, priv->ring_data[i].ring);
3528                 devm_kfree(priv->dev,
3529                            priv->ring_data[i + h->kinfo.num_tqps].ring);
3530         }
3531
3532         devm_kfree(&pdev->dev, priv->ring_data);
3533         priv->ring_data = NULL;
3534         return ret;
3535 }
3536
3537 static void hns3_put_ring_config(struct hns3_nic_priv *priv)
3538 {
3539         struct hnae3_handle *h = priv->ae_handle;
3540         int i;
3541
3542         if (!priv->ring_data)
3543                 return;
3544
3545         for (i = 0; i < h->kinfo.num_tqps; i++) {
3546                 devm_kfree(priv->dev, priv->ring_data[i].ring);
3547                 devm_kfree(priv->dev,
3548                            priv->ring_data[i + h->kinfo.num_tqps].ring);
3549         }
3550         devm_kfree(priv->dev, priv->ring_data);
3551         priv->ring_data = NULL;
3552 }
3553
3554 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
3555 {
3556         int ret;
3557
3558         if (ring->desc_num <= 0 || ring->buf_size <= 0)
3559                 return -EINVAL;
3560
3561         ring->desc_cb = devm_kcalloc(ring_to_dev(ring), ring->desc_num,
3562                                      sizeof(ring->desc_cb[0]), GFP_KERNEL);
3563         if (!ring->desc_cb) {
3564                 ret = -ENOMEM;
3565                 goto out;
3566         }
3567
3568         ret = hns3_alloc_desc(ring);
3569         if (ret)
3570                 goto out_with_desc_cb;
3571
3572         if (!HNAE3_IS_TX_RING(ring)) {
3573                 ret = hns3_alloc_ring_buffers(ring);
3574                 if (ret)
3575                         goto out_with_desc;
3576         }
3577
3578         return 0;
3579
3580 out_with_desc:
3581         hns3_free_desc(ring);
3582 out_with_desc_cb:
3583         devm_kfree(ring_to_dev(ring), ring->desc_cb);
3584         ring->desc_cb = NULL;
3585 out:
3586         return ret;
3587 }
3588
3589 void hns3_fini_ring(struct hns3_enet_ring *ring)
3590 {
3591         hns3_free_desc(ring);
3592         devm_kfree(ring_to_dev(ring), ring->desc_cb);
3593         ring->desc_cb = NULL;
3594         ring->next_to_clean = 0;
3595         ring->next_to_use = 0;
3596         ring->pending_buf = 0;
3597         if (ring->skb) {
3598                 dev_kfree_skb_any(ring->skb);
3599                 ring->skb = NULL;
3600         }
3601 }
3602
3603 static int hns3_buf_size2type(u32 buf_size)
3604 {
3605         int bd_size_type;
3606
3607         switch (buf_size) {
3608         case 512:
3609                 bd_size_type = HNS3_BD_SIZE_512_TYPE;
3610                 break;
3611         case 1024:
3612                 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
3613                 break;
3614         case 2048:
3615                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3616                 break;
3617         case 4096:
3618                 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
3619                 break;
3620         default:
3621                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3622         }
3623
3624         return bd_size_type;
3625 }
3626
3627 static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
3628 {
3629         dma_addr_t dma = ring->desc_dma_addr;
3630         struct hnae3_queue *q = ring->tqp;
3631
3632         if (!HNAE3_IS_TX_RING(ring)) {
3633                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG, (u32)dma);
3634                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
3635                                (u32)((dma >> 31) >> 1));
3636
3637                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
3638                                hns3_buf_size2type(ring->buf_size));
3639                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
3640                                ring->desc_num / 8 - 1);
3641
3642         } else {
3643                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
3644                                (u32)dma);
3645                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
3646                                (u32)((dma >> 31) >> 1));
3647
3648                 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3649                                ring->desc_num / 8 - 1);
3650         }
3651 }
3652
3653 static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
3654 {
3655         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3656         int i;
3657
3658         for (i = 0; i < HNAE3_MAX_TC; i++) {
3659                 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3660                 int j;
3661
3662                 if (!tc_info->enable)
3663                         continue;
3664
3665                 for (j = 0; j < tc_info->tqp_count; j++) {
3666                         struct hnae3_queue *q;
3667
3668                         q = priv->ring_data[tc_info->tqp_offset + j].ring->tqp;
3669                         hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
3670                                        tc_info->tc);
3671                 }
3672         }
3673 }
3674
3675 int hns3_init_all_ring(struct hns3_nic_priv *priv)
3676 {
3677         struct hnae3_handle *h = priv->ae_handle;
3678         int ring_num = h->kinfo.num_tqps * 2;
3679         int i, j;
3680         int ret;
3681
3682         for (i = 0; i < ring_num; i++) {
3683                 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
3684                 if (ret) {
3685                         dev_err(priv->dev,
3686                                 "Alloc ring memory fail! ret=%d\n", ret);
3687                         goto out_when_alloc_ring_memory;
3688                 }
3689
3690                 u64_stats_init(&priv->ring_data[i].ring->syncp);
3691         }
3692
3693         return 0;
3694
3695 out_when_alloc_ring_memory:
3696         for (j = i - 1; j >= 0; j--)
3697                 hns3_fini_ring(priv->ring_data[j].ring);
3698
3699         return -ENOMEM;
3700 }
3701
3702 int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
3703 {
3704         struct hnae3_handle *h = priv->ae_handle;
3705         int i;
3706
3707         for (i = 0; i < h->kinfo.num_tqps; i++) {
3708                 hns3_fini_ring(priv->ring_data[i].ring);
3709                 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
3710         }
3711         return 0;
3712 }
3713
3714 /* Set mac addr if it is configured. or leave it to the AE driver */
3715 static int hns3_init_mac_addr(struct net_device *netdev, bool init)
3716 {
3717         struct hns3_nic_priv *priv = netdev_priv(netdev);
3718         struct hnae3_handle *h = priv->ae_handle;
3719         u8 mac_addr_temp[ETH_ALEN];
3720         int ret = 0;
3721
3722         if (h->ae_algo->ops->get_mac_addr && init) {
3723                 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3724                 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3725         }
3726
3727         /* Check if the MAC address is valid, if not get a random one */
3728         if (!is_valid_ether_addr(netdev->dev_addr)) {
3729                 eth_hw_addr_random(netdev);
3730                 dev_warn(priv->dev, "using random MAC address %pM\n",
3731                          netdev->dev_addr);
3732         }
3733
3734         if (h->ae_algo->ops->set_mac_addr)
3735                 ret = h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
3736
3737         return ret;
3738 }
3739
3740 static int hns3_init_phy(struct net_device *netdev)
3741 {
3742         struct hnae3_handle *h = hns3_get_handle(netdev);
3743         int ret = 0;
3744
3745         if (h->ae_algo->ops->mac_connect_phy)
3746                 ret = h->ae_algo->ops->mac_connect_phy(h);
3747
3748         return ret;
3749 }
3750
3751 static void hns3_uninit_phy(struct net_device *netdev)
3752 {
3753         struct hnae3_handle *h = hns3_get_handle(netdev);
3754
3755         if (h->ae_algo->ops->mac_disconnect_phy)
3756                 h->ae_algo->ops->mac_disconnect_phy(h);
3757 }
3758
3759 static int hns3_restore_fd_rules(struct net_device *netdev)
3760 {
3761         struct hnae3_handle *h = hns3_get_handle(netdev);
3762         int ret = 0;
3763
3764         if (h->ae_algo->ops->restore_fd_rules)
3765                 ret = h->ae_algo->ops->restore_fd_rules(h);
3766
3767         return ret;
3768 }
3769
3770 static void hns3_del_all_fd_rules(struct net_device *netdev, bool clear_list)
3771 {
3772         struct hnae3_handle *h = hns3_get_handle(netdev);
3773
3774         if (h->ae_algo->ops->del_all_fd_entries)
3775                 h->ae_algo->ops->del_all_fd_entries(h, clear_list);
3776 }
3777
3778 static int hns3_client_start(struct hnae3_handle *handle)
3779 {
3780         if (!handle->ae_algo->ops->client_start)
3781                 return 0;
3782
3783         return handle->ae_algo->ops->client_start(handle);
3784 }
3785
3786 static void hns3_client_stop(struct hnae3_handle *handle)
3787 {
3788         if (!handle->ae_algo->ops->client_stop)
3789                 return;
3790
3791         handle->ae_algo->ops->client_stop(handle);
3792 }
3793
3794 static void hns3_info_show(struct hns3_nic_priv *priv)
3795 {
3796         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3797
3798         dev_info(priv->dev, "MAC address: %pM\n", priv->netdev->dev_addr);
3799         dev_info(priv->dev, "Task queue pairs numbers: %d\n", kinfo->num_tqps);
3800         dev_info(priv->dev, "RSS size: %d\n", kinfo->rss_size);
3801         dev_info(priv->dev, "Allocated RSS size: %d\n", kinfo->req_rss_size);
3802         dev_info(priv->dev, "RX buffer length: %d\n", kinfo->rx_buf_len);
3803         dev_info(priv->dev, "Desc num per TX queue: %d\n", kinfo->num_tx_desc);
3804         dev_info(priv->dev, "Desc num per RX queue: %d\n", kinfo->num_rx_desc);
3805         dev_info(priv->dev, "Total number of enabled TCs: %d\n", kinfo->num_tc);
3806         dev_info(priv->dev, "Max mtu size: %d\n", priv->netdev->max_mtu);
3807 }
3808
3809 static int hns3_client_init(struct hnae3_handle *handle)
3810 {
3811         struct pci_dev *pdev = handle->pdev;
3812         u16 alloc_tqps, max_rss_size;
3813         struct hns3_nic_priv *priv;
3814         struct net_device *netdev;
3815         int ret;
3816
3817         handle->ae_algo->ops->get_tqps_and_rss_info(handle, &alloc_tqps,
3818                                                     &max_rss_size);
3819         netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);
3820         if (!netdev)
3821                 return -ENOMEM;
3822
3823         priv = netdev_priv(netdev);
3824         priv->dev = &pdev->dev;
3825         priv->netdev = netdev;
3826         priv->ae_handle = handle;
3827         priv->tx_timeout_count = 0;
3828         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
3829
3830         handle->msg_enable = netif_msg_init(debug, DEFAULT_MSG_LEVEL);
3831
3832         handle->kinfo.netdev = netdev;
3833         handle->priv = (void *)priv;
3834
3835         hns3_init_mac_addr(netdev, true);
3836
3837         hns3_set_default_feature(netdev);
3838
3839         netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3840         netdev->priv_flags |= IFF_UNICAST_FLT;
3841         netdev->netdev_ops = &hns3_nic_netdev_ops;
3842         SET_NETDEV_DEV(netdev, &pdev->dev);
3843         hns3_ethtool_set_ops(netdev);
3844
3845         /* Carrier off reporting is important to ethtool even BEFORE open */
3846         netif_carrier_off(netdev);
3847
3848         ret = hns3_get_ring_config(priv);
3849         if (ret) {
3850                 ret = -ENOMEM;
3851                 goto out_get_ring_cfg;
3852         }
3853
3854         ret = hns3_nic_alloc_vector_data(priv);
3855         if (ret) {
3856                 ret = -ENOMEM;
3857                 goto out_alloc_vector_data;
3858         }
3859
3860         ret = hns3_nic_init_vector_data(priv);
3861         if (ret) {
3862                 ret = -ENOMEM;
3863                 goto out_init_vector_data;
3864         }
3865
3866         ret = hns3_init_all_ring(priv);
3867         if (ret) {
3868                 ret = -ENOMEM;
3869                 goto out_init_ring_data;
3870         }
3871
3872         ret = hns3_init_phy(netdev);
3873         if (ret)
3874                 goto out_init_phy;
3875
3876         ret = register_netdev(netdev);
3877         if (ret) {
3878                 dev_err(priv->dev, "probe register netdev fail!\n");
3879                 goto out_reg_netdev_fail;
3880         }
3881
3882         ret = hns3_client_start(handle);
3883         if (ret) {
3884                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
3885                 goto out_client_start;
3886         }
3887
3888         hns3_dcbnl_setup(handle);
3889
3890         hns3_dbg_init(handle);
3891
3892         /* MTU range: (ETH_MIN_MTU(kernel default) - 9702) */
3893         netdev->max_mtu = HNS3_MAX_MTU;
3894
3895         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
3896
3897         if (netif_msg_drv(handle))
3898                 hns3_info_show(priv);
3899
3900         return ret;
3901
3902 out_client_start:
3903         unregister_netdev(netdev);
3904 out_reg_netdev_fail:
3905         hns3_uninit_phy(netdev);
3906 out_init_phy:
3907         hns3_uninit_all_ring(priv);
3908 out_init_ring_data:
3909         hns3_nic_uninit_vector_data(priv);
3910 out_init_vector_data:
3911         hns3_nic_dealloc_vector_data(priv);
3912 out_alloc_vector_data:
3913         priv->ring_data = NULL;
3914 out_get_ring_cfg:
3915         priv->ae_handle = NULL;
3916         free_netdev(netdev);
3917         return ret;
3918 }
3919
3920 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
3921 {
3922         struct net_device *netdev = handle->kinfo.netdev;
3923         struct hns3_nic_priv *priv = netdev_priv(netdev);
3924         int ret;
3925
3926         hns3_remove_hw_addr(netdev);
3927
3928         if (netdev->reg_state != NETREG_UNINITIALIZED)
3929                 unregister_netdev(netdev);
3930
3931         hns3_client_stop(handle);
3932
3933         hns3_uninit_phy(netdev);
3934
3935         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
3936                 netdev_warn(netdev, "already uninitialized\n");
3937                 goto out_netdev_free;
3938         }
3939
3940         hns3_del_all_fd_rules(netdev, true);
3941
3942         hns3_clear_all_ring(handle, true);
3943
3944         hns3_nic_uninit_vector_data(priv);
3945
3946         ret = hns3_nic_dealloc_vector_data(priv);
3947         if (ret)
3948                 netdev_err(netdev, "dealloc vector error\n");
3949
3950         ret = hns3_uninit_all_ring(priv);
3951         if (ret)
3952                 netdev_err(netdev, "uninit ring error\n");
3953
3954         hns3_put_ring_config(priv);
3955
3956         hns3_dbg_uninit(handle);
3957
3958 out_netdev_free:
3959         free_netdev(netdev);
3960 }
3961
3962 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
3963 {
3964         struct net_device *netdev = handle->kinfo.netdev;
3965
3966         if (!netdev)
3967                 return;
3968
3969         if (linkup) {
3970                 netif_carrier_on(netdev);
3971                 netif_tx_wake_all_queues(netdev);
3972                 if (netif_msg_link(handle))
3973                         netdev_info(netdev, "link up\n");
3974         } else {
3975                 netif_carrier_off(netdev);
3976                 netif_tx_stop_all_queues(netdev);
3977                 if (netif_msg_link(handle))
3978                         netdev_info(netdev, "link down\n");
3979         }
3980 }
3981
3982 static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
3983 {
3984         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3985         struct net_device *ndev = kinfo->netdev;
3986
3987         if (tc > HNAE3_MAX_TC)
3988                 return -EINVAL;
3989
3990         if (!ndev)
3991                 return -ENODEV;
3992
3993         return hns3_nic_set_real_num_queue(ndev);
3994 }
3995
3996 static int hns3_recover_hw_addr(struct net_device *ndev)
3997 {
3998         struct netdev_hw_addr_list *list;
3999         struct netdev_hw_addr *ha, *tmp;
4000         int ret = 0;
4001
4002         netif_addr_lock_bh(ndev);
4003         /* go through and sync uc_addr entries to the device */
4004         list = &ndev->uc;
4005         list_for_each_entry_safe(ha, tmp, &list->list, list) {
4006                 ret = hns3_nic_uc_sync(ndev, ha->addr);
4007                 if (ret)
4008                         goto out;
4009         }
4010
4011         /* go through and sync mc_addr entries to the device */
4012         list = &ndev->mc;
4013         list_for_each_entry_safe(ha, tmp, &list->list, list) {
4014                 ret = hns3_nic_mc_sync(ndev, ha->addr);
4015                 if (ret)
4016                         goto out;
4017         }
4018
4019 out:
4020         netif_addr_unlock_bh(ndev);
4021         return ret;
4022 }
4023
4024 static void hns3_remove_hw_addr(struct net_device *netdev)
4025 {
4026         struct netdev_hw_addr_list *list;
4027         struct netdev_hw_addr *ha, *tmp;
4028
4029         hns3_nic_uc_unsync(netdev, netdev->dev_addr);
4030
4031         netif_addr_lock_bh(netdev);
4032         /* go through and unsync uc_addr entries to the device */
4033         list = &netdev->uc;
4034         list_for_each_entry_safe(ha, tmp, &list->list, list)
4035                 hns3_nic_uc_unsync(netdev, ha->addr);
4036
4037         /* go through and unsync mc_addr entries to the device */
4038         list = &netdev->mc;
4039         list_for_each_entry_safe(ha, tmp, &list->list, list)
4040                 if (ha->refcount > 1)
4041                         hns3_nic_mc_unsync(netdev, ha->addr);
4042
4043         netif_addr_unlock_bh(netdev);
4044 }
4045
4046 static void hns3_clear_tx_ring(struct hns3_enet_ring *ring)
4047 {
4048         while (ring->next_to_clean != ring->next_to_use) {
4049                 ring->desc[ring->next_to_clean].tx.bdtp_fe_sc_vld_ra_ri = 0;
4050                 hns3_free_buffer_detach(ring, ring->next_to_clean);
4051                 ring_ptr_move_fw(ring, next_to_clean);
4052         }
4053 }
4054
4055 static int hns3_clear_rx_ring(struct hns3_enet_ring *ring)
4056 {
4057         struct hns3_desc_cb res_cbs;
4058         int ret;
4059
4060         while (ring->next_to_use != ring->next_to_clean) {
4061                 /* When a buffer is not reused, it's memory has been
4062                  * freed in hns3_handle_rx_bd or will be freed by
4063                  * stack, so we need to replace the buffer here.
4064                  */
4065                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4066                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
4067                         if (ret) {
4068                                 u64_stats_update_begin(&ring->syncp);
4069                                 ring->stats.sw_err_cnt++;
4070                                 u64_stats_update_end(&ring->syncp);
4071                                 /* if alloc new buffer fail, exit directly
4072                                  * and reclear in up flow.
4073                                  */
4074                                 netdev_warn(ring->tqp->handle->kinfo.netdev,
4075                                             "reserve buffer map failed, ret = %d\n",
4076                                             ret);
4077                                 return ret;
4078                         }
4079                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
4080                 }
4081                 ring_ptr_move_fw(ring, next_to_use);
4082         }
4083
4084         /* Free the pending skb in rx ring */
4085         if (ring->skb) {
4086                 dev_kfree_skb_any(ring->skb);
4087                 ring->skb = NULL;
4088                 ring->pending_buf = 0;
4089         }
4090
4091         return 0;
4092 }
4093
4094 static void hns3_force_clear_rx_ring(struct hns3_enet_ring *ring)
4095 {
4096         while (ring->next_to_use != ring->next_to_clean) {
4097                 /* When a buffer is not reused, it's memory has been
4098                  * freed in hns3_handle_rx_bd or will be freed by
4099                  * stack, so only need to unmap the buffer here.
4100                  */
4101                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4102                         hns3_unmap_buffer(ring,
4103                                           &ring->desc_cb[ring->next_to_use]);
4104                         ring->desc_cb[ring->next_to_use].dma = 0;
4105                 }
4106
4107                 ring_ptr_move_fw(ring, next_to_use);
4108         }
4109 }
4110
4111 static void hns3_clear_all_ring(struct hnae3_handle *h, bool force)
4112 {
4113         struct net_device *ndev = h->kinfo.netdev;
4114         struct hns3_nic_priv *priv = netdev_priv(ndev);
4115         u32 i;
4116
4117         for (i = 0; i < h->kinfo.num_tqps; i++) {
4118                 struct hns3_enet_ring *ring;
4119
4120                 ring = priv->ring_data[i].ring;
4121                 hns3_clear_tx_ring(ring);
4122
4123                 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4124                 /* Continue to clear other rings even if clearing some
4125                  * rings failed.
4126                  */
4127                 if (force)
4128                         hns3_force_clear_rx_ring(ring);
4129                 else
4130                         hns3_clear_rx_ring(ring);
4131         }
4132 }
4133
4134 int hns3_nic_reset_all_ring(struct hnae3_handle *h)
4135 {
4136         struct net_device *ndev = h->kinfo.netdev;
4137         struct hns3_nic_priv *priv = netdev_priv(ndev);
4138         struct hns3_enet_ring *rx_ring;
4139         int i, j;
4140         int ret;
4141
4142         for (i = 0; i < h->kinfo.num_tqps; i++) {
4143                 ret = h->ae_algo->ops->reset_queue(h, i);
4144                 if (ret)
4145                         return ret;
4146
4147                 hns3_init_ring_hw(priv->ring_data[i].ring);
4148
4149                 /* We need to clear tx ring here because self test will
4150                  * use the ring and will not run down before up
4151                  */
4152                 hns3_clear_tx_ring(priv->ring_data[i].ring);
4153                 priv->ring_data[i].ring->next_to_clean = 0;
4154                 priv->ring_data[i].ring->next_to_use = 0;
4155
4156                 rx_ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4157                 hns3_init_ring_hw(rx_ring);
4158                 ret = hns3_clear_rx_ring(rx_ring);
4159                 if (ret)
4160                         return ret;
4161
4162                 /* We can not know the hardware head and tail when this
4163                  * function is called in reset flow, so we reuse all desc.
4164                  */
4165                 for (j = 0; j < rx_ring->desc_num; j++)
4166                         hns3_reuse_buffer(rx_ring, j);
4167
4168                 rx_ring->next_to_clean = 0;
4169                 rx_ring->next_to_use = 0;
4170         }
4171
4172         hns3_init_tx_ring_tc(priv);
4173
4174         return 0;
4175 }
4176
4177 static void hns3_store_coal(struct hns3_nic_priv *priv)
4178 {
4179         /* ethtool only support setting and querying one coal
4180          * configuation for now, so save the vector 0' coal
4181          * configuation here in order to restore it.
4182          */
4183         memcpy(&priv->tx_coal, &priv->tqp_vector[0].tx_group.coal,
4184                sizeof(struct hns3_enet_coalesce));
4185         memcpy(&priv->rx_coal, &priv->tqp_vector[0].rx_group.coal,
4186                sizeof(struct hns3_enet_coalesce));
4187 }
4188
4189 static void hns3_restore_coal(struct hns3_nic_priv *priv)
4190 {
4191         u16 vector_num = priv->vector_num;
4192         int i;
4193
4194         for (i = 0; i < vector_num; i++) {
4195                 memcpy(&priv->tqp_vector[i].tx_group.coal, &priv->tx_coal,
4196                        sizeof(struct hns3_enet_coalesce));
4197                 memcpy(&priv->tqp_vector[i].rx_group.coal, &priv->rx_coal,
4198                        sizeof(struct hns3_enet_coalesce));
4199         }
4200 }
4201
4202 static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
4203 {
4204         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
4205         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4206         struct net_device *ndev = kinfo->netdev;
4207         struct hns3_nic_priv *priv = netdev_priv(ndev);
4208
4209         if (test_and_set_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
4210                 return 0;
4211
4212         /* it is cumbersome for hardware to pick-and-choose entries for deletion
4213          * from table space. Hence, for function reset software intervention is
4214          * required to delete the entries
4215          */
4216         if (hns3_dev_ongoing_func_reset(ae_dev)) {
4217                 hns3_remove_hw_addr(ndev);
4218                 hns3_del_all_fd_rules(ndev, false);
4219         }
4220
4221         if (!netif_running(ndev))
4222                 return 0;
4223
4224         return hns3_nic_net_stop(ndev);
4225 }
4226
4227 static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
4228 {
4229         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4230         struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
4231         int ret = 0;
4232
4233         clear_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4234
4235         if (netif_running(kinfo->netdev)) {
4236                 ret = hns3_nic_net_open(kinfo->netdev);
4237                 if (ret) {
4238                         set_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4239                         netdev_err(kinfo->netdev,
4240                                    "net up fail, ret=%d!\n", ret);
4241                         return ret;
4242                 }
4243         }
4244
4245         return ret;
4246 }
4247
4248 static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
4249 {
4250         struct net_device *netdev = handle->kinfo.netdev;
4251         struct hns3_nic_priv *priv = netdev_priv(netdev);
4252         int ret;
4253
4254         /* Carrier off reporting is important to ethtool even BEFORE open */
4255         netif_carrier_off(netdev);
4256
4257         ret = hns3_get_ring_config(priv);
4258         if (ret)
4259                 return ret;
4260
4261         ret = hns3_nic_alloc_vector_data(priv);
4262         if (ret)
4263                 goto err_put_ring;
4264
4265         hns3_restore_coal(priv);
4266
4267         ret = hns3_nic_init_vector_data(priv);
4268         if (ret)
4269                 goto err_dealloc_vector;
4270
4271         ret = hns3_init_all_ring(priv);
4272         if (ret)
4273                 goto err_uninit_vector;
4274
4275         ret = hns3_client_start(handle);
4276         if (ret) {
4277                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4278                 goto err_uninit_ring;
4279         }
4280
4281         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4282
4283         return ret;
4284
4285 err_uninit_ring:
4286         hns3_uninit_all_ring(priv);
4287 err_uninit_vector:
4288         hns3_nic_uninit_vector_data(priv);
4289 err_dealloc_vector:
4290         hns3_nic_dealloc_vector_data(priv);
4291 err_put_ring:
4292         hns3_put_ring_config(priv);
4293
4294         return ret;
4295 }
4296
4297 static int hns3_reset_notify_restore_enet(struct hnae3_handle *handle)
4298 {
4299         struct net_device *netdev = handle->kinfo.netdev;
4300         bool vlan_filter_enable;
4301         int ret;
4302
4303         ret = hns3_init_mac_addr(netdev, false);
4304         if (ret)
4305                 return ret;
4306
4307         ret = hns3_recover_hw_addr(netdev);
4308         if (ret)
4309                 return ret;
4310
4311         ret = hns3_update_promisc_mode(netdev, handle->netdev_flags);
4312         if (ret)
4313                 return ret;
4314
4315         vlan_filter_enable = netdev->flags & IFF_PROMISC ? false : true;
4316         hns3_enable_vlan_filter(netdev, vlan_filter_enable);
4317
4318         if (handle->ae_algo->ops->restore_vlan_table)
4319                 handle->ae_algo->ops->restore_vlan_table(handle);
4320
4321         return hns3_restore_fd_rules(netdev);
4322 }
4323
4324 static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
4325 {
4326         struct net_device *netdev = handle->kinfo.netdev;
4327         struct hns3_nic_priv *priv = netdev_priv(netdev);
4328         int ret;
4329
4330         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4331                 netdev_warn(netdev, "already uninitialized\n");
4332                 return 0;
4333         }
4334
4335         hns3_clear_all_ring(handle, true);
4336         hns3_reset_tx_queue(priv->ae_handle);
4337
4338         hns3_nic_uninit_vector_data(priv);
4339
4340         hns3_store_coal(priv);
4341
4342         ret = hns3_nic_dealloc_vector_data(priv);
4343         if (ret)
4344                 netdev_err(netdev, "dealloc vector error\n");
4345
4346         ret = hns3_uninit_all_ring(priv);
4347         if (ret)
4348                 netdev_err(netdev, "uninit ring error\n");
4349
4350         hns3_put_ring_config(priv);
4351
4352         return ret;
4353 }
4354
4355 static int hns3_reset_notify(struct hnae3_handle *handle,
4356                              enum hnae3_reset_notify_type type)
4357 {
4358         int ret = 0;
4359
4360         switch (type) {
4361         case HNAE3_UP_CLIENT:
4362                 ret = hns3_reset_notify_up_enet(handle);
4363                 break;
4364         case HNAE3_DOWN_CLIENT:
4365                 ret = hns3_reset_notify_down_enet(handle);
4366                 break;
4367         case HNAE3_INIT_CLIENT:
4368                 ret = hns3_reset_notify_init_enet(handle);
4369                 break;
4370         case HNAE3_UNINIT_CLIENT:
4371                 ret = hns3_reset_notify_uninit_enet(handle);
4372                 break;
4373         case HNAE3_RESTORE_CLIENT:
4374                 ret = hns3_reset_notify_restore_enet(handle);
4375                 break;
4376         default:
4377                 break;
4378         }
4379
4380         return ret;
4381 }
4382
4383 int hns3_set_channels(struct net_device *netdev,
4384                       struct ethtool_channels *ch)
4385 {
4386         struct hnae3_handle *h = hns3_get_handle(netdev);
4387         struct hnae3_knic_private_info *kinfo = &h->kinfo;
4388         bool rxfh_configured = netif_is_rxfh_configured(netdev);
4389         u32 new_tqp_num = ch->combined_count;
4390         u16 org_tqp_num;
4391         int ret;
4392
4393         if (hns3_nic_resetting(netdev))
4394                 return -EBUSY;
4395
4396         if (ch->rx_count || ch->tx_count)
4397                 return -EINVAL;
4398
4399         if (new_tqp_num > hns3_get_max_available_channels(h) ||
4400             new_tqp_num < 1) {
4401                 dev_err(&netdev->dev,
4402                         "Change tqps fail, the tqp range is from 1 to %d",
4403                         hns3_get_max_available_channels(h));
4404                 return -EINVAL;
4405         }
4406
4407         if (kinfo->rss_size == new_tqp_num)
4408                 return 0;
4409
4410         netif_dbg(h, drv, netdev,
4411                   "set channels: tqp_num=%u, rxfh=%d\n",
4412                   new_tqp_num, rxfh_configured);
4413
4414         ret = hns3_reset_notify(h, HNAE3_DOWN_CLIENT);
4415         if (ret)
4416                 return ret;
4417
4418         ret = hns3_reset_notify(h, HNAE3_UNINIT_CLIENT);
4419         if (ret)
4420                 return ret;
4421
4422         org_tqp_num = h->kinfo.num_tqps;
4423         ret = h->ae_algo->ops->set_channels(h, new_tqp_num, rxfh_configured);
4424         if (ret) {
4425                 ret = h->ae_algo->ops->set_channels(h, org_tqp_num,
4426                                                     rxfh_configured);
4427                 if (ret) {
4428                         /* If revert to old tqp failed, fatal error occurred */
4429                         dev_err(&netdev->dev,
4430                                 "Revert to old tqp num fail, ret=%d", ret);
4431                         return ret;
4432                 }
4433                 dev_info(&netdev->dev,
4434                          "Change tqp num fail, Revert to old tqp num");
4435         }
4436         ret = hns3_reset_notify(h, HNAE3_INIT_CLIENT);
4437         if (ret)
4438                 return ret;
4439
4440         return hns3_reset_notify(h, HNAE3_UP_CLIENT);
4441 }
4442
4443 static const struct hnae3_client_ops client_ops = {
4444         .init_instance = hns3_client_init,
4445         .uninit_instance = hns3_client_uninit,
4446         .link_status_change = hns3_link_status_change,
4447         .setup_tc = hns3_client_setup_tc,
4448         .reset_notify = hns3_reset_notify,
4449 };
4450
4451 /* hns3_init_module - Driver registration routine
4452  * hns3_init_module is the first routine called when the driver is
4453  * loaded. All it does is register with the PCI subsystem.
4454  */
4455 static int __init hns3_init_module(void)
4456 {
4457         int ret;
4458
4459         pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
4460         pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
4461
4462         client.type = HNAE3_CLIENT_KNIC;
4463         snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
4464                  hns3_driver_name);
4465
4466         client.ops = &client_ops;
4467
4468         INIT_LIST_HEAD(&client.node);
4469
4470         hns3_dbg_register_debugfs(hns3_driver_name);
4471
4472         ret = hnae3_register_client(&client);
4473         if (ret)
4474                 goto err_reg_client;
4475
4476         ret = pci_register_driver(&hns3_driver);
4477         if (ret)
4478                 goto err_reg_driver;
4479
4480         return ret;
4481
4482 err_reg_driver:
4483         hnae3_unregister_client(&client);
4484 err_reg_client:
4485         hns3_dbg_unregister_debugfs();
4486         return ret;
4487 }
4488 module_init(hns3_init_module);
4489
4490 /* hns3_exit_module - Driver exit cleanup routine
4491  * hns3_exit_module is called just before the driver is removed
4492  * from memory.
4493  */
4494 static void __exit hns3_exit_module(void)
4495 {
4496         pci_unregister_driver(&hns3_driver);
4497         hnae3_unregister_client(&client);
4498         hns3_dbg_unregister_debugfs();
4499 }
4500 module_exit(hns3_exit_module);
4501
4502 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
4503 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
4504 MODULE_LICENSE("GPL");
4505 MODULE_ALIAS("pci:hns-nic");
4506 MODULE_VERSION(HNS3_MOD_VERSION);