1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
4 #include <linux/dma-mapping.h>
5 #include <linux/etherdevice.h>
6 #include <linux/interrupt.h>
7 #include <linux/if_vlan.h>
9 #include <linux/ipv6.h>
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/aer.h>
13 #include <linux/skbuff.h>
14 #include <linux/sctp.h>
15 #include <linux/vermagic.h>
17 #include <net/pkt_cls.h>
19 #include <net/vxlan.h>
22 #include "hns3_enet.h"
24 static void hns3_clear_all_ring(struct hnae3_handle *h);
25 static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h);
26 static void hns3_remove_hw_addr(struct net_device *netdev);
28 static const char hns3_driver_name[] = "hns3";
29 const char hns3_driver_version[] = VERMAGIC_STRING;
30 static const char hns3_driver_string[] =
31 "Hisilicon Ethernet Network Driver for Hip08 Family";
32 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
33 static struct hnae3_client client;
35 /* hns3_pci_tbl - PCI Device ID Table
37 * Last entry must be all 0s
39 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
40 * Class, Class Mask, private data (not used) }
42 static const struct pci_device_id hns3_pci_tbl[] = {
43 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
44 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
45 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
46 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
47 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
48 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
49 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
50 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
51 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
52 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
53 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
54 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
55 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
56 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF),
57 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
58 /* required last entry */
61 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
63 static irqreturn_t hns3_irq_handle(int irq, void *vector)
65 struct hns3_enet_tqp_vector *tqp_vector = vector;
67 napi_schedule(&tqp_vector->napi);
72 /* This callback function is used to set affinity changes to the irq affinity
73 * masks when the irq_set_affinity_notifier function is used.
75 static void hns3_nic_irq_affinity_notify(struct irq_affinity_notify *notify,
76 const cpumask_t *mask)
78 struct hns3_enet_tqp_vector *tqp_vectors =
79 container_of(notify, struct hns3_enet_tqp_vector,
82 tqp_vectors->affinity_mask = *mask;
85 static void hns3_nic_irq_affinity_release(struct kref *ref)
89 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
91 struct hns3_enet_tqp_vector *tqp_vectors;
94 for (i = 0; i < priv->vector_num; i++) {
95 tqp_vectors = &priv->tqp_vector[i];
97 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
100 /* clear the affinity notifier and affinity mask */
101 irq_set_affinity_notifier(tqp_vectors->vector_irq, NULL);
102 irq_set_affinity_hint(tqp_vectors->vector_irq, NULL);
104 /* release the irq resource */
105 free_irq(tqp_vectors->vector_irq, tqp_vectors);
106 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
110 static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
112 struct hns3_enet_tqp_vector *tqp_vectors;
113 int txrx_int_idx = 0;
119 for (i = 0; i < priv->vector_num; i++) {
120 tqp_vectors = &priv->tqp_vector[i];
122 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
125 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
126 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
127 "%s-%s-%d", priv->netdev->name, "TxRx",
130 } else if (tqp_vectors->rx_group.ring) {
131 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
132 "%s-%s-%d", priv->netdev->name, "Rx",
134 } else if (tqp_vectors->tx_group.ring) {
135 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
136 "%s-%s-%d", priv->netdev->name, "Tx",
139 /* Skip this unused q_vector */
143 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
145 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
149 netdev_err(priv->netdev, "request irq(%d) fail\n",
150 tqp_vectors->vector_irq);
154 tqp_vectors->affinity_notify.notify =
155 hns3_nic_irq_affinity_notify;
156 tqp_vectors->affinity_notify.release =
157 hns3_nic_irq_affinity_release;
158 irq_set_affinity_notifier(tqp_vectors->vector_irq,
159 &tqp_vectors->affinity_notify);
160 irq_set_affinity_hint(tqp_vectors->vector_irq,
161 &tqp_vectors->affinity_mask);
163 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
169 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
172 writel(mask_en, tqp_vector->mask_addr);
175 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
177 napi_enable(&tqp_vector->napi);
180 hns3_mask_vector_irq(tqp_vector, 1);
183 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
186 hns3_mask_vector_irq(tqp_vector, 0);
188 disable_irq(tqp_vector->vector_irq);
189 napi_disable(&tqp_vector->napi);
192 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
195 u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
197 /* this defines the configuration for RL (Interrupt Rate Limiter).
198 * Rl defines rate of interrupts i.e. number of interrupts-per-second
199 * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
202 if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
203 !tqp_vector->rx_group.coal.gl_adapt_enable)
204 /* According to the hardware, the range of rl_reg is
205 * 0-59 and the unit is 4.
207 rl_reg |= HNS3_INT_RL_ENABLE_MASK;
209 writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
212 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
215 u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
217 writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
220 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
223 u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
225 writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
228 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
229 struct hns3_nic_priv *priv)
231 /* initialize the configuration for interrupt coalescing.
232 * 1. GL (Interrupt Gap Limiter)
233 * 2. RL (Interrupt Rate Limiter)
236 /* Default: enable interrupt coalescing self-adaptive and GL */
237 tqp_vector->tx_group.coal.gl_adapt_enable = 1;
238 tqp_vector->rx_group.coal.gl_adapt_enable = 1;
240 tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
241 tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
243 tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
244 tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
247 static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
248 struct hns3_nic_priv *priv)
250 struct hnae3_handle *h = priv->ae_handle;
252 hns3_set_vector_coalesce_tx_gl(tqp_vector,
253 tqp_vector->tx_group.coal.int_gl);
254 hns3_set_vector_coalesce_rx_gl(tqp_vector,
255 tqp_vector->rx_group.coal.int_gl);
256 hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
259 static int hns3_nic_set_real_num_queue(struct net_device *netdev)
261 struct hnae3_handle *h = hns3_get_handle(netdev);
262 struct hnae3_knic_private_info *kinfo = &h->kinfo;
263 unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
266 if (kinfo->num_tc <= 1) {
267 netdev_reset_tc(netdev);
269 ret = netdev_set_num_tc(netdev, kinfo->num_tc);
272 "netdev_set_num_tc fail, ret=%d!\n", ret);
276 for (i = 0; i < HNAE3_MAX_TC; i++) {
277 if (!kinfo->tc_info[i].enable)
280 netdev_set_tc_queue(netdev,
281 kinfo->tc_info[i].tc,
282 kinfo->tc_info[i].tqp_count,
283 kinfo->tc_info[i].tqp_offset);
287 ret = netif_set_real_num_tx_queues(netdev, queue_size);
290 "netif_set_real_num_tx_queues fail, ret=%d!\n",
295 ret = netif_set_real_num_rx_queues(netdev, queue_size);
298 "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
305 static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
307 u16 alloc_tqps, max_rss_size, rss_size;
309 h->ae_algo->ops->get_tqps_and_rss_info(h, &alloc_tqps, &max_rss_size);
310 rss_size = alloc_tqps / h->kinfo.num_tc;
312 return min_t(u16, rss_size, max_rss_size);
315 static void hns3_tqp_enable(struct hnae3_queue *tqp)
319 rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
320 rcb_reg |= BIT(HNS3_RING_EN_B);
321 hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
324 static void hns3_tqp_disable(struct hnae3_queue *tqp)
328 rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
329 rcb_reg &= ~BIT(HNS3_RING_EN_B);
330 hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
333 static int hns3_nic_net_up(struct net_device *netdev)
335 struct hns3_nic_priv *priv = netdev_priv(netdev);
336 struct hnae3_handle *h = priv->ae_handle;
340 ret = hns3_nic_reset_all_ring(h);
344 /* get irq resource for all vectors */
345 ret = hns3_nic_init_irq(priv);
347 netdev_err(netdev, "hns init irq failed! ret=%d\n", ret);
351 clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
353 /* enable the vectors */
354 for (i = 0; i < priv->vector_num; i++)
355 hns3_vector_enable(&priv->tqp_vector[i]);
358 for (j = 0; j < h->kinfo.num_tqps; j++)
359 hns3_tqp_enable(h->kinfo.tqp[j]);
361 /* start the ae_dev */
362 ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
369 set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
371 hns3_tqp_disable(h->kinfo.tqp[j]);
373 for (j = i - 1; j >= 0; j--)
374 hns3_vector_disable(&priv->tqp_vector[j]);
376 hns3_nic_uninit_irq(priv);
381 static void hns3_config_xps(struct hns3_nic_priv *priv)
385 for (i = 0; i < priv->vector_num; i++) {
386 struct hns3_enet_tqp_vector *tqp_vector = &priv->tqp_vector[i];
387 struct hns3_enet_ring *ring = tqp_vector->tx_group.ring;
392 ret = netif_set_xps_queue(priv->netdev,
393 &tqp_vector->affinity_mask,
394 ring->tqp->tqp_index);
396 netdev_warn(priv->netdev,
397 "set xps queue failed: %d", ret);
404 static int hns3_nic_net_open(struct net_device *netdev)
406 struct hns3_nic_priv *priv = netdev_priv(netdev);
407 struct hnae3_handle *h = hns3_get_handle(netdev);
408 struct hnae3_knic_private_info *kinfo;
411 if (hns3_nic_resetting(netdev))
414 netif_carrier_off(netdev);
416 ret = hns3_nic_set_real_num_queue(netdev);
420 ret = hns3_nic_net_up(netdev);
423 "hns net up fail, ret=%d!\n", ret);
428 for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) {
429 netdev_set_prio_tc_map(netdev, i,
433 if (h->ae_algo->ops->set_timer_task)
434 h->ae_algo->ops->set_timer_task(priv->ae_handle, true);
436 hns3_config_xps(priv);
440 static void hns3_nic_net_down(struct net_device *netdev)
442 struct hns3_nic_priv *priv = netdev_priv(netdev);
443 struct hnae3_handle *h = hns3_get_handle(netdev);
444 const struct hnae3_ae_ops *ops;
447 /* disable vectors */
448 for (i = 0; i < priv->vector_num; i++)
449 hns3_vector_disable(&priv->tqp_vector[i]);
452 for (i = 0; i < h->kinfo.num_tqps; i++)
453 hns3_tqp_disable(h->kinfo.tqp[i]);
456 ops = priv->ae_handle->ae_algo->ops;
458 ops->stop(priv->ae_handle);
460 /* free irq resources */
461 hns3_nic_uninit_irq(priv);
463 hns3_clear_all_ring(priv->ae_handle);
466 static int hns3_nic_net_stop(struct net_device *netdev)
468 struct hns3_nic_priv *priv = netdev_priv(netdev);
469 struct hnae3_handle *h = hns3_get_handle(netdev);
471 if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
474 if (h->ae_algo->ops->set_timer_task)
475 h->ae_algo->ops->set_timer_task(priv->ae_handle, false);
477 netif_tx_stop_all_queues(netdev);
478 netif_carrier_off(netdev);
480 hns3_nic_net_down(netdev);
485 static int hns3_nic_uc_sync(struct net_device *netdev,
486 const unsigned char *addr)
488 struct hnae3_handle *h = hns3_get_handle(netdev);
490 if (h->ae_algo->ops->add_uc_addr)
491 return h->ae_algo->ops->add_uc_addr(h, addr);
496 static int hns3_nic_uc_unsync(struct net_device *netdev,
497 const unsigned char *addr)
499 struct hnae3_handle *h = hns3_get_handle(netdev);
501 if (h->ae_algo->ops->rm_uc_addr)
502 return h->ae_algo->ops->rm_uc_addr(h, addr);
507 static int hns3_nic_mc_sync(struct net_device *netdev,
508 const unsigned char *addr)
510 struct hnae3_handle *h = hns3_get_handle(netdev);
512 if (h->ae_algo->ops->add_mc_addr)
513 return h->ae_algo->ops->add_mc_addr(h, addr);
518 static int hns3_nic_mc_unsync(struct net_device *netdev,
519 const unsigned char *addr)
521 struct hnae3_handle *h = hns3_get_handle(netdev);
523 if (h->ae_algo->ops->rm_mc_addr)
524 return h->ae_algo->ops->rm_mc_addr(h, addr);
529 static u8 hns3_get_netdev_flags(struct net_device *netdev)
533 if (netdev->flags & IFF_PROMISC) {
534 flags = HNAE3_USER_UPE | HNAE3_USER_MPE | HNAE3_BPE;
536 flags |= HNAE3_VLAN_FLTR;
537 if (netdev->flags & IFF_ALLMULTI)
538 flags |= HNAE3_USER_MPE;
544 static void hns3_nic_set_rx_mode(struct net_device *netdev)
546 struct hnae3_handle *h = hns3_get_handle(netdev);
550 new_flags = hns3_get_netdev_flags(netdev);
552 ret = __dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync);
554 netdev_err(netdev, "sync uc address fail\n");
556 new_flags |= HNAE3_OVERFLOW_UPE;
559 if (netdev->flags & IFF_MULTICAST) {
560 ret = __dev_mc_sync(netdev, hns3_nic_mc_sync,
563 netdev_err(netdev, "sync mc address fail\n");
565 new_flags |= HNAE3_OVERFLOW_MPE;
569 /* User mode Promisc mode enable and vlan filtering is disabled to
570 * let all packets in. MAC-VLAN Table overflow Promisc enabled and
571 * vlan fitering is enabled
573 hns3_enable_vlan_filter(netdev, new_flags & HNAE3_VLAN_FLTR);
574 h->netdev_flags = new_flags;
575 hns3_update_promisc_mode(netdev, new_flags);
578 int hns3_update_promisc_mode(struct net_device *netdev, u8 promisc_flags)
580 struct hns3_nic_priv *priv = netdev_priv(netdev);
581 struct hnae3_handle *h = priv->ae_handle;
583 if (h->ae_algo->ops->set_promisc_mode) {
584 return h->ae_algo->ops->set_promisc_mode(h,
585 promisc_flags & HNAE3_UPE,
586 promisc_flags & HNAE3_MPE);
592 void hns3_enable_vlan_filter(struct net_device *netdev, bool enable)
594 struct hns3_nic_priv *priv = netdev_priv(netdev);
595 struct hnae3_handle *h = priv->ae_handle;
598 if (h->pdev->revision >= 0x21 && h->ae_algo->ops->enable_vlan_filter) {
599 last_state = h->netdev_flags & HNAE3_VLAN_FLTR ? true : false;
600 if (enable != last_state) {
603 enable ? "enable" : "disable");
604 h->ae_algo->ops->enable_vlan_filter(h, enable);
609 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
610 u16 *mss, u32 *type_cs_vlan_tso)
612 u32 l4_offset, hdr_len;
613 union l3_hdr_info l3;
614 union l4_hdr_info l4;
618 if (!skb_is_gso(skb))
621 ret = skb_cow_head(skb, 0);
625 l3.hdr = skb_network_header(skb);
626 l4.hdr = skb_transport_header(skb);
628 /* Software should clear the IPv4's checksum field when tso is
631 if (l3.v4->version == 4)
635 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
638 SKB_GSO_UDP_TUNNEL_CSUM)) {
639 if ((!(skb_shinfo(skb)->gso_type &
641 (skb_shinfo(skb)->gso_type &
642 SKB_GSO_UDP_TUNNEL_CSUM)) {
643 /* Software should clear the udp's checksum
644 * field when tso is needed.
648 /* reset l3&l4 pointers from outer to inner headers */
649 l3.hdr = skb_inner_network_header(skb);
650 l4.hdr = skb_inner_transport_header(skb);
652 /* Software should clear the IPv4's checksum field when
655 if (l3.v4->version == 4)
659 /* normal or tunnel packet*/
660 l4_offset = l4.hdr - skb->data;
661 hdr_len = (l4.tcp->doff << 2) + l4_offset;
663 /* remove payload length from inner pseudo checksum when tso*/
664 l4_paylen = skb->len - l4_offset;
665 csum_replace_by_diff(&l4.tcp->check,
666 (__force __wsum)htonl(l4_paylen));
668 /* find the txbd field values */
669 *paylen = skb->len - hdr_len;
670 hnae3_set_bit(*type_cs_vlan_tso,
673 /* get MSS for TSO */
674 *mss = skb_shinfo(skb)->gso_size;
679 static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
682 union l3_hdr_info l3;
683 unsigned char *l4_hdr;
684 unsigned char *exthdr;
688 /* find outer header point */
689 l3.hdr = skb_network_header(skb);
690 l4_hdr = skb_transport_header(skb);
692 if (skb->protocol == htons(ETH_P_IPV6)) {
693 exthdr = l3.hdr + sizeof(*l3.v6);
694 l4_proto_tmp = l3.v6->nexthdr;
695 if (l4_hdr != exthdr)
696 ipv6_skip_exthdr(skb, exthdr - skb->data,
697 &l4_proto_tmp, &frag_off);
698 } else if (skb->protocol == htons(ETH_P_IP)) {
699 l4_proto_tmp = l3.v4->protocol;
704 *ol4_proto = l4_proto_tmp;
707 if (!skb->encapsulation) {
712 /* find inner header point */
713 l3.hdr = skb_inner_network_header(skb);
714 l4_hdr = skb_inner_transport_header(skb);
716 if (l3.v6->version == 6) {
717 exthdr = l3.hdr + sizeof(*l3.v6);
718 l4_proto_tmp = l3.v6->nexthdr;
719 if (l4_hdr != exthdr)
720 ipv6_skip_exthdr(skb, exthdr - skb->data,
721 &l4_proto_tmp, &frag_off);
722 } else if (l3.v4->version == 4) {
723 l4_proto_tmp = l3.v4->protocol;
726 *il4_proto = l4_proto_tmp;
731 static void hns3_set_l2l3l4_len(struct sk_buff *skb, u8 ol4_proto,
732 u8 il4_proto, u32 *type_cs_vlan_tso,
733 u32 *ol_type_vlan_len_msec)
735 union l3_hdr_info l3;
736 union l4_hdr_info l4;
737 unsigned char *l2_hdr;
738 u8 l4_proto = ol4_proto;
745 l3.hdr = skb_network_header(skb);
746 l4.hdr = skb_transport_header(skb);
748 /* compute L2 header size for normal packet, defined in 2 Bytes */
749 l2_len = l3.hdr - skb->data;
750 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
751 HNS3_TXD_L2LEN_S, l2_len >> 1);
754 if (skb->encapsulation) {
755 /* compute OL2 header size, defined in 2 Bytes */
757 hnae3_set_field(*ol_type_vlan_len_msec,
759 HNS3_TXD_L2LEN_S, ol2_len >> 1);
761 /* compute OL3 header size, defined in 4 Bytes */
762 ol3_len = l4.hdr - l3.hdr;
763 hnae3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_M,
764 HNS3_TXD_L3LEN_S, ol3_len >> 2);
766 /* MAC in UDP, MAC in GRE (0x6558)*/
767 if ((ol4_proto == IPPROTO_UDP) || (ol4_proto == IPPROTO_GRE)) {
768 /* switch MAC header ptr from outer to inner header.*/
769 l2_hdr = skb_inner_mac_header(skb);
771 /* compute OL4 header size, defined in 4 Bytes. */
772 ol4_len = l2_hdr - l4.hdr;
773 hnae3_set_field(*ol_type_vlan_len_msec,
774 HNS3_TXD_L4LEN_M, HNS3_TXD_L4LEN_S,
777 /* switch IP header ptr from outer to inner header */
778 l3.hdr = skb_inner_network_header(skb);
780 /* compute inner l2 header size, defined in 2 Bytes. */
781 l2_len = l3.hdr - l2_hdr;
782 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
783 HNS3_TXD_L2LEN_S, l2_len >> 1);
785 /* skb packet types not supported by hardware,
786 * txbd len fild doesn't be filled.
791 /* switch L4 header pointer from outer to inner */
792 l4.hdr = skb_inner_transport_header(skb);
794 l4_proto = il4_proto;
797 /* compute inner(/normal) L3 header size, defined in 4 Bytes */
798 l3_len = l4.hdr - l3.hdr;
799 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_M,
800 HNS3_TXD_L3LEN_S, l3_len >> 2);
802 /* compute inner(/normal) L4 header size, defined in 4 Bytes */
805 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
806 HNS3_TXD_L4LEN_S, l4.tcp->doff);
809 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
811 (sizeof(struct sctphdr) >> 2));
814 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
816 (sizeof(struct udphdr) >> 2));
819 /* skb packet types not supported by hardware,
820 * txbd len fild doesn't be filled.
826 /* when skb->encapsulation is 0, skb->ip_summed is CHECKSUM_PARTIAL
827 * and it is udp packet, which has a dest port as the IANA assigned.
828 * the hardware is expected to do the checksum offload, but the
829 * hardware will not do the checksum offload when udp dest port is
832 static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
834 #define IANA_VXLAN_PORT 4789
835 union l4_hdr_info l4;
837 l4.hdr = skb_transport_header(skb);
839 if (!(!skb->encapsulation && l4.udp->dest == htons(IANA_VXLAN_PORT)))
842 skb_checksum_help(skb);
847 static int hns3_set_l3l4_type_csum(struct sk_buff *skb, u8 ol4_proto,
848 u8 il4_proto, u32 *type_cs_vlan_tso,
849 u32 *ol_type_vlan_len_msec)
851 union l3_hdr_info l3;
852 u32 l4_proto = ol4_proto;
854 l3.hdr = skb_network_header(skb);
856 /* define OL3 type and tunnel type(OL4).*/
857 if (skb->encapsulation) {
858 /* define outer network header type.*/
859 if (skb->protocol == htons(ETH_P_IP)) {
861 hnae3_set_field(*ol_type_vlan_len_msec,
864 HNS3_OL3T_IPV4_CSUM);
866 hnae3_set_field(*ol_type_vlan_len_msec,
869 HNS3_OL3T_IPV4_NO_CSUM);
871 } else if (skb->protocol == htons(ETH_P_IPV6)) {
872 hnae3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_M,
873 HNS3_TXD_OL3T_S, HNS3_OL3T_IPV6);
876 /* define tunnel type(OL4).*/
879 hnae3_set_field(*ol_type_vlan_len_msec,
882 HNS3_TUN_MAC_IN_UDP);
885 hnae3_set_field(*ol_type_vlan_len_msec,
891 /* drop the skb tunnel packet if hardware don't support,
892 * because hardware can't calculate csum when TSO.
897 /* the stack computes the IP header already,
898 * driver calculate l4 checksum when not TSO.
900 skb_checksum_help(skb);
904 l3.hdr = skb_inner_network_header(skb);
905 l4_proto = il4_proto;
908 if (l3.v4->version == 4) {
909 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
910 HNS3_TXD_L3T_S, HNS3_L3T_IPV4);
912 /* the stack computes the IP header already, the only time we
913 * need the hardware to recompute it is in the case of TSO.
916 hnae3_set_bit(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
917 } else if (l3.v6->version == 6) {
918 hnae3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
919 HNS3_TXD_L3T_S, HNS3_L3T_IPV6);
924 hnae3_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
925 hnae3_set_field(*type_cs_vlan_tso,
931 if (hns3_tunnel_csum_bug(skb))
934 hnae3_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
935 hnae3_set_field(*type_cs_vlan_tso,
941 hnae3_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
942 hnae3_set_field(*type_cs_vlan_tso,
948 /* drop the skb tunnel packet if hardware don't support,
949 * because hardware can't calculate csum when TSO.
954 /* the stack computes the IP header already,
955 * driver calculate l4 checksum when not TSO.
957 skb_checksum_help(skb);
964 static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
966 /* Config bd buffer end */
967 hnae3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_BDTYPE_M,
968 HNS3_TXD_BDTYPE_S, 0);
969 hnae3_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
970 hnae3_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
971 hnae3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_SC_M, HNS3_TXD_SC_S, 0);
974 static int hns3_fill_desc_vtags(struct sk_buff *skb,
975 struct hns3_enet_ring *tx_ring,
976 u32 *inner_vlan_flag,
981 #define HNS3_TX_VLAN_PRIO_SHIFT 13
983 if (skb->protocol == htons(ETH_P_8021Q) &&
984 !(tx_ring->tqp->handle->kinfo.netdev->features &
985 NETIF_F_HW_VLAN_CTAG_TX)) {
986 /* When HW VLAN acceleration is turned off, and the stack
987 * sets the protocol to 802.1q, the driver just need to
988 * set the protocol to the encapsulated ethertype.
990 skb->protocol = vlan_get_protocol(skb);
994 if (skb_vlan_tag_present(skb)) {
997 vlan_tag = skb_vlan_tag_get(skb);
998 vlan_tag |= (skb->priority & 0x7) << HNS3_TX_VLAN_PRIO_SHIFT;
1000 /* Based on hw strategy, use out_vtag in two layer tag case,
1001 * and use inner_vtag in one tag case.
1003 if (skb->protocol == htons(ETH_P_8021Q)) {
1004 hnae3_set_bit(*out_vlan_flag, HNS3_TXD_OVLAN_B, 1);
1005 *out_vtag = vlan_tag;
1007 hnae3_set_bit(*inner_vlan_flag, HNS3_TXD_VLAN_B, 1);
1008 *inner_vtag = vlan_tag;
1010 } else if (skb->protocol == htons(ETH_P_8021Q)) {
1011 struct vlan_ethhdr *vhdr;
1014 rc = skb_cow_head(skb, 0);
1017 vhdr = (struct vlan_ethhdr *)skb->data;
1018 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority & 0x7)
1019 << HNS3_TX_VLAN_PRIO_SHIFT);
1022 skb->protocol = vlan_get_protocol(skb);
1026 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
1027 int size, int frag_end, enum hns_desc_type type)
1029 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
1030 struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1031 struct device *dev = ring_to_dev(ring);
1032 u16 bdtp_fe_sc_vld_ra_ri = 0;
1033 struct skb_frag_struct *frag;
1034 unsigned int frag_buf_num;
1038 if (type == DESC_TYPE_SKB) {
1039 struct sk_buff *skb = (struct sk_buff *)priv;
1040 u32 ol_type_vlan_len_msec = 0;
1041 u32 type_cs_vlan_tso = 0;
1042 u32 paylen = skb->len;
1048 ret = hns3_fill_desc_vtags(skb, ring, &type_cs_vlan_tso,
1049 &ol_type_vlan_len_msec,
1050 &inner_vtag, &out_vtag);
1054 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1055 u8 ol4_proto, il4_proto;
1057 skb_reset_mac_len(skb);
1059 ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
1062 hns3_set_l2l3l4_len(skb, ol4_proto, il4_proto,
1064 &ol_type_vlan_len_msec);
1065 ret = hns3_set_l3l4_type_csum(skb, ol4_proto, il4_proto,
1067 &ol_type_vlan_len_msec);
1071 ret = hns3_set_tso(skb, &paylen, &mss,
1078 desc->tx.ol_type_vlan_len_msec =
1079 cpu_to_le32(ol_type_vlan_len_msec);
1080 desc->tx.type_cs_vlan_tso_len =
1081 cpu_to_le32(type_cs_vlan_tso);
1082 desc->tx.paylen = cpu_to_le32(paylen);
1083 desc->tx.mss = cpu_to_le16(mss);
1084 desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
1085 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
1087 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1089 frag = (struct skb_frag_struct *)priv;
1090 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1093 if (dma_mapping_error(ring->dev, dma)) {
1094 ring->stats.sw_err_cnt++;
1098 desc_cb->length = size;
1100 frag_buf_num = (size + HNS3_MAX_BD_SIZE - 1) >> HNS3_MAX_BD_SIZE_OFFSET;
1101 sizeoflast = size & HNS3_TX_LAST_SIZE_M;
1102 sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
1104 /* When frag size is bigger than hardware limit, split this frag */
1105 for (k = 0; k < frag_buf_num; k++) {
1106 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
1107 desc_cb->priv = priv;
1108 desc_cb->dma = dma + HNS3_MAX_BD_SIZE * k;
1109 desc_cb->type = (type == DESC_TYPE_SKB && !k) ?
1110 DESC_TYPE_SKB : DESC_TYPE_PAGE;
1112 /* now, fill the descriptor */
1113 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);
1114 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?
1115 (u16)sizeoflast : (u16)HNS3_MAX_BD_SIZE);
1116 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri,
1117 frag_end && (k == frag_buf_num - 1) ?
1119 desc->tx.bdtp_fe_sc_vld_ra_ri =
1120 cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1122 /* move ring pointer to next.*/
1123 ring_ptr_move_fw(ring, next_to_use);
1125 desc_cb = &ring->desc_cb[ring->next_to_use];
1126 desc = &ring->desc[ring->next_to_use];
1132 static int hns3_nic_maybe_stop_tso(struct sk_buff **out_skb, int *bnum,
1133 struct hns3_enet_ring *ring)
1135 struct sk_buff *skb = *out_skb;
1136 struct sk_buff *new_skb = NULL;
1137 struct skb_frag_struct *frag;
1144 size = skb_headlen(skb);
1145 buf_num = (size + HNS3_MAX_BD_SIZE - 1) >> HNS3_MAX_BD_SIZE_OFFSET;
1147 frag_num = skb_shinfo(skb)->nr_frags;
1148 for (i = 0; i < frag_num; i++) {
1149 frag = &skb_shinfo(skb)->frags[i];
1150 size = skb_frag_size(frag);
1151 bdnum_for_frag = (size + HNS3_MAX_BD_SIZE - 1) >>
1152 HNS3_MAX_BD_SIZE_OFFSET;
1153 if (bdnum_for_frag > HNS3_MAX_BD_PER_FRAG)
1156 buf_num += bdnum_for_frag;
1159 if (unlikely(buf_num > HNS3_MAX_BD_PER_FRAG)) {
1160 buf_num = (skb->len + HNS3_MAX_BD_SIZE - 1) >>
1161 HNS3_MAX_BD_SIZE_OFFSET;
1162 if (ring_space(ring) < buf_num)
1164 /* manual split the send packet */
1165 new_skb = skb_copy(skb, GFP_ATOMIC);
1168 dev_kfree_skb_any(skb);
1172 if (unlikely(ring_space(ring) < buf_num))
1179 static int hns3_nic_maybe_stop_tx(struct sk_buff **out_skb, int *bnum,
1180 struct hns3_enet_ring *ring)
1182 struct sk_buff *skb = *out_skb;
1183 struct sk_buff *new_skb = NULL;
1186 /* No. of segments (plus a header) */
1187 buf_num = skb_shinfo(skb)->nr_frags + 1;
1189 if (unlikely(buf_num > HNS3_MAX_BD_PER_FRAG)) {
1190 buf_num = (skb->len + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
1191 if (ring_space(ring) < buf_num)
1193 /* manual split the send packet */
1194 new_skb = skb_copy(skb, GFP_ATOMIC);
1197 dev_kfree_skb_any(skb);
1201 if (unlikely(ring_space(ring) < buf_num))
1209 static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig)
1211 struct device *dev = ring_to_dev(ring);
1214 for (i = 0; i < ring->desc_num; i++) {
1215 /* check if this is where we started */
1216 if (ring->next_to_use == next_to_use_orig)
1219 /* unmap the descriptor dma address */
1220 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
1221 dma_unmap_single(dev,
1222 ring->desc_cb[ring->next_to_use].dma,
1223 ring->desc_cb[ring->next_to_use].length,
1225 else if (ring->desc_cb[ring->next_to_use].length)
1227 ring->desc_cb[ring->next_to_use].dma,
1228 ring->desc_cb[ring->next_to_use].length,
1231 ring->desc_cb[ring->next_to_use].length = 0;
1234 ring_ptr_move_bw(ring, next_to_use);
1238 netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
1240 struct hns3_nic_priv *priv = netdev_priv(netdev);
1241 struct hns3_nic_ring_data *ring_data =
1242 &tx_ring_data(priv, skb->queue_mapping);
1243 struct hns3_enet_ring *ring = ring_data->ring;
1244 struct netdev_queue *dev_queue;
1245 struct skb_frag_struct *frag;
1246 int next_to_use_head;
1247 int next_to_use_frag;
1254 /* Prefetch the data used later */
1255 prefetch(skb->data);
1257 switch (priv->ops.maybe_stop_tx(&skb, &buf_num, ring)) {
1259 u64_stats_update_begin(&ring->syncp);
1260 ring->stats.tx_busy++;
1261 u64_stats_update_end(&ring->syncp);
1263 goto out_net_tx_busy;
1265 u64_stats_update_begin(&ring->syncp);
1266 ring->stats.sw_err_cnt++;
1267 u64_stats_update_end(&ring->syncp);
1268 netdev_err(netdev, "no memory to xmit!\n");
1275 /* No. of segments (plus a header) */
1276 seg_num = skb_shinfo(skb)->nr_frags + 1;
1277 /* Fill the first part */
1278 size = skb_headlen(skb);
1280 next_to_use_head = ring->next_to_use;
1282 ret = priv->ops.fill_desc(ring, skb, size, seg_num == 1 ? 1 : 0,
1287 next_to_use_frag = ring->next_to_use;
1288 /* Fill the fragments */
1289 for (i = 1; i < seg_num; i++) {
1290 frag = &skb_shinfo(skb)->frags[i - 1];
1291 size = skb_frag_size(frag);
1293 ret = priv->ops.fill_desc(ring, frag, size,
1294 seg_num - 1 == i ? 1 : 0,
1301 /* Complete translate all packets */
1302 dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1303 netdev_tx_sent_queue(dev_queue, skb->len);
1305 wmb(); /* Commit all data before submit */
1307 hnae3_queue_xmit(ring->tqp, buf_num);
1309 return NETDEV_TX_OK;
1312 hns3_clear_desc(ring, next_to_use_frag);
1315 hns3_clear_desc(ring, next_to_use_head);
1318 dev_kfree_skb_any(skb);
1319 return NETDEV_TX_OK;
1322 netif_stop_subqueue(netdev, ring_data->queue_index);
1323 smp_mb(); /* Commit all data before submit */
1325 return NETDEV_TX_BUSY;
1328 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1330 struct hnae3_handle *h = hns3_get_handle(netdev);
1331 struct sockaddr *mac_addr = p;
1334 if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1335 return -EADDRNOTAVAIL;
1337 if (ether_addr_equal(netdev->dev_addr, mac_addr->sa_data)) {
1338 netdev_info(netdev, "already using mac address %pM\n",
1343 ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
1345 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1349 ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1354 static int hns3_nic_do_ioctl(struct net_device *netdev,
1355 struct ifreq *ifr, int cmd)
1357 struct hnae3_handle *h = hns3_get_handle(netdev);
1359 if (!netif_running(netdev))
1362 if (!h->ae_algo->ops->do_ioctl)
1365 return h->ae_algo->ops->do_ioctl(h, ifr, cmd);
1368 static int hns3_nic_set_features(struct net_device *netdev,
1369 netdev_features_t features)
1371 netdev_features_t changed = netdev->features ^ features;
1372 struct hns3_nic_priv *priv = netdev_priv(netdev);
1373 struct hnae3_handle *h = priv->ae_handle;
1377 if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) {
1378 if (features & (NETIF_F_TSO | NETIF_F_TSO6))
1379 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
1381 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
1384 if (changed & (NETIF_F_GRO_HW) && h->ae_algo->ops->set_gro_en) {
1385 enable = !!(features & NETIF_F_GRO_HW);
1386 ret = h->ae_algo->ops->set_gro_en(h, enable);
1391 if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1392 h->ae_algo->ops->enable_vlan_filter) {
1393 enable = !!(features & NETIF_F_HW_VLAN_CTAG_FILTER);
1394 h->ae_algo->ops->enable_vlan_filter(h, enable);
1397 if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1398 h->ae_algo->ops->enable_hw_strip_rxvtag) {
1399 enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
1400 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, enable);
1405 if ((changed & NETIF_F_NTUPLE) && h->ae_algo->ops->enable_fd) {
1406 enable = !!(features & NETIF_F_NTUPLE);
1407 h->ae_algo->ops->enable_fd(h, enable);
1410 netdev->features = features;
1414 static void hns3_nic_get_stats64(struct net_device *netdev,
1415 struct rtnl_link_stats64 *stats)
1417 struct hns3_nic_priv *priv = netdev_priv(netdev);
1418 int queue_num = priv->ae_handle->kinfo.num_tqps;
1419 struct hnae3_handle *handle = priv->ae_handle;
1420 struct hns3_enet_ring *ring;
1421 u64 rx_length_errors = 0;
1422 u64 rx_crc_errors = 0;
1423 u64 rx_multicast = 0;
1435 if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1438 handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1440 for (idx = 0; idx < queue_num; idx++) {
1441 /* fetch the tx stats */
1442 ring = priv->ring_data[idx].ring;
1444 start = u64_stats_fetch_begin_irq(&ring->syncp);
1445 tx_bytes += ring->stats.tx_bytes;
1446 tx_pkts += ring->stats.tx_pkts;
1447 tx_drop += ring->stats.sw_err_cnt;
1448 tx_errors += ring->stats.sw_err_cnt;
1449 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1451 /* fetch the rx stats */
1452 ring = priv->ring_data[idx + queue_num].ring;
1454 start = u64_stats_fetch_begin_irq(&ring->syncp);
1455 rx_bytes += ring->stats.rx_bytes;
1456 rx_pkts += ring->stats.rx_pkts;
1457 rx_drop += ring->stats.non_vld_descs;
1458 rx_drop += ring->stats.l2_err;
1459 rx_errors += ring->stats.non_vld_descs;
1460 rx_errors += ring->stats.l2_err;
1461 rx_crc_errors += ring->stats.l2_err;
1462 rx_crc_errors += ring->stats.l3l4_csum_err;
1463 rx_multicast += ring->stats.rx_multicast;
1464 rx_length_errors += ring->stats.err_pkt_len;
1465 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1468 stats->tx_bytes = tx_bytes;
1469 stats->tx_packets = tx_pkts;
1470 stats->rx_bytes = rx_bytes;
1471 stats->rx_packets = rx_pkts;
1473 stats->rx_errors = rx_errors;
1474 stats->multicast = rx_multicast;
1475 stats->rx_length_errors = rx_length_errors;
1476 stats->rx_crc_errors = rx_crc_errors;
1477 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1479 stats->tx_errors = tx_errors;
1480 stats->rx_dropped = rx_drop;
1481 stats->tx_dropped = tx_drop;
1482 stats->collisions = netdev->stats.collisions;
1483 stats->rx_over_errors = netdev->stats.rx_over_errors;
1484 stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1485 stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1486 stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1487 stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1488 stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1489 stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1490 stats->tx_window_errors = netdev->stats.tx_window_errors;
1491 stats->rx_compressed = netdev->stats.rx_compressed;
1492 stats->tx_compressed = netdev->stats.tx_compressed;
1495 static int hns3_setup_tc(struct net_device *netdev, void *type_data)
1497 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
1498 struct hnae3_handle *h = hns3_get_handle(netdev);
1499 struct hnae3_knic_private_info *kinfo = &h->kinfo;
1500 u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1501 u8 tc = mqprio_qopt->qopt.num_tc;
1502 u16 mode = mqprio_qopt->mode;
1503 u8 hw = mqprio_qopt->qopt.hw;
1505 if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1506 mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1509 if (tc > HNAE3_MAX_TC)
1515 return (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1516 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
1519 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
1522 if (type != TC_SETUP_QDISC_MQPRIO)
1525 return hns3_setup_tc(dev, type_data);
1528 static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1529 __be16 proto, u16 vid)
1531 struct hnae3_handle *h = hns3_get_handle(netdev);
1532 struct hns3_nic_priv *priv = netdev_priv(netdev);
1535 if (h->ae_algo->ops->set_vlan_filter)
1536 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1539 set_bit(vid, priv->active_vlans);
1544 static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1545 __be16 proto, u16 vid)
1547 struct hnae3_handle *h = hns3_get_handle(netdev);
1548 struct hns3_nic_priv *priv = netdev_priv(netdev);
1551 if (h->ae_algo->ops->set_vlan_filter)
1552 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1555 clear_bit(vid, priv->active_vlans);
1560 static int hns3_restore_vlan(struct net_device *netdev)
1562 struct hns3_nic_priv *priv = netdev_priv(netdev);
1566 for_each_set_bit(vid, priv->active_vlans, VLAN_N_VID) {
1567 ret = hns3_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
1569 netdev_err(netdev, "Restore vlan: %d filter, ret:%d\n",
1578 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1579 u8 qos, __be16 vlan_proto)
1581 struct hnae3_handle *h = hns3_get_handle(netdev);
1584 if (h->ae_algo->ops->set_vf_vlan_filter)
1585 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1591 static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1593 struct hnae3_handle *h = hns3_get_handle(netdev);
1596 if (!h->ae_algo->ops->set_mtu)
1599 ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1601 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1604 netdev->mtu = new_mtu;
1609 static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1611 struct hns3_nic_priv *priv = netdev_priv(ndev);
1612 struct hns3_enet_ring *tx_ring = NULL;
1613 int timeout_queue = 0;
1614 int hw_head, hw_tail;
1617 /* Find the stopped queue the same way the stack does */
1618 for (i = 0; i < ndev->real_num_tx_queues; i++) {
1619 struct netdev_queue *q;
1620 unsigned long trans_start;
1622 q = netdev_get_tx_queue(ndev, i);
1623 trans_start = q->trans_start;
1624 if (netif_xmit_stopped(q) &&
1626 (trans_start + ndev->watchdog_timeo))) {
1632 if (i == ndev->num_tx_queues) {
1634 "no netdev TX timeout queue found, timeout count: %llu\n",
1635 priv->tx_timeout_count);
1639 tx_ring = priv->ring_data[timeout_queue].ring;
1641 hw_head = readl_relaxed(tx_ring->tqp->io_base +
1642 HNS3_RING_TX_RING_HEAD_REG);
1643 hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1644 HNS3_RING_TX_RING_TAIL_REG);
1646 "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, HW_HEAD: 0x%x, HW_TAIL: 0x%x, INT: 0x%x\n",
1647 priv->tx_timeout_count,
1649 tx_ring->next_to_use,
1650 tx_ring->next_to_clean,
1653 readl(tx_ring->tqp_vector->mask_addr));
1658 static void hns3_nic_net_timeout(struct net_device *ndev)
1660 struct hns3_nic_priv *priv = netdev_priv(ndev);
1661 struct hnae3_handle *h = priv->ae_handle;
1663 if (!hns3_get_tx_timeo_queue_info(ndev))
1666 priv->tx_timeout_count++;
1668 /* request the reset, and let the hclge to determine
1669 * which reset level should be done
1671 if (h->ae_algo->ops->reset_event)
1672 h->ae_algo->ops->reset_event(h->pdev, h);
1675 static const struct net_device_ops hns3_nic_netdev_ops = {
1676 .ndo_open = hns3_nic_net_open,
1677 .ndo_stop = hns3_nic_net_stop,
1678 .ndo_start_xmit = hns3_nic_net_xmit,
1679 .ndo_tx_timeout = hns3_nic_net_timeout,
1680 .ndo_set_mac_address = hns3_nic_net_set_mac_address,
1681 .ndo_do_ioctl = hns3_nic_do_ioctl,
1682 .ndo_change_mtu = hns3_nic_change_mtu,
1683 .ndo_set_features = hns3_nic_set_features,
1684 .ndo_get_stats64 = hns3_nic_get_stats64,
1685 .ndo_setup_tc = hns3_nic_setup_tc,
1686 .ndo_set_rx_mode = hns3_nic_set_rx_mode,
1687 .ndo_vlan_rx_add_vid = hns3_vlan_rx_add_vid,
1688 .ndo_vlan_rx_kill_vid = hns3_vlan_rx_kill_vid,
1689 .ndo_set_vf_vlan = hns3_ndo_set_vf_vlan,
1692 static bool hns3_is_phys_func(struct pci_dev *pdev)
1694 u32 dev_id = pdev->device;
1697 case HNAE3_DEV_ID_GE:
1698 case HNAE3_DEV_ID_25GE:
1699 case HNAE3_DEV_ID_25GE_RDMA:
1700 case HNAE3_DEV_ID_25GE_RDMA_MACSEC:
1701 case HNAE3_DEV_ID_50GE_RDMA:
1702 case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
1703 case HNAE3_DEV_ID_100G_RDMA_MACSEC:
1705 case HNAE3_DEV_ID_100G_VF:
1706 case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF:
1709 dev_warn(&pdev->dev, "un-recognized pci device-id %d",
1716 static void hns3_disable_sriov(struct pci_dev *pdev)
1718 /* If our VFs are assigned we cannot shut down SR-IOV
1719 * without causing issues, so just leave the hardware
1720 * available but disabled
1722 if (pci_vfs_assigned(pdev)) {
1723 dev_warn(&pdev->dev,
1724 "disabling driver while VFs are assigned\n");
1728 pci_disable_sriov(pdev);
1731 static void hns3_get_dev_capability(struct pci_dev *pdev,
1732 struct hnae3_ae_dev *ae_dev)
1734 if (pdev->revision >= 0x21) {
1735 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B, 1);
1736 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B, 1);
1740 /* hns3_probe - Device initialization routine
1741 * @pdev: PCI device information struct
1742 * @ent: entry in hns3_pci_tbl
1744 * hns3_probe initializes a PF identified by a pci_dev structure.
1745 * The OS initialization, configuring of the PF private structure,
1746 * and a hardware reset occur.
1748 * Returns 0 on success, negative on failure
1750 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1752 struct hnae3_ae_dev *ae_dev;
1755 ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev),
1762 ae_dev->pdev = pdev;
1763 ae_dev->flag = ent->driver_data;
1764 ae_dev->dev_type = HNAE3_DEV_KNIC;
1765 ae_dev->reset_type = HNAE3_NONE_RESET;
1766 hns3_get_dev_capability(pdev, ae_dev);
1767 pci_set_drvdata(pdev, ae_dev);
1769 ret = hnae3_register_ae_dev(ae_dev);
1771 devm_kfree(&pdev->dev, ae_dev);
1772 pci_set_drvdata(pdev, NULL);
1778 /* hns3_remove - Device removal routine
1779 * @pdev: PCI device information struct
1781 static void hns3_remove(struct pci_dev *pdev)
1783 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1785 if (hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))
1786 hns3_disable_sriov(pdev);
1788 hnae3_unregister_ae_dev(ae_dev);
1789 pci_set_drvdata(pdev, NULL);
1793 * hns3_pci_sriov_configure
1794 * @pdev: pointer to a pci_dev structure
1795 * @num_vfs: number of VFs to allocate
1797 * Enable or change the number of VFs. Called when the user updates the number
1800 static int hns3_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1804 if (!(hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))) {
1805 dev_warn(&pdev->dev, "Can not config SRIOV\n");
1810 ret = pci_enable_sriov(pdev, num_vfs);
1812 dev_err(&pdev->dev, "SRIOV enable failed %d\n", ret);
1815 } else if (!pci_vfs_assigned(pdev)) {
1816 pci_disable_sriov(pdev);
1818 dev_warn(&pdev->dev,
1819 "Unable to free VFs because some are assigned to VMs.\n");
1825 static void hns3_shutdown(struct pci_dev *pdev)
1827 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1829 hnae3_unregister_ae_dev(ae_dev);
1830 devm_kfree(&pdev->dev, ae_dev);
1831 pci_set_drvdata(pdev, NULL);
1833 if (system_state == SYSTEM_POWER_OFF)
1834 pci_set_power_state(pdev, PCI_D3hot);
1837 static pci_ers_result_t hns3_error_detected(struct pci_dev *pdev,
1838 pci_channel_state_t state)
1840 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1841 pci_ers_result_t ret;
1843 dev_info(&pdev->dev, "PCI error detected, state(=%d)!!\n", state);
1845 if (state == pci_channel_io_perm_failure)
1846 return PCI_ERS_RESULT_DISCONNECT;
1850 "Can't recover - error happened during device init\n");
1851 return PCI_ERS_RESULT_NONE;
1854 if (ae_dev->ops->handle_hw_ras_error)
1855 ret = ae_dev->ops->handle_hw_ras_error(ae_dev);
1857 return PCI_ERS_RESULT_NONE;
1862 static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev)
1864 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1865 struct device *dev = &pdev->dev;
1867 dev_info(dev, "requesting reset due to PCI error\n");
1869 /* request the reset */
1870 if (ae_dev->ops->reset_event) {
1871 ae_dev->ops->reset_event(pdev, NULL);
1872 return PCI_ERS_RESULT_RECOVERED;
1875 return PCI_ERS_RESULT_DISCONNECT;
1878 static void hns3_reset_prepare(struct pci_dev *pdev)
1880 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1882 dev_info(&pdev->dev, "hns3 flr prepare\n");
1883 if (ae_dev && ae_dev->ops && ae_dev->ops->flr_prepare)
1884 ae_dev->ops->flr_prepare(ae_dev);
1887 static void hns3_reset_done(struct pci_dev *pdev)
1889 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1891 dev_info(&pdev->dev, "hns3 flr done\n");
1892 if (ae_dev && ae_dev->ops && ae_dev->ops->flr_done)
1893 ae_dev->ops->flr_done(ae_dev);
1896 static const struct pci_error_handlers hns3_err_handler = {
1897 .error_detected = hns3_error_detected,
1898 .slot_reset = hns3_slot_reset,
1899 .reset_prepare = hns3_reset_prepare,
1900 .reset_done = hns3_reset_done,
1903 static struct pci_driver hns3_driver = {
1904 .name = hns3_driver_name,
1905 .id_table = hns3_pci_tbl,
1906 .probe = hns3_probe,
1907 .remove = hns3_remove,
1908 .shutdown = hns3_shutdown,
1909 .sriov_configure = hns3_pci_sriov_configure,
1910 .err_handler = &hns3_err_handler,
1913 /* set default feature to hns3 */
1914 static void hns3_set_default_feature(struct net_device *netdev)
1916 struct hnae3_handle *h = hns3_get_handle(netdev);
1917 struct pci_dev *pdev = h->pdev;
1919 netdev->priv_flags |= IFF_UNICAST_FLT;
1921 netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1922 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1923 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1924 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1925 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
1927 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
1929 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
1931 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1932 NETIF_F_HW_VLAN_CTAG_FILTER |
1933 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
1934 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1935 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1936 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1937 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
1939 netdev->vlan_features |=
1940 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
1941 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
1942 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1943 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1944 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
1946 netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1947 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
1948 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1949 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1950 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1951 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
1953 if (pdev->revision >= 0x21) {
1954 netdev->hw_features |= NETIF_F_GRO_HW;
1955 netdev->features |= NETIF_F_GRO_HW;
1957 if (!(h->flags & HNAE3_SUPPORT_VF)) {
1958 netdev->hw_features |= NETIF_F_NTUPLE;
1959 netdev->features |= NETIF_F_NTUPLE;
1964 static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
1965 struct hns3_desc_cb *cb)
1967 unsigned int order = hnae3_page_order(ring);
1970 p = dev_alloc_pages(order);
1975 cb->page_offset = 0;
1977 cb->buf = page_address(p);
1978 cb->length = hnae3_page_size(ring);
1979 cb->type = DESC_TYPE_PAGE;
1984 static void hns3_free_buffer(struct hns3_enet_ring *ring,
1985 struct hns3_desc_cb *cb)
1987 if (cb->type == DESC_TYPE_SKB)
1988 dev_kfree_skb_any((struct sk_buff *)cb->priv);
1989 else if (!HNAE3_IS_TX_RING(ring))
1990 put_page((struct page *)cb->priv);
1991 memset(cb, 0, sizeof(*cb));
1994 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
1996 cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
1997 cb->length, ring_to_dma_dir(ring));
1999 if (unlikely(dma_mapping_error(ring_to_dev(ring), cb->dma)))
2005 static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
2006 struct hns3_desc_cb *cb)
2008 if (cb->type == DESC_TYPE_SKB)
2009 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
2010 ring_to_dma_dir(ring));
2011 else if (cb->length)
2012 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
2013 ring_to_dma_dir(ring));
2016 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
2018 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2019 ring->desc[i].addr = 0;
2022 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
2024 struct hns3_desc_cb *cb = &ring->desc_cb[i];
2026 if (!ring->desc_cb[i].dma)
2029 hns3_buffer_detach(ring, i);
2030 hns3_free_buffer(ring, cb);
2033 static void hns3_free_buffers(struct hns3_enet_ring *ring)
2037 for (i = 0; i < ring->desc_num; i++)
2038 hns3_free_buffer_detach(ring, i);
2041 /* free desc along with its attached buffer */
2042 static void hns3_free_desc(struct hns3_enet_ring *ring)
2044 int size = ring->desc_num * sizeof(ring->desc[0]);
2046 hns3_free_buffers(ring);
2049 dma_free_coherent(ring_to_dev(ring), size,
2050 ring->desc, ring->desc_dma_addr);
2055 static int hns3_alloc_desc(struct hns3_enet_ring *ring)
2057 int size = ring->desc_num * sizeof(ring->desc[0]);
2059 ring->desc = dma_alloc_coherent(ring_to_dev(ring), size,
2060 &ring->desc_dma_addr, GFP_KERNEL);
2067 static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
2068 struct hns3_desc_cb *cb)
2072 ret = hns3_alloc_buffer(ring, cb);
2076 ret = hns3_map_buffer(ring, cb);
2083 hns3_free_buffer(ring, cb);
2088 static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
2090 int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
2095 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2100 /* Allocate memory for raw pkg, and map with dma */
2101 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
2105 for (i = 0; i < ring->desc_num; i++) {
2106 ret = hns3_alloc_buffer_attach(ring, i);
2108 goto out_buffer_fail;
2114 for (j = i - 1; j >= 0; j--)
2115 hns3_free_buffer_detach(ring, j);
2119 /* detach a in-used buffer and replace with a reserved one */
2120 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
2121 struct hns3_desc_cb *res_cb)
2123 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2124 ring->desc_cb[i] = *res_cb;
2125 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2126 ring->desc[i].rx.bd_base_info = 0;
2129 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
2131 ring->desc_cb[i].reuse_flag = 0;
2132 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
2133 + ring->desc_cb[i].page_offset);
2134 ring->desc[i].rx.bd_base_info = 0;
2137 static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring *ring, int *bytes,
2140 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
2142 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
2143 (*bytes) += desc_cb->length;
2144 /* desc_cb will be cleaned, after hnae3_free_buffer_detach*/
2145 hns3_free_buffer_detach(ring, ring->next_to_clean);
2147 ring_ptr_move_fw(ring, next_to_clean);
2150 static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
2152 int u = ring->next_to_use;
2153 int c = ring->next_to_clean;
2155 if (unlikely(h > ring->desc_num))
2158 return u > c ? (h > c && h <= u) : (h > c || h <= u);
2161 void hns3_clean_tx_ring(struct hns3_enet_ring *ring)
2163 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2164 struct hns3_nic_priv *priv = netdev_priv(netdev);
2165 struct netdev_queue *dev_queue;
2169 head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
2170 rmb(); /* Make sure head is ready before touch any data */
2172 if (is_ring_empty(ring) || head == ring->next_to_clean)
2173 return; /* no data to poll */
2175 if (unlikely(!is_valid_clean_head(ring, head))) {
2176 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
2177 ring->next_to_use, ring->next_to_clean);
2179 u64_stats_update_begin(&ring->syncp);
2180 ring->stats.io_err_cnt++;
2181 u64_stats_update_end(&ring->syncp);
2187 while (head != ring->next_to_clean) {
2188 hns3_nic_reclaim_one_desc(ring, &bytes, &pkts);
2189 /* Issue prefetch for next Tx descriptor */
2190 prefetch(&ring->desc_cb[ring->next_to_clean]);
2193 ring->tqp_vector->tx_group.total_bytes += bytes;
2194 ring->tqp_vector->tx_group.total_packets += pkts;
2196 u64_stats_update_begin(&ring->syncp);
2197 ring->stats.tx_bytes += bytes;
2198 ring->stats.tx_pkts += pkts;
2199 u64_stats_update_end(&ring->syncp);
2201 dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
2202 netdev_tx_completed_queue(dev_queue, pkts, bytes);
2204 if (unlikely(pkts && netif_carrier_ok(netdev) &&
2205 (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
2206 /* Make sure that anybody stopping the queue after this
2207 * sees the new next_to_clean.
2210 if (netif_tx_queue_stopped(dev_queue) &&
2211 !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
2212 netif_tx_wake_queue(dev_queue);
2213 ring->stats.restart_queue++;
2218 static int hns3_desc_unused(struct hns3_enet_ring *ring)
2220 int ntc = ring->next_to_clean;
2221 int ntu = ring->next_to_use;
2223 return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
2227 hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring, int cleand_count)
2229 struct hns3_desc_cb *desc_cb;
2230 struct hns3_desc_cb res_cbs;
2233 for (i = 0; i < cleand_count; i++) {
2234 desc_cb = &ring->desc_cb[ring->next_to_use];
2235 if (desc_cb->reuse_flag) {
2236 u64_stats_update_begin(&ring->syncp);
2237 ring->stats.reuse_pg_cnt++;
2238 u64_stats_update_end(&ring->syncp);
2240 hns3_reuse_buffer(ring, ring->next_to_use);
2242 ret = hns3_reserve_buffer_map(ring, &res_cbs);
2244 u64_stats_update_begin(&ring->syncp);
2245 ring->stats.sw_err_cnt++;
2246 u64_stats_update_end(&ring->syncp);
2248 netdev_err(ring->tqp->handle->kinfo.netdev,
2249 "hnae reserve buffer map failed.\n");
2252 hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
2255 ring_ptr_move_fw(ring, next_to_use);
2258 wmb(); /* Make all data has been write before submit */
2259 writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
2262 static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2263 struct hns3_enet_ring *ring, int pull_len,
2264 struct hns3_desc_cb *desc_cb)
2266 struct hns3_desc *desc;
2272 twobufs = ((PAGE_SIZE < 8192) &&
2273 hnae3_buf_size(ring) == HNS3_BUFFER_SIZE_2048);
2275 desc = &ring->desc[ring->next_to_clean];
2276 size = le16_to_cpu(desc->rx.size);
2278 truesize = hnae3_buf_size(ring);
2281 last_offset = hnae3_page_size(ring) - hnae3_buf_size(ring);
2283 skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2284 size - pull_len, truesize);
2286 /* Avoid re-using remote pages,flag default unreuse */
2287 if (unlikely(page_to_nid(desc_cb->priv) != numa_node_id()))
2291 /* If we are only owner of page we can reuse it */
2292 if (likely(page_count(desc_cb->priv) == 1)) {
2293 /* Flip page offset to other buffer */
2294 desc_cb->page_offset ^= truesize;
2296 desc_cb->reuse_flag = 1;
2297 /* bump ref count on page before it is given*/
2298 get_page(desc_cb->priv);
2303 /* Move offset up to the next cache line */
2304 desc_cb->page_offset += truesize;
2306 if (desc_cb->page_offset <= last_offset) {
2307 desc_cb->reuse_flag = 1;
2308 /* Bump ref count on page before it is given*/
2309 get_page(desc_cb->priv);
2313 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2314 struct hns3_desc *desc)
2316 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2317 int l3_type, l4_type;
2322 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2323 l234info = le32_to_cpu(desc->rx.l234_info);
2325 skb->ip_summed = CHECKSUM_NONE;
2327 skb_checksum_none_assert(skb);
2329 if (!(netdev->features & NETIF_F_RXCSUM))
2332 /* We MUST enable hardware checksum before enabling hardware GRO */
2333 if (skb_shinfo(skb)->gso_size) {
2334 skb->ip_summed = CHECKSUM_UNNECESSARY;
2338 /* check if hardware has done checksum */
2339 if (!hnae3_get_bit(bd_base_info, HNS3_RXD_L3L4P_B))
2342 if (unlikely(hnae3_get_bit(l234info, HNS3_RXD_L3E_B) ||
2343 hnae3_get_bit(l234info, HNS3_RXD_L4E_B) ||
2344 hnae3_get_bit(l234info, HNS3_RXD_OL3E_B) ||
2345 hnae3_get_bit(l234info, HNS3_RXD_OL4E_B))) {
2346 u64_stats_update_begin(&ring->syncp);
2347 ring->stats.l3l4_csum_err++;
2348 u64_stats_update_end(&ring->syncp);
2353 ol4_type = hnae3_get_field(l234info, HNS3_RXD_OL4ID_M,
2356 case HNS3_OL4_TYPE_MAC_IN_UDP:
2357 case HNS3_OL4_TYPE_NVGRE:
2358 skb->csum_level = 1;
2360 case HNS3_OL4_TYPE_NO_TUN:
2361 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2363 l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
2366 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2367 if ((l3_type == HNS3_L3_TYPE_IPV4 ||
2368 l3_type == HNS3_L3_TYPE_IPV6) &&
2369 (l4_type == HNS3_L4_TYPE_UDP ||
2370 l4_type == HNS3_L4_TYPE_TCP ||
2371 l4_type == HNS3_L4_TYPE_SCTP))
2372 skb->ip_summed = CHECKSUM_UNNECESSARY;
2379 static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2381 if (skb_has_frag_list(skb))
2382 napi_gro_flush(&ring->tqp_vector->napi, false);
2384 napi_gro_receive(&ring->tqp_vector->napi, skb);
2387 static bool hns3_parse_vlan_tag(struct hns3_enet_ring *ring,
2388 struct hns3_desc *desc, u32 l234info,
2391 struct pci_dev *pdev = ring->tqp->handle->pdev;
2393 if (pdev->revision == 0x20) {
2394 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2395 if (!(*vlan_tag & VLAN_VID_MASK))
2396 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2398 return (*vlan_tag != 0);
2401 #define HNS3_STRP_OUTER_VLAN 0x1
2402 #define HNS3_STRP_INNER_VLAN 0x2
2404 switch (hnae3_get_field(l234info, HNS3_RXD_STRP_TAGP_M,
2405 HNS3_RXD_STRP_TAGP_S)) {
2406 case HNS3_STRP_OUTER_VLAN:
2407 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2409 case HNS3_STRP_INNER_VLAN:
2410 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2417 static int hns3_alloc_skb(struct hns3_enet_ring *ring, int length,
2420 #define HNS3_NEED_ADD_FRAG 1
2421 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
2422 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2423 struct sk_buff *skb;
2425 ring->skb = napi_alloc_skb(&ring->tqp_vector->napi, HNS3_RX_HEAD_SIZE);
2427 if (unlikely(!skb)) {
2428 netdev_err(netdev, "alloc rx skb fail\n");
2430 u64_stats_update_begin(&ring->syncp);
2431 ring->stats.sw_err_cnt++;
2432 u64_stats_update_end(&ring->syncp);
2437 prefetchw(skb->data);
2439 ring->pending_buf = 1;
2441 ring->tail_skb = NULL;
2442 if (length <= HNS3_RX_HEAD_SIZE) {
2443 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2445 /* We can reuse buffer as-is, just make sure it is local */
2446 if (likely(page_to_nid(desc_cb->priv) == numa_node_id()))
2447 desc_cb->reuse_flag = 1;
2448 else /* This page cannot be reused so discard it */
2449 put_page(desc_cb->priv);
2451 ring_ptr_move_fw(ring, next_to_clean);
2454 u64_stats_update_begin(&ring->syncp);
2455 ring->stats.seg_pkt_cnt++;
2456 u64_stats_update_end(&ring->syncp);
2458 ring->pull_len = eth_get_headlen(va, HNS3_RX_HEAD_SIZE);
2459 __skb_put(skb, ring->pull_len);
2460 hns3_nic_reuse_page(skb, ring->frag_num++, ring, ring->pull_len,
2462 ring_ptr_move_fw(ring, next_to_clean);
2464 return HNS3_NEED_ADD_FRAG;
2467 static int hns3_add_frag(struct hns3_enet_ring *ring, struct hns3_desc *desc,
2468 struct sk_buff **out_skb, bool pending)
2470 struct sk_buff *skb = *out_skb;
2471 struct sk_buff *head_skb = *out_skb;
2472 struct sk_buff *new_skb;
2473 struct hns3_desc_cb *desc_cb;
2474 struct hns3_desc *pre_desc;
2478 /* if there is pending bd, the SW param next_to_clean has moved
2479 * to next and the next is NULL
2482 pre_bd = (ring->next_to_clean - 1 + ring->desc_num) %
2484 pre_desc = &ring->desc[pre_bd];
2485 bd_base_info = le32_to_cpu(pre_desc->rx.bd_base_info);
2487 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2490 while (!hnae3_get_bit(bd_base_info, HNS3_RXD_FE_B)) {
2491 desc = &ring->desc[ring->next_to_clean];
2492 desc_cb = &ring->desc_cb[ring->next_to_clean];
2493 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2494 if (!hnae3_get_bit(bd_base_info, HNS3_RXD_VLD_B))
2497 if (unlikely(ring->frag_num >= MAX_SKB_FRAGS)) {
2498 new_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2500 if (unlikely(!new_skb)) {
2501 netdev_err(ring->tqp->handle->kinfo.netdev,
2502 "alloc rx skb frag fail\n");
2507 if (ring->tail_skb) {
2508 ring->tail_skb->next = new_skb;
2509 ring->tail_skb = new_skb;
2511 skb_shinfo(skb)->frag_list = new_skb;
2512 ring->tail_skb = new_skb;
2516 if (ring->tail_skb) {
2517 head_skb->truesize += hnae3_buf_size(ring);
2518 head_skb->data_len += le16_to_cpu(desc->rx.size);
2519 head_skb->len += le16_to_cpu(desc->rx.size);
2520 skb = ring->tail_skb;
2523 hns3_nic_reuse_page(skb, ring->frag_num++, ring, 0, desc_cb);
2524 ring_ptr_move_fw(ring, next_to_clean);
2525 ring->pending_buf++;
2531 static void hns3_set_gro_param(struct sk_buff *skb, u32 l234info,
2537 gro_count = hnae3_get_field(l234info, HNS3_RXD_GRO_COUNT_M,
2538 HNS3_RXD_GRO_COUNT_S);
2539 /* if there is no HW GRO, do not set gro params */
2543 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
2544 * to skb_shinfo(skb)->gso_segs
2546 NAPI_GRO_CB(skb)->count = gro_count;
2548 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2550 if (l3_type == HNS3_L3_TYPE_IPV4)
2551 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
2552 else if (l3_type == HNS3_L3_TYPE_IPV6)
2553 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
2557 skb_shinfo(skb)->gso_size = hnae3_get_field(bd_base_info,
2558 HNS3_RXD_GRO_SIZE_M,
2559 HNS3_RXD_GRO_SIZE_S);
2560 if (skb_shinfo(skb)->gso_size)
2561 tcp_gro_complete(skb);
2564 static void hns3_set_rx_skb_rss_type(struct hns3_enet_ring *ring,
2565 struct sk_buff *skb)
2567 struct hnae3_handle *handle = ring->tqp->handle;
2568 enum pkt_hash_types rss_type;
2569 struct hns3_desc *desc;
2572 /* When driver handle the rss type, ring->next_to_clean indicates the
2573 * first descriptor of next packet, need -1 here.
2575 last_bd = (ring->next_to_clean - 1 + ring->desc_num) % ring->desc_num;
2576 desc = &ring->desc[last_bd];
2578 if (le32_to_cpu(desc->rx.rss_hash))
2579 rss_type = handle->kinfo.rss_type;
2581 rss_type = PKT_HASH_TYPE_NONE;
2583 skb_set_hash(skb, le32_to_cpu(desc->rx.rss_hash), rss_type);
2586 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2587 struct sk_buff **out_skb)
2589 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2590 enum hns3_pkt_l2t_type l2_frame_type;
2591 struct sk_buff *skb = ring->skb;
2592 struct hns3_desc_cb *desc_cb;
2593 struct hns3_desc *desc;
2599 desc = &ring->desc[ring->next_to_clean];
2600 desc_cb = &ring->desc_cb[ring->next_to_clean];
2604 length = le16_to_cpu(desc->rx.size);
2605 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2607 /* Check valid BD */
2608 if (unlikely(!hnae3_get_bit(bd_base_info, HNS3_RXD_VLD_B)))
2612 ring->va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2614 /* Prefetch first cache line of first page
2615 * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2616 * line size is 64B so need to prefetch twice to make it 128B. But in
2617 * actual we can have greater size of caches with 128B Level 1 cache
2618 * lines. In such a case, single fetch would suffice to cache in the
2619 * relevant part of the header.
2622 #if L1_CACHE_BYTES < 128
2623 prefetch(ring->va + L1_CACHE_BYTES);
2627 ret = hns3_alloc_skb(ring, length, ring->va);
2628 *out_skb = skb = ring->skb;
2630 if (ret < 0) /* alloc buffer fail */
2632 if (ret > 0) { /* need add frag */
2633 ret = hns3_add_frag(ring, desc, &skb, false);
2637 /* As the head data may be changed when GRO enable, copy
2638 * the head data in after other data rx completed
2640 memcpy(skb->data, ring->va,
2641 ALIGN(ring->pull_len, sizeof(long)));
2644 ret = hns3_add_frag(ring, desc, &skb, true);
2648 /* As the head data may be changed when GRO enable, copy
2649 * the head data in after other data rx completed
2651 memcpy(skb->data, ring->va,
2652 ALIGN(ring->pull_len, sizeof(long)));
2655 l234info = le32_to_cpu(desc->rx.l234_info);
2656 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2658 /* Based on hw strategy, the tag offloaded will be stored at
2659 * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2660 * in one layer tag case.
2662 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2665 if (hns3_parse_vlan_tag(ring, desc, l234info, &vlan_tag))
2666 __vlan_hwaccel_put_tag(skb,
2671 if (unlikely(!hnae3_get_bit(bd_base_info, HNS3_RXD_VLD_B))) {
2672 u64_stats_update_begin(&ring->syncp);
2673 ring->stats.non_vld_descs++;
2674 u64_stats_update_end(&ring->syncp);
2676 dev_kfree_skb_any(skb);
2680 if (unlikely((!desc->rx.pkt_len) ||
2681 hnae3_get_bit(l234info, HNS3_RXD_TRUNCAT_B))) {
2682 u64_stats_update_begin(&ring->syncp);
2683 ring->stats.err_pkt_len++;
2684 u64_stats_update_end(&ring->syncp);
2686 dev_kfree_skb_any(skb);
2690 if (unlikely(hnae3_get_bit(l234info, HNS3_RXD_L2E_B))) {
2691 u64_stats_update_begin(&ring->syncp);
2692 ring->stats.l2_err++;
2693 u64_stats_update_end(&ring->syncp);
2695 dev_kfree_skb_any(skb);
2699 l2_frame_type = hnae3_get_field(l234info, HNS3_RXD_DMAC_M,
2701 u64_stats_update_begin(&ring->syncp);
2702 if (l2_frame_type == HNS3_L2_TYPE_MULTICAST)
2703 ring->stats.rx_multicast++;
2705 ring->stats.rx_pkts++;
2706 ring->stats.rx_bytes += skb->len;
2707 u64_stats_update_end(&ring->syncp);
2709 ring->tqp_vector->rx_group.total_bytes += skb->len;
2711 /* This is needed in order to enable forwarding support */
2712 hns3_set_gro_param(skb, l234info, bd_base_info);
2714 hns3_rx_checksum(ring, skb, desc);
2716 hns3_set_rx_skb_rss_type(ring, skb);
2721 int hns3_clean_rx_ring(
2722 struct hns3_enet_ring *ring, int budget,
2723 void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
2725 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2726 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2727 int recv_pkts, recv_bds, clean_count, err;
2728 int unused_count = hns3_desc_unused(ring) - ring->pending_buf;
2729 struct sk_buff *skb = ring->skb;
2732 num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2733 rmb(); /* Make sure num taken effect before the other data is touched */
2735 recv_pkts = 0, recv_bds = 0, clean_count = 0;
2736 num -= unused_count;
2738 while (recv_pkts < budget && recv_bds < num) {
2739 /* Reuse or realloc buffers */
2740 if (clean_count + unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2741 hns3_nic_alloc_rx_buffers(ring,
2742 clean_count + unused_count);
2744 unused_count = hns3_desc_unused(ring) -
2749 err = hns3_handle_rx_bd(ring, &skb);
2750 if (unlikely(!skb)) /* This fault cannot be repaired */
2753 if (err == -ENXIO) { /* Do not get FE for the packet */
2755 } else if (unlikely(err)) { /* Do jump the err */
2756 recv_bds += ring->pending_buf;
2757 clean_count += ring->pending_buf;
2759 ring->pending_buf = 0;
2763 /* Do update ip stack process */
2764 skb->protocol = eth_type_trans(skb, netdev);
2766 recv_bds += ring->pending_buf;
2767 clean_count += ring->pending_buf;
2769 ring->pending_buf = 0;
2775 /* Make all data has been write before submit */
2776 if (clean_count + unused_count > 0)
2777 hns3_nic_alloc_rx_buffers(ring,
2778 clean_count + unused_count);
2783 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
2785 struct hns3_enet_tqp_vector *tqp_vector =
2786 ring_group->ring->tqp_vector;
2787 enum hns3_flow_level_range new_flow_level;
2788 int packets_per_msecs;
2789 int bytes_per_msecs;
2793 if (!tqp_vector->last_jiffies)
2796 if (ring_group->total_packets == 0) {
2797 ring_group->coal.int_gl = HNS3_INT_GL_50K;
2798 ring_group->coal.flow_level = HNS3_FLOW_LOW;
2802 /* Simple throttlerate management
2803 * 0-10MB/s lower (50000 ints/s)
2804 * 10-20MB/s middle (20000 ints/s)
2805 * 20-1249MB/s high (18000 ints/s)
2806 * > 40000pps ultra (8000 ints/s)
2808 new_flow_level = ring_group->coal.flow_level;
2809 new_int_gl = ring_group->coal.int_gl;
2811 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
2813 if (!time_passed_ms)
2816 do_div(ring_group->total_packets, time_passed_ms);
2817 packets_per_msecs = ring_group->total_packets;
2819 do_div(ring_group->total_bytes, time_passed_ms);
2820 bytes_per_msecs = ring_group->total_bytes;
2822 #define HNS3_RX_LOW_BYTE_RATE 10000
2823 #define HNS3_RX_MID_BYTE_RATE 20000
2825 switch (new_flow_level) {
2827 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
2828 new_flow_level = HNS3_FLOW_MID;
2831 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
2832 new_flow_level = HNS3_FLOW_HIGH;
2833 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
2834 new_flow_level = HNS3_FLOW_LOW;
2836 case HNS3_FLOW_HIGH:
2837 case HNS3_FLOW_ULTRA:
2839 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
2840 new_flow_level = HNS3_FLOW_MID;
2844 #define HNS3_RX_ULTRA_PACKET_RATE 40
2846 if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
2847 &tqp_vector->rx_group == ring_group)
2848 new_flow_level = HNS3_FLOW_ULTRA;
2850 switch (new_flow_level) {
2852 new_int_gl = HNS3_INT_GL_50K;
2855 new_int_gl = HNS3_INT_GL_20K;
2857 case HNS3_FLOW_HIGH:
2858 new_int_gl = HNS3_INT_GL_18K;
2860 case HNS3_FLOW_ULTRA:
2861 new_int_gl = HNS3_INT_GL_8K;
2867 ring_group->total_bytes = 0;
2868 ring_group->total_packets = 0;
2869 ring_group->coal.flow_level = new_flow_level;
2870 if (new_int_gl != ring_group->coal.int_gl) {
2871 ring_group->coal.int_gl = new_int_gl;
2877 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
2879 struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
2880 struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
2881 bool rx_update, tx_update;
2883 /* update param every 1000ms */
2884 if (time_before(jiffies,
2885 tqp_vector->last_jiffies + msecs_to_jiffies(1000)))
2888 if (rx_group->coal.gl_adapt_enable) {
2889 rx_update = hns3_get_new_int_gl(rx_group);
2891 hns3_set_vector_coalesce_rx_gl(tqp_vector,
2892 rx_group->coal.int_gl);
2895 if (tx_group->coal.gl_adapt_enable) {
2896 tx_update = hns3_get_new_int_gl(tx_group);
2898 hns3_set_vector_coalesce_tx_gl(tqp_vector,
2899 tx_group->coal.int_gl);
2902 tqp_vector->last_jiffies = jiffies;
2905 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
2907 struct hns3_nic_priv *priv = netdev_priv(napi->dev);
2908 struct hns3_enet_ring *ring;
2909 int rx_pkt_total = 0;
2911 struct hns3_enet_tqp_vector *tqp_vector =
2912 container_of(napi, struct hns3_enet_tqp_vector, napi);
2913 bool clean_complete = true;
2916 if (unlikely(test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
2917 napi_complete(napi);
2921 /* Since the actual Tx work is minimal, we can give the Tx a larger
2922 * budget and be more aggressive about cleaning up the Tx descriptors.
2924 hns3_for_each_ring(ring, tqp_vector->tx_group)
2925 hns3_clean_tx_ring(ring);
2927 /* make sure rx ring budget not smaller than 1 */
2928 rx_budget = max(budget / tqp_vector->num_tqps, 1);
2930 hns3_for_each_ring(ring, tqp_vector->rx_group) {
2931 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
2934 if (rx_cleaned >= rx_budget)
2935 clean_complete = false;
2937 rx_pkt_total += rx_cleaned;
2940 tqp_vector->rx_group.total_packets += rx_pkt_total;
2942 if (!clean_complete)
2945 if (napi_complete(napi) &&
2946 likely(!test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
2947 hns3_update_new_int_gl(tqp_vector);
2948 hns3_mask_vector_irq(tqp_vector, 1);
2951 return rx_pkt_total;
2954 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2955 struct hnae3_ring_chain_node *head)
2957 struct pci_dev *pdev = tqp_vector->handle->pdev;
2958 struct hnae3_ring_chain_node *cur_chain = head;
2959 struct hnae3_ring_chain_node *chain;
2960 struct hns3_enet_ring *tx_ring;
2961 struct hns3_enet_ring *rx_ring;
2963 tx_ring = tqp_vector->tx_group.ring;
2965 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
2966 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2967 HNAE3_RING_TYPE_TX);
2968 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2969 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
2971 cur_chain->next = NULL;
2973 while (tx_ring->next) {
2974 tx_ring = tx_ring->next;
2976 chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
2979 goto err_free_chain;
2981 cur_chain->next = chain;
2982 chain->tqp_index = tx_ring->tqp->tqp_index;
2983 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2984 HNAE3_RING_TYPE_TX);
2985 hnae3_set_field(chain->int_gl_idx,
2986 HNAE3_RING_GL_IDX_M,
2987 HNAE3_RING_GL_IDX_S,
2994 rx_ring = tqp_vector->rx_group.ring;
2995 if (!tx_ring && rx_ring) {
2996 cur_chain->next = NULL;
2997 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
2998 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2999 HNAE3_RING_TYPE_RX);
3000 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3001 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3003 rx_ring = rx_ring->next;
3007 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
3009 goto err_free_chain;
3011 cur_chain->next = chain;
3012 chain->tqp_index = rx_ring->tqp->tqp_index;
3013 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3014 HNAE3_RING_TYPE_RX);
3015 hnae3_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3016 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3020 rx_ring = rx_ring->next;
3026 cur_chain = head->next;
3028 chain = cur_chain->next;
3029 devm_kfree(&pdev->dev, cur_chain);
3037 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3038 struct hnae3_ring_chain_node *head)
3040 struct pci_dev *pdev = tqp_vector->handle->pdev;
3041 struct hnae3_ring_chain_node *chain_tmp, *chain;
3046 chain_tmp = chain->next;
3047 devm_kfree(&pdev->dev, chain);
3052 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
3053 struct hns3_enet_ring *ring)
3055 ring->next = group->ring;
3061 static void hns3_nic_set_cpumask(struct hns3_nic_priv *priv)
3063 struct pci_dev *pdev = priv->ae_handle->pdev;
3064 struct hns3_enet_tqp_vector *tqp_vector;
3065 int num_vectors = priv->vector_num;
3069 numa_node = dev_to_node(&pdev->dev);
3071 for (vector_i = 0; vector_i < num_vectors; vector_i++) {
3072 tqp_vector = &priv->tqp_vector[vector_i];
3073 cpumask_set_cpu(cpumask_local_spread(vector_i, numa_node),
3074 &tqp_vector->affinity_mask);
3078 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
3080 struct hnae3_ring_chain_node vector_ring_chain;
3081 struct hnae3_handle *h = priv->ae_handle;
3082 struct hns3_enet_tqp_vector *tqp_vector;
3086 hns3_nic_set_cpumask(priv);
3088 for (i = 0; i < priv->vector_num; i++) {
3089 tqp_vector = &priv->tqp_vector[i];
3090 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
3091 tqp_vector->num_tqps = 0;
3094 for (i = 0; i < h->kinfo.num_tqps; i++) {
3095 u16 vector_i = i % priv->vector_num;
3096 u16 tqp_num = h->kinfo.num_tqps;
3098 tqp_vector = &priv->tqp_vector[vector_i];
3100 hns3_add_ring_to_group(&tqp_vector->tx_group,
3101 priv->ring_data[i].ring);
3103 hns3_add_ring_to_group(&tqp_vector->rx_group,
3104 priv->ring_data[i + tqp_num].ring);
3106 priv->ring_data[i].ring->tqp_vector = tqp_vector;
3107 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
3108 tqp_vector->num_tqps++;
3111 for (i = 0; i < priv->vector_num; i++) {
3112 tqp_vector = &priv->tqp_vector[i];
3114 tqp_vector->rx_group.total_bytes = 0;
3115 tqp_vector->rx_group.total_packets = 0;
3116 tqp_vector->tx_group.total_bytes = 0;
3117 tqp_vector->tx_group.total_packets = 0;
3118 tqp_vector->handle = h;
3120 ret = hns3_get_vector_ring_chain(tqp_vector,
3121 &vector_ring_chain);
3125 ret = h->ae_algo->ops->map_ring_to_vector(h,
3126 tqp_vector->vector_irq, &vector_ring_chain);
3128 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3133 netif_napi_add(priv->netdev, &tqp_vector->napi,
3134 hns3_nic_common_poll, NAPI_POLL_WEIGHT);
3141 netif_napi_del(&priv->tqp_vector[i].napi);
3146 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
3148 #define HNS3_VECTOR_PF_MAX_NUM 64
3150 struct hnae3_handle *h = priv->ae_handle;
3151 struct hns3_enet_tqp_vector *tqp_vector;
3152 struct hnae3_vector_info *vector;
3153 struct pci_dev *pdev = h->pdev;
3154 u16 tqp_num = h->kinfo.num_tqps;
3159 /* RSS size, cpu online and vector_num should be the same */
3160 /* Should consider 2p/4p later */
3161 vector_num = min_t(u16, num_online_cpus(), tqp_num);
3162 vector_num = min_t(u16, vector_num, HNS3_VECTOR_PF_MAX_NUM);
3164 vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
3169 vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
3171 priv->vector_num = vector_num;
3172 priv->tqp_vector = (struct hns3_enet_tqp_vector *)
3173 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
3175 if (!priv->tqp_vector) {
3180 for (i = 0; i < priv->vector_num; i++) {
3181 tqp_vector = &priv->tqp_vector[i];
3182 tqp_vector->idx = i;
3183 tqp_vector->mask_addr = vector[i].io_addr;
3184 tqp_vector->vector_irq = vector[i].vector;
3185 hns3_vector_gl_rl_init(tqp_vector, priv);
3189 devm_kfree(&pdev->dev, vector);
3193 static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
3199 static void hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
3201 struct hnae3_ring_chain_node vector_ring_chain;
3202 struct hnae3_handle *h = priv->ae_handle;
3203 struct hns3_enet_tqp_vector *tqp_vector;
3206 for (i = 0; i < priv->vector_num; i++) {
3207 tqp_vector = &priv->tqp_vector[i];
3209 if (!tqp_vector->rx_group.ring && !tqp_vector->tx_group.ring)
3212 hns3_get_vector_ring_chain(tqp_vector, &vector_ring_chain);
3214 h->ae_algo->ops->unmap_ring_from_vector(h,
3215 tqp_vector->vector_irq, &vector_ring_chain);
3217 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3219 if (tqp_vector->irq_init_flag == HNS3_VECTOR_INITED) {
3220 irq_set_affinity_notifier(tqp_vector->vector_irq,
3222 irq_set_affinity_hint(tqp_vector->vector_irq, NULL);
3223 free_irq(tqp_vector->vector_irq, tqp_vector);
3224 tqp_vector->irq_init_flag = HNS3_VECTOR_NOT_INITED;
3227 hns3_clear_ring_group(&tqp_vector->rx_group);
3228 hns3_clear_ring_group(&tqp_vector->tx_group);
3229 netif_napi_del(&priv->tqp_vector[i].napi);
3233 static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
3235 struct hnae3_handle *h = priv->ae_handle;
3236 struct pci_dev *pdev = h->pdev;
3239 for (i = 0; i < priv->vector_num; i++) {
3240 struct hns3_enet_tqp_vector *tqp_vector;
3242 tqp_vector = &priv->tqp_vector[i];
3243 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
3248 devm_kfree(&pdev->dev, priv->tqp_vector);
3252 static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
3255 struct hns3_nic_ring_data *ring_data = priv->ring_data;
3256 int queue_num = priv->ae_handle->kinfo.num_tqps;
3257 int desc_num = priv->ae_handle->kinfo.num_desc;
3258 struct pci_dev *pdev = priv->ae_handle->pdev;
3259 struct hns3_enet_ring *ring;
3261 ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
3265 if (ring_type == HNAE3_RING_TYPE_TX) {
3266 ring_data[q->tqp_index].ring = ring;
3267 ring_data[q->tqp_index].queue_index = q->tqp_index;
3268 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
3270 ring_data[q->tqp_index + queue_num].ring = ring;
3271 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
3272 ring->io_base = q->io_base;
3275 hnae3_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
3279 ring->desc_cb = NULL;
3280 ring->dev = priv->dev;
3281 ring->desc_dma_addr = 0;
3282 ring->buf_size = q->buf_size;
3283 ring->desc_num = desc_num;
3284 ring->next_to_use = 0;
3285 ring->next_to_clean = 0;
3290 static int hns3_queue_to_ring(struct hnae3_queue *tqp,
3291 struct hns3_nic_priv *priv)
3295 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
3299 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
3301 devm_kfree(priv->dev, priv->ring_data[tqp->tqp_index].ring);
3308 static int hns3_get_ring_config(struct hns3_nic_priv *priv)
3310 struct hnae3_handle *h = priv->ae_handle;
3311 struct pci_dev *pdev = h->pdev;
3314 priv->ring_data = devm_kzalloc(&pdev->dev,
3315 array3_size(h->kinfo.num_tqps,
3316 sizeof(*priv->ring_data),
3319 if (!priv->ring_data)
3322 for (i = 0; i < h->kinfo.num_tqps; i++) {
3323 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
3331 devm_kfree(priv->dev, priv->ring_data[i].ring);
3332 devm_kfree(priv->dev,
3333 priv->ring_data[i + h->kinfo.num_tqps].ring);
3336 devm_kfree(&pdev->dev, priv->ring_data);
3340 static void hns3_put_ring_config(struct hns3_nic_priv *priv)
3342 struct hnae3_handle *h = priv->ae_handle;
3345 for (i = 0; i < h->kinfo.num_tqps; i++) {
3346 devm_kfree(priv->dev, priv->ring_data[i].ring);
3347 devm_kfree(priv->dev,
3348 priv->ring_data[i + h->kinfo.num_tqps].ring);
3350 devm_kfree(priv->dev, priv->ring_data);
3353 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
3357 if (ring->desc_num <= 0 || ring->buf_size <= 0)
3360 ring->desc_cb = kcalloc(ring->desc_num, sizeof(ring->desc_cb[0]),
3362 if (!ring->desc_cb) {
3367 ret = hns3_alloc_desc(ring);
3369 goto out_with_desc_cb;
3371 if (!HNAE3_IS_TX_RING(ring)) {
3372 ret = hns3_alloc_ring_buffers(ring);
3380 hns3_free_desc(ring);
3382 kfree(ring->desc_cb);
3383 ring->desc_cb = NULL;
3388 static void hns3_fini_ring(struct hns3_enet_ring *ring)
3390 hns3_free_desc(ring);
3391 kfree(ring->desc_cb);
3392 ring->desc_cb = NULL;
3393 ring->next_to_clean = 0;
3394 ring->next_to_use = 0;
3395 ring->pending_buf = 0;
3397 dev_kfree_skb_any(ring->skb);
3402 static int hns3_buf_size2type(u32 buf_size)
3408 bd_size_type = HNS3_BD_SIZE_512_TYPE;
3411 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
3414 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3417 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
3420 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3423 return bd_size_type;
3426 static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
3428 dma_addr_t dma = ring->desc_dma_addr;
3429 struct hnae3_queue *q = ring->tqp;
3431 if (!HNAE3_IS_TX_RING(ring)) {
3432 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG,
3434 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
3435 (u32)((dma >> 31) >> 1));
3437 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
3438 hns3_buf_size2type(ring->buf_size));
3439 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
3440 ring->desc_num / 8 - 1);
3443 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
3445 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
3446 (u32)((dma >> 31) >> 1));
3448 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3449 ring->desc_num / 8 - 1);
3453 static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
3455 struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3458 for (i = 0; i < HNAE3_MAX_TC; i++) {
3459 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3462 if (!tc_info->enable)
3465 for (j = 0; j < tc_info->tqp_count; j++) {
3466 struct hnae3_queue *q;
3468 q = priv->ring_data[tc_info->tqp_offset + j].ring->tqp;
3469 hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
3475 int hns3_init_all_ring(struct hns3_nic_priv *priv)
3477 struct hnae3_handle *h = priv->ae_handle;
3478 int ring_num = h->kinfo.num_tqps * 2;
3482 for (i = 0; i < ring_num; i++) {
3483 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
3486 "Alloc ring memory fail! ret=%d\n", ret);
3487 goto out_when_alloc_ring_memory;
3490 u64_stats_init(&priv->ring_data[i].ring->syncp);
3495 out_when_alloc_ring_memory:
3496 for (j = i - 1; j >= 0; j--)
3497 hns3_fini_ring(priv->ring_data[j].ring);
3502 int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
3504 struct hnae3_handle *h = priv->ae_handle;
3507 for (i = 0; i < h->kinfo.num_tqps; i++) {
3508 hns3_fini_ring(priv->ring_data[i].ring);
3509 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
3514 /* Set mac addr if it is configured. or leave it to the AE driver */
3515 static int hns3_init_mac_addr(struct net_device *netdev, bool init)
3517 struct hns3_nic_priv *priv = netdev_priv(netdev);
3518 struct hnae3_handle *h = priv->ae_handle;
3519 u8 mac_addr_temp[ETH_ALEN];
3522 if (h->ae_algo->ops->get_mac_addr && init) {
3523 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3524 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3527 /* Check if the MAC address is valid, if not get a random one */
3528 if (!is_valid_ether_addr(netdev->dev_addr)) {
3529 eth_hw_addr_random(netdev);
3530 dev_warn(priv->dev, "using random MAC address %pM\n",
3534 if (h->ae_algo->ops->set_mac_addr)
3535 ret = h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
3540 static int hns3_init_phy(struct net_device *netdev)
3542 struct hnae3_handle *h = hns3_get_handle(netdev);
3545 if (h->ae_algo->ops->mac_connect_phy)
3546 ret = h->ae_algo->ops->mac_connect_phy(h);
3551 static void hns3_uninit_phy(struct net_device *netdev)
3553 struct hnae3_handle *h = hns3_get_handle(netdev);
3555 if (h->ae_algo->ops->mac_disconnect_phy)
3556 h->ae_algo->ops->mac_disconnect_phy(h);
3559 static int hns3_restore_fd_rules(struct net_device *netdev)
3561 struct hnae3_handle *h = hns3_get_handle(netdev);
3564 if (h->ae_algo->ops->restore_fd_rules)
3565 ret = h->ae_algo->ops->restore_fd_rules(h);
3570 static void hns3_del_all_fd_rules(struct net_device *netdev, bool clear_list)
3572 struct hnae3_handle *h = hns3_get_handle(netdev);
3574 if (h->ae_algo->ops->del_all_fd_entries)
3575 h->ae_algo->ops->del_all_fd_entries(h, clear_list);
3578 static void hns3_nic_set_priv_ops(struct net_device *netdev)
3580 struct hns3_nic_priv *priv = netdev_priv(netdev);
3582 priv->ops.fill_desc = hns3_fill_desc;
3583 if ((netdev->features & NETIF_F_TSO) ||
3584 (netdev->features & NETIF_F_TSO6))
3585 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
3587 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
3590 static int hns3_client_start(struct hnae3_handle *handle)
3592 if (!handle->ae_algo->ops->client_start)
3595 return handle->ae_algo->ops->client_start(handle);
3598 static void hns3_client_stop(struct hnae3_handle *handle)
3600 if (!handle->ae_algo->ops->client_stop)
3603 handle->ae_algo->ops->client_stop(handle);
3606 static int hns3_client_init(struct hnae3_handle *handle)
3608 struct pci_dev *pdev = handle->pdev;
3609 u16 alloc_tqps, max_rss_size;
3610 struct hns3_nic_priv *priv;
3611 struct net_device *netdev;
3614 handle->ae_algo->ops->get_tqps_and_rss_info(handle, &alloc_tqps,
3616 netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);
3620 priv = netdev_priv(netdev);
3621 priv->dev = &pdev->dev;
3622 priv->netdev = netdev;
3623 priv->ae_handle = handle;
3624 priv->tx_timeout_count = 0;
3625 set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
3627 handle->kinfo.netdev = netdev;
3628 handle->priv = (void *)priv;
3630 hns3_init_mac_addr(netdev, true);
3632 hns3_set_default_feature(netdev);
3634 netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3635 netdev->priv_flags |= IFF_UNICAST_FLT;
3636 netdev->netdev_ops = &hns3_nic_netdev_ops;
3637 SET_NETDEV_DEV(netdev, &pdev->dev);
3638 hns3_ethtool_set_ops(netdev);
3639 hns3_nic_set_priv_ops(netdev);
3641 /* Carrier off reporting is important to ethtool even BEFORE open */
3642 netif_carrier_off(netdev);
3644 ret = hns3_get_ring_config(priv);
3647 goto out_get_ring_cfg;
3650 ret = hns3_nic_alloc_vector_data(priv);
3653 goto out_alloc_vector_data;
3656 ret = hns3_nic_init_vector_data(priv);
3659 goto out_init_vector_data;
3662 ret = hns3_init_all_ring(priv);
3665 goto out_init_ring_data;
3668 ret = hns3_init_phy(netdev);
3672 ret = register_netdev(netdev);
3674 dev_err(priv->dev, "probe register netdev fail!\n");
3675 goto out_reg_netdev_fail;
3678 ret = hns3_client_start(handle);
3680 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
3681 goto out_reg_netdev_fail;
3684 hns3_dcbnl_setup(handle);
3686 hns3_dbg_init(handle);
3688 /* MTU range: (ETH_MIN_MTU(kernel default) - 9702) */
3689 netdev->max_mtu = HNS3_MAX_MTU;
3691 set_bit(HNS3_NIC_STATE_INITED, &priv->state);
3695 out_reg_netdev_fail:
3696 hns3_uninit_phy(netdev);
3698 hns3_uninit_all_ring(priv);
3700 hns3_nic_uninit_vector_data(priv);
3701 out_init_vector_data:
3702 hns3_nic_dealloc_vector_data(priv);
3703 out_alloc_vector_data:
3704 priv->ring_data = NULL;
3706 priv->ae_handle = NULL;
3707 free_netdev(netdev);
3711 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
3713 struct net_device *netdev = handle->kinfo.netdev;
3714 struct hns3_nic_priv *priv = netdev_priv(netdev);
3717 hns3_client_stop(handle);
3719 hns3_remove_hw_addr(netdev);
3721 if (netdev->reg_state != NETREG_UNINITIALIZED)
3722 unregister_netdev(netdev);
3724 if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
3725 netdev_warn(netdev, "already uninitialized\n");
3726 goto out_netdev_free;
3729 hns3_del_all_fd_rules(netdev, true);
3731 hns3_force_clear_all_rx_ring(handle);
3733 hns3_uninit_phy(netdev);
3735 hns3_nic_uninit_vector_data(priv);
3737 ret = hns3_nic_dealloc_vector_data(priv);
3739 netdev_err(netdev, "dealloc vector error\n");
3741 ret = hns3_uninit_all_ring(priv);
3743 netdev_err(netdev, "uninit ring error\n");
3745 hns3_put_ring_config(priv);
3747 hns3_dbg_uninit(handle);
3749 priv->ring_data = NULL;
3752 free_netdev(netdev);
3755 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
3757 struct net_device *netdev = handle->kinfo.netdev;
3763 netif_carrier_on(netdev);
3764 netif_tx_wake_all_queues(netdev);
3765 netdev_info(netdev, "link up\n");
3767 netif_carrier_off(netdev);
3768 netif_tx_stop_all_queues(netdev);
3769 netdev_info(netdev, "link down\n");
3773 static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
3775 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3776 struct net_device *ndev = kinfo->netdev;
3778 if (tc > HNAE3_MAX_TC)
3784 return hns3_nic_set_real_num_queue(ndev);
3787 static int hns3_recover_hw_addr(struct net_device *ndev)
3789 struct netdev_hw_addr_list *list;
3790 struct netdev_hw_addr *ha, *tmp;
3793 /* go through and sync uc_addr entries to the device */
3795 list_for_each_entry_safe(ha, tmp, &list->list, list) {
3796 ret = hns3_nic_uc_sync(ndev, ha->addr);
3801 /* go through and sync mc_addr entries to the device */
3803 list_for_each_entry_safe(ha, tmp, &list->list, list) {
3804 ret = hns3_nic_mc_sync(ndev, ha->addr);
3812 static void hns3_remove_hw_addr(struct net_device *netdev)
3814 struct netdev_hw_addr_list *list;
3815 struct netdev_hw_addr *ha, *tmp;
3817 hns3_nic_uc_unsync(netdev, netdev->dev_addr);
3819 /* go through and unsync uc_addr entries to the device */
3821 list_for_each_entry_safe(ha, tmp, &list->list, list)
3822 hns3_nic_uc_unsync(netdev, ha->addr);
3824 /* go through and unsync mc_addr entries to the device */
3826 list_for_each_entry_safe(ha, tmp, &list->list, list)
3827 if (ha->refcount > 1)
3828 hns3_nic_mc_unsync(netdev, ha->addr);
3831 static void hns3_clear_tx_ring(struct hns3_enet_ring *ring)
3833 while (ring->next_to_clean != ring->next_to_use) {
3834 ring->desc[ring->next_to_clean].tx.bdtp_fe_sc_vld_ra_ri = 0;
3835 hns3_free_buffer_detach(ring, ring->next_to_clean);
3836 ring_ptr_move_fw(ring, next_to_clean);
3840 static int hns3_clear_rx_ring(struct hns3_enet_ring *ring)
3842 struct hns3_desc_cb res_cbs;
3845 while (ring->next_to_use != ring->next_to_clean) {
3846 /* When a buffer is not reused, it's memory has been
3847 * freed in hns3_handle_rx_bd or will be freed by
3848 * stack, so we need to replace the buffer here.
3850 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
3851 ret = hns3_reserve_buffer_map(ring, &res_cbs);
3853 u64_stats_update_begin(&ring->syncp);
3854 ring->stats.sw_err_cnt++;
3855 u64_stats_update_end(&ring->syncp);
3856 /* if alloc new buffer fail, exit directly
3857 * and reclear in up flow.
3859 netdev_warn(ring->tqp->handle->kinfo.netdev,
3860 "reserve buffer map failed, ret = %d\n",
3864 hns3_replace_buffer(ring, ring->next_to_use,
3867 ring_ptr_move_fw(ring, next_to_use);
3873 static void hns3_force_clear_rx_ring(struct hns3_enet_ring *ring)
3875 while (ring->next_to_use != ring->next_to_clean) {
3876 /* When a buffer is not reused, it's memory has been
3877 * freed in hns3_handle_rx_bd or will be freed by
3878 * stack, so only need to unmap the buffer here.
3880 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
3881 hns3_unmap_buffer(ring,
3882 &ring->desc_cb[ring->next_to_use]);
3883 ring->desc_cb[ring->next_to_use].dma = 0;
3886 ring_ptr_move_fw(ring, next_to_use);
3890 static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h)
3892 struct net_device *ndev = h->kinfo.netdev;
3893 struct hns3_nic_priv *priv = netdev_priv(ndev);
3894 struct hns3_enet_ring *ring;
3897 for (i = 0; i < h->kinfo.num_tqps; i++) {
3898 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
3899 hns3_force_clear_rx_ring(ring);
3903 static void hns3_clear_all_ring(struct hnae3_handle *h)
3905 struct net_device *ndev = h->kinfo.netdev;
3906 struct hns3_nic_priv *priv = netdev_priv(ndev);
3909 for (i = 0; i < h->kinfo.num_tqps; i++) {
3910 struct netdev_queue *dev_queue;
3911 struct hns3_enet_ring *ring;
3913 ring = priv->ring_data[i].ring;
3914 hns3_clear_tx_ring(ring);
3915 dev_queue = netdev_get_tx_queue(ndev,
3916 priv->ring_data[i].queue_index);
3917 netdev_tx_reset_queue(dev_queue);
3919 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
3920 /* Continue to clear other rings even if clearing some
3923 hns3_clear_rx_ring(ring);
3927 int hns3_nic_reset_all_ring(struct hnae3_handle *h)
3929 struct net_device *ndev = h->kinfo.netdev;
3930 struct hns3_nic_priv *priv = netdev_priv(ndev);
3931 struct hns3_enet_ring *rx_ring;
3935 for (i = 0; i < h->kinfo.num_tqps; i++) {
3936 ret = h->ae_algo->ops->reset_queue(h, i);
3940 hns3_init_ring_hw(priv->ring_data[i].ring);
3942 /* We need to clear tx ring here because self test will
3943 * use the ring and will not run down before up
3945 hns3_clear_tx_ring(priv->ring_data[i].ring);
3946 priv->ring_data[i].ring->next_to_clean = 0;
3947 priv->ring_data[i].ring->next_to_use = 0;
3949 rx_ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
3950 hns3_init_ring_hw(rx_ring);
3951 ret = hns3_clear_rx_ring(rx_ring);
3955 /* We can not know the hardware head and tail when this
3956 * function is called in reset flow, so we reuse all desc.
3958 for (j = 0; j < rx_ring->desc_num; j++)
3959 hns3_reuse_buffer(rx_ring, j);
3961 rx_ring->next_to_clean = 0;
3962 rx_ring->next_to_use = 0;
3965 hns3_init_tx_ring_tc(priv);
3970 static void hns3_store_coal(struct hns3_nic_priv *priv)
3972 /* ethtool only support setting and querying one coal
3973 * configuation for now, so save the vector 0' coal
3974 * configuation here in order to restore it.
3976 memcpy(&priv->tx_coal, &priv->tqp_vector[0].tx_group.coal,
3977 sizeof(struct hns3_enet_coalesce));
3978 memcpy(&priv->rx_coal, &priv->tqp_vector[0].rx_group.coal,
3979 sizeof(struct hns3_enet_coalesce));
3982 static void hns3_restore_coal(struct hns3_nic_priv *priv)
3984 u16 vector_num = priv->vector_num;
3987 for (i = 0; i < vector_num; i++) {
3988 memcpy(&priv->tqp_vector[i].tx_group.coal, &priv->tx_coal,
3989 sizeof(struct hns3_enet_coalesce));
3990 memcpy(&priv->tqp_vector[i].rx_group.coal, &priv->rx_coal,
3991 sizeof(struct hns3_enet_coalesce));
3995 static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
3997 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
3998 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3999 struct net_device *ndev = kinfo->netdev;
4000 struct hns3_nic_priv *priv = netdev_priv(ndev);
4002 if (test_and_set_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
4005 /* it is cumbersome for hardware to pick-and-choose entries for deletion
4006 * from table space. Hence, for function reset software intervention is
4007 * required to delete the entries
4009 if (hns3_dev_ongoing_func_reset(ae_dev)) {
4010 hns3_remove_hw_addr(ndev);
4011 hns3_del_all_fd_rules(ndev, false);
4014 if (!netif_running(ndev))
4017 return hns3_nic_net_stop(ndev);
4020 static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
4022 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4023 struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
4026 clear_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4028 if (netif_running(kinfo->netdev)) {
4029 ret = hns3_nic_net_open(kinfo->netdev);
4031 set_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4032 netdev_err(kinfo->netdev,
4033 "hns net up fail, ret=%d!\n", ret);
4041 static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
4043 struct net_device *netdev = handle->kinfo.netdev;
4044 struct hns3_nic_priv *priv = netdev_priv(netdev);
4047 /* Carrier off reporting is important to ethtool even BEFORE open */
4048 netif_carrier_off(netdev);
4050 ret = hns3_get_ring_config(priv);
4054 ret = hns3_nic_alloc_vector_data(priv);
4058 hns3_restore_coal(priv);
4060 ret = hns3_nic_init_vector_data(priv);
4062 goto err_dealloc_vector;
4064 ret = hns3_init_all_ring(priv);
4066 goto err_uninit_vector;
4068 set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4073 hns3_nic_uninit_vector_data(priv);
4074 priv->ring_data = NULL;
4076 hns3_nic_dealloc_vector_data(priv);
4078 hns3_put_ring_config(priv);
4079 priv->ring_data = NULL;
4084 static int hns3_reset_notify_restore_enet(struct hnae3_handle *handle)
4086 struct net_device *netdev = handle->kinfo.netdev;
4087 bool vlan_filter_enable;
4090 ret = hns3_init_mac_addr(netdev, false);
4094 ret = hns3_recover_hw_addr(netdev);
4098 ret = hns3_update_promisc_mode(netdev, handle->netdev_flags);
4102 vlan_filter_enable = netdev->flags & IFF_PROMISC ? false : true;
4103 hns3_enable_vlan_filter(netdev, vlan_filter_enable);
4105 /* Hardware table is only clear when pf resets */
4106 if (!(handle->flags & HNAE3_SUPPORT_VF)) {
4107 ret = hns3_restore_vlan(netdev);
4112 return hns3_restore_fd_rules(netdev);
4115 static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
4117 struct net_device *netdev = handle->kinfo.netdev;
4118 struct hns3_nic_priv *priv = netdev_priv(netdev);
4121 if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4122 netdev_warn(netdev, "already uninitialized\n");
4126 hns3_force_clear_all_rx_ring(handle);
4128 hns3_nic_uninit_vector_data(priv);
4130 hns3_store_coal(priv);
4132 ret = hns3_nic_dealloc_vector_data(priv);
4134 netdev_err(netdev, "dealloc vector error\n");
4136 ret = hns3_uninit_all_ring(priv);
4138 netdev_err(netdev, "uninit ring error\n");
4140 hns3_put_ring_config(priv);
4141 priv->ring_data = NULL;
4143 clear_bit(HNS3_NIC_STATE_INITED, &priv->state);
4148 static int hns3_reset_notify(struct hnae3_handle *handle,
4149 enum hnae3_reset_notify_type type)
4154 case HNAE3_UP_CLIENT:
4155 ret = hns3_reset_notify_up_enet(handle);
4157 case HNAE3_DOWN_CLIENT:
4158 ret = hns3_reset_notify_down_enet(handle);
4160 case HNAE3_INIT_CLIENT:
4161 ret = hns3_reset_notify_init_enet(handle);
4163 case HNAE3_UNINIT_CLIENT:
4164 ret = hns3_reset_notify_uninit_enet(handle);
4166 case HNAE3_RESTORE_CLIENT:
4167 ret = hns3_reset_notify_restore_enet(handle);
4176 int hns3_set_channels(struct net_device *netdev,
4177 struct ethtool_channels *ch)
4179 struct hnae3_handle *h = hns3_get_handle(netdev);
4180 struct hnae3_knic_private_info *kinfo = &h->kinfo;
4181 bool rxfh_configured = netif_is_rxfh_configured(netdev);
4182 u32 new_tqp_num = ch->combined_count;
4186 if (ch->rx_count || ch->tx_count)
4189 if (new_tqp_num > hns3_get_max_available_channels(h) ||
4191 dev_err(&netdev->dev,
4192 "Change tqps fail, the tqp range is from 1 to %d",
4193 hns3_get_max_available_channels(h));
4197 if (kinfo->rss_size == new_tqp_num)
4200 ret = hns3_reset_notify(h, HNAE3_DOWN_CLIENT);
4204 ret = hns3_reset_notify(h, HNAE3_UNINIT_CLIENT);
4208 org_tqp_num = h->kinfo.num_tqps;
4209 ret = h->ae_algo->ops->set_channels(h, new_tqp_num, rxfh_configured);
4211 ret = h->ae_algo->ops->set_channels(h, org_tqp_num,
4214 /* If revert to old tqp failed, fatal error occurred */
4215 dev_err(&netdev->dev,
4216 "Revert to old tqp num fail, ret=%d", ret);
4219 dev_info(&netdev->dev,
4220 "Change tqp num fail, Revert to old tqp num");
4222 ret = hns3_reset_notify(h, HNAE3_INIT_CLIENT);
4226 return hns3_reset_notify(h, HNAE3_UP_CLIENT);
4229 static const struct hnae3_client_ops client_ops = {
4230 .init_instance = hns3_client_init,
4231 .uninit_instance = hns3_client_uninit,
4232 .link_status_change = hns3_link_status_change,
4233 .setup_tc = hns3_client_setup_tc,
4234 .reset_notify = hns3_reset_notify,
4237 /* hns3_init_module - Driver registration routine
4238 * hns3_init_module is the first routine called when the driver is
4239 * loaded. All it does is register with the PCI subsystem.
4241 static int __init hns3_init_module(void)
4245 pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
4246 pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
4248 client.type = HNAE3_CLIENT_KNIC;
4249 snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
4252 client.ops = &client_ops;
4254 INIT_LIST_HEAD(&client.node);
4256 hns3_dbg_register_debugfs(hns3_driver_name);
4258 ret = hnae3_register_client(&client);
4260 goto err_reg_client;
4262 ret = pci_register_driver(&hns3_driver);
4264 goto err_reg_driver;
4269 hnae3_unregister_client(&client);
4271 hns3_dbg_unregister_debugfs();
4274 module_init(hns3_init_module);
4276 /* hns3_exit_module - Driver exit cleanup routine
4277 * hns3_exit_module is called just before the driver is removed
4280 static void __exit hns3_exit_module(void)
4282 pci_unregister_driver(&hns3_driver);
4283 hnae3_unregister_client(&client);
4284 hns3_dbg_unregister_debugfs();
4286 module_exit(hns3_exit_module);
4288 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
4289 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
4290 MODULE_LICENSE("GPL");
4291 MODULE_ALIAS("pci:hns-nic");
4292 MODULE_VERSION(HNS3_MOD_VERSION);