drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #include <linux/dma-mapping.h>
   5 #include <linux/etherdevice.h>
   6 #include <linux/interrupt.h>
   7 #include <linux/if_vlan.h>
   8 #include <linux/ip.h>
   9 #include <linux/ipv6.h>
  10 #include <linux/module.h>
  11 #include <linux/pci.h>
  12 #include <linux/aer.h>
  13 #include <linux/skbuff.h>
  14 #include <linux/sctp.h>
  15 #include <linux/vermagic.h>
  16 #include <net/gre.h>
  17 #include <net/pkt_cls.h>
  18 #include <net/tcp.h>
  19 #include <net/vxlan.h>
  20
  21 #include "hnae3.h"
  22 #include "hns3_enet.h"
  23
  24 #define hns3_set_field(origin, shift, val)      ((origin) |= ((val) << (shift)))
  25 #define hns3_tx_bd_count(S)     DIV_ROUND_UP(S, HNS3_MAX_BD_SIZE)
  26
  27 static void hns3_clear_all_ring(struct hnae3_handle *h);
  28 static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h);
  29 static void hns3_remove_hw_addr(struct net_device *netdev);
  30
  31 static const char hns3_driver_name[] = "hns3";
  32 const char hns3_driver_version[] = VERMAGIC_STRING;
  33 static const char hns3_driver_string[] =
  34                         "Hisilicon Ethernet Network Driver for Hip08 Family";
  35 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
  36 static struct hnae3_client client;
  37
  38 static int debug = -1;
  39 module_param(debug, int, 0);
  40 MODULE_PARM_DESC(debug, " Network interface message level setting");
  41
  42 #define DEFAULT_MSG_LEVEL (NETIF_MSG_PROBE | NETIF_MSG_LINK | \
  43                            NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
  44
  45 /* hns3_pci_tbl - PCI Device ID Table
  46  *
  47  * Last entry must be all 0s
  48  *
  49  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  50  *   Class, Class Mask, private data (not used) }
  51  */
  52 static const struct pci_device_id hns3_pci_tbl[] = {
  53         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
  54         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
  55         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
  56          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  57         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
  58          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  59         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
  60          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  61         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
  62          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  63         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
  64          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  65         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
  66         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF),
  67          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  68         /* required last entry */
  69         {0, }
  70 };
  71 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
  72
  73 static irqreturn_t hns3_irq_handle(int irq, void *vector)
  74 {
  75         struct hns3_enet_tqp_vector *tqp_vector = vector;
  76
  77         napi_schedule_irqoff(&tqp_vector->napi);
  78
  79         return IRQ_HANDLED;
  80 }
  81
  82 /* This callback function is used to set affinity changes to the irq affinity
  83  * masks when the irq_set_affinity_notifier function is used.
  84  */
  85 static void hns3_nic_irq_affinity_notify(struct irq_affinity_notify *notify,
  86                                          const cpumask_t *mask)
  87 {
  88         struct hns3_enet_tqp_vector *tqp_vectors =
  89                 container_of(notify, struct hns3_enet_tqp_vector,
  90                              affinity_notify);
  91
  92         tqp_vectors->affinity_mask = *mask;
  93 }
  94
  95 static void hns3_nic_irq_affinity_release(struct kref *ref)
  96 {
  97 }
  98
  99 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
 100 {
 101         struct hns3_enet_tqp_vector *tqp_vectors;
 102         unsigned int i;
 103
 104         for (i = 0; i < priv->vector_num; i++) {
 105                 tqp_vectors = &priv->tqp_vector[i];
 106
 107                 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
 108                         continue;
 109
 110                 /* clear the affinity notifier and affinity mask */
 111                 irq_set_affinity_notifier(tqp_vectors->vector_irq, NULL);
 112                 irq_set_affinity_hint(tqp_vectors->vector_irq, NULL);
 113
 114                 /* release the irq resource */
 115                 free_irq(tqp_vectors->vector_irq, tqp_vectors);
 116                 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
 117         }
 118 }
 119
 120 static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
 121 {
 122         struct hns3_enet_tqp_vector *tqp_vectors;
 123         int txrx_int_idx = 0;
 124         int rx_int_idx = 0;
 125         int tx_int_idx = 0;
 126         unsigned int i;
 127         int ret;
 128
 129         for (i = 0; i < priv->vector_num; i++) {
 130                 tqp_vectors = &priv->tqp_vector[i];
 131
 132                 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
 133                         continue;
 134
 135                 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
 136                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 137                                  "%s-%s-%d", priv->netdev->name, "TxRx",
 138                                  txrx_int_idx++);
 139                         txrx_int_idx++;
 140                 } else if (tqp_vectors->rx_group.ring) {
 141                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 142                                  "%s-%s-%d", priv->netdev->name, "Rx",
 143                                  rx_int_idx++);
 144                 } else if (tqp_vectors->tx_group.ring) {
 145                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 146                                  "%s-%s-%d", priv->netdev->name, "Tx",
 147                                  tx_int_idx++);
 148                 } else {
 149                         /* Skip this unused q_vector */
 150                         continue;
 151                 }
 152
 153                 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
 154
 155                 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
 156                                   tqp_vectors->name,
 157                                        tqp_vectors);
 158                 if (ret) {
 159                         netdev_err(priv->netdev, "request irq(%d) fail\n",
 160                                    tqp_vectors->vector_irq);
 161                         return ret;
 162                 }
 163
 164                 tqp_vectors->affinity_notify.notify =
 165                                         hns3_nic_irq_affinity_notify;
 166                 tqp_vectors->affinity_notify.release =
 167                                         hns3_nic_irq_affinity_release;
 168                 irq_set_affinity_notifier(tqp_vectors->vector_irq,
 169                                           &tqp_vectors->affinity_notify);
 170                 irq_set_affinity_hint(tqp_vectors->vector_irq,
 171                                       &tqp_vectors->affinity_mask);
 172
 173                 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
 174         }
 175
 176         return 0;
 177 }
 178
 179 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
 180                                  u32 mask_en)
 181 {
 182         writel(mask_en, tqp_vector->mask_addr);
 183 }
 184
 185 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
 186 {
 187         napi_enable(&tqp_vector->napi);
 188
 189         /* enable vector */
 190         hns3_mask_vector_irq(tqp_vector, 1);
 191 }
 192
 193 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
 194 {
 195         /* disable vector */
 196         hns3_mask_vector_irq(tqp_vector, 0);
 197
 198         disable_irq(tqp_vector->vector_irq);
 199         napi_disable(&tqp_vector->napi);
 200 }
 201
 202 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
 203                                  u32 rl_value)
 204 {
 205         u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
 206
 207         /* this defines the configuration for RL (Interrupt Rate Limiter).
 208          * Rl defines rate of interrupts i.e. number of interrupts-per-second
 209          * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
 210          */
 211
 212         if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
 213             !tqp_vector->rx_group.coal.gl_adapt_enable)
 214                 /* According to the hardware, the range of rl_reg is
 215                  * 0-59 and the unit is 4.
 216                  */
 217                 rl_reg |=  HNS3_INT_RL_ENABLE_MASK;
 218
 219         writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
 220 }
 221
 222 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 223                                     u32 gl_value)
 224 {
 225         u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 226
 227         writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
 228 }
 229
 230 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 231                                     u32 gl_value)
 232 {
 233         u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 234
 235         writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
 236 }
 237
 238 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
 239                                    struct hns3_nic_priv *priv)
 240 {
 241         /* initialize the configuration for interrupt coalescing.
 242          * 1. GL (Interrupt Gap Limiter)
 243          * 2. RL (Interrupt Rate Limiter)
 244          */
 245
 246         /* Default: enable interrupt coalescing self-adaptive and GL */
 247         tqp_vector->tx_group.coal.gl_adapt_enable = 1;
 248         tqp_vector->rx_group.coal.gl_adapt_enable = 1;
 249
 250         tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
 251         tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
 252
 253         tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
 254         tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
 255 }
 256
 257 static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
 258                                       struct hns3_nic_priv *priv)
 259 {
 260         struct hnae3_handle *h = priv->ae_handle;
 261
 262         hns3_set_vector_coalesce_tx_gl(tqp_vector,
 263                                        tqp_vector->tx_group.coal.int_gl);
 264         hns3_set_vector_coalesce_rx_gl(tqp_vector,
 265                                        tqp_vector->rx_group.coal.int_gl);
 266         hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
 267 }
 268
 269 static int hns3_nic_set_real_num_queue(struct net_device *netdev)
 270 {
 271         struct hnae3_handle *h = hns3_get_handle(netdev);
 272         struct hnae3_knic_private_info *kinfo = &h->kinfo;
 273         unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
 274         int i, ret;
 275
 276         if (kinfo->num_tc <= 1) {
 277                 netdev_reset_tc(netdev);
 278         } else {
 279                 ret = netdev_set_num_tc(netdev, kinfo->num_tc);
 280                 if (ret) {
 281                         netdev_err(netdev,
 282                                    "netdev_set_num_tc fail, ret=%d!\n", ret);
 283                         return ret;
 284                 }
 285
 286                 for (i = 0; i < HNAE3_MAX_TC; i++) {
 287                         if (!kinfo->tc_info[i].enable)
 288                                 continue;
 289
 290                         netdev_set_tc_queue(netdev,
 291                                             kinfo->tc_info[i].tc,
 292                                             kinfo->tc_info[i].tqp_count,
 293                                             kinfo->tc_info[i].tqp_offset);
 294                 }
 295         }
 296
 297         ret = netif_set_real_num_tx_queues(netdev, queue_size);
 298         if (ret) {
 299                 netdev_err(netdev,
 300                            "netif_set_real_num_tx_queues fail, ret=%d!\n",
 301                            ret);
 302                 return ret;
 303         }
 304
 305         ret = netif_set_real_num_rx_queues(netdev, queue_size);
 306         if (ret) {
 307                 netdev_err(netdev,
 308                            "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
 309                 return ret;
 310         }
 311
 312         return 0;
 313 }
 314
 315 static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
 316 {
 317         u16 alloc_tqps, max_rss_size, rss_size;
 318
 319         h->ae_algo->ops->get_tqps_and_rss_info(h, &alloc_tqps, &max_rss_size);
 320         rss_size = alloc_tqps / h->kinfo.num_tc;
 321
 322         return min_t(u16, rss_size, max_rss_size);
 323 }
 324
 325 static void hns3_tqp_enable(struct hnae3_queue *tqp)
 326 {
 327         u32 rcb_reg;
 328
 329         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 330         rcb_reg |= BIT(HNS3_RING_EN_B);
 331         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 332 }
 333
 334 static void hns3_tqp_disable(struct hnae3_queue *tqp)
 335 {
 336         u32 rcb_reg;
 337
 338         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 339         rcb_reg &= ~BIT(HNS3_RING_EN_B);
 340         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 341 }
 342
 343 static int hns3_nic_net_up(struct net_device *netdev)
 344 {
 345         struct hns3_nic_priv *priv = netdev_priv(netdev);
 346         struct hnae3_handle *h = priv->ae_handle;
 347         int i, j;
 348         int ret;
 349
 350         ret = hns3_nic_reset_all_ring(h);
 351         if (ret)
 352                 return ret;
 353
 354         /* get irq resource for all vectors */
 355         ret = hns3_nic_init_irq(priv);
 356         if (ret) {
 357                 netdev_err(netdev, "hns init irq failed! ret=%d\n", ret);
 358                 return ret;
 359         }
 360
 361         clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 362
 363         /* enable the vectors */
 364         for (i = 0; i < priv->vector_num; i++)
 365                 hns3_vector_enable(&priv->tqp_vector[i]);
 366
 367         /* enable rcb */
 368         for (j = 0; j < h->kinfo.num_tqps; j++)
 369                 hns3_tqp_enable(h->kinfo.tqp[j]);
 370
 371         /* start the ae_dev */
 372         ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
 373         if (ret)
 374                 goto out_start_err;
 375
 376         return 0;
 377
 378 out_start_err:
 379         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 380         while (j--)
 381                 hns3_tqp_disable(h->kinfo.tqp[j]);
 382
 383         for (j = i - 1; j >= 0; j--)
 384                 hns3_vector_disable(&priv->tqp_vector[j]);
 385
 386         hns3_nic_uninit_irq(priv);
 387
 388         return ret;
 389 }
 390
 391 static void hns3_config_xps(struct hns3_nic_priv *priv)
 392 {
 393         int i;
 394
 395         for (i = 0; i < priv->vector_num; i++) {
 396                 struct hns3_enet_tqp_vector *tqp_vector = &priv->tqp_vector[i];
 397                 struct hns3_enet_ring *ring = tqp_vector->tx_group.ring;
 398
 399                 while (ring) {
 400                         int ret;
 401
 402                         ret = netif_set_xps_queue(priv->netdev,
 403                                                   &tqp_vector->affinity_mask,
 404                                                   ring->tqp->tqp_index);
 405                         if (ret)
 406                                 netdev_warn(priv->netdev,
 407                                             "set xps queue failed: %d", ret);
 408
 409                         ring = ring->next;
 410                 }
 411         }
 412 }
 413
 414 static int hns3_nic_net_open(struct net_device *netdev)
 415 {
 416         struct hns3_nic_priv *priv = netdev_priv(netdev);
 417         struct hnae3_handle *h = hns3_get_handle(netdev);
 418         struct hnae3_knic_private_info *kinfo;
 419         int i, ret;
 420
 421         if (hns3_nic_resetting(netdev))
 422                 return -EBUSY;
 423
 424         netif_carrier_off(netdev);
 425
 426         ret = hns3_nic_set_real_num_queue(netdev);
 427         if (ret)
 428                 return ret;
 429
 430         ret = hns3_nic_net_up(netdev);
 431         if (ret) {
 432                 netdev_err(netdev,
 433                            "hns net up fail, ret=%d!\n", ret);
 434                 return ret;
 435         }
 436
 437         kinfo = &h->kinfo;
 438         for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) {
 439                 netdev_set_prio_tc_map(netdev, i,
 440                                        kinfo->prio_tc[i]);
 441         }
 442
 443         if (h->ae_algo->ops->set_timer_task)
 444                 h->ae_algo->ops->set_timer_task(priv->ae_handle, true);
 445
 446         hns3_config_xps(priv);
 447         return 0;
 448 }
 449
 450 static void hns3_nic_net_down(struct net_device *netdev)
 451 {
 452         struct hns3_nic_priv *priv = netdev_priv(netdev);
 453         struct hnae3_handle *h = hns3_get_handle(netdev);
 454         const struct hnae3_ae_ops *ops;
 455         int i;
 456
 457         /* disable vectors */
 458         for (i = 0; i < priv->vector_num; i++)
 459                 hns3_vector_disable(&priv->tqp_vector[i]);
 460
 461         /* disable rcb */
 462         for (i = 0; i < h->kinfo.num_tqps; i++)
 463                 hns3_tqp_disable(h->kinfo.tqp[i]);
 464
 465         /* stop ae_dev */
 466         ops = priv->ae_handle->ae_algo->ops;
 467         if (ops->stop)
 468                 ops->stop(priv->ae_handle);
 469
 470         /* free irq resources */
 471         hns3_nic_uninit_irq(priv);
 472
 473         hns3_clear_all_ring(priv->ae_handle);
 474 }
 475
 476 static int hns3_nic_net_stop(struct net_device *netdev)
 477 {
 478         struct hns3_nic_priv *priv = netdev_priv(netdev);
 479         struct hnae3_handle *h = hns3_get_handle(netdev);
 480
 481         if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
 482                 return 0;
 483
 484         if (h->ae_algo->ops->set_timer_task)
 485                 h->ae_algo->ops->set_timer_task(priv->ae_handle, false);
 486
 487         netif_tx_stop_all_queues(netdev);
 488         netif_carrier_off(netdev);
 489
 490         hns3_nic_net_down(netdev);
 491
 492         return 0;
 493 }
 494
 495 static int hns3_nic_uc_sync(struct net_device *netdev,
 496                             const unsigned char *addr)
 497 {
 498         struct hnae3_handle *h = hns3_get_handle(netdev);
 499
 500         if (h->ae_algo->ops->add_uc_addr)
 501                 return h->ae_algo->ops->add_uc_addr(h, addr);
 502
 503         return 0;
 504 }
 505
 506 static int hns3_nic_uc_unsync(struct net_device *netdev,
 507                               const unsigned char *addr)
 508 {
 509         struct hnae3_handle *h = hns3_get_handle(netdev);
 510
 511         if (h->ae_algo->ops->rm_uc_addr)
 512                 return h->ae_algo->ops->rm_uc_addr(h, addr);
 513
 514         return 0;
 515 }
 516
 517 static int hns3_nic_mc_sync(struct net_device *netdev,
 518                             const unsigned char *addr)
 519 {
 520         struct hnae3_handle *h = hns3_get_handle(netdev);
 521
 522         if (h->ae_algo->ops->add_mc_addr)
 523                 return h->ae_algo->ops->add_mc_addr(h, addr);
 524
 525         return 0;
 526 }
 527
 528 static int hns3_nic_mc_unsync(struct net_device *netdev,
 529                               const unsigned char *addr)
 530 {
 531         struct hnae3_handle *h = hns3_get_handle(netdev);
 532
 533         if (h->ae_algo->ops->rm_mc_addr)
 534                 return h->ae_algo->ops->rm_mc_addr(h, addr);
 535
 536         return 0;
 537 }
 538
 539 static u8 hns3_get_netdev_flags(struct net_device *netdev)
 540 {
 541         u8 flags = 0;
 542
 543         if (netdev->flags & IFF_PROMISC) {
 544                 flags = HNAE3_USER_UPE | HNAE3_USER_MPE | HNAE3_BPE;
 545         } else {
 546                 flags |= HNAE3_VLAN_FLTR;
 547                 if (netdev->flags & IFF_ALLMULTI)
 548                         flags |= HNAE3_USER_MPE;
 549         }
 550
 551         return flags;
 552 }
 553
 554 static void hns3_nic_set_rx_mode(struct net_device *netdev)
 555 {
 556         struct hnae3_handle *h = hns3_get_handle(netdev);
 557         u8 new_flags;
 558         int ret;
 559
 560         new_flags = hns3_get_netdev_flags(netdev);
 561
 562         ret = __dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync);
 563         if (ret) {
 564                 netdev_err(netdev, "sync uc address fail\n");
 565                 if (ret == -ENOSPC)
 566                         new_flags |= HNAE3_OVERFLOW_UPE;
 567         }
 568
 569         if (netdev->flags & IFF_MULTICAST) {
 570                 ret = __dev_mc_sync(netdev, hns3_nic_mc_sync,
 571                                     hns3_nic_mc_unsync);
 572                 if (ret) {
 573                         netdev_err(netdev, "sync mc address fail\n");
 574                         if (ret == -ENOSPC)
 575                                 new_flags |= HNAE3_OVERFLOW_MPE;
 576                 }
 577         }
 578
 579         /* User mode Promisc mode enable and vlan filtering is disabled to
 580          * let all packets in. MAC-VLAN Table overflow Promisc enabled and
 581          * vlan fitering is enabled
 582          */
 583         hns3_enable_vlan_filter(netdev, new_flags & HNAE3_VLAN_FLTR);
 584         h->netdev_flags = new_flags;
 585         hns3_update_promisc_mode(netdev, new_flags);
 586 }
 587
 588 int hns3_update_promisc_mode(struct net_device *netdev, u8 promisc_flags)
 589 {
 590         struct hns3_nic_priv *priv = netdev_priv(netdev);
 591         struct hnae3_handle *h = priv->ae_handle;
 592
 593         if (h->ae_algo->ops->set_promisc_mode) {
 594                 return h->ae_algo->ops->set_promisc_mode(h,
 595                                                 promisc_flags & HNAE3_UPE,
 596                                                 promisc_flags & HNAE3_MPE);
 597         }
 598
 599         return 0;
 600 }
 601
 602 void hns3_enable_vlan_filter(struct net_device *netdev, bool enable)
 603 {
 604         struct hns3_nic_priv *priv = netdev_priv(netdev);
 605         struct hnae3_handle *h = priv->ae_handle;
 606         bool last_state;
 607
 608         if (h->pdev->revision >= 0x21 && h->ae_algo->ops->enable_vlan_filter) {
 609                 last_state = h->netdev_flags & HNAE3_VLAN_FLTR ? true : false;
 610                 if (enable != last_state) {
 611                         netdev_info(netdev,
 612                                     "%s vlan filter\n",
 613                                     enable ? "enable" : "disable");
 614                         h->ae_algo->ops->enable_vlan_filter(h, enable);
 615                 }
 616         }
 617 }
 618
 619 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
 620                         u16 *mss, u32 *type_cs_vlan_tso)
 621 {
 622         u32 l4_offset, hdr_len;
 623         union l3_hdr_info l3;
 624         union l4_hdr_info l4;
 625         u32 l4_paylen;
 626         int ret;
 627
 628         if (!skb_is_gso(skb))
 629                 return 0;
 630
 631         ret = skb_cow_head(skb, 0);
 632         if (unlikely(ret))
 633                 return ret;
 634
 635         l3.hdr = skb_network_header(skb);
 636         l4.hdr = skb_transport_header(skb);
 637
 638         /* Software should clear the IPv4's checksum field when tso is
 639          * needed.
 640          */
 641         if (l3.v4->version == 4)
 642                 l3.v4->check = 0;
 643
 644         /* tunnel packet.*/
 645         if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
 646                                          SKB_GSO_GRE_CSUM |
 647                                          SKB_GSO_UDP_TUNNEL |
 648                                          SKB_GSO_UDP_TUNNEL_CSUM)) {
 649                 if ((!(skb_shinfo(skb)->gso_type &
 650                     SKB_GSO_PARTIAL)) &&
 651                     (skb_shinfo(skb)->gso_type &
 652                     SKB_GSO_UDP_TUNNEL_CSUM)) {
 653                         /* Software should clear the udp's checksum
 654                          * field when tso is needed.
 655                          */
 656                         l4.udp->check = 0;
 657                 }
 658                 /* reset l3&l4 pointers from outer to inner headers */
 659                 l3.hdr = skb_inner_network_header(skb);
 660                 l4.hdr = skb_inner_transport_header(skb);
 661
 662                 /* Software should clear the IPv4's checksum field when
 663                  * tso is needed.
 664                  */
 665                 if (l3.v4->version == 4)
 666                         l3.v4->check = 0;
 667         }
 668
 669         /* normal or tunnel packet*/
 670         l4_offset = l4.hdr - skb->data;
 671         hdr_len = (l4.tcp->doff << 2) + l4_offset;
 672
 673         /* remove payload length from inner pseudo checksum when tso*/
 674         l4_paylen = skb->len - l4_offset;
 675         csum_replace_by_diff(&l4.tcp->check,
 676                              (__force __wsum)htonl(l4_paylen));
 677
 678         /* find the txbd field values */
 679         *paylen = skb->len - hdr_len;
 680         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_TSO_B, 1);
 681
 682         /* get MSS for TSO */
 683         *mss = skb_shinfo(skb)->gso_size;
 684
 685         return 0;
 686 }
 687
 688 static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
 689                                 u8 *il4_proto)
 690 {
 691         union l3_hdr_info l3;
 692         unsigned char *l4_hdr;
 693         unsigned char *exthdr;
 694         u8 l4_proto_tmp;
 695         __be16 frag_off;
 696
 697         /* find outer header point */
 698         l3.hdr = skb_network_header(skb);
 699         l4_hdr = skb_transport_header(skb);
 700
 701         if (skb->protocol == htons(ETH_P_IPV6)) {
 702                 exthdr = l3.hdr + sizeof(*l3.v6);
 703                 l4_proto_tmp = l3.v6->nexthdr;
 704                 if (l4_hdr != exthdr)
 705                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 706                                          &l4_proto_tmp, &frag_off);
 707         } else if (skb->protocol == htons(ETH_P_IP)) {
 708                 l4_proto_tmp = l3.v4->protocol;
 709         } else {
 710                 return -EINVAL;
 711         }
 712
 713         *ol4_proto = l4_proto_tmp;
 714
 715         /* tunnel packet */
 716         if (!skb->encapsulation) {
 717                 *il4_proto = 0;
 718                 return 0;
 719         }
 720
 721         /* find inner header point */
 722         l3.hdr = skb_inner_network_header(skb);
 723         l4_hdr = skb_inner_transport_header(skb);
 724
 725         if (l3.v6->version == 6) {
 726                 exthdr = l3.hdr + sizeof(*l3.v6);
 727                 l4_proto_tmp = l3.v6->nexthdr;
 728                 if (l4_hdr != exthdr)
 729                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 730                                          &l4_proto_tmp, &frag_off);
 731         } else if (l3.v4->version == 4) {
 732                 l4_proto_tmp = l3.v4->protocol;
 733         }
 734
 735         *il4_proto = l4_proto_tmp;
 736
 737         return 0;
 738 }
 739
 740 static void hns3_set_l2l3l4_len(struct sk_buff *skb, u8 ol4_proto,
 741                                 u8 il4_proto, u32 *type_cs_vlan_tso,
 742                                 u32 *ol_type_vlan_len_msec)
 743 {
 744         union l3_hdr_info l3;
 745         union l4_hdr_info l4;
 746         unsigned char *l2_hdr;
 747         u8 l4_proto = ol4_proto;
 748         u32 ol2_len;
 749         u32 ol3_len;
 750         u32 ol4_len;
 751         u32 l2_len;
 752         u32 l3_len;
 753
 754         l3.hdr = skb_network_header(skb);
 755         l4.hdr = skb_transport_header(skb);
 756
 757         /* compute L2 header size for normal packet, defined in 2 Bytes */
 758         l2_len = l3.hdr - skb->data;
 759         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S, l2_len >> 1);
 760
 761         /* tunnel packet*/
 762         if (skb->encapsulation) {
 763                 /* compute OL2 header size, defined in 2 Bytes */
 764                 ol2_len = l2_len;
 765                 hns3_set_field(*ol_type_vlan_len_msec,
 766                                HNS3_TXD_L2LEN_S, ol2_len >> 1);
 767
 768                 /* compute OL3 header size, defined in 4 Bytes */
 769                 ol3_len = l4.hdr - l3.hdr;
 770                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_S,
 771                                ol3_len >> 2);
 772
 773                 /* MAC in UDP, MAC in GRE (0x6558)*/
 774                 if ((ol4_proto == IPPROTO_UDP) || (ol4_proto == IPPROTO_GRE)) {
 775                         /* switch MAC header ptr from outer to inner header.*/
 776                         l2_hdr = skb_inner_mac_header(skb);
 777
 778                         /* compute OL4 header size, defined in 4 Bytes. */
 779                         ol4_len = l2_hdr - l4.hdr;
 780                         hns3_set_field(*ol_type_vlan_len_msec,
 781                                        HNS3_TXD_L4LEN_S, ol4_len >> 2);
 782
 783                         /* switch IP header ptr from outer to inner header */
 784                         l3.hdr = skb_inner_network_header(skb);
 785
 786                         /* compute inner l2 header size, defined in 2 Bytes. */
 787                         l2_len = l3.hdr - l2_hdr;
 788                         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S,
 789                                        l2_len >> 1);
 790                 } else {
 791                         /* skb packet types not supported by hardware,
 792                          * txbd len fild doesn't be filled.
 793                          */
 794                         return;
 795                 }
 796
 797                 /* switch L4 header pointer from outer to inner */
 798                 l4.hdr = skb_inner_transport_header(skb);
 799
 800                 l4_proto = il4_proto;
 801         }
 802
 803         /* compute inner(/normal) L3 header size, defined in 4 Bytes */
 804         l3_len = l4.hdr - l3.hdr;
 805         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_S, l3_len >> 2);
 806
 807         /* compute inner(/normal) L4 header size, defined in 4 Bytes */
 808         switch (l4_proto) {
 809         case IPPROTO_TCP:
 810                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 811                                l4.tcp->doff);
 812                 break;
 813         case IPPROTO_SCTP:
 814                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 815                                (sizeof(struct sctphdr) >> 2));
 816                 break;
 817         case IPPROTO_UDP:
 818                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 819                                (sizeof(struct udphdr) >> 2));
 820                 break;
 821         default:
 822                 /* skb packet types not supported by hardware,
 823                  * txbd len fild doesn't be filled.
 824                  */
 825                 return;
 826         }
 827 }
 828
 829 /* when skb->encapsulation is 0, skb->ip_summed is CHECKSUM_PARTIAL
 830  * and it is udp packet, which has a dest port as the IANA assigned.
 831  * the hardware is expected to do the checksum offload, but the
 832  * hardware will not do the checksum offload when udp dest port is
 833  * 4789.
 834  */
 835 static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
 836 {
 837         union l4_hdr_info l4;
 838
 839         l4.hdr = skb_transport_header(skb);
 840
 841         if (!(!skb->encapsulation &&
 842               l4.udp->dest == htons(IANA_VXLAN_UDP_PORT)))
 843                 return false;
 844
 845         skb_checksum_help(skb);
 846
 847         return true;
 848 }
 849
 850 static int hns3_set_l3l4_type_csum(struct sk_buff *skb, u8 ol4_proto,
 851                                    u8 il4_proto, u32 *type_cs_vlan_tso,
 852                                    u32 *ol_type_vlan_len_msec)
 853 {
 854         union l3_hdr_info l3;
 855         u32 l4_proto = ol4_proto;
 856
 857         l3.hdr = skb_network_header(skb);
 858
 859         /* define OL3 type and tunnel type(OL4).*/
 860         if (skb->encapsulation) {
 861                 /* define outer network header type.*/
 862                 if (skb->protocol == htons(ETH_P_IP)) {
 863                         if (skb_is_gso(skb))
 864                                 hns3_set_field(*ol_type_vlan_len_msec,
 865                                                HNS3_TXD_OL3T_S,
 866                                                HNS3_OL3T_IPV4_CSUM);
 867                         else
 868                                 hns3_set_field(*ol_type_vlan_len_msec,
 869                                                HNS3_TXD_OL3T_S,
 870                                                HNS3_OL3T_IPV4_NO_CSUM);
 871
 872                 } else if (skb->protocol == htons(ETH_P_IPV6)) {
 873                         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_S,
 874                                        HNS3_OL3T_IPV6);
 875                 }
 876
 877                 /* define tunnel type(OL4).*/
 878                 switch (l4_proto) {
 879                 case IPPROTO_UDP:
 880                         hns3_set_field(*ol_type_vlan_len_msec,
 881                                        HNS3_TXD_TUNTYPE_S,
 882                                        HNS3_TUN_MAC_IN_UDP);
 883                         break;
 884                 case IPPROTO_GRE:
 885                         hns3_set_field(*ol_type_vlan_len_msec,
 886                                        HNS3_TXD_TUNTYPE_S,
 887                                        HNS3_TUN_NVGRE);
 888                         break;
 889                 default:
 890                         /* drop the skb tunnel packet if hardware don't support,
 891                          * because hardware can't calculate csum when TSO.
 892                          */
 893                         if (skb_is_gso(skb))
 894                                 return -EDOM;
 895
 896                         /* the stack computes the IP header already,
 897                          * driver calculate l4 checksum when not TSO.
 898                          */
 899                         skb_checksum_help(skb);
 900                         return 0;
 901                 }
 902
 903                 l3.hdr = skb_inner_network_header(skb);
 904                 l4_proto = il4_proto;
 905         }
 906
 907         if (l3.v4->version == 4) {
 908                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 909                                HNS3_L3T_IPV4);
 910
 911                 /* the stack computes the IP header already, the only time we
 912                  * need the hardware to recompute it is in the case of TSO.
 913                  */
 914                 if (skb_is_gso(skb))
 915                         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
 916         } else if (l3.v6->version == 6) {
 917                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 918                                HNS3_L3T_IPV6);
 919         }
 920
 921         switch (l4_proto) {
 922         case IPPROTO_TCP:
 923                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 924                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 925                                HNS3_L4T_TCP);
 926                 break;
 927         case IPPROTO_UDP:
 928                 if (hns3_tunnel_csum_bug(skb))
 929                         break;
 930
 931                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 932                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 933                                HNS3_L4T_UDP);
 934                 break;
 935         case IPPROTO_SCTP:
 936                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 937                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 938                                HNS3_L4T_SCTP);
 939                 break;
 940         default:
 941                 /* drop the skb tunnel packet if hardware don't support,
 942                  * because hardware can't calculate csum when TSO.
 943                  */
 944                 if (skb_is_gso(skb))
 945                         return -EDOM;
 946
 947                 /* the stack computes the IP header already,
 948                  * driver calculate l4 checksum when not TSO.
 949                  */
 950                 skb_checksum_help(skb);
 951                 return 0;
 952         }
 953
 954         return 0;
 955 }
 956
 957 static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
 958 {
 959         /* Config bd buffer end */
 960         hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
 961         hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
 962 }
 963
 964 static int hns3_fill_desc_vtags(struct sk_buff *skb,
 965                                 struct hns3_enet_ring *tx_ring,
 966                                 u32 *inner_vlan_flag,
 967                                 u32 *out_vlan_flag,
 968                                 u16 *inner_vtag,
 969                                 u16 *out_vtag)
 970 {
 971 #define HNS3_TX_VLAN_PRIO_SHIFT 13
 972
 973         struct hnae3_handle *handle = tx_ring->tqp->handle;
 974
 975         /* Since HW limitation, if port based insert VLAN enabled, only one VLAN
 976          * header is allowed in skb, otherwise it will cause RAS error.
 977          */
 978         if (unlikely(skb_vlan_tagged_multi(skb) &&
 979                      handle->port_base_vlan_state ==
 980                      HNAE3_PORT_BASE_VLAN_ENABLE))
 981                 return -EINVAL;
 982
 983         if (skb->protocol == htons(ETH_P_8021Q) &&
 984             !(tx_ring->tqp->handle->kinfo.netdev->features &
 985             NETIF_F_HW_VLAN_CTAG_TX)) {
 986                 /* When HW VLAN acceleration is turned off, and the stack
 987                  * sets the protocol to 802.1q, the driver just need to
 988                  * set the protocol to the encapsulated ethertype.
 989                  */
 990                 skb->protocol = vlan_get_protocol(skb);
 991                 return 0;
 992         }
 993
 994         if (skb_vlan_tag_present(skb)) {
 995                 u16 vlan_tag;
 996
 997                 vlan_tag = skb_vlan_tag_get(skb);
 998                 vlan_tag |= (skb->priority & 0x7) << HNS3_TX_VLAN_PRIO_SHIFT;
 999
1000                 /* Based on hw strategy, use out_vtag in two layer tag case,
1001                  * and use inner_vtag in one tag case.
1002                  */
1003                 if (skb->protocol == htons(ETH_P_8021Q)) {
1004                         if (handle->port_base_vlan_state ==
1005                             HNAE3_PORT_BASE_VLAN_DISABLE){
1006                                 hns3_set_field(*out_vlan_flag,
1007                                                HNS3_TXD_OVLAN_B, 1);
1008                                 *out_vtag = vlan_tag;
1009                         } else {
1010                                 hns3_set_field(*inner_vlan_flag,
1011                                                HNS3_TXD_VLAN_B, 1);
1012                                 *inner_vtag = vlan_tag;
1013                         }
1014                 } else {
1015                         hns3_set_field(*inner_vlan_flag, HNS3_TXD_VLAN_B, 1);
1016                         *inner_vtag = vlan_tag;
1017                 }
1018         } else if (skb->protocol == htons(ETH_P_8021Q)) {
1019                 struct vlan_ethhdr *vhdr;
1020                 int rc;
1021
1022                 rc = skb_cow_head(skb, 0);
1023                 if (unlikely(rc < 0))
1024                         return rc;
1025                 vhdr = (struct vlan_ethhdr *)skb->data;
1026                 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority & 0x7)
1027                                         << HNS3_TX_VLAN_PRIO_SHIFT);
1028         }
1029
1030         skb->protocol = vlan_get_protocol(skb);
1031         return 0;
1032 }
1033
1034 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
1035                           int size, int frag_end, enum hns_desc_type type)
1036 {
1037         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
1038         struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1039         struct device *dev = ring_to_dev(ring);
1040         struct skb_frag_struct *frag;
1041         unsigned int frag_buf_num;
1042         int k, sizeoflast;
1043         dma_addr_t dma;
1044
1045         if (type == DESC_TYPE_SKB) {
1046                 struct sk_buff *skb = (struct sk_buff *)priv;
1047                 u32 ol_type_vlan_len_msec = 0;
1048                 u32 type_cs_vlan_tso = 0;
1049                 u32 paylen = skb->len;
1050                 u16 inner_vtag = 0;
1051                 u16 out_vtag = 0;
1052                 u16 mss = 0;
1053                 int ret;
1054
1055                 ret = hns3_fill_desc_vtags(skb, ring, &type_cs_vlan_tso,
1056                                            &ol_type_vlan_len_msec,
1057                                            &inner_vtag, &out_vtag);
1058                 if (unlikely(ret))
1059                         return ret;
1060
1061                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1062                         u8 ol4_proto, il4_proto;
1063
1064                         skb_reset_mac_len(skb);
1065
1066                         ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
1067                         if (unlikely(ret))
1068                                 return ret;
1069                         hns3_set_l2l3l4_len(skb, ol4_proto, il4_proto,
1070                                             &type_cs_vlan_tso,
1071                                             &ol_type_vlan_len_msec);
1072                         ret = hns3_set_l3l4_type_csum(skb, ol4_proto, il4_proto,
1073                                                       &type_cs_vlan_tso,
1074                                                       &ol_type_vlan_len_msec);
1075                         if (unlikely(ret))
1076                                 return ret;
1077
1078                         ret = hns3_set_tso(skb, &paylen, &mss,
1079                                            &type_cs_vlan_tso);
1080                         if (unlikely(ret))
1081                                 return ret;
1082                 }
1083
1084                 /* Set txbd */
1085                 desc->tx.ol_type_vlan_len_msec =
1086                         cpu_to_le32(ol_type_vlan_len_msec);
1087                 desc->tx.type_cs_vlan_tso_len =
1088                         cpu_to_le32(type_cs_vlan_tso);
1089                 desc->tx.paylen = cpu_to_le32(paylen);
1090                 desc->tx.mss = cpu_to_le16(mss);
1091                 desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
1092                 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
1093
1094                 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1095         } else {
1096                 frag = (struct skb_frag_struct *)priv;
1097                 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1098         }
1099
1100         if (unlikely(dma_mapping_error(ring->dev, dma))) {
1101                 ring->stats.sw_err_cnt++;
1102                 return -ENOMEM;
1103         }
1104
1105         desc_cb->length = size;
1106
1107         if (likely(size <= HNS3_MAX_BD_SIZE)) {
1108                 u16 bdtp_fe_sc_vld_ra_ri = 0;
1109
1110                 desc_cb->priv = priv;
1111                 desc_cb->dma = dma;
1112                 desc_cb->type = type;
1113                 desc->addr = cpu_to_le64(dma);
1114                 desc->tx.send_size = cpu_to_le16(size);
1115                 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
1116                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1117                         cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1118
1119                 ring_ptr_move_fw(ring, next_to_use);
1120                 return 0;
1121         }
1122
1123         frag_buf_num = hns3_tx_bd_count(size);
1124         sizeoflast = size & HNS3_TX_LAST_SIZE_M;
1125         sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
1126
1127         /* When frag size is bigger than hardware limit, split this frag */
1128         for (k = 0; k < frag_buf_num; k++) {
1129                 u16 bdtp_fe_sc_vld_ra_ri = 0;
1130
1131                 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
1132                 desc_cb->priv = priv;
1133                 desc_cb->dma = dma + HNS3_MAX_BD_SIZE * k;
1134                 desc_cb->type = (type == DESC_TYPE_SKB && !k) ?
1135                                         DESC_TYPE_SKB : DESC_TYPE_PAGE;
1136
1137                 /* now, fill the descriptor */
1138                 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);
1139                 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?
1140                                 (u16)sizeoflast : (u16)HNS3_MAX_BD_SIZE);
1141                 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri,
1142                                        frag_end && (k == frag_buf_num - 1) ?
1143                                                 1 : 0);
1144                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1145                                 cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1146
1147                 /* move ring pointer to next.*/
1148                 ring_ptr_move_fw(ring, next_to_use);
1149
1150                 desc_cb = &ring->desc_cb[ring->next_to_use];
1151                 desc = &ring->desc[ring->next_to_use];
1152         }
1153
1154         return 0;
1155 }
1156
1157 static int hns3_nic_bd_num(struct sk_buff *skb)
1158 {
1159         int size = skb_headlen(skb);
1160         int i, bd_num;
1161
1162         /* if the total len is within the max bd limit */
1163         if (likely(skb->len <= HNS3_MAX_BD_SIZE))
1164                 return skb_shinfo(skb)->nr_frags + 1;
1165
1166         bd_num = hns3_tx_bd_count(size);
1167
1168         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1169                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
1170                 int frag_bd_num;
1171
1172                 size = skb_frag_size(frag);
1173                 frag_bd_num = hns3_tx_bd_count(size);
1174
1175                 if (unlikely(frag_bd_num > HNS3_MAX_BD_PER_FRAG))
1176                         return -ENOMEM;
1177
1178                 bd_num += frag_bd_num;
1179         }
1180
1181         return bd_num;
1182 }
1183
1184 static unsigned int hns3_gso_hdr_len(struct sk_buff *skb)
1185 {
1186         if (!skb->encapsulation)
1187                 return skb_transport_offset(skb) + tcp_hdrlen(skb);
1188
1189         return skb_inner_transport_offset(skb) + inner_tcp_hdrlen(skb);
1190 }
1191
1192 /* HW need every continuous 8 buffer data to be larger than MSS,
1193  * we simplify it by ensuring skb_headlen + the first continuous
1194  * 7 frags to to be larger than gso header len + mss, and the remaining
1195  * continuous 7 frags to be larger than MSS except the last 7 frags.
1196  */
1197 static bool hns3_skb_need_linearized(struct sk_buff *skb)
1198 {
1199         int bd_limit = HNS3_MAX_BD_PER_FRAG - 1;
1200         unsigned int tot_len = 0;
1201         int i;
1202
1203         for (i = 0; i < bd_limit; i++)
1204                 tot_len += skb_frag_size(&skb_shinfo(skb)->frags[i]);
1205
1206         /* ensure headlen + the first 7 frags is greater than mss + header
1207          * and the first 7 frags is greater than mss.
1208          */
1209         if (((tot_len + skb_headlen(skb)) < (skb_shinfo(skb)->gso_size +
1210             hns3_gso_hdr_len(skb))) || (tot_len < skb_shinfo(skb)->gso_size))
1211                 return true;
1212
1213         /* ensure the remaining continuous 7 buffer is greater than mss */
1214         for (i = 0; i < (skb_shinfo(skb)->nr_frags - bd_limit - 1); i++) {
1215                 tot_len -= skb_frag_size(&skb_shinfo(skb)->frags[i]);
1216                 tot_len += skb_frag_size(&skb_shinfo(skb)->frags[i + bd_limit]);
1217
1218                 if (tot_len < skb_shinfo(skb)->gso_size)
1219                         return true;
1220         }
1221
1222         return false;
1223 }
1224
1225 static int hns3_nic_maybe_stop_tx(struct hns3_enet_ring *ring,
1226                                   struct sk_buff **out_skb)
1227 {
1228         struct sk_buff *skb = *out_skb;
1229         int bd_num;
1230
1231         bd_num = hns3_nic_bd_num(skb);
1232         if (bd_num < 0)
1233                 return bd_num;
1234
1235         if (unlikely(bd_num > HNS3_MAX_BD_PER_FRAG)) {
1236                 struct sk_buff *new_skb;
1237
1238                 if (skb_is_gso(skb) && !hns3_skb_need_linearized(skb))
1239                         goto out;
1240
1241                 bd_num = hns3_tx_bd_count(skb->len);
1242                 if (unlikely(ring_space(ring) < bd_num))
1243                         return -EBUSY;
1244                 /* manual split the send packet */
1245                 new_skb = skb_copy(skb, GFP_ATOMIC);
1246                 if (!new_skb)
1247                         return -ENOMEM;
1248                 dev_kfree_skb_any(skb);
1249                 *out_skb = new_skb;
1250
1251                 u64_stats_update_begin(&ring->syncp);
1252                 ring->stats.tx_copy++;
1253                 u64_stats_update_end(&ring->syncp);
1254         }
1255
1256 out:
1257         if (unlikely(ring_space(ring) < bd_num))
1258                 return -EBUSY;
1259
1260         return bd_num;
1261 }
1262
1263 static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig)
1264 {
1265         struct device *dev = ring_to_dev(ring);
1266         unsigned int i;
1267
1268         for (i = 0; i < ring->desc_num; i++) {
1269                 /* check if this is where we started */
1270                 if (ring->next_to_use == next_to_use_orig)
1271                         break;
1272
1273                 /* unmap the descriptor dma address */
1274                 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
1275                         dma_unmap_single(dev,
1276                                          ring->desc_cb[ring->next_to_use].dma,
1277                                         ring->desc_cb[ring->next_to_use].length,
1278                                         DMA_TO_DEVICE);
1279                 else if (ring->desc_cb[ring->next_to_use].length)
1280                         dma_unmap_page(dev,
1281                                        ring->desc_cb[ring->next_to_use].dma,
1282                                        ring->desc_cb[ring->next_to_use].length,
1283                                        DMA_TO_DEVICE);
1284
1285                 ring->desc_cb[ring->next_to_use].length = 0;
1286
1287                 /* rollback one */
1288                 ring_ptr_move_bw(ring, next_to_use);
1289         }
1290 }
1291
1292 netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
1293 {
1294         struct hns3_nic_priv *priv = netdev_priv(netdev);
1295         struct hns3_nic_ring_data *ring_data =
1296                 &tx_ring_data(priv, skb->queue_mapping);
1297         struct hns3_enet_ring *ring = ring_data->ring;
1298         struct netdev_queue *dev_queue;
1299         struct skb_frag_struct *frag;
1300         int next_to_use_head;
1301         int next_to_use_frag;
1302         int buf_num;
1303         int seg_num;
1304         int size;
1305         int ret;
1306         int i;
1307
1308         /* Prefetch the data used later */
1309         prefetch(skb->data);
1310
1311         buf_num = hns3_nic_maybe_stop_tx(ring, &skb);
1312         if (unlikely(buf_num <= 0)) {
1313                 if (buf_num == -EBUSY) {
1314                         u64_stats_update_begin(&ring->syncp);
1315                         ring->stats.tx_busy++;
1316                         u64_stats_update_end(&ring->syncp);
1317                         goto out_net_tx_busy;
1318                 } else if (buf_num == -ENOMEM) {
1319                         u64_stats_update_begin(&ring->syncp);
1320                         ring->stats.sw_err_cnt++;
1321                         u64_stats_update_end(&ring->syncp);
1322                 }
1323
1324                 if (net_ratelimit())
1325                         netdev_err(netdev, "xmit error: %d!\n", buf_num);
1326
1327                 goto out_err_tx_ok;
1328         }
1329
1330         /* No. of segments (plus a header) */
1331         seg_num = skb_shinfo(skb)->nr_frags + 1;
1332         /* Fill the first part */
1333         size = skb_headlen(skb);
1334
1335         next_to_use_head = ring->next_to_use;
1336
1337         ret = hns3_fill_desc(ring, skb, size, seg_num == 1 ? 1 : 0,
1338                              DESC_TYPE_SKB);
1339         if (unlikely(ret))
1340                 goto head_fill_err;
1341
1342         next_to_use_frag = ring->next_to_use;
1343         /* Fill the fragments */
1344         for (i = 1; i < seg_num; i++) {
1345                 frag = &skb_shinfo(skb)->frags[i - 1];
1346                 size = skb_frag_size(frag);
1347
1348                 ret = hns3_fill_desc(ring, frag, size,
1349                                      seg_num - 1 == i ? 1 : 0,
1350                                      DESC_TYPE_PAGE);
1351
1352                 if (unlikely(ret))
1353                         goto frag_fill_err;
1354         }
1355
1356         /* Complete translate all packets */
1357         dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1358         netdev_tx_sent_queue(dev_queue, skb->len);
1359
1360         wmb(); /* Commit all data before submit */
1361
1362         hnae3_queue_xmit(ring->tqp, buf_num);
1363
1364         return NETDEV_TX_OK;
1365
1366 frag_fill_err:
1367         hns3_clear_desc(ring, next_to_use_frag);
1368
1369 head_fill_err:
1370         hns3_clear_desc(ring, next_to_use_head);
1371
1372 out_err_tx_ok:
1373         dev_kfree_skb_any(skb);
1374         return NETDEV_TX_OK;
1375
1376 out_net_tx_busy:
1377         netif_stop_subqueue(netdev, ring_data->queue_index);
1378         smp_mb(); /* Commit all data before submit */
1379
1380         return NETDEV_TX_BUSY;
1381 }
1382
1383 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1384 {
1385         struct hnae3_handle *h = hns3_get_handle(netdev);
1386         struct sockaddr *mac_addr = p;
1387         int ret;
1388
1389         if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1390                 return -EADDRNOTAVAIL;
1391
1392         if (ether_addr_equal(netdev->dev_addr, mac_addr->sa_data)) {
1393                 netdev_info(netdev, "already using mac address %pM\n",
1394                             mac_addr->sa_data);
1395                 return 0;
1396         }
1397
1398         ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
1399         if (ret) {
1400                 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1401                 return ret;
1402         }
1403
1404         ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1405
1406         return 0;
1407 }
1408
1409 static int hns3_nic_do_ioctl(struct net_device *netdev,
1410                              struct ifreq *ifr, int cmd)
1411 {
1412         struct hnae3_handle *h = hns3_get_handle(netdev);
1413
1414         if (!netif_running(netdev))
1415                 return -EINVAL;
1416
1417         if (!h->ae_algo->ops->do_ioctl)
1418                 return -EOPNOTSUPP;
1419
1420         return h->ae_algo->ops->do_ioctl(h, ifr, cmd);
1421 }
1422
1423 static int hns3_nic_set_features(struct net_device *netdev,
1424                                  netdev_features_t features)
1425 {
1426         netdev_features_t changed = netdev->features ^ features;
1427         struct hns3_nic_priv *priv = netdev_priv(netdev);
1428         struct hnae3_handle *h = priv->ae_handle;
1429         bool enable;
1430         int ret;
1431
1432         if (changed & (NETIF_F_GRO_HW) && h->ae_algo->ops->set_gro_en) {
1433                 enable = !!(features & NETIF_F_GRO_HW);
1434                 ret = h->ae_algo->ops->set_gro_en(h, enable);
1435                 if (ret)
1436                         return ret;
1437         }
1438
1439         if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1440             h->ae_algo->ops->enable_vlan_filter) {
1441                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_FILTER);
1442                 h->ae_algo->ops->enable_vlan_filter(h, enable);
1443         }
1444
1445         if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1446             h->ae_algo->ops->enable_hw_strip_rxvtag) {
1447                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
1448                 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, enable);
1449                 if (ret)
1450                         return ret;
1451         }
1452
1453         if ((changed & NETIF_F_NTUPLE) && h->ae_algo->ops->enable_fd) {
1454                 enable = !!(features & NETIF_F_NTUPLE);
1455                 h->ae_algo->ops->enable_fd(h, enable);
1456         }
1457
1458         netdev->features = features;
1459         return 0;
1460 }
1461
1462 static void hns3_nic_get_stats64(struct net_device *netdev,
1463                                  struct rtnl_link_stats64 *stats)
1464 {
1465         struct hns3_nic_priv *priv = netdev_priv(netdev);
1466         int queue_num = priv->ae_handle->kinfo.num_tqps;
1467         struct hnae3_handle *handle = priv->ae_handle;
1468         struct hns3_enet_ring *ring;
1469         u64 rx_length_errors = 0;
1470         u64 rx_crc_errors = 0;
1471         u64 rx_multicast = 0;
1472         unsigned int start;
1473         u64 tx_errors = 0;
1474         u64 rx_errors = 0;
1475         unsigned int idx;
1476         u64 tx_bytes = 0;
1477         u64 rx_bytes = 0;
1478         u64 tx_pkts = 0;
1479         u64 rx_pkts = 0;
1480         u64 tx_drop = 0;
1481         u64 rx_drop = 0;
1482
1483         if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1484                 return;
1485
1486         handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1487
1488         for (idx = 0; idx < queue_num; idx++) {
1489                 /* fetch the tx stats */
1490                 ring = priv->ring_data[idx].ring;
1491                 do {
1492                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1493                         tx_bytes += ring->stats.tx_bytes;
1494                         tx_pkts += ring->stats.tx_pkts;
1495                         tx_drop += ring->stats.sw_err_cnt;
1496                         tx_errors += ring->stats.sw_err_cnt;
1497                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1498
1499                 /* fetch the rx stats */
1500                 ring = priv->ring_data[idx + queue_num].ring;
1501                 do {
1502                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1503                         rx_bytes += ring->stats.rx_bytes;
1504                         rx_pkts += ring->stats.rx_pkts;
1505                         rx_drop += ring->stats.non_vld_descs;
1506                         rx_drop += ring->stats.l2_err;
1507                         rx_errors += ring->stats.non_vld_descs;
1508                         rx_errors += ring->stats.l2_err;
1509                         rx_crc_errors += ring->stats.l2_err;
1510                         rx_crc_errors += ring->stats.l3l4_csum_err;
1511                         rx_multicast += ring->stats.rx_multicast;
1512                         rx_length_errors += ring->stats.err_pkt_len;
1513                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1514         }
1515
1516         stats->tx_bytes = tx_bytes;
1517         stats->tx_packets = tx_pkts;
1518         stats->rx_bytes = rx_bytes;
1519         stats->rx_packets = rx_pkts;
1520
1521         stats->rx_errors = rx_errors;
1522         stats->multicast = rx_multicast;
1523         stats->rx_length_errors = rx_length_errors;
1524         stats->rx_crc_errors = rx_crc_errors;
1525         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1526
1527         stats->tx_errors = tx_errors;
1528         stats->rx_dropped = rx_drop;
1529         stats->tx_dropped = tx_drop;
1530         stats->collisions = netdev->stats.collisions;
1531         stats->rx_over_errors = netdev->stats.rx_over_errors;
1532         stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1533         stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1534         stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1535         stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1536         stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1537         stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1538         stats->tx_window_errors = netdev->stats.tx_window_errors;
1539         stats->rx_compressed = netdev->stats.rx_compressed;
1540         stats->tx_compressed = netdev->stats.tx_compressed;
1541 }
1542
1543 static int hns3_setup_tc(struct net_device *netdev, void *type_data)
1544 {
1545         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
1546         struct hnae3_handle *h = hns3_get_handle(netdev);
1547         struct hnae3_knic_private_info *kinfo = &h->kinfo;
1548         u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1549         u8 tc = mqprio_qopt->qopt.num_tc;
1550         u16 mode = mqprio_qopt->mode;
1551         u8 hw = mqprio_qopt->qopt.hw;
1552
1553         if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1554                mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1555                 return -EOPNOTSUPP;
1556
1557         if (tc > HNAE3_MAX_TC)
1558                 return -EINVAL;
1559
1560         if (!netdev)
1561                 return -EINVAL;
1562
1563         return (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1564                 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
1565 }
1566
1567 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
1568                              void *type_data)
1569 {
1570         if (type != TC_SETUP_QDISC_MQPRIO)
1571                 return -EOPNOTSUPP;
1572
1573         return hns3_setup_tc(dev, type_data);
1574 }
1575
1576 static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1577                                 __be16 proto, u16 vid)
1578 {
1579         struct hnae3_handle *h = hns3_get_handle(netdev);
1580         struct hns3_nic_priv *priv = netdev_priv(netdev);
1581         int ret = -EIO;
1582
1583         if (h->ae_algo->ops->set_vlan_filter)
1584                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1585
1586         if (!ret)
1587                 set_bit(vid, priv->active_vlans);
1588
1589         return ret;
1590 }
1591
1592 static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1593                                  __be16 proto, u16 vid)
1594 {
1595         struct hnae3_handle *h = hns3_get_handle(netdev);
1596         struct hns3_nic_priv *priv = netdev_priv(netdev);
1597         int ret = -EIO;
1598
1599         if (h->ae_algo->ops->set_vlan_filter)
1600                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1601
1602         if (!ret)
1603                 clear_bit(vid, priv->active_vlans);
1604
1605         return ret;
1606 }
1607
1608 static int hns3_restore_vlan(struct net_device *netdev)
1609 {
1610         struct hns3_nic_priv *priv = netdev_priv(netdev);
1611         int ret = 0;
1612         u16 vid;
1613
1614         for_each_set_bit(vid, priv->active_vlans, VLAN_N_VID) {
1615                 ret = hns3_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
1616                 if (ret) {
1617                         netdev_err(netdev, "Restore vlan: %d filter, ret:%d\n",
1618                                    vid, ret);
1619                         return ret;
1620                 }
1621         }
1622
1623         return ret;
1624 }
1625
1626 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1627                                 u8 qos, __be16 vlan_proto)
1628 {
1629         struct hnae3_handle *h = hns3_get_handle(netdev);
1630         int ret = -EIO;
1631
1632         if (h->ae_algo->ops->set_vf_vlan_filter)
1633                 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1634                                                    qos, vlan_proto);
1635
1636         return ret;
1637 }
1638
1639 static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1640 {
1641         struct hnae3_handle *h = hns3_get_handle(netdev);
1642         int ret;
1643
1644         if (hns3_nic_resetting(netdev))
1645                 return -EBUSY;
1646
1647         if (!h->ae_algo->ops->set_mtu)
1648                 return -EOPNOTSUPP;
1649
1650         ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1651         if (ret)
1652                 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1653                            ret);
1654         else
1655                 netdev->mtu = new_mtu;
1656
1657         return ret;
1658 }
1659
1660 static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1661 {
1662         struct hns3_nic_priv *priv = netdev_priv(ndev);
1663         struct hnae3_handle *h = hns3_get_handle(ndev);
1664         struct hns3_enet_ring *tx_ring = NULL;
1665         struct napi_struct *napi;
1666         int timeout_queue = 0;
1667         int hw_head, hw_tail;
1668         int fbd_num, fbd_oft;
1669         int ebd_num, ebd_oft;
1670         int bd_num, bd_err;
1671         int ring_en, tc;
1672         int i;
1673
1674         /* Find the stopped queue the same way the stack does */
1675         for (i = 0; i < ndev->num_tx_queues; i++) {
1676                 struct netdev_queue *q;
1677                 unsigned long trans_start;
1678
1679                 q = netdev_get_tx_queue(ndev, i);
1680                 trans_start = q->trans_start;
1681                 if (netif_xmit_stopped(q) &&
1682                     time_after(jiffies,
1683                                (trans_start + ndev->watchdog_timeo))) {
1684                         timeout_queue = i;
1685                         break;
1686                 }
1687         }
1688
1689         if (i == ndev->num_tx_queues) {
1690                 netdev_info(ndev,
1691                             "no netdev TX timeout queue found, timeout count: %llu\n",
1692                             priv->tx_timeout_count);
1693                 return false;
1694         }
1695
1696         priv->tx_timeout_count++;
1697
1698         tx_ring = priv->ring_data[timeout_queue].ring;
1699         napi = &tx_ring->tqp_vector->napi;
1700
1701         netdev_info(ndev,
1702                     "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, napi state: %lu\n",
1703                     priv->tx_timeout_count, timeout_queue, tx_ring->next_to_use,
1704                     tx_ring->next_to_clean, napi->state);
1705
1706         netdev_info(ndev,
1707                     "tx_pkts: %llu, tx_bytes: %llu, io_err_cnt: %llu, sw_err_cnt: %llu\n",
1708                     tx_ring->stats.tx_pkts, tx_ring->stats.tx_bytes,
1709                     tx_ring->stats.io_err_cnt, tx_ring->stats.sw_err_cnt);
1710
1711         netdev_info(ndev,
1712                     "seg_pkt_cnt: %llu, tx_err_cnt: %llu, restart_queue: %llu, tx_busy: %llu\n",
1713                     tx_ring->stats.seg_pkt_cnt, tx_ring->stats.tx_err_cnt,
1714                     tx_ring->stats.restart_queue, tx_ring->stats.tx_busy);
1715
1716         /* When mac received many pause frames continuous, it's unable to send
1717          * packets, which may cause tx timeout
1718          */
1719         if (h->ae_algo->ops->update_stats &&
1720             h->ae_algo->ops->get_mac_pause_stats) {
1721                 u64 tx_pause_cnt, rx_pause_cnt;
1722
1723                 h->ae_algo->ops->update_stats(h, &ndev->stats);
1724                 h->ae_algo->ops->get_mac_pause_stats(h, &tx_pause_cnt,
1725                                                      &rx_pause_cnt);
1726                 netdev_info(ndev, "tx_pause_cnt: %llu, rx_pause_cnt: %llu\n",
1727                             tx_pause_cnt, rx_pause_cnt);
1728         }
1729
1730         hw_head = readl_relaxed(tx_ring->tqp->io_base +
1731                                 HNS3_RING_TX_RING_HEAD_REG);
1732         hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1733                                 HNS3_RING_TX_RING_TAIL_REG);
1734         fbd_num = readl_relaxed(tx_ring->tqp->io_base +
1735                                 HNS3_RING_TX_RING_FBDNUM_REG);
1736         fbd_oft = readl_relaxed(tx_ring->tqp->io_base +
1737                                 HNS3_RING_TX_RING_OFFSET_REG);
1738         ebd_num = readl_relaxed(tx_ring->tqp->io_base +
1739                                 HNS3_RING_TX_RING_EBDNUM_REG);
1740         ebd_oft = readl_relaxed(tx_ring->tqp->io_base +
1741                                 HNS3_RING_TX_RING_EBD_OFFSET_REG);
1742         bd_num = readl_relaxed(tx_ring->tqp->io_base +
1743                                HNS3_RING_TX_RING_BD_NUM_REG);
1744         bd_err = readl_relaxed(tx_ring->tqp->io_base +
1745                                HNS3_RING_TX_RING_BD_ERR_REG);
1746         ring_en = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_EN_REG);
1747         tc = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_TX_RING_TC_REG);
1748
1749         netdev_info(ndev,
1750                     "BD_NUM: 0x%x HW_HEAD: 0x%x, HW_TAIL: 0x%x, BD_ERR: 0x%x, INT: 0x%x\n",
1751                     bd_num, hw_head, hw_tail, bd_err,
1752                     readl(tx_ring->tqp_vector->mask_addr));
1753         netdev_info(ndev,
1754                     "RING_EN: 0x%x, TC: 0x%x, FBD_NUM: 0x%x FBD_OFT: 0x%x, EBD_NUM: 0x%x, EBD_OFT: 0x%x\n",
1755                     ring_en, tc, fbd_num, fbd_oft, ebd_num, ebd_oft);
1756
1757         return true;
1758 }
1759
1760 static void hns3_nic_net_timeout(struct net_device *ndev)
1761 {
1762         struct hns3_nic_priv *priv = netdev_priv(ndev);
1763         struct hnae3_handle *h = priv->ae_handle;
1764
1765         if (!hns3_get_tx_timeo_queue_info(ndev))
1766                 return;
1767
1768         /* request the reset, and let the hclge to determine
1769          * which reset level should be done
1770          */
1771         if (h->ae_algo->ops->reset_event)
1772                 h->ae_algo->ops->reset_event(h->pdev, h);
1773 }
1774
1775 static const struct net_device_ops hns3_nic_netdev_ops = {
1776         .ndo_open               = hns3_nic_net_open,
1777         .ndo_stop               = hns3_nic_net_stop,
1778         .ndo_start_xmit         = hns3_nic_net_xmit,
1779         .ndo_tx_timeout         = hns3_nic_net_timeout,
1780         .ndo_set_mac_address    = hns3_nic_net_set_mac_address,
1781         .ndo_do_ioctl           = hns3_nic_do_ioctl,
1782         .ndo_change_mtu         = hns3_nic_change_mtu,
1783         .ndo_set_features       = hns3_nic_set_features,
1784         .ndo_get_stats64        = hns3_nic_get_stats64,
1785         .ndo_setup_tc           = hns3_nic_setup_tc,
1786         .ndo_set_rx_mode        = hns3_nic_set_rx_mode,
1787         .ndo_vlan_rx_add_vid    = hns3_vlan_rx_add_vid,
1788         .ndo_vlan_rx_kill_vid   = hns3_vlan_rx_kill_vid,
1789         .ndo_set_vf_vlan        = hns3_ndo_set_vf_vlan,
1790 };
1791
1792 bool hns3_is_phys_func(struct pci_dev *pdev)
1793 {
1794         u32 dev_id = pdev->device;
1795
1796         switch (dev_id) {
1797         case HNAE3_DEV_ID_GE:
1798         case HNAE3_DEV_ID_25GE:
1799         case HNAE3_DEV_ID_25GE_RDMA:
1800         case HNAE3_DEV_ID_25GE_RDMA_MACSEC:
1801         case HNAE3_DEV_ID_50GE_RDMA:
1802         case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
1803         case HNAE3_DEV_ID_100G_RDMA_MACSEC:
1804                 return true;
1805         case HNAE3_DEV_ID_100G_VF:
1806         case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF:
1807                 return false;
1808         default:
1809                 dev_warn(&pdev->dev, "un-recognized pci device-id %d",
1810                          dev_id);
1811         }
1812
1813         return false;
1814 }
1815
1816 static void hns3_disable_sriov(struct pci_dev *pdev)
1817 {
1818         /* If our VFs are assigned we cannot shut down SR-IOV
1819          * without causing issues, so just leave the hardware
1820          * available but disabled
1821          */
1822         if (pci_vfs_assigned(pdev)) {
1823                 dev_warn(&pdev->dev,
1824                          "disabling driver while VFs are assigned\n");
1825                 return;
1826         }
1827
1828         pci_disable_sriov(pdev);
1829 }
1830
1831 static void hns3_get_dev_capability(struct pci_dev *pdev,
1832                                     struct hnae3_ae_dev *ae_dev)
1833 {
1834         if (pdev->revision >= 0x21) {
1835                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B, 1);
1836                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B, 1);
1837         }
1838 }
1839
1840 /* hns3_probe - Device initialization routine
1841  * @pdev: PCI device information struct
1842  * @ent: entry in hns3_pci_tbl
1843  *
1844  * hns3_probe initializes a PF identified by a pci_dev structure.
1845  * The OS initialization, configuring of the PF private structure,
1846  * and a hardware reset occur.
1847  *
1848  * Returns 0 on success, negative on failure
1849  */
1850 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1851 {
1852         struct hnae3_ae_dev *ae_dev;
1853         int ret;
1854
1855         ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev),
1856                               GFP_KERNEL);
1857         if (!ae_dev) {
1858                 ret = -ENOMEM;
1859                 return ret;
1860         }
1861
1862         ae_dev->pdev = pdev;
1863         ae_dev->flag = ent->driver_data;
1864         ae_dev->dev_type = HNAE3_DEV_KNIC;
1865         ae_dev->reset_type = HNAE3_NONE_RESET;
1866         hns3_get_dev_capability(pdev, ae_dev);
1867         pci_set_drvdata(pdev, ae_dev);
1868
1869         ret = hnae3_register_ae_dev(ae_dev);
1870         if (ret) {
1871                 devm_kfree(&pdev->dev, ae_dev);
1872                 pci_set_drvdata(pdev, NULL);
1873         }
1874
1875         return ret;
1876 }
1877
1878 /* hns3_remove - Device removal routine
1879  * @pdev: PCI device information struct
1880  */
1881 static void hns3_remove(struct pci_dev *pdev)
1882 {
1883         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1884
1885         if (hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))
1886                 hns3_disable_sriov(pdev);
1887
1888         hnae3_unregister_ae_dev(ae_dev);
1889         pci_set_drvdata(pdev, NULL);
1890 }
1891
1892 /**
1893  * hns3_pci_sriov_configure
1894  * @pdev: pointer to a pci_dev structure
1895  * @num_vfs: number of VFs to allocate
1896  *
1897  * Enable or change the number of VFs. Called when the user updates the number
1898  * of VFs in sysfs.
1899  **/
1900 static int hns3_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1901 {
1902         int ret;
1903
1904         if (!(hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))) {
1905                 dev_warn(&pdev->dev, "Can not config SRIOV\n");
1906                 return -EINVAL;
1907         }
1908
1909         if (num_vfs) {
1910                 ret = pci_enable_sriov(pdev, num_vfs);
1911                 if (ret)
1912                         dev_err(&pdev->dev, "SRIOV enable failed %d\n", ret);
1913                 else
1914                         return num_vfs;
1915         } else if (!pci_vfs_assigned(pdev)) {
1916                 pci_disable_sriov(pdev);
1917         } else {
1918                 dev_warn(&pdev->dev,
1919                          "Unable to free VFs because some are assigned to VMs.\n");
1920         }
1921
1922         return 0;
1923 }
1924
1925 static void hns3_shutdown(struct pci_dev *pdev)
1926 {
1927         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1928
1929         hnae3_unregister_ae_dev(ae_dev);
1930         devm_kfree(&pdev->dev, ae_dev);
1931         pci_set_drvdata(pdev, NULL);
1932
1933         if (system_state == SYSTEM_POWER_OFF)
1934                 pci_set_power_state(pdev, PCI_D3hot);
1935 }
1936
1937 static pci_ers_result_t hns3_error_detected(struct pci_dev *pdev,
1938                                             pci_channel_state_t state)
1939 {
1940         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1941         pci_ers_result_t ret;
1942
1943         dev_info(&pdev->dev, "PCI error detected, state(=%d)!!\n", state);
1944
1945         if (state == pci_channel_io_perm_failure)
1946                 return PCI_ERS_RESULT_DISCONNECT;
1947
1948         if (!ae_dev) {
1949                 dev_err(&pdev->dev,
1950                         "Can't recover - error happened during device init\n");
1951                 return PCI_ERS_RESULT_NONE;
1952         }
1953
1954         if (ae_dev->ops->handle_hw_ras_error)
1955                 ret = ae_dev->ops->handle_hw_ras_error(ae_dev);
1956         else
1957                 return PCI_ERS_RESULT_NONE;
1958
1959         return ret;
1960 }
1961
1962 static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev)
1963 {
1964         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1965         struct device *dev = &pdev->dev;
1966
1967         dev_info(dev, "requesting reset due to PCI error\n");
1968
1969         /* request the reset */
1970         if (ae_dev->ops->reset_event) {
1971                 if (!ae_dev->override_pci_need_reset)
1972                         ae_dev->ops->reset_event(pdev, NULL);
1973
1974                 return PCI_ERS_RESULT_RECOVERED;
1975         }
1976
1977         return PCI_ERS_RESULT_DISCONNECT;
1978 }
1979
1980 static void hns3_reset_prepare(struct pci_dev *pdev)
1981 {
1982         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1983
1984         dev_info(&pdev->dev, "hns3 flr prepare\n");
1985         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_prepare)
1986                 ae_dev->ops->flr_prepare(ae_dev);
1987 }
1988
1989 static void hns3_reset_done(struct pci_dev *pdev)
1990 {
1991         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1992
1993         dev_info(&pdev->dev, "hns3 flr done\n");
1994         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_done)
1995                 ae_dev->ops->flr_done(ae_dev);
1996 }
1997
1998 static const struct pci_error_handlers hns3_err_handler = {
1999         .error_detected = hns3_error_detected,
2000         .slot_reset     = hns3_slot_reset,
2001         .reset_prepare  = hns3_reset_prepare,
2002         .reset_done     = hns3_reset_done,
2003 };
2004
2005 static struct pci_driver hns3_driver = {
2006         .name     = hns3_driver_name,
2007         .id_table = hns3_pci_tbl,
2008         .probe    = hns3_probe,
2009         .remove   = hns3_remove,
2010         .shutdown = hns3_shutdown,
2011         .sriov_configure = hns3_pci_sriov_configure,
2012         .err_handler    = &hns3_err_handler,
2013 };
2014
2015 /* set default feature to hns3 */
2016 static void hns3_set_default_feature(struct net_device *netdev)
2017 {
2018         struct hnae3_handle *h = hns3_get_handle(netdev);
2019         struct pci_dev *pdev = h->pdev;
2020
2021         netdev->priv_flags |= IFF_UNICAST_FLT;
2022
2023         netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2024                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2025                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2026                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2027                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2028
2029         netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
2030
2031         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
2032
2033         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2034                 NETIF_F_HW_VLAN_CTAG_FILTER |
2035                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2036                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2037                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2038                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2039                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2040
2041         netdev->vlan_features |=
2042                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
2043                 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
2044                 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2045                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2046                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2047
2048         netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2049                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2050                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2051                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2052                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2053                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2054
2055         if (pdev->revision >= 0x21) {
2056                 netdev->hw_features |= NETIF_F_GRO_HW;
2057                 netdev->features |= NETIF_F_GRO_HW;
2058
2059                 if (!(h->flags & HNAE3_SUPPORT_VF)) {
2060                         netdev->hw_features |= NETIF_F_NTUPLE;
2061                         netdev->features |= NETIF_F_NTUPLE;
2062                 }
2063         }
2064 }
2065
2066 static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
2067                              struct hns3_desc_cb *cb)
2068 {
2069         unsigned int order = hnae3_page_order(ring);
2070         struct page *p;
2071
2072         p = dev_alloc_pages(order);
2073         if (!p)
2074                 return -ENOMEM;
2075
2076         cb->priv = p;
2077         cb->page_offset = 0;
2078         cb->reuse_flag = 0;
2079         cb->buf  = page_address(p);
2080         cb->length = hnae3_page_size(ring);
2081         cb->type = DESC_TYPE_PAGE;
2082
2083         return 0;
2084 }
2085
2086 static void hns3_free_buffer(struct hns3_enet_ring *ring,
2087                              struct hns3_desc_cb *cb)
2088 {
2089         if (cb->type == DESC_TYPE_SKB)
2090                 dev_kfree_skb_any((struct sk_buff *)cb->priv);
2091         else if (!HNAE3_IS_TX_RING(ring))
2092                 put_page((struct page *)cb->priv);
2093         memset(cb, 0, sizeof(*cb));
2094 }
2095
2096 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
2097 {
2098         cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
2099                                cb->length, ring_to_dma_dir(ring));
2100
2101         if (unlikely(dma_mapping_error(ring_to_dev(ring), cb->dma)))
2102                 return -EIO;
2103
2104         return 0;
2105 }
2106
2107 static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
2108                               struct hns3_desc_cb *cb)
2109 {
2110         if (cb->type == DESC_TYPE_SKB)
2111                 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
2112                                  ring_to_dma_dir(ring));
2113         else if (cb->length)
2114                 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
2115                                ring_to_dma_dir(ring));
2116 }
2117
2118 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
2119 {
2120         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2121         ring->desc[i].addr = 0;
2122 }
2123
2124 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
2125 {
2126         struct hns3_desc_cb *cb = &ring->desc_cb[i];
2127
2128         if (!ring->desc_cb[i].dma)
2129                 return;
2130
2131         hns3_buffer_detach(ring, i);
2132         hns3_free_buffer(ring, cb);
2133 }
2134
2135 static void hns3_free_buffers(struct hns3_enet_ring *ring)
2136 {
2137         int i;
2138
2139         for (i = 0; i < ring->desc_num; i++)
2140                 hns3_free_buffer_detach(ring, i);
2141 }
2142
2143 /* free desc along with its attached buffer */
2144 static void hns3_free_desc(struct hns3_enet_ring *ring)
2145 {
2146         int size = ring->desc_num * sizeof(ring->desc[0]);
2147
2148         hns3_free_buffers(ring);
2149
2150         if (ring->desc) {
2151                 dma_free_coherent(ring_to_dev(ring), size,
2152                                   ring->desc, ring->desc_dma_addr);
2153                 ring->desc = NULL;
2154         }
2155 }
2156
2157 static int hns3_alloc_desc(struct hns3_enet_ring *ring)
2158 {
2159         int size = ring->desc_num * sizeof(ring->desc[0]);
2160
2161         ring->desc = dma_alloc_coherent(ring_to_dev(ring), size,
2162                                         &ring->desc_dma_addr, GFP_KERNEL);
2163         if (!ring->desc)
2164                 return -ENOMEM;
2165
2166         return 0;
2167 }
2168
2169 static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
2170                                    struct hns3_desc_cb *cb)
2171 {
2172         int ret;
2173
2174         ret = hns3_alloc_buffer(ring, cb);
2175         if (ret)
2176                 goto out;
2177
2178         ret = hns3_map_buffer(ring, cb);
2179         if (ret)
2180                 goto out_with_buf;
2181
2182         return 0;
2183
2184 out_with_buf:
2185         hns3_free_buffer(ring, cb);
2186 out:
2187         return ret;
2188 }
2189
2190 static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
2191 {
2192         int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
2193
2194         if (ret)
2195                 return ret;
2196
2197         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2198
2199         return 0;
2200 }
2201
2202 /* Allocate memory for raw pkg, and map with dma */
2203 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
2204 {
2205         int i, j, ret;
2206
2207         for (i = 0; i < ring->desc_num; i++) {
2208                 ret = hns3_alloc_buffer_attach(ring, i);
2209                 if (ret)
2210                         goto out_buffer_fail;
2211         }
2212
2213         return 0;
2214
2215 out_buffer_fail:
2216         for (j = i - 1; j >= 0; j--)
2217                 hns3_free_buffer_detach(ring, j);
2218         return ret;
2219 }
2220
2221 /* detach a in-used buffer and replace with a reserved one  */
2222 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
2223                                 struct hns3_desc_cb *res_cb)
2224 {
2225         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2226         ring->desc_cb[i] = *res_cb;
2227         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2228         ring->desc[i].rx.bd_base_info = 0;
2229 }
2230
2231 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
2232 {
2233         ring->desc_cb[i].reuse_flag = 0;
2234         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
2235                 + ring->desc_cb[i].page_offset);
2236         ring->desc[i].rx.bd_base_info = 0;
2237 }
2238
2239 static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring *ring, int *bytes,
2240                                       int *pkts)
2241 {
2242         int ntc = ring->next_to_clean;
2243         struct hns3_desc_cb *desc_cb;
2244
2245         desc_cb = &ring->desc_cb[ntc];
2246         (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
2247         (*bytes) += desc_cb->length;
2248         /* desc_cb will be cleaned, after hnae3_free_buffer_detach*/
2249         hns3_free_buffer_detach(ring, ntc);
2250
2251         if (++ntc == ring->desc_num)
2252                 ntc = 0;
2253
2254         /* This smp_store_release() pairs with smp_load_acquire() in
2255          * ring_space called by hns3_nic_net_xmit.
2256          */
2257         smp_store_release(&ring->next_to_clean, ntc);
2258 }
2259
2260 static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
2261 {
2262         int u = ring->next_to_use;
2263         int c = ring->next_to_clean;
2264
2265         if (unlikely(h > ring->desc_num))
2266                 return 0;
2267
2268         return u > c ? (h > c && h <= u) : (h > c || h <= u);
2269 }
2270
2271 void hns3_clean_tx_ring(struct hns3_enet_ring *ring)
2272 {
2273         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2274         struct hns3_nic_priv *priv = netdev_priv(netdev);
2275         struct netdev_queue *dev_queue;
2276         int bytes, pkts;
2277         int head;
2278
2279         head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
2280         rmb(); /* Make sure head is ready before touch any data */
2281
2282         if (is_ring_empty(ring) || head == ring->next_to_clean)
2283                 return; /* no data to poll */
2284
2285         if (unlikely(!is_valid_clean_head(ring, head))) {
2286                 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
2287                            ring->next_to_use, ring->next_to_clean);
2288
2289                 u64_stats_update_begin(&ring->syncp);
2290                 ring->stats.io_err_cnt++;
2291                 u64_stats_update_end(&ring->syncp);
2292                 return;
2293         }
2294
2295         bytes = 0;
2296         pkts = 0;
2297         while (head != ring->next_to_clean) {
2298                 hns3_nic_reclaim_one_desc(ring, &bytes, &pkts);
2299                 /* Issue prefetch for next Tx descriptor */
2300                 prefetch(&ring->desc_cb[ring->next_to_clean]);
2301         }
2302
2303         ring->tqp_vector->tx_group.total_bytes += bytes;
2304         ring->tqp_vector->tx_group.total_packets += pkts;
2305
2306         u64_stats_update_begin(&ring->syncp);
2307         ring->stats.tx_bytes += bytes;
2308         ring->stats.tx_pkts += pkts;
2309         u64_stats_update_end(&ring->syncp);
2310
2311         dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
2312         netdev_tx_completed_queue(dev_queue, pkts, bytes);
2313
2314         if (unlikely(pkts && netif_carrier_ok(netdev) &&
2315                      (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
2316                 /* Make sure that anybody stopping the queue after this
2317                  * sees the new next_to_clean.
2318                  */
2319                 smp_mb();
2320                 if (netif_tx_queue_stopped(dev_queue) &&
2321                     !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
2322                         netif_tx_wake_queue(dev_queue);
2323                         ring->stats.restart_queue++;
2324                 }
2325         }
2326 }
2327
2328 static int hns3_desc_unused(struct hns3_enet_ring *ring)
2329 {
2330         int ntc = ring->next_to_clean;
2331         int ntu = ring->next_to_use;
2332
2333         return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
2334 }
2335
2336 static void
2337 hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring, int cleand_count)
2338 {
2339         struct hns3_desc_cb *desc_cb;
2340         struct hns3_desc_cb res_cbs;
2341         int i, ret;
2342
2343         for (i = 0; i < cleand_count; i++) {
2344                 desc_cb = &ring->desc_cb[ring->next_to_use];
2345                 if (desc_cb->reuse_flag) {
2346                         u64_stats_update_begin(&ring->syncp);
2347                         ring->stats.reuse_pg_cnt++;
2348                         u64_stats_update_end(&ring->syncp);
2349
2350                         hns3_reuse_buffer(ring, ring->next_to_use);
2351                 } else {
2352                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
2353                         if (ret) {
2354                                 u64_stats_update_begin(&ring->syncp);
2355                                 ring->stats.sw_err_cnt++;
2356                                 u64_stats_update_end(&ring->syncp);
2357
2358                                 netdev_err(ring->tqp->handle->kinfo.netdev,
2359                                            "hnae reserve buffer map failed.\n");
2360                                 break;
2361                         }
2362                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
2363
2364                         u64_stats_update_begin(&ring->syncp);
2365                         ring->stats.non_reuse_pg++;
2366                         u64_stats_update_end(&ring->syncp);
2367                 }
2368
2369                 ring_ptr_move_fw(ring, next_to_use);
2370         }
2371
2372         wmb(); /* Make all data has been write before submit */
2373         writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
2374 }
2375
2376 static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2377                                 struct hns3_enet_ring *ring, int pull_len,
2378                                 struct hns3_desc_cb *desc_cb)
2379 {
2380         struct hns3_desc *desc;
2381         u32 truesize;
2382         int size;
2383         int last_offset;
2384         bool twobufs;
2385
2386         twobufs = ((PAGE_SIZE < 8192) &&
2387                 hnae3_buf_size(ring) == HNS3_BUFFER_SIZE_2048);
2388
2389         desc = &ring->desc[ring->next_to_clean];
2390         size = le16_to_cpu(desc->rx.size);
2391
2392         truesize = hnae3_buf_size(ring);
2393
2394         if (!twobufs)
2395                 last_offset = hnae3_page_size(ring) - hnae3_buf_size(ring);
2396
2397         skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2398                         size - pull_len, truesize);
2399
2400          /* Avoid re-using remote pages,flag default unreuse */
2401         if (unlikely(page_to_nid(desc_cb->priv) != numa_node_id()))
2402                 return;
2403
2404         if (twobufs) {
2405                 /* If we are only owner of page we can reuse it */
2406                 if (likely(page_count(desc_cb->priv) == 1)) {
2407                         /* Flip page offset to other buffer */
2408                         desc_cb->page_offset ^= truesize;
2409
2410                         desc_cb->reuse_flag = 1;
2411                         /* bump ref count on page before it is given*/
2412                         get_page(desc_cb->priv);
2413                 }
2414                 return;
2415         }
2416
2417         /* Move offset up to the next cache line */
2418         desc_cb->page_offset += truesize;
2419
2420         if (desc_cb->page_offset <= last_offset) {
2421                 desc_cb->reuse_flag = 1;
2422                 /* Bump ref count on page before it is given*/
2423                 get_page(desc_cb->priv);
2424         }
2425 }
2426
2427 static int hns3_gro_complete(struct sk_buff *skb)
2428 {
2429         __be16 type = skb->protocol;
2430         struct tcphdr *th;
2431         int depth = 0;
2432
2433         while (type == htons(ETH_P_8021Q)) {
2434                 struct vlan_hdr *vh;
2435
2436                 if ((depth + VLAN_HLEN) > skb_headlen(skb))
2437                         return -EFAULT;
2438
2439                 vh = (struct vlan_hdr *)(skb->data + depth);
2440                 type = vh->h_vlan_encapsulated_proto;
2441                 depth += VLAN_HLEN;
2442         }
2443
2444         if (type == htons(ETH_P_IP)) {
2445                 depth += sizeof(struct iphdr);
2446         } else if (type == htons(ETH_P_IPV6)) {
2447                 depth += sizeof(struct ipv6hdr);
2448         } else {
2449                 netdev_err(skb->dev,
2450                            "Error: FW GRO supports only IPv4/IPv6, not 0x%04x, depth: %d\n",
2451                            be16_to_cpu(type), depth);
2452                 return -EFAULT;
2453         }
2454
2455         th = (struct tcphdr *)(skb->data + depth);
2456         skb_shinfo(skb)->gso_segs = NAPI_GRO_CB(skb)->count;
2457         if (th->cwr)
2458                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_ECN;
2459
2460         skb->ip_summed = CHECKSUM_UNNECESSARY;
2461
2462         return 0;
2463 }
2464
2465 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2466                              u32 l234info, u32 bd_base_info)
2467 {
2468         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2469         int l3_type, l4_type;
2470         int ol4_type;
2471
2472         skb->ip_summed = CHECKSUM_NONE;
2473
2474         skb_checksum_none_assert(skb);
2475
2476         if (!(netdev->features & NETIF_F_RXCSUM))
2477                 return;
2478
2479         /* check if hardware has done checksum */
2480         if (!(bd_base_info & BIT(HNS3_RXD_L3L4P_B)))
2481                 return;
2482
2483         if (unlikely(l234info & (BIT(HNS3_RXD_L3E_B) | BIT(HNS3_RXD_L4E_B) |
2484                                  BIT(HNS3_RXD_OL3E_B) |
2485                                  BIT(HNS3_RXD_OL4E_B)))) {
2486                 u64_stats_update_begin(&ring->syncp);
2487                 ring->stats.l3l4_csum_err++;
2488                 u64_stats_update_end(&ring->syncp);
2489
2490                 return;
2491         }
2492
2493         ol4_type = hnae3_get_field(l234info, HNS3_RXD_OL4ID_M,
2494                                    HNS3_RXD_OL4ID_S);
2495         switch (ol4_type) {
2496         case HNS3_OL4_TYPE_MAC_IN_UDP:
2497         case HNS3_OL4_TYPE_NVGRE:
2498                 skb->csum_level = 1;
2499                 /* fall through */
2500         case HNS3_OL4_TYPE_NO_TUN:
2501                 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2502                                           HNS3_RXD_L3ID_S);
2503                 l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
2504                                           HNS3_RXD_L4ID_S);
2505
2506                 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2507                 if ((l3_type == HNS3_L3_TYPE_IPV4 ||
2508                      l3_type == HNS3_L3_TYPE_IPV6) &&
2509                     (l4_type == HNS3_L4_TYPE_UDP ||
2510                      l4_type == HNS3_L4_TYPE_TCP ||
2511                      l4_type == HNS3_L4_TYPE_SCTP))
2512                         skb->ip_summed = CHECKSUM_UNNECESSARY;
2513                 break;
2514         default:
2515                 break;
2516         }
2517 }
2518
2519 static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2520 {
2521         if (skb_has_frag_list(skb))
2522                 napi_gro_flush(&ring->tqp_vector->napi, false);
2523
2524         napi_gro_receive(&ring->tqp_vector->napi, skb);
2525 }
2526
2527 static bool hns3_parse_vlan_tag(struct hns3_enet_ring *ring,
2528                                 struct hns3_desc *desc, u32 l234info,
2529                                 u16 *vlan_tag)
2530 {
2531         struct hnae3_handle *handle = ring->tqp->handle;
2532         struct pci_dev *pdev = ring->tqp->handle->pdev;
2533
2534         if (pdev->revision == 0x20) {
2535                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2536                 if (!(*vlan_tag & VLAN_VID_MASK))
2537                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2538
2539                 return (*vlan_tag != 0);
2540         }
2541
2542 #define HNS3_STRP_OUTER_VLAN    0x1
2543 #define HNS3_STRP_INNER_VLAN    0x2
2544 #define HNS3_STRP_BOTH          0x3
2545
2546         /* Hardware always insert VLAN tag into RX descriptor when
2547          * remove the tag from packet, driver needs to determine
2548          * reporting which tag to stack.
2549          */
2550         switch (hnae3_get_field(l234info, HNS3_RXD_STRP_TAGP_M,
2551                                 HNS3_RXD_STRP_TAGP_S)) {
2552         case HNS3_STRP_OUTER_VLAN:
2553                 if (handle->port_base_vlan_state !=
2554                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2555                         return false;
2556
2557                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2558                 return true;
2559         case HNS3_STRP_INNER_VLAN:
2560                 if (handle->port_base_vlan_state !=
2561                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2562                         return false;
2563
2564                 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2565                 return true;
2566         case HNS3_STRP_BOTH:
2567                 if (handle->port_base_vlan_state ==
2568                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2569                         *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2570                 else
2571                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2572
2573                 return true;
2574         default:
2575                 return false;
2576         }
2577 }
2578
2579 static int hns3_alloc_skb(struct hns3_enet_ring *ring, int length,
2580                           unsigned char *va)
2581 {
2582 #define HNS3_NEED_ADD_FRAG      1
2583         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
2584         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2585         struct sk_buff *skb;
2586
2587         ring->skb = napi_alloc_skb(&ring->tqp_vector->napi, HNS3_RX_HEAD_SIZE);
2588         skb = ring->skb;
2589         if (unlikely(!skb)) {
2590                 netdev_err(netdev, "alloc rx skb fail\n");
2591
2592                 u64_stats_update_begin(&ring->syncp);
2593                 ring->stats.sw_err_cnt++;
2594                 u64_stats_update_end(&ring->syncp);
2595
2596                 return -ENOMEM;
2597         }
2598
2599         prefetchw(skb->data);
2600
2601         ring->pending_buf = 1;
2602         ring->frag_num = 0;
2603         ring->tail_skb = NULL;
2604         if (length <= HNS3_RX_HEAD_SIZE) {
2605                 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2606
2607                 /* We can reuse buffer as-is, just make sure it is local */
2608                 if (likely(page_to_nid(desc_cb->priv) == numa_node_id()))
2609                         desc_cb->reuse_flag = 1;
2610                 else /* This page cannot be reused so discard it */
2611                         put_page(desc_cb->priv);
2612
2613                 ring_ptr_move_fw(ring, next_to_clean);
2614                 return 0;
2615         }
2616         u64_stats_update_begin(&ring->syncp);
2617         ring->stats.seg_pkt_cnt++;
2618         u64_stats_update_end(&ring->syncp);
2619
2620         ring->pull_len = eth_get_headlen(netdev, va, HNS3_RX_HEAD_SIZE);
2621         __skb_put(skb, ring->pull_len);
2622         hns3_nic_reuse_page(skb, ring->frag_num++, ring, ring->pull_len,
2623                             desc_cb);
2624         ring_ptr_move_fw(ring, next_to_clean);
2625
2626         return HNS3_NEED_ADD_FRAG;
2627 }
2628
2629 static int hns3_add_frag(struct hns3_enet_ring *ring, struct hns3_desc *desc,
2630                          struct sk_buff **out_skb, bool pending)
2631 {
2632         struct sk_buff *skb = *out_skb;
2633         struct sk_buff *head_skb = *out_skb;
2634         struct sk_buff *new_skb;
2635         struct hns3_desc_cb *desc_cb;
2636         struct hns3_desc *pre_desc;
2637         u32 bd_base_info;
2638         int pre_bd;
2639
2640         /* if there is pending bd, the SW param next_to_clean has moved
2641          * to next and the next is NULL
2642          */
2643         if (pending) {
2644                 pre_bd = (ring->next_to_clean - 1 + ring->desc_num) %
2645                         ring->desc_num;
2646                 pre_desc = &ring->desc[pre_bd];
2647                 bd_base_info = le32_to_cpu(pre_desc->rx.bd_base_info);
2648         } else {
2649                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2650         }
2651
2652         while (!(bd_base_info & BIT(HNS3_RXD_FE_B))) {
2653                 desc = &ring->desc[ring->next_to_clean];
2654                 desc_cb = &ring->desc_cb[ring->next_to_clean];
2655                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2656                 /* make sure HW write desc complete */
2657                 dma_rmb();
2658                 if (!(bd_base_info & BIT(HNS3_RXD_VLD_B)))
2659                         return -ENXIO;
2660
2661                 if (unlikely(ring->frag_num >= MAX_SKB_FRAGS)) {
2662                         new_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2663                                                  HNS3_RX_HEAD_SIZE);
2664                         if (unlikely(!new_skb)) {
2665                                 netdev_err(ring->tqp->handle->kinfo.netdev,
2666                                            "alloc rx skb frag fail\n");
2667                                 return -ENXIO;
2668                         }
2669                         ring->frag_num = 0;
2670
2671                         if (ring->tail_skb) {
2672                                 ring->tail_skb->next = new_skb;
2673                                 ring->tail_skb = new_skb;
2674                         } else {
2675                                 skb_shinfo(skb)->frag_list = new_skb;
2676                                 ring->tail_skb = new_skb;
2677                         }
2678                 }
2679
2680                 if (ring->tail_skb) {
2681                         head_skb->truesize += hnae3_buf_size(ring);
2682                         head_skb->data_len += le16_to_cpu(desc->rx.size);
2683                         head_skb->len += le16_to_cpu(desc->rx.size);
2684                         skb = ring->tail_skb;
2685                 }
2686
2687                 hns3_nic_reuse_page(skb, ring->frag_num++, ring, 0, desc_cb);
2688                 ring_ptr_move_fw(ring, next_to_clean);
2689                 ring->pending_buf++;
2690         }
2691
2692         return 0;
2693 }
2694
2695 static int hns3_set_gro_and_checksum(struct hns3_enet_ring *ring,
2696                                      struct sk_buff *skb, u32 l234info,
2697                                      u32 bd_base_info)
2698 {
2699         u16 gro_count;
2700         u32 l3_type;
2701
2702         gro_count = hnae3_get_field(l234info, HNS3_RXD_GRO_COUNT_M,
2703                                     HNS3_RXD_GRO_COUNT_S);
2704         /* if there is no HW GRO, do not set gro params */
2705         if (!gro_count) {
2706                 hns3_rx_checksum(ring, skb, l234info, bd_base_info);
2707                 return 0;
2708         }
2709
2710         NAPI_GRO_CB(skb)->count = gro_count;
2711
2712         l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2713                                   HNS3_RXD_L3ID_S);
2714         if (l3_type == HNS3_L3_TYPE_IPV4)
2715                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
2716         else if (l3_type == HNS3_L3_TYPE_IPV6)
2717                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
2718         else
2719                 return -EFAULT;
2720
2721         skb_shinfo(skb)->gso_size = hnae3_get_field(bd_base_info,
2722                                                     HNS3_RXD_GRO_SIZE_M,
2723                                                     HNS3_RXD_GRO_SIZE_S);
2724
2725         return  hns3_gro_complete(skb);
2726 }
2727
2728 static void hns3_set_rx_skb_rss_type(struct hns3_enet_ring *ring,
2729                                      struct sk_buff *skb, u32 rss_hash)
2730 {
2731         struct hnae3_handle *handle = ring->tqp->handle;
2732         enum pkt_hash_types rss_type;
2733
2734         if (rss_hash)
2735                 rss_type = handle->kinfo.rss_type;
2736         else
2737                 rss_type = PKT_HASH_TYPE_NONE;
2738
2739         skb_set_hash(skb, rss_hash, rss_type);
2740 }
2741
2742 static int hns3_handle_bdinfo(struct hns3_enet_ring *ring, struct sk_buff *skb)
2743 {
2744         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2745         enum hns3_pkt_l2t_type l2_frame_type;
2746         u32 bd_base_info, l234info;
2747         struct hns3_desc *desc;
2748         unsigned int len;
2749         int pre_ntc, ret;
2750
2751         /* bdinfo handled below is only valid on the last BD of the
2752          * current packet, and ring->next_to_clean indicates the first
2753          * descriptor of next packet, so need - 1 below.
2754          */
2755         pre_ntc = ring->next_to_clean ? (ring->next_to_clean - 1) :
2756                                         (ring->desc_num - 1);
2757         desc = &ring->desc[pre_ntc];
2758         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2759         l234info = le32_to_cpu(desc->rx.l234_info);
2760
2761         /* Based on hw strategy, the tag offloaded will be stored at
2762          * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2763          * in one layer tag case.
2764          */
2765         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2766                 u16 vlan_tag;
2767
2768                 if (hns3_parse_vlan_tag(ring, desc, l234info, &vlan_tag))
2769                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
2770                                                vlan_tag);
2771         }
2772
2773         if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B)))) {
2774                 u64_stats_update_begin(&ring->syncp);
2775                 ring->stats.non_vld_descs++;
2776                 u64_stats_update_end(&ring->syncp);
2777
2778                 return -EINVAL;
2779         }
2780
2781         if (unlikely(!desc->rx.pkt_len || (l234info & (BIT(HNS3_RXD_TRUNCAT_B) |
2782                                   BIT(HNS3_RXD_L2E_B))))) {
2783                 u64_stats_update_begin(&ring->syncp);
2784                 if (l234info & BIT(HNS3_RXD_L2E_B))
2785                         ring->stats.l2_err++;
2786                 else
2787                         ring->stats.err_pkt_len++;
2788                 u64_stats_update_end(&ring->syncp);
2789
2790                 return -EFAULT;
2791         }
2792
2793         len = skb->len;
2794
2795         /* Do update ip stack process */
2796         skb->protocol = eth_type_trans(skb, netdev);
2797
2798         /* This is needed in order to enable forwarding support */
2799         ret = hns3_set_gro_and_checksum(ring, skb, l234info, bd_base_info);
2800         if (unlikely(ret)) {
2801                 u64_stats_update_begin(&ring->syncp);
2802                 ring->stats.rx_err_cnt++;
2803                 u64_stats_update_end(&ring->syncp);
2804                 return ret;
2805         }
2806
2807         l2_frame_type = hnae3_get_field(l234info, HNS3_RXD_DMAC_M,
2808                                         HNS3_RXD_DMAC_S);
2809
2810         u64_stats_update_begin(&ring->syncp);
2811         ring->stats.rx_pkts++;
2812         ring->stats.rx_bytes += len;
2813
2814         if (l2_frame_type == HNS3_L2_TYPE_MULTICAST)
2815                 ring->stats.rx_multicast++;
2816
2817         u64_stats_update_end(&ring->syncp);
2818
2819         ring->tqp_vector->rx_group.total_bytes += len;
2820
2821         hns3_set_rx_skb_rss_type(ring, skb, le32_to_cpu(desc->rx.rss_hash));
2822         return 0;
2823 }
2824
2825 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2826                              struct sk_buff **out_skb)
2827 {
2828         struct sk_buff *skb = ring->skb;
2829         struct hns3_desc_cb *desc_cb;
2830         struct hns3_desc *desc;
2831         u32 bd_base_info;
2832         int length;
2833         int ret;
2834
2835         desc = &ring->desc[ring->next_to_clean];
2836         desc_cb = &ring->desc_cb[ring->next_to_clean];
2837
2838         prefetch(desc);
2839
2840         length = le16_to_cpu(desc->rx.size);
2841         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2842
2843         /* Check valid BD */
2844         if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B))))
2845                 return -ENXIO;
2846
2847         if (!skb)
2848                 ring->va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2849
2850         /* Prefetch first cache line of first page
2851          * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2852          * line size is 64B so need to prefetch twice to make it 128B. But in
2853          * actual we can have greater size of caches with 128B Level 1 cache
2854          * lines. In such a case, single fetch would suffice to cache in the
2855          * relevant part of the header.
2856          */
2857         prefetch(ring->va);
2858 #if L1_CACHE_BYTES < 128
2859         prefetch(ring->va + L1_CACHE_BYTES);
2860 #endif
2861
2862         if (!skb) {
2863                 ret = hns3_alloc_skb(ring, length, ring->va);
2864                 *out_skb = skb = ring->skb;
2865
2866                 if (ret < 0) /* alloc buffer fail */
2867                         return ret;
2868                 if (ret > 0) { /* need add frag */
2869                         ret = hns3_add_frag(ring, desc, &skb, false);
2870                         if (ret)
2871                                 return ret;
2872
2873                         /* As the head data may be changed when GRO enable, copy
2874                          * the head data in after other data rx completed
2875                          */
2876                         memcpy(skb->data, ring->va,
2877                                ALIGN(ring->pull_len, sizeof(long)));
2878                 }
2879         } else {
2880                 ret = hns3_add_frag(ring, desc, &skb, true);
2881                 if (ret)
2882                         return ret;
2883
2884                 /* As the head data may be changed when GRO enable, copy
2885                  * the head data in after other data rx completed
2886                  */
2887                 memcpy(skb->data, ring->va,
2888                        ALIGN(ring->pull_len, sizeof(long)));
2889         }
2890
2891         ret = hns3_handle_bdinfo(ring, skb);
2892         if (unlikely(ret)) {
2893                 dev_kfree_skb_any(skb);
2894                 return ret;
2895         }
2896
2897         *out_skb = skb;
2898
2899         return 0;
2900 }
2901
2902 int hns3_clean_rx_ring(
2903                 struct hns3_enet_ring *ring, int budget,
2904                 void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
2905 {
2906 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2907         int recv_pkts, recv_bds, clean_count, err;
2908         int unused_count = hns3_desc_unused(ring);
2909         struct sk_buff *skb = ring->skb;
2910         int num;
2911
2912         num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2913         rmb(); /* Make sure num taken effect before the other data is touched */
2914
2915         recv_pkts = 0, recv_bds = 0, clean_count = 0;
2916         num -= unused_count;
2917         unused_count -= ring->pending_buf;
2918
2919         while (recv_pkts < budget && recv_bds < num) {
2920                 /* Reuse or realloc buffers */
2921                 if (clean_count + unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2922                         hns3_nic_alloc_rx_buffers(ring,
2923                                                   clean_count + unused_count);
2924                         clean_count = 0;
2925                         unused_count = hns3_desc_unused(ring) -
2926                                         ring->pending_buf;
2927                 }
2928
2929                 /* Poll one pkt */
2930                 err = hns3_handle_rx_bd(ring, &skb);
2931                 if (unlikely(!skb)) /* This fault cannot be repaired */
2932                         goto out;
2933
2934                 if (err == -ENXIO) { /* Do not get FE for the packet */
2935                         goto out;
2936                 } else if (unlikely(err)) {  /* Do jump the err */
2937                         recv_bds += ring->pending_buf;
2938                         clean_count += ring->pending_buf;
2939                         ring->skb = NULL;
2940                         ring->pending_buf = 0;
2941                         continue;
2942                 }
2943
2944                 rx_fn(ring, skb);
2945                 recv_bds += ring->pending_buf;
2946                 clean_count += ring->pending_buf;
2947                 ring->skb = NULL;
2948                 ring->pending_buf = 0;
2949
2950                 recv_pkts++;
2951         }
2952
2953 out:
2954         /* Make all data has been write before submit */
2955         if (clean_count + unused_count > 0)
2956                 hns3_nic_alloc_rx_buffers(ring,
2957                                           clean_count + unused_count);
2958
2959         return recv_pkts;
2960 }
2961
2962 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
2963 {
2964         struct hns3_enet_tqp_vector *tqp_vector =
2965                                         ring_group->ring->tqp_vector;
2966         enum hns3_flow_level_range new_flow_level;
2967         int packets_per_msecs;
2968         int bytes_per_msecs;
2969         u32 time_passed_ms;
2970         u16 new_int_gl;
2971
2972         if (!tqp_vector->last_jiffies)
2973                 return false;
2974
2975         if (ring_group->total_packets == 0) {
2976                 ring_group->coal.int_gl = HNS3_INT_GL_50K;
2977                 ring_group->coal.flow_level = HNS3_FLOW_LOW;
2978                 return true;
2979         }
2980
2981         /* Simple throttlerate management
2982          * 0-10MB/s   lower     (50000 ints/s)
2983          * 10-20MB/s   middle    (20000 ints/s)
2984          * 20-1249MB/s high      (18000 ints/s)
2985          * > 40000pps  ultra     (8000 ints/s)
2986          */
2987         new_flow_level = ring_group->coal.flow_level;
2988         new_int_gl = ring_group->coal.int_gl;
2989         time_passed_ms =
2990                 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
2991
2992         if (!time_passed_ms)
2993                 return false;
2994
2995         do_div(ring_group->total_packets, time_passed_ms);
2996         packets_per_msecs = ring_group->total_packets;
2997
2998         do_div(ring_group->total_bytes, time_passed_ms);
2999         bytes_per_msecs = ring_group->total_bytes;
3000
3001 #define HNS3_RX_LOW_BYTE_RATE 10000
3002 #define HNS3_RX_MID_BYTE_RATE 20000
3003
3004         switch (new_flow_level) {
3005         case HNS3_FLOW_LOW:
3006                 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
3007                         new_flow_level = HNS3_FLOW_MID;
3008                 break;
3009         case HNS3_FLOW_MID:
3010                 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
3011                         new_flow_level = HNS3_FLOW_HIGH;
3012                 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
3013                         new_flow_level = HNS3_FLOW_LOW;
3014                 break;
3015         case HNS3_FLOW_HIGH:
3016         case HNS3_FLOW_ULTRA:
3017         default:
3018                 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
3019                         new_flow_level = HNS3_FLOW_MID;
3020                 break;
3021         }
3022
3023 #define HNS3_RX_ULTRA_PACKET_RATE 40
3024
3025         if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
3026             &tqp_vector->rx_group == ring_group)
3027                 new_flow_level = HNS3_FLOW_ULTRA;
3028
3029         switch (new_flow_level) {
3030         case HNS3_FLOW_LOW:
3031                 new_int_gl = HNS3_INT_GL_50K;
3032                 break;
3033         case HNS3_FLOW_MID:
3034                 new_int_gl = HNS3_INT_GL_20K;
3035                 break;
3036         case HNS3_FLOW_HIGH:
3037                 new_int_gl = HNS3_INT_GL_18K;
3038                 break;
3039         case HNS3_FLOW_ULTRA:
3040                 new_int_gl = HNS3_INT_GL_8K;
3041                 break;
3042         default:
3043                 break;
3044         }
3045
3046         ring_group->total_bytes = 0;
3047         ring_group->total_packets = 0;
3048         ring_group->coal.flow_level = new_flow_level;
3049         if (new_int_gl != ring_group->coal.int_gl) {
3050                 ring_group->coal.int_gl = new_int_gl;
3051                 return true;
3052         }
3053         return false;
3054 }
3055
3056 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
3057 {
3058         struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
3059         struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
3060         bool rx_update, tx_update;
3061
3062         /* update param every 1000ms */
3063         if (time_before(jiffies,
3064                         tqp_vector->last_jiffies + msecs_to_jiffies(1000)))
3065                 return;
3066
3067         if (rx_group->coal.gl_adapt_enable) {
3068                 rx_update = hns3_get_new_int_gl(rx_group);
3069                 if (rx_update)
3070                         hns3_set_vector_coalesce_rx_gl(tqp_vector,
3071                                                        rx_group->coal.int_gl);
3072         }
3073
3074         if (tx_group->coal.gl_adapt_enable) {
3075                 tx_update = hns3_get_new_int_gl(tx_group);
3076                 if (tx_update)
3077                         hns3_set_vector_coalesce_tx_gl(tqp_vector,
3078                                                        tx_group->coal.int_gl);
3079         }
3080
3081         tqp_vector->last_jiffies = jiffies;
3082 }
3083
3084 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
3085 {
3086         struct hns3_nic_priv *priv = netdev_priv(napi->dev);
3087         struct hns3_enet_ring *ring;
3088         int rx_pkt_total = 0;
3089
3090         struct hns3_enet_tqp_vector *tqp_vector =
3091                 container_of(napi, struct hns3_enet_tqp_vector, napi);
3092         bool clean_complete = true;
3093         int rx_budget = budget;
3094
3095         if (unlikely(test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3096                 napi_complete(napi);
3097                 return 0;
3098         }
3099
3100         /* Since the actual Tx work is minimal, we can give the Tx a larger
3101          * budget and be more aggressive about cleaning up the Tx descriptors.
3102          */
3103         hns3_for_each_ring(ring, tqp_vector->tx_group)
3104                 hns3_clean_tx_ring(ring);
3105
3106         /* make sure rx ring budget not smaller than 1 */
3107         if (tqp_vector->num_tqps > 1)
3108                 rx_budget = max(budget / tqp_vector->num_tqps, 1);
3109
3110         hns3_for_each_ring(ring, tqp_vector->rx_group) {
3111                 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
3112                                                     hns3_rx_skb);
3113
3114                 if (rx_cleaned >= rx_budget)
3115                         clean_complete = false;
3116
3117                 rx_pkt_total += rx_cleaned;
3118         }
3119
3120         tqp_vector->rx_group.total_packets += rx_pkt_total;
3121
3122         if (!clean_complete)
3123                 return budget;
3124
3125         if (napi_complete(napi) &&
3126             likely(!test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3127                 hns3_update_new_int_gl(tqp_vector);
3128                 hns3_mask_vector_irq(tqp_vector, 1);
3129         }
3130
3131         return rx_pkt_total;
3132 }
3133
3134 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3135                                       struct hnae3_ring_chain_node *head)
3136 {
3137         struct pci_dev *pdev = tqp_vector->handle->pdev;
3138         struct hnae3_ring_chain_node *cur_chain = head;
3139         struct hnae3_ring_chain_node *chain;
3140         struct hns3_enet_ring *tx_ring;
3141         struct hns3_enet_ring *rx_ring;
3142
3143         tx_ring = tqp_vector->tx_group.ring;
3144         if (tx_ring) {
3145                 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
3146                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3147                               HNAE3_RING_TYPE_TX);
3148                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3149                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
3150
3151                 cur_chain->next = NULL;
3152
3153                 while (tx_ring->next) {
3154                         tx_ring = tx_ring->next;
3155
3156                         chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
3157                                              GFP_KERNEL);
3158                         if (!chain)
3159                                 goto err_free_chain;
3160
3161                         cur_chain->next = chain;
3162                         chain->tqp_index = tx_ring->tqp->tqp_index;
3163                         hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3164                                       HNAE3_RING_TYPE_TX);
3165                         hnae3_set_field(chain->int_gl_idx,
3166                                         HNAE3_RING_GL_IDX_M,
3167                                         HNAE3_RING_GL_IDX_S,
3168                                         HNAE3_RING_GL_TX);
3169
3170                         cur_chain = chain;
3171                 }
3172         }
3173
3174         rx_ring = tqp_vector->rx_group.ring;
3175         if (!tx_ring && rx_ring) {
3176                 cur_chain->next = NULL;
3177                 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
3178                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3179                               HNAE3_RING_TYPE_RX);
3180                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3181                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3182
3183                 rx_ring = rx_ring->next;
3184         }
3185
3186         while (rx_ring) {
3187                 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
3188                 if (!chain)
3189                         goto err_free_chain;
3190
3191                 cur_chain->next = chain;
3192                 chain->tqp_index = rx_ring->tqp->tqp_index;
3193                 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3194                               HNAE3_RING_TYPE_RX);
3195                 hnae3_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3196                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3197
3198                 cur_chain = chain;
3199
3200                 rx_ring = rx_ring->next;
3201         }
3202
3203         return 0;
3204
3205 err_free_chain:
3206         cur_chain = head->next;
3207         while (cur_chain) {
3208                 chain = cur_chain->next;
3209                 devm_kfree(&pdev->dev, cur_chain);
3210                 cur_chain = chain;
3211         }
3212         head->next = NULL;
3213
3214         return -ENOMEM;
3215 }
3216
3217 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3218                                         struct hnae3_ring_chain_node *head)
3219 {
3220         struct pci_dev *pdev = tqp_vector->handle->pdev;
3221         struct hnae3_ring_chain_node *chain_tmp, *chain;
3222
3223         chain = head->next;
3224
3225         while (chain) {
3226                 chain_tmp = chain->next;
3227                 devm_kfree(&pdev->dev, chain);
3228                 chain = chain_tmp;
3229         }
3230 }
3231
3232 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
3233                                    struct hns3_enet_ring *ring)
3234 {
3235         ring->next = group->ring;
3236         group->ring = ring;
3237
3238         group->count++;
3239 }
3240
3241 static void hns3_nic_set_cpumask(struct hns3_nic_priv *priv)
3242 {
3243         struct pci_dev *pdev = priv->ae_handle->pdev;
3244         struct hns3_enet_tqp_vector *tqp_vector;
3245         int num_vectors = priv->vector_num;
3246         int numa_node;
3247         int vector_i;
3248
3249         numa_node = dev_to_node(&pdev->dev);
3250
3251         for (vector_i = 0; vector_i < num_vectors; vector_i++) {
3252                 tqp_vector = &priv->tqp_vector[vector_i];
3253                 cpumask_set_cpu(cpumask_local_spread(vector_i, numa_node),
3254                                 &tqp_vector->affinity_mask);
3255         }
3256 }
3257
3258 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
3259 {
3260         struct hnae3_ring_chain_node vector_ring_chain;
3261         struct hnae3_handle *h = priv->ae_handle;
3262         struct hns3_enet_tqp_vector *tqp_vector;
3263         int ret = 0;
3264         int i;
3265
3266         hns3_nic_set_cpumask(priv);
3267
3268         for (i = 0; i < priv->vector_num; i++) {
3269                 tqp_vector = &priv->tqp_vector[i];
3270                 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
3271                 tqp_vector->num_tqps = 0;
3272         }
3273
3274         for (i = 0; i < h->kinfo.num_tqps; i++) {
3275                 u16 vector_i = i % priv->vector_num;
3276                 u16 tqp_num = h->kinfo.num_tqps;
3277
3278                 tqp_vector = &priv->tqp_vector[vector_i];
3279
3280                 hns3_add_ring_to_group(&tqp_vector->tx_group,
3281                                        priv->ring_data[i].ring);
3282
3283                 hns3_add_ring_to_group(&tqp_vector->rx_group,
3284                                        priv->ring_data[i + tqp_num].ring);
3285
3286                 priv->ring_data[i].ring->tqp_vector = tqp_vector;
3287                 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
3288                 tqp_vector->num_tqps++;
3289         }
3290
3291         for (i = 0; i < priv->vector_num; i++) {
3292                 tqp_vector = &priv->tqp_vector[i];
3293
3294                 tqp_vector->rx_group.total_bytes = 0;
3295                 tqp_vector->rx_group.total_packets = 0;
3296                 tqp_vector->tx_group.total_bytes = 0;
3297                 tqp_vector->tx_group.total_packets = 0;
3298                 tqp_vector->handle = h;
3299
3300                 ret = hns3_get_vector_ring_chain(tqp_vector,
3301                                                  &vector_ring_chain);
3302                 if (ret)
3303                         goto map_ring_fail;
3304
3305                 ret = h->ae_algo->ops->map_ring_to_vector(h,
3306                         tqp_vector->vector_irq, &vector_ring_chain);
3307
3308                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3309
3310                 if (ret)
3311                         goto map_ring_fail;
3312
3313                 netif_napi_add(priv->netdev, &tqp_vector->napi,
3314                                hns3_nic_common_poll, NAPI_POLL_WEIGHT);
3315         }
3316
3317         return 0;
3318
3319 map_ring_fail:
3320         while (i--)
3321                 netif_napi_del(&priv->tqp_vector[i].napi);
3322
3323         return ret;
3324 }
3325
3326 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
3327 {
3328 #define HNS3_VECTOR_PF_MAX_NUM          64
3329
3330         struct hnae3_handle *h = priv->ae_handle;
3331         struct hns3_enet_tqp_vector *tqp_vector;
3332         struct hnae3_vector_info *vector;
3333         struct pci_dev *pdev = h->pdev;
3334         u16 tqp_num = h->kinfo.num_tqps;
3335         u16 vector_num;
3336         int ret = 0;
3337         u16 i;
3338
3339         /* RSS size, cpu online and vector_num should be the same */
3340         /* Should consider 2p/4p later */
3341         vector_num = min_t(u16, num_online_cpus(), tqp_num);
3342         vector_num = min_t(u16, vector_num, HNS3_VECTOR_PF_MAX_NUM);
3343
3344         vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
3345                               GFP_KERNEL);
3346         if (!vector)
3347                 return -ENOMEM;
3348
3349         vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
3350
3351         priv->vector_num = vector_num;
3352         priv->tqp_vector = (struct hns3_enet_tqp_vector *)
3353                 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
3354                              GFP_KERNEL);
3355         if (!priv->tqp_vector) {
3356                 ret = -ENOMEM;
3357                 goto out;
3358         }
3359
3360         for (i = 0; i < priv->vector_num; i++) {
3361                 tqp_vector = &priv->tqp_vector[i];
3362                 tqp_vector->idx = i;
3363                 tqp_vector->mask_addr = vector[i].io_addr;
3364                 tqp_vector->vector_irq = vector[i].vector;
3365                 hns3_vector_gl_rl_init(tqp_vector, priv);
3366         }
3367
3368 out:
3369         devm_kfree(&pdev->dev, vector);
3370         return ret;
3371 }
3372
3373 static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
3374 {
3375         group->ring = NULL;
3376         group->count = 0;
3377 }
3378
3379 static void hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
3380 {
3381         struct hnae3_ring_chain_node vector_ring_chain;
3382         struct hnae3_handle *h = priv->ae_handle;
3383         struct hns3_enet_tqp_vector *tqp_vector;
3384         int i;
3385
3386         for (i = 0; i < priv->vector_num; i++) {
3387                 tqp_vector = &priv->tqp_vector[i];
3388
3389                 if (!tqp_vector->rx_group.ring && !tqp_vector->tx_group.ring)
3390                         continue;
3391
3392                 hns3_get_vector_ring_chain(tqp_vector, &vector_ring_chain);
3393
3394                 h->ae_algo->ops->unmap_ring_from_vector(h,
3395                         tqp_vector->vector_irq, &vector_ring_chain);
3396
3397                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3398
3399                 if (tqp_vector->irq_init_flag == HNS3_VECTOR_INITED) {
3400                         irq_set_affinity_notifier(tqp_vector->vector_irq,
3401                                                   NULL);
3402                         irq_set_affinity_hint(tqp_vector->vector_irq, NULL);
3403                         free_irq(tqp_vector->vector_irq, tqp_vector);
3404                         tqp_vector->irq_init_flag = HNS3_VECTOR_NOT_INITED;
3405                 }
3406
3407                 hns3_clear_ring_group(&tqp_vector->rx_group);
3408                 hns3_clear_ring_group(&tqp_vector->tx_group);
3409                 netif_napi_del(&priv->tqp_vector[i].napi);
3410         }
3411 }
3412
3413 static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
3414 {
3415         struct hnae3_handle *h = priv->ae_handle;
3416         struct pci_dev *pdev = h->pdev;
3417         int i, ret;
3418
3419         for (i = 0; i < priv->vector_num; i++) {
3420                 struct hns3_enet_tqp_vector *tqp_vector;
3421
3422                 tqp_vector = &priv->tqp_vector[i];
3423                 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
3424                 if (ret)
3425                         return ret;
3426         }
3427
3428         devm_kfree(&pdev->dev, priv->tqp_vector);
3429         return 0;
3430 }
3431
3432 static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
3433                              int ring_type)
3434 {
3435         struct hns3_nic_ring_data *ring_data = priv->ring_data;
3436         int queue_num = priv->ae_handle->kinfo.num_tqps;
3437         struct pci_dev *pdev = priv->ae_handle->pdev;
3438         struct hns3_enet_ring *ring;
3439         int desc_num;
3440
3441         ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
3442         if (!ring)
3443                 return -ENOMEM;
3444
3445         if (ring_type == HNAE3_RING_TYPE_TX) {
3446                 desc_num = priv->ae_handle->kinfo.num_tx_desc;
3447                 ring_data[q->tqp_index].ring = ring;
3448                 ring_data[q->tqp_index].queue_index = q->tqp_index;
3449                 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
3450         } else {
3451                 desc_num = priv->ae_handle->kinfo.num_rx_desc;
3452                 ring_data[q->tqp_index + queue_num].ring = ring;
3453                 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
3454                 ring->io_base = q->io_base;
3455         }
3456
3457         hnae3_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
3458
3459         ring->tqp = q;
3460         ring->desc = NULL;
3461         ring->desc_cb = NULL;
3462         ring->dev = priv->dev;
3463         ring->desc_dma_addr = 0;
3464         ring->buf_size = q->buf_size;
3465         ring->desc_num = desc_num;
3466         ring->next_to_use = 0;
3467         ring->next_to_clean = 0;
3468
3469         return 0;
3470 }
3471
3472 static int hns3_queue_to_ring(struct hnae3_queue *tqp,
3473                               struct hns3_nic_priv *priv)
3474 {
3475         int ret;
3476
3477         ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
3478         if (ret)
3479                 return ret;
3480
3481         ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
3482         if (ret) {
3483                 devm_kfree(priv->dev, priv->ring_data[tqp->tqp_index].ring);
3484                 return ret;
3485         }
3486
3487         return 0;
3488 }
3489
3490 static int hns3_get_ring_config(struct hns3_nic_priv *priv)
3491 {
3492         struct hnae3_handle *h = priv->ae_handle;
3493         struct pci_dev *pdev = h->pdev;
3494         int i, ret;
3495
3496         priv->ring_data =  devm_kzalloc(&pdev->dev,
3497                                         array3_size(h->kinfo.num_tqps,
3498                                                     sizeof(*priv->ring_data),
3499                                                     2),
3500                                         GFP_KERNEL);
3501         if (!priv->ring_data)
3502                 return -ENOMEM;
3503
3504         for (i = 0; i < h->kinfo.num_tqps; i++) {
3505                 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
3506                 if (ret)
3507                         goto err;
3508         }
3509
3510         return 0;
3511 err:
3512         while (i--) {
3513                 devm_kfree(priv->dev, priv->ring_data[i].ring);
3514                 devm_kfree(priv->dev,
3515                            priv->ring_data[i + h->kinfo.num_tqps].ring);
3516         }
3517
3518         devm_kfree(&pdev->dev, priv->ring_data);
3519         priv->ring_data = NULL;
3520         return ret;
3521 }
3522
3523 static void hns3_put_ring_config(struct hns3_nic_priv *priv)
3524 {
3525         struct hnae3_handle *h = priv->ae_handle;
3526         int i;
3527
3528         if (!priv->ring_data)
3529                 return;
3530
3531         for (i = 0; i < h->kinfo.num_tqps; i++) {
3532                 devm_kfree(priv->dev, priv->ring_data[i].ring);
3533                 devm_kfree(priv->dev,
3534                            priv->ring_data[i + h->kinfo.num_tqps].ring);
3535         }
3536         devm_kfree(priv->dev, priv->ring_data);
3537         priv->ring_data = NULL;
3538 }
3539
3540 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
3541 {
3542         int ret;
3543
3544         if (ring->desc_num <= 0 || ring->buf_size <= 0)
3545                 return -EINVAL;
3546
3547         ring->desc_cb = kcalloc(ring->desc_num, sizeof(ring->desc_cb[0]),
3548                                 GFP_KERNEL);
3549         if (!ring->desc_cb) {
3550                 ret = -ENOMEM;
3551                 goto out;
3552         }
3553
3554         ret = hns3_alloc_desc(ring);
3555         if (ret)
3556                 goto out_with_desc_cb;
3557
3558         if (!HNAE3_IS_TX_RING(ring)) {
3559                 ret = hns3_alloc_ring_buffers(ring);
3560                 if (ret)
3561                         goto out_with_desc;
3562         }
3563
3564         return 0;
3565
3566 out_with_desc:
3567         hns3_free_desc(ring);
3568 out_with_desc_cb:
3569         kfree(ring->desc_cb);
3570         ring->desc_cb = NULL;
3571 out:
3572         return ret;
3573 }
3574
3575 static void hns3_fini_ring(struct hns3_enet_ring *ring)
3576 {
3577         hns3_free_desc(ring);
3578         kfree(ring->desc_cb);
3579         ring->desc_cb = NULL;
3580         ring->next_to_clean = 0;
3581         ring->next_to_use = 0;
3582         ring->pending_buf = 0;
3583         if (ring->skb) {
3584                 dev_kfree_skb_any(ring->skb);
3585                 ring->skb = NULL;
3586         }
3587 }
3588
3589 static int hns3_buf_size2type(u32 buf_size)
3590 {
3591         int bd_size_type;
3592
3593         switch (buf_size) {
3594         case 512:
3595                 bd_size_type = HNS3_BD_SIZE_512_TYPE;
3596                 break;
3597         case 1024:
3598                 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
3599                 break;
3600         case 2048:
3601                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3602                 break;
3603         case 4096:
3604                 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
3605                 break;
3606         default:
3607                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3608         }
3609
3610         return bd_size_type;
3611 }
3612
3613 static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
3614 {
3615         dma_addr_t dma = ring->desc_dma_addr;
3616         struct hnae3_queue *q = ring->tqp;
3617
3618         if (!HNAE3_IS_TX_RING(ring)) {
3619                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG,
3620                                (u32)dma);
3621                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
3622                                (u32)((dma >> 31) >> 1));
3623
3624                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
3625                                hns3_buf_size2type(ring->buf_size));
3626                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
3627                                ring->desc_num / 8 - 1);
3628
3629         } else {
3630                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
3631                                (u32)dma);
3632                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
3633                                (u32)((dma >> 31) >> 1));
3634
3635                 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3636                                ring->desc_num / 8 - 1);
3637         }
3638 }
3639
3640 static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
3641 {
3642         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3643         int i;
3644
3645         for (i = 0; i < HNAE3_MAX_TC; i++) {
3646                 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3647                 int j;
3648
3649                 if (!tc_info->enable)
3650                         continue;
3651
3652                 for (j = 0; j < tc_info->tqp_count; j++) {
3653                         struct hnae3_queue *q;
3654
3655                         q = priv->ring_data[tc_info->tqp_offset + j].ring->tqp;
3656                         hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
3657                                        tc_info->tc);
3658                 }
3659         }
3660 }
3661
3662 int hns3_init_all_ring(struct hns3_nic_priv *priv)
3663 {
3664         struct hnae3_handle *h = priv->ae_handle;
3665         int ring_num = h->kinfo.num_tqps * 2;
3666         int i, j;
3667         int ret;
3668
3669         for (i = 0; i < ring_num; i++) {
3670                 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
3671                 if (ret) {
3672                         dev_err(priv->dev,
3673                                 "Alloc ring memory fail! ret=%d\n", ret);
3674                         goto out_when_alloc_ring_memory;
3675                 }
3676
3677                 u64_stats_init(&priv->ring_data[i].ring->syncp);
3678         }
3679
3680         return 0;
3681
3682 out_when_alloc_ring_memory:
3683         for (j = i - 1; j >= 0; j--)
3684                 hns3_fini_ring(priv->ring_data[j].ring);
3685
3686         return -ENOMEM;
3687 }
3688
3689 int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
3690 {
3691         struct hnae3_handle *h = priv->ae_handle;
3692         int i;
3693
3694         for (i = 0; i < h->kinfo.num_tqps; i++) {
3695                 hns3_fini_ring(priv->ring_data[i].ring);
3696                 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
3697         }
3698         return 0;
3699 }
3700
3701 /* Set mac addr if it is configured. or leave it to the AE driver */
3702 static int hns3_init_mac_addr(struct net_device *netdev, bool init)
3703 {
3704         struct hns3_nic_priv *priv = netdev_priv(netdev);
3705         struct hnae3_handle *h = priv->ae_handle;
3706         u8 mac_addr_temp[ETH_ALEN];
3707         int ret = 0;
3708
3709         if (h->ae_algo->ops->get_mac_addr && init) {
3710                 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3711                 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3712         }
3713
3714         /* Check if the MAC address is valid, if not get a random one */
3715         if (!is_valid_ether_addr(netdev->dev_addr)) {
3716                 eth_hw_addr_random(netdev);
3717                 dev_warn(priv->dev, "using random MAC address %pM\n",
3718                          netdev->dev_addr);
3719         }
3720
3721         if (h->ae_algo->ops->set_mac_addr)
3722                 ret = h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
3723
3724         return ret;
3725 }
3726
3727 static int hns3_init_phy(struct net_device *netdev)
3728 {
3729         struct hnae3_handle *h = hns3_get_handle(netdev);
3730         int ret = 0;
3731
3732         if (h->ae_algo->ops->mac_connect_phy)
3733                 ret = h->ae_algo->ops->mac_connect_phy(h);
3734
3735         return ret;
3736 }
3737
3738 static void hns3_uninit_phy(struct net_device *netdev)
3739 {
3740         struct hnae3_handle *h = hns3_get_handle(netdev);
3741
3742         if (h->ae_algo->ops->mac_disconnect_phy)
3743                 h->ae_algo->ops->mac_disconnect_phy(h);
3744 }
3745
3746 static int hns3_restore_fd_rules(struct net_device *netdev)
3747 {
3748         struct hnae3_handle *h = hns3_get_handle(netdev);
3749         int ret = 0;
3750
3751         if (h->ae_algo->ops->restore_fd_rules)
3752                 ret = h->ae_algo->ops->restore_fd_rules(h);
3753
3754         return ret;
3755 }
3756
3757 static void hns3_del_all_fd_rules(struct net_device *netdev, bool clear_list)
3758 {
3759         struct hnae3_handle *h = hns3_get_handle(netdev);
3760
3761         if (h->ae_algo->ops->del_all_fd_entries)
3762                 h->ae_algo->ops->del_all_fd_entries(h, clear_list);
3763 }
3764
3765 static int hns3_client_start(struct hnae3_handle *handle)
3766 {
3767         if (!handle->ae_algo->ops->client_start)
3768                 return 0;
3769
3770         return handle->ae_algo->ops->client_start(handle);
3771 }
3772
3773 static void hns3_client_stop(struct hnae3_handle *handle)
3774 {
3775         if (!handle->ae_algo->ops->client_stop)
3776                 return;
3777
3778         handle->ae_algo->ops->client_stop(handle);
3779 }
3780
3781 static void hns3_info_show(struct hns3_nic_priv *priv)
3782 {
3783         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3784
3785         dev_info(priv->dev, "MAC address: %pM\n", priv->netdev->dev_addr);
3786         dev_info(priv->dev, "Task queue pairs numbers: %d\n", kinfo->num_tqps);
3787         dev_info(priv->dev, "RSS size: %d\n", kinfo->rss_size);
3788         dev_info(priv->dev, "Allocated RSS size: %d\n", kinfo->req_rss_size);
3789         dev_info(priv->dev, "RX buffer length: %d\n", kinfo->rx_buf_len);
3790         dev_info(priv->dev, "Desc num per TX queue: %d\n", kinfo->num_tx_desc);
3791         dev_info(priv->dev, "Desc num per RX queue: %d\n", kinfo->num_rx_desc);
3792         dev_info(priv->dev, "Total number of enabled TCs: %d\n", kinfo->num_tc);
3793         dev_info(priv->dev, "Max mtu size: %d\n", priv->netdev->max_mtu);
3794 }
3795
3796 static int hns3_client_init(struct hnae3_handle *handle)
3797 {
3798         struct pci_dev *pdev = handle->pdev;
3799         u16 alloc_tqps, max_rss_size;
3800         struct hns3_nic_priv *priv;
3801         struct net_device *netdev;
3802         int ret;
3803
3804         handle->ae_algo->ops->get_tqps_and_rss_info(handle, &alloc_tqps,
3805                                                     &max_rss_size);
3806         netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);
3807         if (!netdev)
3808                 return -ENOMEM;
3809
3810         priv = netdev_priv(netdev);
3811         priv->dev = &pdev->dev;
3812         priv->netdev = netdev;
3813         priv->ae_handle = handle;
3814         priv->tx_timeout_count = 0;
3815         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
3816
3817         handle->msg_enable = netif_msg_init(debug, DEFAULT_MSG_LEVEL);
3818
3819         handle->kinfo.netdev = netdev;
3820         handle->priv = (void *)priv;
3821
3822         hns3_init_mac_addr(netdev, true);
3823
3824         hns3_set_default_feature(netdev);
3825
3826         netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3827         netdev->priv_flags |= IFF_UNICAST_FLT;
3828         netdev->netdev_ops = &hns3_nic_netdev_ops;
3829         SET_NETDEV_DEV(netdev, &pdev->dev);
3830         hns3_ethtool_set_ops(netdev);
3831
3832         /* Carrier off reporting is important to ethtool even BEFORE open */
3833         netif_carrier_off(netdev);
3834
3835         ret = hns3_get_ring_config(priv);
3836         if (ret) {
3837                 ret = -ENOMEM;
3838                 goto out_get_ring_cfg;
3839         }
3840
3841         ret = hns3_nic_alloc_vector_data(priv);
3842         if (ret) {
3843                 ret = -ENOMEM;
3844                 goto out_alloc_vector_data;
3845         }
3846
3847         ret = hns3_nic_init_vector_data(priv);
3848         if (ret) {
3849                 ret = -ENOMEM;
3850                 goto out_init_vector_data;
3851         }
3852
3853         ret = hns3_init_all_ring(priv);
3854         if (ret) {
3855                 ret = -ENOMEM;
3856                 goto out_init_ring_data;
3857         }
3858
3859         ret = hns3_init_phy(netdev);
3860         if (ret)
3861                 goto out_init_phy;
3862
3863         ret = register_netdev(netdev);
3864         if (ret) {
3865                 dev_err(priv->dev, "probe register netdev fail!\n");
3866                 goto out_reg_netdev_fail;
3867         }
3868
3869         ret = hns3_client_start(handle);
3870         if (ret) {
3871                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
3872                         goto out_client_start;
3873         }
3874
3875         hns3_dcbnl_setup(handle);
3876
3877         hns3_dbg_init(handle);
3878
3879         /* MTU range: (ETH_MIN_MTU(kernel default) - 9702) */
3880         netdev->max_mtu = HNS3_MAX_MTU;
3881
3882         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
3883
3884         if (netif_msg_drv(handle))
3885                 hns3_info_show(priv);
3886
3887         return ret;
3888
3889 out_client_start:
3890         unregister_netdev(netdev);
3891 out_reg_netdev_fail:
3892         hns3_uninit_phy(netdev);
3893 out_init_phy:
3894         hns3_uninit_all_ring(priv);
3895 out_init_ring_data:
3896         hns3_nic_uninit_vector_data(priv);
3897 out_init_vector_data:
3898         hns3_nic_dealloc_vector_data(priv);
3899 out_alloc_vector_data:
3900         priv->ring_data = NULL;
3901 out_get_ring_cfg:
3902         priv->ae_handle = NULL;
3903         free_netdev(netdev);
3904         return ret;
3905 }
3906
3907 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
3908 {
3909         struct net_device *netdev = handle->kinfo.netdev;
3910         struct hns3_nic_priv *priv = netdev_priv(netdev);
3911         int ret;
3912
3913         hns3_remove_hw_addr(netdev);
3914
3915         if (netdev->reg_state != NETREG_UNINITIALIZED)
3916                 unregister_netdev(netdev);
3917
3918         hns3_client_stop(handle);
3919
3920         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
3921                 netdev_warn(netdev, "already uninitialized\n");
3922                 goto out_netdev_free;
3923         }
3924
3925         hns3_del_all_fd_rules(netdev, true);
3926
3927         hns3_force_clear_all_rx_ring(handle);
3928
3929         hns3_uninit_phy(netdev);
3930
3931         hns3_nic_uninit_vector_data(priv);
3932
3933         ret = hns3_nic_dealloc_vector_data(priv);
3934         if (ret)
3935                 netdev_err(netdev, "dealloc vector error\n");
3936
3937         ret = hns3_uninit_all_ring(priv);
3938         if (ret)
3939                 netdev_err(netdev, "uninit ring error\n");
3940
3941         hns3_put_ring_config(priv);
3942
3943         hns3_dbg_uninit(handle);
3944
3945 out_netdev_free:
3946         free_netdev(netdev);
3947 }
3948
3949 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
3950 {
3951         struct net_device *netdev = handle->kinfo.netdev;
3952
3953         if (!netdev)
3954                 return;
3955
3956         if (linkup) {
3957                 netif_carrier_on(netdev);
3958                 netif_tx_wake_all_queues(netdev);
3959                 if (netif_msg_link(handle))
3960                         netdev_info(netdev, "link up\n");
3961         } else {
3962                 netif_carrier_off(netdev);
3963                 netif_tx_stop_all_queues(netdev);
3964                 if (netif_msg_link(handle))
3965                         netdev_info(netdev, "link down\n");
3966         }
3967 }
3968
3969 static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
3970 {
3971         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3972         struct net_device *ndev = kinfo->netdev;
3973
3974         if (tc > HNAE3_MAX_TC)
3975                 return -EINVAL;
3976
3977         if (!ndev)
3978                 return -ENODEV;
3979
3980         return hns3_nic_set_real_num_queue(ndev);
3981 }
3982
3983 static int hns3_recover_hw_addr(struct net_device *ndev)
3984 {
3985         struct netdev_hw_addr_list *list;
3986         struct netdev_hw_addr *ha, *tmp;
3987         int ret = 0;
3988
3989         netif_addr_lock_bh(ndev);
3990         /* go through and sync uc_addr entries to the device */
3991         list = &ndev->uc;
3992         list_for_each_entry_safe(ha, tmp, &list->list, list) {
3993                 ret = hns3_nic_uc_sync(ndev, ha->addr);
3994                 if (ret)
3995                         goto out;
3996         }
3997
3998         /* go through and sync mc_addr entries to the device */
3999         list = &ndev->mc;
4000         list_for_each_entry_safe(ha, tmp, &list->list, list) {
4001                 ret = hns3_nic_mc_sync(ndev, ha->addr);
4002                 if (ret)
4003                         goto out;
4004         }
4005
4006 out:
4007         netif_addr_unlock_bh(ndev);
4008         return ret;
4009 }
4010
4011 static void hns3_remove_hw_addr(struct net_device *netdev)
4012 {
4013         struct netdev_hw_addr_list *list;
4014         struct netdev_hw_addr *ha, *tmp;
4015
4016         hns3_nic_uc_unsync(netdev, netdev->dev_addr);
4017
4018         netif_addr_lock_bh(netdev);
4019         /* go through and unsync uc_addr entries to the device */
4020         list = &netdev->uc;
4021         list_for_each_entry_safe(ha, tmp, &list->list, list)
4022                 hns3_nic_uc_unsync(netdev, ha->addr);
4023
4024         /* go through and unsync mc_addr entries to the device */
4025         list = &netdev->mc;
4026         list_for_each_entry_safe(ha, tmp, &list->list, list)
4027                 if (ha->refcount > 1)
4028                         hns3_nic_mc_unsync(netdev, ha->addr);
4029
4030         netif_addr_unlock_bh(netdev);
4031 }
4032
4033 static void hns3_clear_tx_ring(struct hns3_enet_ring *ring)
4034 {
4035         while (ring->next_to_clean != ring->next_to_use) {
4036                 ring->desc[ring->next_to_clean].tx.bdtp_fe_sc_vld_ra_ri = 0;
4037                 hns3_free_buffer_detach(ring, ring->next_to_clean);
4038                 ring_ptr_move_fw(ring, next_to_clean);
4039         }
4040 }
4041
4042 static int hns3_clear_rx_ring(struct hns3_enet_ring *ring)
4043 {
4044         struct hns3_desc_cb res_cbs;
4045         int ret;
4046
4047         while (ring->next_to_use != ring->next_to_clean) {
4048                 /* When a buffer is not reused, it's memory has been
4049                  * freed in hns3_handle_rx_bd or will be freed by
4050                  * stack, so we need to replace the buffer here.
4051                  */
4052                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4053                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
4054                         if (ret) {
4055                                 u64_stats_update_begin(&ring->syncp);
4056                                 ring->stats.sw_err_cnt++;
4057                                 u64_stats_update_end(&ring->syncp);
4058                                 /* if alloc new buffer fail, exit directly
4059                                  * and reclear in up flow.
4060                                  */
4061                                 netdev_warn(ring->tqp->handle->kinfo.netdev,
4062                                             "reserve buffer map failed, ret = %d\n",
4063                                             ret);
4064                                 return ret;
4065                         }
4066                         hns3_replace_buffer(ring, ring->next_to_use,
4067                                             &res_cbs);
4068                 }
4069                 ring_ptr_move_fw(ring, next_to_use);
4070         }
4071
4072         /* Free the pending skb in rx ring */
4073         if (ring->skb) {
4074                 dev_kfree_skb_any(ring->skb);
4075                 ring->skb = NULL;
4076                 ring->pending_buf = 0;
4077         }
4078
4079         return 0;
4080 }
4081
4082 static void hns3_force_clear_rx_ring(struct hns3_enet_ring *ring)
4083 {
4084         while (ring->next_to_use != ring->next_to_clean) {
4085                 /* When a buffer is not reused, it's memory has been
4086                  * freed in hns3_handle_rx_bd or will be freed by
4087                  * stack, so only need to unmap the buffer here.
4088                  */
4089                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4090                         hns3_unmap_buffer(ring,
4091                                           &ring->desc_cb[ring->next_to_use]);
4092                         ring->desc_cb[ring->next_to_use].dma = 0;
4093                 }
4094
4095                 ring_ptr_move_fw(ring, next_to_use);
4096         }
4097 }
4098
4099 static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h)
4100 {
4101         struct net_device *ndev = h->kinfo.netdev;
4102         struct hns3_nic_priv *priv = netdev_priv(ndev);
4103         struct hns3_enet_ring *ring;
4104         u32 i;
4105
4106         for (i = 0; i < h->kinfo.num_tqps; i++) {
4107                 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4108                 hns3_force_clear_rx_ring(ring);
4109         }
4110 }
4111
4112 static void hns3_clear_all_ring(struct hnae3_handle *h)
4113 {
4114         struct net_device *ndev = h->kinfo.netdev;
4115         struct hns3_nic_priv *priv = netdev_priv(ndev);
4116         u32 i;
4117
4118         for (i = 0; i < h->kinfo.num_tqps; i++) {
4119                 struct netdev_queue *dev_queue;
4120                 struct hns3_enet_ring *ring;
4121
4122                 ring = priv->ring_data[i].ring;
4123                 hns3_clear_tx_ring(ring);
4124                 dev_queue = netdev_get_tx_queue(ndev,
4125                                                 priv->ring_data[i].queue_index);
4126                 netdev_tx_reset_queue(dev_queue);
4127
4128                 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4129                 /* Continue to clear other rings even if clearing some
4130                  * rings failed.
4131                  */
4132                 hns3_clear_rx_ring(ring);
4133         }
4134 }
4135
4136 int hns3_nic_reset_all_ring(struct hnae3_handle *h)
4137 {
4138         struct net_device *ndev = h->kinfo.netdev;
4139         struct hns3_nic_priv *priv = netdev_priv(ndev);
4140         struct hns3_enet_ring *rx_ring;
4141         int i, j;
4142         int ret;
4143
4144         for (i = 0; i < h->kinfo.num_tqps; i++) {
4145                 ret = h->ae_algo->ops->reset_queue(h, i);
4146                 if (ret)
4147                         return ret;
4148
4149                 hns3_init_ring_hw(priv->ring_data[i].ring);
4150
4151                 /* We need to clear tx ring here because self test will
4152                  * use the ring and will not run down before up
4153                  */
4154                 hns3_clear_tx_ring(priv->ring_data[i].ring);
4155                 priv->ring_data[i].ring->next_to_clean = 0;
4156                 priv->ring_data[i].ring->next_to_use = 0;
4157
4158                 rx_ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4159                 hns3_init_ring_hw(rx_ring);
4160                 ret = hns3_clear_rx_ring(rx_ring);
4161                 if (ret)
4162                         return ret;
4163
4164                 /* We can not know the hardware head and tail when this
4165                  * function is called in reset flow, so we reuse all desc.
4166                  */
4167                 for (j = 0; j < rx_ring->desc_num; j++)
4168                         hns3_reuse_buffer(rx_ring, j);
4169
4170                 rx_ring->next_to_clean = 0;
4171                 rx_ring->next_to_use = 0;
4172         }
4173
4174         hns3_init_tx_ring_tc(priv);
4175
4176         return 0;
4177 }
4178
4179 static void hns3_store_coal(struct hns3_nic_priv *priv)
4180 {
4181         /* ethtool only support setting and querying one coal
4182          * configuation for now, so save the vector 0' coal
4183          * configuation here in order to restore it.
4184          */
4185         memcpy(&priv->tx_coal, &priv->tqp_vector[0].tx_group.coal,
4186                sizeof(struct hns3_enet_coalesce));
4187         memcpy(&priv->rx_coal, &priv->tqp_vector[0].rx_group.coal,
4188                sizeof(struct hns3_enet_coalesce));
4189 }
4190
4191 static void hns3_restore_coal(struct hns3_nic_priv *priv)
4192 {
4193         u16 vector_num = priv->vector_num;
4194         int i;
4195
4196         for (i = 0; i < vector_num; i++) {
4197                 memcpy(&priv->tqp_vector[i].tx_group.coal, &priv->tx_coal,
4198                        sizeof(struct hns3_enet_coalesce));
4199                 memcpy(&priv->tqp_vector[i].rx_group.coal, &priv->rx_coal,
4200                        sizeof(struct hns3_enet_coalesce));
4201         }
4202 }
4203
4204 static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
4205 {
4206         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
4207         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4208         struct net_device *ndev = kinfo->netdev;
4209         struct hns3_nic_priv *priv = netdev_priv(ndev);
4210
4211         if (test_and_set_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
4212                 return 0;
4213
4214         /* it is cumbersome for hardware to pick-and-choose entries for deletion
4215          * from table space. Hence, for function reset software intervention is
4216          * required to delete the entries
4217          */
4218         if (hns3_dev_ongoing_func_reset(ae_dev)) {
4219                 hns3_remove_hw_addr(ndev);
4220                 hns3_del_all_fd_rules(ndev, false);
4221         }
4222
4223         if (!netif_running(ndev))
4224                 return 0;
4225
4226         return hns3_nic_net_stop(ndev);
4227 }
4228
4229 static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
4230 {
4231         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4232         struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
4233         int ret = 0;
4234
4235         clear_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4236
4237         if (netif_running(kinfo->netdev)) {
4238                 ret = hns3_nic_net_open(kinfo->netdev);
4239                 if (ret) {
4240                         set_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4241                         netdev_err(kinfo->netdev,
4242                                    "hns net up fail, ret=%d!\n", ret);
4243                         return ret;
4244                 }
4245         }
4246
4247         return ret;
4248 }
4249
4250 static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
4251 {
4252         struct net_device *netdev = handle->kinfo.netdev;
4253         struct hns3_nic_priv *priv = netdev_priv(netdev);
4254         int ret;
4255
4256         /* Carrier off reporting is important to ethtool even BEFORE open */
4257         netif_carrier_off(netdev);
4258
4259         ret = hns3_get_ring_config(priv);
4260         if (ret)
4261                 return ret;
4262
4263         ret = hns3_nic_alloc_vector_data(priv);
4264         if (ret)
4265                 goto err_put_ring;
4266
4267         hns3_restore_coal(priv);
4268
4269         ret = hns3_nic_init_vector_data(priv);
4270         if (ret)
4271                 goto err_dealloc_vector;
4272
4273         ret = hns3_init_all_ring(priv);
4274         if (ret)
4275                 goto err_uninit_vector;
4276
4277         ret = hns3_client_start(handle);
4278         if (ret) {
4279                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4280                 goto err_uninit_ring;
4281         }
4282
4283         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4284
4285         return ret;
4286
4287 err_uninit_ring:
4288         hns3_uninit_all_ring(priv);
4289 err_uninit_vector:
4290         hns3_nic_uninit_vector_data(priv);
4291 err_dealloc_vector:
4292         hns3_nic_dealloc_vector_data(priv);
4293 err_put_ring:
4294         hns3_put_ring_config(priv);
4295
4296         return ret;
4297 }
4298
4299 static int hns3_reset_notify_restore_enet(struct hnae3_handle *handle)
4300 {
4301         struct net_device *netdev = handle->kinfo.netdev;
4302         bool vlan_filter_enable;
4303         int ret;
4304
4305         ret = hns3_init_mac_addr(netdev, false);
4306         if (ret)
4307                 return ret;
4308
4309         ret = hns3_recover_hw_addr(netdev);
4310         if (ret)
4311                 return ret;
4312
4313         ret = hns3_update_promisc_mode(netdev, handle->netdev_flags);
4314         if (ret)
4315                 return ret;
4316
4317         vlan_filter_enable = netdev->flags & IFF_PROMISC ? false : true;
4318         hns3_enable_vlan_filter(netdev, vlan_filter_enable);
4319
4320         /* Hardware table is only clear when pf resets */
4321         if (!(handle->flags & HNAE3_SUPPORT_VF)) {
4322                 ret = hns3_restore_vlan(netdev);
4323                 if (ret)
4324                         return ret;
4325         }
4326
4327         return hns3_restore_fd_rules(netdev);
4328 }
4329
4330 static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
4331 {
4332         struct net_device *netdev = handle->kinfo.netdev;
4333         struct hns3_nic_priv *priv = netdev_priv(netdev);
4334         int ret;
4335
4336         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4337                 netdev_warn(netdev, "already uninitialized\n");
4338                 return 0;
4339         }
4340
4341         hns3_force_clear_all_rx_ring(handle);
4342
4343         hns3_nic_uninit_vector_data(priv);
4344
4345         hns3_store_coal(priv);
4346
4347         ret = hns3_nic_dealloc_vector_data(priv);
4348         if (ret)
4349                 netdev_err(netdev, "dealloc vector error\n");
4350
4351         ret = hns3_uninit_all_ring(priv);
4352         if (ret)
4353                 netdev_err(netdev, "uninit ring error\n");
4354
4355         hns3_put_ring_config(priv);
4356
4357         return ret;
4358 }
4359
4360 static int hns3_reset_notify(struct hnae3_handle *handle,
4361                              enum hnae3_reset_notify_type type)
4362 {
4363         int ret = 0;
4364
4365         switch (type) {
4366         case HNAE3_UP_CLIENT:
4367                 ret = hns3_reset_notify_up_enet(handle);
4368                 break;
4369         case HNAE3_DOWN_CLIENT:
4370                 ret = hns3_reset_notify_down_enet(handle);
4371                 break;
4372         case HNAE3_INIT_CLIENT:
4373                 ret = hns3_reset_notify_init_enet(handle);
4374                 break;
4375         case HNAE3_UNINIT_CLIENT:
4376                 ret = hns3_reset_notify_uninit_enet(handle);
4377                 break;
4378         case HNAE3_RESTORE_CLIENT:
4379                 ret = hns3_reset_notify_restore_enet(handle);
4380                 break;
4381         default:
4382                 break;
4383         }
4384
4385         return ret;
4386 }
4387
4388 int hns3_set_channels(struct net_device *netdev,
4389                       struct ethtool_channels *ch)
4390 {
4391         struct hnae3_handle *h = hns3_get_handle(netdev);
4392         struct hnae3_knic_private_info *kinfo = &h->kinfo;
4393         bool rxfh_configured = netif_is_rxfh_configured(netdev);
4394         u32 new_tqp_num = ch->combined_count;
4395         u16 org_tqp_num;
4396         int ret;
4397
4398         if (ch->rx_count || ch->tx_count)
4399                 return -EINVAL;
4400
4401         if (new_tqp_num > hns3_get_max_available_channels(h) ||
4402             new_tqp_num < 1) {
4403                 dev_err(&netdev->dev,
4404                         "Change tqps fail, the tqp range is from 1 to %d",
4405                         hns3_get_max_available_channels(h));
4406                 return -EINVAL;
4407         }
4408
4409         if (kinfo->rss_size == new_tqp_num)
4410                 return 0;
4411
4412         ret = hns3_reset_notify(h, HNAE3_DOWN_CLIENT);
4413         if (ret)
4414                 return ret;
4415
4416         ret = hns3_reset_notify(h, HNAE3_UNINIT_CLIENT);
4417         if (ret)
4418                 return ret;
4419
4420         org_tqp_num = h->kinfo.num_tqps;
4421         ret = h->ae_algo->ops->set_channels(h, new_tqp_num, rxfh_configured);
4422         if (ret) {
4423                 ret = h->ae_algo->ops->set_channels(h, org_tqp_num,
4424                                                     rxfh_configured);
4425                 if (ret) {
4426                         /* If revert to old tqp failed, fatal error occurred */
4427                         dev_err(&netdev->dev,
4428                                 "Revert to old tqp num fail, ret=%d", ret);
4429                         return ret;
4430                 }
4431                 dev_info(&netdev->dev,
4432                          "Change tqp num fail, Revert to old tqp num");
4433         }
4434         ret = hns3_reset_notify(h, HNAE3_INIT_CLIENT);
4435         if (ret)
4436                 return ret;
4437
4438         return hns3_reset_notify(h, HNAE3_UP_CLIENT);
4439 }
4440
4441 static const struct hnae3_client_ops client_ops = {
4442         .init_instance = hns3_client_init,
4443         .uninit_instance = hns3_client_uninit,
4444         .link_status_change = hns3_link_status_change,
4445         .setup_tc = hns3_client_setup_tc,
4446         .reset_notify = hns3_reset_notify,
4447 };
4448
4449 /* hns3_init_module - Driver registration routine
4450  * hns3_init_module is the first routine called when the driver is
4451  * loaded. All it does is register with the PCI subsystem.
4452  */
4453 static int __init hns3_init_module(void)
4454 {
4455         int ret;
4456
4457         pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
4458         pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
4459
4460         client.type = HNAE3_CLIENT_KNIC;
4461         snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
4462                  hns3_driver_name);
4463
4464         client.ops = &client_ops;
4465
4466         INIT_LIST_HEAD(&client.node);
4467
4468         hns3_dbg_register_debugfs(hns3_driver_name);
4469
4470         ret = hnae3_register_client(&client);
4471         if (ret)
4472                 goto err_reg_client;
4473
4474         ret = pci_register_driver(&hns3_driver);
4475         if (ret)
4476                 goto err_reg_driver;
4477
4478         return ret;
4479
4480 err_reg_driver:
4481         hnae3_unregister_client(&client);
4482 err_reg_client:
4483         hns3_dbg_unregister_debugfs();
4484         return ret;
4485 }
4486 module_init(hns3_init_module);
4487
4488 /* hns3_exit_module - Driver exit cleanup routine
4489  * hns3_exit_module is called just before the driver is removed
4490  * from memory.
4491  */
4492 static void __exit hns3_exit_module(void)
4493 {
4494         pci_unregister_driver(&hns3_driver);
4495         hnae3_unregister_client(&client);
4496         hns3_dbg_unregister_debugfs();
4497 }
4498 module_exit(hns3_exit_module);
4499
4500 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
4501 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
4502 MODULE_LICENSE("GPL");
4503 MODULE_ALIAS("pci:hns-nic");
4504 MODULE_VERSION(HNS3_MOD_VERSION);