drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #include <linux/dma-mapping.h>
   5 #include <linux/etherdevice.h>
   6 #include <linux/interrupt.h>
   7 #ifdef CONFIG_RFS_ACCEL
   8 #include <linux/cpu_rmap.h>
   9 #endif
  10 #include <linux/if_vlan.h>
  11 #include <linux/ip.h>
  12 #include <linux/ipv6.h>
  13 #include <linux/module.h>
  14 #include <linux/pci.h>
  15 #include <linux/aer.h>
  16 #include <linux/skbuff.h>
  17 #include <linux/sctp.h>
  18 #include <linux/vermagic.h>
  19 #include <net/gre.h>
  20 #include <net/ip6_checksum.h>
  21 #include <net/pkt_cls.h>
  22 #include <net/tcp.h>
  23 #include <net/vxlan.h>
  24
  25 #include "hnae3.h"
  26 #include "hns3_enet.h"
  27
  28 #define hns3_set_field(origin, shift, val)      ((origin) |= ((val) << (shift)))
  29 #define hns3_tx_bd_count(S)     DIV_ROUND_UP(S, HNS3_MAX_BD_SIZE)
  30
  31 #define hns3_rl_err(fmt, ...)                                           \
  32         do {                                                            \
  33                 if (net_ratelimit())                                    \
  34                         netdev_err(fmt, ##__VA_ARGS__);                 \
  35         } while (0)
  36
  37 static void hns3_clear_all_ring(struct hnae3_handle *h, bool force);
  38 static void hns3_remove_hw_addr(struct net_device *netdev);
  39
  40 static const char hns3_driver_name[] = "hns3";
  41 const char hns3_driver_version[] = VERMAGIC_STRING;
  42 static const char hns3_driver_string[] =
  43                         "Hisilicon Ethernet Network Driver for Hip08 Family";
  44 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
  45 static struct hnae3_client client;
  46
  47 static int debug = -1;
  48 module_param(debug, int, 0);
  49 MODULE_PARM_DESC(debug, " Network interface message level setting");
  50
  51 #define DEFAULT_MSG_LEVEL (NETIF_MSG_PROBE | NETIF_MSG_LINK | \
  52                            NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
  53
  54 #define HNS3_INNER_VLAN_TAG     1
  55 #define HNS3_OUTER_VLAN_TAG     2
  56
  57 /* hns3_pci_tbl - PCI Device ID Table
  58  *
  59  * Last entry must be all 0s
  60  *
  61  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  62  *   Class, Class Mask, private data (not used) }
  63  */
  64 static const struct pci_device_id hns3_pci_tbl[] = {
  65         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
  66         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
  67         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
  68          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  69         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
  70          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  71         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
  72          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  73         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
  74          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  75         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
  76          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  77         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
  78         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF),
  79          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  80         /* required last entry */
  81         {0, }
  82 };
  83 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
  84
  85 static irqreturn_t hns3_irq_handle(int irq, void *vector)
  86 {
  87         struct hns3_enet_tqp_vector *tqp_vector = vector;
  88
  89         napi_schedule_irqoff(&tqp_vector->napi);
  90
  91         return IRQ_HANDLED;
  92 }
  93
  94 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
  95 {
  96         struct hns3_enet_tqp_vector *tqp_vectors;
  97         unsigned int i;
  98
  99         for (i = 0; i < priv->vector_num; i++) {
 100                 tqp_vectors = &priv->tqp_vector[i];
 101
 102                 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
 103                         continue;
 104
 105                 /* clear the affinity mask */
 106                 irq_set_affinity_hint(tqp_vectors->vector_irq, NULL);
 107
 108                 /* release the irq resource */
 109                 free_irq(tqp_vectors->vector_irq, tqp_vectors);
 110                 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
 111         }
 112 }
 113
 114 static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
 115 {
 116         struct hns3_enet_tqp_vector *tqp_vectors;
 117         int txrx_int_idx = 0;
 118         int rx_int_idx = 0;
 119         int tx_int_idx = 0;
 120         unsigned int i;
 121         int ret;
 122
 123         for (i = 0; i < priv->vector_num; i++) {
 124                 tqp_vectors = &priv->tqp_vector[i];
 125
 126                 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
 127                         continue;
 128
 129                 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
 130                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 131                                  "%s-%s-%d", priv->netdev->name, "TxRx",
 132                                  txrx_int_idx++);
 133                         txrx_int_idx++;
 134                 } else if (tqp_vectors->rx_group.ring) {
 135                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 136                                  "%s-%s-%d", priv->netdev->name, "Rx",
 137                                  rx_int_idx++);
 138                 } else if (tqp_vectors->tx_group.ring) {
 139                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 140                                  "%s-%s-%d", priv->netdev->name, "Tx",
 141                                  tx_int_idx++);
 142                 } else {
 143                         /* Skip this unused q_vector */
 144                         continue;
 145                 }
 146
 147                 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
 148
 149                 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
 150                                   tqp_vectors->name, tqp_vectors);
 151                 if (ret) {
 152                         netdev_err(priv->netdev, "request irq(%d) fail\n",
 153                                    tqp_vectors->vector_irq);
 154                         hns3_nic_uninit_irq(priv);
 155                         return ret;
 156                 }
 157
 158                 irq_set_affinity_hint(tqp_vectors->vector_irq,
 159                                       &tqp_vectors->affinity_mask);
 160
 161                 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
 162         }
 163
 164         return 0;
 165 }
 166
 167 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
 168                                  u32 mask_en)
 169 {
 170         writel(mask_en, tqp_vector->mask_addr);
 171 }
 172
 173 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
 174 {
 175         napi_enable(&tqp_vector->napi);
 176
 177         /* enable vector */
 178         hns3_mask_vector_irq(tqp_vector, 1);
 179 }
 180
 181 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
 182 {
 183         /* disable vector */
 184         hns3_mask_vector_irq(tqp_vector, 0);
 185
 186         disable_irq(tqp_vector->vector_irq);
 187         napi_disable(&tqp_vector->napi);
 188 }
 189
 190 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
 191                                  u32 rl_value)
 192 {
 193         u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
 194
 195         /* this defines the configuration for RL (Interrupt Rate Limiter).
 196          * Rl defines rate of interrupts i.e. number of interrupts-per-second
 197          * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
 198          */
 199
 200         if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
 201             !tqp_vector->rx_group.coal.gl_adapt_enable)
 202                 /* According to the hardware, the range of rl_reg is
 203                  * 0-59 and the unit is 4.
 204                  */
 205                 rl_reg |=  HNS3_INT_RL_ENABLE_MASK;
 206
 207         writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
 208 }
 209
 210 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 211                                     u32 gl_value)
 212 {
 213         u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 214
 215         writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
 216 }
 217
 218 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 219                                     u32 gl_value)
 220 {
 221         u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 222
 223         writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
 224 }
 225
 226 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
 227                                    struct hns3_nic_priv *priv)
 228 {
 229         /* initialize the configuration for interrupt coalescing.
 230          * 1. GL (Interrupt Gap Limiter)
 231          * 2. RL (Interrupt Rate Limiter)
 232          *
 233          * Default: enable interrupt coalescing self-adaptive and GL
 234          */
 235         tqp_vector->tx_group.coal.gl_adapt_enable = 1;
 236         tqp_vector->rx_group.coal.gl_adapt_enable = 1;
 237
 238         tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
 239         tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
 240
 241         tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
 242         tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
 243 }
 244
 245 static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
 246                                       struct hns3_nic_priv *priv)
 247 {
 248         struct hnae3_handle *h = priv->ae_handle;
 249
 250         hns3_set_vector_coalesce_tx_gl(tqp_vector,
 251                                        tqp_vector->tx_group.coal.int_gl);
 252         hns3_set_vector_coalesce_rx_gl(tqp_vector,
 253                                        tqp_vector->rx_group.coal.int_gl);
 254         hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
 255 }
 256
 257 static int hns3_nic_set_real_num_queue(struct net_device *netdev)
 258 {
 259         struct hnae3_handle *h = hns3_get_handle(netdev);
 260         struct hnae3_knic_private_info *kinfo = &h->kinfo;
 261         unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
 262         int i, ret;
 263
 264         if (kinfo->num_tc <= 1) {
 265                 netdev_reset_tc(netdev);
 266         } else {
 267                 ret = netdev_set_num_tc(netdev, kinfo->num_tc);
 268                 if (ret) {
 269                         netdev_err(netdev,
 270                                    "netdev_set_num_tc fail, ret=%d!\n", ret);
 271                         return ret;
 272                 }
 273
 274                 for (i = 0; i < HNAE3_MAX_TC; i++) {
 275                         if (!kinfo->tc_info[i].enable)
 276                                 continue;
 277
 278                         netdev_set_tc_queue(netdev,
 279                                             kinfo->tc_info[i].tc,
 280                                             kinfo->tc_info[i].tqp_count,
 281                                             kinfo->tc_info[i].tqp_offset);
 282                 }
 283         }
 284
 285         ret = netif_set_real_num_tx_queues(netdev, queue_size);
 286         if (ret) {
 287                 netdev_err(netdev,
 288                            "netif_set_real_num_tx_queues fail, ret=%d!\n", ret);
 289                 return ret;
 290         }
 291
 292         ret = netif_set_real_num_rx_queues(netdev, queue_size);
 293         if (ret) {
 294                 netdev_err(netdev,
 295                            "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
 296                 return ret;
 297         }
 298
 299         return 0;
 300 }
 301
 302 static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
 303 {
 304         u16 alloc_tqps, max_rss_size, rss_size;
 305
 306         h->ae_algo->ops->get_tqps_and_rss_info(h, &alloc_tqps, &max_rss_size);
 307         rss_size = alloc_tqps / h->kinfo.num_tc;
 308
 309         return min_t(u16, rss_size, max_rss_size);
 310 }
 311
 312 static void hns3_tqp_enable(struct hnae3_queue *tqp)
 313 {
 314         u32 rcb_reg;
 315
 316         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 317         rcb_reg |= BIT(HNS3_RING_EN_B);
 318         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 319 }
 320
 321 static void hns3_tqp_disable(struct hnae3_queue *tqp)
 322 {
 323         u32 rcb_reg;
 324
 325         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 326         rcb_reg &= ~BIT(HNS3_RING_EN_B);
 327         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 328 }
 329
 330 static void hns3_free_rx_cpu_rmap(struct net_device *netdev)
 331 {
 332 #ifdef CONFIG_RFS_ACCEL
 333         free_irq_cpu_rmap(netdev->rx_cpu_rmap);
 334         netdev->rx_cpu_rmap = NULL;
 335 #endif
 336 }
 337
 338 static int hns3_set_rx_cpu_rmap(struct net_device *netdev)
 339 {
 340 #ifdef CONFIG_RFS_ACCEL
 341         struct hns3_nic_priv *priv = netdev_priv(netdev);
 342         struct hns3_enet_tqp_vector *tqp_vector;
 343         int i, ret;
 344
 345         if (!netdev->rx_cpu_rmap) {
 346                 netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->vector_num);
 347                 if (!netdev->rx_cpu_rmap)
 348                         return -ENOMEM;
 349         }
 350
 351         for (i = 0; i < priv->vector_num; i++) {
 352                 tqp_vector = &priv->tqp_vector[i];
 353                 ret = irq_cpu_rmap_add(netdev->rx_cpu_rmap,
 354                                        tqp_vector->vector_irq);
 355                 if (ret) {
 356                         hns3_free_rx_cpu_rmap(netdev);
 357                         return ret;
 358                 }
 359         }
 360 #endif
 361         return 0;
 362 }
 363
 364 static int hns3_nic_net_up(struct net_device *netdev)
 365 {
 366         struct hns3_nic_priv *priv = netdev_priv(netdev);
 367         struct hnae3_handle *h = priv->ae_handle;
 368         int i, j;
 369         int ret;
 370
 371         ret = hns3_nic_reset_all_ring(h);
 372         if (ret)
 373                 return ret;
 374
 375         /* the device can work without cpu rmap, only aRFS needs it */
 376         ret = hns3_set_rx_cpu_rmap(netdev);
 377         if (ret)
 378                 netdev_warn(netdev, "set rx cpu rmap fail, ret=%d!\n", ret);
 379
 380         /* get irq resource for all vectors */
 381         ret = hns3_nic_init_irq(priv);
 382         if (ret) {
 383                 netdev_err(netdev, "init irq failed! ret=%d\n", ret);
 384                 goto free_rmap;
 385         }
 386
 387         clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 388
 389         /* enable the vectors */
 390         for (i = 0; i < priv->vector_num; i++)
 391                 hns3_vector_enable(&priv->tqp_vector[i]);
 392
 393         /* enable rcb */
 394         for (j = 0; j < h->kinfo.num_tqps; j++)
 395                 hns3_tqp_enable(h->kinfo.tqp[j]);
 396
 397         /* start the ae_dev */
 398         ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
 399         if (ret)
 400                 goto out_start_err;
 401
 402         return 0;
 403
 404 out_start_err:
 405         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 406         while (j--)
 407                 hns3_tqp_disable(h->kinfo.tqp[j]);
 408
 409         for (j = i - 1; j >= 0; j--)
 410                 hns3_vector_disable(&priv->tqp_vector[j]);
 411
 412         hns3_nic_uninit_irq(priv);
 413 free_rmap:
 414         hns3_free_rx_cpu_rmap(netdev);
 415         return ret;
 416 }
 417
 418 static void hns3_config_xps(struct hns3_nic_priv *priv)
 419 {
 420         int i;
 421
 422         for (i = 0; i < priv->vector_num; i++) {
 423                 struct hns3_enet_tqp_vector *tqp_vector = &priv->tqp_vector[i];
 424                 struct hns3_enet_ring *ring = tqp_vector->tx_group.ring;
 425
 426                 while (ring) {
 427                         int ret;
 428
 429                         ret = netif_set_xps_queue(priv->netdev,
 430                                                   &tqp_vector->affinity_mask,
 431                                                   ring->tqp->tqp_index);
 432                         if (ret)
 433                                 netdev_warn(priv->netdev,
 434                                             "set xps queue failed: %d", ret);
 435
 436                         ring = ring->next;
 437                 }
 438         }
 439 }
 440
 441 static int hns3_nic_net_open(struct net_device *netdev)
 442 {
 443         struct hns3_nic_priv *priv = netdev_priv(netdev);
 444         struct hnae3_handle *h = hns3_get_handle(netdev);
 445         struct hnae3_knic_private_info *kinfo;
 446         int i, ret;
 447
 448         if (hns3_nic_resetting(netdev))
 449                 return -EBUSY;
 450
 451         netif_carrier_off(netdev);
 452
 453         ret = hns3_nic_set_real_num_queue(netdev);
 454         if (ret)
 455                 return ret;
 456
 457         ret = hns3_nic_net_up(netdev);
 458         if (ret) {
 459                 netdev_err(netdev, "net up fail, ret=%d!\n", ret);
 460                 return ret;
 461         }
 462
 463         kinfo = &h->kinfo;
 464         for (i = 0; i < HNAE3_MAX_USER_PRIO; i++)
 465                 netdev_set_prio_tc_map(netdev, i, kinfo->prio_tc[i]);
 466
 467         if (h->ae_algo->ops->set_timer_task)
 468                 h->ae_algo->ops->set_timer_task(priv->ae_handle, true);
 469
 470         hns3_config_xps(priv);
 471
 472         netif_dbg(h, drv, netdev, "net open\n");
 473
 474         return 0;
 475 }
 476
 477 static void hns3_reset_tx_queue(struct hnae3_handle *h)
 478 {
 479         struct net_device *ndev = h->kinfo.netdev;
 480         struct hns3_nic_priv *priv = netdev_priv(ndev);
 481         struct netdev_queue *dev_queue;
 482         u32 i;
 483
 484         for (i = 0; i < h->kinfo.num_tqps; i++) {
 485                 dev_queue = netdev_get_tx_queue(ndev,
 486                                                 priv->ring[i].queue_index);
 487                 netdev_tx_reset_queue(dev_queue);
 488         }
 489 }
 490
 491 static void hns3_nic_net_down(struct net_device *netdev)
 492 {
 493         struct hns3_nic_priv *priv = netdev_priv(netdev);
 494         struct hnae3_handle *h = hns3_get_handle(netdev);
 495         const struct hnae3_ae_ops *ops;
 496         int i;
 497
 498         /* disable vectors */
 499         for (i = 0; i < priv->vector_num; i++)
 500                 hns3_vector_disable(&priv->tqp_vector[i]);
 501
 502         /* disable rcb */
 503         for (i = 0; i < h->kinfo.num_tqps; i++)
 504                 hns3_tqp_disable(h->kinfo.tqp[i]);
 505
 506         /* stop ae_dev */
 507         ops = priv->ae_handle->ae_algo->ops;
 508         if (ops->stop)
 509                 ops->stop(priv->ae_handle);
 510
 511         hns3_free_rx_cpu_rmap(netdev);
 512
 513         /* free irq resources */
 514         hns3_nic_uninit_irq(priv);
 515
 516         /* delay ring buffer clearing to hns3_reset_notify_uninit_enet
 517          * during reset process, because driver may not be able
 518          * to disable the ring through firmware when downing the netdev.
 519          */
 520         if (!hns3_nic_resetting(netdev))
 521                 hns3_clear_all_ring(priv->ae_handle, false);
 522
 523         hns3_reset_tx_queue(priv->ae_handle);
 524 }
 525
 526 static int hns3_nic_net_stop(struct net_device *netdev)
 527 {
 528         struct hns3_nic_priv *priv = netdev_priv(netdev);
 529         struct hnae3_handle *h = hns3_get_handle(netdev);
 530
 531         if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
 532                 return 0;
 533
 534         netif_dbg(h, drv, netdev, "net stop\n");
 535
 536         if (h->ae_algo->ops->set_timer_task)
 537                 h->ae_algo->ops->set_timer_task(priv->ae_handle, false);
 538
 539         netif_tx_stop_all_queues(netdev);
 540         netif_carrier_off(netdev);
 541
 542         hns3_nic_net_down(netdev);
 543
 544         return 0;
 545 }
 546
 547 static int hns3_nic_uc_sync(struct net_device *netdev,
 548                             const unsigned char *addr)
 549 {
 550         struct hnae3_handle *h = hns3_get_handle(netdev);
 551
 552         if (h->ae_algo->ops->add_uc_addr)
 553                 return h->ae_algo->ops->add_uc_addr(h, addr);
 554
 555         return 0;
 556 }
 557
 558 static int hns3_nic_uc_unsync(struct net_device *netdev,
 559                               const unsigned char *addr)
 560 {
 561         struct hnae3_handle *h = hns3_get_handle(netdev);
 562
 563         if (h->ae_algo->ops->rm_uc_addr)
 564                 return h->ae_algo->ops->rm_uc_addr(h, addr);
 565
 566         return 0;
 567 }
 568
 569 static int hns3_nic_mc_sync(struct net_device *netdev,
 570                             const unsigned char *addr)
 571 {
 572         struct hnae3_handle *h = hns3_get_handle(netdev);
 573
 574         if (h->ae_algo->ops->add_mc_addr)
 575                 return h->ae_algo->ops->add_mc_addr(h, addr);
 576
 577         return 0;
 578 }
 579
 580 static int hns3_nic_mc_unsync(struct net_device *netdev,
 581                               const unsigned char *addr)
 582 {
 583         struct hnae3_handle *h = hns3_get_handle(netdev);
 584
 585         if (h->ae_algo->ops->rm_mc_addr)
 586                 return h->ae_algo->ops->rm_mc_addr(h, addr);
 587
 588         return 0;
 589 }
 590
 591 static u8 hns3_get_netdev_flags(struct net_device *netdev)
 592 {
 593         u8 flags = 0;
 594
 595         if (netdev->flags & IFF_PROMISC) {
 596                 flags = HNAE3_USER_UPE | HNAE3_USER_MPE | HNAE3_BPE;
 597         } else {
 598                 flags |= HNAE3_VLAN_FLTR;
 599                 if (netdev->flags & IFF_ALLMULTI)
 600                         flags |= HNAE3_USER_MPE;
 601         }
 602
 603         return flags;
 604 }
 605
 606 static void hns3_nic_set_rx_mode(struct net_device *netdev)
 607 {
 608         struct hnae3_handle *h = hns3_get_handle(netdev);
 609         u8 new_flags;
 610         int ret;
 611
 612         new_flags = hns3_get_netdev_flags(netdev);
 613
 614         ret = __dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync);
 615         if (ret) {
 616                 netdev_err(netdev, "sync uc address fail\n");
 617                 if (ret == -ENOSPC)
 618                         new_flags |= HNAE3_OVERFLOW_UPE;
 619         }
 620
 621         if (netdev->flags & IFF_MULTICAST) {
 622                 ret = __dev_mc_sync(netdev, hns3_nic_mc_sync,
 623                                     hns3_nic_mc_unsync);
 624                 if (ret) {
 625                         netdev_err(netdev, "sync mc address fail\n");
 626                         if (ret == -ENOSPC)
 627                                 new_flags |= HNAE3_OVERFLOW_MPE;
 628                 }
 629         }
 630
 631         /* User mode Promisc mode enable and vlan filtering is disabled to
 632          * let all packets in. MAC-VLAN Table overflow Promisc enabled and
 633          * vlan fitering is enabled
 634          */
 635         hns3_enable_vlan_filter(netdev, new_flags & HNAE3_VLAN_FLTR);
 636         h->netdev_flags = new_flags;
 637         hns3_update_promisc_mode(netdev, new_flags);
 638 }
 639
 640 int hns3_update_promisc_mode(struct net_device *netdev, u8 promisc_flags)
 641 {
 642         struct hns3_nic_priv *priv = netdev_priv(netdev);
 643         struct hnae3_handle *h = priv->ae_handle;
 644
 645         if (h->ae_algo->ops->set_promisc_mode) {
 646                 return h->ae_algo->ops->set_promisc_mode(h,
 647                                                 promisc_flags & HNAE3_UPE,
 648                                                 promisc_flags & HNAE3_MPE);
 649         }
 650
 651         return 0;
 652 }
 653
 654 void hns3_enable_vlan_filter(struct net_device *netdev, bool enable)
 655 {
 656         struct hns3_nic_priv *priv = netdev_priv(netdev);
 657         struct hnae3_handle *h = priv->ae_handle;
 658         bool last_state;
 659
 660         if (h->pdev->revision >= 0x21 && h->ae_algo->ops->enable_vlan_filter) {
 661                 last_state = h->netdev_flags & HNAE3_VLAN_FLTR ? true : false;
 662                 if (enable != last_state) {
 663                         netdev_info(netdev,
 664                                     "%s vlan filter\n",
 665                                     enable ? "enable" : "disable");
 666                         h->ae_algo->ops->enable_vlan_filter(h, enable);
 667                 }
 668         }
 669 }
 670
 671 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
 672                         u16 *mss, u32 *type_cs_vlan_tso)
 673 {
 674         u32 l4_offset, hdr_len;
 675         union l3_hdr_info l3;
 676         union l4_hdr_info l4;
 677         u32 l4_paylen;
 678         int ret;
 679
 680         if (!skb_is_gso(skb))
 681                 return 0;
 682
 683         ret = skb_cow_head(skb, 0);
 684         if (unlikely(ret < 0))
 685                 return ret;
 686
 687         l3.hdr = skb_network_header(skb);
 688         l4.hdr = skb_transport_header(skb);
 689
 690         /* Software should clear the IPv4's checksum field when tso is
 691          * needed.
 692          */
 693         if (l3.v4->version == 4)
 694                 l3.v4->check = 0;
 695
 696         /* tunnel packet */
 697         if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
 698                                          SKB_GSO_GRE_CSUM |
 699                                          SKB_GSO_UDP_TUNNEL |
 700                                          SKB_GSO_UDP_TUNNEL_CSUM)) {
 701                 if ((!(skb_shinfo(skb)->gso_type &
 702                     SKB_GSO_PARTIAL)) &&
 703                     (skb_shinfo(skb)->gso_type &
 704                     SKB_GSO_UDP_TUNNEL_CSUM)) {
 705                         /* Software should clear the udp's checksum
 706                          * field when tso is needed.
 707                          */
 708                         l4.udp->check = 0;
 709                 }
 710                 /* reset l3&l4 pointers from outer to inner headers */
 711                 l3.hdr = skb_inner_network_header(skb);
 712                 l4.hdr = skb_inner_transport_header(skb);
 713
 714                 /* Software should clear the IPv4's checksum field when
 715                  * tso is needed.
 716                  */
 717                 if (l3.v4->version == 4)
 718                         l3.v4->check = 0;
 719         }
 720
 721         /* normal or tunnel packet */
 722         l4_offset = l4.hdr - skb->data;
 723         hdr_len = (l4.tcp->doff << 2) + l4_offset;
 724
 725         /* remove payload length from inner pseudo checksum when tso */
 726         l4_paylen = skb->len - l4_offset;
 727         csum_replace_by_diff(&l4.tcp->check,
 728                              (__force __wsum)htonl(l4_paylen));
 729
 730         /* find the txbd field values */
 731         *paylen = skb->len - hdr_len;
 732         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_TSO_B, 1);
 733
 734         /* get MSS for TSO */
 735         *mss = skb_shinfo(skb)->gso_size;
 736
 737         return 0;
 738 }
 739
 740 static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
 741                                 u8 *il4_proto)
 742 {
 743         union l3_hdr_info l3;
 744         unsigned char *l4_hdr;
 745         unsigned char *exthdr;
 746         u8 l4_proto_tmp;
 747         __be16 frag_off;
 748
 749         /* find outer header point */
 750         l3.hdr = skb_network_header(skb);
 751         l4_hdr = skb_transport_header(skb);
 752
 753         if (skb->protocol == htons(ETH_P_IPV6)) {
 754                 exthdr = l3.hdr + sizeof(*l3.v6);
 755                 l4_proto_tmp = l3.v6->nexthdr;
 756                 if (l4_hdr != exthdr)
 757                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 758                                          &l4_proto_tmp, &frag_off);
 759         } else if (skb->protocol == htons(ETH_P_IP)) {
 760                 l4_proto_tmp = l3.v4->protocol;
 761         } else {
 762                 return -EINVAL;
 763         }
 764
 765         *ol4_proto = l4_proto_tmp;
 766
 767         /* tunnel packet */
 768         if (!skb->encapsulation) {
 769                 *il4_proto = 0;
 770                 return 0;
 771         }
 772
 773         /* find inner header point */
 774         l3.hdr = skb_inner_network_header(skb);
 775         l4_hdr = skb_inner_transport_header(skb);
 776
 777         if (l3.v6->version == 6) {
 778                 exthdr = l3.hdr + sizeof(*l3.v6);
 779                 l4_proto_tmp = l3.v6->nexthdr;
 780                 if (l4_hdr != exthdr)
 781                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 782                                          &l4_proto_tmp, &frag_off);
 783         } else if (l3.v4->version == 4) {
 784                 l4_proto_tmp = l3.v4->protocol;
 785         }
 786
 787         *il4_proto = l4_proto_tmp;
 788
 789         return 0;
 790 }
 791
 792 /* when skb->encapsulation is 0, skb->ip_summed is CHECKSUM_PARTIAL
 793  * and it is udp packet, which has a dest port as the IANA assigned.
 794  * the hardware is expected to do the checksum offload, but the
 795  * hardware will not do the checksum offload when udp dest port is
 796  * 4789.
 797  */
 798 static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
 799 {
 800         union l4_hdr_info l4;
 801
 802         l4.hdr = skb_transport_header(skb);
 803
 804         if (!(!skb->encapsulation &&
 805               l4.udp->dest == htons(IANA_VXLAN_UDP_PORT)))
 806                 return false;
 807
 808         skb_checksum_help(skb);
 809
 810         return true;
 811 }
 812
 813 static void hns3_set_outer_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
 814                                   u32 *ol_type_vlan_len_msec)
 815 {
 816         u32 l2_len, l3_len, l4_len;
 817         unsigned char *il2_hdr;
 818         union l3_hdr_info l3;
 819         union l4_hdr_info l4;
 820
 821         l3.hdr = skb_network_header(skb);
 822         l4.hdr = skb_transport_header(skb);
 823
 824         /* compute OL2 header size, defined in 2 Bytes */
 825         l2_len = l3.hdr - skb->data;
 826         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L2LEN_S, l2_len >> 1);
 827
 828         /* compute OL3 header size, defined in 4 Bytes */
 829         l3_len = l4.hdr - l3.hdr;
 830         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_S, l3_len >> 2);
 831
 832         il2_hdr = skb_inner_mac_header(skb);
 833         /* compute OL4 header size, defined in 4 Bytes */
 834         l4_len = il2_hdr - l4.hdr;
 835         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_S, l4_len >> 2);
 836
 837         /* define outer network header type */
 838         if (skb->protocol == htons(ETH_P_IP)) {
 839                 if (skb_is_gso(skb))
 840                         hns3_set_field(*ol_type_vlan_len_msec,
 841                                        HNS3_TXD_OL3T_S,
 842                                        HNS3_OL3T_IPV4_CSUM);
 843                 else
 844                         hns3_set_field(*ol_type_vlan_len_msec,
 845                                        HNS3_TXD_OL3T_S,
 846                                        HNS3_OL3T_IPV4_NO_CSUM);
 847
 848         } else if (skb->protocol == htons(ETH_P_IPV6)) {
 849                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_S,
 850                                HNS3_OL3T_IPV6);
 851         }
 852
 853         if (ol4_proto == IPPROTO_UDP)
 854                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
 855                                HNS3_TUN_MAC_IN_UDP);
 856         else if (ol4_proto == IPPROTO_GRE)
 857                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
 858                                HNS3_TUN_NVGRE);
 859 }
 860
 861 static int hns3_set_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
 862                            u8 il4_proto, u32 *type_cs_vlan_tso,
 863                            u32 *ol_type_vlan_len_msec)
 864 {
 865         unsigned char *l2_hdr = skb->data;
 866         u32 l4_proto = ol4_proto;
 867         union l4_hdr_info l4;
 868         union l3_hdr_info l3;
 869         u32 l2_len, l3_len;
 870
 871         l4.hdr = skb_transport_header(skb);
 872         l3.hdr = skb_network_header(skb);
 873
 874         /* handle encapsulation skb */
 875         if (skb->encapsulation) {
 876                 /* If this is a not UDP/GRE encapsulation skb */
 877                 if (!(ol4_proto == IPPROTO_UDP || ol4_proto == IPPROTO_GRE)) {
 878                         /* drop the skb tunnel packet if hardware don't support,
 879                          * because hardware can't calculate csum when TSO.
 880                          */
 881                         if (skb_is_gso(skb))
 882                                 return -EDOM;
 883
 884                         /* the stack computes the IP header already,
 885                          * driver calculate l4 checksum when not TSO.
 886                          */
 887                         skb_checksum_help(skb);
 888                         return 0;
 889                 }
 890
 891                 hns3_set_outer_l2l3l4(skb, ol4_proto, ol_type_vlan_len_msec);
 892
 893                 /* switch to inner header */
 894                 l2_hdr = skb_inner_mac_header(skb);
 895                 l3.hdr = skb_inner_network_header(skb);
 896                 l4.hdr = skb_inner_transport_header(skb);
 897                 l4_proto = il4_proto;
 898         }
 899
 900         if (l3.v4->version == 4) {
 901                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 902                                HNS3_L3T_IPV4);
 903
 904                 /* the stack computes the IP header already, the only time we
 905                  * need the hardware to recompute it is in the case of TSO.
 906                  */
 907                 if (skb_is_gso(skb))
 908                         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
 909         } else if (l3.v6->version == 6) {
 910                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 911                                HNS3_L3T_IPV6);
 912         }
 913
 914         /* compute inner(/normal) L2 header size, defined in 2 Bytes */
 915         l2_len = l3.hdr - l2_hdr;
 916         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S, l2_len >> 1);
 917
 918         /* compute inner(/normal) L3 header size, defined in 4 Bytes */
 919         l3_len = l4.hdr - l3.hdr;
 920         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_S, l3_len >> 2);
 921
 922         /* compute inner(/normal) L4 header size, defined in 4 Bytes */
 923         switch (l4_proto) {
 924         case IPPROTO_TCP:
 925                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 926                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 927                                HNS3_L4T_TCP);
 928                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 929                                l4.tcp->doff);
 930                 break;
 931         case IPPROTO_UDP:
 932                 if (hns3_tunnel_csum_bug(skb))
 933                         break;
 934
 935                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 936                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 937                                HNS3_L4T_UDP);
 938                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 939                                (sizeof(struct udphdr) >> 2));
 940                 break;
 941         case IPPROTO_SCTP:
 942                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 943                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 944                                HNS3_L4T_SCTP);
 945                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 946                                (sizeof(struct sctphdr) >> 2));
 947                 break;
 948         default:
 949                 /* drop the skb tunnel packet if hardware don't support,
 950                  * because hardware can't calculate csum when TSO.
 951                  */
 952                 if (skb_is_gso(skb))
 953                         return -EDOM;
 954
 955                 /* the stack computes the IP header already,
 956                  * driver calculate l4 checksum when not TSO.
 957                  */
 958                 skb_checksum_help(skb);
 959                 return 0;
 960         }
 961
 962         return 0;
 963 }
 964
 965 static int hns3_handle_vtags(struct hns3_enet_ring *tx_ring,
 966                              struct sk_buff *skb)
 967 {
 968         struct hnae3_handle *handle = tx_ring->tqp->handle;
 969         struct vlan_ethhdr *vhdr;
 970         int rc;
 971
 972         if (!(skb->protocol == htons(ETH_P_8021Q) ||
 973               skb_vlan_tag_present(skb)))
 974                 return 0;
 975
 976         /* Since HW limitation, if port based insert VLAN enabled, only one VLAN
 977          * header is allowed in skb, otherwise it will cause RAS error.
 978          */
 979         if (unlikely(skb_vlan_tagged_multi(skb) &&
 980                      handle->port_base_vlan_state ==
 981                      HNAE3_PORT_BASE_VLAN_ENABLE))
 982                 return -EINVAL;
 983
 984         if (skb->protocol == htons(ETH_P_8021Q) &&
 985             !(handle->kinfo.netdev->features & NETIF_F_HW_VLAN_CTAG_TX)) {
 986                 /* When HW VLAN acceleration is turned off, and the stack
 987                  * sets the protocol to 802.1q, the driver just need to
 988                  * set the protocol to the encapsulated ethertype.
 989                  */
 990                 skb->protocol = vlan_get_protocol(skb);
 991                 return 0;
 992         }
 993
 994         if (skb_vlan_tag_present(skb)) {
 995                 /* Based on hw strategy, use out_vtag in two layer tag case,
 996                  * and use inner_vtag in one tag case.
 997                  */
 998                 if (skb->protocol == htons(ETH_P_8021Q) &&
 999                     handle->port_base_vlan_state ==
1000                     HNAE3_PORT_BASE_VLAN_DISABLE)
1001                         rc = HNS3_OUTER_VLAN_TAG;
1002                 else
1003                         rc = HNS3_INNER_VLAN_TAG;
1004
1005                 skb->protocol = vlan_get_protocol(skb);
1006                 return rc;
1007         }
1008
1009         rc = skb_cow_head(skb, 0);
1010         if (unlikely(rc < 0))
1011                 return rc;
1012
1013         vhdr = (struct vlan_ethhdr *)skb->data;
1014         vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority << VLAN_PRIO_SHIFT)
1015                                          & VLAN_PRIO_MASK);
1016
1017         skb->protocol = vlan_get_protocol(skb);
1018         return 0;
1019 }
1020
1021 static int hns3_fill_skb_desc(struct hns3_enet_ring *ring,
1022                               struct sk_buff *skb, struct hns3_desc *desc)
1023 {
1024         u32 ol_type_vlan_len_msec = 0;
1025         u32 type_cs_vlan_tso = 0;
1026         u32 paylen = skb->len;
1027         u16 inner_vtag = 0;
1028         u16 out_vtag = 0;
1029         u16 mss = 0;
1030         int ret;
1031
1032         ret = hns3_handle_vtags(ring, skb);
1033         if (unlikely(ret < 0)) {
1034                 u64_stats_update_begin(&ring->syncp);
1035                 ring->stats.tx_vlan_err++;
1036                 u64_stats_update_end(&ring->syncp);
1037                 return ret;
1038         } else if (ret == HNS3_INNER_VLAN_TAG) {
1039                 inner_vtag = skb_vlan_tag_get(skb);
1040                 inner_vtag |= (skb->priority << VLAN_PRIO_SHIFT) &
1041                                 VLAN_PRIO_MASK;
1042                 hns3_set_field(type_cs_vlan_tso, HNS3_TXD_VLAN_B, 1);
1043         } else if (ret == HNS3_OUTER_VLAN_TAG) {
1044                 out_vtag = skb_vlan_tag_get(skb);
1045                 out_vtag |= (skb->priority << VLAN_PRIO_SHIFT) &
1046                                 VLAN_PRIO_MASK;
1047                 hns3_set_field(ol_type_vlan_len_msec, HNS3_TXD_OVLAN_B,
1048                                1);
1049         }
1050
1051         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1052                 u8 ol4_proto, il4_proto;
1053
1054                 skb_reset_mac_len(skb);
1055
1056                 ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
1057                 if (unlikely(ret < 0)) {
1058                         u64_stats_update_begin(&ring->syncp);
1059                         ring->stats.tx_l4_proto_err++;
1060                         u64_stats_update_end(&ring->syncp);
1061                         return ret;
1062                 }
1063
1064                 ret = hns3_set_l2l3l4(skb, ol4_proto, il4_proto,
1065                                       &type_cs_vlan_tso,
1066                                       &ol_type_vlan_len_msec);
1067                 if (unlikely(ret < 0)) {
1068                         u64_stats_update_begin(&ring->syncp);
1069                         ring->stats.tx_l2l3l4_err++;
1070                         u64_stats_update_end(&ring->syncp);
1071                         return ret;
1072                 }
1073
1074                 ret = hns3_set_tso(skb, &paylen, &mss,
1075                                    &type_cs_vlan_tso);
1076                 if (unlikely(ret < 0)) {
1077                         u64_stats_update_begin(&ring->syncp);
1078                         ring->stats.tx_tso_err++;
1079                         u64_stats_update_end(&ring->syncp);
1080                         return ret;
1081                 }
1082         }
1083
1084         /* Set txbd */
1085         desc->tx.ol_type_vlan_len_msec =
1086                 cpu_to_le32(ol_type_vlan_len_msec);
1087         desc->tx.type_cs_vlan_tso_len = cpu_to_le32(type_cs_vlan_tso);
1088         desc->tx.paylen = cpu_to_le32(paylen);
1089         desc->tx.mss = cpu_to_le16(mss);
1090         desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
1091         desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
1092
1093         return 0;
1094 }
1095
1096 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
1097                           unsigned int size, enum hns_desc_type type)
1098 {
1099 #define HNS3_LIKELY_BD_NUM      1
1100
1101         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
1102         struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1103         struct device *dev = ring_to_dev(ring);
1104         skb_frag_t *frag;
1105         unsigned int frag_buf_num;
1106         int k, sizeoflast;
1107         dma_addr_t dma;
1108
1109         if (type == DESC_TYPE_SKB) {
1110                 struct sk_buff *skb = (struct sk_buff *)priv;
1111                 int ret;
1112
1113                 ret = hns3_fill_skb_desc(ring, skb, desc);
1114                 if (unlikely(ret < 0))
1115                         return ret;
1116
1117                 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1118         } else {
1119                 frag = (skb_frag_t *)priv;
1120                 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1121         }
1122
1123         if (unlikely(dma_mapping_error(dev, dma))) {
1124                 u64_stats_update_begin(&ring->syncp);
1125                 ring->stats.sw_err_cnt++;
1126                 u64_stats_update_end(&ring->syncp);
1127                 return -ENOMEM;
1128         }
1129
1130         desc_cb->length = size;
1131
1132         if (likely(size <= HNS3_MAX_BD_SIZE)) {
1133                 desc_cb->priv = priv;
1134                 desc_cb->dma = dma;
1135                 desc_cb->type = type;
1136                 desc->addr = cpu_to_le64(dma);
1137                 desc->tx.send_size = cpu_to_le16(size);
1138                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1139                         cpu_to_le16(BIT(HNS3_TXD_VLD_B));
1140
1141                 ring_ptr_move_fw(ring, next_to_use);
1142                 return HNS3_LIKELY_BD_NUM;
1143         }
1144
1145         frag_buf_num = hns3_tx_bd_count(size);
1146         sizeoflast = size & HNS3_TX_LAST_SIZE_M;
1147         sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
1148
1149         /* When frag size is bigger than hardware limit, split this frag */
1150         for (k = 0; k < frag_buf_num; k++) {
1151                 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
1152                 desc_cb->priv = priv;
1153                 desc_cb->dma = dma + HNS3_MAX_BD_SIZE * k;
1154                 desc_cb->type = (type == DESC_TYPE_SKB && !k) ?
1155                                 DESC_TYPE_SKB : DESC_TYPE_PAGE;
1156
1157                 /* now, fill the descriptor */
1158                 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);
1159                 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?
1160                                      (u16)sizeoflast : (u16)HNS3_MAX_BD_SIZE);
1161                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1162                                 cpu_to_le16(BIT(HNS3_TXD_VLD_B));
1163
1164                 /* move ring pointer to next */
1165                 ring_ptr_move_fw(ring, next_to_use);
1166
1167                 desc_cb = &ring->desc_cb[ring->next_to_use];
1168                 desc = &ring->desc[ring->next_to_use];
1169         }
1170
1171         return frag_buf_num;
1172 }
1173
1174 static unsigned int hns3_skb_bd_num(struct sk_buff *skb, unsigned int *bd_size,
1175                                     unsigned int bd_num)
1176 {
1177         unsigned int size;
1178         int i;
1179
1180         size = skb_headlen(skb);
1181         while (size > HNS3_MAX_BD_SIZE) {
1182                 bd_size[bd_num++] = HNS3_MAX_BD_SIZE;
1183                 size -= HNS3_MAX_BD_SIZE;
1184
1185                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1186                         return bd_num;
1187         }
1188
1189         if (size) {
1190                 bd_size[bd_num++] = size;
1191                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1192                         return bd_num;
1193         }
1194
1195         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1196                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1197                 size = skb_frag_size(frag);
1198                 if (!size)
1199                         continue;
1200
1201                 while (size > HNS3_MAX_BD_SIZE) {
1202                         bd_size[bd_num++] = HNS3_MAX_BD_SIZE;
1203                         size -= HNS3_MAX_BD_SIZE;
1204
1205                         if (bd_num > HNS3_MAX_TSO_BD_NUM)
1206                                 return bd_num;
1207                 }
1208
1209                 bd_size[bd_num++] = size;
1210                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1211                         return bd_num;
1212         }
1213
1214         return bd_num;
1215 }
1216
1217 static unsigned int hns3_tx_bd_num(struct sk_buff *skb, unsigned int *bd_size)
1218 {
1219         struct sk_buff *frag_skb;
1220         unsigned int bd_num = 0;
1221
1222         /* If the total len is within the max bd limit */
1223         if (likely(skb->len <= HNS3_MAX_BD_SIZE && !skb_has_frag_list(skb) &&
1224                    skb_shinfo(skb)->nr_frags < HNS3_MAX_NON_TSO_BD_NUM))
1225                 return skb_shinfo(skb)->nr_frags + 1U;
1226
1227         /* The below case will always be linearized, return
1228          * HNS3_MAX_BD_NUM_TSO + 1U to make sure it is linearized.
1229          */
1230         if (unlikely(skb->len > HNS3_MAX_TSO_SIZE ||
1231                      (!skb_is_gso(skb) && skb->len > HNS3_MAX_NON_TSO_SIZE)))
1232                 return HNS3_MAX_TSO_BD_NUM + 1U;
1233
1234         bd_num = hns3_skb_bd_num(skb, bd_size, bd_num);
1235
1236         if (!skb_has_frag_list(skb) || bd_num > HNS3_MAX_TSO_BD_NUM)
1237                 return bd_num;
1238
1239         skb_walk_frags(skb, frag_skb) {
1240                 bd_num = hns3_skb_bd_num(frag_skb, bd_size, bd_num);
1241                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1242                         return bd_num;
1243         }
1244
1245         return bd_num;
1246 }
1247
1248 static unsigned int hns3_gso_hdr_len(struct sk_buff *skb)
1249 {
1250         if (!skb->encapsulation)
1251                 return skb_transport_offset(skb) + tcp_hdrlen(skb);
1252
1253         return skb_inner_transport_offset(skb) + inner_tcp_hdrlen(skb);
1254 }
1255
1256 /* HW need every continuous 8 buffer data to be larger than MSS,
1257  * we simplify it by ensuring skb_headlen + the first continuous
1258  * 7 frags to to be larger than gso header len + mss, and the remaining
1259  * continuous 7 frags to be larger than MSS except the last 7 frags.
1260  */
1261 static bool hns3_skb_need_linearized(struct sk_buff *skb, unsigned int *bd_size,
1262                                      unsigned int bd_num)
1263 {
1264         unsigned int tot_len = 0;
1265         int i;
1266
1267         for (i = 0; i < HNS3_MAX_NON_TSO_BD_NUM - 1U; i++)
1268                 tot_len += bd_size[i];
1269
1270         /* ensure the first 8 frags is greater than mss + header */
1271         if (tot_len + bd_size[HNS3_MAX_NON_TSO_BD_NUM - 1U] <
1272             skb_shinfo(skb)->gso_size + hns3_gso_hdr_len(skb))
1273                 return true;
1274
1275         /* ensure every continuous 7 buffer is greater than mss
1276          * except the last one.
1277          */
1278         for (i = 0; i < bd_num - HNS3_MAX_NON_TSO_BD_NUM; i++) {
1279                 tot_len -= bd_size[i];
1280                 tot_len += bd_size[i + HNS3_MAX_NON_TSO_BD_NUM - 1U];
1281
1282                 if (tot_len < skb_shinfo(skb)->gso_size)
1283                         return true;
1284         }
1285
1286         return false;
1287 }
1288
1289 static int hns3_nic_maybe_stop_tx(struct hns3_enet_ring *ring,
1290                                   struct sk_buff **out_skb)
1291 {
1292         unsigned int bd_size[HNS3_MAX_TSO_BD_NUM + 1U];
1293         struct sk_buff *skb = *out_skb;
1294         unsigned int bd_num;
1295
1296         bd_num = hns3_tx_bd_num(skb, bd_size);
1297         if (unlikely(bd_num > HNS3_MAX_NON_TSO_BD_NUM)) {
1298                 struct sk_buff *new_skb;
1299
1300                 if (bd_num <= HNS3_MAX_TSO_BD_NUM && skb_is_gso(skb) &&
1301                     !hns3_skb_need_linearized(skb, bd_size, bd_num))
1302                         goto out;
1303
1304                 /* manual split the send packet */
1305                 new_skb = skb_copy(skb, GFP_ATOMIC);
1306                 if (!new_skb)
1307                         return -ENOMEM;
1308                 dev_kfree_skb_any(skb);
1309                 *out_skb = new_skb;
1310
1311                 bd_num = hns3_tx_bd_count(new_skb->len);
1312                 if ((skb_is_gso(new_skb) && bd_num > HNS3_MAX_TSO_BD_NUM) ||
1313                     (!skb_is_gso(new_skb) &&
1314                      bd_num > HNS3_MAX_NON_TSO_BD_NUM))
1315                         return -ENOMEM;
1316
1317                 u64_stats_update_begin(&ring->syncp);
1318                 ring->stats.tx_copy++;
1319                 u64_stats_update_end(&ring->syncp);
1320         }
1321
1322 out:
1323         if (unlikely(ring_space(ring) < bd_num))
1324                 return -EBUSY;
1325
1326         return bd_num;
1327 }
1328
1329 static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig)
1330 {
1331         struct device *dev = ring_to_dev(ring);
1332         unsigned int i;
1333
1334         for (i = 0; i < ring->desc_num; i++) {
1335                 /* check if this is where we started */
1336                 if (ring->next_to_use == next_to_use_orig)
1337                         break;
1338
1339                 /* rollback one */
1340                 ring_ptr_move_bw(ring, next_to_use);
1341
1342                 /* unmap the descriptor dma address */
1343                 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
1344                         dma_unmap_single(dev,
1345                                          ring->desc_cb[ring->next_to_use].dma,
1346                                         ring->desc_cb[ring->next_to_use].length,
1347                                         DMA_TO_DEVICE);
1348                 else if (ring->desc_cb[ring->next_to_use].length)
1349                         dma_unmap_page(dev,
1350                                        ring->desc_cb[ring->next_to_use].dma,
1351                                        ring->desc_cb[ring->next_to_use].length,
1352                                        DMA_TO_DEVICE);
1353
1354                 ring->desc_cb[ring->next_to_use].length = 0;
1355                 ring->desc_cb[ring->next_to_use].dma = 0;
1356         }
1357 }
1358
1359 static int hns3_fill_skb_to_desc(struct hns3_enet_ring *ring,
1360                                  struct sk_buff *skb, enum hns_desc_type type)
1361 {
1362         unsigned int size = skb_headlen(skb);
1363         int i, ret, bd_num = 0;
1364
1365         if (size) {
1366                 ret = hns3_fill_desc(ring, skb, size, type);
1367                 if (unlikely(ret < 0))
1368                         return ret;
1369
1370                 bd_num += ret;
1371         }
1372
1373         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1374                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1375
1376                 size = skb_frag_size(frag);
1377                 if (!size)
1378                         continue;
1379
1380                 ret = hns3_fill_desc(ring, frag, size, DESC_TYPE_PAGE);
1381                 if (unlikely(ret < 0))
1382                         return ret;
1383
1384                 bd_num += ret;
1385         }
1386
1387         return bd_num;
1388 }
1389
1390 netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
1391 {
1392         struct hns3_nic_priv *priv = netdev_priv(netdev);
1393         struct hns3_enet_ring *ring = &priv->ring[skb->queue_mapping];
1394         struct netdev_queue *dev_queue;
1395         int pre_ntu, next_to_use_head;
1396         struct sk_buff *frag_skb;
1397         int bd_num = 0;
1398         int ret;
1399
1400         /* Prefetch the data used later */
1401         prefetch(skb->data);
1402
1403         ret = hns3_nic_maybe_stop_tx(ring, &skb);
1404         if (unlikely(ret <= 0)) {
1405                 if (ret == -EBUSY) {
1406                         u64_stats_update_begin(&ring->syncp);
1407                         ring->stats.tx_busy++;
1408                         u64_stats_update_end(&ring->syncp);
1409                         goto out_net_tx_busy;
1410                 } else if (ret == -ENOMEM) {
1411                         u64_stats_update_begin(&ring->syncp);
1412                         ring->stats.sw_err_cnt++;
1413                         u64_stats_update_end(&ring->syncp);
1414                 }
1415
1416                 hns3_rl_err(netdev, "xmit error: %d!\n", ret);
1417                 goto out_err_tx_ok;
1418         }
1419
1420         next_to_use_head = ring->next_to_use;
1421
1422         ret = hns3_fill_skb_to_desc(ring, skb, DESC_TYPE_SKB);
1423         if (unlikely(ret < 0))
1424                 goto fill_err;
1425
1426         bd_num += ret;
1427
1428         if (!skb_has_frag_list(skb))
1429                 goto out;
1430
1431         skb_walk_frags(skb, frag_skb) {
1432                 ret = hns3_fill_skb_to_desc(ring, frag_skb, DESC_TYPE_PAGE);
1433                 if (unlikely(ret < 0))
1434                         goto fill_err;
1435
1436                 bd_num += ret;
1437         }
1438 out:
1439         pre_ntu = ring->next_to_use ? (ring->next_to_use - 1) :
1440                                         (ring->desc_num - 1);
1441         ring->desc[pre_ntu].tx.bdtp_fe_sc_vld_ra_ri |=
1442                                 cpu_to_le16(BIT(HNS3_TXD_FE_B));
1443
1444         /* Complete translate all packets */
1445         dev_queue = netdev_get_tx_queue(netdev, ring->queue_index);
1446         netdev_tx_sent_queue(dev_queue, skb->len);
1447
1448         wmb(); /* Commit all data before submit */
1449
1450         hnae3_queue_xmit(ring->tqp, bd_num);
1451
1452         return NETDEV_TX_OK;
1453
1454 fill_err:
1455         hns3_clear_desc(ring, next_to_use_head);
1456
1457 out_err_tx_ok:
1458         dev_kfree_skb_any(skb);
1459         return NETDEV_TX_OK;
1460
1461 out_net_tx_busy:
1462         netif_stop_subqueue(netdev, ring->queue_index);
1463         smp_mb(); /* Commit all data before submit */
1464
1465         return NETDEV_TX_BUSY;
1466 }
1467
1468 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1469 {
1470         struct hnae3_handle *h = hns3_get_handle(netdev);
1471         struct sockaddr *mac_addr = p;
1472         int ret;
1473
1474         if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1475                 return -EADDRNOTAVAIL;
1476
1477         if (ether_addr_equal(netdev->dev_addr, mac_addr->sa_data)) {
1478                 netdev_info(netdev, "already using mac address %pM\n",
1479                             mac_addr->sa_data);
1480                 return 0;
1481         }
1482
1483         /* For VF device, if there is a perm_addr, then the user will not
1484          * be allowed to change the address.
1485          */
1486         if (!hns3_is_phys_func(h->pdev) &&
1487             !is_zero_ether_addr(netdev->perm_addr)) {
1488                 netdev_err(netdev, "has permanent MAC %pM, user MAC %pM not allow\n",
1489                            netdev->perm_addr, mac_addr->sa_data);
1490                 return -EPERM;
1491         }
1492
1493         ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
1494         if (ret) {
1495                 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1496                 return ret;
1497         }
1498
1499         ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1500
1501         return 0;
1502 }
1503
1504 static int hns3_nic_do_ioctl(struct net_device *netdev,
1505                              struct ifreq *ifr, int cmd)
1506 {
1507         struct hnae3_handle *h = hns3_get_handle(netdev);
1508
1509         if (!netif_running(netdev))
1510                 return -EINVAL;
1511
1512         if (!h->ae_algo->ops->do_ioctl)
1513                 return -EOPNOTSUPP;
1514
1515         return h->ae_algo->ops->do_ioctl(h, ifr, cmd);
1516 }
1517
1518 static int hns3_nic_set_features(struct net_device *netdev,
1519                                  netdev_features_t features)
1520 {
1521         netdev_features_t changed = netdev->features ^ features;
1522         struct hns3_nic_priv *priv = netdev_priv(netdev);
1523         struct hnae3_handle *h = priv->ae_handle;
1524         bool enable;
1525         int ret;
1526
1527         if (changed & (NETIF_F_GRO_HW) && h->ae_algo->ops->set_gro_en) {
1528                 enable = !!(features & NETIF_F_GRO_HW);
1529                 ret = h->ae_algo->ops->set_gro_en(h, enable);
1530                 if (ret)
1531                         return ret;
1532         }
1533
1534         if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1535             h->ae_algo->ops->enable_vlan_filter) {
1536                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_FILTER);
1537                 h->ae_algo->ops->enable_vlan_filter(h, enable);
1538         }
1539
1540         if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1541             h->ae_algo->ops->enable_hw_strip_rxvtag) {
1542                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
1543                 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, enable);
1544                 if (ret)
1545                         return ret;
1546         }
1547
1548         if ((changed & NETIF_F_NTUPLE) && h->ae_algo->ops->enable_fd) {
1549                 enable = !!(features & NETIF_F_NTUPLE);
1550                 h->ae_algo->ops->enable_fd(h, enable);
1551         }
1552
1553         netdev->features = features;
1554         return 0;
1555 }
1556
1557 static void hns3_nic_get_stats64(struct net_device *netdev,
1558                                  struct rtnl_link_stats64 *stats)
1559 {
1560         struct hns3_nic_priv *priv = netdev_priv(netdev);
1561         int queue_num = priv->ae_handle->kinfo.num_tqps;
1562         struct hnae3_handle *handle = priv->ae_handle;
1563         struct hns3_enet_ring *ring;
1564         u64 rx_length_errors = 0;
1565         u64 rx_crc_errors = 0;
1566         u64 rx_multicast = 0;
1567         unsigned int start;
1568         u64 tx_errors = 0;
1569         u64 rx_errors = 0;
1570         unsigned int idx;
1571         u64 tx_bytes = 0;
1572         u64 rx_bytes = 0;
1573         u64 tx_pkts = 0;
1574         u64 rx_pkts = 0;
1575         u64 tx_drop = 0;
1576         u64 rx_drop = 0;
1577
1578         if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1579                 return;
1580
1581         handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1582
1583         for (idx = 0; idx < queue_num; idx++) {
1584                 /* fetch the tx stats */
1585                 ring = &priv->ring[idx];
1586                 do {
1587                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1588                         tx_bytes += ring->stats.tx_bytes;
1589                         tx_pkts += ring->stats.tx_pkts;
1590                         tx_drop += ring->stats.sw_err_cnt;
1591                         tx_drop += ring->stats.tx_vlan_err;
1592                         tx_drop += ring->stats.tx_l4_proto_err;
1593                         tx_drop += ring->stats.tx_l2l3l4_err;
1594                         tx_drop += ring->stats.tx_tso_err;
1595                         tx_errors += ring->stats.sw_err_cnt;
1596                         tx_errors += ring->stats.tx_vlan_err;
1597                         tx_errors += ring->stats.tx_l4_proto_err;
1598                         tx_errors += ring->stats.tx_l2l3l4_err;
1599                         tx_errors += ring->stats.tx_tso_err;
1600                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1601
1602                 /* fetch the rx stats */
1603                 ring = &priv->ring[idx + queue_num];
1604                 do {
1605                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1606                         rx_bytes += ring->stats.rx_bytes;
1607                         rx_pkts += ring->stats.rx_pkts;
1608                         rx_drop += ring->stats.l2_err;
1609                         rx_errors += ring->stats.l2_err;
1610                         rx_errors += ring->stats.l3l4_csum_err;
1611                         rx_crc_errors += ring->stats.l2_err;
1612                         rx_multicast += ring->stats.rx_multicast;
1613                         rx_length_errors += ring->stats.err_pkt_len;
1614                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1615         }
1616
1617         stats->tx_bytes = tx_bytes;
1618         stats->tx_packets = tx_pkts;
1619         stats->rx_bytes = rx_bytes;
1620         stats->rx_packets = rx_pkts;
1621
1622         stats->rx_errors = rx_errors;
1623         stats->multicast = rx_multicast;
1624         stats->rx_length_errors = rx_length_errors;
1625         stats->rx_crc_errors = rx_crc_errors;
1626         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1627
1628         stats->tx_errors = tx_errors;
1629         stats->rx_dropped = rx_drop;
1630         stats->tx_dropped = tx_drop;
1631         stats->collisions = netdev->stats.collisions;
1632         stats->rx_over_errors = netdev->stats.rx_over_errors;
1633         stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1634         stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1635         stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1636         stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1637         stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1638         stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1639         stats->tx_window_errors = netdev->stats.tx_window_errors;
1640         stats->rx_compressed = netdev->stats.rx_compressed;
1641         stats->tx_compressed = netdev->stats.tx_compressed;
1642 }
1643
1644 static int hns3_setup_tc(struct net_device *netdev, void *type_data)
1645 {
1646         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
1647         u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1648         struct hnae3_knic_private_info *kinfo;
1649         u8 tc = mqprio_qopt->qopt.num_tc;
1650         u16 mode = mqprio_qopt->mode;
1651         u8 hw = mqprio_qopt->qopt.hw;
1652         struct hnae3_handle *h;
1653
1654         if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1655                mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1656                 return -EOPNOTSUPP;
1657
1658         if (tc > HNAE3_MAX_TC)
1659                 return -EINVAL;
1660
1661         if (!netdev)
1662                 return -EINVAL;
1663
1664         h = hns3_get_handle(netdev);
1665         kinfo = &h->kinfo;
1666
1667         netif_dbg(h, drv, netdev, "setup tc: num_tc=%u\n", tc);
1668
1669         return (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1670                 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
1671 }
1672
1673 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
1674                              void *type_data)
1675 {
1676         if (type != TC_SETUP_QDISC_MQPRIO)
1677                 return -EOPNOTSUPP;
1678
1679         return hns3_setup_tc(dev, type_data);
1680 }
1681
1682 static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1683                                 __be16 proto, u16 vid)
1684 {
1685         struct hnae3_handle *h = hns3_get_handle(netdev);
1686         int ret = -EIO;
1687
1688         if (h->ae_algo->ops->set_vlan_filter)
1689                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1690
1691         return ret;
1692 }
1693
1694 static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1695                                  __be16 proto, u16 vid)
1696 {
1697         struct hnae3_handle *h = hns3_get_handle(netdev);
1698         int ret = -EIO;
1699
1700         if (h->ae_algo->ops->set_vlan_filter)
1701                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1702
1703         return ret;
1704 }
1705
1706 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1707                                 u8 qos, __be16 vlan_proto)
1708 {
1709         struct hnae3_handle *h = hns3_get_handle(netdev);
1710         int ret = -EIO;
1711
1712         netif_dbg(h, drv, netdev,
1713                   "set vf vlan: vf=%d, vlan=%u, qos=%u, vlan_proto=%u\n",
1714                   vf, vlan, qos, vlan_proto);
1715
1716         if (h->ae_algo->ops->set_vf_vlan_filter)
1717                 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1718                                                           qos, vlan_proto);
1719
1720         return ret;
1721 }
1722
1723 static int hns3_set_vf_spoofchk(struct net_device *netdev, int vf, bool enable)
1724 {
1725         struct hnae3_handle *handle = hns3_get_handle(netdev);
1726
1727         if (hns3_nic_resetting(netdev))
1728                 return -EBUSY;
1729
1730         if (!handle->ae_algo->ops->set_vf_spoofchk)
1731                 return -EOPNOTSUPP;
1732
1733         return handle->ae_algo->ops->set_vf_spoofchk(handle, vf, enable);
1734 }
1735
1736 static int hns3_set_vf_trust(struct net_device *netdev, int vf, bool enable)
1737 {
1738         struct hnae3_handle *handle = hns3_get_handle(netdev);
1739
1740         if (!handle->ae_algo->ops->set_vf_trust)
1741                 return -EOPNOTSUPP;
1742
1743         return handle->ae_algo->ops->set_vf_trust(handle, vf, enable);
1744 }
1745
1746 static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1747 {
1748         struct hnae3_handle *h = hns3_get_handle(netdev);
1749         int ret;
1750
1751         if (hns3_nic_resetting(netdev))
1752                 return -EBUSY;
1753
1754         if (!h->ae_algo->ops->set_mtu)
1755                 return -EOPNOTSUPP;
1756
1757         netif_dbg(h, drv, netdev,
1758                   "change mtu from %u to %d\n", netdev->mtu, new_mtu);
1759
1760         ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1761         if (ret)
1762                 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1763                            ret);
1764         else
1765                 netdev->mtu = new_mtu;
1766
1767         return ret;
1768 }
1769
1770 static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1771 {
1772         struct hns3_nic_priv *priv = netdev_priv(ndev);
1773         struct hnae3_handle *h = hns3_get_handle(ndev);
1774         struct hns3_enet_ring *tx_ring = NULL;
1775         struct napi_struct *napi;
1776         int timeout_queue = 0;
1777         int hw_head, hw_tail;
1778         int fbd_num, fbd_oft;
1779         int ebd_num, ebd_oft;
1780         int bd_num, bd_err;
1781         int ring_en, tc;
1782         int i;
1783
1784         /* Find the stopped queue the same way the stack does */
1785         for (i = 0; i < ndev->num_tx_queues; i++) {
1786                 struct netdev_queue *q;
1787                 unsigned long trans_start;
1788
1789                 q = netdev_get_tx_queue(ndev, i);
1790                 trans_start = q->trans_start;
1791                 if (netif_xmit_stopped(q) &&
1792                     time_after(jiffies,
1793                                (trans_start + ndev->watchdog_timeo))) {
1794                         timeout_queue = i;
1795                         break;
1796                 }
1797         }
1798
1799         if (i == ndev->num_tx_queues) {
1800                 netdev_info(ndev,
1801                             "no netdev TX timeout queue found, timeout count: %llu\n",
1802                             priv->tx_timeout_count);
1803                 return false;
1804         }
1805
1806         priv->tx_timeout_count++;
1807
1808         tx_ring = &priv->ring[timeout_queue];
1809         napi = &tx_ring->tqp_vector->napi;
1810
1811         netdev_info(ndev,
1812                     "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, napi state: %lu\n",
1813                     priv->tx_timeout_count, timeout_queue, tx_ring->next_to_use,
1814                     tx_ring->next_to_clean, napi->state);
1815
1816         netdev_info(ndev,
1817                     "tx_pkts: %llu, tx_bytes: %llu, io_err_cnt: %llu, sw_err_cnt: %llu\n",
1818                     tx_ring->stats.tx_pkts, tx_ring->stats.tx_bytes,
1819                     tx_ring->stats.io_err_cnt, tx_ring->stats.sw_err_cnt);
1820
1821         netdev_info(ndev,
1822                     "seg_pkt_cnt: %llu, tx_err_cnt: %llu, restart_queue: %llu, tx_busy: %llu\n",
1823                     tx_ring->stats.seg_pkt_cnt, tx_ring->stats.tx_err_cnt,
1824                     tx_ring->stats.restart_queue, tx_ring->stats.tx_busy);
1825
1826         /* When mac received many pause frames continuous, it's unable to send
1827          * packets, which may cause tx timeout
1828          */
1829         if (h->ae_algo->ops->get_mac_stats) {
1830                 struct hns3_mac_stats mac_stats;
1831
1832                 h->ae_algo->ops->get_mac_stats(h, &mac_stats);
1833                 netdev_info(ndev, "tx_pause_cnt: %llu, rx_pause_cnt: %llu\n",
1834                             mac_stats.tx_pause_cnt, mac_stats.rx_pause_cnt);
1835         }
1836
1837         hw_head = readl_relaxed(tx_ring->tqp->io_base +
1838                                 HNS3_RING_TX_RING_HEAD_REG);
1839         hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1840                                 HNS3_RING_TX_RING_TAIL_REG);
1841         fbd_num = readl_relaxed(tx_ring->tqp->io_base +
1842                                 HNS3_RING_TX_RING_FBDNUM_REG);
1843         fbd_oft = readl_relaxed(tx_ring->tqp->io_base +
1844                                 HNS3_RING_TX_RING_OFFSET_REG);
1845         ebd_num = readl_relaxed(tx_ring->tqp->io_base +
1846                                 HNS3_RING_TX_RING_EBDNUM_REG);
1847         ebd_oft = readl_relaxed(tx_ring->tqp->io_base +
1848                                 HNS3_RING_TX_RING_EBD_OFFSET_REG);
1849         bd_num = readl_relaxed(tx_ring->tqp->io_base +
1850                                HNS3_RING_TX_RING_BD_NUM_REG);
1851         bd_err = readl_relaxed(tx_ring->tqp->io_base +
1852                                HNS3_RING_TX_RING_BD_ERR_REG);
1853         ring_en = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_EN_REG);
1854         tc = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_TX_RING_TC_REG);
1855
1856         netdev_info(ndev,
1857                     "BD_NUM: 0x%x HW_HEAD: 0x%x, HW_TAIL: 0x%x, BD_ERR: 0x%x, INT: 0x%x\n",
1858                     bd_num, hw_head, hw_tail, bd_err,
1859                     readl(tx_ring->tqp_vector->mask_addr));
1860         netdev_info(ndev,
1861                     "RING_EN: 0x%x, TC: 0x%x, FBD_NUM: 0x%x FBD_OFT: 0x%x, EBD_NUM: 0x%x, EBD_OFT: 0x%x\n",
1862                     ring_en, tc, fbd_num, fbd_oft, ebd_num, ebd_oft);
1863
1864         return true;
1865 }
1866
1867 static void hns3_nic_net_timeout(struct net_device *ndev)
1868 {
1869         struct hns3_nic_priv *priv = netdev_priv(ndev);
1870         struct hnae3_handle *h = priv->ae_handle;
1871
1872         if (!hns3_get_tx_timeo_queue_info(ndev))
1873                 return;
1874
1875         /* request the reset, and let the hclge to determine
1876          * which reset level should be done
1877          */
1878         if (h->ae_algo->ops->reset_event)
1879                 h->ae_algo->ops->reset_event(h->pdev, h);
1880 }
1881
1882 #ifdef CONFIG_RFS_ACCEL
1883 static int hns3_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb,
1884                               u16 rxq_index, u32 flow_id)
1885 {
1886         struct hnae3_handle *h = hns3_get_handle(dev);
1887         struct flow_keys fkeys;
1888
1889         if (!h->ae_algo->ops->add_arfs_entry)
1890                 return -EOPNOTSUPP;
1891
1892         if (skb->encapsulation)
1893                 return -EPROTONOSUPPORT;
1894
1895         if (!skb_flow_dissect_flow_keys(skb, &fkeys, 0))
1896                 return -EPROTONOSUPPORT;
1897
1898         if ((fkeys.basic.n_proto != htons(ETH_P_IP) &&
1899              fkeys.basic.n_proto != htons(ETH_P_IPV6)) ||
1900             (fkeys.basic.ip_proto != IPPROTO_TCP &&
1901              fkeys.basic.ip_proto != IPPROTO_UDP))
1902                 return -EPROTONOSUPPORT;
1903
1904         return h->ae_algo->ops->add_arfs_entry(h, rxq_index, flow_id, &fkeys);
1905 }
1906 #endif
1907
1908 static int hns3_nic_get_vf_config(struct net_device *ndev, int vf,
1909                                   struct ifla_vf_info *ivf)
1910 {
1911         struct hnae3_handle *h = hns3_get_handle(ndev);
1912
1913         if (!h->ae_algo->ops->get_vf_config)
1914                 return -EOPNOTSUPP;
1915
1916         return h->ae_algo->ops->get_vf_config(h, vf, ivf);
1917 }
1918
1919 static int hns3_nic_set_vf_link_state(struct net_device *ndev, int vf,
1920                                       int link_state)
1921 {
1922         struct hnae3_handle *h = hns3_get_handle(ndev);
1923
1924         if (!h->ae_algo->ops->set_vf_link_state)
1925                 return -EOPNOTSUPP;
1926
1927         return h->ae_algo->ops->set_vf_link_state(h, vf, link_state);
1928 }
1929
1930 static int hns3_nic_set_vf_rate(struct net_device *ndev, int vf,
1931                                 int min_tx_rate, int max_tx_rate)
1932 {
1933         struct hnae3_handle *h = hns3_get_handle(ndev);
1934
1935         if (!h->ae_algo->ops->set_vf_rate)
1936                 return -EOPNOTSUPP;
1937
1938         return h->ae_algo->ops->set_vf_rate(h, vf, min_tx_rate, max_tx_rate,
1939                                             false);
1940 }
1941
1942 static int hns3_nic_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
1943 {
1944         struct hnae3_handle *h = hns3_get_handle(netdev);
1945
1946         if (!h->ae_algo->ops->set_vf_mac)
1947                 return -EOPNOTSUPP;
1948
1949         if (is_multicast_ether_addr(mac)) {
1950                 netdev_err(netdev,
1951                            "Invalid MAC:%pM specified. Could not set MAC\n",
1952                            mac);
1953                 return -EINVAL;
1954         }
1955
1956         return h->ae_algo->ops->set_vf_mac(h, vf_id, mac);
1957 }
1958
1959 static const struct net_device_ops hns3_nic_netdev_ops = {
1960         .ndo_open               = hns3_nic_net_open,
1961         .ndo_stop               = hns3_nic_net_stop,
1962         .ndo_start_xmit         = hns3_nic_net_xmit,
1963         .ndo_tx_timeout         = hns3_nic_net_timeout,
1964         .ndo_set_mac_address    = hns3_nic_net_set_mac_address,
1965         .ndo_do_ioctl           = hns3_nic_do_ioctl,
1966         .ndo_change_mtu         = hns3_nic_change_mtu,
1967         .ndo_set_features       = hns3_nic_set_features,
1968         .ndo_get_stats64        = hns3_nic_get_stats64,
1969         .ndo_setup_tc           = hns3_nic_setup_tc,
1970         .ndo_set_rx_mode        = hns3_nic_set_rx_mode,
1971         .ndo_vlan_rx_add_vid    = hns3_vlan_rx_add_vid,
1972         .ndo_vlan_rx_kill_vid   = hns3_vlan_rx_kill_vid,
1973         .ndo_set_vf_vlan        = hns3_ndo_set_vf_vlan,
1974         .ndo_set_vf_spoofchk    = hns3_set_vf_spoofchk,
1975         .ndo_set_vf_trust       = hns3_set_vf_trust,
1976 #ifdef CONFIG_RFS_ACCEL
1977         .ndo_rx_flow_steer      = hns3_rx_flow_steer,
1978 #endif
1979         .ndo_get_vf_config      = hns3_nic_get_vf_config,
1980         .ndo_set_vf_link_state  = hns3_nic_set_vf_link_state,
1981         .ndo_set_vf_rate        = hns3_nic_set_vf_rate,
1982         .ndo_set_vf_mac         = hns3_nic_set_vf_mac,
1983 };
1984
1985 bool hns3_is_phys_func(struct pci_dev *pdev)
1986 {
1987         u32 dev_id = pdev->device;
1988
1989         switch (dev_id) {
1990         case HNAE3_DEV_ID_GE:
1991         case HNAE3_DEV_ID_25GE:
1992         case HNAE3_DEV_ID_25GE_RDMA:
1993         case HNAE3_DEV_ID_25GE_RDMA_MACSEC:
1994         case HNAE3_DEV_ID_50GE_RDMA:
1995         case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
1996         case HNAE3_DEV_ID_100G_RDMA_MACSEC:
1997                 return true;
1998         case HNAE3_DEV_ID_100G_VF:
1999         case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF:
2000                 return false;
2001         default:
2002                 dev_warn(&pdev->dev, "un-recognized pci device-id %d",
2003                          dev_id);
2004         }
2005
2006         return false;
2007 }
2008
2009 static void hns3_disable_sriov(struct pci_dev *pdev)
2010 {
2011         /* If our VFs are assigned we cannot shut down SR-IOV
2012          * without causing issues, so just leave the hardware
2013          * available but disabled
2014          */
2015         if (pci_vfs_assigned(pdev)) {
2016                 dev_warn(&pdev->dev,
2017                          "disabling driver while VFs are assigned\n");
2018                 return;
2019         }
2020
2021         pci_disable_sriov(pdev);
2022 }
2023
2024 static void hns3_get_dev_capability(struct pci_dev *pdev,
2025                                     struct hnae3_ae_dev *ae_dev)
2026 {
2027         if (pdev->revision >= 0x21) {
2028                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B, 1);
2029                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B, 1);
2030         }
2031 }
2032
2033 /* hns3_probe - Device initialization routine
2034  * @pdev: PCI device information struct
2035  * @ent: entry in hns3_pci_tbl
2036  *
2037  * hns3_probe initializes a PF identified by a pci_dev structure.
2038  * The OS initialization, configuring of the PF private structure,
2039  * and a hardware reset occur.
2040  *
2041  * Returns 0 on success, negative on failure
2042  */
2043 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2044 {
2045         struct hnae3_ae_dev *ae_dev;
2046         int ret;
2047
2048         ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev), GFP_KERNEL);
2049         if (!ae_dev) {
2050                 ret = -ENOMEM;
2051                 return ret;
2052         }
2053
2054         ae_dev->pdev = pdev;
2055         ae_dev->flag = ent->driver_data;
2056         ae_dev->reset_type = HNAE3_NONE_RESET;
2057         hns3_get_dev_capability(pdev, ae_dev);
2058         pci_set_drvdata(pdev, ae_dev);
2059
2060         ret = hnae3_register_ae_dev(ae_dev);
2061         if (ret) {
2062                 devm_kfree(&pdev->dev, ae_dev);
2063                 pci_set_drvdata(pdev, NULL);
2064         }
2065
2066         return ret;
2067 }
2068
2069 /* hns3_remove - Device removal routine
2070  * @pdev: PCI device information struct
2071  */
2072 static void hns3_remove(struct pci_dev *pdev)
2073 {
2074         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2075
2076         if (hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))
2077                 hns3_disable_sriov(pdev);
2078
2079         hnae3_unregister_ae_dev(ae_dev);
2080         pci_set_drvdata(pdev, NULL);
2081 }
2082
2083 /**
2084  * hns3_pci_sriov_configure
2085  * @pdev: pointer to a pci_dev structure
2086  * @num_vfs: number of VFs to allocate
2087  *
2088  * Enable or change the number of VFs. Called when the user updates the number
2089  * of VFs in sysfs.
2090  **/
2091 static int hns3_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
2092 {
2093         int ret;
2094
2095         if (!(hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))) {
2096                 dev_warn(&pdev->dev, "Can not config SRIOV\n");
2097                 return -EINVAL;
2098         }
2099
2100         if (num_vfs) {
2101                 ret = pci_enable_sriov(pdev, num_vfs);
2102                 if (ret)
2103                         dev_err(&pdev->dev, "SRIOV enable failed %d\n", ret);
2104                 else
2105                         return num_vfs;
2106         } else if (!pci_vfs_assigned(pdev)) {
2107                 pci_disable_sriov(pdev);
2108         } else {
2109                 dev_warn(&pdev->dev,
2110                          "Unable to free VFs because some are assigned to VMs.\n");
2111         }
2112
2113         return 0;
2114 }
2115
2116 static void hns3_shutdown(struct pci_dev *pdev)
2117 {
2118         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2119
2120         hnae3_unregister_ae_dev(ae_dev);
2121         devm_kfree(&pdev->dev, ae_dev);
2122         pci_set_drvdata(pdev, NULL);
2123
2124         if (system_state == SYSTEM_POWER_OFF)
2125                 pci_set_power_state(pdev, PCI_D3hot);
2126 }
2127
2128 static pci_ers_result_t hns3_error_detected(struct pci_dev *pdev,
2129                                             pci_channel_state_t state)
2130 {
2131         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2132         pci_ers_result_t ret;
2133
2134         dev_info(&pdev->dev, "PCI error detected, state(=%d)!!\n", state);
2135
2136         if (state == pci_channel_io_perm_failure)
2137                 return PCI_ERS_RESULT_DISCONNECT;
2138
2139         if (!ae_dev || !ae_dev->ops) {
2140                 dev_err(&pdev->dev,
2141                         "Can't recover - error happened before device initialized\n");
2142                 return PCI_ERS_RESULT_NONE;
2143         }
2144
2145         if (ae_dev->ops->handle_hw_ras_error)
2146                 ret = ae_dev->ops->handle_hw_ras_error(ae_dev);
2147         else
2148                 return PCI_ERS_RESULT_NONE;
2149
2150         return ret;
2151 }
2152
2153 static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev)
2154 {
2155         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2156         const struct hnae3_ae_ops *ops;
2157         enum hnae3_reset_type reset_type;
2158         struct device *dev = &pdev->dev;
2159
2160         if (!ae_dev || !ae_dev->ops)
2161                 return PCI_ERS_RESULT_NONE;
2162
2163         ops = ae_dev->ops;
2164         /* request the reset */
2165         if (ops->reset_event && ops->get_reset_level &&
2166             ops->set_default_reset_request) {
2167                 if (ae_dev->hw_err_reset_req) {
2168                         reset_type = ops->get_reset_level(ae_dev,
2169                                                 &ae_dev->hw_err_reset_req);
2170                         ops->set_default_reset_request(ae_dev, reset_type);
2171                         dev_info(dev, "requesting reset due to PCI error\n");
2172                         ops->reset_event(pdev, NULL);
2173                 }
2174
2175                 return PCI_ERS_RESULT_RECOVERED;
2176         }
2177
2178         return PCI_ERS_RESULT_DISCONNECT;
2179 }
2180
2181 static void hns3_reset_prepare(struct pci_dev *pdev)
2182 {
2183         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2184
2185         dev_info(&pdev->dev, "hns3 flr prepare\n");
2186         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_prepare)
2187                 ae_dev->ops->flr_prepare(ae_dev);
2188 }
2189
2190 static void hns3_reset_done(struct pci_dev *pdev)
2191 {
2192         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2193
2194         dev_info(&pdev->dev, "hns3 flr done\n");
2195         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_done)
2196                 ae_dev->ops->flr_done(ae_dev);
2197 }
2198
2199 static const struct pci_error_handlers hns3_err_handler = {
2200         .error_detected = hns3_error_detected,
2201         .slot_reset     = hns3_slot_reset,
2202         .reset_prepare  = hns3_reset_prepare,
2203         .reset_done     = hns3_reset_done,
2204 };
2205
2206 static struct pci_driver hns3_driver = {
2207         .name     = hns3_driver_name,
2208         .id_table = hns3_pci_tbl,
2209         .probe    = hns3_probe,
2210         .remove   = hns3_remove,
2211         .shutdown = hns3_shutdown,
2212         .sriov_configure = hns3_pci_sriov_configure,
2213         .err_handler    = &hns3_err_handler,
2214 };
2215
2216 /* set default feature to hns3 */
2217 static void hns3_set_default_feature(struct net_device *netdev)
2218 {
2219         struct hnae3_handle *h = hns3_get_handle(netdev);
2220         struct pci_dev *pdev = h->pdev;
2221
2222         netdev->priv_flags |= IFF_UNICAST_FLT;
2223
2224         netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2225                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2226                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2227                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2228                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC |
2229                 NETIF_F_TSO_MANGLEID | NETIF_F_FRAGLIST;
2230
2231         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
2232
2233         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2234                 NETIF_F_HW_VLAN_CTAG_FILTER |
2235                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2236                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2237                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2238                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2239                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC |
2240                 NETIF_F_FRAGLIST;
2241
2242         netdev->vlan_features |=
2243                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
2244                 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
2245                 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2246                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2247                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC |
2248                 NETIF_F_FRAGLIST;
2249
2250         netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2251                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2252                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2253                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2254                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2255                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC |
2256                 NETIF_F_FRAGLIST;
2257
2258         if (pdev->revision >= 0x21) {
2259                 netdev->hw_features |= NETIF_F_GRO_HW;
2260                 netdev->features |= NETIF_F_GRO_HW;
2261
2262                 if (!(h->flags & HNAE3_SUPPORT_VF)) {
2263                         netdev->hw_features |= NETIF_F_NTUPLE;
2264                         netdev->features |= NETIF_F_NTUPLE;
2265                 }
2266         }
2267 }
2268
2269 static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
2270                              struct hns3_desc_cb *cb)
2271 {
2272         unsigned int order = hns3_page_order(ring);
2273         struct page *p;
2274
2275         p = dev_alloc_pages(order);
2276         if (!p)
2277                 return -ENOMEM;
2278
2279         cb->priv = p;
2280         cb->page_offset = 0;
2281         cb->reuse_flag = 0;
2282         cb->buf  = page_address(p);
2283         cb->length = hns3_page_size(ring);
2284         cb->type = DESC_TYPE_PAGE;
2285
2286         return 0;
2287 }
2288
2289 static void hns3_free_buffer(struct hns3_enet_ring *ring,
2290                              struct hns3_desc_cb *cb)
2291 {
2292         if (cb->type == DESC_TYPE_SKB)
2293                 dev_kfree_skb_any((struct sk_buff *)cb->priv);
2294         else if (!HNAE3_IS_TX_RING(ring))
2295                 put_page((struct page *)cb->priv);
2296         memset(cb, 0, sizeof(*cb));
2297 }
2298
2299 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
2300 {
2301         cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
2302                                cb->length, ring_to_dma_dir(ring));
2303
2304         if (unlikely(dma_mapping_error(ring_to_dev(ring), cb->dma)))
2305                 return -EIO;
2306
2307         return 0;
2308 }
2309
2310 static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
2311                               struct hns3_desc_cb *cb)
2312 {
2313         if (cb->type == DESC_TYPE_SKB)
2314                 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
2315                                  ring_to_dma_dir(ring));
2316         else if (cb->length)
2317                 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
2318                                ring_to_dma_dir(ring));
2319 }
2320
2321 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
2322 {
2323         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2324         ring->desc[i].addr = 0;
2325 }
2326
2327 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
2328 {
2329         struct hns3_desc_cb *cb = &ring->desc_cb[i];
2330
2331         if (!ring->desc_cb[i].dma)
2332                 return;
2333
2334         hns3_buffer_detach(ring, i);
2335         hns3_free_buffer(ring, cb);
2336 }
2337
2338 static void hns3_free_buffers(struct hns3_enet_ring *ring)
2339 {
2340         int i;
2341
2342         for (i = 0; i < ring->desc_num; i++)
2343                 hns3_free_buffer_detach(ring, i);
2344 }
2345
2346 /* free desc along with its attached buffer */
2347 static void hns3_free_desc(struct hns3_enet_ring *ring)
2348 {
2349         int size = ring->desc_num * sizeof(ring->desc[0]);
2350
2351         hns3_free_buffers(ring);
2352
2353         if (ring->desc) {
2354                 dma_free_coherent(ring_to_dev(ring), size,
2355                                   ring->desc, ring->desc_dma_addr);
2356                 ring->desc = NULL;
2357         }
2358 }
2359
2360 static int hns3_alloc_desc(struct hns3_enet_ring *ring)
2361 {
2362         int size = ring->desc_num * sizeof(ring->desc[0]);
2363
2364         ring->desc = dma_alloc_coherent(ring_to_dev(ring), size,
2365                                         &ring->desc_dma_addr, GFP_KERNEL);
2366         if (!ring->desc)
2367                 return -ENOMEM;
2368
2369         return 0;
2370 }
2371
2372 static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
2373                                    struct hns3_desc_cb *cb)
2374 {
2375         int ret;
2376
2377         ret = hns3_alloc_buffer(ring, cb);
2378         if (ret)
2379                 goto out;
2380
2381         ret = hns3_map_buffer(ring, cb);
2382         if (ret)
2383                 goto out_with_buf;
2384
2385         return 0;
2386
2387 out_with_buf:
2388         hns3_free_buffer(ring, cb);
2389 out:
2390         return ret;
2391 }
2392
2393 static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
2394 {
2395         int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
2396
2397         if (ret)
2398                 return ret;
2399
2400         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2401
2402         return 0;
2403 }
2404
2405 /* Allocate memory for raw pkg, and map with dma */
2406 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
2407 {
2408         int i, j, ret;
2409
2410         for (i = 0; i < ring->desc_num; i++) {
2411                 ret = hns3_alloc_buffer_attach(ring, i);
2412                 if (ret)
2413                         goto out_buffer_fail;
2414         }
2415
2416         return 0;
2417
2418 out_buffer_fail:
2419         for (j = i - 1; j >= 0; j--)
2420                 hns3_free_buffer_detach(ring, j);
2421         return ret;
2422 }
2423
2424 /* detach a in-used buffer and replace with a reserved one */
2425 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
2426                                 struct hns3_desc_cb *res_cb)
2427 {
2428         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2429         ring->desc_cb[i] = *res_cb;
2430         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2431         ring->desc[i].rx.bd_base_info = 0;
2432 }
2433
2434 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
2435 {
2436         ring->desc_cb[i].reuse_flag = 0;
2437         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma +
2438                                          ring->desc_cb[i].page_offset);
2439         ring->desc[i].rx.bd_base_info = 0;
2440 }
2441
2442 static void hns3_nic_reclaim_desc(struct hns3_enet_ring *ring, int head,
2443                                   int *bytes, int *pkts)
2444 {
2445         int ntc = ring->next_to_clean;
2446         struct hns3_desc_cb *desc_cb;
2447
2448         while (head != ntc) {
2449                 desc_cb = &ring->desc_cb[ntc];
2450                 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
2451                 (*bytes) += desc_cb->length;
2452                 /* desc_cb will be cleaned, after hnae3_free_buffer_detach */
2453                 hns3_free_buffer_detach(ring, ntc);
2454
2455                 if (++ntc == ring->desc_num)
2456                         ntc = 0;
2457
2458                 /* Issue prefetch for next Tx descriptor */
2459                 prefetch(&ring->desc_cb[ntc]);
2460         }
2461
2462         /* This smp_store_release() pairs with smp_load_acquire() in
2463          * ring_space called by hns3_nic_net_xmit.
2464          */
2465         smp_store_release(&ring->next_to_clean, ntc);
2466 }
2467
2468 static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
2469 {
2470         int u = ring->next_to_use;
2471         int c = ring->next_to_clean;
2472
2473         if (unlikely(h > ring->desc_num))
2474                 return 0;
2475
2476         return u > c ? (h > c && h <= u) : (h > c || h <= u);
2477 }
2478
2479 void hns3_clean_tx_ring(struct hns3_enet_ring *ring)
2480 {
2481         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2482         struct hns3_nic_priv *priv = netdev_priv(netdev);
2483         struct netdev_queue *dev_queue;
2484         int bytes, pkts;
2485         int head;
2486
2487         head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
2488         rmb(); /* Make sure head is ready before touch any data */
2489
2490         if (is_ring_empty(ring) || head == ring->next_to_clean)
2491                 return; /* no data to poll */
2492
2493         if (unlikely(!is_valid_clean_head(ring, head))) {
2494                 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
2495                            ring->next_to_use, ring->next_to_clean);
2496
2497                 u64_stats_update_begin(&ring->syncp);
2498                 ring->stats.io_err_cnt++;
2499                 u64_stats_update_end(&ring->syncp);
2500                 return;
2501         }
2502
2503         bytes = 0;
2504         pkts = 0;
2505         hns3_nic_reclaim_desc(ring, head, &bytes, &pkts);
2506
2507         ring->tqp_vector->tx_group.total_bytes += bytes;
2508         ring->tqp_vector->tx_group.total_packets += pkts;
2509
2510         u64_stats_update_begin(&ring->syncp);
2511         ring->stats.tx_bytes += bytes;
2512         ring->stats.tx_pkts += pkts;
2513         u64_stats_update_end(&ring->syncp);
2514
2515         dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
2516         netdev_tx_completed_queue(dev_queue, pkts, bytes);
2517
2518         if (unlikely(pkts && netif_carrier_ok(netdev) &&
2519                      ring_space(ring) > HNS3_MAX_TSO_BD_NUM)) {
2520                 /* Make sure that anybody stopping the queue after this
2521                  * sees the new next_to_clean.
2522                  */
2523                 smp_mb();
2524                 if (netif_tx_queue_stopped(dev_queue) &&
2525                     !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
2526                         netif_tx_wake_queue(dev_queue);
2527                         ring->stats.restart_queue++;
2528                 }
2529         }
2530 }
2531
2532 static int hns3_desc_unused(struct hns3_enet_ring *ring)
2533 {
2534         int ntc = ring->next_to_clean;
2535         int ntu = ring->next_to_use;
2536
2537         return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
2538 }
2539
2540 static void hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring,
2541                                       int cleand_count)
2542 {
2543         struct hns3_desc_cb *desc_cb;
2544         struct hns3_desc_cb res_cbs;
2545         int i, ret;
2546
2547         for (i = 0; i < cleand_count; i++) {
2548                 desc_cb = &ring->desc_cb[ring->next_to_use];
2549                 if (desc_cb->reuse_flag) {
2550                         u64_stats_update_begin(&ring->syncp);
2551                         ring->stats.reuse_pg_cnt++;
2552                         u64_stats_update_end(&ring->syncp);
2553
2554                         hns3_reuse_buffer(ring, ring->next_to_use);
2555                 } else {
2556                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
2557                         if (ret) {
2558                                 u64_stats_update_begin(&ring->syncp);
2559                                 ring->stats.sw_err_cnt++;
2560                                 u64_stats_update_end(&ring->syncp);
2561
2562                                 hns3_rl_err(ring->tqp_vector->napi.dev,
2563                                             "alloc rx buffer failed: %d\n",
2564                                             ret);
2565                                 break;
2566                         }
2567                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
2568
2569                         u64_stats_update_begin(&ring->syncp);
2570                         ring->stats.non_reuse_pg++;
2571                         u64_stats_update_end(&ring->syncp);
2572                 }
2573
2574                 ring_ptr_move_fw(ring, next_to_use);
2575         }
2576
2577         wmb(); /* Make all data has been write before submit */
2578         writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
2579 }
2580
2581 static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2582                                 struct hns3_enet_ring *ring, int pull_len,
2583                                 struct hns3_desc_cb *desc_cb)
2584 {
2585         struct hns3_desc *desc = &ring->desc[ring->next_to_clean];
2586         int size = le16_to_cpu(desc->rx.size);
2587         u32 truesize = hns3_buf_size(ring);
2588
2589         skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2590                         size - pull_len, truesize);
2591
2592         /* Avoid re-using remote pages, or the stack is still using the page
2593          * when page_offset rollback to zero, flag default unreuse
2594          */
2595         if (unlikely(page_to_nid(desc_cb->priv) != numa_mem_id()) ||
2596             (!desc_cb->page_offset && page_count(desc_cb->priv) > 1))
2597                 return;
2598
2599         /* Move offset up to the next cache line */
2600         desc_cb->page_offset += truesize;
2601
2602         if (desc_cb->page_offset + truesize <= hns3_page_size(ring)) {
2603                 desc_cb->reuse_flag = 1;
2604                 /* Bump ref count on page before it is given */
2605                 get_page(desc_cb->priv);
2606         } else if (page_count(desc_cb->priv) == 1) {
2607                 desc_cb->reuse_flag = 1;
2608                 desc_cb->page_offset = 0;
2609                 get_page(desc_cb->priv);
2610         }
2611 }
2612
2613 static int hns3_gro_complete(struct sk_buff *skb, u32 l234info)
2614 {
2615         __be16 type = skb->protocol;
2616         struct tcphdr *th;
2617         int depth = 0;
2618
2619         while (eth_type_vlan(type)) {
2620                 struct vlan_hdr *vh;
2621
2622                 if ((depth + VLAN_HLEN) > skb_headlen(skb))
2623                         return -EFAULT;
2624
2625                 vh = (struct vlan_hdr *)(skb->data + depth);
2626                 type = vh->h_vlan_encapsulated_proto;
2627                 depth += VLAN_HLEN;
2628         }
2629
2630         skb_set_network_header(skb, depth);
2631
2632         if (type == htons(ETH_P_IP)) {
2633                 const struct iphdr *iph = ip_hdr(skb);
2634
2635                 depth += sizeof(struct iphdr);
2636                 skb_set_transport_header(skb, depth);
2637                 th = tcp_hdr(skb);
2638                 th->check = ~tcp_v4_check(skb->len - depth, iph->saddr,
2639                                           iph->daddr, 0);
2640         } else if (type == htons(ETH_P_IPV6)) {
2641                 const struct ipv6hdr *iph = ipv6_hdr(skb);
2642
2643                 depth += sizeof(struct ipv6hdr);
2644                 skb_set_transport_header(skb, depth);
2645                 th = tcp_hdr(skb);
2646                 th->check = ~tcp_v6_check(skb->len - depth, &iph->saddr,
2647                                           &iph->daddr, 0);
2648         } else {
2649                 hns3_rl_err(skb->dev,
2650                             "Error: FW GRO supports only IPv4/IPv6, not 0x%04x, depth: %d\n",
2651                             be16_to_cpu(type), depth);
2652                 return -EFAULT;
2653         }
2654
2655         skb_shinfo(skb)->gso_segs = NAPI_GRO_CB(skb)->count;
2656         if (th->cwr)
2657                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_ECN;
2658
2659         if (l234info & BIT(HNS3_RXD_GRO_FIXID_B))
2660                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_FIXEDID;
2661
2662         skb->csum_start = (unsigned char *)th - skb->head;
2663         skb->csum_offset = offsetof(struct tcphdr, check);
2664         skb->ip_summed = CHECKSUM_PARTIAL;
2665         return 0;
2666 }
2667
2668 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2669                              u32 l234info, u32 bd_base_info, u32 ol_info)
2670 {
2671         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2672         int l3_type, l4_type;
2673         int ol4_type;
2674
2675         skb->ip_summed = CHECKSUM_NONE;
2676
2677         skb_checksum_none_assert(skb);
2678
2679         if (!(netdev->features & NETIF_F_RXCSUM))
2680                 return;
2681
2682         /* check if hardware has done checksum */
2683         if (!(bd_base_info & BIT(HNS3_RXD_L3L4P_B)))
2684                 return;
2685
2686         if (unlikely(l234info & (BIT(HNS3_RXD_L3E_B) | BIT(HNS3_RXD_L4E_B) |
2687                                  BIT(HNS3_RXD_OL3E_B) |
2688                                  BIT(HNS3_RXD_OL4E_B)))) {
2689                 u64_stats_update_begin(&ring->syncp);
2690                 ring->stats.l3l4_csum_err++;
2691                 u64_stats_update_end(&ring->syncp);
2692
2693                 return;
2694         }
2695
2696         ol4_type = hnae3_get_field(ol_info, HNS3_RXD_OL4ID_M,
2697                                    HNS3_RXD_OL4ID_S);
2698         switch (ol4_type) {
2699         case HNS3_OL4_TYPE_MAC_IN_UDP:
2700         case HNS3_OL4_TYPE_NVGRE:
2701                 skb->csum_level = 1;
2702                 /* fall through */
2703         case HNS3_OL4_TYPE_NO_TUN:
2704                 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2705                                           HNS3_RXD_L3ID_S);
2706                 l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
2707                                           HNS3_RXD_L4ID_S);
2708
2709                 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2710                 if ((l3_type == HNS3_L3_TYPE_IPV4 ||
2711                      l3_type == HNS3_L3_TYPE_IPV6) &&
2712                     (l4_type == HNS3_L4_TYPE_UDP ||
2713                      l4_type == HNS3_L4_TYPE_TCP ||
2714                      l4_type == HNS3_L4_TYPE_SCTP))
2715                         skb->ip_summed = CHECKSUM_UNNECESSARY;
2716                 break;
2717         default:
2718                 break;
2719         }
2720 }
2721
2722 static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2723 {
2724         if (skb_has_frag_list(skb))
2725                 napi_gro_flush(&ring->tqp_vector->napi, false);
2726
2727         napi_gro_receive(&ring->tqp_vector->napi, skb);
2728 }
2729
2730 static bool hns3_parse_vlan_tag(struct hns3_enet_ring *ring,
2731                                 struct hns3_desc *desc, u32 l234info,
2732                                 u16 *vlan_tag)
2733 {
2734         struct hnae3_handle *handle = ring->tqp->handle;
2735         struct pci_dev *pdev = ring->tqp->handle->pdev;
2736
2737         if (pdev->revision == 0x20) {
2738                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2739                 if (!(*vlan_tag & VLAN_VID_MASK))
2740                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2741
2742                 return (*vlan_tag != 0);
2743         }
2744
2745 #define HNS3_STRP_OUTER_VLAN    0x1
2746 #define HNS3_STRP_INNER_VLAN    0x2
2747 #define HNS3_STRP_BOTH          0x3
2748
2749         /* Hardware always insert VLAN tag into RX descriptor when
2750          * remove the tag from packet, driver needs to determine
2751          * reporting which tag to stack.
2752          */
2753         switch (hnae3_get_field(l234info, HNS3_RXD_STRP_TAGP_M,
2754                                 HNS3_RXD_STRP_TAGP_S)) {
2755         case HNS3_STRP_OUTER_VLAN:
2756                 if (handle->port_base_vlan_state !=
2757                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2758                         return false;
2759
2760                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2761                 return true;
2762         case HNS3_STRP_INNER_VLAN:
2763                 if (handle->port_base_vlan_state !=
2764                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2765                         return false;
2766
2767                 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2768                 return true;
2769         case HNS3_STRP_BOTH:
2770                 if (handle->port_base_vlan_state ==
2771                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2772                         *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2773                 else
2774                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2775
2776                 return true;
2777         default:
2778                 return false;
2779         }
2780 }
2781
2782 static int hns3_alloc_skb(struct hns3_enet_ring *ring, unsigned int length,
2783                           unsigned char *va)
2784 {
2785 #define HNS3_NEED_ADD_FRAG      1
2786         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
2787         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2788         struct sk_buff *skb;
2789
2790         ring->skb = napi_alloc_skb(&ring->tqp_vector->napi, HNS3_RX_HEAD_SIZE);
2791         skb = ring->skb;
2792         if (unlikely(!skb)) {
2793                 hns3_rl_err(netdev, "alloc rx skb fail\n");
2794
2795                 u64_stats_update_begin(&ring->syncp);
2796                 ring->stats.sw_err_cnt++;
2797                 u64_stats_update_end(&ring->syncp);
2798
2799                 return -ENOMEM;
2800         }
2801
2802         prefetchw(skb->data);
2803
2804         ring->pending_buf = 1;
2805         ring->frag_num = 0;
2806         ring->tail_skb = NULL;
2807         if (length <= HNS3_RX_HEAD_SIZE) {
2808                 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2809
2810                 /* We can reuse buffer as-is, just make sure it is local */
2811                 if (likely(page_to_nid(desc_cb->priv) == numa_mem_id()))
2812                         desc_cb->reuse_flag = 1;
2813                 else /* This page cannot be reused so discard it */
2814                         put_page(desc_cb->priv);
2815
2816                 ring_ptr_move_fw(ring, next_to_clean);
2817                 return 0;
2818         }
2819         u64_stats_update_begin(&ring->syncp);
2820         ring->stats.seg_pkt_cnt++;
2821         u64_stats_update_end(&ring->syncp);
2822
2823         ring->pull_len = eth_get_headlen(netdev, va, HNS3_RX_HEAD_SIZE);
2824         __skb_put(skb, ring->pull_len);
2825         hns3_nic_reuse_page(skb, ring->frag_num++, ring, ring->pull_len,
2826                             desc_cb);
2827         ring_ptr_move_fw(ring, next_to_clean);
2828
2829         return HNS3_NEED_ADD_FRAG;
2830 }
2831
2832 static int hns3_add_frag(struct hns3_enet_ring *ring, struct hns3_desc *desc,
2833                          struct sk_buff **out_skb, bool pending)
2834 {
2835         struct sk_buff *skb = *out_skb;
2836         struct sk_buff *head_skb = *out_skb;
2837         struct sk_buff *new_skb;
2838         struct hns3_desc_cb *desc_cb;
2839         struct hns3_desc *pre_desc;
2840         u32 bd_base_info;
2841         int pre_bd;
2842
2843         /* if there is pending bd, the SW param next_to_clean has moved
2844          * to next and the next is NULL
2845          */
2846         if (pending) {
2847                 pre_bd = (ring->next_to_clean - 1 + ring->desc_num) %
2848                          ring->desc_num;
2849                 pre_desc = &ring->desc[pre_bd];
2850                 bd_base_info = le32_to_cpu(pre_desc->rx.bd_base_info);
2851         } else {
2852                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2853         }
2854
2855         while (!(bd_base_info & BIT(HNS3_RXD_FE_B))) {
2856                 desc = &ring->desc[ring->next_to_clean];
2857                 desc_cb = &ring->desc_cb[ring->next_to_clean];
2858                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2859                 /* make sure HW write desc complete */
2860                 dma_rmb();
2861                 if (!(bd_base_info & BIT(HNS3_RXD_VLD_B)))
2862                         return -ENXIO;
2863
2864                 if (unlikely(ring->frag_num >= MAX_SKB_FRAGS)) {
2865                         new_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2866                                                  HNS3_RX_HEAD_SIZE);
2867                         if (unlikely(!new_skb)) {
2868                                 hns3_rl_err(ring->tqp_vector->napi.dev,
2869                                             "alloc rx fraglist skb fail\n");
2870                                 return -ENXIO;
2871                         }
2872                         ring->frag_num = 0;
2873
2874                         if (ring->tail_skb) {
2875                                 ring->tail_skb->next = new_skb;
2876                                 ring->tail_skb = new_skb;
2877                         } else {
2878                                 skb_shinfo(skb)->frag_list = new_skb;
2879                                 ring->tail_skb = new_skb;
2880                         }
2881                 }
2882
2883                 if (ring->tail_skb) {
2884                         head_skb->truesize += hns3_buf_size(ring);
2885                         head_skb->data_len += le16_to_cpu(desc->rx.size);
2886                         head_skb->len += le16_to_cpu(desc->rx.size);
2887                         skb = ring->tail_skb;
2888                 }
2889
2890                 hns3_nic_reuse_page(skb, ring->frag_num++, ring, 0, desc_cb);
2891                 ring_ptr_move_fw(ring, next_to_clean);
2892                 ring->pending_buf++;
2893         }
2894
2895         return 0;
2896 }
2897
2898 static int hns3_set_gro_and_checksum(struct hns3_enet_ring *ring,
2899                                      struct sk_buff *skb, u32 l234info,
2900                                      u32 bd_base_info, u32 ol_info)
2901 {
2902         u32 l3_type;
2903
2904         skb_shinfo(skb)->gso_size = hnae3_get_field(bd_base_info,
2905                                                     HNS3_RXD_GRO_SIZE_M,
2906                                                     HNS3_RXD_GRO_SIZE_S);
2907         /* if there is no HW GRO, do not set gro params */
2908         if (!skb_shinfo(skb)->gso_size) {
2909                 hns3_rx_checksum(ring, skb, l234info, bd_base_info, ol_info);
2910                 return 0;
2911         }
2912
2913         NAPI_GRO_CB(skb)->count = hnae3_get_field(l234info,
2914                                                   HNS3_RXD_GRO_COUNT_M,
2915                                                   HNS3_RXD_GRO_COUNT_S);
2916
2917         l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S);
2918         if (l3_type == HNS3_L3_TYPE_IPV4)
2919                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
2920         else if (l3_type == HNS3_L3_TYPE_IPV6)
2921                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
2922         else
2923                 return -EFAULT;
2924
2925         return  hns3_gro_complete(skb, l234info);
2926 }
2927
2928 static void hns3_set_rx_skb_rss_type(struct hns3_enet_ring *ring,
2929                                      struct sk_buff *skb, u32 rss_hash)
2930 {
2931         struct hnae3_handle *handle = ring->tqp->handle;
2932         enum pkt_hash_types rss_type;
2933
2934         if (rss_hash)
2935                 rss_type = handle->kinfo.rss_type;
2936         else
2937                 rss_type = PKT_HASH_TYPE_NONE;
2938
2939         skb_set_hash(skb, rss_hash, rss_type);
2940 }
2941
2942 static int hns3_handle_bdinfo(struct hns3_enet_ring *ring, struct sk_buff *skb)
2943 {
2944         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2945         enum hns3_pkt_l2t_type l2_frame_type;
2946         u32 bd_base_info, l234info, ol_info;
2947         struct hns3_desc *desc;
2948         unsigned int len;
2949         int pre_ntc, ret;
2950
2951         /* bdinfo handled below is only valid on the last BD of the
2952          * current packet, and ring->next_to_clean indicates the first
2953          * descriptor of next packet, so need - 1 below.
2954          */
2955         pre_ntc = ring->next_to_clean ? (ring->next_to_clean - 1) :
2956                                         (ring->desc_num - 1);
2957         desc = &ring->desc[pre_ntc];
2958         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2959         l234info = le32_to_cpu(desc->rx.l234_info);
2960         ol_info = le32_to_cpu(desc->rx.ol_info);
2961
2962         /* Based on hw strategy, the tag offloaded will be stored at
2963          * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2964          * in one layer tag case.
2965          */
2966         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2967                 u16 vlan_tag;
2968
2969                 if (hns3_parse_vlan_tag(ring, desc, l234info, &vlan_tag))
2970                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
2971                                                vlan_tag);
2972         }
2973
2974         if (unlikely(!desc->rx.pkt_len || (l234info & (BIT(HNS3_RXD_TRUNCAT_B) |
2975                                   BIT(HNS3_RXD_L2E_B))))) {
2976                 u64_stats_update_begin(&ring->syncp);
2977                 if (l234info & BIT(HNS3_RXD_L2E_B))
2978                         ring->stats.l2_err++;
2979                 else
2980                         ring->stats.err_pkt_len++;
2981                 u64_stats_update_end(&ring->syncp);
2982
2983                 return -EFAULT;
2984         }
2985
2986         len = skb->len;
2987
2988         /* Do update ip stack process */
2989         skb->protocol = eth_type_trans(skb, netdev);
2990
2991         /* This is needed in order to enable forwarding support */
2992         ret = hns3_set_gro_and_checksum(ring, skb, l234info,
2993                                         bd_base_info, ol_info);
2994         if (unlikely(ret)) {
2995                 u64_stats_update_begin(&ring->syncp);
2996                 ring->stats.rx_err_cnt++;
2997                 u64_stats_update_end(&ring->syncp);
2998                 return ret;
2999         }
3000
3001         l2_frame_type = hnae3_get_field(l234info, HNS3_RXD_DMAC_M,
3002                                         HNS3_RXD_DMAC_S);
3003
3004         u64_stats_update_begin(&ring->syncp);
3005         ring->stats.rx_pkts++;
3006         ring->stats.rx_bytes += len;
3007
3008         if (l2_frame_type == HNS3_L2_TYPE_MULTICAST)
3009                 ring->stats.rx_multicast++;
3010
3011         u64_stats_update_end(&ring->syncp);
3012
3013         ring->tqp_vector->rx_group.total_bytes += len;
3014
3015         hns3_set_rx_skb_rss_type(ring, skb, le32_to_cpu(desc->rx.rss_hash));
3016         return 0;
3017 }
3018
3019 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
3020                              struct sk_buff **out_skb)
3021 {
3022         struct sk_buff *skb = ring->skb;
3023         struct hns3_desc_cb *desc_cb;
3024         struct hns3_desc *desc;
3025         unsigned int length;
3026         u32 bd_base_info;
3027         int ret;
3028
3029         desc = &ring->desc[ring->next_to_clean];
3030         desc_cb = &ring->desc_cb[ring->next_to_clean];
3031
3032         prefetch(desc);
3033
3034         length = le16_to_cpu(desc->rx.size);
3035         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
3036
3037         /* Check valid BD */
3038         if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B))))
3039                 return -ENXIO;
3040
3041         if (!skb)
3042                 ring->va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
3043
3044         /* Prefetch first cache line of first page
3045          * Idea is to cache few bytes of the header of the packet. Our L1 Cache
3046          * line size is 64B so need to prefetch twice to make it 128B. But in
3047          * actual we can have greater size of caches with 128B Level 1 cache
3048          * lines. In such a case, single fetch would suffice to cache in the
3049          * relevant part of the header.
3050          */
3051         prefetch(ring->va);
3052 #if L1_CACHE_BYTES < 128
3053         prefetch(ring->va + L1_CACHE_BYTES);
3054 #endif
3055
3056         if (!skb) {
3057                 ret = hns3_alloc_skb(ring, length, ring->va);
3058                 *out_skb = skb = ring->skb;
3059
3060                 if (ret < 0) /* alloc buffer fail */
3061                         return ret;
3062                 if (ret > 0) { /* need add frag */
3063                         ret = hns3_add_frag(ring, desc, &skb, false);
3064                         if (ret)
3065                                 return ret;
3066
3067                         /* As the head data may be changed when GRO enable, copy
3068                          * the head data in after other data rx completed
3069                          */
3070                         memcpy(skb->data, ring->va,
3071                                ALIGN(ring->pull_len, sizeof(long)));
3072                 }
3073         } else {
3074                 ret = hns3_add_frag(ring, desc, &skb, true);
3075                 if (ret)
3076                         return ret;
3077
3078                 /* As the head data may be changed when GRO enable, copy
3079                  * the head data in after other data rx completed
3080                  */
3081                 memcpy(skb->data, ring->va,
3082                        ALIGN(ring->pull_len, sizeof(long)));
3083         }
3084
3085         ret = hns3_handle_bdinfo(ring, skb);
3086         if (unlikely(ret)) {
3087                 dev_kfree_skb_any(skb);
3088                 return ret;
3089         }
3090
3091         skb_record_rx_queue(skb, ring->tqp->tqp_index);
3092         *out_skb = skb;
3093
3094         return 0;
3095 }
3096
3097 int hns3_clean_rx_ring(struct hns3_enet_ring *ring, int budget,
3098                        void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
3099 {
3100 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
3101         int unused_count = hns3_desc_unused(ring);
3102         struct sk_buff *skb = ring->skb;
3103         int recv_pkts = 0;
3104         int recv_bds = 0;
3105         int err, num;
3106
3107         num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
3108         rmb(); /* Make sure num taken effect before the other data is touched */
3109
3110         num -= unused_count;
3111         unused_count -= ring->pending_buf;
3112
3113         while (recv_pkts < budget && recv_bds < num) {
3114                 /* Reuse or realloc buffers */
3115                 if (unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
3116                         hns3_nic_alloc_rx_buffers(ring, unused_count);
3117                         unused_count = hns3_desc_unused(ring) -
3118                                         ring->pending_buf;
3119                 }
3120
3121                 /* Poll one pkt */
3122                 err = hns3_handle_rx_bd(ring, &skb);
3123                 if (unlikely(!skb)) /* This fault cannot be repaired */
3124                         goto out;
3125
3126                 if (err == -ENXIO) { /* Do not get FE for the packet */
3127                         goto out;
3128                 } else if (unlikely(err)) {  /* Do jump the err */
3129                         recv_bds += ring->pending_buf;
3130                         unused_count += ring->pending_buf;
3131                         ring->skb = NULL;
3132                         ring->pending_buf = 0;
3133                         continue;
3134                 }
3135
3136                 rx_fn(ring, skb);
3137                 recv_bds += ring->pending_buf;
3138                 unused_count += ring->pending_buf;
3139                 ring->skb = NULL;
3140                 ring->pending_buf = 0;
3141
3142                 recv_pkts++;
3143         }
3144
3145 out:
3146         /* Make all data has been write before submit */
3147         if (unused_count > 0)
3148                 hns3_nic_alloc_rx_buffers(ring, unused_count);
3149
3150         return recv_pkts;
3151 }
3152
3153 static bool hns3_get_new_flow_lvl(struct hns3_enet_ring_group *ring_group)
3154 {
3155 #define HNS3_RX_LOW_BYTE_RATE 10000
3156 #define HNS3_RX_MID_BYTE_RATE 20000
3157 #define HNS3_RX_ULTRA_PACKET_RATE 40
3158
3159         enum hns3_flow_level_range new_flow_level;
3160         struct hns3_enet_tqp_vector *tqp_vector;
3161         int packets_per_msecs, bytes_per_msecs;
3162         u32 time_passed_ms;
3163
3164         tqp_vector = ring_group->ring->tqp_vector;
3165         time_passed_ms =
3166                 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
3167         if (!time_passed_ms)
3168                 return false;
3169
3170         do_div(ring_group->total_packets, time_passed_ms);
3171         packets_per_msecs = ring_group->total_packets;
3172
3173         do_div(ring_group->total_bytes, time_passed_ms);
3174         bytes_per_msecs = ring_group->total_bytes;
3175
3176         new_flow_level = ring_group->coal.flow_level;
3177
3178         /* Simple throttlerate management
3179          * 0-10MB/s   lower     (50000 ints/s)
3180          * 10-20MB/s   middle    (20000 ints/s)
3181          * 20-1249MB/s high      (18000 ints/s)
3182          * > 40000pps  ultra     (8000 ints/s)
3183          */
3184         switch (new_flow_level) {
3185         case HNS3_FLOW_LOW:
3186                 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
3187                         new_flow_level = HNS3_FLOW_MID;
3188                 break;
3189         case HNS3_FLOW_MID:
3190                 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
3191                         new_flow_level = HNS3_FLOW_HIGH;
3192                 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
3193                         new_flow_level = HNS3_FLOW_LOW;
3194                 break;
3195         case HNS3_FLOW_HIGH:
3196         case HNS3_FLOW_ULTRA:
3197         default:
3198                 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
3199                         new_flow_level = HNS3_FLOW_MID;
3200                 break;
3201         }
3202
3203         if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
3204             &tqp_vector->rx_group == ring_group)
3205                 new_flow_level = HNS3_FLOW_ULTRA;
3206
3207         ring_group->total_bytes = 0;
3208         ring_group->total_packets = 0;
3209         ring_group->coal.flow_level = new_flow_level;
3210
3211         return true;
3212 }
3213
3214 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
3215 {
3216         struct hns3_enet_tqp_vector *tqp_vector;
3217         u16 new_int_gl;
3218
3219         if (!ring_group->ring)
3220                 return false;
3221
3222         tqp_vector = ring_group->ring->tqp_vector;
3223         if (!tqp_vector->last_jiffies)
3224                 return false;
3225
3226         if (ring_group->total_packets == 0) {
3227                 ring_group->coal.int_gl = HNS3_INT_GL_50K;
3228                 ring_group->coal.flow_level = HNS3_FLOW_LOW;
3229                 return true;
3230         }
3231
3232         if (!hns3_get_new_flow_lvl(ring_group))
3233                 return false;
3234
3235         new_int_gl = ring_group->coal.int_gl;
3236         switch (ring_group->coal.flow_level) {
3237         case HNS3_FLOW_LOW:
3238                 new_int_gl = HNS3_INT_GL_50K;
3239                 break;
3240         case HNS3_FLOW_MID:
3241                 new_int_gl = HNS3_INT_GL_20K;
3242                 break;
3243         case HNS3_FLOW_HIGH:
3244                 new_int_gl = HNS3_INT_GL_18K;
3245                 break;
3246         case HNS3_FLOW_ULTRA:
3247                 new_int_gl = HNS3_INT_GL_8K;
3248                 break;
3249         default:
3250                 break;
3251         }
3252
3253         if (new_int_gl != ring_group->coal.int_gl) {
3254                 ring_group->coal.int_gl = new_int_gl;
3255                 return true;
3256         }
3257         return false;
3258 }
3259
3260 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
3261 {
3262         struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
3263         struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
3264         bool rx_update, tx_update;
3265
3266         /* update param every 1000ms */
3267         if (time_before(jiffies,
3268                         tqp_vector->last_jiffies + msecs_to_jiffies(1000)))
3269                 return;
3270
3271         if (rx_group->coal.gl_adapt_enable) {
3272                 rx_update = hns3_get_new_int_gl(rx_group);
3273                 if (rx_update)
3274                         hns3_set_vector_coalesce_rx_gl(tqp_vector,
3275                                                        rx_group->coal.int_gl);
3276         }
3277
3278         if (tx_group->coal.gl_adapt_enable) {
3279                 tx_update = hns3_get_new_int_gl(tx_group);
3280                 if (tx_update)
3281                         hns3_set_vector_coalesce_tx_gl(tqp_vector,
3282                                                        tx_group->coal.int_gl);
3283         }
3284
3285         tqp_vector->last_jiffies = jiffies;
3286 }
3287
3288 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
3289 {
3290         struct hns3_nic_priv *priv = netdev_priv(napi->dev);
3291         struct hns3_enet_ring *ring;
3292         int rx_pkt_total = 0;
3293
3294         struct hns3_enet_tqp_vector *tqp_vector =
3295                 container_of(napi, struct hns3_enet_tqp_vector, napi);
3296         bool clean_complete = true;
3297         int rx_budget = budget;
3298
3299         if (unlikely(test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3300                 napi_complete(napi);
3301                 return 0;
3302         }
3303
3304         /* Since the actual Tx work is minimal, we can give the Tx a larger
3305          * budget and be more aggressive about cleaning up the Tx descriptors.
3306          */
3307         hns3_for_each_ring(ring, tqp_vector->tx_group)
3308                 hns3_clean_tx_ring(ring);
3309
3310         /* make sure rx ring budget not smaller than 1 */
3311         if (tqp_vector->num_tqps > 1)
3312                 rx_budget = max(budget / tqp_vector->num_tqps, 1);
3313
3314         hns3_for_each_ring(ring, tqp_vector->rx_group) {
3315                 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
3316                                                     hns3_rx_skb);
3317
3318                 if (rx_cleaned >= rx_budget)
3319                         clean_complete = false;
3320
3321                 rx_pkt_total += rx_cleaned;
3322         }
3323
3324         tqp_vector->rx_group.total_packets += rx_pkt_total;
3325
3326         if (!clean_complete)
3327                 return budget;
3328
3329         if (napi_complete(napi) &&
3330             likely(!test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3331                 hns3_update_new_int_gl(tqp_vector);
3332                 hns3_mask_vector_irq(tqp_vector, 1);
3333         }
3334
3335         return rx_pkt_total;
3336 }
3337
3338 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3339                                       struct hnae3_ring_chain_node *head)
3340 {
3341         struct pci_dev *pdev = tqp_vector->handle->pdev;
3342         struct hnae3_ring_chain_node *cur_chain = head;
3343         struct hnae3_ring_chain_node *chain;
3344         struct hns3_enet_ring *tx_ring;
3345         struct hns3_enet_ring *rx_ring;
3346
3347         tx_ring = tqp_vector->tx_group.ring;
3348         if (tx_ring) {
3349                 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
3350                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3351                               HNAE3_RING_TYPE_TX);
3352                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3353                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
3354
3355                 cur_chain->next = NULL;
3356
3357                 while (tx_ring->next) {
3358                         tx_ring = tx_ring->next;
3359
3360                         chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
3361                                              GFP_KERNEL);
3362                         if (!chain)
3363                                 goto err_free_chain;
3364
3365                         cur_chain->next = chain;
3366                         chain->tqp_index = tx_ring->tqp->tqp_index;
3367                         hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3368                                       HNAE3_RING_TYPE_TX);
3369                         hnae3_set_field(chain->int_gl_idx,
3370                                         HNAE3_RING_GL_IDX_M,
3371                                         HNAE3_RING_GL_IDX_S,
3372                                         HNAE3_RING_GL_TX);
3373
3374                         cur_chain = chain;
3375                 }
3376         }
3377
3378         rx_ring = tqp_vector->rx_group.ring;
3379         if (!tx_ring && rx_ring) {
3380                 cur_chain->next = NULL;
3381                 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
3382                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3383                               HNAE3_RING_TYPE_RX);
3384                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3385                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3386
3387                 rx_ring = rx_ring->next;
3388         }
3389
3390         while (rx_ring) {
3391                 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
3392                 if (!chain)
3393                         goto err_free_chain;
3394
3395                 cur_chain->next = chain;
3396                 chain->tqp_index = rx_ring->tqp->tqp_index;
3397                 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3398                               HNAE3_RING_TYPE_RX);
3399                 hnae3_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3400                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3401
3402                 cur_chain = chain;
3403
3404                 rx_ring = rx_ring->next;
3405         }
3406
3407         return 0;
3408
3409 err_free_chain:
3410         cur_chain = head->next;
3411         while (cur_chain) {
3412                 chain = cur_chain->next;
3413                 devm_kfree(&pdev->dev, cur_chain);
3414                 cur_chain = chain;
3415         }
3416         head->next = NULL;
3417
3418         return -ENOMEM;
3419 }
3420
3421 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3422                                         struct hnae3_ring_chain_node *head)
3423 {
3424         struct pci_dev *pdev = tqp_vector->handle->pdev;
3425         struct hnae3_ring_chain_node *chain_tmp, *chain;
3426
3427         chain = head->next;
3428
3429         while (chain) {
3430                 chain_tmp = chain->next;
3431                 devm_kfree(&pdev->dev, chain);
3432                 chain = chain_tmp;
3433         }
3434 }
3435
3436 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
3437                                    struct hns3_enet_ring *ring)
3438 {
3439         ring->next = group->ring;
3440         group->ring = ring;
3441
3442         group->count++;
3443 }
3444
3445 static void hns3_nic_set_cpumask(struct hns3_nic_priv *priv)
3446 {
3447         struct pci_dev *pdev = priv->ae_handle->pdev;
3448         struct hns3_enet_tqp_vector *tqp_vector;
3449         int num_vectors = priv->vector_num;
3450         int numa_node;
3451         int vector_i;
3452
3453         numa_node = dev_to_node(&pdev->dev);
3454
3455         for (vector_i = 0; vector_i < num_vectors; vector_i++) {
3456                 tqp_vector = &priv->tqp_vector[vector_i];
3457                 cpumask_set_cpu(cpumask_local_spread(vector_i, numa_node),
3458                                 &tqp_vector->affinity_mask);
3459         }
3460 }
3461
3462 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
3463 {
3464         struct hnae3_ring_chain_node vector_ring_chain;
3465         struct hnae3_handle *h = priv->ae_handle;
3466         struct hns3_enet_tqp_vector *tqp_vector;
3467         int ret = 0;
3468         int i;
3469
3470         hns3_nic_set_cpumask(priv);
3471
3472         for (i = 0; i < priv->vector_num; i++) {
3473                 tqp_vector = &priv->tqp_vector[i];
3474                 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
3475                 tqp_vector->num_tqps = 0;
3476         }
3477
3478         for (i = 0; i < h->kinfo.num_tqps; i++) {
3479                 u16 vector_i = i % priv->vector_num;
3480                 u16 tqp_num = h->kinfo.num_tqps;
3481
3482                 tqp_vector = &priv->tqp_vector[vector_i];
3483
3484                 hns3_add_ring_to_group(&tqp_vector->tx_group,
3485                                        &priv->ring[i]);
3486
3487                 hns3_add_ring_to_group(&tqp_vector->rx_group,
3488                                        &priv->ring[i + tqp_num]);
3489
3490                 priv->ring[i].tqp_vector = tqp_vector;
3491                 priv->ring[i + tqp_num].tqp_vector = tqp_vector;
3492                 tqp_vector->num_tqps++;
3493         }
3494
3495         for (i = 0; i < priv->vector_num; i++) {
3496                 tqp_vector = &priv->tqp_vector[i];
3497
3498                 tqp_vector->rx_group.total_bytes = 0;
3499                 tqp_vector->rx_group.total_packets = 0;
3500                 tqp_vector->tx_group.total_bytes = 0;
3501                 tqp_vector->tx_group.total_packets = 0;
3502                 tqp_vector->handle = h;
3503
3504                 ret = hns3_get_vector_ring_chain(tqp_vector,
3505                                                  &vector_ring_chain);
3506                 if (ret)
3507                         goto map_ring_fail;
3508
3509                 ret = h->ae_algo->ops->map_ring_to_vector(h,
3510                         tqp_vector->vector_irq, &vector_ring_chain);
3511
3512                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3513
3514                 if (ret)
3515                         goto map_ring_fail;
3516
3517                 netif_napi_add(priv->netdev, &tqp_vector->napi,
3518                                hns3_nic_common_poll, NAPI_POLL_WEIGHT);
3519         }
3520
3521         return 0;
3522
3523 map_ring_fail:
3524         while (i--)
3525                 netif_napi_del(&priv->tqp_vector[i].napi);
3526
3527         return ret;
3528 }
3529
3530 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
3531 {
3532 #define HNS3_VECTOR_PF_MAX_NUM          64
3533
3534         struct hnae3_handle *h = priv->ae_handle;
3535         struct hns3_enet_tqp_vector *tqp_vector;
3536         struct hnae3_vector_info *vector;
3537         struct pci_dev *pdev = h->pdev;
3538         u16 tqp_num = h->kinfo.num_tqps;
3539         u16 vector_num;
3540         int ret = 0;
3541         u16 i;
3542
3543         /* RSS size, cpu online and vector_num should be the same */
3544         /* Should consider 2p/4p later */
3545         vector_num = min_t(u16, num_online_cpus(), tqp_num);
3546         vector_num = min_t(u16, vector_num, HNS3_VECTOR_PF_MAX_NUM);
3547
3548         vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
3549                               GFP_KERNEL);
3550         if (!vector)
3551                 return -ENOMEM;
3552
3553         /* save the actual available vector number */
3554         vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
3555
3556         priv->vector_num = vector_num;
3557         priv->tqp_vector = (struct hns3_enet_tqp_vector *)
3558                 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
3559                              GFP_KERNEL);
3560         if (!priv->tqp_vector) {
3561                 ret = -ENOMEM;
3562                 goto out;
3563         }
3564
3565         for (i = 0; i < priv->vector_num; i++) {
3566                 tqp_vector = &priv->tqp_vector[i];
3567                 tqp_vector->idx = i;
3568                 tqp_vector->mask_addr = vector[i].io_addr;
3569                 tqp_vector->vector_irq = vector[i].vector;
3570                 hns3_vector_gl_rl_init(tqp_vector, priv);
3571         }
3572
3573 out:
3574         devm_kfree(&pdev->dev, vector);
3575         return ret;
3576 }
3577
3578 static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
3579 {
3580         group->ring = NULL;
3581         group->count = 0;
3582 }
3583
3584 static void hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
3585 {
3586         struct hnae3_ring_chain_node vector_ring_chain;
3587         struct hnae3_handle *h = priv->ae_handle;
3588         struct hns3_enet_tqp_vector *tqp_vector;
3589         int i;
3590
3591         for (i = 0; i < priv->vector_num; i++) {
3592                 tqp_vector = &priv->tqp_vector[i];
3593
3594                 if (!tqp_vector->rx_group.ring && !tqp_vector->tx_group.ring)
3595                         continue;
3596
3597                 hns3_get_vector_ring_chain(tqp_vector, &vector_ring_chain);
3598
3599                 h->ae_algo->ops->unmap_ring_from_vector(h,
3600                         tqp_vector->vector_irq, &vector_ring_chain);
3601
3602                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3603
3604                 if (tqp_vector->irq_init_flag == HNS3_VECTOR_INITED) {
3605                         irq_set_affinity_hint(tqp_vector->vector_irq, NULL);
3606                         free_irq(tqp_vector->vector_irq, tqp_vector);
3607                         tqp_vector->irq_init_flag = HNS3_VECTOR_NOT_INITED;
3608                 }
3609
3610                 hns3_clear_ring_group(&tqp_vector->rx_group);
3611                 hns3_clear_ring_group(&tqp_vector->tx_group);
3612                 netif_napi_del(&priv->tqp_vector[i].napi);
3613         }
3614 }
3615
3616 static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
3617 {
3618         struct hnae3_handle *h = priv->ae_handle;
3619         struct pci_dev *pdev = h->pdev;
3620         int i, ret;
3621
3622         for (i = 0; i < priv->vector_num; i++) {
3623                 struct hns3_enet_tqp_vector *tqp_vector;
3624
3625                 tqp_vector = &priv->tqp_vector[i];
3626                 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
3627                 if (ret)
3628                         return ret;
3629         }
3630
3631         devm_kfree(&pdev->dev, priv->tqp_vector);
3632         return 0;
3633 }
3634
3635 static void hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
3636                               unsigned int ring_type)
3637 {
3638         int queue_num = priv->ae_handle->kinfo.num_tqps;
3639         struct hns3_enet_ring *ring;
3640         int desc_num;
3641
3642         if (ring_type == HNAE3_RING_TYPE_TX) {
3643                 ring = &priv->ring[q->tqp_index];
3644                 desc_num = priv->ae_handle->kinfo.num_tx_desc;
3645                 ring->queue_index = q->tqp_index;
3646                 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
3647         } else {
3648                 ring = &priv->ring[q->tqp_index + queue_num];
3649                 desc_num = priv->ae_handle->kinfo.num_rx_desc;
3650                 ring->queue_index = q->tqp_index;
3651                 ring->io_base = q->io_base;
3652         }
3653
3654         hnae3_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
3655
3656         ring->tqp = q;
3657         ring->desc = NULL;
3658         ring->desc_cb = NULL;
3659         ring->dev = priv->dev;
3660         ring->desc_dma_addr = 0;
3661         ring->buf_size = q->buf_size;
3662         ring->desc_num = desc_num;
3663         ring->next_to_use = 0;
3664         ring->next_to_clean = 0;
3665 }
3666
3667 static void hns3_queue_to_ring(struct hnae3_queue *tqp,
3668                                struct hns3_nic_priv *priv)
3669 {
3670         hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
3671         hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
3672 }
3673
3674 static int hns3_get_ring_config(struct hns3_nic_priv *priv)
3675 {
3676         struct hnae3_handle *h = priv->ae_handle;
3677         struct pci_dev *pdev = h->pdev;
3678         int i;
3679
3680         priv->ring = devm_kzalloc(&pdev->dev,
3681                                   array3_size(h->kinfo.num_tqps,
3682                                               sizeof(*priv->ring), 2),
3683                                   GFP_KERNEL);
3684         if (!priv->ring)
3685                 return -ENOMEM;
3686
3687         for (i = 0; i < h->kinfo.num_tqps; i++)
3688                 hns3_queue_to_ring(h->kinfo.tqp[i], priv);
3689
3690         return 0;
3691 }
3692
3693 static void hns3_put_ring_config(struct hns3_nic_priv *priv)
3694 {
3695         if (!priv->ring)
3696                 return;
3697
3698         devm_kfree(priv->dev, priv->ring);
3699         priv->ring = NULL;
3700 }
3701
3702 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
3703 {
3704         int ret;
3705
3706         if (ring->desc_num <= 0 || ring->buf_size <= 0)
3707                 return -EINVAL;
3708
3709         ring->desc_cb = devm_kcalloc(ring_to_dev(ring), ring->desc_num,
3710                                      sizeof(ring->desc_cb[0]), GFP_KERNEL);
3711         if (!ring->desc_cb) {
3712                 ret = -ENOMEM;
3713                 goto out;
3714         }
3715
3716         ret = hns3_alloc_desc(ring);
3717         if (ret)
3718                 goto out_with_desc_cb;
3719
3720         if (!HNAE3_IS_TX_RING(ring)) {
3721                 ret = hns3_alloc_ring_buffers(ring);
3722                 if (ret)
3723                         goto out_with_desc;
3724         }
3725
3726         return 0;
3727
3728 out_with_desc:
3729         hns3_free_desc(ring);
3730 out_with_desc_cb:
3731         devm_kfree(ring_to_dev(ring), ring->desc_cb);
3732         ring->desc_cb = NULL;
3733 out:
3734         return ret;
3735 }
3736
3737 void hns3_fini_ring(struct hns3_enet_ring *ring)
3738 {
3739         hns3_free_desc(ring);
3740         devm_kfree(ring_to_dev(ring), ring->desc_cb);
3741         ring->desc_cb = NULL;
3742         ring->next_to_clean = 0;
3743         ring->next_to_use = 0;
3744         ring->pending_buf = 0;
3745         if (ring->skb) {
3746                 dev_kfree_skb_any(ring->skb);
3747                 ring->skb = NULL;
3748         }
3749 }
3750
3751 static int hns3_buf_size2type(u32 buf_size)
3752 {
3753         int bd_size_type;
3754
3755         switch (buf_size) {
3756         case 512:
3757                 bd_size_type = HNS3_BD_SIZE_512_TYPE;
3758                 break;
3759         case 1024:
3760                 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
3761                 break;
3762         case 2048:
3763                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3764                 break;
3765         case 4096:
3766                 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
3767                 break;
3768         default:
3769                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3770         }
3771
3772         return bd_size_type;
3773 }
3774
3775 static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
3776 {
3777         dma_addr_t dma = ring->desc_dma_addr;
3778         struct hnae3_queue *q = ring->tqp;
3779
3780         if (!HNAE3_IS_TX_RING(ring)) {
3781                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG, (u32)dma);
3782                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
3783                                (u32)((dma >> 31) >> 1));
3784
3785                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
3786                                hns3_buf_size2type(ring->buf_size));
3787                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
3788                                ring->desc_num / 8 - 1);
3789
3790         } else {
3791                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
3792                                (u32)dma);
3793                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
3794                                (u32)((dma >> 31) >> 1));
3795
3796                 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3797                                ring->desc_num / 8 - 1);
3798         }
3799 }
3800
3801 static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
3802 {
3803         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3804         int i;
3805
3806         for (i = 0; i < HNAE3_MAX_TC; i++) {
3807                 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3808                 int j;
3809
3810                 if (!tc_info->enable)
3811                         continue;
3812
3813                 for (j = 0; j < tc_info->tqp_count; j++) {
3814                         struct hnae3_queue *q;
3815
3816                         q = priv->ring[tc_info->tqp_offset + j].tqp;
3817                         hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
3818                                        tc_info->tc);
3819                 }
3820         }
3821 }
3822
3823 int hns3_init_all_ring(struct hns3_nic_priv *priv)
3824 {
3825         struct hnae3_handle *h = priv->ae_handle;
3826         int ring_num = h->kinfo.num_tqps * 2;
3827         int i, j;
3828         int ret;
3829
3830         for (i = 0; i < ring_num; i++) {
3831                 ret = hns3_alloc_ring_memory(&priv->ring[i]);
3832                 if (ret) {
3833                         dev_err(priv->dev,
3834                                 "Alloc ring memory fail! ret=%d\n", ret);
3835                         goto out_when_alloc_ring_memory;
3836                 }
3837
3838                 u64_stats_init(&priv->ring[i].syncp);
3839         }
3840
3841         return 0;
3842
3843 out_when_alloc_ring_memory:
3844         for (j = i - 1; j >= 0; j--)
3845                 hns3_fini_ring(&priv->ring[j]);
3846
3847         return -ENOMEM;
3848 }
3849
3850 int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
3851 {
3852         struct hnae3_handle *h = priv->ae_handle;
3853         int i;
3854
3855         for (i = 0; i < h->kinfo.num_tqps; i++) {
3856                 hns3_fini_ring(&priv->ring[i]);
3857                 hns3_fini_ring(&priv->ring[i + h->kinfo.num_tqps]);
3858         }
3859         return 0;
3860 }
3861
3862 /* Set mac addr if it is configured. or leave it to the AE driver */
3863 static int hns3_init_mac_addr(struct net_device *netdev)
3864 {
3865         struct hns3_nic_priv *priv = netdev_priv(netdev);
3866         struct hnae3_handle *h = priv->ae_handle;
3867         u8 mac_addr_temp[ETH_ALEN];
3868         int ret = 0;
3869
3870         if (h->ae_algo->ops->get_mac_addr)
3871                 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3872
3873         /* Check if the MAC address is valid, if not get a random one */
3874         if (!is_valid_ether_addr(mac_addr_temp)) {
3875                 eth_hw_addr_random(netdev);
3876                 dev_warn(priv->dev, "using random MAC address %pM\n",
3877                          netdev->dev_addr);
3878         } else {
3879                 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3880                 ether_addr_copy(netdev->perm_addr, mac_addr_temp);
3881         }
3882
3883         if (h->ae_algo->ops->set_mac_addr)
3884                 ret = h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
3885
3886         return ret;
3887 }
3888
3889 static int hns3_init_phy(struct net_device *netdev)
3890 {
3891         struct hnae3_handle *h = hns3_get_handle(netdev);
3892         int ret = 0;
3893
3894         if (h->ae_algo->ops->mac_connect_phy)
3895                 ret = h->ae_algo->ops->mac_connect_phy(h);
3896
3897         return ret;
3898 }
3899
3900 static void hns3_uninit_phy(struct net_device *netdev)
3901 {
3902         struct hnae3_handle *h = hns3_get_handle(netdev);
3903
3904         if (h->ae_algo->ops->mac_disconnect_phy)
3905                 h->ae_algo->ops->mac_disconnect_phy(h);
3906 }
3907
3908 static int hns3_restore_fd_rules(struct net_device *netdev)
3909 {
3910         struct hnae3_handle *h = hns3_get_handle(netdev);
3911         int ret = 0;
3912
3913         if (h->ae_algo->ops->restore_fd_rules)
3914                 ret = h->ae_algo->ops->restore_fd_rules(h);
3915
3916         return ret;
3917 }
3918
3919 static void hns3_del_all_fd_rules(struct net_device *netdev, bool clear_list)
3920 {
3921         struct hnae3_handle *h = hns3_get_handle(netdev);
3922
3923         if (h->ae_algo->ops->del_all_fd_entries)
3924                 h->ae_algo->ops->del_all_fd_entries(h, clear_list);
3925 }
3926
3927 static int hns3_client_start(struct hnae3_handle *handle)
3928 {
3929         if (!handle->ae_algo->ops->client_start)
3930                 return 0;
3931
3932         return handle->ae_algo->ops->client_start(handle);
3933 }
3934
3935 static void hns3_client_stop(struct hnae3_handle *handle)
3936 {
3937         if (!handle->ae_algo->ops->client_stop)
3938                 return;
3939
3940         handle->ae_algo->ops->client_stop(handle);
3941 }
3942
3943 static void hns3_info_show(struct hns3_nic_priv *priv)
3944 {
3945         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3946
3947         dev_info(priv->dev, "MAC address: %pM\n", priv->netdev->dev_addr);
3948         dev_info(priv->dev, "Task queue pairs numbers: %d\n", kinfo->num_tqps);
3949         dev_info(priv->dev, "RSS size: %d\n", kinfo->rss_size);
3950         dev_info(priv->dev, "Allocated RSS size: %d\n", kinfo->req_rss_size);
3951         dev_info(priv->dev, "RX buffer length: %d\n", kinfo->rx_buf_len);
3952         dev_info(priv->dev, "Desc num per TX queue: %d\n", kinfo->num_tx_desc);
3953         dev_info(priv->dev, "Desc num per RX queue: %d\n", kinfo->num_rx_desc);
3954         dev_info(priv->dev, "Total number of enabled TCs: %d\n", kinfo->num_tc);
3955         dev_info(priv->dev, "Max mtu size: %d\n", priv->netdev->max_mtu);
3956 }
3957
3958 static int hns3_client_init(struct hnae3_handle *handle)
3959 {
3960         struct pci_dev *pdev = handle->pdev;
3961         u16 alloc_tqps, max_rss_size;
3962         struct hns3_nic_priv *priv;
3963         struct net_device *netdev;
3964         int ret;
3965
3966         handle->ae_algo->ops->get_tqps_and_rss_info(handle, &alloc_tqps,
3967                                                     &max_rss_size);
3968         netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);
3969         if (!netdev)
3970                 return -ENOMEM;
3971
3972         priv = netdev_priv(netdev);
3973         priv->dev = &pdev->dev;
3974         priv->netdev = netdev;
3975         priv->ae_handle = handle;
3976         priv->tx_timeout_count = 0;
3977         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
3978
3979         handle->msg_enable = netif_msg_init(debug, DEFAULT_MSG_LEVEL);
3980
3981         handle->kinfo.netdev = netdev;
3982         handle->priv = (void *)priv;
3983
3984         hns3_init_mac_addr(netdev);
3985
3986         hns3_set_default_feature(netdev);
3987
3988         netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3989         netdev->priv_flags |= IFF_UNICAST_FLT;
3990         netdev->netdev_ops = &hns3_nic_netdev_ops;
3991         SET_NETDEV_DEV(netdev, &pdev->dev);
3992         hns3_ethtool_set_ops(netdev);
3993
3994         /* Carrier off reporting is important to ethtool even BEFORE open */
3995         netif_carrier_off(netdev);
3996
3997         ret = hns3_get_ring_config(priv);
3998         if (ret) {
3999                 ret = -ENOMEM;
4000                 goto out_get_ring_cfg;
4001         }
4002
4003         ret = hns3_nic_alloc_vector_data(priv);
4004         if (ret) {
4005                 ret = -ENOMEM;
4006                 goto out_alloc_vector_data;
4007         }
4008
4009         ret = hns3_nic_init_vector_data(priv);
4010         if (ret) {
4011                 ret = -ENOMEM;
4012                 goto out_init_vector_data;
4013         }
4014
4015         ret = hns3_init_all_ring(priv);
4016         if (ret) {
4017                 ret = -ENOMEM;
4018                 goto out_init_ring;
4019         }
4020
4021         ret = hns3_init_phy(netdev);
4022         if (ret)
4023                 goto out_init_phy;
4024
4025         ret = register_netdev(netdev);
4026         if (ret) {
4027                 dev_err(priv->dev, "probe register netdev fail!\n");
4028                 goto out_reg_netdev_fail;
4029         }
4030
4031         ret = hns3_client_start(handle);
4032         if (ret) {
4033                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4034                 goto out_client_start;
4035         }
4036
4037         hns3_dcbnl_setup(handle);
4038
4039         hns3_dbg_init(handle);
4040
4041         /* MTU range: (ETH_MIN_MTU(kernel default) - 9702) */
4042         netdev->max_mtu = HNS3_MAX_MTU;
4043
4044         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4045
4046         if (netif_msg_drv(handle))
4047                 hns3_info_show(priv);
4048
4049         return ret;
4050
4051 out_client_start:
4052         unregister_netdev(netdev);
4053 out_reg_netdev_fail:
4054         hns3_uninit_phy(netdev);
4055 out_init_phy:
4056         hns3_uninit_all_ring(priv);
4057 out_init_ring:
4058         hns3_nic_uninit_vector_data(priv);
4059 out_init_vector_data:
4060         hns3_nic_dealloc_vector_data(priv);
4061 out_alloc_vector_data:
4062         priv->ring = NULL;
4063 out_get_ring_cfg:
4064         priv->ae_handle = NULL;
4065         free_netdev(netdev);
4066         return ret;
4067 }
4068
4069 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
4070 {
4071         struct net_device *netdev = handle->kinfo.netdev;
4072         struct hns3_nic_priv *priv = netdev_priv(netdev);
4073         int ret;
4074
4075         hns3_remove_hw_addr(netdev);
4076
4077         if (netdev->reg_state != NETREG_UNINITIALIZED)
4078                 unregister_netdev(netdev);
4079
4080         hns3_client_stop(handle);
4081
4082         hns3_uninit_phy(netdev);
4083
4084         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4085                 netdev_warn(netdev, "already uninitialized\n");
4086                 goto out_netdev_free;
4087         }
4088
4089         hns3_del_all_fd_rules(netdev, true);
4090
4091         hns3_clear_all_ring(handle, true);
4092
4093         hns3_nic_uninit_vector_data(priv);
4094
4095         ret = hns3_nic_dealloc_vector_data(priv);
4096         if (ret)
4097                 netdev_err(netdev, "dealloc vector error\n");
4098
4099         ret = hns3_uninit_all_ring(priv);
4100         if (ret)
4101                 netdev_err(netdev, "uninit ring error\n");
4102
4103         hns3_put_ring_config(priv);
4104
4105         hns3_dbg_uninit(handle);
4106
4107 out_netdev_free:
4108         free_netdev(netdev);
4109 }
4110
4111 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
4112 {
4113         struct net_device *netdev = handle->kinfo.netdev;
4114
4115         if (!netdev)
4116                 return;
4117
4118         if (linkup) {
4119                 netif_carrier_on(netdev);
4120                 netif_tx_wake_all_queues(netdev);
4121                 if (netif_msg_link(handle))
4122                         netdev_info(netdev, "link up\n");
4123         } else {
4124                 netif_carrier_off(netdev);
4125                 netif_tx_stop_all_queues(netdev);
4126                 if (netif_msg_link(handle))
4127                         netdev_info(netdev, "link down\n");
4128         }
4129 }
4130
4131 static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
4132 {
4133         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4134         struct net_device *ndev = kinfo->netdev;
4135
4136         if (tc > HNAE3_MAX_TC)
4137                 return -EINVAL;
4138
4139         if (!ndev)
4140                 return -ENODEV;
4141
4142         return hns3_nic_set_real_num_queue(ndev);
4143 }
4144
4145 static int hns3_recover_hw_addr(struct net_device *ndev)
4146 {
4147         struct netdev_hw_addr_list *list;
4148         struct netdev_hw_addr *ha, *tmp;
4149         int ret = 0;
4150
4151         netif_addr_lock_bh(ndev);
4152         /* go through and sync uc_addr entries to the device */
4153         list = &ndev->uc;
4154         list_for_each_entry_safe(ha, tmp, &list->list, list) {
4155                 ret = hns3_nic_uc_sync(ndev, ha->addr);
4156                 if (ret)
4157                         goto out;
4158         }
4159
4160         /* go through and sync mc_addr entries to the device */
4161         list = &ndev->mc;
4162         list_for_each_entry_safe(ha, tmp, &list->list, list) {
4163                 ret = hns3_nic_mc_sync(ndev, ha->addr);
4164                 if (ret)
4165                         goto out;
4166         }
4167
4168 out:
4169         netif_addr_unlock_bh(ndev);
4170         return ret;
4171 }
4172
4173 static void hns3_remove_hw_addr(struct net_device *netdev)
4174 {
4175         struct netdev_hw_addr_list *list;
4176         struct netdev_hw_addr *ha, *tmp;
4177
4178         hns3_nic_uc_unsync(netdev, netdev->dev_addr);
4179
4180         netif_addr_lock_bh(netdev);
4181         /* go through and unsync uc_addr entries to the device */
4182         list = &netdev->uc;
4183         list_for_each_entry_safe(ha, tmp, &list->list, list)
4184                 hns3_nic_uc_unsync(netdev, ha->addr);
4185
4186         /* go through and unsync mc_addr entries to the device */
4187         list = &netdev->mc;
4188         list_for_each_entry_safe(ha, tmp, &list->list, list)
4189                 if (ha->refcount > 1)
4190                         hns3_nic_mc_unsync(netdev, ha->addr);
4191
4192         netif_addr_unlock_bh(netdev);
4193 }
4194
4195 static void hns3_clear_tx_ring(struct hns3_enet_ring *ring)
4196 {
4197         while (ring->next_to_clean != ring->next_to_use) {
4198                 ring->desc[ring->next_to_clean].tx.bdtp_fe_sc_vld_ra_ri = 0;
4199                 hns3_free_buffer_detach(ring, ring->next_to_clean);
4200                 ring_ptr_move_fw(ring, next_to_clean);
4201         }
4202 }
4203
4204 static int hns3_clear_rx_ring(struct hns3_enet_ring *ring)
4205 {
4206         struct hns3_desc_cb res_cbs;
4207         int ret;
4208
4209         while (ring->next_to_use != ring->next_to_clean) {
4210                 /* When a buffer is not reused, it's memory has been
4211                  * freed in hns3_handle_rx_bd or will be freed by
4212                  * stack, so we need to replace the buffer here.
4213                  */
4214                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4215                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
4216                         if (ret) {
4217                                 u64_stats_update_begin(&ring->syncp);
4218                                 ring->stats.sw_err_cnt++;
4219                                 u64_stats_update_end(&ring->syncp);
4220                                 /* if alloc new buffer fail, exit directly
4221                                  * and reclear in up flow.
4222                                  */
4223                                 netdev_warn(ring->tqp->handle->kinfo.netdev,
4224                                             "reserve buffer map failed, ret = %d\n",
4225                                             ret);
4226                                 return ret;
4227                         }
4228                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
4229                 }
4230                 ring_ptr_move_fw(ring, next_to_use);
4231         }
4232
4233         /* Free the pending skb in rx ring */
4234         if (ring->skb) {
4235                 dev_kfree_skb_any(ring->skb);
4236                 ring->skb = NULL;
4237                 ring->pending_buf = 0;
4238         }
4239
4240         return 0;
4241 }
4242
4243 static void hns3_force_clear_rx_ring(struct hns3_enet_ring *ring)
4244 {
4245         while (ring->next_to_use != ring->next_to_clean) {
4246                 /* When a buffer is not reused, it's memory has been
4247                  * freed in hns3_handle_rx_bd or will be freed by
4248                  * stack, so only need to unmap the buffer here.
4249                  */
4250                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4251                         hns3_unmap_buffer(ring,
4252                                           &ring->desc_cb[ring->next_to_use]);
4253                         ring->desc_cb[ring->next_to_use].dma = 0;
4254                 }
4255
4256                 ring_ptr_move_fw(ring, next_to_use);
4257         }
4258 }
4259
4260 static void hns3_clear_all_ring(struct hnae3_handle *h, bool force)
4261 {
4262         struct net_device *ndev = h->kinfo.netdev;
4263         struct hns3_nic_priv *priv = netdev_priv(ndev);
4264         u32 i;
4265
4266         for (i = 0; i < h->kinfo.num_tqps; i++) {
4267                 struct hns3_enet_ring *ring;
4268
4269                 ring = &priv->ring[i];
4270                 hns3_clear_tx_ring(ring);
4271
4272                 ring = &priv->ring[i + h->kinfo.num_tqps];
4273                 /* Continue to clear other rings even if clearing some
4274                  * rings failed.
4275                  */
4276                 if (force)
4277                         hns3_force_clear_rx_ring(ring);
4278                 else
4279                         hns3_clear_rx_ring(ring);
4280         }
4281 }
4282
4283 int hns3_nic_reset_all_ring(struct hnae3_handle *h)
4284 {
4285         struct net_device *ndev = h->kinfo.netdev;
4286         struct hns3_nic_priv *priv = netdev_priv(ndev);
4287         struct hns3_enet_ring *rx_ring;
4288         int i, j;
4289         int ret;
4290
4291         for (i = 0; i < h->kinfo.num_tqps; i++) {
4292                 ret = h->ae_algo->ops->reset_queue(h, i);
4293                 if (ret)
4294                         return ret;
4295
4296                 hns3_init_ring_hw(&priv->ring[i]);
4297
4298                 /* We need to clear tx ring here because self test will
4299                  * use the ring and will not run down before up
4300                  */
4301                 hns3_clear_tx_ring(&priv->ring[i]);
4302                 priv->ring[i].next_to_clean = 0;
4303                 priv->ring[i].next_to_use = 0;
4304
4305                 rx_ring = &priv->ring[i + h->kinfo.num_tqps];
4306                 hns3_init_ring_hw(rx_ring);
4307                 ret = hns3_clear_rx_ring(rx_ring);
4308                 if (ret)
4309                         return ret;
4310
4311                 /* We can not know the hardware head and tail when this
4312                  * function is called in reset flow, so we reuse all desc.
4313                  */
4314                 for (j = 0; j < rx_ring->desc_num; j++)
4315                         hns3_reuse_buffer(rx_ring, j);
4316
4317                 rx_ring->next_to_clean = 0;
4318                 rx_ring->next_to_use = 0;
4319         }
4320
4321         hns3_init_tx_ring_tc(priv);
4322
4323         return 0;
4324 }
4325
4326 static void hns3_store_coal(struct hns3_nic_priv *priv)
4327 {
4328         /* ethtool only support setting and querying one coal
4329          * configuration for now, so save the vector 0' coal
4330          * configuration here in order to restore it.
4331          */
4332         memcpy(&priv->tx_coal, &priv->tqp_vector[0].tx_group.coal,
4333                sizeof(struct hns3_enet_coalesce));
4334         memcpy(&priv->rx_coal, &priv->tqp_vector[0].rx_group.coal,
4335                sizeof(struct hns3_enet_coalesce));
4336 }
4337
4338 static void hns3_restore_coal(struct hns3_nic_priv *priv)
4339 {
4340         u16 vector_num = priv->vector_num;
4341         int i;
4342
4343         for (i = 0; i < vector_num; i++) {
4344                 memcpy(&priv->tqp_vector[i].tx_group.coal, &priv->tx_coal,
4345                        sizeof(struct hns3_enet_coalesce));
4346                 memcpy(&priv->tqp_vector[i].rx_group.coal, &priv->rx_coal,
4347                        sizeof(struct hns3_enet_coalesce));
4348         }
4349 }
4350
4351 static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
4352 {
4353         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
4354         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4355         struct net_device *ndev = kinfo->netdev;
4356         struct hns3_nic_priv *priv = netdev_priv(ndev);
4357
4358         if (test_and_set_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
4359                 return 0;
4360
4361         /* it is cumbersome for hardware to pick-and-choose entries for deletion
4362          * from table space. Hence, for function reset software intervention is
4363          * required to delete the entries
4364          */
4365         if (hns3_dev_ongoing_func_reset(ae_dev)) {
4366                 hns3_remove_hw_addr(ndev);
4367                 hns3_del_all_fd_rules(ndev, false);
4368         }
4369
4370         if (!netif_running(ndev))
4371                 return 0;
4372
4373         return hns3_nic_net_stop(ndev);
4374 }
4375
4376 static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
4377 {
4378         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4379         struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
4380         int ret = 0;
4381
4382         clear_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4383
4384         if (netif_running(kinfo->netdev)) {
4385                 ret = hns3_nic_net_open(kinfo->netdev);
4386                 if (ret) {
4387                         set_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4388                         netdev_err(kinfo->netdev,
4389                                    "net up fail, ret=%d!\n", ret);
4390                         return ret;
4391                 }
4392         }
4393
4394         return ret;
4395 }
4396
4397 static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
4398 {
4399         struct net_device *netdev = handle->kinfo.netdev;
4400         struct hns3_nic_priv *priv = netdev_priv(netdev);
4401         int ret;
4402
4403         /* Carrier off reporting is important to ethtool even BEFORE open */
4404         netif_carrier_off(netdev);
4405
4406         ret = hns3_get_ring_config(priv);
4407         if (ret)
4408                 return ret;
4409
4410         ret = hns3_nic_alloc_vector_data(priv);
4411         if (ret)
4412                 goto err_put_ring;
4413
4414         hns3_restore_coal(priv);
4415
4416         ret = hns3_nic_init_vector_data(priv);
4417         if (ret)
4418                 goto err_dealloc_vector;
4419
4420         ret = hns3_init_all_ring(priv);
4421         if (ret)
4422                 goto err_uninit_vector;
4423
4424         ret = hns3_client_start(handle);
4425         if (ret) {
4426                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4427                 goto err_uninit_ring;
4428         }
4429
4430         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4431
4432         return ret;
4433
4434 err_uninit_ring:
4435         hns3_uninit_all_ring(priv);
4436 err_uninit_vector:
4437         hns3_nic_uninit_vector_data(priv);
4438 err_dealloc_vector:
4439         hns3_nic_dealloc_vector_data(priv);
4440 err_put_ring:
4441         hns3_put_ring_config(priv);
4442
4443         return ret;
4444 }
4445
4446 static int hns3_reset_notify_restore_enet(struct hnae3_handle *handle)
4447 {
4448         struct net_device *netdev = handle->kinfo.netdev;
4449         bool vlan_filter_enable;
4450         int ret;
4451
4452         ret = hns3_init_mac_addr(netdev);
4453         if (ret)
4454                 return ret;
4455
4456         ret = hns3_recover_hw_addr(netdev);
4457         if (ret)
4458                 return ret;
4459
4460         ret = hns3_update_promisc_mode(netdev, handle->netdev_flags);
4461         if (ret)
4462                 return ret;
4463
4464         vlan_filter_enable = netdev->flags & IFF_PROMISC ? false : true;
4465         hns3_enable_vlan_filter(netdev, vlan_filter_enable);
4466
4467         if (handle->ae_algo->ops->restore_vlan_table)
4468                 handle->ae_algo->ops->restore_vlan_table(handle);
4469
4470         return hns3_restore_fd_rules(netdev);
4471 }
4472
4473 static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
4474 {
4475         struct net_device *netdev = handle->kinfo.netdev;
4476         struct hns3_nic_priv *priv = netdev_priv(netdev);
4477         int ret;
4478
4479         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4480                 netdev_warn(netdev, "already uninitialized\n");
4481                 return 0;
4482         }
4483
4484         hns3_clear_all_ring(handle, true);
4485         hns3_reset_tx_queue(priv->ae_handle);
4486
4487         hns3_nic_uninit_vector_data(priv);
4488
4489         hns3_store_coal(priv);
4490
4491         ret = hns3_nic_dealloc_vector_data(priv);
4492         if (ret)
4493                 netdev_err(netdev, "dealloc vector error\n");
4494
4495         ret = hns3_uninit_all_ring(priv);
4496         if (ret)
4497                 netdev_err(netdev, "uninit ring error\n");
4498
4499         hns3_put_ring_config(priv);
4500
4501         return ret;
4502 }
4503
4504 static int hns3_reset_notify(struct hnae3_handle *handle,
4505                              enum hnae3_reset_notify_type type)
4506 {
4507         int ret = 0;
4508
4509         switch (type) {
4510         case HNAE3_UP_CLIENT:
4511                 ret = hns3_reset_notify_up_enet(handle);
4512                 break;
4513         case HNAE3_DOWN_CLIENT:
4514                 ret = hns3_reset_notify_down_enet(handle);
4515                 break;
4516         case HNAE3_INIT_CLIENT:
4517                 ret = hns3_reset_notify_init_enet(handle);
4518                 break;
4519         case HNAE3_UNINIT_CLIENT:
4520                 ret = hns3_reset_notify_uninit_enet(handle);
4521                 break;
4522         case HNAE3_RESTORE_CLIENT:
4523                 ret = hns3_reset_notify_restore_enet(handle);
4524                 break;
4525         default:
4526                 break;
4527         }
4528
4529         return ret;
4530 }
4531
4532 static int hns3_change_channels(struct hnae3_handle *handle, u32 new_tqp_num,
4533                                 bool rxfh_configured)
4534 {
4535         int ret;
4536
4537         ret = handle->ae_algo->ops->set_channels(handle, new_tqp_num,
4538                                                  rxfh_configured);
4539         if (ret) {
4540                 dev_err(&handle->pdev->dev,
4541                         "Change tqp num(%u) fail.\n", new_tqp_num);
4542                 return ret;
4543         }
4544
4545         ret = hns3_reset_notify(handle, HNAE3_INIT_CLIENT);
4546         if (ret)
4547                 return ret;
4548
4549         ret =  hns3_reset_notify(handle, HNAE3_UP_CLIENT);
4550         if (ret)
4551                 hns3_reset_notify(handle, HNAE3_UNINIT_CLIENT);
4552
4553         return ret;
4554 }
4555
4556 int hns3_set_channels(struct net_device *netdev,
4557                       struct ethtool_channels *ch)
4558 {
4559         struct hnae3_handle *h = hns3_get_handle(netdev);
4560         struct hnae3_knic_private_info *kinfo = &h->kinfo;
4561         bool rxfh_configured = netif_is_rxfh_configured(netdev);
4562         u32 new_tqp_num = ch->combined_count;
4563         u16 org_tqp_num;
4564         int ret;
4565
4566         if (hns3_nic_resetting(netdev))
4567                 return -EBUSY;
4568
4569         if (ch->rx_count || ch->tx_count)
4570                 return -EINVAL;
4571
4572         if (new_tqp_num > hns3_get_max_available_channels(h) ||
4573             new_tqp_num < 1) {
4574                 dev_err(&netdev->dev,
4575                         "Change tqps fail, the tqp range is from 1 to %d",
4576                         hns3_get_max_available_channels(h));
4577                 return -EINVAL;
4578         }
4579
4580         if (kinfo->rss_size == new_tqp_num)
4581                 return 0;
4582
4583         netif_dbg(h, drv, netdev,
4584                   "set channels: tqp_num=%u, rxfh=%d\n",
4585                   new_tqp_num, rxfh_configured);
4586
4587         ret = hns3_reset_notify(h, HNAE3_DOWN_CLIENT);
4588         if (ret)
4589                 return ret;
4590
4591         ret = hns3_reset_notify(h, HNAE3_UNINIT_CLIENT);
4592         if (ret)
4593                 return ret;
4594
4595         org_tqp_num = h->kinfo.num_tqps;
4596         ret = hns3_change_channels(h, new_tqp_num, rxfh_configured);
4597         if (ret) {
4598                 int ret1;
4599
4600                 netdev_warn(netdev,
4601                             "Change channels fail, revert to old value\n");
4602                 ret1 = hns3_change_channels(h, org_tqp_num, rxfh_configured);
4603                 if (ret1) {
4604                         netdev_err(netdev,
4605                                    "revert to old channel fail\n");
4606                         return ret1;
4607                 }
4608
4609                 return ret;
4610         }
4611
4612         return 0;
4613 }
4614
4615 static const struct hns3_hw_error_info hns3_hw_err[] = {
4616         { .type = HNAE3_PPU_POISON_ERROR,
4617           .msg = "PPU poison" },
4618         { .type = HNAE3_CMDQ_ECC_ERROR,
4619           .msg = "IMP CMDQ error" },
4620         { .type = HNAE3_IMP_RD_POISON_ERROR,
4621           .msg = "IMP RD poison" },
4622 };
4623
4624 static void hns3_process_hw_error(struct hnae3_handle *handle,
4625                                   enum hnae3_hw_error_type type)
4626 {
4627         int i;
4628
4629         for (i = 0; i < ARRAY_SIZE(hns3_hw_err); i++) {
4630                 if (hns3_hw_err[i].type == type) {
4631                         dev_err(&handle->pdev->dev, "Detected %s!\n",
4632                                 hns3_hw_err[i].msg);
4633                         break;
4634                 }
4635         }
4636 }
4637
4638 static const struct hnae3_client_ops client_ops = {
4639         .init_instance = hns3_client_init,
4640         .uninit_instance = hns3_client_uninit,
4641         .link_status_change = hns3_link_status_change,
4642         .setup_tc = hns3_client_setup_tc,
4643         .reset_notify = hns3_reset_notify,
4644         .process_hw_error = hns3_process_hw_error,
4645 };
4646
4647 /* hns3_init_module - Driver registration routine
4648  * hns3_init_module is the first routine called when the driver is
4649  * loaded. All it does is register with the PCI subsystem.
4650  */
4651 static int __init hns3_init_module(void)
4652 {
4653         int ret;
4654
4655         pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
4656         pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
4657
4658         client.type = HNAE3_CLIENT_KNIC;
4659         snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
4660                  hns3_driver_name);
4661
4662         client.ops = &client_ops;
4663
4664         INIT_LIST_HEAD(&client.node);
4665
4666         hns3_dbg_register_debugfs(hns3_driver_name);
4667
4668         ret = hnae3_register_client(&client);
4669         if (ret)
4670                 goto err_reg_client;
4671
4672         ret = pci_register_driver(&hns3_driver);
4673         if (ret)
4674                 goto err_reg_driver;
4675
4676         return ret;
4677
4678 err_reg_driver:
4679         hnae3_unregister_client(&client);
4680 err_reg_client:
4681         hns3_dbg_unregister_debugfs();
4682         return ret;
4683 }
4684 module_init(hns3_init_module);
4685
4686 /* hns3_exit_module - Driver exit cleanup routine
4687  * hns3_exit_module is called just before the driver is removed
4688  * from memory.
4689  */
4690 static void __exit hns3_exit_module(void)
4691 {
4692         pci_unregister_driver(&hns3_driver);
4693         hnae3_unregister_client(&client);
4694         hns3_dbg_unregister_debugfs();
4695 }
4696 module_exit(hns3_exit_module);
4697
4698 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
4699 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
4700 MODULE_LICENSE("GPL");
4701 MODULE_ALIAS("pci:hns-nic");
4702 MODULE_VERSION(HNS3_MOD_VERSION);