drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #include <linux/dma-mapping.h>
   5 #include <linux/etherdevice.h>
   6 #include <linux/interrupt.h>
   7 #include <linux/if_vlan.h>
   8 #include <linux/ip.h>
   9 #include <linux/ipv6.h>
  10 #include <linux/module.h>
  11 #include <linux/pci.h>
  12 #include <linux/aer.h>
  13 #include <linux/skbuff.h>
  14 #include <linux/sctp.h>
  15 #include <linux/vermagic.h>
  16 #include <net/gre.h>
  17 #include <net/pkt_cls.h>
  18 #include <net/tcp.h>
  19 #include <net/vxlan.h>
  20
  21 #include "hnae3.h"
  22 #include "hns3_enet.h"
  23
  24 #define hns3_set_field(origin, shift, val)      ((origin) |= ((val) << (shift)))
  25 #define hns3_tx_bd_count(S)     DIV_ROUND_UP(S, HNS3_MAX_BD_SIZE)
  26
  27 static void hns3_clear_all_ring(struct hnae3_handle *h);
  28 static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h);
  29 static void hns3_remove_hw_addr(struct net_device *netdev);
  30
  31 static const char hns3_driver_name[] = "hns3";
  32 const char hns3_driver_version[] = VERMAGIC_STRING;
  33 static const char hns3_driver_string[] =
  34                         "Hisilicon Ethernet Network Driver for Hip08 Family";
  35 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
  36 static struct hnae3_client client;
  37
  38 static int debug = -1;
  39 module_param(debug, int, 0);
  40 MODULE_PARM_DESC(debug, " Network interface message level setting");
  41
  42 #define DEFAULT_MSG_LEVEL (NETIF_MSG_PROBE | NETIF_MSG_LINK | \
  43                            NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
  44
  45 /* hns3_pci_tbl - PCI Device ID Table
  46  *
  47  * Last entry must be all 0s
  48  *
  49  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  50  *   Class, Class Mask, private data (not used) }
  51  */
  52 static const struct pci_device_id hns3_pci_tbl[] = {
  53         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
  54         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
  55         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
  56          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  57         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
  58          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  59         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
  60          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  61         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
  62          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  63         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
  64          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  65         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
  66         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF),
  67          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  68         /* required last entry */
  69         {0, }
  70 };
  71 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
  72
  73 static irqreturn_t hns3_irq_handle(int irq, void *vector)
  74 {
  75         struct hns3_enet_tqp_vector *tqp_vector = vector;
  76
  77         napi_schedule_irqoff(&tqp_vector->napi);
  78
  79         return IRQ_HANDLED;
  80 }
  81
  82 /* This callback function is used to set affinity changes to the irq affinity
  83  * masks when the irq_set_affinity_notifier function is used.
  84  */
  85 static void hns3_nic_irq_affinity_notify(struct irq_affinity_notify *notify,
  86                                          const cpumask_t *mask)
  87 {
  88         struct hns3_enet_tqp_vector *tqp_vectors =
  89                 container_of(notify, struct hns3_enet_tqp_vector,
  90                              affinity_notify);
  91
  92         tqp_vectors->affinity_mask = *mask;
  93 }
  94
  95 static void hns3_nic_irq_affinity_release(struct kref *ref)
  96 {
  97 }
  98
  99 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
 100 {
 101         struct hns3_enet_tqp_vector *tqp_vectors;
 102         unsigned int i;
 103
 104         for (i = 0; i < priv->vector_num; i++) {
 105                 tqp_vectors = &priv->tqp_vector[i];
 106
 107                 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
 108                         continue;
 109
 110                 /* clear the affinity notifier and affinity mask */
 111                 irq_set_affinity_notifier(tqp_vectors->vector_irq, NULL);
 112                 irq_set_affinity_hint(tqp_vectors->vector_irq, NULL);
 113
 114                 /* release the irq resource */
 115                 free_irq(tqp_vectors->vector_irq, tqp_vectors);
 116                 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
 117         }
 118 }
 119
 120 static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
 121 {
 122         struct hns3_enet_tqp_vector *tqp_vectors;
 123         int txrx_int_idx = 0;
 124         int rx_int_idx = 0;
 125         int tx_int_idx = 0;
 126         unsigned int i;
 127         int ret;
 128
 129         for (i = 0; i < priv->vector_num; i++) {
 130                 tqp_vectors = &priv->tqp_vector[i];
 131
 132                 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
 133                         continue;
 134
 135                 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
 136                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 137                                  "%s-%s-%d", priv->netdev->name, "TxRx",
 138                                  txrx_int_idx++);
 139                         txrx_int_idx++;
 140                 } else if (tqp_vectors->rx_group.ring) {
 141                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 142                                  "%s-%s-%d", priv->netdev->name, "Rx",
 143                                  rx_int_idx++);
 144                 } else if (tqp_vectors->tx_group.ring) {
 145                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 146                                  "%s-%s-%d", priv->netdev->name, "Tx",
 147                                  tx_int_idx++);
 148                 } else {
 149                         /* Skip this unused q_vector */
 150                         continue;
 151                 }
 152
 153                 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
 154
 155                 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
 156                                   tqp_vectors->name,
 157                                        tqp_vectors);
 158                 if (ret) {
 159                         netdev_err(priv->netdev, "request irq(%d) fail\n",
 160                                    tqp_vectors->vector_irq);
 161                         return ret;
 162                 }
 163
 164                 tqp_vectors->affinity_notify.notify =
 165                                         hns3_nic_irq_affinity_notify;
 166                 tqp_vectors->affinity_notify.release =
 167                                         hns3_nic_irq_affinity_release;
 168                 irq_set_affinity_notifier(tqp_vectors->vector_irq,
 169                                           &tqp_vectors->affinity_notify);
 170                 irq_set_affinity_hint(tqp_vectors->vector_irq,
 171                                       &tqp_vectors->affinity_mask);
 172
 173                 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
 174         }
 175
 176         return 0;
 177 }
 178
 179 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
 180                                  u32 mask_en)
 181 {
 182         writel(mask_en, tqp_vector->mask_addr);
 183 }
 184
 185 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
 186 {
 187         napi_enable(&tqp_vector->napi);
 188
 189         /* enable vector */
 190         hns3_mask_vector_irq(tqp_vector, 1);
 191 }
 192
 193 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
 194 {
 195         /* disable vector */
 196         hns3_mask_vector_irq(tqp_vector, 0);
 197
 198         disable_irq(tqp_vector->vector_irq);
 199         napi_disable(&tqp_vector->napi);
 200 }
 201
 202 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
 203                                  u32 rl_value)
 204 {
 205         u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
 206
 207         /* this defines the configuration for RL (Interrupt Rate Limiter).
 208          * Rl defines rate of interrupts i.e. number of interrupts-per-second
 209          * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
 210          */
 211
 212         if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
 213             !tqp_vector->rx_group.coal.gl_adapt_enable)
 214                 /* According to the hardware, the range of rl_reg is
 215                  * 0-59 and the unit is 4.
 216                  */
 217                 rl_reg |=  HNS3_INT_RL_ENABLE_MASK;
 218
 219         writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
 220 }
 221
 222 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 223                                     u32 gl_value)
 224 {
 225         u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 226
 227         writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
 228 }
 229
 230 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 231                                     u32 gl_value)
 232 {
 233         u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 234
 235         writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
 236 }
 237
 238 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
 239                                    struct hns3_nic_priv *priv)
 240 {
 241         /* initialize the configuration for interrupt coalescing.
 242          * 1. GL (Interrupt Gap Limiter)
 243          * 2. RL (Interrupt Rate Limiter)
 244          */
 245
 246         /* Default: enable interrupt coalescing self-adaptive and GL */
 247         tqp_vector->tx_group.coal.gl_adapt_enable = 1;
 248         tqp_vector->rx_group.coal.gl_adapt_enable = 1;
 249
 250         tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
 251         tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
 252
 253         tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
 254         tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
 255 }
 256
 257 static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
 258                                       struct hns3_nic_priv *priv)
 259 {
 260         struct hnae3_handle *h = priv->ae_handle;
 261
 262         hns3_set_vector_coalesce_tx_gl(tqp_vector,
 263                                        tqp_vector->tx_group.coal.int_gl);
 264         hns3_set_vector_coalesce_rx_gl(tqp_vector,
 265                                        tqp_vector->rx_group.coal.int_gl);
 266         hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
 267 }
 268
 269 static int hns3_nic_set_real_num_queue(struct net_device *netdev)
 270 {
 271         struct hnae3_handle *h = hns3_get_handle(netdev);
 272         struct hnae3_knic_private_info *kinfo = &h->kinfo;
 273         unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
 274         int i, ret;
 275
 276         if (kinfo->num_tc <= 1) {
 277                 netdev_reset_tc(netdev);
 278         } else {
 279                 ret = netdev_set_num_tc(netdev, kinfo->num_tc);
 280                 if (ret) {
 281                         netdev_err(netdev,
 282                                    "netdev_set_num_tc fail, ret=%d!\n", ret);
 283                         return ret;
 284                 }
 285
 286                 for (i = 0; i < HNAE3_MAX_TC; i++) {
 287                         if (!kinfo->tc_info[i].enable)
 288                                 continue;
 289
 290                         netdev_set_tc_queue(netdev,
 291                                             kinfo->tc_info[i].tc,
 292                                             kinfo->tc_info[i].tqp_count,
 293                                             kinfo->tc_info[i].tqp_offset);
 294                 }
 295         }
 296
 297         ret = netif_set_real_num_tx_queues(netdev, queue_size);
 298         if (ret) {
 299                 netdev_err(netdev,
 300                            "netif_set_real_num_tx_queues fail, ret=%d!\n",
 301                            ret);
 302                 return ret;
 303         }
 304
 305         ret = netif_set_real_num_rx_queues(netdev, queue_size);
 306         if (ret) {
 307                 netdev_err(netdev,
 308                            "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
 309                 return ret;
 310         }
 311
 312         return 0;
 313 }
 314
 315 static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
 316 {
 317         u16 alloc_tqps, max_rss_size, rss_size;
 318
 319         h->ae_algo->ops->get_tqps_and_rss_info(h, &alloc_tqps, &max_rss_size);
 320         rss_size = alloc_tqps / h->kinfo.num_tc;
 321
 322         return min_t(u16, rss_size, max_rss_size);
 323 }
 324
 325 static void hns3_tqp_enable(struct hnae3_queue *tqp)
 326 {
 327         u32 rcb_reg;
 328
 329         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 330         rcb_reg |= BIT(HNS3_RING_EN_B);
 331         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 332 }
 333
 334 static void hns3_tqp_disable(struct hnae3_queue *tqp)
 335 {
 336         u32 rcb_reg;
 337
 338         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 339         rcb_reg &= ~BIT(HNS3_RING_EN_B);
 340         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 341 }
 342
 343 static int hns3_nic_net_up(struct net_device *netdev)
 344 {
 345         struct hns3_nic_priv *priv = netdev_priv(netdev);
 346         struct hnae3_handle *h = priv->ae_handle;
 347         int i, j;
 348         int ret;
 349
 350         ret = hns3_nic_reset_all_ring(h);
 351         if (ret)
 352                 return ret;
 353
 354         /* get irq resource for all vectors */
 355         ret = hns3_nic_init_irq(priv);
 356         if (ret) {
 357                 netdev_err(netdev, "hns init irq failed! ret=%d\n", ret);
 358                 return ret;
 359         }
 360
 361         clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 362
 363         /* enable the vectors */
 364         for (i = 0; i < priv->vector_num; i++)
 365                 hns3_vector_enable(&priv->tqp_vector[i]);
 366
 367         /* enable rcb */
 368         for (j = 0; j < h->kinfo.num_tqps; j++)
 369                 hns3_tqp_enable(h->kinfo.tqp[j]);
 370
 371         /* start the ae_dev */
 372         ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
 373         if (ret)
 374                 goto out_start_err;
 375
 376         return 0;
 377
 378 out_start_err:
 379         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 380         while (j--)
 381                 hns3_tqp_disable(h->kinfo.tqp[j]);
 382
 383         for (j = i - 1; j >= 0; j--)
 384                 hns3_vector_disable(&priv->tqp_vector[j]);
 385
 386         hns3_nic_uninit_irq(priv);
 387
 388         return ret;
 389 }
 390
 391 static void hns3_config_xps(struct hns3_nic_priv *priv)
 392 {
 393         int i;
 394
 395         for (i = 0; i < priv->vector_num; i++) {
 396                 struct hns3_enet_tqp_vector *tqp_vector = &priv->tqp_vector[i];
 397                 struct hns3_enet_ring *ring = tqp_vector->tx_group.ring;
 398
 399                 while (ring) {
 400                         int ret;
 401
 402                         ret = netif_set_xps_queue(priv->netdev,
 403                                                   &tqp_vector->affinity_mask,
 404                                                   ring->tqp->tqp_index);
 405                         if (ret)
 406                                 netdev_warn(priv->netdev,
 407                                             "set xps queue failed: %d", ret);
 408
 409                         ring = ring->next;
 410                 }
 411         }
 412 }
 413
 414 static int hns3_nic_net_open(struct net_device *netdev)
 415 {
 416         struct hns3_nic_priv *priv = netdev_priv(netdev);
 417         struct hnae3_handle *h = hns3_get_handle(netdev);
 418         struct hnae3_knic_private_info *kinfo;
 419         int i, ret;
 420
 421         if (hns3_nic_resetting(netdev))
 422                 return -EBUSY;
 423
 424         netif_carrier_off(netdev);
 425
 426         ret = hns3_nic_set_real_num_queue(netdev);
 427         if (ret)
 428                 return ret;
 429
 430         ret = hns3_nic_net_up(netdev);
 431         if (ret) {
 432                 netdev_err(netdev,
 433                            "hns net up fail, ret=%d!\n", ret);
 434                 return ret;
 435         }
 436
 437         kinfo = &h->kinfo;
 438         for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) {
 439                 netdev_set_prio_tc_map(netdev, i,
 440                                        kinfo->prio_tc[i]);
 441         }
 442
 443         if (h->ae_algo->ops->set_timer_task)
 444                 h->ae_algo->ops->set_timer_task(priv->ae_handle, true);
 445
 446         hns3_config_xps(priv);
 447         return 0;
 448 }
 449
 450 static void hns3_nic_net_down(struct net_device *netdev)
 451 {
 452         struct hns3_nic_priv *priv = netdev_priv(netdev);
 453         struct hnae3_handle *h = hns3_get_handle(netdev);
 454         const struct hnae3_ae_ops *ops;
 455         int i;
 456
 457         /* disable vectors */
 458         for (i = 0; i < priv->vector_num; i++)
 459                 hns3_vector_disable(&priv->tqp_vector[i]);
 460
 461         /* disable rcb */
 462         for (i = 0; i < h->kinfo.num_tqps; i++)
 463                 hns3_tqp_disable(h->kinfo.tqp[i]);
 464
 465         /* stop ae_dev */
 466         ops = priv->ae_handle->ae_algo->ops;
 467         if (ops->stop)
 468                 ops->stop(priv->ae_handle);
 469
 470         /* free irq resources */
 471         hns3_nic_uninit_irq(priv);
 472
 473         hns3_clear_all_ring(priv->ae_handle);
 474 }
 475
 476 static int hns3_nic_net_stop(struct net_device *netdev)
 477 {
 478         struct hns3_nic_priv *priv = netdev_priv(netdev);
 479         struct hnae3_handle *h = hns3_get_handle(netdev);
 480
 481         if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
 482                 return 0;
 483
 484         if (h->ae_algo->ops->set_timer_task)
 485                 h->ae_algo->ops->set_timer_task(priv->ae_handle, false);
 486
 487         netif_tx_stop_all_queues(netdev);
 488         netif_carrier_off(netdev);
 489
 490         hns3_nic_net_down(netdev);
 491
 492         return 0;
 493 }
 494
 495 static int hns3_nic_uc_sync(struct net_device *netdev,
 496                             const unsigned char *addr)
 497 {
 498         struct hnae3_handle *h = hns3_get_handle(netdev);
 499
 500         if (h->ae_algo->ops->add_uc_addr)
 501                 return h->ae_algo->ops->add_uc_addr(h, addr);
 502
 503         return 0;
 504 }
 505
 506 static int hns3_nic_uc_unsync(struct net_device *netdev,
 507                               const unsigned char *addr)
 508 {
 509         struct hnae3_handle *h = hns3_get_handle(netdev);
 510
 511         if (h->ae_algo->ops->rm_uc_addr)
 512                 return h->ae_algo->ops->rm_uc_addr(h, addr);
 513
 514         return 0;
 515 }
 516
 517 static int hns3_nic_mc_sync(struct net_device *netdev,
 518                             const unsigned char *addr)
 519 {
 520         struct hnae3_handle *h = hns3_get_handle(netdev);
 521
 522         if (h->ae_algo->ops->add_mc_addr)
 523                 return h->ae_algo->ops->add_mc_addr(h, addr);
 524
 525         return 0;
 526 }
 527
 528 static int hns3_nic_mc_unsync(struct net_device *netdev,
 529                               const unsigned char *addr)
 530 {
 531         struct hnae3_handle *h = hns3_get_handle(netdev);
 532
 533         if (h->ae_algo->ops->rm_mc_addr)
 534                 return h->ae_algo->ops->rm_mc_addr(h, addr);
 535
 536         return 0;
 537 }
 538
 539 static u8 hns3_get_netdev_flags(struct net_device *netdev)
 540 {
 541         u8 flags = 0;
 542
 543         if (netdev->flags & IFF_PROMISC) {
 544                 flags = HNAE3_USER_UPE | HNAE3_USER_MPE | HNAE3_BPE;
 545         } else {
 546                 flags |= HNAE3_VLAN_FLTR;
 547                 if (netdev->flags & IFF_ALLMULTI)
 548                         flags |= HNAE3_USER_MPE;
 549         }
 550
 551         return flags;
 552 }
 553
 554 static void hns3_nic_set_rx_mode(struct net_device *netdev)
 555 {
 556         struct hnae3_handle *h = hns3_get_handle(netdev);
 557         u8 new_flags;
 558         int ret;
 559
 560         new_flags = hns3_get_netdev_flags(netdev);
 561
 562         ret = __dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync);
 563         if (ret) {
 564                 netdev_err(netdev, "sync uc address fail\n");
 565                 if (ret == -ENOSPC)
 566                         new_flags |= HNAE3_OVERFLOW_UPE;
 567         }
 568
 569         if (netdev->flags & IFF_MULTICAST) {
 570                 ret = __dev_mc_sync(netdev, hns3_nic_mc_sync,
 571                                     hns3_nic_mc_unsync);
 572                 if (ret) {
 573                         netdev_err(netdev, "sync mc address fail\n");
 574                         if (ret == -ENOSPC)
 575                                 new_flags |= HNAE3_OVERFLOW_MPE;
 576                 }
 577         }
 578
 579         /* User mode Promisc mode enable and vlan filtering is disabled to
 580          * let all packets in. MAC-VLAN Table overflow Promisc enabled and
 581          * vlan fitering is enabled
 582          */
 583         hns3_enable_vlan_filter(netdev, new_flags & HNAE3_VLAN_FLTR);
 584         h->netdev_flags = new_flags;
 585         hns3_update_promisc_mode(netdev, new_flags);
 586 }
 587
 588 int hns3_update_promisc_mode(struct net_device *netdev, u8 promisc_flags)
 589 {
 590         struct hns3_nic_priv *priv = netdev_priv(netdev);
 591         struct hnae3_handle *h = priv->ae_handle;
 592
 593         if (h->ae_algo->ops->set_promisc_mode) {
 594                 return h->ae_algo->ops->set_promisc_mode(h,
 595                                                 promisc_flags & HNAE3_UPE,
 596                                                 promisc_flags & HNAE3_MPE);
 597         }
 598
 599         return 0;
 600 }
 601
 602 void hns3_enable_vlan_filter(struct net_device *netdev, bool enable)
 603 {
 604         struct hns3_nic_priv *priv = netdev_priv(netdev);
 605         struct hnae3_handle *h = priv->ae_handle;
 606         bool last_state;
 607
 608         if (h->pdev->revision >= 0x21 && h->ae_algo->ops->enable_vlan_filter) {
 609                 last_state = h->netdev_flags & HNAE3_VLAN_FLTR ? true : false;
 610                 if (enable != last_state) {
 611                         netdev_info(netdev,
 612                                     "%s vlan filter\n",
 613                                     enable ? "enable" : "disable");
 614                         h->ae_algo->ops->enable_vlan_filter(h, enable);
 615                 }
 616         }
 617 }
 618
 619 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
 620                         u16 *mss, u32 *type_cs_vlan_tso)
 621 {
 622         u32 l4_offset, hdr_len;
 623         union l3_hdr_info l3;
 624         union l4_hdr_info l4;
 625         u32 l4_paylen;
 626         int ret;
 627
 628         if (!skb_is_gso(skb))
 629                 return 0;
 630
 631         ret = skb_cow_head(skb, 0);
 632         if (unlikely(ret))
 633                 return ret;
 634
 635         l3.hdr = skb_network_header(skb);
 636         l4.hdr = skb_transport_header(skb);
 637
 638         /* Software should clear the IPv4's checksum field when tso is
 639          * needed.
 640          */
 641         if (l3.v4->version == 4)
 642                 l3.v4->check = 0;
 643
 644         /* tunnel packet.*/
 645         if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
 646                                          SKB_GSO_GRE_CSUM |
 647                                          SKB_GSO_UDP_TUNNEL |
 648                                          SKB_GSO_UDP_TUNNEL_CSUM)) {
 649                 if ((!(skb_shinfo(skb)->gso_type &
 650                     SKB_GSO_PARTIAL)) &&
 651                     (skb_shinfo(skb)->gso_type &
 652                     SKB_GSO_UDP_TUNNEL_CSUM)) {
 653                         /* Software should clear the udp's checksum
 654                          * field when tso is needed.
 655                          */
 656                         l4.udp->check = 0;
 657                 }
 658                 /* reset l3&l4 pointers from outer to inner headers */
 659                 l3.hdr = skb_inner_network_header(skb);
 660                 l4.hdr = skb_inner_transport_header(skb);
 661
 662                 /* Software should clear the IPv4's checksum field when
 663                  * tso is needed.
 664                  */
 665                 if (l3.v4->version == 4)
 666                         l3.v4->check = 0;
 667         }
 668
 669         /* normal or tunnel packet*/
 670         l4_offset = l4.hdr - skb->data;
 671         hdr_len = (l4.tcp->doff << 2) + l4_offset;
 672
 673         /* remove payload length from inner pseudo checksum when tso*/
 674         l4_paylen = skb->len - l4_offset;
 675         csum_replace_by_diff(&l4.tcp->check,
 676                              (__force __wsum)htonl(l4_paylen));
 677
 678         /* find the txbd field values */
 679         *paylen = skb->len - hdr_len;
 680         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_TSO_B, 1);
 681
 682         /* get MSS for TSO */
 683         *mss = skb_shinfo(skb)->gso_size;
 684
 685         return 0;
 686 }
 687
 688 static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
 689                                 u8 *il4_proto)
 690 {
 691         union l3_hdr_info l3;
 692         unsigned char *l4_hdr;
 693         unsigned char *exthdr;
 694         u8 l4_proto_tmp;
 695         __be16 frag_off;
 696
 697         /* find outer header point */
 698         l3.hdr = skb_network_header(skb);
 699         l4_hdr = skb_transport_header(skb);
 700
 701         if (skb->protocol == htons(ETH_P_IPV6)) {
 702                 exthdr = l3.hdr + sizeof(*l3.v6);
 703                 l4_proto_tmp = l3.v6->nexthdr;
 704                 if (l4_hdr != exthdr)
 705                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 706                                          &l4_proto_tmp, &frag_off);
 707         } else if (skb->protocol == htons(ETH_P_IP)) {
 708                 l4_proto_tmp = l3.v4->protocol;
 709         } else {
 710                 return -EINVAL;
 711         }
 712
 713         *ol4_proto = l4_proto_tmp;
 714
 715         /* tunnel packet */
 716         if (!skb->encapsulation) {
 717                 *il4_proto = 0;
 718                 return 0;
 719         }
 720
 721         /* find inner header point */
 722         l3.hdr = skb_inner_network_header(skb);
 723         l4_hdr = skb_inner_transport_header(skb);
 724
 725         if (l3.v6->version == 6) {
 726                 exthdr = l3.hdr + sizeof(*l3.v6);
 727                 l4_proto_tmp = l3.v6->nexthdr;
 728                 if (l4_hdr != exthdr)
 729                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 730                                          &l4_proto_tmp, &frag_off);
 731         } else if (l3.v4->version == 4) {
 732                 l4_proto_tmp = l3.v4->protocol;
 733         }
 734
 735         *il4_proto = l4_proto_tmp;
 736
 737         return 0;
 738 }
 739
 740 static void hns3_set_l2l3l4_len(struct sk_buff *skb, u8 ol4_proto,
 741                                 u8 il4_proto, u32 *type_cs_vlan_tso,
 742                                 u32 *ol_type_vlan_len_msec)
 743 {
 744         union l3_hdr_info l3;
 745         union l4_hdr_info l4;
 746         unsigned char *l2_hdr;
 747         u8 l4_proto = ol4_proto;
 748         u32 ol2_len;
 749         u32 ol3_len;
 750         u32 ol4_len;
 751         u32 l2_len;
 752         u32 l3_len;
 753
 754         l3.hdr = skb_network_header(skb);
 755         l4.hdr = skb_transport_header(skb);
 756
 757         /* compute L2 header size for normal packet, defined in 2 Bytes */
 758         l2_len = l3.hdr - skb->data;
 759         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S, l2_len >> 1);
 760
 761         /* tunnel packet*/
 762         if (skb->encapsulation) {
 763                 /* compute OL2 header size, defined in 2 Bytes */
 764                 ol2_len = l2_len;
 765                 hns3_set_field(*ol_type_vlan_len_msec,
 766                                HNS3_TXD_L2LEN_S, ol2_len >> 1);
 767
 768                 /* compute OL3 header size, defined in 4 Bytes */
 769                 ol3_len = l4.hdr - l3.hdr;
 770                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_S,
 771                                ol3_len >> 2);
 772
 773                 /* MAC in UDP, MAC in GRE (0x6558)*/
 774                 if ((ol4_proto == IPPROTO_UDP) || (ol4_proto == IPPROTO_GRE)) {
 775                         /* switch MAC header ptr from outer to inner header.*/
 776                         l2_hdr = skb_inner_mac_header(skb);
 777
 778                         /* compute OL4 header size, defined in 4 Bytes. */
 779                         ol4_len = l2_hdr - l4.hdr;
 780                         hns3_set_field(*ol_type_vlan_len_msec,
 781                                        HNS3_TXD_L4LEN_S, ol4_len >> 2);
 782
 783                         /* switch IP header ptr from outer to inner header */
 784                         l3.hdr = skb_inner_network_header(skb);
 785
 786                         /* compute inner l2 header size, defined in 2 Bytes. */
 787                         l2_len = l3.hdr - l2_hdr;
 788                         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S,
 789                                        l2_len >> 1);
 790                 } else {
 791                         /* skb packet types not supported by hardware,
 792                          * txbd len fild doesn't be filled.
 793                          */
 794                         return;
 795                 }
 796
 797                 /* switch L4 header pointer from outer to inner */
 798                 l4.hdr = skb_inner_transport_header(skb);
 799
 800                 l4_proto = il4_proto;
 801         }
 802
 803         /* compute inner(/normal) L3 header size, defined in 4 Bytes */
 804         l3_len = l4.hdr - l3.hdr;
 805         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_S, l3_len >> 2);
 806
 807         /* compute inner(/normal) L4 header size, defined in 4 Bytes */
 808         switch (l4_proto) {
 809         case IPPROTO_TCP:
 810                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 811                                l4.tcp->doff);
 812                 break;
 813         case IPPROTO_SCTP:
 814                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 815                                (sizeof(struct sctphdr) >> 2));
 816                 break;
 817         case IPPROTO_UDP:
 818                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 819                                (sizeof(struct udphdr) >> 2));
 820                 break;
 821         default:
 822                 /* skb packet types not supported by hardware,
 823                  * txbd len fild doesn't be filled.
 824                  */
 825                 return;
 826         }
 827 }
 828
 829 /* when skb->encapsulation is 0, skb->ip_summed is CHECKSUM_PARTIAL
 830  * and it is udp packet, which has a dest port as the IANA assigned.
 831  * the hardware is expected to do the checksum offload, but the
 832  * hardware will not do the checksum offload when udp dest port is
 833  * 4789.
 834  */
 835 static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
 836 {
 837         union l4_hdr_info l4;
 838
 839         l4.hdr = skb_transport_header(skb);
 840
 841         if (!(!skb->encapsulation &&
 842               l4.udp->dest == htons(IANA_VXLAN_UDP_PORT)))
 843                 return false;
 844
 845         skb_checksum_help(skb);
 846
 847         return true;
 848 }
 849
 850 static int hns3_set_l3l4_type_csum(struct sk_buff *skb, u8 ol4_proto,
 851                                    u8 il4_proto, u32 *type_cs_vlan_tso,
 852                                    u32 *ol_type_vlan_len_msec)
 853 {
 854         union l3_hdr_info l3;
 855         u32 l4_proto = ol4_proto;
 856
 857         l3.hdr = skb_network_header(skb);
 858
 859         /* define OL3 type and tunnel type(OL4).*/
 860         if (skb->encapsulation) {
 861                 /* define outer network header type.*/
 862                 if (skb->protocol == htons(ETH_P_IP)) {
 863                         if (skb_is_gso(skb))
 864                                 hns3_set_field(*ol_type_vlan_len_msec,
 865                                                HNS3_TXD_OL3T_S,
 866                                                HNS3_OL3T_IPV4_CSUM);
 867                         else
 868                                 hns3_set_field(*ol_type_vlan_len_msec,
 869                                                HNS3_TXD_OL3T_S,
 870                                                HNS3_OL3T_IPV4_NO_CSUM);
 871
 872                 } else if (skb->protocol == htons(ETH_P_IPV6)) {
 873                         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_S,
 874                                        HNS3_OL3T_IPV6);
 875                 }
 876
 877                 /* define tunnel type(OL4).*/
 878                 switch (l4_proto) {
 879                 case IPPROTO_UDP:
 880                         hns3_set_field(*ol_type_vlan_len_msec,
 881                                        HNS3_TXD_TUNTYPE_S,
 882                                        HNS3_TUN_MAC_IN_UDP);
 883                         break;
 884                 case IPPROTO_GRE:
 885                         hns3_set_field(*ol_type_vlan_len_msec,
 886                                        HNS3_TXD_TUNTYPE_S,
 887                                        HNS3_TUN_NVGRE);
 888                         break;
 889                 default:
 890                         /* drop the skb tunnel packet if hardware don't support,
 891                          * because hardware can't calculate csum when TSO.
 892                          */
 893                         if (skb_is_gso(skb))
 894                                 return -EDOM;
 895
 896                         /* the stack computes the IP header already,
 897                          * driver calculate l4 checksum when not TSO.
 898                          */
 899                         skb_checksum_help(skb);
 900                         return 0;
 901                 }
 902
 903                 l3.hdr = skb_inner_network_header(skb);
 904                 l4_proto = il4_proto;
 905         }
 906
 907         if (l3.v4->version == 4) {
 908                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 909                                HNS3_L3T_IPV4);
 910
 911                 /* the stack computes the IP header already, the only time we
 912                  * need the hardware to recompute it is in the case of TSO.
 913                  */
 914                 if (skb_is_gso(skb))
 915                         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
 916         } else if (l3.v6->version == 6) {
 917                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 918                                HNS3_L3T_IPV6);
 919         }
 920
 921         switch (l4_proto) {
 922         case IPPROTO_TCP:
 923                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 924                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 925                                HNS3_L4T_TCP);
 926                 break;
 927         case IPPROTO_UDP:
 928                 if (hns3_tunnel_csum_bug(skb))
 929                         break;
 930
 931                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 932                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 933                                HNS3_L4T_UDP);
 934                 break;
 935         case IPPROTO_SCTP:
 936                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 937                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 938                                HNS3_L4T_SCTP);
 939                 break;
 940         default:
 941                 /* drop the skb tunnel packet if hardware don't support,
 942                  * because hardware can't calculate csum when TSO.
 943                  */
 944                 if (skb_is_gso(skb))
 945                         return -EDOM;
 946
 947                 /* the stack computes the IP header already,
 948                  * driver calculate l4 checksum when not TSO.
 949                  */
 950                 skb_checksum_help(skb);
 951                 return 0;
 952         }
 953
 954         return 0;
 955 }
 956
 957 static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
 958 {
 959         /* Config bd buffer end */
 960         hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
 961         hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
 962 }
 963
 964 static int hns3_fill_desc_vtags(struct sk_buff *skb,
 965                                 struct hns3_enet_ring *tx_ring,
 966                                 u32 *inner_vlan_flag,
 967                                 u32 *out_vlan_flag,
 968                                 u16 *inner_vtag,
 969                                 u16 *out_vtag)
 970 {
 971 #define HNS3_TX_VLAN_PRIO_SHIFT 13
 972
 973         struct hnae3_handle *handle = tx_ring->tqp->handle;
 974
 975         /* Since HW limitation, if port based insert VLAN enabled, only one VLAN
 976          * header is allowed in skb, otherwise it will cause RAS error.
 977          */
 978         if (unlikely(skb_vlan_tagged_multi(skb) &&
 979                      handle->port_base_vlan_state ==
 980                      HNAE3_PORT_BASE_VLAN_ENABLE))
 981                 return -EINVAL;
 982
 983         if (skb->protocol == htons(ETH_P_8021Q) &&
 984             !(tx_ring->tqp->handle->kinfo.netdev->features &
 985             NETIF_F_HW_VLAN_CTAG_TX)) {
 986                 /* When HW VLAN acceleration is turned off, and the stack
 987                  * sets the protocol to 802.1q, the driver just need to
 988                  * set the protocol to the encapsulated ethertype.
 989                  */
 990                 skb->protocol = vlan_get_protocol(skb);
 991                 return 0;
 992         }
 993
 994         if (skb_vlan_tag_present(skb)) {
 995                 u16 vlan_tag;
 996
 997                 vlan_tag = skb_vlan_tag_get(skb);
 998                 vlan_tag |= (skb->priority & 0x7) << HNS3_TX_VLAN_PRIO_SHIFT;
 999
1000                 /* Based on hw strategy, use out_vtag in two layer tag case,
1001                  * and use inner_vtag in one tag case.
1002                  */
1003                 if (skb->protocol == htons(ETH_P_8021Q)) {
1004                         if (handle->port_base_vlan_state ==
1005                             HNAE3_PORT_BASE_VLAN_DISABLE){
1006                                 hns3_set_field(*out_vlan_flag,
1007                                                HNS3_TXD_OVLAN_B, 1);
1008                                 *out_vtag = vlan_tag;
1009                         } else {
1010                                 hns3_set_field(*inner_vlan_flag,
1011                                                HNS3_TXD_VLAN_B, 1);
1012                                 *inner_vtag = vlan_tag;
1013                         }
1014                 } else {
1015                         hns3_set_field(*inner_vlan_flag, HNS3_TXD_VLAN_B, 1);
1016                         *inner_vtag = vlan_tag;
1017                 }
1018         } else if (skb->protocol == htons(ETH_P_8021Q)) {
1019                 struct vlan_ethhdr *vhdr;
1020                 int rc;
1021
1022                 rc = skb_cow_head(skb, 0);
1023                 if (unlikely(rc < 0))
1024                         return rc;
1025                 vhdr = (struct vlan_ethhdr *)skb->data;
1026                 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority & 0x7)
1027                                         << HNS3_TX_VLAN_PRIO_SHIFT);
1028         }
1029
1030         skb->protocol = vlan_get_protocol(skb);
1031         return 0;
1032 }
1033
1034 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
1035                           int size, int frag_end, enum hns_desc_type type)
1036 {
1037         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
1038         struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1039         struct device *dev = ring_to_dev(ring);
1040         struct skb_frag_struct *frag;
1041         unsigned int frag_buf_num;
1042         int k, sizeoflast;
1043         dma_addr_t dma;
1044
1045         if (type == DESC_TYPE_SKB) {
1046                 struct sk_buff *skb = (struct sk_buff *)priv;
1047                 u32 ol_type_vlan_len_msec = 0;
1048                 u32 type_cs_vlan_tso = 0;
1049                 u32 paylen = skb->len;
1050                 u16 inner_vtag = 0;
1051                 u16 out_vtag = 0;
1052                 u16 mss = 0;
1053                 int ret;
1054
1055                 ret = hns3_fill_desc_vtags(skb, ring, &type_cs_vlan_tso,
1056                                            &ol_type_vlan_len_msec,
1057                                            &inner_vtag, &out_vtag);
1058                 if (unlikely(ret))
1059                         return ret;
1060
1061                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1062                         u8 ol4_proto, il4_proto;
1063
1064                         skb_reset_mac_len(skb);
1065
1066                         ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
1067                         if (unlikely(ret))
1068                                 return ret;
1069                         hns3_set_l2l3l4_len(skb, ol4_proto, il4_proto,
1070                                             &type_cs_vlan_tso,
1071                                             &ol_type_vlan_len_msec);
1072                         ret = hns3_set_l3l4_type_csum(skb, ol4_proto, il4_proto,
1073                                                       &type_cs_vlan_tso,
1074                                                       &ol_type_vlan_len_msec);
1075                         if (unlikely(ret))
1076                                 return ret;
1077
1078                         ret = hns3_set_tso(skb, &paylen, &mss,
1079                                            &type_cs_vlan_tso);
1080                         if (unlikely(ret))
1081                                 return ret;
1082                 }
1083
1084                 /* Set txbd */
1085                 desc->tx.ol_type_vlan_len_msec =
1086                         cpu_to_le32(ol_type_vlan_len_msec);
1087                 desc->tx.type_cs_vlan_tso_len =
1088                         cpu_to_le32(type_cs_vlan_tso);
1089                 desc->tx.paylen = cpu_to_le32(paylen);
1090                 desc->tx.mss = cpu_to_le16(mss);
1091                 desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
1092                 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
1093
1094                 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1095         } else {
1096                 frag = (struct skb_frag_struct *)priv;
1097                 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1098         }
1099
1100         if (unlikely(dma_mapping_error(ring->dev, dma))) {
1101                 ring->stats.sw_err_cnt++;
1102                 return -ENOMEM;
1103         }
1104
1105         desc_cb->length = size;
1106
1107         if (likely(size <= HNS3_MAX_BD_SIZE)) {
1108                 u16 bdtp_fe_sc_vld_ra_ri = 0;
1109
1110                 desc_cb->priv = priv;
1111                 desc_cb->dma = dma;
1112                 desc_cb->type = type;
1113                 desc->addr = cpu_to_le64(dma);
1114                 desc->tx.send_size = cpu_to_le16(size);
1115                 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
1116                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1117                         cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1118
1119                 ring_ptr_move_fw(ring, next_to_use);
1120                 return 0;
1121         }
1122
1123         frag_buf_num = hns3_tx_bd_count(size);
1124         sizeoflast = size & HNS3_TX_LAST_SIZE_M;
1125         sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
1126
1127         /* When frag size is bigger than hardware limit, split this frag */
1128         for (k = 0; k < frag_buf_num; k++) {
1129                 u16 bdtp_fe_sc_vld_ra_ri = 0;
1130
1131                 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
1132                 desc_cb->priv = priv;
1133                 desc_cb->dma = dma + HNS3_MAX_BD_SIZE * k;
1134                 desc_cb->type = (type == DESC_TYPE_SKB && !k) ?
1135                                         DESC_TYPE_SKB : DESC_TYPE_PAGE;
1136
1137                 /* now, fill the descriptor */
1138                 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);
1139                 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?
1140                                 (u16)sizeoflast : (u16)HNS3_MAX_BD_SIZE);
1141                 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri,
1142                                        frag_end && (k == frag_buf_num - 1) ?
1143                                                 1 : 0);
1144                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1145                                 cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1146
1147                 /* move ring pointer to next.*/
1148                 ring_ptr_move_fw(ring, next_to_use);
1149
1150                 desc_cb = &ring->desc_cb[ring->next_to_use];
1151                 desc = &ring->desc[ring->next_to_use];
1152         }
1153
1154         return 0;
1155 }
1156
1157 static int hns3_nic_bd_num(struct sk_buff *skb)
1158 {
1159         int size = skb_headlen(skb);
1160         int i, bd_num;
1161
1162         /* if the total len is within the max bd limit */
1163         if (likely(skb->len <= HNS3_MAX_BD_SIZE))
1164                 return skb_shinfo(skb)->nr_frags + 1;
1165
1166         bd_num = hns3_tx_bd_count(size);
1167
1168         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1169                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
1170                 int frag_bd_num;
1171
1172                 size = skb_frag_size(frag);
1173                 frag_bd_num = hns3_tx_bd_count(size);
1174
1175                 if (unlikely(frag_bd_num > HNS3_MAX_BD_PER_FRAG))
1176                         return -ENOMEM;
1177
1178                 bd_num += frag_bd_num;
1179         }
1180
1181         return bd_num;
1182 }
1183
1184 static int hns3_nic_maybe_stop_tx(struct hns3_enet_ring *ring,
1185                                   struct sk_buff **out_skb)
1186 {
1187         struct sk_buff *skb = *out_skb;
1188         int bd_num;
1189
1190         bd_num = hns3_nic_bd_num(skb);
1191         if (bd_num < 0)
1192                 return bd_num;
1193
1194         if (unlikely(bd_num > HNS3_MAX_BD_PER_FRAG)) {
1195                 struct sk_buff *new_skb;
1196
1197                 bd_num = hns3_tx_bd_count(skb->len);
1198                 if (unlikely(ring_space(ring) < bd_num))
1199                         return -EBUSY;
1200                 /* manual split the send packet */
1201                 new_skb = skb_copy(skb, GFP_ATOMIC);
1202                 if (!new_skb)
1203                         return -ENOMEM;
1204                 dev_kfree_skb_any(skb);
1205                 *out_skb = new_skb;
1206
1207                 u64_stats_update_begin(&ring->syncp);
1208                 ring->stats.tx_copy++;
1209                 u64_stats_update_end(&ring->syncp);
1210         }
1211
1212         if (unlikely(ring_space(ring) < bd_num))
1213                 return -EBUSY;
1214
1215         return bd_num;
1216 }
1217
1218 static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig)
1219 {
1220         struct device *dev = ring_to_dev(ring);
1221         unsigned int i;
1222
1223         for (i = 0; i < ring->desc_num; i++) {
1224                 /* check if this is where we started */
1225                 if (ring->next_to_use == next_to_use_orig)
1226                         break;
1227
1228                 /* unmap the descriptor dma address */
1229                 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
1230                         dma_unmap_single(dev,
1231                                          ring->desc_cb[ring->next_to_use].dma,
1232                                         ring->desc_cb[ring->next_to_use].length,
1233                                         DMA_TO_DEVICE);
1234                 else if (ring->desc_cb[ring->next_to_use].length)
1235                         dma_unmap_page(dev,
1236                                        ring->desc_cb[ring->next_to_use].dma,
1237                                        ring->desc_cb[ring->next_to_use].length,
1238                                        DMA_TO_DEVICE);
1239
1240                 ring->desc_cb[ring->next_to_use].length = 0;
1241
1242                 /* rollback one */
1243                 ring_ptr_move_bw(ring, next_to_use);
1244         }
1245 }
1246
1247 netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
1248 {
1249         struct hns3_nic_priv *priv = netdev_priv(netdev);
1250         struct hns3_nic_ring_data *ring_data =
1251                 &tx_ring_data(priv, skb->queue_mapping);
1252         struct hns3_enet_ring *ring = ring_data->ring;
1253         struct netdev_queue *dev_queue;
1254         struct skb_frag_struct *frag;
1255         int next_to_use_head;
1256         int next_to_use_frag;
1257         int buf_num;
1258         int seg_num;
1259         int size;
1260         int ret;
1261         int i;
1262
1263         /* Prefetch the data used later */
1264         prefetch(skb->data);
1265
1266         buf_num = hns3_nic_maybe_stop_tx(ring, &skb);
1267         if (unlikely(buf_num <= 0)) {
1268                 if (buf_num == -EBUSY) {
1269                         u64_stats_update_begin(&ring->syncp);
1270                         ring->stats.tx_busy++;
1271                         u64_stats_update_end(&ring->syncp);
1272                         goto out_net_tx_busy;
1273                 } else if (buf_num == -ENOMEM) {
1274                         u64_stats_update_begin(&ring->syncp);
1275                         ring->stats.sw_err_cnt++;
1276                         u64_stats_update_end(&ring->syncp);
1277                 }
1278
1279                 if (net_ratelimit())
1280                         netdev_err(netdev, "xmit error: %d!\n", buf_num);
1281
1282                 goto out_err_tx_ok;
1283         }
1284
1285         /* No. of segments (plus a header) */
1286         seg_num = skb_shinfo(skb)->nr_frags + 1;
1287         /* Fill the first part */
1288         size = skb_headlen(skb);
1289
1290         next_to_use_head = ring->next_to_use;
1291
1292         ret = hns3_fill_desc(ring, skb, size, seg_num == 1 ? 1 : 0,
1293                              DESC_TYPE_SKB);
1294         if (unlikely(ret))
1295                 goto head_fill_err;
1296
1297         next_to_use_frag = ring->next_to_use;
1298         /* Fill the fragments */
1299         for (i = 1; i < seg_num; i++) {
1300                 frag = &skb_shinfo(skb)->frags[i - 1];
1301                 size = skb_frag_size(frag);
1302
1303                 ret = hns3_fill_desc(ring, frag, size,
1304                                      seg_num - 1 == i ? 1 : 0,
1305                                      DESC_TYPE_PAGE);
1306
1307                 if (unlikely(ret))
1308                         goto frag_fill_err;
1309         }
1310
1311         /* Complete translate all packets */
1312         dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1313         netdev_tx_sent_queue(dev_queue, skb->len);
1314
1315         wmb(); /* Commit all data before submit */
1316
1317         hnae3_queue_xmit(ring->tqp, buf_num);
1318
1319         return NETDEV_TX_OK;
1320
1321 frag_fill_err:
1322         hns3_clear_desc(ring, next_to_use_frag);
1323
1324 head_fill_err:
1325         hns3_clear_desc(ring, next_to_use_head);
1326
1327 out_err_tx_ok:
1328         dev_kfree_skb_any(skb);
1329         return NETDEV_TX_OK;
1330
1331 out_net_tx_busy:
1332         netif_stop_subqueue(netdev, ring_data->queue_index);
1333         smp_mb(); /* Commit all data before submit */
1334
1335         return NETDEV_TX_BUSY;
1336 }
1337
1338 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1339 {
1340         struct hnae3_handle *h = hns3_get_handle(netdev);
1341         struct sockaddr *mac_addr = p;
1342         int ret;
1343
1344         if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1345                 return -EADDRNOTAVAIL;
1346
1347         if (ether_addr_equal(netdev->dev_addr, mac_addr->sa_data)) {
1348                 netdev_info(netdev, "already using mac address %pM\n",
1349                             mac_addr->sa_data);
1350                 return 0;
1351         }
1352
1353         ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
1354         if (ret) {
1355                 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1356                 return ret;
1357         }
1358
1359         ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1360
1361         return 0;
1362 }
1363
1364 static int hns3_nic_do_ioctl(struct net_device *netdev,
1365                              struct ifreq *ifr, int cmd)
1366 {
1367         struct hnae3_handle *h = hns3_get_handle(netdev);
1368
1369         if (!netif_running(netdev))
1370                 return -EINVAL;
1371
1372         if (!h->ae_algo->ops->do_ioctl)
1373                 return -EOPNOTSUPP;
1374
1375         return h->ae_algo->ops->do_ioctl(h, ifr, cmd);
1376 }
1377
1378 static int hns3_nic_set_features(struct net_device *netdev,
1379                                  netdev_features_t features)
1380 {
1381         netdev_features_t changed = netdev->features ^ features;
1382         struct hns3_nic_priv *priv = netdev_priv(netdev);
1383         struct hnae3_handle *h = priv->ae_handle;
1384         bool enable;
1385         int ret;
1386
1387         if (changed & (NETIF_F_GRO_HW) && h->ae_algo->ops->set_gro_en) {
1388                 enable = !!(features & NETIF_F_GRO_HW);
1389                 ret = h->ae_algo->ops->set_gro_en(h, enable);
1390                 if (ret)
1391                         return ret;
1392         }
1393
1394         if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1395             h->ae_algo->ops->enable_vlan_filter) {
1396                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_FILTER);
1397                 h->ae_algo->ops->enable_vlan_filter(h, enable);
1398         }
1399
1400         if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1401             h->ae_algo->ops->enable_hw_strip_rxvtag) {
1402                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
1403                 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, enable);
1404                 if (ret)
1405                         return ret;
1406         }
1407
1408         if ((changed & NETIF_F_NTUPLE) && h->ae_algo->ops->enable_fd) {
1409                 enable = !!(features & NETIF_F_NTUPLE);
1410                 h->ae_algo->ops->enable_fd(h, enable);
1411         }
1412
1413         netdev->features = features;
1414         return 0;
1415 }
1416
1417 static void hns3_nic_get_stats64(struct net_device *netdev,
1418                                  struct rtnl_link_stats64 *stats)
1419 {
1420         struct hns3_nic_priv *priv = netdev_priv(netdev);
1421         int queue_num = priv->ae_handle->kinfo.num_tqps;
1422         struct hnae3_handle *handle = priv->ae_handle;
1423         struct hns3_enet_ring *ring;
1424         u64 rx_length_errors = 0;
1425         u64 rx_crc_errors = 0;
1426         u64 rx_multicast = 0;
1427         unsigned int start;
1428         u64 tx_errors = 0;
1429         u64 rx_errors = 0;
1430         unsigned int idx;
1431         u64 tx_bytes = 0;
1432         u64 rx_bytes = 0;
1433         u64 tx_pkts = 0;
1434         u64 rx_pkts = 0;
1435         u64 tx_drop = 0;
1436         u64 rx_drop = 0;
1437
1438         if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1439                 return;
1440
1441         handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1442
1443         for (idx = 0; idx < queue_num; idx++) {
1444                 /* fetch the tx stats */
1445                 ring = priv->ring_data[idx].ring;
1446                 do {
1447                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1448                         tx_bytes += ring->stats.tx_bytes;
1449                         tx_pkts += ring->stats.tx_pkts;
1450                         tx_drop += ring->stats.sw_err_cnt;
1451                         tx_errors += ring->stats.sw_err_cnt;
1452                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1453
1454                 /* fetch the rx stats */
1455                 ring = priv->ring_data[idx + queue_num].ring;
1456                 do {
1457                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1458                         rx_bytes += ring->stats.rx_bytes;
1459                         rx_pkts += ring->stats.rx_pkts;
1460                         rx_drop += ring->stats.non_vld_descs;
1461                         rx_drop += ring->stats.l2_err;
1462                         rx_errors += ring->stats.non_vld_descs;
1463                         rx_errors += ring->stats.l2_err;
1464                         rx_crc_errors += ring->stats.l2_err;
1465                         rx_crc_errors += ring->stats.l3l4_csum_err;
1466                         rx_multicast += ring->stats.rx_multicast;
1467                         rx_length_errors += ring->stats.err_pkt_len;
1468                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1469         }
1470
1471         stats->tx_bytes = tx_bytes;
1472         stats->tx_packets = tx_pkts;
1473         stats->rx_bytes = rx_bytes;
1474         stats->rx_packets = rx_pkts;
1475
1476         stats->rx_errors = rx_errors;
1477         stats->multicast = rx_multicast;
1478         stats->rx_length_errors = rx_length_errors;
1479         stats->rx_crc_errors = rx_crc_errors;
1480         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1481
1482         stats->tx_errors = tx_errors;
1483         stats->rx_dropped = rx_drop;
1484         stats->tx_dropped = tx_drop;
1485         stats->collisions = netdev->stats.collisions;
1486         stats->rx_over_errors = netdev->stats.rx_over_errors;
1487         stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1488         stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1489         stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1490         stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1491         stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1492         stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1493         stats->tx_window_errors = netdev->stats.tx_window_errors;
1494         stats->rx_compressed = netdev->stats.rx_compressed;
1495         stats->tx_compressed = netdev->stats.tx_compressed;
1496 }
1497
1498 static int hns3_setup_tc(struct net_device *netdev, void *type_data)
1499 {
1500         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
1501         struct hnae3_handle *h = hns3_get_handle(netdev);
1502         struct hnae3_knic_private_info *kinfo = &h->kinfo;
1503         u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1504         u8 tc = mqprio_qopt->qopt.num_tc;
1505         u16 mode = mqprio_qopt->mode;
1506         u8 hw = mqprio_qopt->qopt.hw;
1507
1508         if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1509                mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1510                 return -EOPNOTSUPP;
1511
1512         if (tc > HNAE3_MAX_TC)
1513                 return -EINVAL;
1514
1515         if (!netdev)
1516                 return -EINVAL;
1517
1518         return (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1519                 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
1520 }
1521
1522 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
1523                              void *type_data)
1524 {
1525         if (type != TC_SETUP_QDISC_MQPRIO)
1526                 return -EOPNOTSUPP;
1527
1528         return hns3_setup_tc(dev, type_data);
1529 }
1530
1531 static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1532                                 __be16 proto, u16 vid)
1533 {
1534         struct hnae3_handle *h = hns3_get_handle(netdev);
1535         struct hns3_nic_priv *priv = netdev_priv(netdev);
1536         int ret = -EIO;
1537
1538         if (h->ae_algo->ops->set_vlan_filter)
1539                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1540
1541         if (!ret)
1542                 set_bit(vid, priv->active_vlans);
1543
1544         return ret;
1545 }
1546
1547 static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1548                                  __be16 proto, u16 vid)
1549 {
1550         struct hnae3_handle *h = hns3_get_handle(netdev);
1551         struct hns3_nic_priv *priv = netdev_priv(netdev);
1552         int ret = -EIO;
1553
1554         if (h->ae_algo->ops->set_vlan_filter)
1555                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1556
1557         if (!ret)
1558                 clear_bit(vid, priv->active_vlans);
1559
1560         return ret;
1561 }
1562
1563 static int hns3_restore_vlan(struct net_device *netdev)
1564 {
1565         struct hns3_nic_priv *priv = netdev_priv(netdev);
1566         int ret = 0;
1567         u16 vid;
1568
1569         for_each_set_bit(vid, priv->active_vlans, VLAN_N_VID) {
1570                 ret = hns3_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
1571                 if (ret) {
1572                         netdev_err(netdev, "Restore vlan: %d filter, ret:%d\n",
1573                                    vid, ret);
1574                         return ret;
1575                 }
1576         }
1577
1578         return ret;
1579 }
1580
1581 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1582                                 u8 qos, __be16 vlan_proto)
1583 {
1584         struct hnae3_handle *h = hns3_get_handle(netdev);
1585         int ret = -EIO;
1586
1587         if (h->ae_algo->ops->set_vf_vlan_filter)
1588                 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1589                                                    qos, vlan_proto);
1590
1591         return ret;
1592 }
1593
1594 static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1595 {
1596         struct hnae3_handle *h = hns3_get_handle(netdev);
1597         int ret;
1598
1599         if (hns3_nic_resetting(netdev))
1600                 return -EBUSY;
1601
1602         if (!h->ae_algo->ops->set_mtu)
1603                 return -EOPNOTSUPP;
1604
1605         ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1606         if (ret)
1607                 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1608                            ret);
1609         else
1610                 netdev->mtu = new_mtu;
1611
1612         return ret;
1613 }
1614
1615 static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1616 {
1617         struct hns3_nic_priv *priv = netdev_priv(ndev);
1618         struct hnae3_handle *h = hns3_get_handle(ndev);
1619         struct hns3_enet_ring *tx_ring = NULL;
1620         struct napi_struct *napi;
1621         int timeout_queue = 0;
1622         int hw_head, hw_tail;
1623         int fbd_num, fbd_oft;
1624         int ebd_num, ebd_oft;
1625         int bd_num, bd_err;
1626         int ring_en, tc;
1627         int i;
1628
1629         /* Find the stopped queue the same way the stack does */
1630         for (i = 0; i < ndev->num_tx_queues; i++) {
1631                 struct netdev_queue *q;
1632                 unsigned long trans_start;
1633
1634                 q = netdev_get_tx_queue(ndev, i);
1635                 trans_start = q->trans_start;
1636                 if (netif_xmit_stopped(q) &&
1637                     time_after(jiffies,
1638                                (trans_start + ndev->watchdog_timeo))) {
1639                         timeout_queue = i;
1640                         break;
1641                 }
1642         }
1643
1644         if (i == ndev->num_tx_queues) {
1645                 netdev_info(ndev,
1646                             "no netdev TX timeout queue found, timeout count: %llu\n",
1647                             priv->tx_timeout_count);
1648                 return false;
1649         }
1650
1651         priv->tx_timeout_count++;
1652
1653         tx_ring = priv->ring_data[timeout_queue].ring;
1654         napi = &tx_ring->tqp_vector->napi;
1655
1656         netdev_info(ndev,
1657                     "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, napi state: %lu\n",
1658                     priv->tx_timeout_count, timeout_queue, tx_ring->next_to_use,
1659                     tx_ring->next_to_clean, napi->state);
1660
1661         netdev_info(ndev,
1662                     "tx_pkts: %llu, tx_bytes: %llu, io_err_cnt: %llu, sw_err_cnt: %llu\n",
1663                     tx_ring->stats.tx_pkts, tx_ring->stats.tx_bytes,
1664                     tx_ring->stats.io_err_cnt, tx_ring->stats.sw_err_cnt);
1665
1666         netdev_info(ndev,
1667                     "seg_pkt_cnt: %llu, tx_err_cnt: %llu, restart_queue: %llu, tx_busy: %llu\n",
1668                     tx_ring->stats.seg_pkt_cnt, tx_ring->stats.tx_err_cnt,
1669                     tx_ring->stats.restart_queue, tx_ring->stats.tx_busy);
1670
1671         /* When mac received many pause frames continuous, it's unable to send
1672          * packets, which may cause tx timeout
1673          */
1674         if (h->ae_algo->ops->update_stats &&
1675             h->ae_algo->ops->get_mac_pause_stats) {
1676                 u64 tx_pause_cnt, rx_pause_cnt;
1677
1678                 h->ae_algo->ops->update_stats(h, &ndev->stats);
1679                 h->ae_algo->ops->get_mac_pause_stats(h, &tx_pause_cnt,
1680                                                      &rx_pause_cnt);
1681                 netdev_info(ndev, "tx_pause_cnt: %llu, rx_pause_cnt: %llu\n",
1682                             tx_pause_cnt, rx_pause_cnt);
1683         }
1684
1685         hw_head = readl_relaxed(tx_ring->tqp->io_base +
1686                                 HNS3_RING_TX_RING_HEAD_REG);
1687         hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1688                                 HNS3_RING_TX_RING_TAIL_REG);
1689         fbd_num = readl_relaxed(tx_ring->tqp->io_base +
1690                                 HNS3_RING_TX_RING_FBDNUM_REG);
1691         fbd_oft = readl_relaxed(tx_ring->tqp->io_base +
1692                                 HNS3_RING_TX_RING_OFFSET_REG);
1693         ebd_num = readl_relaxed(tx_ring->tqp->io_base +
1694                                 HNS3_RING_TX_RING_EBDNUM_REG);
1695         ebd_oft = readl_relaxed(tx_ring->tqp->io_base +
1696                                 HNS3_RING_TX_RING_EBD_OFFSET_REG);
1697         bd_num = readl_relaxed(tx_ring->tqp->io_base +
1698                                HNS3_RING_TX_RING_BD_NUM_REG);
1699         bd_err = readl_relaxed(tx_ring->tqp->io_base +
1700                                HNS3_RING_TX_RING_BD_ERR_REG);
1701         ring_en = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_EN_REG);
1702         tc = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_TX_RING_TC_REG);
1703
1704         netdev_info(ndev,
1705                     "BD_NUM: 0x%x HW_HEAD: 0x%x, HW_TAIL: 0x%x, BD_ERR: 0x%x, INT: 0x%x\n",
1706                     bd_num, hw_head, hw_tail, bd_err,
1707                     readl(tx_ring->tqp_vector->mask_addr));
1708         netdev_info(ndev,
1709                     "RING_EN: 0x%x, TC: 0x%x, FBD_NUM: 0x%x FBD_OFT: 0x%x, EBD_NUM: 0x%x, EBD_OFT: 0x%x\n",
1710                     ring_en, tc, fbd_num, fbd_oft, ebd_num, ebd_oft);
1711
1712         return true;
1713 }
1714
1715 static void hns3_nic_net_timeout(struct net_device *ndev)
1716 {
1717         struct hns3_nic_priv *priv = netdev_priv(ndev);
1718         struct hnae3_handle *h = priv->ae_handle;
1719
1720         if (!hns3_get_tx_timeo_queue_info(ndev))
1721                 return;
1722
1723         /* request the reset, and let the hclge to determine
1724          * which reset level should be done
1725          */
1726         if (h->ae_algo->ops->reset_event)
1727                 h->ae_algo->ops->reset_event(h->pdev, h);
1728 }
1729
1730 static const struct net_device_ops hns3_nic_netdev_ops = {
1731         .ndo_open               = hns3_nic_net_open,
1732         .ndo_stop               = hns3_nic_net_stop,
1733         .ndo_start_xmit         = hns3_nic_net_xmit,
1734         .ndo_tx_timeout         = hns3_nic_net_timeout,
1735         .ndo_set_mac_address    = hns3_nic_net_set_mac_address,
1736         .ndo_do_ioctl           = hns3_nic_do_ioctl,
1737         .ndo_change_mtu         = hns3_nic_change_mtu,
1738         .ndo_set_features       = hns3_nic_set_features,
1739         .ndo_get_stats64        = hns3_nic_get_stats64,
1740         .ndo_setup_tc           = hns3_nic_setup_tc,
1741         .ndo_set_rx_mode        = hns3_nic_set_rx_mode,
1742         .ndo_vlan_rx_add_vid    = hns3_vlan_rx_add_vid,
1743         .ndo_vlan_rx_kill_vid   = hns3_vlan_rx_kill_vid,
1744         .ndo_set_vf_vlan        = hns3_ndo_set_vf_vlan,
1745 };
1746
1747 bool hns3_is_phys_func(struct pci_dev *pdev)
1748 {
1749         u32 dev_id = pdev->device;
1750
1751         switch (dev_id) {
1752         case HNAE3_DEV_ID_GE:
1753         case HNAE3_DEV_ID_25GE:
1754         case HNAE3_DEV_ID_25GE_RDMA:
1755         case HNAE3_DEV_ID_25GE_RDMA_MACSEC:
1756         case HNAE3_DEV_ID_50GE_RDMA:
1757         case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
1758         case HNAE3_DEV_ID_100G_RDMA_MACSEC:
1759                 return true;
1760         case HNAE3_DEV_ID_100G_VF:
1761         case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF:
1762                 return false;
1763         default:
1764                 dev_warn(&pdev->dev, "un-recognized pci device-id %d",
1765                          dev_id);
1766         }
1767
1768         return false;
1769 }
1770
1771 static void hns3_disable_sriov(struct pci_dev *pdev)
1772 {
1773         /* If our VFs are assigned we cannot shut down SR-IOV
1774          * without causing issues, so just leave the hardware
1775          * available but disabled
1776          */
1777         if (pci_vfs_assigned(pdev)) {
1778                 dev_warn(&pdev->dev,
1779                          "disabling driver while VFs are assigned\n");
1780                 return;
1781         }
1782
1783         pci_disable_sriov(pdev);
1784 }
1785
1786 static void hns3_get_dev_capability(struct pci_dev *pdev,
1787                                     struct hnae3_ae_dev *ae_dev)
1788 {
1789         if (pdev->revision >= 0x21) {
1790                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B, 1);
1791                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B, 1);
1792         }
1793 }
1794
1795 /* hns3_probe - Device initialization routine
1796  * @pdev: PCI device information struct
1797  * @ent: entry in hns3_pci_tbl
1798  *
1799  * hns3_probe initializes a PF identified by a pci_dev structure.
1800  * The OS initialization, configuring of the PF private structure,
1801  * and a hardware reset occur.
1802  *
1803  * Returns 0 on success, negative on failure
1804  */
1805 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1806 {
1807         struct hnae3_ae_dev *ae_dev;
1808         int ret;
1809
1810         ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev),
1811                               GFP_KERNEL);
1812         if (!ae_dev) {
1813                 ret = -ENOMEM;
1814                 return ret;
1815         }
1816
1817         ae_dev->pdev = pdev;
1818         ae_dev->flag = ent->driver_data;
1819         ae_dev->dev_type = HNAE3_DEV_KNIC;
1820         ae_dev->reset_type = HNAE3_NONE_RESET;
1821         hns3_get_dev_capability(pdev, ae_dev);
1822         pci_set_drvdata(pdev, ae_dev);
1823
1824         ret = hnae3_register_ae_dev(ae_dev);
1825         if (ret) {
1826                 devm_kfree(&pdev->dev, ae_dev);
1827                 pci_set_drvdata(pdev, NULL);
1828         }
1829
1830         return ret;
1831 }
1832
1833 /* hns3_remove - Device removal routine
1834  * @pdev: PCI device information struct
1835  */
1836 static void hns3_remove(struct pci_dev *pdev)
1837 {
1838         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1839
1840         if (hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))
1841                 hns3_disable_sriov(pdev);
1842
1843         hnae3_unregister_ae_dev(ae_dev);
1844         pci_set_drvdata(pdev, NULL);
1845 }
1846
1847 /**
1848  * hns3_pci_sriov_configure
1849  * @pdev: pointer to a pci_dev structure
1850  * @num_vfs: number of VFs to allocate
1851  *
1852  * Enable or change the number of VFs. Called when the user updates the number
1853  * of VFs in sysfs.
1854  **/
1855 static int hns3_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1856 {
1857         int ret;
1858
1859         if (!(hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))) {
1860                 dev_warn(&pdev->dev, "Can not config SRIOV\n");
1861                 return -EINVAL;
1862         }
1863
1864         if (num_vfs) {
1865                 ret = pci_enable_sriov(pdev, num_vfs);
1866                 if (ret)
1867                         dev_err(&pdev->dev, "SRIOV enable failed %d\n", ret);
1868                 else
1869                         return num_vfs;
1870         } else if (!pci_vfs_assigned(pdev)) {
1871                 pci_disable_sriov(pdev);
1872         } else {
1873                 dev_warn(&pdev->dev,
1874                          "Unable to free VFs because some are assigned to VMs.\n");
1875         }
1876
1877         return 0;
1878 }
1879
1880 static void hns3_shutdown(struct pci_dev *pdev)
1881 {
1882         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1883
1884         hnae3_unregister_ae_dev(ae_dev);
1885         devm_kfree(&pdev->dev, ae_dev);
1886         pci_set_drvdata(pdev, NULL);
1887
1888         if (system_state == SYSTEM_POWER_OFF)
1889                 pci_set_power_state(pdev, PCI_D3hot);
1890 }
1891
1892 static pci_ers_result_t hns3_error_detected(struct pci_dev *pdev,
1893                                             pci_channel_state_t state)
1894 {
1895         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1896         pci_ers_result_t ret;
1897
1898         dev_info(&pdev->dev, "PCI error detected, state(=%d)!!\n", state);
1899
1900         if (state == pci_channel_io_perm_failure)
1901                 return PCI_ERS_RESULT_DISCONNECT;
1902
1903         if (!ae_dev) {
1904                 dev_err(&pdev->dev,
1905                         "Can't recover - error happened during device init\n");
1906                 return PCI_ERS_RESULT_NONE;
1907         }
1908
1909         if (ae_dev->ops->handle_hw_ras_error)
1910                 ret = ae_dev->ops->handle_hw_ras_error(ae_dev);
1911         else
1912                 return PCI_ERS_RESULT_NONE;
1913
1914         return ret;
1915 }
1916
1917 static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev)
1918 {
1919         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1920         struct device *dev = &pdev->dev;
1921
1922         dev_info(dev, "requesting reset due to PCI error\n");
1923
1924         /* request the reset */
1925         if (ae_dev->ops->reset_event) {
1926                 if (!ae_dev->override_pci_need_reset)
1927                         ae_dev->ops->reset_event(pdev, NULL);
1928
1929                 return PCI_ERS_RESULT_RECOVERED;
1930         }
1931
1932         return PCI_ERS_RESULT_DISCONNECT;
1933 }
1934
1935 static void hns3_reset_prepare(struct pci_dev *pdev)
1936 {
1937         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1938
1939         dev_info(&pdev->dev, "hns3 flr prepare\n");
1940         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_prepare)
1941                 ae_dev->ops->flr_prepare(ae_dev);
1942 }
1943
1944 static void hns3_reset_done(struct pci_dev *pdev)
1945 {
1946         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1947
1948         dev_info(&pdev->dev, "hns3 flr done\n");
1949         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_done)
1950                 ae_dev->ops->flr_done(ae_dev);
1951 }
1952
1953 static const struct pci_error_handlers hns3_err_handler = {
1954         .error_detected = hns3_error_detected,
1955         .slot_reset     = hns3_slot_reset,
1956         .reset_prepare  = hns3_reset_prepare,
1957         .reset_done     = hns3_reset_done,
1958 };
1959
1960 static struct pci_driver hns3_driver = {
1961         .name     = hns3_driver_name,
1962         .id_table = hns3_pci_tbl,
1963         .probe    = hns3_probe,
1964         .remove   = hns3_remove,
1965         .shutdown = hns3_shutdown,
1966         .sriov_configure = hns3_pci_sriov_configure,
1967         .err_handler    = &hns3_err_handler,
1968 };
1969
1970 /* set default feature to hns3 */
1971 static void hns3_set_default_feature(struct net_device *netdev)
1972 {
1973         struct hnae3_handle *h = hns3_get_handle(netdev);
1974         struct pci_dev *pdev = h->pdev;
1975
1976         netdev->priv_flags |= IFF_UNICAST_FLT;
1977
1978         netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1979                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1980                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1981                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1982                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
1983
1984         netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
1985
1986         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
1987
1988         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1989                 NETIF_F_HW_VLAN_CTAG_FILTER |
1990                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
1991                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1992                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1993                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1994                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
1995
1996         netdev->vlan_features |=
1997                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
1998                 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
1999                 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2000                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2001                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2002
2003         netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2004                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2005                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2006                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2007                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2008                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2009
2010         if (pdev->revision >= 0x21) {
2011                 netdev->hw_features |= NETIF_F_GRO_HW;
2012                 netdev->features |= NETIF_F_GRO_HW;
2013
2014                 if (!(h->flags & HNAE3_SUPPORT_VF)) {
2015                         netdev->hw_features |= NETIF_F_NTUPLE;
2016                         netdev->features |= NETIF_F_NTUPLE;
2017                 }
2018         }
2019 }
2020
2021 static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
2022                              struct hns3_desc_cb *cb)
2023 {
2024         unsigned int order = hnae3_page_order(ring);
2025         struct page *p;
2026
2027         p = dev_alloc_pages(order);
2028         if (!p)
2029                 return -ENOMEM;
2030
2031         cb->priv = p;
2032         cb->page_offset = 0;
2033         cb->reuse_flag = 0;
2034         cb->buf  = page_address(p);
2035         cb->length = hnae3_page_size(ring);
2036         cb->type = DESC_TYPE_PAGE;
2037
2038         return 0;
2039 }
2040
2041 static void hns3_free_buffer(struct hns3_enet_ring *ring,
2042                              struct hns3_desc_cb *cb)
2043 {
2044         if (cb->type == DESC_TYPE_SKB)
2045                 dev_kfree_skb_any((struct sk_buff *)cb->priv);
2046         else if (!HNAE3_IS_TX_RING(ring))
2047                 put_page((struct page *)cb->priv);
2048         memset(cb, 0, sizeof(*cb));
2049 }
2050
2051 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
2052 {
2053         cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
2054                                cb->length, ring_to_dma_dir(ring));
2055
2056         if (unlikely(dma_mapping_error(ring_to_dev(ring), cb->dma)))
2057                 return -EIO;
2058
2059         return 0;
2060 }
2061
2062 static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
2063                               struct hns3_desc_cb *cb)
2064 {
2065         if (cb->type == DESC_TYPE_SKB)
2066                 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
2067                                  ring_to_dma_dir(ring));
2068         else if (cb->length)
2069                 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
2070                                ring_to_dma_dir(ring));
2071 }
2072
2073 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
2074 {
2075         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2076         ring->desc[i].addr = 0;
2077 }
2078
2079 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
2080 {
2081         struct hns3_desc_cb *cb = &ring->desc_cb[i];
2082
2083         if (!ring->desc_cb[i].dma)
2084                 return;
2085
2086         hns3_buffer_detach(ring, i);
2087         hns3_free_buffer(ring, cb);
2088 }
2089
2090 static void hns3_free_buffers(struct hns3_enet_ring *ring)
2091 {
2092         int i;
2093
2094         for (i = 0; i < ring->desc_num; i++)
2095                 hns3_free_buffer_detach(ring, i);
2096 }
2097
2098 /* free desc along with its attached buffer */
2099 static void hns3_free_desc(struct hns3_enet_ring *ring)
2100 {
2101         int size = ring->desc_num * sizeof(ring->desc[0]);
2102
2103         hns3_free_buffers(ring);
2104
2105         if (ring->desc) {
2106                 dma_free_coherent(ring_to_dev(ring), size,
2107                                   ring->desc, ring->desc_dma_addr);
2108                 ring->desc = NULL;
2109         }
2110 }
2111
2112 static int hns3_alloc_desc(struct hns3_enet_ring *ring)
2113 {
2114         int size = ring->desc_num * sizeof(ring->desc[0]);
2115
2116         ring->desc = dma_alloc_coherent(ring_to_dev(ring), size,
2117                                         &ring->desc_dma_addr, GFP_KERNEL);
2118         if (!ring->desc)
2119                 return -ENOMEM;
2120
2121         return 0;
2122 }
2123
2124 static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
2125                                    struct hns3_desc_cb *cb)
2126 {
2127         int ret;
2128
2129         ret = hns3_alloc_buffer(ring, cb);
2130         if (ret)
2131                 goto out;
2132
2133         ret = hns3_map_buffer(ring, cb);
2134         if (ret)
2135                 goto out_with_buf;
2136
2137         return 0;
2138
2139 out_with_buf:
2140         hns3_free_buffer(ring, cb);
2141 out:
2142         return ret;
2143 }
2144
2145 static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
2146 {
2147         int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
2148
2149         if (ret)
2150                 return ret;
2151
2152         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2153
2154         return 0;
2155 }
2156
2157 /* Allocate memory for raw pkg, and map with dma */
2158 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
2159 {
2160         int i, j, ret;
2161
2162         for (i = 0; i < ring->desc_num; i++) {
2163                 ret = hns3_alloc_buffer_attach(ring, i);
2164                 if (ret)
2165                         goto out_buffer_fail;
2166         }
2167
2168         return 0;
2169
2170 out_buffer_fail:
2171         for (j = i - 1; j >= 0; j--)
2172                 hns3_free_buffer_detach(ring, j);
2173         return ret;
2174 }
2175
2176 /* detach a in-used buffer and replace with a reserved one  */
2177 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
2178                                 struct hns3_desc_cb *res_cb)
2179 {
2180         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2181         ring->desc_cb[i] = *res_cb;
2182         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2183         ring->desc[i].rx.bd_base_info = 0;
2184 }
2185
2186 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
2187 {
2188         ring->desc_cb[i].reuse_flag = 0;
2189         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
2190                 + ring->desc_cb[i].page_offset);
2191         ring->desc[i].rx.bd_base_info = 0;
2192 }
2193
2194 static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring *ring, int *bytes,
2195                                       int *pkts)
2196 {
2197         int ntc = ring->next_to_clean;
2198         struct hns3_desc_cb *desc_cb;
2199
2200         desc_cb = &ring->desc_cb[ntc];
2201         (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
2202         (*bytes) += desc_cb->length;
2203         /* desc_cb will be cleaned, after hnae3_free_buffer_detach*/
2204         hns3_free_buffer_detach(ring, ntc);
2205
2206         if (++ntc == ring->desc_num)
2207                 ntc = 0;
2208
2209         /* This smp_store_release() pairs with smp_load_acquire() in
2210          * ring_space called by hns3_nic_net_xmit.
2211          */
2212         smp_store_release(&ring->next_to_clean, ntc);
2213 }
2214
2215 static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
2216 {
2217         int u = ring->next_to_use;
2218         int c = ring->next_to_clean;
2219
2220         if (unlikely(h > ring->desc_num))
2221                 return 0;
2222
2223         return u > c ? (h > c && h <= u) : (h > c || h <= u);
2224 }
2225
2226 void hns3_clean_tx_ring(struct hns3_enet_ring *ring)
2227 {
2228         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2229         struct hns3_nic_priv *priv = netdev_priv(netdev);
2230         struct netdev_queue *dev_queue;
2231         int bytes, pkts;
2232         int head;
2233
2234         head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
2235         rmb(); /* Make sure head is ready before touch any data */
2236
2237         if (is_ring_empty(ring) || head == ring->next_to_clean)
2238                 return; /* no data to poll */
2239
2240         if (unlikely(!is_valid_clean_head(ring, head))) {
2241                 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
2242                            ring->next_to_use, ring->next_to_clean);
2243
2244                 u64_stats_update_begin(&ring->syncp);
2245                 ring->stats.io_err_cnt++;
2246                 u64_stats_update_end(&ring->syncp);
2247                 return;
2248         }
2249
2250         bytes = 0;
2251         pkts = 0;
2252         while (head != ring->next_to_clean) {
2253                 hns3_nic_reclaim_one_desc(ring, &bytes, &pkts);
2254                 /* Issue prefetch for next Tx descriptor */
2255                 prefetch(&ring->desc_cb[ring->next_to_clean]);
2256         }
2257
2258         ring->tqp_vector->tx_group.total_bytes += bytes;
2259         ring->tqp_vector->tx_group.total_packets += pkts;
2260
2261         u64_stats_update_begin(&ring->syncp);
2262         ring->stats.tx_bytes += bytes;
2263         ring->stats.tx_pkts += pkts;
2264         u64_stats_update_end(&ring->syncp);
2265
2266         dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
2267         netdev_tx_completed_queue(dev_queue, pkts, bytes);
2268
2269         if (unlikely(pkts && netif_carrier_ok(netdev) &&
2270                      (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
2271                 /* Make sure that anybody stopping the queue after this
2272                  * sees the new next_to_clean.
2273                  */
2274                 smp_mb();
2275                 if (netif_tx_queue_stopped(dev_queue) &&
2276                     !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
2277                         netif_tx_wake_queue(dev_queue);
2278                         ring->stats.restart_queue++;
2279                 }
2280         }
2281 }
2282
2283 static int hns3_desc_unused(struct hns3_enet_ring *ring)
2284 {
2285         int ntc = ring->next_to_clean;
2286         int ntu = ring->next_to_use;
2287
2288         return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
2289 }
2290
2291 static void
2292 hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring, int cleand_count)
2293 {
2294         struct hns3_desc_cb *desc_cb;
2295         struct hns3_desc_cb res_cbs;
2296         int i, ret;
2297
2298         for (i = 0; i < cleand_count; i++) {
2299                 desc_cb = &ring->desc_cb[ring->next_to_use];
2300                 if (desc_cb->reuse_flag) {
2301                         u64_stats_update_begin(&ring->syncp);
2302                         ring->stats.reuse_pg_cnt++;
2303                         u64_stats_update_end(&ring->syncp);
2304
2305                         hns3_reuse_buffer(ring, ring->next_to_use);
2306                 } else {
2307                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
2308                         if (ret) {
2309                                 u64_stats_update_begin(&ring->syncp);
2310                                 ring->stats.sw_err_cnt++;
2311                                 u64_stats_update_end(&ring->syncp);
2312
2313                                 netdev_err(ring->tqp->handle->kinfo.netdev,
2314                                            "hnae reserve buffer map failed.\n");
2315                                 break;
2316                         }
2317                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
2318
2319                         u64_stats_update_begin(&ring->syncp);
2320                         ring->stats.non_reuse_pg++;
2321                         u64_stats_update_end(&ring->syncp);
2322                 }
2323
2324                 ring_ptr_move_fw(ring, next_to_use);
2325         }
2326
2327         wmb(); /* Make all data has been write before submit */
2328         writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
2329 }
2330
2331 static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2332                                 struct hns3_enet_ring *ring, int pull_len,
2333                                 struct hns3_desc_cb *desc_cb)
2334 {
2335         struct hns3_desc *desc;
2336         u32 truesize;
2337         int size;
2338         int last_offset;
2339         bool twobufs;
2340
2341         twobufs = ((PAGE_SIZE < 8192) &&
2342                 hnae3_buf_size(ring) == HNS3_BUFFER_SIZE_2048);
2343
2344         desc = &ring->desc[ring->next_to_clean];
2345         size = le16_to_cpu(desc->rx.size);
2346
2347         truesize = hnae3_buf_size(ring);
2348
2349         if (!twobufs)
2350                 last_offset = hnae3_page_size(ring) - hnae3_buf_size(ring);
2351
2352         skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2353                         size - pull_len, truesize);
2354
2355          /* Avoid re-using remote pages,flag default unreuse */
2356         if (unlikely(page_to_nid(desc_cb->priv) != numa_node_id()))
2357                 return;
2358
2359         if (twobufs) {
2360                 /* If we are only owner of page we can reuse it */
2361                 if (likely(page_count(desc_cb->priv) == 1)) {
2362                         /* Flip page offset to other buffer */
2363                         desc_cb->page_offset ^= truesize;
2364
2365                         desc_cb->reuse_flag = 1;
2366                         /* bump ref count on page before it is given*/
2367                         get_page(desc_cb->priv);
2368                 }
2369                 return;
2370         }
2371
2372         /* Move offset up to the next cache line */
2373         desc_cb->page_offset += truesize;
2374
2375         if (desc_cb->page_offset <= last_offset) {
2376                 desc_cb->reuse_flag = 1;
2377                 /* Bump ref count on page before it is given*/
2378                 get_page(desc_cb->priv);
2379         }
2380 }
2381
2382 static int hns3_gro_complete(struct sk_buff *skb)
2383 {
2384         __be16 type = skb->protocol;
2385         struct tcphdr *th;
2386         int depth = 0;
2387
2388         while (type == htons(ETH_P_8021Q)) {
2389                 struct vlan_hdr *vh;
2390
2391                 if ((depth + VLAN_HLEN) > skb_headlen(skb))
2392                         return -EFAULT;
2393
2394                 vh = (struct vlan_hdr *)(skb->data + depth);
2395                 type = vh->h_vlan_encapsulated_proto;
2396                 depth += VLAN_HLEN;
2397         }
2398
2399         if (type == htons(ETH_P_IP)) {
2400                 depth += sizeof(struct iphdr);
2401         } else if (type == htons(ETH_P_IPV6)) {
2402                 depth += sizeof(struct ipv6hdr);
2403         } else {
2404                 netdev_err(skb->dev,
2405                            "Error: FW GRO supports only IPv4/IPv6, not 0x%04x, depth: %d\n",
2406                            be16_to_cpu(type), depth);
2407                 return -EFAULT;
2408         }
2409
2410         th = (struct tcphdr *)(skb->data + depth);
2411         skb_shinfo(skb)->gso_segs = NAPI_GRO_CB(skb)->count;
2412         if (th->cwr)
2413                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_ECN;
2414
2415         skb->ip_summed = CHECKSUM_UNNECESSARY;
2416
2417         return 0;
2418 }
2419
2420 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2421                              u32 l234info, u32 bd_base_info)
2422 {
2423         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2424         int l3_type, l4_type;
2425         int ol4_type;
2426
2427         skb->ip_summed = CHECKSUM_NONE;
2428
2429         skb_checksum_none_assert(skb);
2430
2431         if (!(netdev->features & NETIF_F_RXCSUM))
2432                 return;
2433
2434         /* check if hardware has done checksum */
2435         if (!(bd_base_info & BIT(HNS3_RXD_L3L4P_B)))
2436                 return;
2437
2438         if (unlikely(l234info & (BIT(HNS3_RXD_L3E_B) | BIT(HNS3_RXD_L4E_B) |
2439                                  BIT(HNS3_RXD_OL3E_B) |
2440                                  BIT(HNS3_RXD_OL4E_B)))) {
2441                 u64_stats_update_begin(&ring->syncp);
2442                 ring->stats.l3l4_csum_err++;
2443                 u64_stats_update_end(&ring->syncp);
2444
2445                 return;
2446         }
2447
2448         ol4_type = hnae3_get_field(l234info, HNS3_RXD_OL4ID_M,
2449                                    HNS3_RXD_OL4ID_S);
2450         switch (ol4_type) {
2451         case HNS3_OL4_TYPE_MAC_IN_UDP:
2452         case HNS3_OL4_TYPE_NVGRE:
2453                 skb->csum_level = 1;
2454                 /* fall through */
2455         case HNS3_OL4_TYPE_NO_TUN:
2456                 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2457                                           HNS3_RXD_L3ID_S);
2458                 l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
2459                                           HNS3_RXD_L4ID_S);
2460
2461                 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2462                 if ((l3_type == HNS3_L3_TYPE_IPV4 ||
2463                      l3_type == HNS3_L3_TYPE_IPV6) &&
2464                     (l4_type == HNS3_L4_TYPE_UDP ||
2465                      l4_type == HNS3_L4_TYPE_TCP ||
2466                      l4_type == HNS3_L4_TYPE_SCTP))
2467                         skb->ip_summed = CHECKSUM_UNNECESSARY;
2468                 break;
2469         default:
2470                 break;
2471         }
2472 }
2473
2474 static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2475 {
2476         if (skb_has_frag_list(skb))
2477                 napi_gro_flush(&ring->tqp_vector->napi, false);
2478
2479         napi_gro_receive(&ring->tqp_vector->napi, skb);
2480 }
2481
2482 static bool hns3_parse_vlan_tag(struct hns3_enet_ring *ring,
2483                                 struct hns3_desc *desc, u32 l234info,
2484                                 u16 *vlan_tag)
2485 {
2486         struct hnae3_handle *handle = ring->tqp->handle;
2487         struct pci_dev *pdev = ring->tqp->handle->pdev;
2488
2489         if (pdev->revision == 0x20) {
2490                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2491                 if (!(*vlan_tag & VLAN_VID_MASK))
2492                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2493
2494                 return (*vlan_tag != 0);
2495         }
2496
2497 #define HNS3_STRP_OUTER_VLAN    0x1
2498 #define HNS3_STRP_INNER_VLAN    0x2
2499 #define HNS3_STRP_BOTH          0x3
2500
2501         /* Hardware always insert VLAN tag into RX descriptor when
2502          * remove the tag from packet, driver needs to determine
2503          * reporting which tag to stack.
2504          */
2505         switch (hnae3_get_field(l234info, HNS3_RXD_STRP_TAGP_M,
2506                                 HNS3_RXD_STRP_TAGP_S)) {
2507         case HNS3_STRP_OUTER_VLAN:
2508                 if (handle->port_base_vlan_state !=
2509                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2510                         return false;
2511
2512                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2513                 return true;
2514         case HNS3_STRP_INNER_VLAN:
2515                 if (handle->port_base_vlan_state !=
2516                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2517                         return false;
2518
2519                 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2520                 return true;
2521         case HNS3_STRP_BOTH:
2522                 if (handle->port_base_vlan_state ==
2523                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2524                         *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2525                 else
2526                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2527
2528                 return true;
2529         default:
2530                 return false;
2531         }
2532 }
2533
2534 static int hns3_alloc_skb(struct hns3_enet_ring *ring, int length,
2535                           unsigned char *va)
2536 {
2537 #define HNS3_NEED_ADD_FRAG      1
2538         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
2539         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2540         struct sk_buff *skb;
2541
2542         ring->skb = napi_alloc_skb(&ring->tqp_vector->napi, HNS3_RX_HEAD_SIZE);
2543         skb = ring->skb;
2544         if (unlikely(!skb)) {
2545                 netdev_err(netdev, "alloc rx skb fail\n");
2546
2547                 u64_stats_update_begin(&ring->syncp);
2548                 ring->stats.sw_err_cnt++;
2549                 u64_stats_update_end(&ring->syncp);
2550
2551                 return -ENOMEM;
2552         }
2553
2554         prefetchw(skb->data);
2555
2556         ring->pending_buf = 1;
2557         ring->frag_num = 0;
2558         ring->tail_skb = NULL;
2559         if (length <= HNS3_RX_HEAD_SIZE) {
2560                 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2561
2562                 /* We can reuse buffer as-is, just make sure it is local */
2563                 if (likely(page_to_nid(desc_cb->priv) == numa_node_id()))
2564                         desc_cb->reuse_flag = 1;
2565                 else /* This page cannot be reused so discard it */
2566                         put_page(desc_cb->priv);
2567
2568                 ring_ptr_move_fw(ring, next_to_clean);
2569                 return 0;
2570         }
2571         u64_stats_update_begin(&ring->syncp);
2572         ring->stats.seg_pkt_cnt++;
2573         u64_stats_update_end(&ring->syncp);
2574
2575         ring->pull_len = eth_get_headlen(netdev, va, HNS3_RX_HEAD_SIZE);
2576         __skb_put(skb, ring->pull_len);
2577         hns3_nic_reuse_page(skb, ring->frag_num++, ring, ring->pull_len,
2578                             desc_cb);
2579         ring_ptr_move_fw(ring, next_to_clean);
2580
2581         return HNS3_NEED_ADD_FRAG;
2582 }
2583
2584 static int hns3_add_frag(struct hns3_enet_ring *ring, struct hns3_desc *desc,
2585                          struct sk_buff **out_skb, bool pending)
2586 {
2587         struct sk_buff *skb = *out_skb;
2588         struct sk_buff *head_skb = *out_skb;
2589         struct sk_buff *new_skb;
2590         struct hns3_desc_cb *desc_cb;
2591         struct hns3_desc *pre_desc;
2592         u32 bd_base_info;
2593         int pre_bd;
2594
2595         /* if there is pending bd, the SW param next_to_clean has moved
2596          * to next and the next is NULL
2597          */
2598         if (pending) {
2599                 pre_bd = (ring->next_to_clean - 1 + ring->desc_num) %
2600                         ring->desc_num;
2601                 pre_desc = &ring->desc[pre_bd];
2602                 bd_base_info = le32_to_cpu(pre_desc->rx.bd_base_info);
2603         } else {
2604                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2605         }
2606
2607         while (!(bd_base_info & BIT(HNS3_RXD_FE_B))) {
2608                 desc = &ring->desc[ring->next_to_clean];
2609                 desc_cb = &ring->desc_cb[ring->next_to_clean];
2610                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2611                 /* make sure HW write desc complete */
2612                 dma_rmb();
2613                 if (!(bd_base_info & BIT(HNS3_RXD_VLD_B)))
2614                         return -ENXIO;
2615
2616                 if (unlikely(ring->frag_num >= MAX_SKB_FRAGS)) {
2617                         new_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2618                                                  HNS3_RX_HEAD_SIZE);
2619                         if (unlikely(!new_skb)) {
2620                                 netdev_err(ring->tqp->handle->kinfo.netdev,
2621                                            "alloc rx skb frag fail\n");
2622                                 return -ENXIO;
2623                         }
2624                         ring->frag_num = 0;
2625
2626                         if (ring->tail_skb) {
2627                                 ring->tail_skb->next = new_skb;
2628                                 ring->tail_skb = new_skb;
2629                         } else {
2630                                 skb_shinfo(skb)->frag_list = new_skb;
2631                                 ring->tail_skb = new_skb;
2632                         }
2633                 }
2634
2635                 if (ring->tail_skb) {
2636                         head_skb->truesize += hnae3_buf_size(ring);
2637                         head_skb->data_len += le16_to_cpu(desc->rx.size);
2638                         head_skb->len += le16_to_cpu(desc->rx.size);
2639                         skb = ring->tail_skb;
2640                 }
2641
2642                 hns3_nic_reuse_page(skb, ring->frag_num++, ring, 0, desc_cb);
2643                 ring_ptr_move_fw(ring, next_to_clean);
2644                 ring->pending_buf++;
2645         }
2646
2647         return 0;
2648 }
2649
2650 static int hns3_set_gro_and_checksum(struct hns3_enet_ring *ring,
2651                                      struct sk_buff *skb, u32 l234info,
2652                                      u32 bd_base_info)
2653 {
2654         u16 gro_count;
2655         u32 l3_type;
2656
2657         gro_count = hnae3_get_field(l234info, HNS3_RXD_GRO_COUNT_M,
2658                                     HNS3_RXD_GRO_COUNT_S);
2659         /* if there is no HW GRO, do not set gro params */
2660         if (!gro_count) {
2661                 hns3_rx_checksum(ring, skb, l234info, bd_base_info);
2662                 return 0;
2663         }
2664
2665         NAPI_GRO_CB(skb)->count = gro_count;
2666
2667         l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2668                                   HNS3_RXD_L3ID_S);
2669         if (l3_type == HNS3_L3_TYPE_IPV4)
2670                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
2671         else if (l3_type == HNS3_L3_TYPE_IPV6)
2672                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
2673         else
2674                 return -EFAULT;
2675
2676         skb_shinfo(skb)->gso_size = hnae3_get_field(bd_base_info,
2677                                                     HNS3_RXD_GRO_SIZE_M,
2678                                                     HNS3_RXD_GRO_SIZE_S);
2679
2680         return  hns3_gro_complete(skb);
2681 }
2682
2683 static void hns3_set_rx_skb_rss_type(struct hns3_enet_ring *ring,
2684                                      struct sk_buff *skb, u32 rss_hash)
2685 {
2686         struct hnae3_handle *handle = ring->tqp->handle;
2687         enum pkt_hash_types rss_type;
2688
2689         if (rss_hash)
2690                 rss_type = handle->kinfo.rss_type;
2691         else
2692                 rss_type = PKT_HASH_TYPE_NONE;
2693
2694         skb_set_hash(skb, rss_hash, rss_type);
2695 }
2696
2697 static int hns3_handle_bdinfo(struct hns3_enet_ring *ring, struct sk_buff *skb)
2698 {
2699         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2700         enum hns3_pkt_l2t_type l2_frame_type;
2701         u32 bd_base_info, l234info;
2702         struct hns3_desc *desc;
2703         unsigned int len;
2704         int pre_ntc, ret;
2705
2706         /* bdinfo handled below is only valid on the last BD of the
2707          * current packet, and ring->next_to_clean indicates the first
2708          * descriptor of next packet, so need - 1 below.
2709          */
2710         pre_ntc = ring->next_to_clean ? (ring->next_to_clean - 1) :
2711                                         (ring->desc_num - 1);
2712         desc = &ring->desc[pre_ntc];
2713         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2714         l234info = le32_to_cpu(desc->rx.l234_info);
2715
2716         /* Based on hw strategy, the tag offloaded will be stored at
2717          * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2718          * in one layer tag case.
2719          */
2720         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2721                 u16 vlan_tag;
2722
2723                 if (hns3_parse_vlan_tag(ring, desc, l234info, &vlan_tag))
2724                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
2725                                                vlan_tag);
2726         }
2727
2728         if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B)))) {
2729                 u64_stats_update_begin(&ring->syncp);
2730                 ring->stats.non_vld_descs++;
2731                 u64_stats_update_end(&ring->syncp);
2732
2733                 return -EINVAL;
2734         }
2735
2736         if (unlikely(!desc->rx.pkt_len || (l234info & (BIT(HNS3_RXD_TRUNCAT_B) |
2737                                   BIT(HNS3_RXD_L2E_B))))) {
2738                 u64_stats_update_begin(&ring->syncp);
2739                 if (l234info & BIT(HNS3_RXD_L2E_B))
2740                         ring->stats.l2_err++;
2741                 else
2742                         ring->stats.err_pkt_len++;
2743                 u64_stats_update_end(&ring->syncp);
2744
2745                 return -EFAULT;
2746         }
2747
2748         len = skb->len;
2749
2750         /* Do update ip stack process */
2751         skb->protocol = eth_type_trans(skb, netdev);
2752
2753         /* This is needed in order to enable forwarding support */
2754         ret = hns3_set_gro_and_checksum(ring, skb, l234info, bd_base_info);
2755         if (unlikely(ret)) {
2756                 u64_stats_update_begin(&ring->syncp);
2757                 ring->stats.rx_err_cnt++;
2758                 u64_stats_update_end(&ring->syncp);
2759                 return ret;
2760         }
2761
2762         l2_frame_type = hnae3_get_field(l234info, HNS3_RXD_DMAC_M,
2763                                         HNS3_RXD_DMAC_S);
2764
2765         u64_stats_update_begin(&ring->syncp);
2766         ring->stats.rx_pkts++;
2767         ring->stats.rx_bytes += len;
2768
2769         if (l2_frame_type == HNS3_L2_TYPE_MULTICAST)
2770                 ring->stats.rx_multicast++;
2771
2772         u64_stats_update_end(&ring->syncp);
2773
2774         ring->tqp_vector->rx_group.total_bytes += len;
2775
2776         hns3_set_rx_skb_rss_type(ring, skb, le32_to_cpu(desc->rx.rss_hash));
2777         return 0;
2778 }
2779
2780 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2781                              struct sk_buff **out_skb)
2782 {
2783         struct sk_buff *skb = ring->skb;
2784         struct hns3_desc_cb *desc_cb;
2785         struct hns3_desc *desc;
2786         u32 bd_base_info;
2787         int length;
2788         int ret;
2789
2790         desc = &ring->desc[ring->next_to_clean];
2791         desc_cb = &ring->desc_cb[ring->next_to_clean];
2792
2793         prefetch(desc);
2794
2795         length = le16_to_cpu(desc->rx.size);
2796         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2797
2798         /* Check valid BD */
2799         if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B))))
2800                 return -ENXIO;
2801
2802         if (!skb)
2803                 ring->va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2804
2805         /* Prefetch first cache line of first page
2806          * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2807          * line size is 64B so need to prefetch twice to make it 128B. But in
2808          * actual we can have greater size of caches with 128B Level 1 cache
2809          * lines. In such a case, single fetch would suffice to cache in the
2810          * relevant part of the header.
2811          */
2812         prefetch(ring->va);
2813 #if L1_CACHE_BYTES < 128
2814         prefetch(ring->va + L1_CACHE_BYTES);
2815 #endif
2816
2817         if (!skb) {
2818                 ret = hns3_alloc_skb(ring, length, ring->va);
2819                 *out_skb = skb = ring->skb;
2820
2821                 if (ret < 0) /* alloc buffer fail */
2822                         return ret;
2823                 if (ret > 0) { /* need add frag */
2824                         ret = hns3_add_frag(ring, desc, &skb, false);
2825                         if (ret)
2826                                 return ret;
2827
2828                         /* As the head data may be changed when GRO enable, copy
2829                          * the head data in after other data rx completed
2830                          */
2831                         memcpy(skb->data, ring->va,
2832                                ALIGN(ring->pull_len, sizeof(long)));
2833                 }
2834         } else {
2835                 ret = hns3_add_frag(ring, desc, &skb, true);
2836                 if (ret)
2837                         return ret;
2838
2839                 /* As the head data may be changed when GRO enable, copy
2840                  * the head data in after other data rx completed
2841                  */
2842                 memcpy(skb->data, ring->va,
2843                        ALIGN(ring->pull_len, sizeof(long)));
2844         }
2845
2846         ret = hns3_handle_bdinfo(ring, skb);
2847         if (unlikely(ret)) {
2848                 dev_kfree_skb_any(skb);
2849                 return ret;
2850         }
2851
2852         *out_skb = skb;
2853
2854         return 0;
2855 }
2856
2857 int hns3_clean_rx_ring(
2858                 struct hns3_enet_ring *ring, int budget,
2859                 void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
2860 {
2861 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2862         int recv_pkts, recv_bds, clean_count, err;
2863         int unused_count = hns3_desc_unused(ring);
2864         struct sk_buff *skb = ring->skb;
2865         int num;
2866
2867         num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2868         rmb(); /* Make sure num taken effect before the other data is touched */
2869
2870         recv_pkts = 0, recv_bds = 0, clean_count = 0;
2871         num -= unused_count;
2872         unused_count -= ring->pending_buf;
2873
2874         while (recv_pkts < budget && recv_bds < num) {
2875                 /* Reuse or realloc buffers */
2876                 if (clean_count + unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2877                         hns3_nic_alloc_rx_buffers(ring,
2878                                                   clean_count + unused_count);
2879                         clean_count = 0;
2880                         unused_count = hns3_desc_unused(ring) -
2881                                         ring->pending_buf;
2882                 }
2883
2884                 /* Poll one pkt */
2885                 err = hns3_handle_rx_bd(ring, &skb);
2886                 if (unlikely(!skb)) /* This fault cannot be repaired */
2887                         goto out;
2888
2889                 if (err == -ENXIO) { /* Do not get FE for the packet */
2890                         goto out;
2891                 } else if (unlikely(err)) {  /* Do jump the err */
2892                         recv_bds += ring->pending_buf;
2893                         clean_count += ring->pending_buf;
2894                         ring->skb = NULL;
2895                         ring->pending_buf = 0;
2896                         continue;
2897                 }
2898
2899                 rx_fn(ring, skb);
2900                 recv_bds += ring->pending_buf;
2901                 clean_count += ring->pending_buf;
2902                 ring->skb = NULL;
2903                 ring->pending_buf = 0;
2904
2905                 recv_pkts++;
2906         }
2907
2908 out:
2909         /* Make all data has been write before submit */
2910         if (clean_count + unused_count > 0)
2911                 hns3_nic_alloc_rx_buffers(ring,
2912                                           clean_count + unused_count);
2913
2914         return recv_pkts;
2915 }
2916
2917 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
2918 {
2919         struct hns3_enet_tqp_vector *tqp_vector =
2920                                         ring_group->ring->tqp_vector;
2921         enum hns3_flow_level_range new_flow_level;
2922         int packets_per_msecs;
2923         int bytes_per_msecs;
2924         u32 time_passed_ms;
2925         u16 new_int_gl;
2926
2927         if (!tqp_vector->last_jiffies)
2928                 return false;
2929
2930         if (ring_group->total_packets == 0) {
2931                 ring_group->coal.int_gl = HNS3_INT_GL_50K;
2932                 ring_group->coal.flow_level = HNS3_FLOW_LOW;
2933                 return true;
2934         }
2935
2936         /* Simple throttlerate management
2937          * 0-10MB/s   lower     (50000 ints/s)
2938          * 10-20MB/s   middle    (20000 ints/s)
2939          * 20-1249MB/s high      (18000 ints/s)
2940          * > 40000pps  ultra     (8000 ints/s)
2941          */
2942         new_flow_level = ring_group->coal.flow_level;
2943         new_int_gl = ring_group->coal.int_gl;
2944         time_passed_ms =
2945                 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
2946
2947         if (!time_passed_ms)
2948                 return false;
2949
2950         do_div(ring_group->total_packets, time_passed_ms);
2951         packets_per_msecs = ring_group->total_packets;
2952
2953         do_div(ring_group->total_bytes, time_passed_ms);
2954         bytes_per_msecs = ring_group->total_bytes;
2955
2956 #define HNS3_RX_LOW_BYTE_RATE 10000
2957 #define HNS3_RX_MID_BYTE_RATE 20000
2958
2959         switch (new_flow_level) {
2960         case HNS3_FLOW_LOW:
2961                 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
2962                         new_flow_level = HNS3_FLOW_MID;
2963                 break;
2964         case HNS3_FLOW_MID:
2965                 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
2966                         new_flow_level = HNS3_FLOW_HIGH;
2967                 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
2968                         new_flow_level = HNS3_FLOW_LOW;
2969                 break;
2970         case HNS3_FLOW_HIGH:
2971         case HNS3_FLOW_ULTRA:
2972         default:
2973                 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
2974                         new_flow_level = HNS3_FLOW_MID;
2975                 break;
2976         }
2977
2978 #define HNS3_RX_ULTRA_PACKET_RATE 40
2979
2980         if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
2981             &tqp_vector->rx_group == ring_group)
2982                 new_flow_level = HNS3_FLOW_ULTRA;
2983
2984         switch (new_flow_level) {
2985         case HNS3_FLOW_LOW:
2986                 new_int_gl = HNS3_INT_GL_50K;
2987                 break;
2988         case HNS3_FLOW_MID:
2989                 new_int_gl = HNS3_INT_GL_20K;
2990                 break;
2991         case HNS3_FLOW_HIGH:
2992                 new_int_gl = HNS3_INT_GL_18K;
2993                 break;
2994         case HNS3_FLOW_ULTRA:
2995                 new_int_gl = HNS3_INT_GL_8K;
2996                 break;
2997         default:
2998                 break;
2999         }
3000
3001         ring_group->total_bytes = 0;
3002         ring_group->total_packets = 0;
3003         ring_group->coal.flow_level = new_flow_level;
3004         if (new_int_gl != ring_group->coal.int_gl) {
3005                 ring_group->coal.int_gl = new_int_gl;
3006                 return true;
3007         }
3008         return false;
3009 }
3010
3011 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
3012 {
3013         struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
3014         struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
3015         bool rx_update, tx_update;
3016
3017         /* update param every 1000ms */
3018         if (time_before(jiffies,
3019                         tqp_vector->last_jiffies + msecs_to_jiffies(1000)))
3020                 return;
3021
3022         if (rx_group->coal.gl_adapt_enable) {
3023                 rx_update = hns3_get_new_int_gl(rx_group);
3024                 if (rx_update)
3025                         hns3_set_vector_coalesce_rx_gl(tqp_vector,
3026                                                        rx_group->coal.int_gl);
3027         }
3028
3029         if (tx_group->coal.gl_adapt_enable) {
3030                 tx_update = hns3_get_new_int_gl(tx_group);
3031                 if (tx_update)
3032                         hns3_set_vector_coalesce_tx_gl(tqp_vector,
3033                                                        tx_group->coal.int_gl);
3034         }
3035
3036         tqp_vector->last_jiffies = jiffies;
3037 }
3038
3039 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
3040 {
3041         struct hns3_nic_priv *priv = netdev_priv(napi->dev);
3042         struct hns3_enet_ring *ring;
3043         int rx_pkt_total = 0;
3044
3045         struct hns3_enet_tqp_vector *tqp_vector =
3046                 container_of(napi, struct hns3_enet_tqp_vector, napi);
3047         bool clean_complete = true;
3048         int rx_budget = budget;
3049
3050         if (unlikely(test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3051                 napi_complete(napi);
3052                 return 0;
3053         }
3054
3055         /* Since the actual Tx work is minimal, we can give the Tx a larger
3056          * budget and be more aggressive about cleaning up the Tx descriptors.
3057          */
3058         hns3_for_each_ring(ring, tqp_vector->tx_group)
3059                 hns3_clean_tx_ring(ring);
3060
3061         /* make sure rx ring budget not smaller than 1 */
3062         if (tqp_vector->num_tqps > 1)
3063                 rx_budget = max(budget / tqp_vector->num_tqps, 1);
3064
3065         hns3_for_each_ring(ring, tqp_vector->rx_group) {
3066                 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
3067                                                     hns3_rx_skb);
3068
3069                 if (rx_cleaned >= rx_budget)
3070                         clean_complete = false;
3071
3072                 rx_pkt_total += rx_cleaned;
3073         }
3074
3075         tqp_vector->rx_group.total_packets += rx_pkt_total;
3076
3077         if (!clean_complete)
3078                 return budget;
3079
3080         if (napi_complete(napi) &&
3081             likely(!test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3082                 hns3_update_new_int_gl(tqp_vector);
3083                 hns3_mask_vector_irq(tqp_vector, 1);
3084         }
3085
3086         return rx_pkt_total;
3087 }
3088
3089 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3090                                       struct hnae3_ring_chain_node *head)
3091 {
3092         struct pci_dev *pdev = tqp_vector->handle->pdev;
3093         struct hnae3_ring_chain_node *cur_chain = head;
3094         struct hnae3_ring_chain_node *chain;
3095         struct hns3_enet_ring *tx_ring;
3096         struct hns3_enet_ring *rx_ring;
3097
3098         tx_ring = tqp_vector->tx_group.ring;
3099         if (tx_ring) {
3100                 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
3101                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3102                               HNAE3_RING_TYPE_TX);
3103                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3104                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
3105
3106                 cur_chain->next = NULL;
3107
3108                 while (tx_ring->next) {
3109                         tx_ring = tx_ring->next;
3110
3111                         chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
3112                                              GFP_KERNEL);
3113                         if (!chain)
3114                                 goto err_free_chain;
3115
3116                         cur_chain->next = chain;
3117                         chain->tqp_index = tx_ring->tqp->tqp_index;
3118                         hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3119                                       HNAE3_RING_TYPE_TX);
3120                         hnae3_set_field(chain->int_gl_idx,
3121                                         HNAE3_RING_GL_IDX_M,
3122                                         HNAE3_RING_GL_IDX_S,
3123                                         HNAE3_RING_GL_TX);
3124
3125                         cur_chain = chain;
3126                 }
3127         }
3128
3129         rx_ring = tqp_vector->rx_group.ring;
3130         if (!tx_ring && rx_ring) {
3131                 cur_chain->next = NULL;
3132                 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
3133                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3134                               HNAE3_RING_TYPE_RX);
3135                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3136                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3137
3138                 rx_ring = rx_ring->next;
3139         }
3140
3141         while (rx_ring) {
3142                 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
3143                 if (!chain)
3144                         goto err_free_chain;
3145
3146                 cur_chain->next = chain;
3147                 chain->tqp_index = rx_ring->tqp->tqp_index;
3148                 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3149                               HNAE3_RING_TYPE_RX);
3150                 hnae3_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3151                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3152
3153                 cur_chain = chain;
3154
3155                 rx_ring = rx_ring->next;
3156         }
3157
3158         return 0;
3159
3160 err_free_chain:
3161         cur_chain = head->next;
3162         while (cur_chain) {
3163                 chain = cur_chain->next;
3164                 devm_kfree(&pdev->dev, cur_chain);
3165                 cur_chain = chain;
3166         }
3167         head->next = NULL;
3168
3169         return -ENOMEM;
3170 }
3171
3172 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3173                                         struct hnae3_ring_chain_node *head)
3174 {
3175         struct pci_dev *pdev = tqp_vector->handle->pdev;
3176         struct hnae3_ring_chain_node *chain_tmp, *chain;
3177
3178         chain = head->next;
3179
3180         while (chain) {
3181                 chain_tmp = chain->next;
3182                 devm_kfree(&pdev->dev, chain);
3183                 chain = chain_tmp;
3184         }
3185 }
3186
3187 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
3188                                    struct hns3_enet_ring *ring)
3189 {
3190         ring->next = group->ring;
3191         group->ring = ring;
3192
3193         group->count++;
3194 }
3195
3196 static void hns3_nic_set_cpumask(struct hns3_nic_priv *priv)
3197 {
3198         struct pci_dev *pdev = priv->ae_handle->pdev;
3199         struct hns3_enet_tqp_vector *tqp_vector;
3200         int num_vectors = priv->vector_num;
3201         int numa_node;
3202         int vector_i;
3203
3204         numa_node = dev_to_node(&pdev->dev);
3205
3206         for (vector_i = 0; vector_i < num_vectors; vector_i++) {
3207                 tqp_vector = &priv->tqp_vector[vector_i];
3208                 cpumask_set_cpu(cpumask_local_spread(vector_i, numa_node),
3209                                 &tqp_vector->affinity_mask);
3210         }
3211 }
3212
3213 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
3214 {
3215         struct hnae3_ring_chain_node vector_ring_chain;
3216         struct hnae3_handle *h = priv->ae_handle;
3217         struct hns3_enet_tqp_vector *tqp_vector;
3218         int ret = 0;
3219         int i;
3220
3221         hns3_nic_set_cpumask(priv);
3222
3223         for (i = 0; i < priv->vector_num; i++) {
3224                 tqp_vector = &priv->tqp_vector[i];
3225                 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
3226                 tqp_vector->num_tqps = 0;
3227         }
3228
3229         for (i = 0; i < h->kinfo.num_tqps; i++) {
3230                 u16 vector_i = i % priv->vector_num;
3231                 u16 tqp_num = h->kinfo.num_tqps;
3232
3233                 tqp_vector = &priv->tqp_vector[vector_i];
3234
3235                 hns3_add_ring_to_group(&tqp_vector->tx_group,
3236                                        priv->ring_data[i].ring);
3237
3238                 hns3_add_ring_to_group(&tqp_vector->rx_group,
3239                                        priv->ring_data[i + tqp_num].ring);
3240
3241                 priv->ring_data[i].ring->tqp_vector = tqp_vector;
3242                 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
3243                 tqp_vector->num_tqps++;
3244         }
3245
3246         for (i = 0; i < priv->vector_num; i++) {
3247                 tqp_vector = &priv->tqp_vector[i];
3248
3249                 tqp_vector->rx_group.total_bytes = 0;
3250                 tqp_vector->rx_group.total_packets = 0;
3251                 tqp_vector->tx_group.total_bytes = 0;
3252                 tqp_vector->tx_group.total_packets = 0;
3253                 tqp_vector->handle = h;
3254
3255                 ret = hns3_get_vector_ring_chain(tqp_vector,
3256                                                  &vector_ring_chain);
3257                 if (ret)
3258                         goto map_ring_fail;
3259
3260                 ret = h->ae_algo->ops->map_ring_to_vector(h,
3261                         tqp_vector->vector_irq, &vector_ring_chain);
3262
3263                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3264
3265                 if (ret)
3266                         goto map_ring_fail;
3267
3268                 netif_napi_add(priv->netdev, &tqp_vector->napi,
3269                                hns3_nic_common_poll, NAPI_POLL_WEIGHT);
3270         }
3271
3272         return 0;
3273
3274 map_ring_fail:
3275         while (i--)
3276                 netif_napi_del(&priv->tqp_vector[i].napi);
3277
3278         return ret;
3279 }
3280
3281 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
3282 {
3283 #define HNS3_VECTOR_PF_MAX_NUM          64
3284
3285         struct hnae3_handle *h = priv->ae_handle;
3286         struct hns3_enet_tqp_vector *tqp_vector;
3287         struct hnae3_vector_info *vector;
3288         struct pci_dev *pdev = h->pdev;
3289         u16 tqp_num = h->kinfo.num_tqps;
3290         u16 vector_num;
3291         int ret = 0;
3292         u16 i;
3293
3294         /* RSS size, cpu online and vector_num should be the same */
3295         /* Should consider 2p/4p later */
3296         vector_num = min_t(u16, num_online_cpus(), tqp_num);
3297         vector_num = min_t(u16, vector_num, HNS3_VECTOR_PF_MAX_NUM);
3298
3299         vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
3300                               GFP_KERNEL);
3301         if (!vector)
3302                 return -ENOMEM;
3303
3304         vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
3305
3306         priv->vector_num = vector_num;
3307         priv->tqp_vector = (struct hns3_enet_tqp_vector *)
3308                 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
3309                              GFP_KERNEL);
3310         if (!priv->tqp_vector) {
3311                 ret = -ENOMEM;
3312                 goto out;
3313         }
3314
3315         for (i = 0; i < priv->vector_num; i++) {
3316                 tqp_vector = &priv->tqp_vector[i];
3317                 tqp_vector->idx = i;
3318                 tqp_vector->mask_addr = vector[i].io_addr;
3319                 tqp_vector->vector_irq = vector[i].vector;
3320                 hns3_vector_gl_rl_init(tqp_vector, priv);
3321         }
3322
3323 out:
3324         devm_kfree(&pdev->dev, vector);
3325         return ret;
3326 }
3327
3328 static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
3329 {
3330         group->ring = NULL;
3331         group->count = 0;
3332 }
3333
3334 static void hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
3335 {
3336         struct hnae3_ring_chain_node vector_ring_chain;
3337         struct hnae3_handle *h = priv->ae_handle;
3338         struct hns3_enet_tqp_vector *tqp_vector;
3339         int i;
3340
3341         for (i = 0; i < priv->vector_num; i++) {
3342                 tqp_vector = &priv->tqp_vector[i];
3343
3344                 if (!tqp_vector->rx_group.ring && !tqp_vector->tx_group.ring)
3345                         continue;
3346
3347                 hns3_get_vector_ring_chain(tqp_vector, &vector_ring_chain);
3348
3349                 h->ae_algo->ops->unmap_ring_from_vector(h,
3350                         tqp_vector->vector_irq, &vector_ring_chain);
3351
3352                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3353
3354                 if (tqp_vector->irq_init_flag == HNS3_VECTOR_INITED) {
3355                         irq_set_affinity_notifier(tqp_vector->vector_irq,
3356                                                   NULL);
3357                         irq_set_affinity_hint(tqp_vector->vector_irq, NULL);
3358                         free_irq(tqp_vector->vector_irq, tqp_vector);
3359                         tqp_vector->irq_init_flag = HNS3_VECTOR_NOT_INITED;
3360                 }
3361
3362                 hns3_clear_ring_group(&tqp_vector->rx_group);
3363                 hns3_clear_ring_group(&tqp_vector->tx_group);
3364                 netif_napi_del(&priv->tqp_vector[i].napi);
3365         }
3366 }
3367
3368 static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
3369 {
3370         struct hnae3_handle *h = priv->ae_handle;
3371         struct pci_dev *pdev = h->pdev;
3372         int i, ret;
3373
3374         for (i = 0; i < priv->vector_num; i++) {
3375                 struct hns3_enet_tqp_vector *tqp_vector;
3376
3377                 tqp_vector = &priv->tqp_vector[i];
3378                 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
3379                 if (ret)
3380                         return ret;
3381         }
3382
3383         devm_kfree(&pdev->dev, priv->tqp_vector);
3384         return 0;
3385 }
3386
3387 static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
3388                              int ring_type)
3389 {
3390         struct hns3_nic_ring_data *ring_data = priv->ring_data;
3391         int queue_num = priv->ae_handle->kinfo.num_tqps;
3392         struct pci_dev *pdev = priv->ae_handle->pdev;
3393         struct hns3_enet_ring *ring;
3394         int desc_num;
3395
3396         ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
3397         if (!ring)
3398                 return -ENOMEM;
3399
3400         if (ring_type == HNAE3_RING_TYPE_TX) {
3401                 desc_num = priv->ae_handle->kinfo.num_tx_desc;
3402                 ring_data[q->tqp_index].ring = ring;
3403                 ring_data[q->tqp_index].queue_index = q->tqp_index;
3404                 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
3405         } else {
3406                 desc_num = priv->ae_handle->kinfo.num_rx_desc;
3407                 ring_data[q->tqp_index + queue_num].ring = ring;
3408                 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
3409                 ring->io_base = q->io_base;
3410         }
3411
3412         hnae3_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
3413
3414         ring->tqp = q;
3415         ring->desc = NULL;
3416         ring->desc_cb = NULL;
3417         ring->dev = priv->dev;
3418         ring->desc_dma_addr = 0;
3419         ring->buf_size = q->buf_size;
3420         ring->desc_num = desc_num;
3421         ring->next_to_use = 0;
3422         ring->next_to_clean = 0;
3423
3424         return 0;
3425 }
3426
3427 static int hns3_queue_to_ring(struct hnae3_queue *tqp,
3428                               struct hns3_nic_priv *priv)
3429 {
3430         int ret;
3431
3432         ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
3433         if (ret)
3434                 return ret;
3435
3436         ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
3437         if (ret) {
3438                 devm_kfree(priv->dev, priv->ring_data[tqp->tqp_index].ring);
3439                 return ret;
3440         }
3441
3442         return 0;
3443 }
3444
3445 static int hns3_get_ring_config(struct hns3_nic_priv *priv)
3446 {
3447         struct hnae3_handle *h = priv->ae_handle;
3448         struct pci_dev *pdev = h->pdev;
3449         int i, ret;
3450
3451         priv->ring_data =  devm_kzalloc(&pdev->dev,
3452                                         array3_size(h->kinfo.num_tqps,
3453                                                     sizeof(*priv->ring_data),
3454                                                     2),
3455                                         GFP_KERNEL);
3456         if (!priv->ring_data)
3457                 return -ENOMEM;
3458
3459         for (i = 0; i < h->kinfo.num_tqps; i++) {
3460                 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
3461                 if (ret)
3462                         goto err;
3463         }
3464
3465         return 0;
3466 err:
3467         while (i--) {
3468                 devm_kfree(priv->dev, priv->ring_data[i].ring);
3469                 devm_kfree(priv->dev,
3470                            priv->ring_data[i + h->kinfo.num_tqps].ring);
3471         }
3472
3473         devm_kfree(&pdev->dev, priv->ring_data);
3474         priv->ring_data = NULL;
3475         return ret;
3476 }
3477
3478 static void hns3_put_ring_config(struct hns3_nic_priv *priv)
3479 {
3480         struct hnae3_handle *h = priv->ae_handle;
3481         int i;
3482
3483         if (!priv->ring_data)
3484                 return;
3485
3486         for (i = 0; i < h->kinfo.num_tqps; i++) {
3487                 devm_kfree(priv->dev, priv->ring_data[i].ring);
3488                 devm_kfree(priv->dev,
3489                            priv->ring_data[i + h->kinfo.num_tqps].ring);
3490         }
3491         devm_kfree(priv->dev, priv->ring_data);
3492         priv->ring_data = NULL;
3493 }
3494
3495 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
3496 {
3497         int ret;
3498
3499         if (ring->desc_num <= 0 || ring->buf_size <= 0)
3500                 return -EINVAL;
3501
3502         ring->desc_cb = kcalloc(ring->desc_num, sizeof(ring->desc_cb[0]),
3503                                 GFP_KERNEL);
3504         if (!ring->desc_cb) {
3505                 ret = -ENOMEM;
3506                 goto out;
3507         }
3508
3509         ret = hns3_alloc_desc(ring);
3510         if (ret)
3511                 goto out_with_desc_cb;
3512
3513         if (!HNAE3_IS_TX_RING(ring)) {
3514                 ret = hns3_alloc_ring_buffers(ring);
3515                 if (ret)
3516                         goto out_with_desc;
3517         }
3518
3519         return 0;
3520
3521 out_with_desc:
3522         hns3_free_desc(ring);
3523 out_with_desc_cb:
3524         kfree(ring->desc_cb);
3525         ring->desc_cb = NULL;
3526 out:
3527         return ret;
3528 }
3529
3530 static void hns3_fini_ring(struct hns3_enet_ring *ring)
3531 {
3532         hns3_free_desc(ring);
3533         kfree(ring->desc_cb);
3534         ring->desc_cb = NULL;
3535         ring->next_to_clean = 0;
3536         ring->next_to_use = 0;
3537         ring->pending_buf = 0;
3538         if (ring->skb) {
3539                 dev_kfree_skb_any(ring->skb);
3540                 ring->skb = NULL;
3541         }
3542 }
3543
3544 static int hns3_buf_size2type(u32 buf_size)
3545 {
3546         int bd_size_type;
3547
3548         switch (buf_size) {
3549         case 512:
3550                 bd_size_type = HNS3_BD_SIZE_512_TYPE;
3551                 break;
3552         case 1024:
3553                 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
3554                 break;
3555         case 2048:
3556                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3557                 break;
3558         case 4096:
3559                 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
3560                 break;
3561         default:
3562                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3563         }
3564
3565         return bd_size_type;
3566 }
3567
3568 static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
3569 {
3570         dma_addr_t dma = ring->desc_dma_addr;
3571         struct hnae3_queue *q = ring->tqp;
3572
3573         if (!HNAE3_IS_TX_RING(ring)) {
3574                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG,
3575                                (u32)dma);
3576                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
3577                                (u32)((dma >> 31) >> 1));
3578
3579                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
3580                                hns3_buf_size2type(ring->buf_size));
3581                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
3582                                ring->desc_num / 8 - 1);
3583
3584         } else {
3585                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
3586                                (u32)dma);
3587                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
3588                                (u32)((dma >> 31) >> 1));
3589
3590                 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3591                                ring->desc_num / 8 - 1);
3592         }
3593 }
3594
3595 static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
3596 {
3597         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3598         int i;
3599
3600         for (i = 0; i < HNAE3_MAX_TC; i++) {
3601                 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3602                 int j;
3603
3604                 if (!tc_info->enable)
3605                         continue;
3606
3607                 for (j = 0; j < tc_info->tqp_count; j++) {
3608                         struct hnae3_queue *q;
3609
3610                         q = priv->ring_data[tc_info->tqp_offset + j].ring->tqp;
3611                         hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
3612                                        tc_info->tc);
3613                 }
3614         }
3615 }
3616
3617 int hns3_init_all_ring(struct hns3_nic_priv *priv)
3618 {
3619         struct hnae3_handle *h = priv->ae_handle;
3620         int ring_num = h->kinfo.num_tqps * 2;
3621         int i, j;
3622         int ret;
3623
3624         for (i = 0; i < ring_num; i++) {
3625                 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
3626                 if (ret) {
3627                         dev_err(priv->dev,
3628                                 "Alloc ring memory fail! ret=%d\n", ret);
3629                         goto out_when_alloc_ring_memory;
3630                 }
3631
3632                 u64_stats_init(&priv->ring_data[i].ring->syncp);
3633         }
3634
3635         return 0;
3636
3637 out_when_alloc_ring_memory:
3638         for (j = i - 1; j >= 0; j--)
3639                 hns3_fini_ring(priv->ring_data[j].ring);
3640
3641         return -ENOMEM;
3642 }
3643
3644 int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
3645 {
3646         struct hnae3_handle *h = priv->ae_handle;
3647         int i;
3648
3649         for (i = 0; i < h->kinfo.num_tqps; i++) {
3650                 hns3_fini_ring(priv->ring_data[i].ring);
3651                 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
3652         }
3653         return 0;
3654 }
3655
3656 /* Set mac addr if it is configured. or leave it to the AE driver */
3657 static int hns3_init_mac_addr(struct net_device *netdev, bool init)
3658 {
3659         struct hns3_nic_priv *priv = netdev_priv(netdev);
3660         struct hnae3_handle *h = priv->ae_handle;
3661         u8 mac_addr_temp[ETH_ALEN];
3662         int ret = 0;
3663
3664         if (h->ae_algo->ops->get_mac_addr && init) {
3665                 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3666                 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3667         }
3668
3669         /* Check if the MAC address is valid, if not get a random one */
3670         if (!is_valid_ether_addr(netdev->dev_addr)) {
3671                 eth_hw_addr_random(netdev);
3672                 dev_warn(priv->dev, "using random MAC address %pM\n",
3673                          netdev->dev_addr);
3674         }
3675
3676         if (h->ae_algo->ops->set_mac_addr)
3677                 ret = h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
3678
3679         return ret;
3680 }
3681
3682 static int hns3_init_phy(struct net_device *netdev)
3683 {
3684         struct hnae3_handle *h = hns3_get_handle(netdev);
3685         int ret = 0;
3686
3687         if (h->ae_algo->ops->mac_connect_phy)
3688                 ret = h->ae_algo->ops->mac_connect_phy(h);
3689
3690         return ret;
3691 }
3692
3693 static void hns3_uninit_phy(struct net_device *netdev)
3694 {
3695         struct hnae3_handle *h = hns3_get_handle(netdev);
3696
3697         if (h->ae_algo->ops->mac_disconnect_phy)
3698                 h->ae_algo->ops->mac_disconnect_phy(h);
3699 }
3700
3701 static int hns3_restore_fd_rules(struct net_device *netdev)
3702 {
3703         struct hnae3_handle *h = hns3_get_handle(netdev);
3704         int ret = 0;
3705
3706         if (h->ae_algo->ops->restore_fd_rules)
3707                 ret = h->ae_algo->ops->restore_fd_rules(h);
3708
3709         return ret;
3710 }
3711
3712 static void hns3_del_all_fd_rules(struct net_device *netdev, bool clear_list)
3713 {
3714         struct hnae3_handle *h = hns3_get_handle(netdev);
3715
3716         if (h->ae_algo->ops->del_all_fd_entries)
3717                 h->ae_algo->ops->del_all_fd_entries(h, clear_list);
3718 }
3719
3720 static int hns3_client_start(struct hnae3_handle *handle)
3721 {
3722         if (!handle->ae_algo->ops->client_start)
3723                 return 0;
3724
3725         return handle->ae_algo->ops->client_start(handle);
3726 }
3727
3728 static void hns3_client_stop(struct hnae3_handle *handle)
3729 {
3730         if (!handle->ae_algo->ops->client_stop)
3731                 return;
3732
3733         handle->ae_algo->ops->client_stop(handle);
3734 }
3735
3736 static void hns3_info_show(struct hns3_nic_priv *priv)
3737 {
3738         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3739
3740         dev_info(priv->dev, "MAC address: %pM\n", priv->netdev->dev_addr);
3741         dev_info(priv->dev, "Task queue pairs numbers: %d\n", kinfo->num_tqps);
3742         dev_info(priv->dev, "RSS size: %d\n", kinfo->rss_size);
3743         dev_info(priv->dev, "Allocated RSS size: %d\n", kinfo->req_rss_size);
3744         dev_info(priv->dev, "RX buffer length: %d\n", kinfo->rx_buf_len);
3745         dev_info(priv->dev, "Desc num per TX queue: %d\n", kinfo->num_tx_desc);
3746         dev_info(priv->dev, "Desc num per RX queue: %d\n", kinfo->num_rx_desc);
3747         dev_info(priv->dev, "Total number of enabled TCs: %d\n", kinfo->num_tc);
3748         dev_info(priv->dev, "Max mtu size: %d\n", priv->netdev->max_mtu);
3749 }
3750
3751 static int hns3_client_init(struct hnae3_handle *handle)
3752 {
3753         struct pci_dev *pdev = handle->pdev;
3754         u16 alloc_tqps, max_rss_size;
3755         struct hns3_nic_priv *priv;
3756         struct net_device *netdev;
3757         int ret;
3758
3759         handle->ae_algo->ops->get_tqps_and_rss_info(handle, &alloc_tqps,
3760                                                     &max_rss_size);
3761         netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);
3762         if (!netdev)
3763                 return -ENOMEM;
3764
3765         priv = netdev_priv(netdev);
3766         priv->dev = &pdev->dev;
3767         priv->netdev = netdev;
3768         priv->ae_handle = handle;
3769         priv->tx_timeout_count = 0;
3770         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
3771
3772         handle->msg_enable = netif_msg_init(debug, DEFAULT_MSG_LEVEL);
3773
3774         handle->kinfo.netdev = netdev;
3775         handle->priv = (void *)priv;
3776
3777         hns3_init_mac_addr(netdev, true);
3778
3779         hns3_set_default_feature(netdev);
3780
3781         netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3782         netdev->priv_flags |= IFF_UNICAST_FLT;
3783         netdev->netdev_ops = &hns3_nic_netdev_ops;
3784         SET_NETDEV_DEV(netdev, &pdev->dev);
3785         hns3_ethtool_set_ops(netdev);
3786
3787         /* Carrier off reporting is important to ethtool even BEFORE open */
3788         netif_carrier_off(netdev);
3789
3790         ret = hns3_get_ring_config(priv);
3791         if (ret) {
3792                 ret = -ENOMEM;
3793                 goto out_get_ring_cfg;
3794         }
3795
3796         ret = hns3_nic_alloc_vector_data(priv);
3797         if (ret) {
3798                 ret = -ENOMEM;
3799                 goto out_alloc_vector_data;
3800         }
3801
3802         ret = hns3_nic_init_vector_data(priv);
3803         if (ret) {
3804                 ret = -ENOMEM;
3805                 goto out_init_vector_data;
3806         }
3807
3808         ret = hns3_init_all_ring(priv);
3809         if (ret) {
3810                 ret = -ENOMEM;
3811                 goto out_init_ring_data;
3812         }
3813
3814         ret = hns3_init_phy(netdev);
3815         if (ret)
3816                 goto out_init_phy;
3817
3818         ret = register_netdev(netdev);
3819         if (ret) {
3820                 dev_err(priv->dev, "probe register netdev fail!\n");
3821                 goto out_reg_netdev_fail;
3822         }
3823
3824         ret = hns3_client_start(handle);
3825         if (ret) {
3826                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
3827                         goto out_client_start;
3828         }
3829
3830         hns3_dcbnl_setup(handle);
3831
3832         hns3_dbg_init(handle);
3833
3834         /* MTU range: (ETH_MIN_MTU(kernel default) - 9702) */
3835         netdev->max_mtu = HNS3_MAX_MTU;
3836
3837         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
3838
3839         if (netif_msg_drv(handle))
3840                 hns3_info_show(priv);
3841
3842         return ret;
3843
3844 out_client_start:
3845         unregister_netdev(netdev);
3846 out_reg_netdev_fail:
3847         hns3_uninit_phy(netdev);
3848 out_init_phy:
3849         hns3_uninit_all_ring(priv);
3850 out_init_ring_data:
3851         hns3_nic_uninit_vector_data(priv);
3852 out_init_vector_data:
3853         hns3_nic_dealloc_vector_data(priv);
3854 out_alloc_vector_data:
3855         priv->ring_data = NULL;
3856 out_get_ring_cfg:
3857         priv->ae_handle = NULL;
3858         free_netdev(netdev);
3859         return ret;
3860 }
3861
3862 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
3863 {
3864         struct net_device *netdev = handle->kinfo.netdev;
3865         struct hns3_nic_priv *priv = netdev_priv(netdev);
3866         int ret;
3867
3868         hns3_remove_hw_addr(netdev);
3869
3870         if (netdev->reg_state != NETREG_UNINITIALIZED)
3871                 unregister_netdev(netdev);
3872
3873         hns3_client_stop(handle);
3874
3875         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
3876                 netdev_warn(netdev, "already uninitialized\n");
3877                 goto out_netdev_free;
3878         }
3879
3880         hns3_del_all_fd_rules(netdev, true);
3881
3882         hns3_force_clear_all_rx_ring(handle);
3883
3884         hns3_uninit_phy(netdev);
3885
3886         hns3_nic_uninit_vector_data(priv);
3887
3888         ret = hns3_nic_dealloc_vector_data(priv);
3889         if (ret)
3890                 netdev_err(netdev, "dealloc vector error\n");
3891
3892         ret = hns3_uninit_all_ring(priv);
3893         if (ret)
3894                 netdev_err(netdev, "uninit ring error\n");
3895
3896         hns3_put_ring_config(priv);
3897
3898         hns3_dbg_uninit(handle);
3899
3900 out_netdev_free:
3901         free_netdev(netdev);
3902 }
3903
3904 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
3905 {
3906         struct net_device *netdev = handle->kinfo.netdev;
3907
3908         if (!netdev)
3909                 return;
3910
3911         if (linkup) {
3912                 netif_carrier_on(netdev);
3913                 netif_tx_wake_all_queues(netdev);
3914                 if (netif_msg_link(handle))
3915                         netdev_info(netdev, "link up\n");
3916         } else {
3917                 netif_carrier_off(netdev);
3918                 netif_tx_stop_all_queues(netdev);
3919                 if (netif_msg_link(handle))
3920                         netdev_info(netdev, "link down\n");
3921         }
3922 }
3923
3924 static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
3925 {
3926         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3927         struct net_device *ndev = kinfo->netdev;
3928
3929         if (tc > HNAE3_MAX_TC)
3930                 return -EINVAL;
3931
3932         if (!ndev)
3933                 return -ENODEV;
3934
3935         return hns3_nic_set_real_num_queue(ndev);
3936 }
3937
3938 static int hns3_recover_hw_addr(struct net_device *ndev)
3939 {
3940         struct netdev_hw_addr_list *list;
3941         struct netdev_hw_addr *ha, *tmp;
3942         int ret = 0;
3943
3944         netif_addr_lock_bh(ndev);
3945         /* go through and sync uc_addr entries to the device */
3946         list = &ndev->uc;
3947         list_for_each_entry_safe(ha, tmp, &list->list, list) {
3948                 ret = hns3_nic_uc_sync(ndev, ha->addr);
3949                 if (ret)
3950                         goto out;
3951         }
3952
3953         /* go through and sync mc_addr entries to the device */
3954         list = &ndev->mc;
3955         list_for_each_entry_safe(ha, tmp, &list->list, list) {
3956                 ret = hns3_nic_mc_sync(ndev, ha->addr);
3957                 if (ret)
3958                         goto out;
3959         }
3960
3961 out:
3962         netif_addr_unlock_bh(ndev);
3963         return ret;
3964 }
3965
3966 static void hns3_remove_hw_addr(struct net_device *netdev)
3967 {
3968         struct netdev_hw_addr_list *list;
3969         struct netdev_hw_addr *ha, *tmp;
3970
3971         hns3_nic_uc_unsync(netdev, netdev->dev_addr);
3972
3973         netif_addr_lock_bh(netdev);
3974         /* go through and unsync uc_addr entries to the device */
3975         list = &netdev->uc;
3976         list_for_each_entry_safe(ha, tmp, &list->list, list)
3977                 hns3_nic_uc_unsync(netdev, ha->addr);
3978
3979         /* go through and unsync mc_addr entries to the device */
3980         list = &netdev->mc;
3981         list_for_each_entry_safe(ha, tmp, &list->list, list)
3982                 if (ha->refcount > 1)
3983                         hns3_nic_mc_unsync(netdev, ha->addr);
3984
3985         netif_addr_unlock_bh(netdev);
3986 }
3987
3988 static void hns3_clear_tx_ring(struct hns3_enet_ring *ring)
3989 {
3990         while (ring->next_to_clean != ring->next_to_use) {
3991                 ring->desc[ring->next_to_clean].tx.bdtp_fe_sc_vld_ra_ri = 0;
3992                 hns3_free_buffer_detach(ring, ring->next_to_clean);
3993                 ring_ptr_move_fw(ring, next_to_clean);
3994         }
3995 }
3996
3997 static int hns3_clear_rx_ring(struct hns3_enet_ring *ring)
3998 {
3999         struct hns3_desc_cb res_cbs;
4000         int ret;
4001
4002         while (ring->next_to_use != ring->next_to_clean) {
4003                 /* When a buffer is not reused, it's memory has been
4004                  * freed in hns3_handle_rx_bd or will be freed by
4005                  * stack, so we need to replace the buffer here.
4006                  */
4007                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4008                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
4009                         if (ret) {
4010                                 u64_stats_update_begin(&ring->syncp);
4011                                 ring->stats.sw_err_cnt++;
4012                                 u64_stats_update_end(&ring->syncp);
4013                                 /* if alloc new buffer fail, exit directly
4014                                  * and reclear in up flow.
4015                                  */
4016                                 netdev_warn(ring->tqp->handle->kinfo.netdev,
4017                                             "reserve buffer map failed, ret = %d\n",
4018                                             ret);
4019                                 return ret;
4020                         }
4021                         hns3_replace_buffer(ring, ring->next_to_use,
4022                                             &res_cbs);
4023                 }
4024                 ring_ptr_move_fw(ring, next_to_use);
4025         }
4026
4027         /* Free the pending skb in rx ring */
4028         if (ring->skb) {
4029                 dev_kfree_skb_any(ring->skb);
4030                 ring->skb = NULL;
4031                 ring->pending_buf = 0;
4032         }
4033
4034         return 0;
4035 }
4036
4037 static void hns3_force_clear_rx_ring(struct hns3_enet_ring *ring)
4038 {
4039         while (ring->next_to_use != ring->next_to_clean) {
4040                 /* When a buffer is not reused, it's memory has been
4041                  * freed in hns3_handle_rx_bd or will be freed by
4042                  * stack, so only need to unmap the buffer here.
4043                  */
4044                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4045                         hns3_unmap_buffer(ring,
4046                                           &ring->desc_cb[ring->next_to_use]);
4047                         ring->desc_cb[ring->next_to_use].dma = 0;
4048                 }
4049
4050                 ring_ptr_move_fw(ring, next_to_use);
4051         }
4052 }
4053
4054 static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h)
4055 {
4056         struct net_device *ndev = h->kinfo.netdev;
4057         struct hns3_nic_priv *priv = netdev_priv(ndev);
4058         struct hns3_enet_ring *ring;
4059         u32 i;
4060
4061         for (i = 0; i < h->kinfo.num_tqps; i++) {
4062                 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4063                 hns3_force_clear_rx_ring(ring);
4064         }
4065 }
4066
4067 static void hns3_clear_all_ring(struct hnae3_handle *h)
4068 {
4069         struct net_device *ndev = h->kinfo.netdev;
4070         struct hns3_nic_priv *priv = netdev_priv(ndev);
4071         u32 i;
4072
4073         for (i = 0; i < h->kinfo.num_tqps; i++) {
4074                 struct netdev_queue *dev_queue;
4075                 struct hns3_enet_ring *ring;
4076
4077                 ring = priv->ring_data[i].ring;
4078                 hns3_clear_tx_ring(ring);
4079                 dev_queue = netdev_get_tx_queue(ndev,
4080                                                 priv->ring_data[i].queue_index);
4081                 netdev_tx_reset_queue(dev_queue);
4082
4083                 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4084                 /* Continue to clear other rings even if clearing some
4085                  * rings failed.
4086                  */
4087                 hns3_clear_rx_ring(ring);
4088         }
4089 }
4090
4091 int hns3_nic_reset_all_ring(struct hnae3_handle *h)
4092 {
4093         struct net_device *ndev = h->kinfo.netdev;
4094         struct hns3_nic_priv *priv = netdev_priv(ndev);
4095         struct hns3_enet_ring *rx_ring;
4096         int i, j;
4097         int ret;
4098
4099         for (i = 0; i < h->kinfo.num_tqps; i++) {
4100                 ret = h->ae_algo->ops->reset_queue(h, i);
4101                 if (ret)
4102                         return ret;
4103
4104                 hns3_init_ring_hw(priv->ring_data[i].ring);
4105
4106                 /* We need to clear tx ring here because self test will
4107                  * use the ring and will not run down before up
4108                  */
4109                 hns3_clear_tx_ring(priv->ring_data[i].ring);
4110                 priv->ring_data[i].ring->next_to_clean = 0;
4111                 priv->ring_data[i].ring->next_to_use = 0;
4112
4113                 rx_ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4114                 hns3_init_ring_hw(rx_ring);
4115                 ret = hns3_clear_rx_ring(rx_ring);
4116                 if (ret)
4117                         return ret;
4118
4119                 /* We can not know the hardware head and tail when this
4120                  * function is called in reset flow, so we reuse all desc.
4121                  */
4122                 for (j = 0; j < rx_ring->desc_num; j++)
4123                         hns3_reuse_buffer(rx_ring, j);
4124
4125                 rx_ring->next_to_clean = 0;
4126                 rx_ring->next_to_use = 0;
4127         }
4128
4129         hns3_init_tx_ring_tc(priv);
4130
4131         return 0;
4132 }
4133
4134 static void hns3_store_coal(struct hns3_nic_priv *priv)
4135 {
4136         /* ethtool only support setting and querying one coal
4137          * configuation for now, so save the vector 0' coal
4138          * configuation here in order to restore it.
4139          */
4140         memcpy(&priv->tx_coal, &priv->tqp_vector[0].tx_group.coal,
4141                sizeof(struct hns3_enet_coalesce));
4142         memcpy(&priv->rx_coal, &priv->tqp_vector[0].rx_group.coal,
4143                sizeof(struct hns3_enet_coalesce));
4144 }
4145
4146 static void hns3_restore_coal(struct hns3_nic_priv *priv)
4147 {
4148         u16 vector_num = priv->vector_num;
4149         int i;
4150
4151         for (i = 0; i < vector_num; i++) {
4152                 memcpy(&priv->tqp_vector[i].tx_group.coal, &priv->tx_coal,
4153                        sizeof(struct hns3_enet_coalesce));
4154                 memcpy(&priv->tqp_vector[i].rx_group.coal, &priv->rx_coal,
4155                        sizeof(struct hns3_enet_coalesce));
4156         }
4157 }
4158
4159 static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
4160 {
4161         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
4162         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4163         struct net_device *ndev = kinfo->netdev;
4164         struct hns3_nic_priv *priv = netdev_priv(ndev);
4165
4166         if (test_and_set_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
4167                 return 0;
4168
4169         /* it is cumbersome for hardware to pick-and-choose entries for deletion
4170          * from table space. Hence, for function reset software intervention is
4171          * required to delete the entries
4172          */
4173         if (hns3_dev_ongoing_func_reset(ae_dev)) {
4174                 hns3_remove_hw_addr(ndev);
4175                 hns3_del_all_fd_rules(ndev, false);
4176         }
4177
4178         if (!netif_running(ndev))
4179                 return 0;
4180
4181         return hns3_nic_net_stop(ndev);
4182 }
4183
4184 static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
4185 {
4186         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4187         struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
4188         int ret = 0;
4189
4190         clear_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4191
4192         if (netif_running(kinfo->netdev)) {
4193                 ret = hns3_nic_net_open(kinfo->netdev);
4194                 if (ret) {
4195                         set_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4196                         netdev_err(kinfo->netdev,
4197                                    "hns net up fail, ret=%d!\n", ret);
4198                         return ret;
4199                 }
4200         }
4201
4202         return ret;
4203 }
4204
4205 static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
4206 {
4207         struct net_device *netdev = handle->kinfo.netdev;
4208         struct hns3_nic_priv *priv = netdev_priv(netdev);
4209         int ret;
4210
4211         /* Carrier off reporting is important to ethtool even BEFORE open */
4212         netif_carrier_off(netdev);
4213
4214         ret = hns3_get_ring_config(priv);
4215         if (ret)
4216                 return ret;
4217
4218         ret = hns3_nic_alloc_vector_data(priv);
4219         if (ret)
4220                 goto err_put_ring;
4221
4222         hns3_restore_coal(priv);
4223
4224         ret = hns3_nic_init_vector_data(priv);
4225         if (ret)
4226                 goto err_dealloc_vector;
4227
4228         ret = hns3_init_all_ring(priv);
4229         if (ret)
4230                 goto err_uninit_vector;
4231
4232         ret = hns3_client_start(handle);
4233         if (ret) {
4234                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4235                 goto err_uninit_ring;
4236         }
4237
4238         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4239
4240         return ret;
4241
4242 err_uninit_ring:
4243         hns3_uninit_all_ring(priv);
4244 err_uninit_vector:
4245         hns3_nic_uninit_vector_data(priv);
4246 err_dealloc_vector:
4247         hns3_nic_dealloc_vector_data(priv);
4248 err_put_ring:
4249         hns3_put_ring_config(priv);
4250
4251         return ret;
4252 }
4253
4254 static int hns3_reset_notify_restore_enet(struct hnae3_handle *handle)
4255 {
4256         struct net_device *netdev = handle->kinfo.netdev;
4257         bool vlan_filter_enable;
4258         int ret;
4259
4260         ret = hns3_init_mac_addr(netdev, false);
4261         if (ret)
4262                 return ret;
4263
4264         ret = hns3_recover_hw_addr(netdev);
4265         if (ret)
4266                 return ret;
4267
4268         ret = hns3_update_promisc_mode(netdev, handle->netdev_flags);
4269         if (ret)
4270                 return ret;
4271
4272         vlan_filter_enable = netdev->flags & IFF_PROMISC ? false : true;
4273         hns3_enable_vlan_filter(netdev, vlan_filter_enable);
4274
4275         /* Hardware table is only clear when pf resets */
4276         if (!(handle->flags & HNAE3_SUPPORT_VF)) {
4277                 ret = hns3_restore_vlan(netdev);
4278                 if (ret)
4279                         return ret;
4280         }
4281
4282         return hns3_restore_fd_rules(netdev);
4283 }
4284
4285 static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
4286 {
4287         struct net_device *netdev = handle->kinfo.netdev;
4288         struct hns3_nic_priv *priv = netdev_priv(netdev);
4289         int ret;
4290
4291         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4292                 netdev_warn(netdev, "already uninitialized\n");
4293                 return 0;
4294         }
4295
4296         hns3_force_clear_all_rx_ring(handle);
4297
4298         hns3_nic_uninit_vector_data(priv);
4299
4300         hns3_store_coal(priv);
4301
4302         ret = hns3_nic_dealloc_vector_data(priv);
4303         if (ret)
4304                 netdev_err(netdev, "dealloc vector error\n");
4305
4306         ret = hns3_uninit_all_ring(priv);
4307         if (ret)
4308                 netdev_err(netdev, "uninit ring error\n");
4309
4310         hns3_put_ring_config(priv);
4311
4312         return ret;
4313 }
4314
4315 static int hns3_reset_notify(struct hnae3_handle *handle,
4316                              enum hnae3_reset_notify_type type)
4317 {
4318         int ret = 0;
4319
4320         switch (type) {
4321         case HNAE3_UP_CLIENT:
4322                 ret = hns3_reset_notify_up_enet(handle);
4323                 break;
4324         case HNAE3_DOWN_CLIENT:
4325                 ret = hns3_reset_notify_down_enet(handle);
4326                 break;
4327         case HNAE3_INIT_CLIENT:
4328                 ret = hns3_reset_notify_init_enet(handle);
4329                 break;
4330         case HNAE3_UNINIT_CLIENT:
4331                 ret = hns3_reset_notify_uninit_enet(handle);
4332                 break;
4333         case HNAE3_RESTORE_CLIENT:
4334                 ret = hns3_reset_notify_restore_enet(handle);
4335                 break;
4336         default:
4337                 break;
4338         }
4339
4340         return ret;
4341 }
4342
4343 int hns3_set_channels(struct net_device *netdev,
4344                       struct ethtool_channels *ch)
4345 {
4346         struct hnae3_handle *h = hns3_get_handle(netdev);
4347         struct hnae3_knic_private_info *kinfo = &h->kinfo;
4348         bool rxfh_configured = netif_is_rxfh_configured(netdev);
4349         u32 new_tqp_num = ch->combined_count;
4350         u16 org_tqp_num;
4351         int ret;
4352
4353         if (ch->rx_count || ch->tx_count)
4354                 return -EINVAL;
4355
4356         if (new_tqp_num > hns3_get_max_available_channels(h) ||
4357             new_tqp_num < 1) {
4358                 dev_err(&netdev->dev,
4359                         "Change tqps fail, the tqp range is from 1 to %d",
4360                         hns3_get_max_available_channels(h));
4361                 return -EINVAL;
4362         }
4363
4364         if (kinfo->rss_size == new_tqp_num)
4365                 return 0;
4366
4367         ret = hns3_reset_notify(h, HNAE3_DOWN_CLIENT);
4368         if (ret)
4369                 return ret;
4370
4371         ret = hns3_reset_notify(h, HNAE3_UNINIT_CLIENT);
4372         if (ret)
4373                 return ret;
4374
4375         org_tqp_num = h->kinfo.num_tqps;
4376         ret = h->ae_algo->ops->set_channels(h, new_tqp_num, rxfh_configured);
4377         if (ret) {
4378                 ret = h->ae_algo->ops->set_channels(h, org_tqp_num,
4379                                                     rxfh_configured);
4380                 if (ret) {
4381                         /* If revert to old tqp failed, fatal error occurred */
4382                         dev_err(&netdev->dev,
4383                                 "Revert to old tqp num fail, ret=%d", ret);
4384                         return ret;
4385                 }
4386                 dev_info(&netdev->dev,
4387                          "Change tqp num fail, Revert to old tqp num");
4388         }
4389         ret = hns3_reset_notify(h, HNAE3_INIT_CLIENT);
4390         if (ret)
4391                 return ret;
4392
4393         return hns3_reset_notify(h, HNAE3_UP_CLIENT);
4394 }
4395
4396 static const struct hnae3_client_ops client_ops = {
4397         .init_instance = hns3_client_init,
4398         .uninit_instance = hns3_client_uninit,
4399         .link_status_change = hns3_link_status_change,
4400         .setup_tc = hns3_client_setup_tc,
4401         .reset_notify = hns3_reset_notify,
4402 };
4403
4404 /* hns3_init_module - Driver registration routine
4405  * hns3_init_module is the first routine called when the driver is
4406  * loaded. All it does is register with the PCI subsystem.
4407  */
4408 static int __init hns3_init_module(void)
4409 {
4410         int ret;
4411
4412         pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
4413         pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
4414
4415         client.type = HNAE3_CLIENT_KNIC;
4416         snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
4417                  hns3_driver_name);
4418
4419         client.ops = &client_ops;
4420
4421         INIT_LIST_HEAD(&client.node);
4422
4423         hns3_dbg_register_debugfs(hns3_driver_name);
4424
4425         ret = hnae3_register_client(&client);
4426         if (ret)
4427                 goto err_reg_client;
4428
4429         ret = pci_register_driver(&hns3_driver);
4430         if (ret)
4431                 goto err_reg_driver;
4432
4433         return ret;
4434
4435 err_reg_driver:
4436         hnae3_unregister_client(&client);
4437 err_reg_client:
4438         hns3_dbg_unregister_debugfs();
4439         return ret;
4440 }
4441 module_init(hns3_init_module);
4442
4443 /* hns3_exit_module - Driver exit cleanup routine
4444  * hns3_exit_module is called just before the driver is removed
4445  * from memory.
4446  */
4447 static void __exit hns3_exit_module(void)
4448 {
4449         pci_unregister_driver(&hns3_driver);
4450         hnae3_unregister_client(&client);
4451         hns3_dbg_unregister_debugfs();
4452 }
4453 module_exit(hns3_exit_module);
4454
4455 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
4456 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
4457 MODULE_LICENSE("GPL");
4458 MODULE_ALIAS("pci:hns-nic");
4459 MODULE_VERSION(HNS3_MOD_VERSION);