drivers/net/ethernet/hisilicon/hns3/hnae3.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #ifndef __HNAE3_H
   5 #define __HNAE3_H
   6
   7 /* Names used in this framework:
   8  *      ae handle (handle):
   9  *        a set of queues provided by AE
  10  *      ring buffer queue (rbq):
  11  *        the channel between upper layer and the AE, can do tx and rx
  12  *      ring:
  13  *        a tx or rx channel within a rbq
  14  *      ring description (desc):
  15  *        an element in the ring with packet information
  16  *      buffer:
  17  *        a memory region referred by desc with the full packet payload
  18  *
  19  * "num" means a static number set as a parameter, "count" mean a dynamic
  20  *   number set while running
  21  * "cb" means control block
  22  */
  23
  24 #include <linux/acpi.h>
  25 #include <linux/dcbnl.h>
  26 #include <linux/delay.h>
  27 #include <linux/device.h>
  28 #include <linux/ethtool.h>
  29 #include <linux/module.h>
  30 #include <linux/netdevice.h>
  31 #include <linux/pci.h>
  32 #include <linux/pkt_sched.h>
  33 #include <linux/types.h>
  34 #include <net/pkt_cls.h>
  35
  36 #define HNAE3_MOD_VERSION "1.0"
  37
  38 #define HNAE3_MIN_VECTOR_NUM    2 /* first one for misc, another for IO */
  39
  40 /* Device version */
  41 #define HNAE3_DEVICE_VERSION_V1   0x00020
  42 #define HNAE3_DEVICE_VERSION_V2   0x00021
  43 #define HNAE3_DEVICE_VERSION_V3   0x00030
  44
  45 #define HNAE3_PCI_REVISION_BIT_SIZE             8
  46
  47 /* Device IDs */
  48 #define HNAE3_DEV_ID_GE                         0xA220
  49 #define HNAE3_DEV_ID_25GE                       0xA221
  50 #define HNAE3_DEV_ID_25GE_RDMA                  0xA222
  51 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC           0xA223
  52 #define HNAE3_DEV_ID_50GE_RDMA                  0xA224
  53 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC           0xA225
  54 #define HNAE3_DEV_ID_100G_RDMA_MACSEC           0xA226
  55 #define HNAE3_DEV_ID_200G_RDMA                  0xA228
  56 #define HNAE3_DEV_ID_VF                         0xA22E
  57 #define HNAE3_DEV_ID_RDMA_DCB_PFC_VF            0xA22F
  58
  59 #define HNAE3_CLASS_NAME_SIZE 16
  60
  61 #define HNAE3_DEV_INITED_B                      0x0
  62 #define HNAE3_DEV_SUPPORT_ROCE_B                0x1
  63 #define HNAE3_DEV_SUPPORT_DCB_B                 0x2
  64 #define HNAE3_KNIC_CLIENT_INITED_B              0x3
  65 #define HNAE3_UNIC_CLIENT_INITED_B              0x4
  66 #define HNAE3_ROCE_CLIENT_INITED_B              0x5
  67
  68 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) | \
  69                 BIT(HNAE3_DEV_SUPPORT_ROCE_B))
  70
  71 #define hnae3_dev_roce_supported(hdev) \
  72         hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
  73
  74 #define hnae3_dev_dcb_supported(hdev) \
  75         hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
  76
  77 enum HNAE3_DEV_CAP_BITS {
  78         HNAE3_DEV_SUPPORT_FD_B,
  79         HNAE3_DEV_SUPPORT_GRO_B,
  80         HNAE3_DEV_SUPPORT_FEC_B,
  81         HNAE3_DEV_SUPPORT_UDP_GSO_B,
  82         HNAE3_DEV_SUPPORT_QB_B,
  83         HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B,
  84         HNAE3_DEV_SUPPORT_PTP_B,
  85         HNAE3_DEV_SUPPORT_INT_QL_B,
  86         HNAE3_DEV_SUPPORT_HW_TX_CSUM_B,
  87         HNAE3_DEV_SUPPORT_TX_PUSH_B,
  88         HNAE3_DEV_SUPPORT_PHY_IMP_B,
  89         HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B,
  90         HNAE3_DEV_SUPPORT_HW_PAD_B,
  91         HNAE3_DEV_SUPPORT_STASH_B,
  92         HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B,
  93         HNAE3_DEV_SUPPORT_PAUSE_B,
  94         HNAE3_DEV_SUPPORT_RAS_IMP_B,
  95         HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B,
  96         HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B,
  97         HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B,
  98 };
  99
 100 #define hnae3_dev_fd_supported(hdev) \
 101         test_bit(HNAE3_DEV_SUPPORT_FD_B, (hdev)->ae_dev->caps)
 102
 103 #define hnae3_dev_gro_supported(hdev) \
 104         test_bit(HNAE3_DEV_SUPPORT_GRO_B, (hdev)->ae_dev->caps)
 105
 106 #define hnae3_dev_fec_supported(hdev) \
 107         test_bit(HNAE3_DEV_SUPPORT_FEC_B, (hdev)->ae_dev->caps)
 108
 109 #define hnae3_dev_udp_gso_supported(hdev) \
 110         test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, (hdev)->ae_dev->caps)
 111
 112 #define hnae3_dev_qb_supported(hdev) \
 113         test_bit(HNAE3_DEV_SUPPORT_QB_B, (hdev)->ae_dev->caps)
 114
 115 #define hnae3_dev_fd_forward_tc_supported(hdev) \
 116         test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, (hdev)->ae_dev->caps)
 117
 118 #define hnae3_dev_ptp_supported(hdev) \
 119         test_bit(HNAE3_DEV_SUPPORT_PTP_B, (hdev)->ae_dev->caps)
 120
 121 #define hnae3_dev_int_ql_supported(hdev) \
 122         test_bit(HNAE3_DEV_SUPPORT_INT_QL_B, (hdev)->ae_dev->caps)
 123
 124 #define hnae3_dev_hw_csum_supported(hdev) \
 125         test_bit(HNAE3_DEV_SUPPORT_HW_TX_CSUM_B, (hdev)->ae_dev->caps)
 126
 127 #define hnae3_dev_tx_push_supported(hdev) \
 128         test_bit(HNAE3_DEV_SUPPORT_TX_PUSH_B, (hdev)->ae_dev->caps)
 129
 130 #define hnae3_dev_phy_imp_supported(hdev) \
 131         test_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, (hdev)->ae_dev->caps)
 132
 133 #define hnae3_dev_ras_imp_supported(hdev) \
 134         test_bit(HNAE3_DEV_SUPPORT_RAS_IMP_B, (hdev)->ae_dev->caps)
 135
 136 #define hnae3_dev_tqp_txrx_indep_supported(hdev) \
 137         test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (hdev)->ae_dev->caps)
 138
 139 #define hnae3_dev_hw_pad_supported(hdev) \
 140         test_bit(HNAE3_DEV_SUPPORT_HW_PAD_B, (hdev)->ae_dev->caps)
 141
 142 #define hnae3_dev_stash_supported(hdev) \
 143         test_bit(HNAE3_DEV_SUPPORT_STASH_B, (hdev)->ae_dev->caps)
 144
 145 #define hnae3_dev_pause_supported(hdev) \
 146         test_bit(HNAE3_DEV_SUPPORT_PAUSE_B, (hdev)->ae_dev->caps)
 147
 148 #define hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev) \
 149         test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (ae_dev)->caps)
 150
 151 #define hnae3_ae_dev_rxd_adv_layout_supported(ae_dev) \
 152         test_bit(HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B, (ae_dev)->caps)
 153
 154 enum HNAE3_PF_CAP_BITS {
 155         HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B = 0,
 156 };
 157 #define ring_ptr_move_fw(ring, p) \
 158         ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
 159 #define ring_ptr_move_bw(ring, p) \
 160         ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
 161
 162 struct hnae3_handle;
 163
 164 struct hnae3_queue {
 165         void __iomem *io_base;
 166         struct hnae3_ae_algo *ae_algo;
 167         struct hnae3_handle *handle;
 168         int tqp_index;          /* index in a handle */
 169         u32 buf_size;           /* size for hnae_desc->addr, preset by AE */
 170         u16 tx_desc_num;        /* total number of tx desc */
 171         u16 rx_desc_num;        /* total number of rx desc */
 172 };
 173
 174 struct hns3_mac_stats {
 175         u64 tx_pause_cnt;
 176         u64 rx_pause_cnt;
 177 };
 178
 179 /* hnae3 loop mode */
 180 enum hnae3_loop {
 181         HNAE3_LOOP_APP,
 182         HNAE3_LOOP_SERIAL_SERDES,
 183         HNAE3_LOOP_PARALLEL_SERDES,
 184         HNAE3_LOOP_PHY,
 185         HNAE3_LOOP_NONE,
 186 };
 187
 188 enum hnae3_client_type {
 189         HNAE3_CLIENT_KNIC,
 190         HNAE3_CLIENT_ROCE,
 191 };
 192
 193 /* mac media type */
 194 enum hnae3_media_type {
 195         HNAE3_MEDIA_TYPE_UNKNOWN,
 196         HNAE3_MEDIA_TYPE_FIBER,
 197         HNAE3_MEDIA_TYPE_COPPER,
 198         HNAE3_MEDIA_TYPE_BACKPLANE,
 199         HNAE3_MEDIA_TYPE_NONE,
 200 };
 201
 202 /* must be consistent with definition in firmware */
 203 enum hnae3_module_type {
 204         HNAE3_MODULE_TYPE_UNKNOWN       = 0x00,
 205         HNAE3_MODULE_TYPE_FIBRE_LR      = 0x01,
 206         HNAE3_MODULE_TYPE_FIBRE_SR      = 0x02,
 207         HNAE3_MODULE_TYPE_AOC           = 0x03,
 208         HNAE3_MODULE_TYPE_CR            = 0x04,
 209         HNAE3_MODULE_TYPE_KR            = 0x05,
 210         HNAE3_MODULE_TYPE_TP            = 0x06,
 211 };
 212
 213 enum hnae3_fec_mode {
 214         HNAE3_FEC_AUTO = 0,
 215         HNAE3_FEC_BASER,
 216         HNAE3_FEC_RS,
 217         HNAE3_FEC_USER_DEF,
 218 };
 219
 220 enum hnae3_reset_notify_type {
 221         HNAE3_UP_CLIENT,
 222         HNAE3_DOWN_CLIENT,
 223         HNAE3_INIT_CLIENT,
 224         HNAE3_UNINIT_CLIENT,
 225 };
 226
 227 enum hnae3_hw_error_type {
 228         HNAE3_PPU_POISON_ERROR,
 229         HNAE3_CMDQ_ECC_ERROR,
 230         HNAE3_IMP_RD_POISON_ERROR,
 231         HNAE3_ROCEE_AXI_RESP_ERROR,
 232 };
 233
 234 enum hnae3_reset_type {
 235         HNAE3_VF_RESET,
 236         HNAE3_VF_FUNC_RESET,
 237         HNAE3_VF_PF_FUNC_RESET,
 238         HNAE3_VF_FULL_RESET,
 239         HNAE3_FLR_RESET,
 240         HNAE3_FUNC_RESET,
 241         HNAE3_GLOBAL_RESET,
 242         HNAE3_IMP_RESET,
 243         HNAE3_NONE_RESET,
 244         HNAE3_MAX_RESET,
 245 };
 246
 247 enum hnae3_port_base_vlan_state {
 248         HNAE3_PORT_BASE_VLAN_DISABLE,
 249         HNAE3_PORT_BASE_VLAN_ENABLE,
 250         HNAE3_PORT_BASE_VLAN_MODIFY,
 251         HNAE3_PORT_BASE_VLAN_NOCHANGE,
 252 };
 253
 254 enum hnae3_dbg_cmd {
 255         HNAE3_DBG_CMD_TM_NODES,
 256         HNAE3_DBG_CMD_TM_PRI,
 257         HNAE3_DBG_CMD_TM_QSET,
 258         HNAE3_DBG_CMD_TM_MAP,
 259         HNAE3_DBG_CMD_TM_PG,
 260         HNAE3_DBG_CMD_TM_PORT,
 261         HNAE3_DBG_CMD_TC_SCH_INFO,
 262         HNAE3_DBG_CMD_QOS_PAUSE_CFG,
 263         HNAE3_DBG_CMD_QOS_PRI_MAP,
 264         HNAE3_DBG_CMD_QOS_BUF_CFG,
 265         HNAE3_DBG_CMD_DEV_INFO,
 266         HNAE3_DBG_CMD_TX_BD,
 267         HNAE3_DBG_CMD_RX_BD,
 268         HNAE3_DBG_CMD_MAC_UC,
 269         HNAE3_DBG_CMD_MAC_MC,
 270         HNAE3_DBG_CMD_MNG_TBL,
 271         HNAE3_DBG_CMD_LOOPBACK,
 272         HNAE3_DBG_CMD_PTP_INFO,
 273         HNAE3_DBG_CMD_INTERRUPT_INFO,
 274         HNAE3_DBG_CMD_RESET_INFO,
 275         HNAE3_DBG_CMD_IMP_INFO,
 276         HNAE3_DBG_CMD_NCL_CONFIG,
 277         HNAE3_DBG_CMD_REG_BIOS_COMMON,
 278         HNAE3_DBG_CMD_REG_SSU,
 279         HNAE3_DBG_CMD_REG_IGU_EGU,
 280         HNAE3_DBG_CMD_REG_RPU,
 281         HNAE3_DBG_CMD_REG_NCSI,
 282         HNAE3_DBG_CMD_REG_RTC,
 283         HNAE3_DBG_CMD_REG_PPP,
 284         HNAE3_DBG_CMD_REG_RCB,
 285         HNAE3_DBG_CMD_REG_TQP,
 286         HNAE3_DBG_CMD_REG_MAC,
 287         HNAE3_DBG_CMD_REG_DCB,
 288         HNAE3_DBG_CMD_VLAN_CONFIG,
 289         HNAE3_DBG_CMD_QUEUE_MAP,
 290         HNAE3_DBG_CMD_RX_QUEUE_INFO,
 291         HNAE3_DBG_CMD_TX_QUEUE_INFO,
 292         HNAE3_DBG_CMD_FD_TCAM,
 293         HNAE3_DBG_CMD_FD_COUNTER,
 294         HNAE3_DBG_CMD_MAC_TNL_STATUS,
 295         HNAE3_DBG_CMD_SERV_INFO,
 296         HNAE3_DBG_CMD_UMV_INFO,
 297         HNAE3_DBG_CMD_UNKNOWN,
 298 };
 299
 300 struct hnae3_vector_info {
 301         u8 __iomem *io_addr;
 302         int vector;
 303 };
 304
 305 #define HNAE3_RING_TYPE_B 0
 306 #define HNAE3_RING_TYPE_TX 0
 307 #define HNAE3_RING_TYPE_RX 1
 308 #define HNAE3_RING_GL_IDX_S 0
 309 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0)
 310 #define HNAE3_RING_GL_RX 0
 311 #define HNAE3_RING_GL_TX 1
 312
 313 #define HNAE3_FW_VERSION_BYTE3_SHIFT    24
 314 #define HNAE3_FW_VERSION_BYTE3_MASK     GENMASK(31, 24)
 315 #define HNAE3_FW_VERSION_BYTE2_SHIFT    16
 316 #define HNAE3_FW_VERSION_BYTE2_MASK     GENMASK(23, 16)
 317 #define HNAE3_FW_VERSION_BYTE1_SHIFT    8
 318 #define HNAE3_FW_VERSION_BYTE1_MASK     GENMASK(15, 8)
 319 #define HNAE3_FW_VERSION_BYTE0_SHIFT    0
 320 #define HNAE3_FW_VERSION_BYTE0_MASK     GENMASK(7, 0)
 321
 322 struct hnae3_ring_chain_node {
 323         struct hnae3_ring_chain_node *next;
 324         u32 tqp_index;
 325         u32 flag;
 326         u32 int_gl_idx;
 327 };
 328
 329 #define HNAE3_IS_TX_RING(node) \
 330         (((node)->flag & 1 << HNAE3_RING_TYPE_B) == HNAE3_RING_TYPE_TX)
 331
 332 /* device specification info from firmware */
 333 struct hnae3_dev_specs {
 334         u32 mac_entry_num; /* number of mac-vlan table entry */
 335         u32 mng_entry_num; /* number of manager table entry */
 336         u32 max_tm_rate;
 337         u16 rss_ind_tbl_size;
 338         u16 rss_key_size;
 339         u16 int_ql_max; /* max value of interrupt coalesce based on INT_QL */
 340         u16 max_int_gl; /* max value of interrupt coalesce based on INT_GL */
 341         u8 max_non_tso_bd_num; /* max BD number of one non-TSO packet */
 342         u16 max_frm_size;
 343         u16 max_qset_num;
 344 };
 345
 346 struct hnae3_client_ops {
 347         int (*init_instance)(struct hnae3_handle *handle);
 348         void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
 349         void (*link_status_change)(struct hnae3_handle *handle, bool state);
 350         int (*reset_notify)(struct hnae3_handle *handle,
 351                             enum hnae3_reset_notify_type type);
 352         void (*process_hw_error)(struct hnae3_handle *handle,
 353                                  enum hnae3_hw_error_type);
 354 };
 355
 356 #define HNAE3_CLIENT_NAME_LENGTH 16
 357 struct hnae3_client {
 358         char name[HNAE3_CLIENT_NAME_LENGTH];
 359         unsigned long state;
 360         enum hnae3_client_type type;
 361         const struct hnae3_client_ops *ops;
 362         struct list_head node;
 363 };
 364
 365 #define HNAE3_DEV_CAPS_MAX_NUM  96
 366 struct hnae3_ae_dev {
 367         struct pci_dev *pdev;
 368         const struct hnae3_ae_ops *ops;
 369         struct list_head node;
 370         u32 flag;
 371         unsigned long hw_err_reset_req;
 372         struct hnae3_dev_specs dev_specs;
 373         u32 dev_version;
 374         unsigned long caps[BITS_TO_LONGS(HNAE3_DEV_CAPS_MAX_NUM)];
 375         void *priv;
 376 };
 377
 378 /* This struct defines the operation on the handle.
 379  *
 380  * init_ae_dev(): (mandatory)
 381  *   Get PF configure from pci_dev and initialize PF hardware
 382  * uninit_ae_dev()
 383  *   Disable PF device and release PF resource
 384  * register_client
 385  *   Register client to ae_dev
 386  * unregister_client()
 387  *   Unregister client from ae_dev
 388  * start()
 389  *   Enable the hardware
 390  * stop()
 391  *   Disable the hardware
 392  * start_client()
 393  *   Inform the hclge that client has been started
 394  * stop_client()
 395  *   Inform the hclge that client has been stopped
 396  * get_status()
 397  *   Get the carrier state of the back channel of the handle, 1 for ok, 0 for
 398  *   non-ok
 399  * get_ksettings_an_result()
 400  *   Get negotiation status,speed and duplex
 401  * get_media_type()
 402  *   Get media type of MAC
 403  * check_port_speed()
 404  *   Check target speed whether is supported
 405  * adjust_link()
 406  *   Adjust link status
 407  * set_loopback()
 408  *   Set loopback
 409  * set_promisc_mode
 410  *   Set promisc mode
 411  * request_update_promisc_mode
 412  *   request to hclge(vf) to update promisc mode
 413  * set_mtu()
 414  *   set mtu
 415  * get_pauseparam()
 416  *   get tx and rx of pause frame use
 417  * set_pauseparam()
 418  *   set tx and rx of pause frame use
 419  * set_autoneg()
 420  *   set auto autonegotiation of pause frame use
 421  * get_autoneg()
 422  *   get auto autonegotiation of pause frame use
 423  * restart_autoneg()
 424  *   restart autonegotiation
 425  * halt_autoneg()
 426  *   halt/resume autonegotiation when autonegotiation on
 427  * get_coalesce_usecs()
 428  *   get usecs to delay a TX interrupt after a packet is sent
 429  * get_rx_max_coalesced_frames()
 430  *   get Maximum number of packets to be sent before a TX interrupt.
 431  * set_coalesce_usecs()
 432  *   set usecs to delay a TX interrupt after a packet is sent
 433  * set_coalesce_frames()
 434  *   set Maximum number of packets to be sent before a TX interrupt.
 435  * get_mac_addr()
 436  *   get mac address
 437  * set_mac_addr()
 438  *   set mac address
 439  * add_uc_addr
 440  *   Add unicast addr to mac table
 441  * rm_uc_addr
 442  *   Remove unicast addr from mac table
 443  * set_mc_addr()
 444  *   Set multicast address
 445  * add_mc_addr
 446  *   Add multicast address to mac table
 447  * rm_mc_addr
 448  *   Remove multicast address from mac table
 449  * update_stats()
 450  *   Update Old network device statistics
 451  * get_mac_stats()
 452  *   get mac pause statistics including tx_cnt and rx_cnt
 453  * get_ethtool_stats()
 454  *   Get ethtool network device statistics
 455  * get_strings()
 456  *   Get a set of strings that describe the requested objects
 457  * get_sset_count()
 458  *   Get number of strings that @get_strings will write
 459  * update_led_status()
 460  *   Update the led status
 461  * set_led_id()
 462  *   Set led id
 463  * get_regs()
 464  *   Get regs dump
 465  * get_regs_len()
 466  *   Get the len of the regs dump
 467  * get_rss_key_size()
 468  *   Get rss key size
 469  * get_rss()
 470  *   Get rss table
 471  * set_rss()
 472  *   Set rss table
 473  * get_tc_size()
 474  *   Get tc size of handle
 475  * get_vector()
 476  *   Get vector number and vector information
 477  * put_vector()
 478  *   Put the vector in hdev
 479  * map_ring_to_vector()
 480  *   Map rings to vector
 481  * unmap_ring_from_vector()
 482  *   Unmap rings from vector
 483  * reset_queue()
 484  *   Reset queue
 485  * get_fw_version()
 486  *   Get firmware version
 487  * get_mdix_mode()
 488  *   Get media typr of phy
 489  * enable_vlan_filter()
 490  *   Enable vlan filter
 491  * set_vlan_filter()
 492  *   Set vlan filter config of Ports
 493  * set_vf_vlan_filter()
 494  *   Set vlan filter config of vf
 495  * enable_hw_strip_rxvtag()
 496  *   Enable/disable hardware strip vlan tag of packets received
 497  * set_gro_en
 498  *   Enable/disable HW GRO
 499  * add_arfs_entry
 500  *   Check the 5-tuples of flow, and create flow director rule
 501  * get_vf_config
 502  *   Get the VF configuration setting by the host
 503  * set_vf_link_state
 504  *   Set VF link status
 505  * set_vf_spoofchk
 506  *   Enable/disable spoof check for specified vf
 507  * set_vf_trust
 508  *   Enable/disable trust for specified vf, if the vf being trusted, then
 509  *   it can enable promisc mode
 510  * set_vf_rate
 511  *   Set the max tx rate of specified vf.
 512  * set_vf_mac
 513  *   Configure the default MAC for specified VF
 514  * get_module_eeprom
 515  *   Get the optical module eeprom info.
 516  * add_cls_flower
 517  *   Add clsflower rule
 518  * del_cls_flower
 519  *   Delete clsflower rule
 520  * cls_flower_active
 521  *   Check if any cls flower rule exist
 522  * dbg_read_cmd
 523  *   Execute debugfs read command.
 524  * set_tx_hwts_info
 525  *   Save information for 1588 tx packet
 526  * get_rx_hwts
 527  *   Get 1588 rx hwstamp
 528  * get_ts_info
 529  *   Get phc info
 530  */
 531 struct hnae3_ae_ops {
 532         int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
 533         void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
 534         void (*reset_prepare)(struct hnae3_ae_dev *ae_dev,
 535                               enum hnae3_reset_type rst_type);
 536         void (*reset_done)(struct hnae3_ae_dev *ae_dev);
 537         int (*init_client_instance)(struct hnae3_client *client,
 538                                     struct hnae3_ae_dev *ae_dev);
 539         void (*uninit_client_instance)(struct hnae3_client *client,
 540                                        struct hnae3_ae_dev *ae_dev);
 541         int (*start)(struct hnae3_handle *handle);
 542         void (*stop)(struct hnae3_handle *handle);
 543         int (*client_start)(struct hnae3_handle *handle);
 544         void (*client_stop)(struct hnae3_handle *handle);
 545         int (*get_status)(struct hnae3_handle *handle);
 546         void (*get_ksettings_an_result)(struct hnae3_handle *handle,
 547                                         u8 *auto_neg, u32 *speed, u8 *duplex);
 548
 549         int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
 550                                    u8 duplex);
 551
 552         void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type,
 553                                u8 *module_type);
 554         int (*check_port_speed)(struct hnae3_handle *handle, u32 speed);
 555         void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability,
 556                         u8 *fec_mode);
 557         int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode);
 558         void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
 559         int (*set_loopback)(struct hnae3_handle *handle,
 560                             enum hnae3_loop loop_mode, bool en);
 561
 562         int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc,
 563                                 bool en_mc_pmc);
 564         void (*request_update_promisc_mode)(struct hnae3_handle *handle);
 565         int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
 566
 567         void (*get_pauseparam)(struct hnae3_handle *handle,
 568                                u32 *auto_neg, u32 *rx_en, u32 *tx_en);
 569         int (*set_pauseparam)(struct hnae3_handle *handle,
 570                               u32 auto_neg, u32 rx_en, u32 tx_en);
 571
 572         int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
 573         int (*get_autoneg)(struct hnae3_handle *handle);
 574         int (*restart_autoneg)(struct hnae3_handle *handle);
 575         int (*halt_autoneg)(struct hnae3_handle *handle, bool halt);
 576
 577         void (*get_coalesce_usecs)(struct hnae3_handle *handle,
 578                                    u32 *tx_usecs, u32 *rx_usecs);
 579         void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
 580                                             u32 *tx_frames, u32 *rx_frames);
 581         int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
 582         int (*set_coalesce_frames)(struct hnae3_handle *handle,
 583                                    u32 coalesce_frames);
 584         void (*get_coalesce_range)(struct hnae3_handle *handle,
 585                                    u32 *tx_frames_low, u32 *rx_frames_low,
 586                                    u32 *tx_frames_high, u32 *rx_frames_high,
 587                                    u32 *tx_usecs_low, u32 *rx_usecs_low,
 588                                    u32 *tx_usecs_high, u32 *rx_usecs_high);
 589
 590         void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
 591         int (*set_mac_addr)(struct hnae3_handle *handle, void *p,
 592                             bool is_first);
 593         int (*do_ioctl)(struct hnae3_handle *handle,
 594                         struct ifreq *ifr, int cmd);
 595         int (*add_uc_addr)(struct hnae3_handle *handle,
 596                            const unsigned char *addr);
 597         int (*rm_uc_addr)(struct hnae3_handle *handle,
 598                           const unsigned char *addr);
 599         int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
 600         int (*add_mc_addr)(struct hnae3_handle *handle,
 601                            const unsigned char *addr);
 602         int (*rm_mc_addr)(struct hnae3_handle *handle,
 603                           const unsigned char *addr);
 604         void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
 605         void (*update_stats)(struct hnae3_handle *handle,
 606                              struct net_device_stats *net_stats);
 607         void (*get_stats)(struct hnae3_handle *handle, u64 *data);
 608         void (*get_mac_stats)(struct hnae3_handle *handle,
 609                               struct hns3_mac_stats *mac_stats);
 610         void (*get_strings)(struct hnae3_handle *handle,
 611                             u32 stringset, u8 *data);
 612         int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
 613
 614         void (*get_regs)(struct hnae3_handle *handle, u32 *version,
 615                          void *data);
 616         int (*get_regs_len)(struct hnae3_handle *handle);
 617
 618         u32 (*get_rss_key_size)(struct hnae3_handle *handle);
 619         int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
 620                        u8 *hfunc);
 621         int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
 622                        const u8 *key, const u8 hfunc);
 623         int (*set_rss_tuple)(struct hnae3_handle *handle,
 624                              struct ethtool_rxnfc *cmd);
 625         int (*get_rss_tuple)(struct hnae3_handle *handle,
 626                              struct ethtool_rxnfc *cmd);
 627
 628         int (*get_tc_size)(struct hnae3_handle *handle);
 629
 630         int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
 631                           struct hnae3_vector_info *vector_info);
 632         int (*put_vector)(struct hnae3_handle *handle, int vector_num);
 633         int (*map_ring_to_vector)(struct hnae3_handle *handle,
 634                                   int vector_num,
 635                                   struct hnae3_ring_chain_node *vr_chain);
 636         int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
 637                                       int vector_num,
 638                                       struct hnae3_ring_chain_node *vr_chain);
 639
 640         int (*reset_queue)(struct hnae3_handle *handle);
 641         u32 (*get_fw_version)(struct hnae3_handle *handle);
 642         void (*get_mdix_mode)(struct hnae3_handle *handle,
 643                               u8 *tp_mdix_ctrl, u8 *tp_mdix);
 644
 645         int (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);
 646         int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
 647                                u16 vlan_id, bool is_kill);
 648         int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
 649                                   u16 vlan, u8 qos, __be16 proto);
 650         int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable);
 651         void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle);
 652         enum hnae3_reset_type (*get_reset_level)(struct hnae3_ae_dev *ae_dev,
 653                                                  unsigned long *addr);
 654         void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev,
 655                                           enum hnae3_reset_type rst_type);
 656         void (*get_channels)(struct hnae3_handle *handle,
 657                              struct ethtool_channels *ch);
 658         void (*get_tqps_and_rss_info)(struct hnae3_handle *h,
 659                                       u16 *alloc_tqps, u16 *max_rss_size);
 660         int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num,
 661                             bool rxfh_configured);
 662         void (*get_flowctrl_adv)(struct hnae3_handle *handle,
 663                                  u32 *flowctrl_adv);
 664         int (*set_led_id)(struct hnae3_handle *handle,
 665                           enum ethtool_phys_id_state status);
 666         void (*get_link_mode)(struct hnae3_handle *handle,
 667                               unsigned long *supported,
 668                               unsigned long *advertising);
 669         int (*add_fd_entry)(struct hnae3_handle *handle,
 670                             struct ethtool_rxnfc *cmd);
 671         int (*del_fd_entry)(struct hnae3_handle *handle,
 672                             struct ethtool_rxnfc *cmd);
 673         int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
 674                                struct ethtool_rxnfc *cmd);
 675         int (*get_fd_rule_info)(struct hnae3_handle *handle,
 676                                 struct ethtool_rxnfc *cmd);
 677         int (*get_fd_all_rules)(struct hnae3_handle *handle,
 678                                 struct ethtool_rxnfc *cmd, u32 *rule_locs);
 679         void (*enable_fd)(struct hnae3_handle *handle, bool enable);
 680         int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id,
 681                               u16 flow_id, struct flow_keys *fkeys);
 682         int (*dbg_read_cmd)(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,
 683                             char *buf, int len);
 684         pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev);
 685         bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
 686         bool (*ae_dev_resetting)(struct hnae3_handle *handle);
 687         unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
 688         int (*set_gro_en)(struct hnae3_handle *handle, bool enable);
 689         u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id);
 690         void (*set_timer_task)(struct hnae3_handle *handle, bool enable);
 691         int (*mac_connect_phy)(struct hnae3_handle *handle);
 692         void (*mac_disconnect_phy)(struct hnae3_handle *handle);
 693         int (*get_vf_config)(struct hnae3_handle *handle, int vf,
 694                              struct ifla_vf_info *ivf);
 695         int (*set_vf_link_state)(struct hnae3_handle *handle, int vf,
 696                                  int link_state);
 697         int (*set_vf_spoofchk)(struct hnae3_handle *handle, int vf,
 698                                bool enable);
 699         int (*set_vf_trust)(struct hnae3_handle *handle, int vf, bool enable);
 700         int (*set_vf_rate)(struct hnae3_handle *handle, int vf,
 701                            int min_tx_rate, int max_tx_rate, bool force);
 702         int (*set_vf_mac)(struct hnae3_handle *handle, int vf, u8 *p);
 703         int (*get_module_eeprom)(struct hnae3_handle *handle, u32 offset,
 704                                  u32 len, u8 *data);
 705         bool (*get_cmdq_stat)(struct hnae3_handle *handle);
 706         int (*add_cls_flower)(struct hnae3_handle *handle,
 707                               struct flow_cls_offload *cls_flower, int tc);
 708         int (*del_cls_flower)(struct hnae3_handle *handle,
 709                               struct flow_cls_offload *cls_flower);
 710         bool (*cls_flower_active)(struct hnae3_handle *handle);
 711         int (*get_phy_link_ksettings)(struct hnae3_handle *handle,
 712                                       struct ethtool_link_ksettings *cmd);
 713         int (*set_phy_link_ksettings)(struct hnae3_handle *handle,
 714                                       const struct ethtool_link_ksettings *cmd);
 715         bool (*set_tx_hwts_info)(struct hnae3_handle *handle,
 716                                  struct sk_buff *skb);
 717         void (*get_rx_hwts)(struct hnae3_handle *handle, struct sk_buff *skb,
 718                             u32 nsec, u32 sec);
 719         int (*get_ts_info)(struct hnae3_handle *handle,
 720                            struct ethtool_ts_info *info);
 721         int (*get_link_diagnosis_info)(struct hnae3_handle *handle,
 722                                        u32 *status_code);
 723 };
 724
 725 struct hnae3_dcb_ops {
 726         /* IEEE 802.1Qaz std */
 727         int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
 728         int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
 729         int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
 730         int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
 731
 732         /* DCBX configuration */
 733         u8   (*getdcbx)(struct hnae3_handle *);
 734         u8   (*setdcbx)(struct hnae3_handle *, u8);
 735
 736         int (*setup_tc)(struct hnae3_handle *handle,
 737                         struct tc_mqprio_qopt_offload *mqprio_qopt);
 738 };
 739
 740 struct hnae3_ae_algo {
 741         const struct hnae3_ae_ops *ops;
 742         struct list_head node;
 743         const struct pci_device_id *pdev_id_table;
 744 };
 745
 746 #define HNAE3_INT_NAME_LEN        32
 747 #define HNAE3_ITR_COUNTDOWN_START 100
 748
 749 #define HNAE3_MAX_TC            8
 750 #define HNAE3_MAX_USER_PRIO     8
 751 struct hnae3_tc_info {
 752         u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */
 753         u16 tqp_count[HNAE3_MAX_TC];
 754         u16 tqp_offset[HNAE3_MAX_TC];
 755         unsigned long tc_en; /* bitmap of TC enabled */
 756         u8 num_tc; /* Total number of enabled TCs */
 757         bool mqprio_active;
 758 };
 759
 760 struct hnae3_knic_private_info {
 761         struct net_device *netdev; /* Set by KNIC client when init instance */
 762         u16 rss_size;              /* Allocated RSS queues */
 763         u16 req_rss_size;
 764         u16 rx_buf_len;
 765         u16 num_tx_desc;
 766         u16 num_rx_desc;
 767         u32 tx_spare_buf_size;
 768
 769         struct hnae3_tc_info tc_info;
 770
 771         u16 num_tqps;             /* total number of TQPs in this handle */
 772         struct hnae3_queue **tqp;  /* array base of all TQPs in this instance */
 773         const struct hnae3_dcb_ops *dcb_ops;
 774
 775         u16 int_rl_setting;
 776         enum pkt_hash_types rss_type;
 777         void __iomem *io_base;
 778 };
 779
 780 struct hnae3_roce_private_info {
 781         struct net_device *netdev;
 782         void __iomem *roce_io_base;
 783         void __iomem *roce_mem_base;
 784         int base_vector;
 785         int num_vectors;
 786
 787         /* The below attributes defined for RoCE client, hnae3 gives
 788          * initial values to them, and RoCE client can modify and use
 789          * them.
 790          */
 791         unsigned long reset_state;
 792         unsigned long instance_state;
 793         unsigned long state;
 794 };
 795
 796 #define HNAE3_SUPPORT_APP_LOOPBACK    BIT(0)
 797 #define HNAE3_SUPPORT_PHY_LOOPBACK    BIT(1)
 798 #define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK    BIT(2)
 799 #define HNAE3_SUPPORT_VF              BIT(3)
 800 #define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK  BIT(4)
 801
 802 #define HNAE3_USER_UPE          BIT(0)  /* unicast promisc enabled by user */
 803 #define HNAE3_USER_MPE          BIT(1)  /* mulitcast promisc enabled by user */
 804 #define HNAE3_BPE               BIT(2)  /* broadcast promisc enable */
 805 #define HNAE3_OVERFLOW_UPE      BIT(3)  /* unicast mac vlan overflow */
 806 #define HNAE3_OVERFLOW_MPE      BIT(4)  /* multicast mac vlan overflow */
 807 #define HNAE3_UPE               (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE)
 808 #define HNAE3_MPE               (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE)
 809
 810 enum hnae3_pflag {
 811         HNAE3_PFLAG_LIMIT_PROMISC,
 812         HNAE3_PFLAG_MAX
 813 };
 814
 815 struct hnae3_handle {
 816         struct hnae3_client *client;
 817         struct pci_dev *pdev;
 818         void *priv;
 819         struct hnae3_ae_algo *ae_algo;  /* the class who provides this handle */
 820         u64 flags; /* Indicate the capabilities for this handle */
 821
 822         union {
 823                 struct net_device *netdev; /* first member */
 824                 struct hnae3_knic_private_info kinfo;
 825                 struct hnae3_roce_private_info rinfo;
 826         };
 827
 828         u32 numa_node_mask;     /* for multi-chip support */
 829
 830         enum hnae3_port_base_vlan_state port_base_vlan_state;
 831
 832         u8 netdev_flags;
 833         struct dentry *hnae3_dbgfs;
 834
 835         /* Network interface message level enabled bits */
 836         u32 msg_enable;
 837
 838         unsigned long supported_pflags;
 839         unsigned long priv_flags;
 840 };
 841
 842 #define hnae3_set_field(origin, mask, shift, val) \
 843         do { \
 844                 (origin) &= (~(mask)); \
 845                 (origin) |= ((val) << (shift)) & (mask); \
 846         } while (0)
 847 #define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
 848
 849 #define hnae3_set_bit(origin, shift, val) \
 850         hnae3_set_field(origin, 0x1 << (shift), shift, val)
 851 #define hnae3_get_bit(origin, shift) \
 852         hnae3_get_field(origin, 0x1 << (shift), shift)
 853
 854 int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
 855 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
 856
 857 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
 858 void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
 859
 860 void hnae3_unregister_client(struct hnae3_client *client);
 861 int hnae3_register_client(struct hnae3_client *client);
 862
 863 void hnae3_set_client_init_flag(struct hnae3_client *client,
 864                                 struct hnae3_ae_dev *ae_dev,
 865                                 unsigned int inited);
 866 #endif