1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Google virtual Ethernet (gve) driver
4 * Copyright (C) 2015-2021 Google, Inc.
8 #include <linux/cpumask.h>
9 #include <linux/etherdevice.h>
10 #include <linux/filter.h>
11 #include <linux/interrupt.h>
12 #include <linux/module.h>
13 #include <linux/pci.h>
14 #include <linux/sched.h>
15 #include <linux/timer.h>
16 #include <linux/workqueue.h>
17 #include <linux/utsname.h>
18 #include <linux/version.h>
19 #include <net/sch_generic.h>
20 #include <net/xdp_sock_drv.h>
23 #include "gve_adminq.h"
24 #include "gve_register.h"
26 #define GVE_DEFAULT_RX_COPYBREAK (256)
28 #define DEFAULT_MSG_LEVEL (NETIF_MSG_DRV | NETIF_MSG_LINK)
29 #define GVE_VERSION "1.0.0"
30 #define GVE_VERSION_PREFIX "GVE-"
32 // Minimum amount of time between queue kicks in msec (10 seconds)
33 #define MIN_TX_TIMEOUT_GAP (1000 * 10)
35 char gve_driver_name[] = "gve";
36 const char gve_version_str[] = GVE_VERSION;
37 static const char gve_version_prefix[] = GVE_VERSION_PREFIX;
39 static int gve_verify_driver_compatibility(struct gve_priv *priv)
42 struct gve_driver_info *driver_info;
43 dma_addr_t driver_info_bus;
45 driver_info = dma_alloc_coherent(&priv->pdev->dev,
46 sizeof(struct gve_driver_info),
47 &driver_info_bus, GFP_KERNEL);
51 *driver_info = (struct gve_driver_info) {
52 .os_type = 1, /* Linux */
53 .os_version_major = cpu_to_be32(LINUX_VERSION_MAJOR),
54 .os_version_minor = cpu_to_be32(LINUX_VERSION_SUBLEVEL),
55 .os_version_sub = cpu_to_be32(LINUX_VERSION_PATCHLEVEL),
56 .driver_capability_flags = {
57 cpu_to_be64(GVE_DRIVER_CAPABILITY_FLAGS1),
58 cpu_to_be64(GVE_DRIVER_CAPABILITY_FLAGS2),
59 cpu_to_be64(GVE_DRIVER_CAPABILITY_FLAGS3),
60 cpu_to_be64(GVE_DRIVER_CAPABILITY_FLAGS4),
63 strscpy(driver_info->os_version_str1, utsname()->release,
64 sizeof(driver_info->os_version_str1));
65 strscpy(driver_info->os_version_str2, utsname()->version,
66 sizeof(driver_info->os_version_str2));
68 err = gve_adminq_verify_driver_compatibility(priv,
69 sizeof(struct gve_driver_info),
72 /* It's ok if the device doesn't support this */
73 if (err == -EOPNOTSUPP)
76 dma_free_coherent(&priv->pdev->dev,
77 sizeof(struct gve_driver_info),
78 driver_info, driver_info_bus);
82 static netdev_tx_t gve_start_xmit(struct sk_buff *skb, struct net_device *dev)
84 struct gve_priv *priv = netdev_priv(dev);
87 return gve_tx(skb, dev);
89 return gve_tx_dqo(skb, dev);
92 static void gve_get_stats(struct net_device *dev, struct rtnl_link_stats64 *s)
94 struct gve_priv *priv = netdev_priv(dev);
100 num_tx_queues = gve_num_tx_queues(priv);
102 for (ring = 0; ring < priv->rx_cfg.num_queues; ring++) {
105 u64_stats_fetch_begin(&priv->rx[ring].statss);
106 packets = priv->rx[ring].rpackets;
107 bytes = priv->rx[ring].rbytes;
108 } while (u64_stats_fetch_retry(&priv->rx[ring].statss,
110 s->rx_packets += packets;
111 s->rx_bytes += bytes;
115 for (ring = 0; ring < num_tx_queues; ring++) {
118 u64_stats_fetch_begin(&priv->tx[ring].statss);
119 packets = priv->tx[ring].pkt_done;
120 bytes = priv->tx[ring].bytes_done;
121 } while (u64_stats_fetch_retry(&priv->tx[ring].statss,
123 s->tx_packets += packets;
124 s->tx_bytes += bytes;
129 static int gve_alloc_counter_array(struct gve_priv *priv)
131 priv->counter_array =
132 dma_alloc_coherent(&priv->pdev->dev,
133 priv->num_event_counters *
134 sizeof(*priv->counter_array),
135 &priv->counter_array_bus, GFP_KERNEL);
136 if (!priv->counter_array)
142 static void gve_free_counter_array(struct gve_priv *priv)
144 if (!priv->counter_array)
147 dma_free_coherent(&priv->pdev->dev,
148 priv->num_event_counters *
149 sizeof(*priv->counter_array),
150 priv->counter_array, priv->counter_array_bus);
151 priv->counter_array = NULL;
154 /* NIC requests to report stats */
155 static void gve_stats_report_task(struct work_struct *work)
157 struct gve_priv *priv = container_of(work, struct gve_priv,
159 if (gve_get_do_report_stats(priv)) {
160 gve_handle_report_stats(priv);
161 gve_clear_do_report_stats(priv);
165 static void gve_stats_report_schedule(struct gve_priv *priv)
167 if (!gve_get_probe_in_progress(priv) &&
168 !gve_get_reset_in_progress(priv)) {
169 gve_set_do_report_stats(priv);
170 queue_work(priv->gve_wq, &priv->stats_report_task);
174 static void gve_stats_report_timer(struct timer_list *t)
176 struct gve_priv *priv = from_timer(priv, t, stats_report_timer);
178 mod_timer(&priv->stats_report_timer,
179 round_jiffies(jiffies +
180 msecs_to_jiffies(priv->stats_report_timer_period)));
181 gve_stats_report_schedule(priv);
184 static int gve_alloc_stats_report(struct gve_priv *priv)
186 int tx_stats_num, rx_stats_num;
188 tx_stats_num = (GVE_TX_STATS_REPORT_NUM + NIC_TX_STATS_REPORT_NUM) *
189 gve_num_tx_queues(priv);
190 rx_stats_num = (GVE_RX_STATS_REPORT_NUM + NIC_RX_STATS_REPORT_NUM) *
191 priv->rx_cfg.num_queues;
192 priv->stats_report_len = struct_size(priv->stats_report, stats,
193 size_add(tx_stats_num, rx_stats_num));
195 dma_alloc_coherent(&priv->pdev->dev, priv->stats_report_len,
196 &priv->stats_report_bus, GFP_KERNEL);
197 if (!priv->stats_report)
199 /* Set up timer for the report-stats task */
200 timer_setup(&priv->stats_report_timer, gve_stats_report_timer, 0);
201 priv->stats_report_timer_period = GVE_STATS_REPORT_TIMER_PERIOD;
205 static void gve_free_stats_report(struct gve_priv *priv)
207 if (!priv->stats_report)
210 del_timer_sync(&priv->stats_report_timer);
211 dma_free_coherent(&priv->pdev->dev, priv->stats_report_len,
212 priv->stats_report, priv->stats_report_bus);
213 priv->stats_report = NULL;
216 static irqreturn_t gve_mgmnt_intr(int irq, void *arg)
218 struct gve_priv *priv = arg;
220 queue_work(priv->gve_wq, &priv->service_task);
224 static irqreturn_t gve_intr(int irq, void *arg)
226 struct gve_notify_block *block = arg;
227 struct gve_priv *priv = block->priv;
229 iowrite32be(GVE_IRQ_MASK, gve_irq_doorbell(priv, block));
230 napi_schedule_irqoff(&block->napi);
234 static irqreturn_t gve_intr_dqo(int irq, void *arg)
236 struct gve_notify_block *block = arg;
238 /* Interrupts are automatically masked */
239 napi_schedule_irqoff(&block->napi);
243 static int gve_napi_poll(struct napi_struct *napi, int budget)
245 struct gve_notify_block *block;
246 __be32 __iomem *irq_doorbell;
247 bool reschedule = false;
248 struct gve_priv *priv;
251 block = container_of(napi, struct gve_notify_block, napi);
255 if (block->tx->q_num < priv->tx_cfg.num_queues)
256 reschedule |= gve_tx_poll(block, budget);
258 reschedule |= gve_xdp_poll(block, budget);
262 work_done = gve_rx_poll(block, budget);
263 reschedule |= work_done == budget;
269 /* Complete processing - don't unmask irq if busy polling is enabled */
270 if (likely(napi_complete_done(napi, work_done))) {
271 irq_doorbell = gve_irq_doorbell(priv, block);
272 iowrite32be(GVE_IRQ_ACK | GVE_IRQ_EVENT, irq_doorbell);
274 /* Ensure IRQ ACK is visible before we check pending work.
275 * If queue had issued updates, it would be truly visible.
280 reschedule |= gve_tx_clean_pending(priv, block->tx);
282 reschedule |= gve_rx_work_pending(block->rx);
284 if (reschedule && napi_reschedule(napi))
285 iowrite32be(GVE_IRQ_MASK, irq_doorbell);
290 static int gve_napi_poll_dqo(struct napi_struct *napi, int budget)
292 struct gve_notify_block *block =
293 container_of(napi, struct gve_notify_block, napi);
294 struct gve_priv *priv = block->priv;
295 bool reschedule = false;
299 reschedule |= gve_tx_poll_dqo(block, /*do_clean=*/true);
302 work_done = gve_rx_poll_dqo(block, budget);
303 reschedule |= work_done == budget;
309 if (likely(napi_complete_done(napi, work_done))) {
310 /* Enable interrupts again.
312 * We don't need to repoll afterwards because HW supports the
313 * PCI MSI-X PBA feature.
315 * Another interrupt would be triggered if a new event came in
316 * since the last one.
318 gve_write_irq_doorbell_dqo(priv, block,
319 GVE_ITR_NO_UPDATE_DQO | GVE_ITR_ENABLE_BIT_DQO);
325 static int gve_alloc_notify_blocks(struct gve_priv *priv)
327 int num_vecs_requested = priv->num_ntfy_blks + 1;
328 unsigned int active_cpus;
333 priv->msix_vectors = kvcalloc(num_vecs_requested,
334 sizeof(*priv->msix_vectors), GFP_KERNEL);
335 if (!priv->msix_vectors)
337 for (i = 0; i < num_vecs_requested; i++)
338 priv->msix_vectors[i].entry = i;
339 vecs_enabled = pci_enable_msix_range(priv->pdev, priv->msix_vectors,
340 GVE_MIN_MSIX, num_vecs_requested);
341 if (vecs_enabled < 0) {
342 dev_err(&priv->pdev->dev, "Could not enable min msix %d/%d\n",
343 GVE_MIN_MSIX, vecs_enabled);
345 goto abort_with_msix_vectors;
347 if (vecs_enabled != num_vecs_requested) {
348 int new_num_ntfy_blks = (vecs_enabled - 1) & ~0x1;
349 int vecs_per_type = new_num_ntfy_blks / 2;
350 int vecs_left = new_num_ntfy_blks % 2;
352 priv->num_ntfy_blks = new_num_ntfy_blks;
353 priv->mgmt_msix_idx = priv->num_ntfy_blks;
354 priv->tx_cfg.max_queues = min_t(int, priv->tx_cfg.max_queues,
356 priv->rx_cfg.max_queues = min_t(int, priv->rx_cfg.max_queues,
357 vecs_per_type + vecs_left);
358 dev_err(&priv->pdev->dev,
359 "Could not enable desired msix, only enabled %d, adjusting tx max queues to %d, and rx max queues to %d\n",
360 vecs_enabled, priv->tx_cfg.max_queues,
361 priv->rx_cfg.max_queues);
362 if (priv->tx_cfg.num_queues > priv->tx_cfg.max_queues)
363 priv->tx_cfg.num_queues = priv->tx_cfg.max_queues;
364 if (priv->rx_cfg.num_queues > priv->rx_cfg.max_queues)
365 priv->rx_cfg.num_queues = priv->rx_cfg.max_queues;
367 /* Half the notification blocks go to TX and half to RX */
368 active_cpus = min_t(int, priv->num_ntfy_blks / 2, num_online_cpus());
370 /* Setup Management Vector - the last vector */
371 snprintf(priv->mgmt_msix_name, sizeof(priv->mgmt_msix_name), "gve-mgmnt@pci:%s",
372 pci_name(priv->pdev));
373 err = request_irq(priv->msix_vectors[priv->mgmt_msix_idx].vector,
374 gve_mgmnt_intr, 0, priv->mgmt_msix_name, priv);
376 dev_err(&priv->pdev->dev, "Did not receive management vector.\n");
377 goto abort_with_msix_enabled;
379 priv->irq_db_indices =
380 dma_alloc_coherent(&priv->pdev->dev,
381 priv->num_ntfy_blks *
382 sizeof(*priv->irq_db_indices),
383 &priv->irq_db_indices_bus, GFP_KERNEL);
384 if (!priv->irq_db_indices) {
386 goto abort_with_mgmt_vector;
389 priv->ntfy_blocks = kvzalloc(priv->num_ntfy_blks *
390 sizeof(*priv->ntfy_blocks), GFP_KERNEL);
391 if (!priv->ntfy_blocks) {
393 goto abort_with_irq_db_indices;
396 /* Setup the other blocks - the first n-1 vectors */
397 for (i = 0; i < priv->num_ntfy_blks; i++) {
398 struct gve_notify_block *block = &priv->ntfy_blocks[i];
401 snprintf(block->name, sizeof(block->name), "gve-ntfy-blk%d@pci:%s",
402 i, pci_name(priv->pdev));
404 err = request_irq(priv->msix_vectors[msix_idx].vector,
405 gve_is_gqi(priv) ? gve_intr : gve_intr_dqo,
406 0, block->name, block);
408 dev_err(&priv->pdev->dev,
409 "Failed to receive msix vector %d\n", i);
410 goto abort_with_some_ntfy_blocks;
412 irq_set_affinity_hint(priv->msix_vectors[msix_idx].vector,
413 get_cpu_mask(i % active_cpus));
414 block->irq_db_index = &priv->irq_db_indices[i].index;
417 abort_with_some_ntfy_blocks:
418 for (j = 0; j < i; j++) {
419 struct gve_notify_block *block = &priv->ntfy_blocks[j];
422 irq_set_affinity_hint(priv->msix_vectors[msix_idx].vector,
424 free_irq(priv->msix_vectors[msix_idx].vector, block);
426 kvfree(priv->ntfy_blocks);
427 priv->ntfy_blocks = NULL;
428 abort_with_irq_db_indices:
429 dma_free_coherent(&priv->pdev->dev, priv->num_ntfy_blks *
430 sizeof(*priv->irq_db_indices),
431 priv->irq_db_indices, priv->irq_db_indices_bus);
432 priv->irq_db_indices = NULL;
433 abort_with_mgmt_vector:
434 free_irq(priv->msix_vectors[priv->mgmt_msix_idx].vector, priv);
435 abort_with_msix_enabled:
436 pci_disable_msix(priv->pdev);
437 abort_with_msix_vectors:
438 kvfree(priv->msix_vectors);
439 priv->msix_vectors = NULL;
443 static void gve_free_notify_blocks(struct gve_priv *priv)
447 if (!priv->msix_vectors)
451 for (i = 0; i < priv->num_ntfy_blks; i++) {
452 struct gve_notify_block *block = &priv->ntfy_blocks[i];
455 irq_set_affinity_hint(priv->msix_vectors[msix_idx].vector,
457 free_irq(priv->msix_vectors[msix_idx].vector, block);
459 free_irq(priv->msix_vectors[priv->mgmt_msix_idx].vector, priv);
460 kvfree(priv->ntfy_blocks);
461 priv->ntfy_blocks = NULL;
462 dma_free_coherent(&priv->pdev->dev, priv->num_ntfy_blks *
463 sizeof(*priv->irq_db_indices),
464 priv->irq_db_indices, priv->irq_db_indices_bus);
465 priv->irq_db_indices = NULL;
466 pci_disable_msix(priv->pdev);
467 kvfree(priv->msix_vectors);
468 priv->msix_vectors = NULL;
471 static int gve_setup_device_resources(struct gve_priv *priv)
475 err = gve_alloc_counter_array(priv);
478 err = gve_alloc_notify_blocks(priv);
480 goto abort_with_counter;
481 err = gve_alloc_stats_report(priv);
483 goto abort_with_ntfy_blocks;
484 err = gve_adminq_configure_device_resources(priv,
485 priv->counter_array_bus,
486 priv->num_event_counters,
487 priv->irq_db_indices_bus,
488 priv->num_ntfy_blks);
490 dev_err(&priv->pdev->dev,
491 "could not setup device_resources: err=%d\n", err);
493 goto abort_with_stats_report;
496 if (!gve_is_gqi(priv)) {
497 priv->ptype_lut_dqo = kvzalloc(sizeof(*priv->ptype_lut_dqo),
499 if (!priv->ptype_lut_dqo) {
501 goto abort_with_stats_report;
503 err = gve_adminq_get_ptype_map_dqo(priv, priv->ptype_lut_dqo);
505 dev_err(&priv->pdev->dev,
506 "Failed to get ptype map: err=%d\n", err);
507 goto abort_with_ptype_lut;
511 err = gve_adminq_report_stats(priv, priv->stats_report_len,
512 priv->stats_report_bus,
513 GVE_STATS_REPORT_TIMER_PERIOD);
515 dev_err(&priv->pdev->dev,
516 "Failed to report stats: err=%d\n", err);
517 gve_set_device_resources_ok(priv);
520 abort_with_ptype_lut:
521 kvfree(priv->ptype_lut_dqo);
522 priv->ptype_lut_dqo = NULL;
523 abort_with_stats_report:
524 gve_free_stats_report(priv);
525 abort_with_ntfy_blocks:
526 gve_free_notify_blocks(priv);
528 gve_free_counter_array(priv);
533 static void gve_trigger_reset(struct gve_priv *priv);
535 static void gve_teardown_device_resources(struct gve_priv *priv)
539 /* Tell device its resources are being freed */
540 if (gve_get_device_resources_ok(priv)) {
541 /* detach the stats report */
542 err = gve_adminq_report_stats(priv, 0, 0x0, GVE_STATS_REPORT_TIMER_PERIOD);
544 dev_err(&priv->pdev->dev,
545 "Failed to detach stats report: err=%d\n", err);
546 gve_trigger_reset(priv);
548 err = gve_adminq_deconfigure_device_resources(priv);
550 dev_err(&priv->pdev->dev,
551 "Could not deconfigure device resources: err=%d\n",
553 gve_trigger_reset(priv);
557 kvfree(priv->ptype_lut_dqo);
558 priv->ptype_lut_dqo = NULL;
560 gve_free_counter_array(priv);
561 gve_free_notify_blocks(priv);
562 gve_free_stats_report(priv);
563 gve_clear_device_resources_ok(priv);
566 static void gve_add_napi(struct gve_priv *priv, int ntfy_idx,
567 int (*gve_poll)(struct napi_struct *, int))
569 struct gve_notify_block *block = &priv->ntfy_blocks[ntfy_idx];
571 netif_napi_add(priv->dev, &block->napi, gve_poll);
574 static void gve_remove_napi(struct gve_priv *priv, int ntfy_idx)
576 struct gve_notify_block *block = &priv->ntfy_blocks[ntfy_idx];
578 netif_napi_del(&block->napi);
581 static int gve_register_xdp_qpls(struct gve_priv *priv)
587 start_id = gve_tx_qpl_id(priv, gve_xdp_tx_start_queue_id(priv));
588 for (i = start_id; i < start_id + gve_num_xdp_qpls(priv); i++) {
589 err = gve_adminq_register_page_list(priv, &priv->qpls[i]);
591 netif_err(priv, drv, priv->dev,
592 "failed to register queue page list %d\n",
594 /* This failure will trigger a reset - no need to clean
603 static int gve_register_qpls(struct gve_priv *priv)
609 start_id = gve_tx_start_qpl_id(priv);
610 for (i = start_id; i < start_id + gve_num_tx_qpls(priv); i++) {
611 err = gve_adminq_register_page_list(priv, &priv->qpls[i]);
613 netif_err(priv, drv, priv->dev,
614 "failed to register queue page list %d\n",
616 /* This failure will trigger a reset - no need to clean
623 start_id = gve_rx_start_qpl_id(priv);
624 for (i = start_id; i < start_id + gve_num_rx_qpls(priv); i++) {
625 err = gve_adminq_register_page_list(priv, &priv->qpls[i]);
627 netif_err(priv, drv, priv->dev,
628 "failed to register queue page list %d\n",
630 /* This failure will trigger a reset - no need to clean
639 static int gve_unregister_xdp_qpls(struct gve_priv *priv)
645 start_id = gve_tx_qpl_id(priv, gve_xdp_tx_start_queue_id(priv));
646 for (i = start_id; i < start_id + gve_num_xdp_qpls(priv); i++) {
647 err = gve_adminq_unregister_page_list(priv, priv->qpls[i].id);
648 /* This failure will trigger a reset - no need to clean up */
650 netif_err(priv, drv, priv->dev,
651 "Failed to unregister queue page list %d\n",
659 static int gve_unregister_qpls(struct gve_priv *priv)
665 start_id = gve_tx_start_qpl_id(priv);
666 for (i = start_id; i < start_id + gve_num_tx_qpls(priv); i++) {
667 err = gve_adminq_unregister_page_list(priv, priv->qpls[i].id);
668 /* This failure will trigger a reset - no need to clean up */
670 netif_err(priv, drv, priv->dev,
671 "Failed to unregister queue page list %d\n",
677 start_id = gve_rx_start_qpl_id(priv);
678 for (i = start_id; i < start_id + gve_num_rx_qpls(priv); i++) {
679 err = gve_adminq_unregister_page_list(priv, priv->qpls[i].id);
680 /* This failure will trigger a reset - no need to clean up */
682 netif_err(priv, drv, priv->dev,
683 "Failed to unregister queue page list %d\n",
691 static int gve_create_xdp_rings(struct gve_priv *priv)
695 err = gve_adminq_create_tx_queues(priv,
696 gve_xdp_tx_start_queue_id(priv),
697 priv->num_xdp_queues);
699 netif_err(priv, drv, priv->dev, "failed to create %d XDP tx queues\n",
700 priv->num_xdp_queues);
701 /* This failure will trigger a reset - no need to clean
706 netif_dbg(priv, drv, priv->dev, "created %d XDP tx queues\n",
707 priv->num_xdp_queues);
712 static int gve_create_rings(struct gve_priv *priv)
714 int num_tx_queues = gve_num_tx_queues(priv);
718 err = gve_adminq_create_tx_queues(priv, 0, num_tx_queues);
720 netif_err(priv, drv, priv->dev, "failed to create %d tx queues\n",
722 /* This failure will trigger a reset - no need to clean
727 netif_dbg(priv, drv, priv->dev, "created %d tx queues\n",
730 err = gve_adminq_create_rx_queues(priv, priv->rx_cfg.num_queues);
732 netif_err(priv, drv, priv->dev, "failed to create %d rx queues\n",
733 priv->rx_cfg.num_queues);
734 /* This failure will trigger a reset - no need to clean
739 netif_dbg(priv, drv, priv->dev, "created %d rx queues\n",
740 priv->rx_cfg.num_queues);
742 if (gve_is_gqi(priv)) {
743 /* Rx data ring has been prefilled with packet buffers at queue
746 * Write the doorbell to provide descriptor slots and packet
747 * buffers to the NIC.
749 for (i = 0; i < priv->rx_cfg.num_queues; i++)
750 gve_rx_write_doorbell(priv, &priv->rx[i]);
752 for (i = 0; i < priv->rx_cfg.num_queues; i++) {
753 /* Post buffers and ring doorbell. */
754 gve_rx_post_buffers_dqo(&priv->rx[i]);
761 static void add_napi_init_xdp_sync_stats(struct gve_priv *priv,
762 int (*napi_poll)(struct napi_struct *napi,
765 int start_id = gve_xdp_tx_start_queue_id(priv);
768 /* Add xdp tx napi & init sync stats*/
769 for (i = start_id; i < start_id + priv->num_xdp_queues; i++) {
770 int ntfy_idx = gve_tx_idx_to_ntfy(priv, i);
772 u64_stats_init(&priv->tx[i].statss);
773 priv->tx[i].ntfy_id = ntfy_idx;
774 gve_add_napi(priv, ntfy_idx, napi_poll);
778 static void add_napi_init_sync_stats(struct gve_priv *priv,
779 int (*napi_poll)(struct napi_struct *napi,
784 /* Add tx napi & init sync stats*/
785 for (i = 0; i < gve_num_tx_queues(priv); i++) {
786 int ntfy_idx = gve_tx_idx_to_ntfy(priv, i);
788 u64_stats_init(&priv->tx[i].statss);
789 priv->tx[i].ntfy_id = ntfy_idx;
790 gve_add_napi(priv, ntfy_idx, napi_poll);
792 /* Add rx napi & init sync stats*/
793 for (i = 0; i < priv->rx_cfg.num_queues; i++) {
794 int ntfy_idx = gve_rx_idx_to_ntfy(priv, i);
796 u64_stats_init(&priv->rx[i].statss);
797 priv->rx[i].ntfy_id = ntfy_idx;
798 gve_add_napi(priv, ntfy_idx, napi_poll);
802 static void gve_tx_free_rings(struct gve_priv *priv, int start_id, int num_rings)
804 if (gve_is_gqi(priv)) {
805 gve_tx_free_rings_gqi(priv, start_id, num_rings);
807 gve_tx_free_rings_dqo(priv);
811 static int gve_alloc_xdp_rings(struct gve_priv *priv)
816 if (!priv->num_xdp_queues)
819 start_id = gve_xdp_tx_start_queue_id(priv);
820 err = gve_tx_alloc_rings(priv, start_id, priv->num_xdp_queues);
823 add_napi_init_xdp_sync_stats(priv, gve_napi_poll);
828 static int gve_alloc_rings(struct gve_priv *priv)
833 priv->tx = kvcalloc(priv->tx_cfg.max_queues, sizeof(*priv->tx),
838 if (gve_is_gqi(priv))
839 err = gve_tx_alloc_rings(priv, 0, gve_num_tx_queues(priv));
841 err = gve_tx_alloc_rings_dqo(priv);
846 priv->rx = kvcalloc(priv->rx_cfg.max_queues, sizeof(*priv->rx),
853 if (gve_is_gqi(priv))
854 err = gve_rx_alloc_rings(priv);
856 err = gve_rx_alloc_rings_dqo(priv);
860 if (gve_is_gqi(priv))
861 add_napi_init_sync_stats(priv, gve_napi_poll);
863 add_napi_init_sync_stats(priv, gve_napi_poll_dqo);
871 gve_tx_free_rings(priv, 0, gve_num_tx_queues(priv));
878 static int gve_destroy_xdp_rings(struct gve_priv *priv)
883 start_id = gve_xdp_tx_start_queue_id(priv);
884 err = gve_adminq_destroy_tx_queues(priv,
886 priv->num_xdp_queues);
888 netif_err(priv, drv, priv->dev,
889 "failed to destroy XDP queues\n");
890 /* This failure will trigger a reset - no need to clean up */
893 netif_dbg(priv, drv, priv->dev, "destroyed XDP queues\n");
898 static int gve_destroy_rings(struct gve_priv *priv)
900 int num_tx_queues = gve_num_tx_queues(priv);
903 err = gve_adminq_destroy_tx_queues(priv, 0, num_tx_queues);
905 netif_err(priv, drv, priv->dev,
906 "failed to destroy tx queues\n");
907 /* This failure will trigger a reset - no need to clean up */
910 netif_dbg(priv, drv, priv->dev, "destroyed tx queues\n");
911 err = gve_adminq_destroy_rx_queues(priv, priv->rx_cfg.num_queues);
913 netif_err(priv, drv, priv->dev,
914 "failed to destroy rx queues\n");
915 /* This failure will trigger a reset - no need to clean up */
918 netif_dbg(priv, drv, priv->dev, "destroyed rx queues\n");
922 static void gve_rx_free_rings(struct gve_priv *priv)
924 if (gve_is_gqi(priv))
925 gve_rx_free_rings_gqi(priv);
927 gve_rx_free_rings_dqo(priv);
930 static void gve_free_xdp_rings(struct gve_priv *priv)
932 int ntfy_idx, start_id;
935 start_id = gve_xdp_tx_start_queue_id(priv);
937 for (i = start_id; i < start_id + priv->num_xdp_queues; i++) {
938 ntfy_idx = gve_tx_idx_to_ntfy(priv, i);
939 gve_remove_napi(priv, ntfy_idx);
941 gve_tx_free_rings(priv, start_id, priv->num_xdp_queues);
945 static void gve_free_rings(struct gve_priv *priv)
947 int num_tx_queues = gve_num_tx_queues(priv);
952 for (i = 0; i < num_tx_queues; i++) {
953 ntfy_idx = gve_tx_idx_to_ntfy(priv, i);
954 gve_remove_napi(priv, ntfy_idx);
956 gve_tx_free_rings(priv, 0, num_tx_queues);
961 for (i = 0; i < priv->rx_cfg.num_queues; i++) {
962 ntfy_idx = gve_rx_idx_to_ntfy(priv, i);
963 gve_remove_napi(priv, ntfy_idx);
965 gve_rx_free_rings(priv);
971 int gve_alloc_page(struct gve_priv *priv, struct device *dev,
972 struct page **page, dma_addr_t *dma,
973 enum dma_data_direction dir, gfp_t gfp_flags)
975 *page = alloc_page(gfp_flags);
977 priv->page_alloc_fail++;
980 *dma = dma_map_page(dev, *page, 0, PAGE_SIZE, dir);
981 if (dma_mapping_error(dev, *dma)) {
982 priv->dma_mapping_error++;
989 static int gve_alloc_queue_page_list(struct gve_priv *priv, u32 id,
992 struct gve_queue_page_list *qpl = &priv->qpls[id];
996 if (pages + priv->num_registered_pages > priv->max_registered_pages) {
997 netif_err(priv, drv, priv->dev,
998 "Reached max number of registered pages %llu > %llu\n",
999 pages + priv->num_registered_pages,
1000 priv->max_registered_pages);
1005 qpl->num_entries = 0;
1006 qpl->pages = kvcalloc(pages, sizeof(*qpl->pages), GFP_KERNEL);
1007 /* caller handles clean up */
1010 qpl->page_buses = kvcalloc(pages, sizeof(*qpl->page_buses), GFP_KERNEL);
1011 /* caller handles clean up */
1012 if (!qpl->page_buses)
1015 for (i = 0; i < pages; i++) {
1016 err = gve_alloc_page(priv, &priv->pdev->dev, &qpl->pages[i],
1017 &qpl->page_buses[i],
1018 gve_qpl_dma_dir(priv, id), GFP_KERNEL);
1019 /* caller handles clean up */
1024 priv->num_registered_pages += pages;
1029 void gve_free_page(struct device *dev, struct page *page, dma_addr_t dma,
1030 enum dma_data_direction dir)
1032 if (!dma_mapping_error(dev, dma))
1033 dma_unmap_page(dev, dma, PAGE_SIZE, dir);
1038 static void gve_free_queue_page_list(struct gve_priv *priv, u32 id)
1040 struct gve_queue_page_list *qpl = &priv->qpls[id];
1045 if (!qpl->page_buses)
1048 for (i = 0; i < qpl->num_entries; i++)
1049 gve_free_page(&priv->pdev->dev, qpl->pages[i],
1050 qpl->page_buses[i], gve_qpl_dma_dir(priv, id));
1052 kvfree(qpl->page_buses);
1053 qpl->page_buses = NULL;
1057 priv->num_registered_pages -= qpl->num_entries;
1060 static int gve_alloc_xdp_qpls(struct gve_priv *priv)
1066 start_id = gve_tx_qpl_id(priv, gve_xdp_tx_start_queue_id(priv));
1067 for (i = start_id; i < start_id + gve_num_xdp_qpls(priv); i++) {
1068 err = gve_alloc_queue_page_list(priv, i,
1069 priv->tx_pages_per_qpl);
1077 for (j = start_id; j <= i; j++)
1078 gve_free_queue_page_list(priv, j);
1082 static int gve_alloc_qpls(struct gve_priv *priv)
1084 int max_queues = priv->tx_cfg.max_queues + priv->rx_cfg.max_queues;
1090 if (!gve_is_qpl(priv))
1093 priv->qpls = kvcalloc(max_queues, sizeof(*priv->qpls), GFP_KERNEL);
1097 start_id = gve_tx_start_qpl_id(priv);
1098 page_count = priv->tx_pages_per_qpl;
1099 for (i = start_id; i < start_id + gve_num_tx_qpls(priv); i++) {
1100 err = gve_alloc_queue_page_list(priv, i,
1106 start_id = gve_rx_start_qpl_id(priv);
1108 /* For GQI_QPL number of pages allocated have 1:1 relationship with
1109 * number of descriptors. For DQO, number of pages required are
1110 * more than descriptors (because of out of order completions).
1112 page_count = priv->queue_format == GVE_GQI_QPL_FORMAT ?
1113 priv->rx_data_slot_cnt : priv->rx_pages_per_qpl;
1114 for (i = start_id; i < start_id + gve_num_rx_qpls(priv); i++) {
1115 err = gve_alloc_queue_page_list(priv, i,
1121 priv->qpl_cfg.qpl_map_size = BITS_TO_LONGS(max_queues) *
1122 sizeof(unsigned long) * BITS_PER_BYTE;
1123 priv->qpl_cfg.qpl_id_map = kvcalloc(BITS_TO_LONGS(max_queues),
1124 sizeof(unsigned long), GFP_KERNEL);
1125 if (!priv->qpl_cfg.qpl_id_map) {
1133 for (j = 0; j <= i; j++)
1134 gve_free_queue_page_list(priv, j);
1140 static void gve_free_xdp_qpls(struct gve_priv *priv)
1145 start_id = gve_tx_qpl_id(priv, gve_xdp_tx_start_queue_id(priv));
1146 for (i = start_id; i < start_id + gve_num_xdp_qpls(priv); i++)
1147 gve_free_queue_page_list(priv, i);
1150 static void gve_free_qpls(struct gve_priv *priv)
1152 int max_queues = priv->tx_cfg.max_queues + priv->rx_cfg.max_queues;
1158 kvfree(priv->qpl_cfg.qpl_id_map);
1159 priv->qpl_cfg.qpl_id_map = NULL;
1161 for (i = 0; i < max_queues; i++)
1162 gve_free_queue_page_list(priv, i);
1168 /* Use this to schedule a reset when the device is capable of continuing
1169 * to handle other requests in its current state. If it is not, do a reset
1170 * in thread instead.
1172 void gve_schedule_reset(struct gve_priv *priv)
1174 gve_set_do_reset(priv);
1175 queue_work(priv->gve_wq, &priv->service_task);
1178 static void gve_reset_and_teardown(struct gve_priv *priv, bool was_up);
1179 static int gve_reset_recovery(struct gve_priv *priv, bool was_up);
1180 static void gve_turndown(struct gve_priv *priv);
1181 static void gve_turnup(struct gve_priv *priv);
1183 static int gve_reg_xdp_info(struct gve_priv *priv, struct net_device *dev)
1185 struct napi_struct *napi;
1186 struct gve_rx_ring *rx;
1191 if (!priv->num_xdp_queues)
1194 for (i = 0; i < priv->rx_cfg.num_queues; i++) {
1196 napi = &priv->ntfy_blocks[rx->ntfy_id].napi;
1198 err = xdp_rxq_info_reg(&rx->xdp_rxq, dev, i,
1202 err = xdp_rxq_info_reg_mem_model(&rx->xdp_rxq,
1203 MEM_TYPE_PAGE_SHARED, NULL);
1206 rx->xsk_pool = xsk_get_pool_from_qid(dev, i);
1208 err = xdp_rxq_info_reg(&rx->xsk_rxq, dev, i,
1212 err = xdp_rxq_info_reg_mem_model(&rx->xsk_rxq,
1213 MEM_TYPE_XSK_BUFF_POOL, NULL);
1216 xsk_pool_set_rxq_info(rx->xsk_pool,
1221 for (i = 0; i < priv->num_xdp_queues; i++) {
1222 tx_qid = gve_xdp_tx_queue_id(priv, i);
1223 priv->tx[tx_qid].xsk_pool = xsk_get_pool_from_qid(dev, i);
1228 for (j = i; j >= 0; j--) {
1230 if (xdp_rxq_info_is_reg(&rx->xdp_rxq))
1231 xdp_rxq_info_unreg(&rx->xdp_rxq);
1232 if (xdp_rxq_info_is_reg(&rx->xsk_rxq))
1233 xdp_rxq_info_unreg(&rx->xsk_rxq);
1238 static void gve_unreg_xdp_info(struct gve_priv *priv)
1242 if (!priv->num_xdp_queues)
1245 for (i = 0; i < priv->rx_cfg.num_queues; i++) {
1246 struct gve_rx_ring *rx = &priv->rx[i];
1248 xdp_rxq_info_unreg(&rx->xdp_rxq);
1250 xdp_rxq_info_unreg(&rx->xsk_rxq);
1251 rx->xsk_pool = NULL;
1255 for (i = 0; i < priv->num_xdp_queues; i++) {
1256 tx_qid = gve_xdp_tx_queue_id(priv, i);
1257 priv->tx[tx_qid].xsk_pool = NULL;
1261 static void gve_drain_page_cache(struct gve_priv *priv)
1263 struct page_frag_cache *nc;
1266 for (i = 0; i < priv->rx_cfg.num_queues; i++) {
1267 nc = &priv->rx[i].page_cache;
1269 __page_frag_cache_drain(virt_to_page(nc->va),
1276 static int gve_open(struct net_device *dev)
1278 struct gve_priv *priv = netdev_priv(dev);
1282 priv->num_xdp_queues = priv->rx_cfg.num_queues;
1284 priv->num_xdp_queues = 0;
1286 err = gve_alloc_qpls(priv);
1290 err = gve_alloc_rings(priv);
1294 err = netif_set_real_num_tx_queues(dev, priv->tx_cfg.num_queues);
1297 err = netif_set_real_num_rx_queues(dev, priv->rx_cfg.num_queues);
1301 err = gve_reg_xdp_info(priv, dev);
1305 err = gve_register_qpls(priv);
1309 if (!gve_is_gqi(priv)) {
1310 /* Hard code this for now. This may be tuned in the future for
1313 priv->data_buffer_size_dqo = GVE_RX_BUFFER_SIZE_DQO;
1315 err = gve_create_rings(priv);
1319 gve_set_device_rings_ok(priv);
1321 if (gve_get_report_stats(priv))
1322 mod_timer(&priv->stats_report_timer,
1323 round_jiffies(jiffies +
1324 msecs_to_jiffies(priv->stats_report_timer_period)));
1327 queue_work(priv->gve_wq, &priv->service_task);
1328 priv->interface_up_cnt++;
1332 gve_free_rings(priv);
1334 gve_free_qpls(priv);
1338 /* This must have been called from a reset due to the rtnl lock
1339 * so just return at this point.
1341 if (gve_get_reset_in_progress(priv))
1343 /* Otherwise reset before returning */
1344 gve_reset_and_teardown(priv, true);
1345 /* if this fails there is nothing we can do so just ignore the return */
1346 gve_reset_recovery(priv, false);
1347 /* return the original error */
1351 static int gve_close(struct net_device *dev)
1353 struct gve_priv *priv = netdev_priv(dev);
1356 netif_carrier_off(dev);
1357 if (gve_get_device_rings_ok(priv)) {
1359 gve_drain_page_cache(priv);
1360 err = gve_destroy_rings(priv);
1363 err = gve_unregister_qpls(priv);
1366 gve_clear_device_rings_ok(priv);
1368 del_timer_sync(&priv->stats_report_timer);
1370 gve_unreg_xdp_info(priv);
1371 gve_free_rings(priv);
1372 gve_free_qpls(priv);
1373 priv->interface_down_cnt++;
1377 /* This must have been called from a reset due to the rtnl lock
1378 * so just return at this point.
1380 if (gve_get_reset_in_progress(priv))
1382 /* Otherwise reset before returning */
1383 gve_reset_and_teardown(priv, true);
1384 return gve_reset_recovery(priv, false);
1387 static int gve_remove_xdp_queues(struct gve_priv *priv)
1391 err = gve_destroy_xdp_rings(priv);
1395 err = gve_unregister_xdp_qpls(priv);
1399 gve_unreg_xdp_info(priv);
1400 gve_free_xdp_rings(priv);
1401 gve_free_xdp_qpls(priv);
1402 priv->num_xdp_queues = 0;
1406 static int gve_add_xdp_queues(struct gve_priv *priv)
1410 priv->num_xdp_queues = priv->tx_cfg.num_queues;
1412 err = gve_alloc_xdp_qpls(priv);
1416 err = gve_alloc_xdp_rings(priv);
1420 err = gve_reg_xdp_info(priv, priv->dev);
1422 goto free_xdp_rings;
1424 err = gve_register_xdp_qpls(priv);
1426 goto free_xdp_rings;
1428 err = gve_create_xdp_rings(priv);
1430 goto free_xdp_rings;
1435 gve_free_xdp_rings(priv);
1437 gve_free_xdp_qpls(priv);
1439 priv->num_xdp_queues = 0;
1443 static void gve_handle_link_status(struct gve_priv *priv, bool link_status)
1445 if (!gve_get_napi_enabled(priv))
1448 if (link_status == netif_carrier_ok(priv->dev))
1452 netdev_info(priv->dev, "Device link is up.\n");
1453 netif_carrier_on(priv->dev);
1455 netdev_info(priv->dev, "Device link is down.\n");
1456 netif_carrier_off(priv->dev);
1460 static int gve_set_xdp(struct gve_priv *priv, struct bpf_prog *prog,
1461 struct netlink_ext_ack *extack)
1463 struct bpf_prog *old_prog;
1467 old_prog = READ_ONCE(priv->xdp_prog);
1468 if (!netif_carrier_ok(priv->dev)) {
1469 WRITE_ONCE(priv->xdp_prog, prog);
1471 bpf_prog_put(old_prog);
1476 if (!old_prog && prog) {
1477 // Allocate XDP TX queues if an XDP program is
1479 err = gve_add_xdp_queues(priv);
1482 } else if (old_prog && !prog) {
1483 // Remove XDP TX queues if an XDP program is
1484 // being uninstalled
1485 err = gve_remove_xdp_queues(priv);
1489 WRITE_ONCE(priv->xdp_prog, prog);
1491 bpf_prog_put(old_prog);
1495 status = ioread32be(&priv->reg_bar0->device_status);
1496 gve_handle_link_status(priv, GVE_DEVICE_STATUS_LINK_STATUS_MASK & status);
1500 static int gve_xsk_pool_enable(struct net_device *dev,
1501 struct xsk_buff_pool *pool,
1504 struct gve_priv *priv = netdev_priv(dev);
1505 struct napi_struct *napi;
1506 struct gve_rx_ring *rx;
1510 if (qid >= priv->rx_cfg.num_queues) {
1511 dev_err(&priv->pdev->dev, "xsk pool invalid qid %d", qid);
1514 if (xsk_pool_get_rx_frame_size(pool) <
1515 priv->dev->max_mtu + sizeof(struct ethhdr)) {
1516 dev_err(&priv->pdev->dev, "xsk pool frame_len too small");
1520 err = xsk_pool_dma_map(pool, &priv->pdev->dev,
1521 DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING);
1525 /* If XDP prog is not installed, return */
1526 if (!priv->xdp_prog)
1529 rx = &priv->rx[qid];
1530 napi = &priv->ntfy_blocks[rx->ntfy_id].napi;
1531 err = xdp_rxq_info_reg(&rx->xsk_rxq, dev, qid, napi->napi_id);
1535 err = xdp_rxq_info_reg_mem_model(&rx->xsk_rxq,
1536 MEM_TYPE_XSK_BUFF_POOL, NULL);
1540 xsk_pool_set_rxq_info(pool, &rx->xsk_rxq);
1541 rx->xsk_pool = pool;
1543 tx_qid = gve_xdp_tx_queue_id(priv, qid);
1544 priv->tx[tx_qid].xsk_pool = pool;
1548 if (xdp_rxq_info_is_reg(&rx->xsk_rxq))
1549 xdp_rxq_info_unreg(&rx->xsk_rxq);
1551 xsk_pool_dma_unmap(pool,
1552 DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING);
1556 static int gve_xsk_pool_disable(struct net_device *dev,
1559 struct gve_priv *priv = netdev_priv(dev);
1560 struct napi_struct *napi_rx;
1561 struct napi_struct *napi_tx;
1562 struct xsk_buff_pool *pool;
1565 pool = xsk_get_pool_from_qid(dev, qid);
1568 if (qid >= priv->rx_cfg.num_queues)
1571 /* If XDP prog is not installed, unmap DMA and return */
1572 if (!priv->xdp_prog)
1575 tx_qid = gve_xdp_tx_queue_id(priv, qid);
1576 if (!netif_running(dev)) {
1577 priv->rx[qid].xsk_pool = NULL;
1578 xdp_rxq_info_unreg(&priv->rx[qid].xsk_rxq);
1579 priv->tx[tx_qid].xsk_pool = NULL;
1583 napi_rx = &priv->ntfy_blocks[priv->rx[qid].ntfy_id].napi;
1584 napi_disable(napi_rx); /* make sure current rx poll is done */
1586 napi_tx = &priv->ntfy_blocks[priv->tx[tx_qid].ntfy_id].napi;
1587 napi_disable(napi_tx); /* make sure current tx poll is done */
1589 priv->rx[qid].xsk_pool = NULL;
1590 xdp_rxq_info_unreg(&priv->rx[qid].xsk_rxq);
1591 priv->tx[tx_qid].xsk_pool = NULL;
1592 smp_mb(); /* Make sure it is visible to the workers on datapath */
1594 napi_enable(napi_rx);
1595 if (gve_rx_work_pending(&priv->rx[qid]))
1596 napi_schedule(napi_rx);
1598 napi_enable(napi_tx);
1599 if (gve_tx_clean_pending(priv, &priv->tx[tx_qid]))
1600 napi_schedule(napi_tx);
1603 xsk_pool_dma_unmap(pool,
1604 DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING);
1608 static int gve_xsk_wakeup(struct net_device *dev, u32 queue_id, u32 flags)
1610 struct gve_priv *priv = netdev_priv(dev);
1611 int tx_queue_id = gve_xdp_tx_queue_id(priv, queue_id);
1613 if (queue_id >= priv->rx_cfg.num_queues || !priv->xdp_prog)
1616 if (flags & XDP_WAKEUP_TX) {
1617 struct gve_tx_ring *tx = &priv->tx[tx_queue_id];
1618 struct napi_struct *napi =
1619 &priv->ntfy_blocks[tx->ntfy_id].napi;
1621 if (!napi_if_scheduled_mark_missed(napi)) {
1622 /* Call local_bh_enable to trigger SoftIRQ processing */
1624 napi_schedule(napi);
1628 tx->xdp_xsk_wakeup++;
1634 static int verify_xdp_configuration(struct net_device *dev)
1636 struct gve_priv *priv = netdev_priv(dev);
1638 if (dev->features & NETIF_F_LRO) {
1639 netdev_warn(dev, "XDP is not supported when LRO is on.\n");
1643 if (priv->queue_format != GVE_GQI_QPL_FORMAT) {
1644 netdev_warn(dev, "XDP is not supported in mode %d.\n",
1645 priv->queue_format);
1649 if (dev->mtu > (PAGE_SIZE / 2) - sizeof(struct ethhdr) - GVE_RX_PAD) {
1650 netdev_warn(dev, "XDP is not supported for mtu %d.\n",
1655 if (priv->rx_cfg.num_queues != priv->tx_cfg.num_queues ||
1656 (2 * priv->tx_cfg.num_queues > priv->tx_cfg.max_queues)) {
1657 netdev_warn(dev, "XDP load failed: The number of configured RX queues %d should be equal to the number of configured TX queues %d and the number of configured RX/TX queues should be less than or equal to half the maximum number of RX/TX queues %d",
1658 priv->rx_cfg.num_queues,
1659 priv->tx_cfg.num_queues,
1660 priv->tx_cfg.max_queues);
1666 static int gve_xdp(struct net_device *dev, struct netdev_bpf *xdp)
1668 struct gve_priv *priv = netdev_priv(dev);
1671 err = verify_xdp_configuration(dev);
1674 switch (xdp->command) {
1675 case XDP_SETUP_PROG:
1676 return gve_set_xdp(priv, xdp->prog, xdp->extack);
1677 case XDP_SETUP_XSK_POOL:
1679 return gve_xsk_pool_enable(dev, xdp->xsk.pool, xdp->xsk.queue_id);
1681 return gve_xsk_pool_disable(dev, xdp->xsk.queue_id);
1687 int gve_adjust_queues(struct gve_priv *priv,
1688 struct gve_queue_config new_rx_config,
1689 struct gve_queue_config new_tx_config)
1693 if (netif_carrier_ok(priv->dev)) {
1694 /* To make this process as simple as possible we teardown the
1695 * device, set the new configuration, and then bring the device
1698 err = gve_close(priv->dev);
1699 /* we have already tried to reset in close,
1700 * just fail at this point
1704 priv->tx_cfg = new_tx_config;
1705 priv->rx_cfg = new_rx_config;
1707 err = gve_open(priv->dev);
1713 /* Set the config for the next up. */
1714 priv->tx_cfg = new_tx_config;
1715 priv->rx_cfg = new_rx_config;
1719 netif_err(priv, drv, priv->dev,
1720 "Adjust queues failed! !!! DISABLING ALL QUEUES !!!\n");
1725 static void gve_turndown(struct gve_priv *priv)
1729 if (netif_carrier_ok(priv->dev))
1730 netif_carrier_off(priv->dev);
1732 if (!gve_get_napi_enabled(priv))
1735 /* Disable napi to prevent more work from coming in */
1736 for (idx = 0; idx < gve_num_tx_queues(priv); idx++) {
1737 int ntfy_idx = gve_tx_idx_to_ntfy(priv, idx);
1738 struct gve_notify_block *block = &priv->ntfy_blocks[ntfy_idx];
1740 napi_disable(&block->napi);
1742 for (idx = 0; idx < priv->rx_cfg.num_queues; idx++) {
1743 int ntfy_idx = gve_rx_idx_to_ntfy(priv, idx);
1744 struct gve_notify_block *block = &priv->ntfy_blocks[ntfy_idx];
1746 napi_disable(&block->napi);
1749 /* Stop tx queues */
1750 netif_tx_disable(priv->dev);
1752 gve_clear_napi_enabled(priv);
1753 gve_clear_report_stats(priv);
1756 static void gve_turnup(struct gve_priv *priv)
1760 /* Start the tx queues */
1761 netif_tx_start_all_queues(priv->dev);
1763 /* Enable napi and unmask interrupts for all queues */
1764 for (idx = 0; idx < gve_num_tx_queues(priv); idx++) {
1765 int ntfy_idx = gve_tx_idx_to_ntfy(priv, idx);
1766 struct gve_notify_block *block = &priv->ntfy_blocks[ntfy_idx];
1768 napi_enable(&block->napi);
1769 if (gve_is_gqi(priv)) {
1770 iowrite32be(0, gve_irq_doorbell(priv, block));
1772 gve_set_itr_coalesce_usecs_dqo(priv, block,
1773 priv->tx_coalesce_usecs);
1776 for (idx = 0; idx < priv->rx_cfg.num_queues; idx++) {
1777 int ntfy_idx = gve_rx_idx_to_ntfy(priv, idx);
1778 struct gve_notify_block *block = &priv->ntfy_blocks[ntfy_idx];
1780 napi_enable(&block->napi);
1781 if (gve_is_gqi(priv)) {
1782 iowrite32be(0, gve_irq_doorbell(priv, block));
1784 gve_set_itr_coalesce_usecs_dqo(priv, block,
1785 priv->rx_coalesce_usecs);
1789 gve_set_napi_enabled(priv);
1792 static void gve_tx_timeout(struct net_device *dev, unsigned int txqueue)
1794 struct gve_notify_block *block;
1795 struct gve_tx_ring *tx = NULL;
1796 struct gve_priv *priv;
1801 netdev_info(dev, "Timeout on tx queue, %d", txqueue);
1802 priv = netdev_priv(dev);
1803 if (txqueue > priv->tx_cfg.num_queues)
1806 ntfy_idx = gve_tx_idx_to_ntfy(priv, txqueue);
1807 if (ntfy_idx >= priv->num_ntfy_blks)
1810 block = &priv->ntfy_blocks[ntfy_idx];
1813 current_time = jiffies_to_msecs(jiffies);
1814 if (tx->last_kick_msec + MIN_TX_TIMEOUT_GAP > current_time)
1817 /* Check to see if there are missed completions, which will allow us to
1820 last_nic_done = gve_tx_load_event_counter(priv, tx);
1821 if (last_nic_done - tx->done) {
1822 netdev_info(dev, "Kicking queue %d", txqueue);
1823 iowrite32be(GVE_IRQ_MASK, gve_irq_doorbell(priv, block));
1824 napi_schedule(&block->napi);
1825 tx->last_kick_msec = current_time;
1830 gve_schedule_reset(priv);
1834 tx->queue_timeout++;
1835 priv->tx_timeo_cnt++;
1838 static int gve_set_features(struct net_device *netdev,
1839 netdev_features_t features)
1841 const netdev_features_t orig_features = netdev->features;
1842 struct gve_priv *priv = netdev_priv(netdev);
1845 if ((netdev->features & NETIF_F_LRO) != (features & NETIF_F_LRO)) {
1846 netdev->features ^= NETIF_F_LRO;
1847 if (netif_carrier_ok(netdev)) {
1848 /* To make this process as simple as possible we
1849 * teardown the device, set the new configuration,
1850 * and then bring the device up again.
1852 err = gve_close(netdev);
1853 /* We have already tried to reset in close, just fail
1859 err = gve_open(netdev);
1867 /* Reverts the change on error. */
1868 netdev->features = orig_features;
1869 netif_err(priv, drv, netdev,
1870 "Set features failed! !!! DISABLING ALL QUEUES !!!\n");
1874 static const struct net_device_ops gve_netdev_ops = {
1875 .ndo_start_xmit = gve_start_xmit,
1876 .ndo_open = gve_open,
1877 .ndo_stop = gve_close,
1878 .ndo_get_stats64 = gve_get_stats,
1879 .ndo_tx_timeout = gve_tx_timeout,
1880 .ndo_set_features = gve_set_features,
1882 .ndo_xdp_xmit = gve_xdp_xmit,
1883 .ndo_xsk_wakeup = gve_xsk_wakeup,
1886 static void gve_handle_status(struct gve_priv *priv, u32 status)
1888 if (GVE_DEVICE_STATUS_RESET_MASK & status) {
1889 dev_info(&priv->pdev->dev, "Device requested reset.\n");
1890 gve_set_do_reset(priv);
1892 if (GVE_DEVICE_STATUS_REPORT_STATS_MASK & status) {
1893 priv->stats_report_trigger_cnt++;
1894 gve_set_do_report_stats(priv);
1898 static void gve_handle_reset(struct gve_priv *priv)
1900 /* A service task will be scheduled at the end of probe to catch any
1901 * resets that need to happen, and we don't want to reset until
1904 if (gve_get_probe_in_progress(priv))
1907 if (gve_get_do_reset(priv)) {
1909 gve_reset(priv, false);
1914 void gve_handle_report_stats(struct gve_priv *priv)
1916 struct stats *stats = priv->stats_report->stats;
1917 int idx, stats_idx = 0;
1918 unsigned int start = 0;
1921 if (!gve_get_report_stats(priv))
1924 be64_add_cpu(&priv->stats_report->written_count, 1);
1927 for (idx = 0; idx < gve_num_tx_queues(priv); idx++) {
1928 u32 last_completion = 0;
1931 /* DQO doesn't currently support these metrics. */
1932 if (gve_is_gqi(priv)) {
1933 last_completion = priv->tx[idx].done;
1934 tx_frames = priv->tx[idx].req;
1938 start = u64_stats_fetch_begin(&priv->tx[idx].statss);
1939 tx_bytes = priv->tx[idx].bytes_done;
1940 } while (u64_stats_fetch_retry(&priv->tx[idx].statss, start));
1941 stats[stats_idx++] = (struct stats) {
1942 .stat_name = cpu_to_be32(TX_WAKE_CNT),
1943 .value = cpu_to_be64(priv->tx[idx].wake_queue),
1944 .queue_id = cpu_to_be32(idx),
1946 stats[stats_idx++] = (struct stats) {
1947 .stat_name = cpu_to_be32(TX_STOP_CNT),
1948 .value = cpu_to_be64(priv->tx[idx].stop_queue),
1949 .queue_id = cpu_to_be32(idx),
1951 stats[stats_idx++] = (struct stats) {
1952 .stat_name = cpu_to_be32(TX_FRAMES_SENT),
1953 .value = cpu_to_be64(tx_frames),
1954 .queue_id = cpu_to_be32(idx),
1956 stats[stats_idx++] = (struct stats) {
1957 .stat_name = cpu_to_be32(TX_BYTES_SENT),
1958 .value = cpu_to_be64(tx_bytes),
1959 .queue_id = cpu_to_be32(idx),
1961 stats[stats_idx++] = (struct stats) {
1962 .stat_name = cpu_to_be32(TX_LAST_COMPLETION_PROCESSED),
1963 .value = cpu_to_be64(last_completion),
1964 .queue_id = cpu_to_be32(idx),
1966 stats[stats_idx++] = (struct stats) {
1967 .stat_name = cpu_to_be32(TX_TIMEOUT_CNT),
1968 .value = cpu_to_be64(priv->tx[idx].queue_timeout),
1969 .queue_id = cpu_to_be32(idx),
1975 for (idx = 0; idx < priv->rx_cfg.num_queues; idx++) {
1976 stats[stats_idx++] = (struct stats) {
1977 .stat_name = cpu_to_be32(RX_NEXT_EXPECTED_SEQUENCE),
1978 .value = cpu_to_be64(priv->rx[idx].desc.seqno),
1979 .queue_id = cpu_to_be32(idx),
1981 stats[stats_idx++] = (struct stats) {
1982 .stat_name = cpu_to_be32(RX_BUFFERS_POSTED),
1983 .value = cpu_to_be64(priv->rx[0].fill_cnt),
1984 .queue_id = cpu_to_be32(idx),
1990 /* Handle NIC status register changes, reset requests and report stats */
1991 static void gve_service_task(struct work_struct *work)
1993 struct gve_priv *priv = container_of(work, struct gve_priv,
1995 u32 status = ioread32be(&priv->reg_bar0->device_status);
1997 gve_handle_status(priv, status);
1999 gve_handle_reset(priv);
2000 gve_handle_link_status(priv, GVE_DEVICE_STATUS_LINK_STATUS_MASK & status);
2003 static void gve_set_netdev_xdp_features(struct gve_priv *priv)
2005 if (priv->queue_format == GVE_GQI_QPL_FORMAT) {
2006 priv->dev->xdp_features = NETDEV_XDP_ACT_BASIC;
2007 priv->dev->xdp_features |= NETDEV_XDP_ACT_REDIRECT;
2008 priv->dev->xdp_features |= NETDEV_XDP_ACT_NDO_XMIT;
2009 priv->dev->xdp_features |= NETDEV_XDP_ACT_XSK_ZEROCOPY;
2011 priv->dev->xdp_features = 0;
2015 static int gve_init_priv(struct gve_priv *priv, bool skip_describe_device)
2020 /* Set up the adminq */
2021 err = gve_adminq_alloc(&priv->pdev->dev, priv);
2023 dev_err(&priv->pdev->dev,
2024 "Failed to alloc admin queue: err=%d\n", err);
2028 err = gve_verify_driver_compatibility(priv);
2030 dev_err(&priv->pdev->dev,
2031 "Could not verify driver compatibility: err=%d\n", err);
2035 if (skip_describe_device)
2038 priv->queue_format = GVE_QUEUE_FORMAT_UNSPECIFIED;
2039 /* Get the initial information we need from the device */
2040 err = gve_adminq_describe_device(priv);
2042 dev_err(&priv->pdev->dev,
2043 "Could not get device information: err=%d\n", err);
2046 priv->dev->mtu = priv->dev->max_mtu;
2047 num_ntfy = pci_msix_vec_count(priv->pdev);
2048 if (num_ntfy <= 0) {
2049 dev_err(&priv->pdev->dev,
2050 "could not count MSI-x vectors: err=%d\n", num_ntfy);
2053 } else if (num_ntfy < GVE_MIN_MSIX) {
2054 dev_err(&priv->pdev->dev, "gve needs at least %d MSI-x vectors, but only has %d\n",
2055 GVE_MIN_MSIX, num_ntfy);
2060 /* Big TCP is only supported on DQ*/
2061 if (!gve_is_gqi(priv))
2062 netif_set_tso_max_size(priv->dev, GVE_DQO_TX_MAX);
2064 priv->num_registered_pages = 0;
2065 priv->rx_copybreak = GVE_DEFAULT_RX_COPYBREAK;
2066 /* gvnic has one Notification Block per MSI-x vector, except for the
2069 priv->num_ntfy_blks = (num_ntfy - 1) & ~0x1;
2070 priv->mgmt_msix_idx = priv->num_ntfy_blks;
2072 priv->tx_cfg.max_queues =
2073 min_t(int, priv->tx_cfg.max_queues, priv->num_ntfy_blks / 2);
2074 priv->rx_cfg.max_queues =
2075 min_t(int, priv->rx_cfg.max_queues, priv->num_ntfy_blks / 2);
2077 priv->tx_cfg.num_queues = priv->tx_cfg.max_queues;
2078 priv->rx_cfg.num_queues = priv->rx_cfg.max_queues;
2079 if (priv->default_num_queues > 0) {
2080 priv->tx_cfg.num_queues = min_t(int, priv->default_num_queues,
2081 priv->tx_cfg.num_queues);
2082 priv->rx_cfg.num_queues = min_t(int, priv->default_num_queues,
2083 priv->rx_cfg.num_queues);
2086 dev_info(&priv->pdev->dev, "TX queues %d, RX queues %d\n",
2087 priv->tx_cfg.num_queues, priv->rx_cfg.num_queues);
2088 dev_info(&priv->pdev->dev, "Max TX queues %d, Max RX queues %d\n",
2089 priv->tx_cfg.max_queues, priv->rx_cfg.max_queues);
2091 if (!gve_is_gqi(priv)) {
2092 priv->tx_coalesce_usecs = GVE_TX_IRQ_RATELIMIT_US_DQO;
2093 priv->rx_coalesce_usecs = GVE_RX_IRQ_RATELIMIT_US_DQO;
2097 gve_set_netdev_xdp_features(priv);
2098 err = gve_setup_device_resources(priv);
2102 gve_adminq_free(&priv->pdev->dev, priv);
2106 static void gve_teardown_priv_resources(struct gve_priv *priv)
2108 gve_teardown_device_resources(priv);
2109 gve_adminq_free(&priv->pdev->dev, priv);
2112 static void gve_trigger_reset(struct gve_priv *priv)
2114 /* Reset the device by releasing the AQ */
2115 gve_adminq_release(priv);
2118 static void gve_reset_and_teardown(struct gve_priv *priv, bool was_up)
2120 gve_trigger_reset(priv);
2121 /* With the reset having already happened, close cannot fail */
2123 gve_close(priv->dev);
2124 gve_teardown_priv_resources(priv);
2127 static int gve_reset_recovery(struct gve_priv *priv, bool was_up)
2131 err = gve_init_priv(priv, true);
2135 err = gve_open(priv->dev);
2141 dev_err(&priv->pdev->dev, "Reset failed! !!! DISABLING ALL QUEUES !!!\n");
2146 int gve_reset(struct gve_priv *priv, bool attempt_teardown)
2148 bool was_up = netif_carrier_ok(priv->dev);
2151 dev_info(&priv->pdev->dev, "Performing reset\n");
2152 gve_clear_do_reset(priv);
2153 gve_set_reset_in_progress(priv);
2154 /* If we aren't attempting to teardown normally, just go turndown and
2157 if (!attempt_teardown) {
2159 gve_reset_and_teardown(priv, was_up);
2161 /* Otherwise attempt to close normally */
2163 err = gve_close(priv->dev);
2164 /* If that fails reset as we did above */
2166 gve_reset_and_teardown(priv, was_up);
2168 /* Clean up any remaining resources */
2169 gve_teardown_priv_resources(priv);
2172 /* Set it all back up */
2173 err = gve_reset_recovery(priv, was_up);
2174 gve_clear_reset_in_progress(priv);
2176 priv->interface_up_cnt = 0;
2177 priv->interface_down_cnt = 0;
2178 priv->stats_report_trigger_cnt = 0;
2182 static void gve_write_version(u8 __iomem *driver_version_register)
2184 const char *c = gve_version_prefix;
2187 writeb(*c, driver_version_register);
2191 c = gve_version_str;
2193 writeb(*c, driver_version_register);
2196 writeb('\n', driver_version_register);
2199 static int gve_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2201 int max_tx_queues, max_rx_queues;
2202 struct net_device *dev;
2203 __be32 __iomem *db_bar;
2204 struct gve_registers __iomem *reg_bar;
2205 struct gve_priv *priv;
2208 err = pci_enable_device(pdev);
2212 err = pci_request_regions(pdev, gve_driver_name);
2214 goto abort_with_enabled;
2216 pci_set_master(pdev);
2218 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2220 dev_err(&pdev->dev, "Failed to set dma mask: err=%d\n", err);
2221 goto abort_with_pci_region;
2224 reg_bar = pci_iomap(pdev, GVE_REGISTER_BAR, 0);
2226 dev_err(&pdev->dev, "Failed to map pci bar!\n");
2228 goto abort_with_pci_region;
2231 db_bar = pci_iomap(pdev, GVE_DOORBELL_BAR, 0);
2233 dev_err(&pdev->dev, "Failed to map doorbell bar!\n");
2235 goto abort_with_reg_bar;
2238 gve_write_version(®_bar->driver_version);
2239 /* Get max queues to alloc etherdev */
2240 max_tx_queues = ioread32be(®_bar->max_tx_queues);
2241 max_rx_queues = ioread32be(®_bar->max_rx_queues);
2242 /* Alloc and setup the netdev and priv */
2243 dev = alloc_etherdev_mqs(sizeof(*priv), max_tx_queues, max_rx_queues);
2245 dev_err(&pdev->dev, "could not allocate netdev\n");
2247 goto abort_with_db_bar;
2249 SET_NETDEV_DEV(dev, &pdev->dev);
2250 pci_set_drvdata(pdev, dev);
2251 dev->ethtool_ops = &gve_ethtool_ops;
2252 dev->netdev_ops = &gve_netdev_ops;
2254 /* Set default and supported features.
2256 * Features might be set in other locations as well (such as
2257 * `gve_adminq_describe_device`).
2259 dev->hw_features = NETIF_F_HIGHDMA;
2260 dev->hw_features |= NETIF_F_SG;
2261 dev->hw_features |= NETIF_F_HW_CSUM;
2262 dev->hw_features |= NETIF_F_TSO;
2263 dev->hw_features |= NETIF_F_TSO6;
2264 dev->hw_features |= NETIF_F_TSO_ECN;
2265 dev->hw_features |= NETIF_F_RXCSUM;
2266 dev->hw_features |= NETIF_F_RXHASH;
2267 dev->features = dev->hw_features;
2268 dev->watchdog_timeo = 5 * HZ;
2269 dev->min_mtu = ETH_MIN_MTU;
2270 netif_carrier_off(dev);
2272 priv = netdev_priv(dev);
2275 priv->msg_enable = DEFAULT_MSG_LEVEL;
2276 priv->reg_bar0 = reg_bar;
2277 priv->db_bar2 = db_bar;
2278 priv->service_task_flags = 0x0;
2279 priv->state_flags = 0x0;
2280 priv->ethtool_flags = 0x0;
2282 gve_set_probe_in_progress(priv);
2283 priv->gve_wq = alloc_ordered_workqueue("gve", 0);
2284 if (!priv->gve_wq) {
2285 dev_err(&pdev->dev, "Could not allocate workqueue");
2287 goto abort_with_netdev;
2289 INIT_WORK(&priv->service_task, gve_service_task);
2290 INIT_WORK(&priv->stats_report_task, gve_stats_report_task);
2291 priv->tx_cfg.max_queues = max_tx_queues;
2292 priv->rx_cfg.max_queues = max_rx_queues;
2294 err = gve_init_priv(priv, false);
2298 err = register_netdev(dev);
2300 goto abort_with_gve_init;
2302 dev_info(&pdev->dev, "GVE version %s\n", gve_version_str);
2303 dev_info(&pdev->dev, "GVE queue format %d\n", (int)priv->queue_format);
2304 gve_clear_probe_in_progress(priv);
2305 queue_work(priv->gve_wq, &priv->service_task);
2308 abort_with_gve_init:
2309 gve_teardown_priv_resources(priv);
2312 destroy_workqueue(priv->gve_wq);
2318 pci_iounmap(pdev, db_bar);
2321 pci_iounmap(pdev, reg_bar);
2323 abort_with_pci_region:
2324 pci_release_regions(pdev);
2327 pci_disable_device(pdev);
2331 static void gve_remove(struct pci_dev *pdev)
2333 struct net_device *netdev = pci_get_drvdata(pdev);
2334 struct gve_priv *priv = netdev_priv(netdev);
2335 __be32 __iomem *db_bar = priv->db_bar2;
2336 void __iomem *reg_bar = priv->reg_bar0;
2338 unregister_netdev(netdev);
2339 gve_teardown_priv_resources(priv);
2340 destroy_workqueue(priv->gve_wq);
2341 free_netdev(netdev);
2342 pci_iounmap(pdev, db_bar);
2343 pci_iounmap(pdev, reg_bar);
2344 pci_release_regions(pdev);
2345 pci_disable_device(pdev);
2348 static void gve_shutdown(struct pci_dev *pdev)
2350 struct net_device *netdev = pci_get_drvdata(pdev);
2351 struct gve_priv *priv = netdev_priv(netdev);
2352 bool was_up = netif_carrier_ok(priv->dev);
2355 if (was_up && gve_close(priv->dev)) {
2356 /* If the dev was up, attempt to close, if close fails, reset */
2357 gve_reset_and_teardown(priv, was_up);
2359 /* If the dev wasn't up or close worked, finish tearing down */
2360 gve_teardown_priv_resources(priv);
2366 static int gve_suspend(struct pci_dev *pdev, pm_message_t state)
2368 struct net_device *netdev = pci_get_drvdata(pdev);
2369 struct gve_priv *priv = netdev_priv(netdev);
2370 bool was_up = netif_carrier_ok(priv->dev);
2372 priv->suspend_cnt++;
2374 if (was_up && gve_close(priv->dev)) {
2375 /* If the dev was up, attempt to close, if close fails, reset */
2376 gve_reset_and_teardown(priv, was_up);
2378 /* If the dev wasn't up or close worked, finish tearing down */
2379 gve_teardown_priv_resources(priv);
2381 priv->up_before_suspend = was_up;
2386 static int gve_resume(struct pci_dev *pdev)
2388 struct net_device *netdev = pci_get_drvdata(pdev);
2389 struct gve_priv *priv = netdev_priv(netdev);
2394 err = gve_reset_recovery(priv, priv->up_before_suspend);
2398 #endif /* CONFIG_PM */
2400 static const struct pci_device_id gve_id_table[] = {
2401 { PCI_DEVICE(PCI_VENDOR_ID_GOOGLE, PCI_DEV_ID_GVNIC) },
2405 static struct pci_driver gve_driver = {
2406 .name = gve_driver_name,
2407 .id_table = gve_id_table,
2409 .remove = gve_remove,
2410 .shutdown = gve_shutdown,
2412 .suspend = gve_suspend,
2413 .resume = gve_resume,
2417 module_pci_driver(gve_driver);
2419 MODULE_DEVICE_TABLE(pci, gve_id_table);
2420 MODULE_AUTHOR("Google, Inc.");
2421 MODULE_DESCRIPTION("Google Virtual NIC Driver");
2422 MODULE_LICENSE("Dual MIT/GPL");
2423 MODULE_VERSION(GVE_VERSION);