2 * Fast Ethernet Controller (ENET) PTP driver for MX6x.
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/string.h>
23 #include <linux/ptrace.h>
24 #include <linux/errno.h>
25 #include <linux/ioport.h>
26 #include <linux/slab.h>
27 #include <linux/interrupt.h>
28 #include <linux/pci.h>
29 #include <linux/init.h>
30 #include <linux/delay.h>
31 #include <linux/netdevice.h>
32 #include <linux/etherdevice.h>
33 #include <linux/skbuff.h>
34 #include <linux/spinlock.h>
35 #include <linux/workqueue.h>
36 #include <linux/bitops.h>
38 #include <linux/irq.h>
39 #include <linux/clk.h>
40 #include <linux/platform_device.h>
41 #include <linux/phy.h>
42 #include <linux/fec.h>
44 #include <linux/of_device.h>
45 #include <linux/of_gpio.h>
46 #include <linux/of_net.h>
50 /* FEC 1588 register bits */
51 #define FEC_T_CTRL_SLAVE 0x00002000
52 #define FEC_T_CTRL_CAPTURE 0x00000800
53 #define FEC_T_CTRL_RESTART 0x00000200
54 #define FEC_T_CTRL_PERIOD_RST 0x00000030
55 #define FEC_T_CTRL_PERIOD_EN 0x00000010
56 #define FEC_T_CTRL_ENABLE 0x00000001
58 #define FEC_T_INC_MASK 0x0000007f
59 #define FEC_T_INC_OFFSET 0
60 #define FEC_T_INC_CORR_MASK 0x00007f00
61 #define FEC_T_INC_CORR_OFFSET 8
63 #define FEC_ATIME_CTRL 0x400
64 #define FEC_ATIME 0x404
65 #define FEC_ATIME_EVT_OFFSET 0x408
66 #define FEC_ATIME_EVT_PERIOD 0x40c
67 #define FEC_ATIME_CORR 0x410
68 #define FEC_ATIME_INC 0x414
69 #define FEC_TS_TIMESTAMP 0x418
71 #define FEC_CC_MULT (1 << 31)
73 * fec_ptp_read - read raw cycle counter (to be used by time counter)
74 * @cc: the cyclecounter structure
76 * this function reads the cyclecounter registers and is called by the
77 * cyclecounter structure used to construct a ns counter from the
78 * arbitrary fixed point registers
80 static cycle_t fec_ptp_read(const struct cyclecounter *cc)
82 struct fec_enet_private *fep =
83 container_of(cc, struct fec_enet_private, cc);
86 tempval = readl(fep->hwp + FEC_ATIME_CTRL);
87 tempval |= FEC_T_CTRL_CAPTURE;
88 writel(tempval, fep->hwp + FEC_ATIME_CTRL);
90 return readl(fep->hwp + FEC_ATIME);
94 * fec_ptp_start_cyclecounter - create the cycle counter from hw
95 * @ndev: network device
97 * this function initializes the timecounter and cyclecounter
98 * structures for use in generated a ns counter from the arbitrary
99 * fixed point cycles registers in the hardware.
101 void fec_ptp_start_cyclecounter(struct net_device *ndev)
103 struct fec_enet_private *fep = netdev_priv(ndev);
107 inc = 1000000000 / fep->cycle_speed;
109 /* grab the ptp lock */
110 spin_lock_irqsave(&fep->tmreg_lock, flags);
113 writel(inc << FEC_T_INC_OFFSET, fep->hwp + FEC_ATIME_INC);
115 /* use free running count */
116 writel(0, fep->hwp + FEC_ATIME_EVT_PERIOD);
118 writel(FEC_T_CTRL_ENABLE, fep->hwp + FEC_ATIME_CTRL);
120 memset(&fep->cc, 0, sizeof(fep->cc));
121 fep->cc.read = fec_ptp_read;
122 fep->cc.mask = CLOCKSOURCE_MASK(32);
124 fep->cc.mult = FEC_CC_MULT;
126 /* reset the ns time counter */
127 timecounter_init(&fep->tc, &fep->cc, ktime_to_ns(ktime_get_real()));
129 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
131 EXPORT_SYMBOL(fec_ptp_start_cyclecounter);
134 * fec_ptp_adjfreq - adjust ptp cycle frequency
135 * @ptp: the ptp clock structure
136 * @ppb: parts per billion adjustment from base
138 * Adjust the frequency of the ptp cycle counter by the
139 * indicated ppb from the base frequency.
141 * Because ENET hardware frequency adjust is complex,
142 * using software method to do that.
144 static int fec_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
149 u32 mult = FEC_CC_MULT;
151 struct fec_enet_private *fep =
152 container_of(ptp, struct fec_enet_private, ptp_caps);
161 diff = div_u64(diff, 1000000000ULL);
163 spin_lock_irqsave(&fep->tmreg_lock, flags);
165 * dummy read to set cycle_last in tc to now.
166 * So use adjusted mult to calculate when next call
169 timecounter_read(&fep->tc);
171 fep->cc.mult = neg_adj ? mult - diff : mult + diff;
173 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
180 * @ptp: the ptp clock structure
181 * @delta: offset to adjust the cycle counter by
183 * adjust the timer by resetting the timecounter structure.
185 static int fec_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
187 struct fec_enet_private *fep =
188 container_of(ptp, struct fec_enet_private, ptp_caps);
192 spin_lock_irqsave(&fep->tmreg_lock, flags);
194 now = timecounter_read(&fep->tc);
197 /* reset the timecounter */
198 timecounter_init(&fep->tc, &fep->cc, now);
200 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
207 * @ptp: the ptp clock structure
208 * @ts: timespec structure to hold the current time value
210 * read the timecounter and return the correct value on ns,
211 * after converting it into a struct timespec.
213 static int fec_ptp_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
215 struct fec_enet_private *adapter =
216 container_of(ptp, struct fec_enet_private, ptp_caps);
221 spin_lock_irqsave(&adapter->tmreg_lock, flags);
222 ns = timecounter_read(&adapter->tc);
223 spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
225 ts->tv_sec = div_u64_rem(ns, 1000000000ULL, &remainder);
226 ts->tv_nsec = remainder;
233 * @ptp: the ptp clock structure
234 * @ts: the timespec containing the new time for the cycle counter
236 * reset the timecounter to use a new base value instead of the kernel
239 static int fec_ptp_settime(struct ptp_clock_info *ptp,
240 const struct timespec *ts)
242 struct fec_enet_private *fep =
243 container_of(ptp, struct fec_enet_private, ptp_caps);
248 ns = ts->tv_sec * 1000000000ULL;
251 spin_lock_irqsave(&fep->tmreg_lock, flags);
252 timecounter_init(&fep->tc, &fep->cc, ns);
253 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
259 * @ptp: the ptp clock structure
260 * @rq: the requested feature to change
261 * @on: whether to enable or disable the feature
264 static int fec_ptp_enable(struct ptp_clock_info *ptp,
265 struct ptp_clock_request *rq, int on)
271 * fec_ptp_hwtstamp_ioctl - control hardware time stamping
272 * @ndev: pointer to net_device
274 * @cmd: particular ioctl requested
276 int fec_ptp_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd)
278 struct fec_enet_private *fep = netdev_priv(ndev);
280 struct hwtstamp_config config;
282 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
285 /* reserved for future extensions */
289 switch (config.tx_type) {
290 case HWTSTAMP_TX_OFF:
300 switch (config.rx_filter) {
301 case HWTSTAMP_FILTER_NONE:
304 config.rx_filter = HWTSTAMP_FILTER_NONE;
309 * register RXMTRL must be set in order to do V1 packets,
310 * therefore it is not possible to time stamp both V1 Sync and
311 * Delay_Req messages and hardware does not support
312 * timestamping all packets => return error
315 config.rx_filter = HWTSTAMP_FILTER_ALL;
319 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
322 EXPORT_SYMBOL(fec_ptp_ioctl);
325 * fec_time_keep - call timecounter_read every second to avoid timer overrun
326 * because ENET just support 32bit counter, will timeout in 4s
328 static void fec_time_keep(unsigned long _data)
330 struct fec_enet_private *fep = (struct fec_enet_private *)_data;
334 spin_lock_irqsave(&fep->tmreg_lock, flags);
335 ns = timecounter_read(&fep->tc);
336 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
338 mod_timer(&fep->time_keep, jiffies + HZ);
343 * @ndev: The FEC network adapter
345 * This function performs the required steps for enabling ptp
346 * support. If ptp support has already been loaded it simply calls the
347 * cyclecounter init routine and exits.
350 void fec_ptp_init(struct net_device *ndev, struct platform_device *pdev)
352 struct fec_enet_private *fep = netdev_priv(ndev);
354 fep->ptp_caps.owner = THIS_MODULE;
355 snprintf(fep->ptp_caps.name, 16, "fec ptp");
357 fep->ptp_caps.max_adj = 250000000;
358 fep->ptp_caps.n_alarm = 0;
359 fep->ptp_caps.n_ext_ts = 0;
360 fep->ptp_caps.n_per_out = 0;
361 fep->ptp_caps.pps = 0;
362 fep->ptp_caps.adjfreq = fec_ptp_adjfreq;
363 fep->ptp_caps.adjtime = fec_ptp_adjtime;
364 fep->ptp_caps.gettime = fec_ptp_gettime;
365 fep->ptp_caps.settime = fec_ptp_settime;
366 fep->ptp_caps.enable = fec_ptp_enable;
368 fep->cycle_speed = clk_get_rate(fep->clk_ptp);
370 spin_lock_init(&fep->tmreg_lock);
372 fec_ptp_start_cyclecounter(ndev);
374 init_timer(&fep->time_keep);
375 fep->time_keep.data = (unsigned long)fep;
376 fep->time_keep.function = fec_time_keep;
377 fep->time_keep.expires = jiffies + HZ;
378 add_timer(&fep->time_keep);
380 fep->ptp_clock = ptp_clock_register(&fep->ptp_caps, &pdev->dev);
381 if (IS_ERR(fep->ptp_clock)) {
382 fep->ptp_clock = NULL;
383 pr_err("ptp_clock_register failed\n");
385 pr_info("registered PHC device on %s\n", ndev->name);
388 EXPORT_SYMBOL(fec_ptp_init);