1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2017-2019 NXP */
4 #include <linux/timer.h>
6 #include <linux/netdevice.h>
7 #include <linux/etherdevice.h>
8 #include <linux/dma-mapping.h>
9 #include <linux/skbuff.h>
10 #include <linux/ethtool.h>
11 #include <linux/if_vlan.h>
12 #include <linux/phylink.h>
13 #include <linux/dim.h>
17 #define ENETC_MAC_MAXFRM_SIZE 9600
18 #define ENETC_MAX_MTU (ENETC_MAC_MAXFRM_SIZE - \
19 (ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN))
21 struct enetc_tx_swbd {
30 #define ENETC_RX_MAXFRM_SIZE ENETC_MAC_MAXFRM_SIZE
31 #define ENETC_RXB_TRUESIZE 2048 /* PAGE_SIZE >> 1 */
32 #define ENETC_RXB_PAD NET_SKB_PAD /* add extra space if needed */
33 #define ENETC_RXB_DMA_SIZE \
34 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD)
36 struct enetc_rx_swbd {
42 struct enetc_ring_stats {
45 unsigned int rx_alloc_errs;
48 #define ENETC_RX_RING_DEFAULT_SIZE 512
49 #define ENETC_TX_RING_DEFAULT_SIZE 256
50 #define ENETC_DEFAULT_TX_WORK (ENETC_TX_RING_DEFAULT_SIZE / 2)
53 struct device *dev; /* for DMA mapping */
54 struct net_device *ndev;
55 void *bd_base; /* points to Rx or Tx BD ring */
61 int bd_count; /* # of BDs */
65 struct enetc_tx_swbd *tx_swbd;
66 struct enetc_rx_swbd *rx_swbd;
69 void __iomem *tcir; /* Tx */
70 int next_to_alloc; /* Rx */
72 void __iomem *idr; /* Interrupt Detect Register pointer */
74 struct enetc_ring_stats stats;
76 dma_addr_t bd_dma_base;
77 u8 tsd_enable; /* Time specific departure */
78 bool ext_en; /* enable h/w descriptor extensions */
79 } ____cacheline_aligned_in_smp;
81 static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i)
83 if (unlikely(++*i == bdr->bd_count))
87 static inline int enetc_bd_unused(struct enetc_bdr *bdr)
89 if (bdr->next_to_clean > bdr->next_to_use)
90 return bdr->next_to_clean - bdr->next_to_use - 1;
92 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1;
96 #define ENETC_CBDR_DEFAULT_SIZE 64
98 void *bd_base; /* points to Rx or Tx BD ring */
101 void __iomem *mr; /* mode register */
103 int bd_count; /* # of BDs */
107 dma_addr_t bd_dma_base;
108 struct device *dma_dev;
111 #define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i]))
113 static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i)
117 #ifdef CONFIG_FSL_ENETC_PTP_CLOCK
121 return &(((union enetc_rx_bd *)rx_ring->bd_base)[hw_idx]);
124 static inline void enetc_rxbd_next(struct enetc_bdr *rx_ring,
125 union enetc_rx_bd **old_rxbd, int *old_index)
127 union enetc_rx_bd *new_rxbd = *old_rxbd;
128 int new_index = *old_index;
132 #ifdef CONFIG_FSL_ENETC_PTP_CLOCK
137 if (unlikely(++new_index == rx_ring->bd_count)) {
138 new_rxbd = rx_ring->bd_base;
142 *old_rxbd = new_rxbd;
143 *old_index = new_index;
146 static inline union enetc_rx_bd *enetc_rxbd_ext(union enetc_rx_bd *rxbd)
151 struct enetc_msg_swbd {
157 #define ENETC_REV1 0x1
159 ENETC_ERR_VLAN_ISOL = BIT(0),
160 ENETC_ERR_UCMCSWP = BIT(1),
163 #define ENETC_SI_F_QBV BIT(0)
164 #define ENETC_SI_F_PSFP BIT(1)
166 /* PCI IEP device data */
168 struct pci_dev *pdev;
170 enum enetc_errata errata;
172 struct net_device *ndev; /* back ref. */
174 struct enetc_cbdr cbd_ring;
176 int num_rx_rings; /* how many rings are available in the SI */
179 int num_rss; /* number of RSS buckets */
184 #define ENETC_SI_ALIGN 32
186 static inline void *enetc_si_priv(const struct enetc_si *si)
188 return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN);
191 static inline bool enetc_si_is_pf(struct enetc_si *si)
193 return !!(si->hw.port);
196 #define ENETC_MAX_NUM_TXQS 8
197 #define ENETC_INT_NAME_MAX (IFNAMSIZ + 8)
199 struct enetc_int_vector {
201 void __iomem *tbier_base;
203 unsigned long tx_rings_map;
207 bool rx_dim_en, rx_napi_work;
208 struct napi_struct napi ____cacheline_aligned_in_smp;
209 struct dim rx_dim ____cacheline_aligned_in_smp;
210 char name[ENETC_INT_NAME_MAX];
212 struct enetc_bdr rx_ring;
213 struct enetc_bdr tx_ring[];
214 } ____cacheline_aligned_in_smp;
216 struct enetc_cls_rule {
217 struct ethtool_rx_flow_spec fs;
221 #define ENETC_MAX_BDR_INT 2 /* fixed to max # of available cpus */
226 u32 max_psfp_gatelist;
230 /* TODO: more hardware offloads */
231 enum enetc_active_offloads {
232 ENETC_F_RX_TSTAMP = BIT(0),
233 ENETC_F_TX_TSTAMP = BIT(1),
234 ENETC_F_QBV = BIT(2),
235 ENETC_F_QCI = BIT(3),
238 /* interrupt coalescing modes */
240 /* one interrupt per frame */
242 /* activated when int coalescing time is set to a non-0 value */
243 ENETC_IC_RX_MANUAL = BIT(0),
244 ENETC_IC_TX_MANUAL = BIT(1),
245 /* use dynamic interrupt moderation */
246 ENETC_IC_RX_ADAPTIVE = BIT(2),
249 #define ENETC_RXIC_PKTTHR min_t(u32, 256, ENETC_RX_RING_DEFAULT_SIZE / 2)
250 #define ENETC_TXIC_PKTTHR min_t(u32, 128, ENETC_TX_RING_DEFAULT_SIZE / 2)
251 #define ENETC_TXIC_TIMETHR enetc_usecs_to_cycles(600)
253 struct enetc_ndev_priv {
254 struct net_device *ndev;
255 struct device *dev; /* dma-mapping device */
258 int bdr_int_num; /* number of Rx/Tx ring interrupts */
259 struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT];
260 u16 num_rx_rings, num_tx_rings;
261 u16 rx_bd_count, tx_bd_count;
264 enum enetc_active_offloads active_offloads;
266 u32 speed; /* store speed for compare update pspeed */
268 struct enetc_bdr *tx_ring[16];
269 struct enetc_bdr *rx_ring[16];
271 struct enetc_cls_rule *cls_rules;
273 struct psfp_cap psfp_cap;
275 struct phylink *phylink;
282 /* VF-PF set primary MAC address message format */
283 struct enetc_msg_cmd_set_primary_mac {
284 struct enetc_msg_cmd_header header;
288 #define ENETC_CBD(R, i) (&(((struct enetc_cbd *)((R).bd_base))[i]))
290 #define ENETC_CBDR_TIMEOUT 1000 /* usecs */
292 /* PTP driver exports */
293 extern int enetc_phc_index;
296 int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv);
297 void enetc_pci_remove(struct pci_dev *pdev);
298 int enetc_alloc_msix(struct enetc_ndev_priv *priv);
299 void enetc_free_msix(struct enetc_ndev_priv *priv);
300 void enetc_get_si_caps(struct enetc_si *si);
301 void enetc_init_si_rings_params(struct enetc_ndev_priv *priv);
302 int enetc_alloc_si_resources(struct enetc_ndev_priv *priv);
303 void enetc_free_si_resources(struct enetc_ndev_priv *priv);
304 int enetc_configure_si(struct enetc_ndev_priv *priv);
306 int enetc_open(struct net_device *ndev);
307 int enetc_close(struct net_device *ndev);
308 void enetc_start(struct net_device *ndev);
309 void enetc_stop(struct net_device *ndev);
310 netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev);
311 struct net_device_stats *enetc_get_stats(struct net_device *ndev);
312 int enetc_set_features(struct net_device *ndev,
313 netdev_features_t features);
314 int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd);
315 int enetc_setup_tc(struct net_device *ndev, enum tc_setup_type type,
319 void enetc_set_ethtool_ops(struct net_device *ndev);
321 /* control buffer descriptor ring (CBDR) */
322 int enetc_setup_cbdr(struct device *dev, struct enetc_hw *hw, int bd_count,
323 struct enetc_cbdr *cbdr);
324 void enetc_teardown_cbdr(struct enetc_cbdr *cbdr);
325 int enetc_set_mac_flt_entry(struct enetc_si *si, int index,
326 char *mac_addr, int si_map);
327 int enetc_clear_mac_flt_entry(struct enetc_si *si, int index);
328 int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse,
330 void enetc_set_rss_key(struct enetc_hw *hw, const u8 *bytes);
331 int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count);
332 int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count);
333 int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd);
335 #ifdef CONFIG_FSL_ENETC_QOS
336 int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data);
337 void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed);
338 int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data);
339 int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data);
340 int enetc_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
342 int enetc_setup_tc_psfp(struct net_device *ndev, void *type_data);
343 int enetc_psfp_init(struct enetc_ndev_priv *priv);
344 int enetc_psfp_clean(struct enetc_ndev_priv *priv);
346 static inline void enetc_get_max_cap(struct enetc_ndev_priv *priv)
350 reg = enetc_port_rd(&priv->si->hw, ENETC_PSIDCAPR);
351 priv->psfp_cap.max_streamid = reg & ENETC_PSIDCAPR_MSK;
352 /* Port stream filter capability */
353 reg = enetc_port_rd(&priv->si->hw, ENETC_PSFCAPR);
354 priv->psfp_cap.max_psfp_filter = reg & ENETC_PSFCAPR_MSK;
355 /* Port stream gate capability */
356 reg = enetc_port_rd(&priv->si->hw, ENETC_PSGCAPR);
357 priv->psfp_cap.max_psfp_gate = (reg & ENETC_PSGCAPR_SGIT_MSK);
358 priv->psfp_cap.max_psfp_gatelist = (reg & ENETC_PSGCAPR_GCL_MSK) >> 16;
359 /* Port flow meter capability */
360 reg = enetc_port_rd(&priv->si->hw, ENETC_PFMCAPR);
361 priv->psfp_cap.max_psfp_meter = reg & ENETC_PFMCAPR_MSK;
364 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
366 struct enetc_hw *hw = &priv->si->hw;
369 enetc_get_max_cap(priv);
371 err = enetc_psfp_init(priv);
375 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) |
376 ENETC_PPSFPMR_PSFPEN | ENETC_PPSFPMR_VS |
377 ENETC_PPSFPMR_PVC | ENETC_PPSFPMR_PVZC);
382 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
384 struct enetc_hw *hw = &priv->si->hw;
387 err = enetc_psfp_clean(priv);
391 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) &
392 ~ENETC_PPSFPMR_PSFPEN & ~ENETC_PPSFPMR_VS &
393 ~ENETC_PPSFPMR_PVC & ~ENETC_PPSFPMR_PVZC);
395 memset(&priv->psfp_cap, 0, sizeof(struct psfp_cap));
401 #define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP
402 #define enetc_sched_speed_set(priv, speed) (void)0
403 #define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP
404 #define enetc_setup_tc_txtime(ndev, type_data) -EOPNOTSUPP
405 #define enetc_setup_tc_psfp(ndev, type_data) -EOPNOTSUPP
406 #define enetc_setup_tc_block_cb NULL
408 #define enetc_get_max_cap(p) \
409 memset(&((p)->psfp_cap), 0, sizeof(struct psfp_cap))
411 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
416 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)