2 * Copyright (C) 2005 - 2011 Emulex
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@emulex.com
15 * Costa Mesa, CA 92626
18 #include <linux/prefetch.h>
19 #include <linux/module.h>
22 #include <asm/div64.h>
24 MODULE_VERSION(DRV_VER);
25 MODULE_DEVICE_TABLE(pci, be_dev_ids);
26 MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
27 MODULE_AUTHOR("ServerEngines Corporation");
28 MODULE_LICENSE("GPL");
30 static unsigned int num_vfs;
31 module_param(num_vfs, uint, S_IRUGO);
32 MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
34 static ushort rx_frag_size = 2048;
35 module_param(rx_frag_size, ushort, S_IRUGO);
36 MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
38 static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
39 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
40 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
41 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
42 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
43 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID3)},
44 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID4)},
45 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID5)},
48 MODULE_DEVICE_TABLE(pci, be_dev_ids);
49 /* UE Status Low CSR */
50 static const char * const ue_status_low_desc[] = {
84 /* UE Status High CSR */
85 static const char * const ue_status_hi_desc[] = {
120 /* Is BE in a multi-channel mode */
121 static inline bool be_is_mc(struct be_adapter *adapter) {
122 return (adapter->function_mode & FLEX10_MODE ||
123 adapter->function_mode & VNIC_MODE ||
124 adapter->function_mode & UMC_ENABLED);
127 static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
129 struct be_dma_mem *mem = &q->dma_mem;
131 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
137 static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
138 u16 len, u16 entry_size)
140 struct be_dma_mem *mem = &q->dma_mem;
142 memset(q, 0, sizeof(*q));
144 q->entry_size = entry_size;
145 mem->size = len * entry_size;
146 mem->va = dma_alloc_coherent(&adapter->pdev->dev, mem->size, &mem->dma,
150 memset(mem->va, 0, mem->size);
154 static void be_intr_set(struct be_adapter *adapter, bool enable)
158 if (adapter->eeh_err)
161 pci_read_config_dword(adapter->pdev, PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET,
163 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
165 if (!enabled && enable)
166 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
167 else if (enabled && !enable)
168 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
172 pci_write_config_dword(adapter->pdev,
173 PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET, reg);
176 static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
179 val |= qid & DB_RQ_RING_ID_MASK;
180 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
183 iowrite32(val, adapter->db + DB_RQ_OFFSET);
186 static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
189 val |= qid & DB_TXULP_RING_ID_MASK;
190 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
193 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
196 static void be_eq_notify(struct be_adapter *adapter, u16 qid,
197 bool arm, bool clear_int, u16 num_popped)
200 val |= qid & DB_EQ_RING_ID_MASK;
201 val |= ((qid & DB_EQ_RING_ID_EXT_MASK) <<
202 DB_EQ_RING_ID_EXT_MASK_SHIFT);
204 if (adapter->eeh_err)
208 val |= 1 << DB_EQ_REARM_SHIFT;
210 val |= 1 << DB_EQ_CLR_SHIFT;
211 val |= 1 << DB_EQ_EVNT_SHIFT;
212 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
213 iowrite32(val, adapter->db + DB_EQ_OFFSET);
216 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
219 val |= qid & DB_CQ_RING_ID_MASK;
220 val |= ((qid & DB_CQ_RING_ID_EXT_MASK) <<
221 DB_CQ_RING_ID_EXT_MASK_SHIFT);
223 if (adapter->eeh_err)
227 val |= 1 << DB_CQ_REARM_SHIFT;
228 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
229 iowrite32(val, adapter->db + DB_CQ_OFFSET);
232 static int be_mac_addr_set(struct net_device *netdev, void *p)
234 struct be_adapter *adapter = netdev_priv(netdev);
235 struct sockaddr *addr = p;
237 u8 current_mac[ETH_ALEN];
238 u32 pmac_id = adapter->pmac_id[0];
240 if (!is_valid_ether_addr(addr->sa_data))
241 return -EADDRNOTAVAIL;
243 status = be_cmd_mac_addr_query(adapter, current_mac,
244 MAC_ADDRESS_TYPE_NETWORK, false,
245 adapter->if_handle, 0);
249 if (memcmp(addr->sa_data, current_mac, ETH_ALEN)) {
250 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
251 adapter->if_handle, &adapter->pmac_id[0], 0);
255 be_cmd_pmac_del(adapter, adapter->if_handle, pmac_id, 0);
257 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
260 dev_err(&adapter->pdev->dev, "MAC %pM set Failed\n", addr->sa_data);
264 static void populate_be2_stats(struct be_adapter *adapter)
266 struct be_hw_stats_v0 *hw_stats = hw_stats_from_cmd(adapter);
267 struct be_pmem_stats *pmem_sts = &hw_stats->pmem;
268 struct be_rxf_stats_v0 *rxf_stats = &hw_stats->rxf;
269 struct be_port_rxf_stats_v0 *port_stats =
270 &rxf_stats->port[adapter->port_num];
271 struct be_drv_stats *drvs = &adapter->drv_stats;
273 be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats));
274 drvs->rx_pause_frames = port_stats->rx_pause_frames;
275 drvs->rx_crc_errors = port_stats->rx_crc_errors;
276 drvs->rx_control_frames = port_stats->rx_control_frames;
277 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
278 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
279 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
280 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
281 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
282 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
283 drvs->rxpp_fifo_overflow_drop = port_stats->rx_fifo_overflow;
284 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
285 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
286 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
287 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
288 drvs->rx_input_fifo_overflow_drop = port_stats->rx_input_fifo_overflow;
289 drvs->rx_dropped_header_too_small =
290 port_stats->rx_dropped_header_too_small;
291 drvs->rx_address_mismatch_drops =
292 port_stats->rx_address_mismatch_drops +
293 port_stats->rx_vlan_mismatch_drops;
294 drvs->rx_alignment_symbol_errors =
295 port_stats->rx_alignment_symbol_errors;
297 drvs->tx_pauseframes = port_stats->tx_pauseframes;
298 drvs->tx_controlframes = port_stats->tx_controlframes;
300 if (adapter->port_num)
301 drvs->jabber_events = rxf_stats->port1_jabber_events;
303 drvs->jabber_events = rxf_stats->port0_jabber_events;
304 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
305 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
306 drvs->forwarded_packets = rxf_stats->forwarded_packets;
307 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
308 drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr;
309 drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags;
310 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
313 static void populate_be3_stats(struct be_adapter *adapter)
315 struct be_hw_stats_v1 *hw_stats = hw_stats_from_cmd(adapter);
316 struct be_pmem_stats *pmem_sts = &hw_stats->pmem;
317 struct be_rxf_stats_v1 *rxf_stats = &hw_stats->rxf;
318 struct be_port_rxf_stats_v1 *port_stats =
319 &rxf_stats->port[adapter->port_num];
320 struct be_drv_stats *drvs = &adapter->drv_stats;
322 be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats));
323 drvs->pmem_fifo_overflow_drop = port_stats->pmem_fifo_overflow_drop;
324 drvs->rx_priority_pause_frames = port_stats->rx_priority_pause_frames;
325 drvs->rx_pause_frames = port_stats->rx_pause_frames;
326 drvs->rx_crc_errors = port_stats->rx_crc_errors;
327 drvs->rx_control_frames = port_stats->rx_control_frames;
328 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
329 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
330 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
331 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
332 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
333 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
334 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
335 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
336 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
337 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
338 drvs->rx_dropped_header_too_small =
339 port_stats->rx_dropped_header_too_small;
340 drvs->rx_input_fifo_overflow_drop =
341 port_stats->rx_input_fifo_overflow_drop;
342 drvs->rx_address_mismatch_drops = port_stats->rx_address_mismatch_drops;
343 drvs->rx_alignment_symbol_errors =
344 port_stats->rx_alignment_symbol_errors;
345 drvs->rxpp_fifo_overflow_drop = port_stats->rxpp_fifo_overflow_drop;
346 drvs->tx_pauseframes = port_stats->tx_pauseframes;
347 drvs->tx_controlframes = port_stats->tx_controlframes;
348 drvs->jabber_events = port_stats->jabber_events;
349 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
350 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
351 drvs->forwarded_packets = rxf_stats->forwarded_packets;
352 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
353 drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr;
354 drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags;
355 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
358 static void populate_lancer_stats(struct be_adapter *adapter)
361 struct be_drv_stats *drvs = &adapter->drv_stats;
362 struct lancer_pport_stats *pport_stats =
363 pport_stats_from_cmd(adapter);
365 be_dws_le_to_cpu(pport_stats, sizeof(*pport_stats));
366 drvs->rx_pause_frames = pport_stats->rx_pause_frames_lo;
367 drvs->rx_crc_errors = pport_stats->rx_crc_errors_lo;
368 drvs->rx_control_frames = pport_stats->rx_control_frames_lo;
369 drvs->rx_in_range_errors = pport_stats->rx_in_range_errors;
370 drvs->rx_frame_too_long = pport_stats->rx_frames_too_long_lo;
371 drvs->rx_dropped_runt = pport_stats->rx_dropped_runt;
372 drvs->rx_ip_checksum_errs = pport_stats->rx_ip_checksum_errors;
373 drvs->rx_tcp_checksum_errs = pport_stats->rx_tcp_checksum_errors;
374 drvs->rx_udp_checksum_errs = pport_stats->rx_udp_checksum_errors;
375 drvs->rx_dropped_tcp_length =
376 pport_stats->rx_dropped_invalid_tcp_length;
377 drvs->rx_dropped_too_small = pport_stats->rx_dropped_too_small;
378 drvs->rx_dropped_too_short = pport_stats->rx_dropped_too_short;
379 drvs->rx_out_range_errors = pport_stats->rx_out_of_range_errors;
380 drvs->rx_dropped_header_too_small =
381 pport_stats->rx_dropped_header_too_small;
382 drvs->rx_input_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
383 drvs->rx_address_mismatch_drops =
384 pport_stats->rx_address_mismatch_drops +
385 pport_stats->rx_vlan_mismatch_drops;
386 drvs->rx_alignment_symbol_errors = pport_stats->rx_symbol_errors_lo;
387 drvs->rxpp_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
388 drvs->tx_pauseframes = pport_stats->tx_pause_frames_lo;
389 drvs->tx_controlframes = pport_stats->tx_control_frames_lo;
390 drvs->jabber_events = pport_stats->rx_jabbers;
391 drvs->forwarded_packets = pport_stats->num_forwards_lo;
392 drvs->rx_drops_mtu = pport_stats->rx_drops_mtu_lo;
393 drvs->rx_drops_too_many_frags =
394 pport_stats->rx_drops_too_many_frags_lo;
397 static void accumulate_16bit_val(u32 *acc, u16 val)
399 #define lo(x) (x & 0xFFFF)
400 #define hi(x) (x & 0xFFFF0000)
401 bool wrapped = val < lo(*acc);
402 u32 newacc = hi(*acc) + val;
406 ACCESS_ONCE(*acc) = newacc;
409 void be_parse_stats(struct be_adapter *adapter)
411 struct be_erx_stats_v1 *erx = be_erx_stats_from_cmd(adapter);
412 struct be_rx_obj *rxo;
415 if (adapter->generation == BE_GEN3) {
416 if (lancer_chip(adapter))
417 populate_lancer_stats(adapter);
419 populate_be3_stats(adapter);
421 populate_be2_stats(adapter);
424 if (lancer_chip(adapter))
427 /* as erx_v1 is longer than v0, ok to use v1 defn for v0 access */
428 for_all_rx_queues(adapter, rxo, i) {
429 /* below erx HW counter can actually wrap around after
430 * 65535. Driver accumulates a 32-bit value
432 accumulate_16bit_val(&rx_stats(rxo)->rx_drops_no_frags,
433 (u16)erx->rx_drops_no_fragments[rxo->q.id]);
439 static struct rtnl_link_stats64 *be_get_stats64(struct net_device *netdev,
440 struct rtnl_link_stats64 *stats)
442 struct be_adapter *adapter = netdev_priv(netdev);
443 struct be_drv_stats *drvs = &adapter->drv_stats;
444 struct be_rx_obj *rxo;
445 struct be_tx_obj *txo;
450 for_all_rx_queues(adapter, rxo, i) {
451 const struct be_rx_stats *rx_stats = rx_stats(rxo);
453 start = u64_stats_fetch_begin_bh(&rx_stats->sync);
454 pkts = rx_stats(rxo)->rx_pkts;
455 bytes = rx_stats(rxo)->rx_bytes;
456 } while (u64_stats_fetch_retry_bh(&rx_stats->sync, start));
457 stats->rx_packets += pkts;
458 stats->rx_bytes += bytes;
459 stats->multicast += rx_stats(rxo)->rx_mcast_pkts;
460 stats->rx_dropped += rx_stats(rxo)->rx_drops_no_skbs +
461 rx_stats(rxo)->rx_drops_no_frags;
464 for_all_tx_queues(adapter, txo, i) {
465 const struct be_tx_stats *tx_stats = tx_stats(txo);
467 start = u64_stats_fetch_begin_bh(&tx_stats->sync);
468 pkts = tx_stats(txo)->tx_pkts;
469 bytes = tx_stats(txo)->tx_bytes;
470 } while (u64_stats_fetch_retry_bh(&tx_stats->sync, start));
471 stats->tx_packets += pkts;
472 stats->tx_bytes += bytes;
475 /* bad pkts received */
476 stats->rx_errors = drvs->rx_crc_errors +
477 drvs->rx_alignment_symbol_errors +
478 drvs->rx_in_range_errors +
479 drvs->rx_out_range_errors +
480 drvs->rx_frame_too_long +
481 drvs->rx_dropped_too_small +
482 drvs->rx_dropped_too_short +
483 drvs->rx_dropped_header_too_small +
484 drvs->rx_dropped_tcp_length +
485 drvs->rx_dropped_runt;
487 /* detailed rx errors */
488 stats->rx_length_errors = drvs->rx_in_range_errors +
489 drvs->rx_out_range_errors +
490 drvs->rx_frame_too_long;
492 stats->rx_crc_errors = drvs->rx_crc_errors;
494 /* frame alignment errors */
495 stats->rx_frame_errors = drvs->rx_alignment_symbol_errors;
497 /* receiver fifo overrun */
498 /* drops_no_pbuf is no per i/f, it's per BE card */
499 stats->rx_fifo_errors = drvs->rxpp_fifo_overflow_drop +
500 drvs->rx_input_fifo_overflow_drop +
501 drvs->rx_drops_no_pbuf;
505 void be_link_status_update(struct be_adapter *adapter, u8 link_status)
507 struct net_device *netdev = adapter->netdev;
509 if (!(adapter->flags & BE_FLAGS_LINK_STATUS_INIT)) {
510 netif_carrier_off(netdev);
511 adapter->flags |= BE_FLAGS_LINK_STATUS_INIT;
514 if ((link_status & LINK_STATUS_MASK) == LINK_UP)
515 netif_carrier_on(netdev);
517 netif_carrier_off(netdev);
520 static void be_tx_stats_update(struct be_tx_obj *txo,
521 u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
523 struct be_tx_stats *stats = tx_stats(txo);
525 u64_stats_update_begin(&stats->sync);
527 stats->tx_wrbs += wrb_cnt;
528 stats->tx_bytes += copied;
529 stats->tx_pkts += (gso_segs ? gso_segs : 1);
532 u64_stats_update_end(&stats->sync);
535 /* Determine number of WRB entries needed to xmit data in an skb */
536 static u32 wrb_cnt_for_skb(struct be_adapter *adapter, struct sk_buff *skb,
539 int cnt = (skb->len > skb->data_len);
541 cnt += skb_shinfo(skb)->nr_frags;
543 /* to account for hdr wrb */
545 if (lancer_chip(adapter) || !(cnt & 1)) {
548 /* add a dummy to make it an even num */
552 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
556 static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
558 wrb->frag_pa_hi = upper_32_bits(addr);
559 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
560 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
563 static inline u16 be_get_tx_vlan_tag(struct be_adapter *adapter,
569 vlan_tag = vlan_tx_tag_get(skb);
570 vlan_prio = (vlan_tag & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
571 /* If vlan priority provided by OS is NOT in available bmap */
572 if (!(adapter->vlan_prio_bmap & (1 << vlan_prio)))
573 vlan_tag = (vlan_tag & ~VLAN_PRIO_MASK) |
574 adapter->recommended_prio;
579 static void wrb_fill_hdr(struct be_adapter *adapter, struct be_eth_hdr_wrb *hdr,
580 struct sk_buff *skb, u32 wrb_cnt, u32 len)
584 memset(hdr, 0, sizeof(*hdr));
586 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
588 if (skb_is_gso(skb)) {
589 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
590 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
591 hdr, skb_shinfo(skb)->gso_size);
592 if (skb_is_gso_v6(skb) && !lancer_chip(adapter))
593 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso6, hdr, 1);
594 if (lancer_chip(adapter) && adapter->sli_family ==
595 LANCER_A0_SLI_FAMILY) {
596 AMAP_SET_BITS(struct amap_eth_hdr_wrb, ipcs, hdr, 1);
598 AMAP_SET_BITS(struct amap_eth_hdr_wrb,
600 else if (is_udp_pkt(skb))
601 AMAP_SET_BITS(struct amap_eth_hdr_wrb,
604 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
606 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
607 else if (is_udp_pkt(skb))
608 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
611 if (vlan_tx_tag_present(skb)) {
612 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
613 vlan_tag = be_get_tx_vlan_tag(adapter, skb);
614 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag, hdr, vlan_tag);
617 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
618 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
619 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
620 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
623 static void unmap_tx_frag(struct device *dev, struct be_eth_wrb *wrb,
628 be_dws_le_to_cpu(wrb, sizeof(*wrb));
630 dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo;
633 dma_unmap_single(dev, dma, wrb->frag_len,
636 dma_unmap_page(dev, dma, wrb->frag_len, DMA_TO_DEVICE);
640 static int make_tx_wrbs(struct be_adapter *adapter, struct be_queue_info *txq,
641 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
645 struct device *dev = &adapter->pdev->dev;
646 struct sk_buff *first_skb = skb;
647 struct be_eth_wrb *wrb;
648 struct be_eth_hdr_wrb *hdr;
649 bool map_single = false;
652 hdr = queue_head_node(txq);
654 map_head = txq->head;
656 if (skb->len > skb->data_len) {
657 int len = skb_headlen(skb);
658 busaddr = dma_map_single(dev, skb->data, len, DMA_TO_DEVICE);
659 if (dma_mapping_error(dev, busaddr))
662 wrb = queue_head_node(txq);
663 wrb_fill(wrb, busaddr, len);
664 be_dws_cpu_to_le(wrb, sizeof(*wrb));
669 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
670 const struct skb_frag_struct *frag =
671 &skb_shinfo(skb)->frags[i];
672 busaddr = skb_frag_dma_map(dev, frag, 0,
673 skb_frag_size(frag), DMA_TO_DEVICE);
674 if (dma_mapping_error(dev, busaddr))
676 wrb = queue_head_node(txq);
677 wrb_fill(wrb, busaddr, skb_frag_size(frag));
678 be_dws_cpu_to_le(wrb, sizeof(*wrb));
680 copied += skb_frag_size(frag);
684 wrb = queue_head_node(txq);
686 be_dws_cpu_to_le(wrb, sizeof(*wrb));
690 wrb_fill_hdr(adapter, hdr, first_skb, wrb_cnt, copied);
691 be_dws_cpu_to_le(hdr, sizeof(*hdr));
695 txq->head = map_head;
697 wrb = queue_head_node(txq);
698 unmap_tx_frag(dev, wrb, map_single);
700 copied -= wrb->frag_len;
706 static netdev_tx_t be_xmit(struct sk_buff *skb,
707 struct net_device *netdev)
709 struct be_adapter *adapter = netdev_priv(netdev);
710 struct be_tx_obj *txo = &adapter->tx_obj[skb_get_queue_mapping(skb)];
711 struct be_queue_info *txq = &txo->q;
712 u32 wrb_cnt = 0, copied = 0;
713 u32 start = txq->head;
714 bool dummy_wrb, stopped = false;
716 /* For vlan tagged pkts, BE
717 * 1) calculates checksum even when CSO is not requested
718 * 2) calculates checksum wrongly for padded pkt less than
720 * As a workaround disable TX vlan offloading in such cases.
722 if (unlikely(vlan_tx_tag_present(skb) &&
723 (skb->ip_summed != CHECKSUM_PARTIAL || skb->len <= 60))) {
724 skb = skb_share_check(skb, GFP_ATOMIC);
728 skb = __vlan_put_tag(skb, be_get_tx_vlan_tag(adapter, skb));
735 wrb_cnt = wrb_cnt_for_skb(adapter, skb, &dummy_wrb);
737 copied = make_tx_wrbs(adapter, txq, skb, wrb_cnt, dummy_wrb);
739 /* record the sent skb in the sent_skb table */
740 BUG_ON(txo->sent_skb_list[start]);
741 txo->sent_skb_list[start] = skb;
743 /* Ensure txq has space for the next skb; Else stop the queue
744 * *BEFORE* ringing the tx doorbell, so that we serialze the
745 * tx compls of the current transmit which'll wake up the queue
747 atomic_add(wrb_cnt, &txq->used);
748 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
750 netif_stop_subqueue(netdev, skb_get_queue_mapping(skb));
754 be_txq_notify(adapter, txq->id, wrb_cnt);
756 be_tx_stats_update(txo, wrb_cnt, copied,
757 skb_shinfo(skb)->gso_segs, stopped);
760 dev_kfree_skb_any(skb);
766 static int be_change_mtu(struct net_device *netdev, int new_mtu)
768 struct be_adapter *adapter = netdev_priv(netdev);
769 if (new_mtu < BE_MIN_MTU ||
770 new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
771 (ETH_HLEN + ETH_FCS_LEN))) {
772 dev_info(&adapter->pdev->dev,
773 "MTU must be between %d and %d bytes\n",
775 (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
778 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
779 netdev->mtu, new_mtu);
780 netdev->mtu = new_mtu;
785 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
786 * If the user configures more, place BE in vlan promiscuous mode.
788 static int be_vid_config(struct be_adapter *adapter, bool vf, u32 vf_num)
790 struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf_num];
791 u16 vtag[BE_NUM_VLANS_SUPPORTED];
796 vtag[0] = cpu_to_le16(vf_cfg->vlan_tag);
797 status = be_cmd_vlan_config(adapter, vf_cfg->if_handle, vtag,
801 /* No need to further configure vids if in promiscuous mode */
802 if (adapter->promiscuous)
805 if (adapter->vlans_added > adapter->max_vlans)
806 goto set_vlan_promisc;
808 /* Construct VLAN Table to give to HW */
809 for (i = 0; i < VLAN_N_VID; i++)
810 if (adapter->vlan_tag[i])
811 vtag[ntags++] = cpu_to_le16(i);
813 status = be_cmd_vlan_config(adapter, adapter->if_handle,
816 /* Set to VLAN promisc mode as setting VLAN filter failed */
818 dev_info(&adapter->pdev->dev, "Exhausted VLAN HW filters.\n");
819 dev_info(&adapter->pdev->dev, "Disabling HW VLAN filtering.\n");
820 goto set_vlan_promisc;
826 status = be_cmd_vlan_config(adapter, adapter->if_handle,
831 static int be_vlan_add_vid(struct net_device *netdev, u16 vid)
833 struct be_adapter *adapter = netdev_priv(netdev);
836 if (!be_physfn(adapter)) {
841 adapter->vlan_tag[vid] = 1;
842 if (adapter->vlans_added <= (adapter->max_vlans + 1))
843 status = be_vid_config(adapter, false, 0);
846 adapter->vlans_added++;
848 adapter->vlan_tag[vid] = 0;
853 static int be_vlan_rem_vid(struct net_device *netdev, u16 vid)
855 struct be_adapter *adapter = netdev_priv(netdev);
858 if (!be_physfn(adapter)) {
863 adapter->vlan_tag[vid] = 0;
864 if (adapter->vlans_added <= adapter->max_vlans)
865 status = be_vid_config(adapter, false, 0);
868 adapter->vlans_added--;
870 adapter->vlan_tag[vid] = 1;
875 static void be_set_rx_mode(struct net_device *netdev)
877 struct be_adapter *adapter = netdev_priv(netdev);
880 if (netdev->flags & IFF_PROMISC) {
881 be_cmd_rx_filter(adapter, IFF_PROMISC, ON);
882 adapter->promiscuous = true;
886 /* BE was previously in promiscuous mode; disable it */
887 if (adapter->promiscuous) {
888 adapter->promiscuous = false;
889 be_cmd_rx_filter(adapter, IFF_PROMISC, OFF);
891 if (adapter->vlans_added)
892 be_vid_config(adapter, false, 0);
895 /* Enable multicast promisc if num configured exceeds what we support */
896 if (netdev->flags & IFF_ALLMULTI ||
897 netdev_mc_count(netdev) > BE_MAX_MC) {
898 be_cmd_rx_filter(adapter, IFF_ALLMULTI, ON);
902 if (netdev_uc_count(netdev) != adapter->uc_macs) {
903 struct netdev_hw_addr *ha;
904 int i = 1; /* First slot is claimed by the Primary MAC */
906 for (; adapter->uc_macs > 0; adapter->uc_macs--, i++) {
907 be_cmd_pmac_del(adapter, adapter->if_handle,
908 adapter->pmac_id[i], 0);
911 if (netdev_uc_count(netdev) > adapter->max_pmac_cnt) {
912 be_cmd_rx_filter(adapter, IFF_PROMISC, ON);
913 adapter->promiscuous = true;
917 netdev_for_each_uc_addr(ha, adapter->netdev) {
918 adapter->uc_macs++; /* First slot is for Primary MAC */
919 be_cmd_pmac_add(adapter, (u8 *)ha->addr,
921 &adapter->pmac_id[adapter->uc_macs], 0);
925 status = be_cmd_rx_filter(adapter, IFF_MULTICAST, ON);
927 /* Set to MCAST promisc mode if setting MULTICAST address fails */
929 dev_info(&adapter->pdev->dev, "Exhausted multicast HW filters.\n");
930 dev_info(&adapter->pdev->dev, "Disabling HW multicast filtering.\n");
931 be_cmd_rx_filter(adapter, IFF_ALLMULTI, ON);
937 static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
939 struct be_adapter *adapter = netdev_priv(netdev);
940 struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf];
943 if (!sriov_enabled(adapter))
946 if (!is_valid_ether_addr(mac) || vf >= adapter->num_vfs)
949 if (lancer_chip(adapter)) {
950 status = be_cmd_set_mac_list(adapter, mac, 1, vf + 1);
952 status = be_cmd_pmac_del(adapter, vf_cfg->if_handle,
953 vf_cfg->pmac_id, vf + 1);
955 status = be_cmd_pmac_add(adapter, mac, vf_cfg->if_handle,
956 &vf_cfg->pmac_id, vf + 1);
960 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n",
963 memcpy(vf_cfg->mac_addr, mac, ETH_ALEN);
968 static int be_get_vf_config(struct net_device *netdev, int vf,
969 struct ifla_vf_info *vi)
971 struct be_adapter *adapter = netdev_priv(netdev);
972 struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf];
974 if (!sriov_enabled(adapter))
977 if (vf >= adapter->num_vfs)
981 vi->tx_rate = vf_cfg->tx_rate;
982 vi->vlan = vf_cfg->vlan_tag;
984 memcpy(&vi->mac, vf_cfg->mac_addr, ETH_ALEN);
989 static int be_set_vf_vlan(struct net_device *netdev,
990 int vf, u16 vlan, u8 qos)
992 struct be_adapter *adapter = netdev_priv(netdev);
995 if (!sriov_enabled(adapter))
998 if (vf >= adapter->num_vfs || vlan > 4095)
1002 if (adapter->vf_cfg[vf].vlan_tag != vlan) {
1003 /* If this is new value, program it. Else skip. */
1004 adapter->vf_cfg[vf].vlan_tag = vlan;
1006 status = be_cmd_set_hsw_config(adapter, vlan,
1007 vf + 1, adapter->vf_cfg[vf].if_handle);
1010 /* Reset Transparent Vlan Tagging. */
1011 adapter->vf_cfg[vf].vlan_tag = 0;
1012 vlan = adapter->vf_cfg[vf].def_vid;
1013 status = be_cmd_set_hsw_config(adapter, vlan, vf + 1,
1014 adapter->vf_cfg[vf].if_handle);
1019 dev_info(&adapter->pdev->dev,
1020 "VLAN %d config on VF %d failed\n", vlan, vf);
1024 static int be_set_vf_tx_rate(struct net_device *netdev,
1027 struct be_adapter *adapter = netdev_priv(netdev);
1030 if (!sriov_enabled(adapter))
1033 if (vf >= adapter->num_vfs)
1036 if (rate < 100 || rate > 10000) {
1037 dev_err(&adapter->pdev->dev,
1038 "tx rate must be between 100 and 10000 Mbps\n");
1042 status = be_cmd_set_qos(adapter, rate / 10, vf + 1);
1045 dev_err(&adapter->pdev->dev,
1046 "tx rate %d on VF %d failed\n", rate, vf);
1048 adapter->vf_cfg[vf].tx_rate = rate;
1052 static int be_find_vfs(struct be_adapter *adapter, int vf_state)
1054 struct pci_dev *dev, *pdev = adapter->pdev;
1055 int vfs = 0, assigned_vfs = 0, pos, vf_fn;
1058 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
1059 pci_read_config_word(pdev, pos + PCI_SRIOV_VF_OFFSET, &offset);
1060 pci_read_config_word(pdev, pos + PCI_SRIOV_VF_STRIDE, &stride);
1062 dev = pci_get_device(pdev->vendor, PCI_ANY_ID, NULL);
1064 vf_fn = (pdev->devfn + offset + stride * vfs) & 0xFFFF;
1065 if (dev->is_virtfn && dev->devfn == vf_fn) {
1067 if (dev->dev_flags & PCI_DEV_FLAGS_ASSIGNED)
1070 dev = pci_get_device(pdev->vendor, PCI_ANY_ID, dev);
1072 return (vf_state == ASSIGNED) ? assigned_vfs : vfs;
1075 static void be_eqd_update(struct be_adapter *adapter, struct be_eq_obj *eqo)
1077 struct be_rx_stats *stats = rx_stats(&adapter->rx_obj[eqo->idx]);
1078 ulong now = jiffies;
1079 ulong delta = now - stats->rx_jiffies;
1081 unsigned int start, eqd;
1083 if (!eqo->enable_aic) {
1088 if (eqo->idx >= adapter->num_rx_qs)
1091 stats = rx_stats(&adapter->rx_obj[eqo->idx]);
1093 /* Wrapped around */
1094 if (time_before(now, stats->rx_jiffies)) {
1095 stats->rx_jiffies = now;
1099 /* Update once a second */
1104 start = u64_stats_fetch_begin_bh(&stats->sync);
1105 pkts = stats->rx_pkts;
1106 } while (u64_stats_fetch_retry_bh(&stats->sync, start));
1108 stats->rx_pps = (unsigned long)(pkts - stats->rx_pkts_prev) / (delta / HZ);
1109 stats->rx_pkts_prev = pkts;
1110 stats->rx_jiffies = now;
1111 eqd = (stats->rx_pps / 110000) << 3;
1112 eqd = min(eqd, eqo->max_eqd);
1113 eqd = max(eqd, eqo->min_eqd);
1118 if (eqd != eqo->cur_eqd) {
1119 be_cmd_modify_eqd(adapter, eqo->q.id, eqd);
1124 static void be_rx_stats_update(struct be_rx_obj *rxo,
1125 struct be_rx_compl_info *rxcp)
1127 struct be_rx_stats *stats = rx_stats(rxo);
1129 u64_stats_update_begin(&stats->sync);
1131 stats->rx_bytes += rxcp->pkt_size;
1133 if (rxcp->pkt_type == BE_MULTICAST_PACKET)
1134 stats->rx_mcast_pkts++;
1136 stats->rx_compl_err++;
1137 u64_stats_update_end(&stats->sync);
1140 static inline bool csum_passed(struct be_rx_compl_info *rxcp)
1142 /* L4 checksum is not reliable for non TCP/UDP packets.
1143 * Also ignore ipcksm for ipv6 pkts */
1144 return (rxcp->tcpf || rxcp->udpf) && rxcp->l4_csum &&
1145 (rxcp->ip_csum || rxcp->ipv6);
1148 static struct be_rx_page_info *get_rx_page_info(struct be_rx_obj *rxo,
1151 struct be_adapter *adapter = rxo->adapter;
1152 struct be_rx_page_info *rx_page_info;
1153 struct be_queue_info *rxq = &rxo->q;
1155 rx_page_info = &rxo->page_info_tbl[frag_idx];
1156 BUG_ON(!rx_page_info->page);
1158 if (rx_page_info->last_page_user) {
1159 dma_unmap_page(&adapter->pdev->dev,
1160 dma_unmap_addr(rx_page_info, bus),
1161 adapter->big_page_size, DMA_FROM_DEVICE);
1162 rx_page_info->last_page_user = false;
1165 atomic_dec(&rxq->used);
1166 return rx_page_info;
1169 /* Throwaway the data in the Rx completion */
1170 static void be_rx_compl_discard(struct be_rx_obj *rxo,
1171 struct be_rx_compl_info *rxcp)
1173 struct be_queue_info *rxq = &rxo->q;
1174 struct be_rx_page_info *page_info;
1175 u16 i, num_rcvd = rxcp->num_rcvd;
1177 for (i = 0; i < num_rcvd; i++) {
1178 page_info = get_rx_page_info(rxo, rxcp->rxq_idx);
1179 put_page(page_info->page);
1180 memset(page_info, 0, sizeof(*page_info));
1181 index_inc(&rxcp->rxq_idx, rxq->len);
1186 * skb_fill_rx_data forms a complete skb for an ether frame
1187 * indicated by rxcp.
1189 static void skb_fill_rx_data(struct be_rx_obj *rxo, struct sk_buff *skb,
1190 struct be_rx_compl_info *rxcp)
1192 struct be_queue_info *rxq = &rxo->q;
1193 struct be_rx_page_info *page_info;
1195 u16 hdr_len, curr_frag_len, remaining;
1198 page_info = get_rx_page_info(rxo, rxcp->rxq_idx);
1199 start = page_address(page_info->page) + page_info->page_offset;
1202 /* Copy data in the first descriptor of this completion */
1203 curr_frag_len = min(rxcp->pkt_size, rx_frag_size);
1205 /* Copy the header portion into skb_data */
1206 hdr_len = min(BE_HDR_LEN, curr_frag_len);
1207 memcpy(skb->data, start, hdr_len);
1208 skb->len = curr_frag_len;
1209 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
1210 /* Complete packet has now been moved to data */
1211 put_page(page_info->page);
1213 skb->tail += curr_frag_len;
1215 skb_shinfo(skb)->nr_frags = 1;
1216 skb_frag_set_page(skb, 0, page_info->page);
1217 skb_shinfo(skb)->frags[0].page_offset =
1218 page_info->page_offset + hdr_len;
1219 skb_frag_size_set(&skb_shinfo(skb)->frags[0], curr_frag_len - hdr_len);
1220 skb->data_len = curr_frag_len - hdr_len;
1221 skb->truesize += rx_frag_size;
1222 skb->tail += hdr_len;
1224 page_info->page = NULL;
1226 if (rxcp->pkt_size <= rx_frag_size) {
1227 BUG_ON(rxcp->num_rcvd != 1);
1231 /* More frags present for this completion */
1232 index_inc(&rxcp->rxq_idx, rxq->len);
1233 remaining = rxcp->pkt_size - curr_frag_len;
1234 for (i = 1, j = 0; i < rxcp->num_rcvd; i++) {
1235 page_info = get_rx_page_info(rxo, rxcp->rxq_idx);
1236 curr_frag_len = min(remaining, rx_frag_size);
1238 /* Coalesce all frags from the same physical page in one slot */
1239 if (page_info->page_offset == 0) {
1242 skb_frag_set_page(skb, j, page_info->page);
1243 skb_shinfo(skb)->frags[j].page_offset =
1244 page_info->page_offset;
1245 skb_frag_size_set(&skb_shinfo(skb)->frags[j], 0);
1246 skb_shinfo(skb)->nr_frags++;
1248 put_page(page_info->page);
1251 skb_frag_size_add(&skb_shinfo(skb)->frags[j], curr_frag_len);
1252 skb->len += curr_frag_len;
1253 skb->data_len += curr_frag_len;
1254 skb->truesize += rx_frag_size;
1255 remaining -= curr_frag_len;
1256 index_inc(&rxcp->rxq_idx, rxq->len);
1257 page_info->page = NULL;
1259 BUG_ON(j > MAX_SKB_FRAGS);
1262 /* Process the RX completion indicated by rxcp when GRO is disabled */
1263 static void be_rx_compl_process(struct be_rx_obj *rxo,
1264 struct be_rx_compl_info *rxcp)
1266 struct be_adapter *adapter = rxo->adapter;
1267 struct net_device *netdev = adapter->netdev;
1268 struct sk_buff *skb;
1270 skb = netdev_alloc_skb_ip_align(netdev, BE_RX_SKB_ALLOC_SIZE);
1271 if (unlikely(!skb)) {
1272 rx_stats(rxo)->rx_drops_no_skbs++;
1273 be_rx_compl_discard(rxo, rxcp);
1277 skb_fill_rx_data(rxo, skb, rxcp);
1279 if (likely((netdev->features & NETIF_F_RXCSUM) && csum_passed(rxcp)))
1280 skb->ip_summed = CHECKSUM_UNNECESSARY;
1282 skb_checksum_none_assert(skb);
1284 skb->protocol = eth_type_trans(skb, netdev);
1285 skb_record_rx_queue(skb, rxo - &adapter->rx_obj[0]);
1286 if (netdev->features & NETIF_F_RXHASH)
1287 skb->rxhash = rxcp->rss_hash;
1291 __vlan_hwaccel_put_tag(skb, rxcp->vlan_tag);
1293 netif_receive_skb(skb);
1296 /* Process the RX completion indicated by rxcp when GRO is enabled */
1297 void be_rx_compl_process_gro(struct be_rx_obj *rxo, struct napi_struct *napi,
1298 struct be_rx_compl_info *rxcp)
1300 struct be_adapter *adapter = rxo->adapter;
1301 struct be_rx_page_info *page_info;
1302 struct sk_buff *skb = NULL;
1303 struct be_queue_info *rxq = &rxo->q;
1304 u16 remaining, curr_frag_len;
1307 skb = napi_get_frags(napi);
1309 be_rx_compl_discard(rxo, rxcp);
1313 remaining = rxcp->pkt_size;
1314 for (i = 0, j = -1; i < rxcp->num_rcvd; i++) {
1315 page_info = get_rx_page_info(rxo, rxcp->rxq_idx);
1317 curr_frag_len = min(remaining, rx_frag_size);
1319 /* Coalesce all frags from the same physical page in one slot */
1320 if (i == 0 || page_info->page_offset == 0) {
1321 /* First frag or Fresh page */
1323 skb_frag_set_page(skb, j, page_info->page);
1324 skb_shinfo(skb)->frags[j].page_offset =
1325 page_info->page_offset;
1326 skb_frag_size_set(&skb_shinfo(skb)->frags[j], 0);
1328 put_page(page_info->page);
1330 skb_frag_size_add(&skb_shinfo(skb)->frags[j], curr_frag_len);
1331 skb->truesize += rx_frag_size;
1332 remaining -= curr_frag_len;
1333 index_inc(&rxcp->rxq_idx, rxq->len);
1334 memset(page_info, 0, sizeof(*page_info));
1336 BUG_ON(j > MAX_SKB_FRAGS);
1338 skb_shinfo(skb)->nr_frags = j + 1;
1339 skb->len = rxcp->pkt_size;
1340 skb->data_len = rxcp->pkt_size;
1341 skb->ip_summed = CHECKSUM_UNNECESSARY;
1342 skb_record_rx_queue(skb, rxo - &adapter->rx_obj[0]);
1343 if (adapter->netdev->features & NETIF_F_RXHASH)
1344 skb->rxhash = rxcp->rss_hash;
1347 __vlan_hwaccel_put_tag(skb, rxcp->vlan_tag);
1349 napi_gro_frags(napi);
1352 static void be_parse_rx_compl_v1(struct be_eth_rx_compl *compl,
1353 struct be_rx_compl_info *rxcp)
1356 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, pktsize, compl);
1357 rxcp->vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vtp, compl);
1358 rxcp->err = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, err, compl);
1359 rxcp->tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, tcpf, compl);
1360 rxcp->udpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, udpf, compl);
1362 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, ipcksm, compl);
1364 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, l4_cksm, compl);
1366 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, ip_version, compl);
1368 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, fragndx, compl);
1370 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, numfrags, compl);
1372 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, cast_enc, compl);
1374 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, rsshash, rxcp);
1376 rxcp->vtm = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vtm,
1378 rxcp->vlan_tag = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vlan_tag,
1381 rxcp->port = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, port, compl);
1384 static void be_parse_rx_compl_v0(struct be_eth_rx_compl *compl,
1385 struct be_rx_compl_info *rxcp)
1388 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, pktsize, compl);
1389 rxcp->vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vtp, compl);
1390 rxcp->err = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, err, compl);
1391 rxcp->tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, tcpf, compl);
1392 rxcp->udpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, udpf, compl);
1394 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, ipcksm, compl);
1396 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, l4_cksm, compl);
1398 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, ip_version, compl);
1400 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, fragndx, compl);
1402 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, numfrags, compl);
1404 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, cast_enc, compl);
1406 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, rsshash, rxcp);
1408 rxcp->vtm = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vtm,
1410 rxcp->vlan_tag = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vlan_tag,
1413 rxcp->port = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, port, compl);
1416 static struct be_rx_compl_info *be_rx_compl_get(struct be_rx_obj *rxo)
1418 struct be_eth_rx_compl *compl = queue_tail_node(&rxo->cq);
1419 struct be_rx_compl_info *rxcp = &rxo->rxcp;
1420 struct be_adapter *adapter = rxo->adapter;
1422 /* For checking the valid bit it is Ok to use either definition as the
1423 * valid bit is at the same position in both v0 and v1 Rx compl */
1424 if (compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] == 0)
1428 be_dws_le_to_cpu(compl, sizeof(*compl));
1430 if (adapter->be3_native)
1431 be_parse_rx_compl_v1(compl, rxcp);
1433 be_parse_rx_compl_v0(compl, rxcp);
1436 /* vlanf could be wrongly set in some cards.
1437 * ignore if vtm is not set */
1438 if ((adapter->function_mode & FLEX10_MODE) && !rxcp->vtm)
1441 if (!lancer_chip(adapter))
1442 rxcp->vlan_tag = swab16(rxcp->vlan_tag);
1444 if (adapter->pvid == (rxcp->vlan_tag & VLAN_VID_MASK) &&
1445 !adapter->vlan_tag[rxcp->vlan_tag])
1449 /* As the compl has been parsed, reset it; we wont touch it again */
1450 compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] = 0;
1452 queue_tail_inc(&rxo->cq);
1456 static inline struct page *be_alloc_pages(u32 size, gfp_t gfp)
1458 u32 order = get_order(size);
1462 return alloc_pages(gfp, order);
1466 * Allocate a page, split it to fragments of size rx_frag_size and post as
1467 * receive buffers to BE
1469 static void be_post_rx_frags(struct be_rx_obj *rxo, gfp_t gfp)
1471 struct be_adapter *adapter = rxo->adapter;
1472 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
1473 struct be_queue_info *rxq = &rxo->q;
1474 struct page *pagep = NULL;
1475 struct be_eth_rx_d *rxd;
1476 u64 page_dmaaddr = 0, frag_dmaaddr;
1477 u32 posted, page_offset = 0;
1479 page_info = &rxo->page_info_tbl[rxq->head];
1480 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
1482 pagep = be_alloc_pages(adapter->big_page_size, gfp);
1483 if (unlikely(!pagep)) {
1484 rx_stats(rxo)->rx_post_fail++;
1487 page_dmaaddr = dma_map_page(&adapter->pdev->dev, pagep,
1488 0, adapter->big_page_size,
1490 page_info->page_offset = 0;
1493 page_info->page_offset = page_offset + rx_frag_size;
1495 page_offset = page_info->page_offset;
1496 page_info->page = pagep;
1497 dma_unmap_addr_set(page_info, bus, page_dmaaddr);
1498 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
1500 rxd = queue_head_node(rxq);
1501 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
1502 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
1504 /* Any space left in the current big page for another frag? */
1505 if ((page_offset + rx_frag_size + rx_frag_size) >
1506 adapter->big_page_size) {
1508 page_info->last_page_user = true;
1511 prev_page_info = page_info;
1512 queue_head_inc(rxq);
1513 page_info = &rxo->page_info_tbl[rxq->head];
1516 prev_page_info->last_page_user = true;
1519 atomic_add(posted, &rxq->used);
1520 be_rxq_notify(adapter, rxq->id, posted);
1521 } else if (atomic_read(&rxq->used) == 0) {
1522 /* Let be_worker replenish when memory is available */
1523 rxo->rx_post_starved = true;
1527 static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
1529 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
1531 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
1535 be_dws_le_to_cpu(txcp, sizeof(*txcp));
1537 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
1539 queue_tail_inc(tx_cq);
1543 static u16 be_tx_compl_process(struct be_adapter *adapter,
1544 struct be_tx_obj *txo, u16 last_index)
1546 struct be_queue_info *txq = &txo->q;
1547 struct be_eth_wrb *wrb;
1548 struct sk_buff **sent_skbs = txo->sent_skb_list;
1549 struct sk_buff *sent_skb;
1550 u16 cur_index, num_wrbs = 1; /* account for hdr wrb */
1551 bool unmap_skb_hdr = true;
1553 sent_skb = sent_skbs[txq->tail];
1555 sent_skbs[txq->tail] = NULL;
1557 /* skip header wrb */
1558 queue_tail_inc(txq);
1561 cur_index = txq->tail;
1562 wrb = queue_tail_node(txq);
1563 unmap_tx_frag(&adapter->pdev->dev, wrb,
1564 (unmap_skb_hdr && skb_headlen(sent_skb)));
1565 unmap_skb_hdr = false;
1568 queue_tail_inc(txq);
1569 } while (cur_index != last_index);
1571 kfree_skb(sent_skb);
1575 /* Return the number of events in the event queue */
1576 static inline int events_get(struct be_eq_obj *eqo)
1578 struct be_eq_entry *eqe;
1582 eqe = queue_tail_node(&eqo->q);
1589 queue_tail_inc(&eqo->q);
1595 static int event_handle(struct be_eq_obj *eqo)
1598 int num = events_get(eqo);
1600 /* Deal with any spurious interrupts that come without events */
1604 if (num || msix_enabled(eqo->adapter))
1605 be_eq_notify(eqo->adapter, eqo->q.id, rearm, true, num);
1608 napi_schedule(&eqo->napi);
1613 /* Leaves the EQ is disarmed state */
1614 static void be_eq_clean(struct be_eq_obj *eqo)
1616 int num = events_get(eqo);
1618 be_eq_notify(eqo->adapter, eqo->q.id, false, true, num);
1621 static void be_rx_cq_clean(struct be_rx_obj *rxo)
1623 struct be_rx_page_info *page_info;
1624 struct be_queue_info *rxq = &rxo->q;
1625 struct be_queue_info *rx_cq = &rxo->cq;
1626 struct be_rx_compl_info *rxcp;
1629 /* First cleanup pending rx completions */
1630 while ((rxcp = be_rx_compl_get(rxo)) != NULL) {
1631 be_rx_compl_discard(rxo, rxcp);
1632 be_cq_notify(rxo->adapter, rx_cq->id, false, 1);
1635 /* Then free posted rx buffer that were not used */
1636 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
1637 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
1638 page_info = get_rx_page_info(rxo, tail);
1639 put_page(page_info->page);
1640 memset(page_info, 0, sizeof(*page_info));
1642 BUG_ON(atomic_read(&rxq->used));
1643 rxq->tail = rxq->head = 0;
1646 static void be_tx_compl_clean(struct be_adapter *adapter)
1648 struct be_tx_obj *txo;
1649 struct be_queue_info *txq;
1650 struct be_eth_tx_compl *txcp;
1651 u16 end_idx, cmpl = 0, timeo = 0, num_wrbs = 0;
1652 struct sk_buff *sent_skb;
1654 int i, pending_txqs;
1656 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1658 pending_txqs = adapter->num_tx_qs;
1660 for_all_tx_queues(adapter, txo, i) {
1662 while ((txcp = be_tx_compl_get(&txo->cq))) {
1664 AMAP_GET_BITS(struct amap_eth_tx_compl,
1666 num_wrbs += be_tx_compl_process(adapter, txo,
1671 be_cq_notify(adapter, txo->cq.id, false, cmpl);
1672 atomic_sub(num_wrbs, &txq->used);
1676 if (atomic_read(&txq->used) == 0)
1680 if (pending_txqs == 0 || ++timeo > 200)
1686 for_all_tx_queues(adapter, txo, i) {
1688 if (atomic_read(&txq->used))
1689 dev_err(&adapter->pdev->dev, "%d pending tx-compls\n",
1690 atomic_read(&txq->used));
1692 /* free posted tx for which compls will never arrive */
1693 while (atomic_read(&txq->used)) {
1694 sent_skb = txo->sent_skb_list[txq->tail];
1695 end_idx = txq->tail;
1696 num_wrbs = wrb_cnt_for_skb(adapter, sent_skb,
1698 index_adv(&end_idx, num_wrbs - 1, txq->len);
1699 num_wrbs = be_tx_compl_process(adapter, txo, end_idx);
1700 atomic_sub(num_wrbs, &txq->used);
1705 static void be_evt_queues_destroy(struct be_adapter *adapter)
1707 struct be_eq_obj *eqo;
1710 for_all_evt_queues(adapter, eqo, i) {
1713 be_cmd_q_destroy(adapter, &eqo->q, QTYPE_EQ);
1714 be_queue_free(adapter, &eqo->q);
1718 static int be_evt_queues_create(struct be_adapter *adapter)
1720 struct be_queue_info *eq;
1721 struct be_eq_obj *eqo;
1724 adapter->num_evt_qs = num_irqs(adapter);
1726 for_all_evt_queues(adapter, eqo, i) {
1727 eqo->adapter = adapter;
1728 eqo->tx_budget = BE_TX_BUDGET;
1730 eqo->max_eqd = BE_MAX_EQD;
1731 eqo->enable_aic = true;
1734 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1735 sizeof(struct be_eq_entry));
1739 rc = be_cmd_eq_create(adapter, eq, eqo->cur_eqd);
1746 static void be_mcc_queues_destroy(struct be_adapter *adapter)
1748 struct be_queue_info *q;
1750 q = &adapter->mcc_obj.q;
1752 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
1753 be_queue_free(adapter, q);
1755 q = &adapter->mcc_obj.cq;
1757 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1758 be_queue_free(adapter, q);
1761 /* Must be called only after TX qs are created as MCC shares TX EQ */
1762 static int be_mcc_queues_create(struct be_adapter *adapter)
1764 struct be_queue_info *q, *cq;
1766 cq = &adapter->mcc_obj.cq;
1767 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
1768 sizeof(struct be_mcc_compl)))
1771 /* Use the default EQ for MCC completions */
1772 if (be_cmd_cq_create(adapter, cq, &mcc_eqo(adapter)->q, true, 0))
1775 q = &adapter->mcc_obj.q;
1776 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1777 goto mcc_cq_destroy;
1779 if (be_cmd_mccq_create(adapter, q, cq))
1785 be_queue_free(adapter, q);
1787 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1789 be_queue_free(adapter, cq);
1794 static void be_tx_queues_destroy(struct be_adapter *adapter)
1796 struct be_queue_info *q;
1797 struct be_tx_obj *txo;
1800 for_all_tx_queues(adapter, txo, i) {
1803 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
1804 be_queue_free(adapter, q);
1808 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1809 be_queue_free(adapter, q);
1813 static int be_num_txqs_want(struct be_adapter *adapter)
1815 if (sriov_want(adapter) || be_is_mc(adapter) ||
1816 lancer_chip(adapter) || !be_physfn(adapter) ||
1817 adapter->generation == BE_GEN2)
1823 static int be_tx_cqs_create(struct be_adapter *adapter)
1825 struct be_queue_info *cq, *eq;
1827 struct be_tx_obj *txo;
1830 adapter->num_tx_qs = be_num_txqs_want(adapter);
1831 if (adapter->num_tx_qs != MAX_TX_QS) {
1833 netif_set_real_num_tx_queues(adapter->netdev,
1834 adapter->num_tx_qs);
1838 for_all_tx_queues(adapter, txo, i) {
1840 status = be_queue_alloc(adapter, cq, TX_CQ_LEN,
1841 sizeof(struct be_eth_tx_compl));
1845 /* If num_evt_qs is less than num_tx_qs, then more than
1846 * one txq share an eq
1848 eq = &adapter->eq_obj[i % adapter->num_evt_qs].q;
1849 status = be_cmd_cq_create(adapter, cq, eq, false, 3);
1856 static int be_tx_qs_create(struct be_adapter *adapter)
1858 struct be_tx_obj *txo;
1861 for_all_tx_queues(adapter, txo, i) {
1862 status = be_queue_alloc(adapter, &txo->q, TX_Q_LEN,
1863 sizeof(struct be_eth_wrb));
1867 status = be_cmd_txq_create(adapter, &txo->q, &txo->cq);
1875 static void be_rx_cqs_destroy(struct be_adapter *adapter)
1877 struct be_queue_info *q;
1878 struct be_rx_obj *rxo;
1881 for_all_rx_queues(adapter, rxo, i) {
1884 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1885 be_queue_free(adapter, q);
1889 static int be_rx_cqs_create(struct be_adapter *adapter)
1891 struct be_queue_info *eq, *cq;
1892 struct be_rx_obj *rxo;
1895 /* We'll create as many RSS rings as there are irqs.
1896 * But when there's only one irq there's no use creating RSS rings
1898 adapter->num_rx_qs = (num_irqs(adapter) > 1) ?
1899 num_irqs(adapter) + 1 : 1;
1901 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1902 for_all_rx_queues(adapter, rxo, i) {
1903 rxo->adapter = adapter;
1905 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1906 sizeof(struct be_eth_rx_compl));
1910 eq = &adapter->eq_obj[i % adapter->num_evt_qs].q;
1911 rc = be_cmd_cq_create(adapter, cq, eq, false, 3);
1916 if (adapter->num_rx_qs != MAX_RX_QS)
1917 dev_info(&adapter->pdev->dev,
1918 "Created only %d receive queues", adapter->num_rx_qs);
1923 static irqreturn_t be_intx(int irq, void *dev)
1925 struct be_adapter *adapter = dev;
1928 /* With INTx only one EQ is used */
1929 num_evts = event_handle(&adapter->eq_obj[0]);
1936 static irqreturn_t be_msix(int irq, void *dev)
1938 struct be_eq_obj *eqo = dev;
1944 static inline bool do_gro(struct be_rx_compl_info *rxcp)
1946 return (rxcp->tcpf && !rxcp->err) ? true : false;
1949 static int be_process_rx(struct be_rx_obj *rxo, struct napi_struct *napi,
1952 struct be_adapter *adapter = rxo->adapter;
1953 struct be_queue_info *rx_cq = &rxo->cq;
1954 struct be_rx_compl_info *rxcp;
1957 for (work_done = 0; work_done < budget; work_done++) {
1958 rxcp = be_rx_compl_get(rxo);
1962 /* Is it a flush compl that has no data */
1963 if (unlikely(rxcp->num_rcvd == 0))
1966 /* Discard compl with partial DMA Lancer B0 */
1967 if (unlikely(!rxcp->pkt_size)) {
1968 be_rx_compl_discard(rxo, rxcp);
1972 /* On BE drop pkts that arrive due to imperfect filtering in
1973 * promiscuous mode on some skews
1975 if (unlikely(rxcp->port != adapter->port_num &&
1976 !lancer_chip(adapter))) {
1977 be_rx_compl_discard(rxo, rxcp);
1982 be_rx_compl_process_gro(rxo, napi, rxcp);
1984 be_rx_compl_process(rxo, rxcp);
1986 be_rx_stats_update(rxo, rxcp);
1990 be_cq_notify(adapter, rx_cq->id, true, work_done);
1992 if (atomic_read(&rxo->q.used) < RX_FRAGS_REFILL_WM)
1993 be_post_rx_frags(rxo, GFP_ATOMIC);
1999 static bool be_process_tx(struct be_adapter *adapter, struct be_tx_obj *txo,
2000 int budget, int idx)
2002 struct be_eth_tx_compl *txcp;
2003 int num_wrbs = 0, work_done;
2005 for (work_done = 0; work_done < budget; work_done++) {
2006 txcp = be_tx_compl_get(&txo->cq);
2009 num_wrbs += be_tx_compl_process(adapter, txo,
2010 AMAP_GET_BITS(struct amap_eth_tx_compl,
2015 be_cq_notify(adapter, txo->cq.id, true, work_done);
2016 atomic_sub(num_wrbs, &txo->q.used);
2018 /* As Tx wrbs have been freed up, wake up netdev queue
2019 * if it was stopped due to lack of tx wrbs. */
2020 if (__netif_subqueue_stopped(adapter->netdev, idx) &&
2021 atomic_read(&txo->q.used) < txo->q.len / 2) {
2022 netif_wake_subqueue(adapter->netdev, idx);
2025 u64_stats_update_begin(&tx_stats(txo)->sync_compl);
2026 tx_stats(txo)->tx_compl += work_done;
2027 u64_stats_update_end(&tx_stats(txo)->sync_compl);
2029 return (work_done < budget); /* Done */
2032 int be_poll(struct napi_struct *napi, int budget)
2034 struct be_eq_obj *eqo = container_of(napi, struct be_eq_obj, napi);
2035 struct be_adapter *adapter = eqo->adapter;
2036 int max_work = 0, work, i;
2039 /* Process all TXQs serviced by this EQ */
2040 for (i = eqo->idx; i < adapter->num_tx_qs; i += adapter->num_evt_qs) {
2041 tx_done = be_process_tx(adapter, &adapter->tx_obj[i],
2047 /* This loop will iterate twice for EQ0 in which
2048 * completions of the last RXQ (default one) are also processed
2049 * For other EQs the loop iterates only once
2051 for (i = eqo->idx; i < adapter->num_rx_qs; i += adapter->num_evt_qs) {
2052 work = be_process_rx(&adapter->rx_obj[i], napi, budget);
2053 max_work = max(work, max_work);
2056 if (is_mcc_eqo(eqo))
2057 be_process_mcc(adapter);
2059 if (max_work < budget) {
2060 napi_complete(napi);
2061 be_eq_notify(adapter, eqo->q.id, true, false, 0);
2063 /* As we'll continue in polling mode, count and clear events */
2064 be_eq_notify(adapter, eqo->q.id, false, false, events_get(eqo));
2069 void be_detect_dump_ue(struct be_adapter *adapter)
2071 u32 ue_lo = 0, ue_hi = 0, ue_lo_mask = 0, ue_hi_mask = 0;
2072 u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0;
2075 if (adapter->eeh_err || adapter->ue_detected)
2078 if (lancer_chip(adapter)) {
2079 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
2080 if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
2081 sliport_err1 = ioread32(adapter->db +
2082 SLIPORT_ERROR1_OFFSET);
2083 sliport_err2 = ioread32(adapter->db +
2084 SLIPORT_ERROR2_OFFSET);
2087 pci_read_config_dword(adapter->pdev,
2088 PCICFG_UE_STATUS_LOW, &ue_lo);
2089 pci_read_config_dword(adapter->pdev,
2090 PCICFG_UE_STATUS_HIGH, &ue_hi);
2091 pci_read_config_dword(adapter->pdev,
2092 PCICFG_UE_STATUS_LOW_MASK, &ue_lo_mask);
2093 pci_read_config_dword(adapter->pdev,
2094 PCICFG_UE_STATUS_HI_MASK, &ue_hi_mask);
2096 ue_lo = (ue_lo & (~ue_lo_mask));
2097 ue_hi = (ue_hi & (~ue_hi_mask));
2100 if (ue_lo || ue_hi ||
2101 sliport_status & SLIPORT_STATUS_ERR_MASK) {
2102 adapter->ue_detected = true;
2103 adapter->eeh_err = true;
2104 dev_err(&adapter->pdev->dev,
2105 "Unrecoverable error in the card\n");
2109 for (i = 0; ue_lo; ue_lo >>= 1, i++) {
2111 dev_err(&adapter->pdev->dev,
2112 "UE: %s bit set\n", ue_status_low_desc[i]);
2116 for (i = 0; ue_hi; ue_hi >>= 1, i++) {
2118 dev_err(&adapter->pdev->dev,
2119 "UE: %s bit set\n", ue_status_hi_desc[i]);
2123 if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
2124 dev_err(&adapter->pdev->dev,
2125 "sliport status 0x%x\n", sliport_status);
2126 dev_err(&adapter->pdev->dev,
2127 "sliport error1 0x%x\n", sliport_err1);
2128 dev_err(&adapter->pdev->dev,
2129 "sliport error2 0x%x\n", sliport_err2);
2133 static void be_msix_disable(struct be_adapter *adapter)
2135 if (msix_enabled(adapter)) {
2136 pci_disable_msix(adapter->pdev);
2137 adapter->num_msix_vec = 0;
2141 static uint be_num_rss_want(struct be_adapter *adapter)
2143 if ((adapter->function_caps & BE_FUNCTION_CAPS_RSS) &&
2144 !sriov_want(adapter) && be_physfn(adapter) &&
2146 return (adapter->be3_native) ? BE3_MAX_RSS_QS : BE2_MAX_RSS_QS;
2151 static void be_msix_enable(struct be_adapter *adapter)
2153 #define BE_MIN_MSIX_VECTORS 1
2154 int i, status, num_vec, num_roce_vec = 0;
2156 /* If RSS queues are not used, need a vec for default RX Q */
2157 num_vec = min(be_num_rss_want(adapter), num_online_cpus());
2158 if (be_roce_supported(adapter)) {
2159 num_roce_vec = min_t(u32, MAX_ROCE_MSIX_VECTORS,
2160 (num_online_cpus() + 1));
2161 num_roce_vec = min(num_roce_vec, MAX_ROCE_EQS);
2162 num_vec += num_roce_vec;
2163 num_vec = min(num_vec, MAX_MSIX_VECTORS);
2165 num_vec = max(num_vec, BE_MIN_MSIX_VECTORS);
2167 for (i = 0; i < num_vec; i++)
2168 adapter->msix_entries[i].entry = i;
2170 status = pci_enable_msix(adapter->pdev, adapter->msix_entries, num_vec);
2173 } else if (status >= BE_MIN_MSIX_VECTORS) {
2175 if (pci_enable_msix(adapter->pdev, adapter->msix_entries,
2181 if (be_roce_supported(adapter)) {
2182 if (num_vec > num_roce_vec) {
2183 adapter->num_msix_vec = num_vec - num_roce_vec;
2184 adapter->num_msix_roce_vec =
2185 num_vec - adapter->num_msix_vec;
2187 adapter->num_msix_vec = num_vec;
2188 adapter->num_msix_roce_vec = 0;
2191 adapter->num_msix_vec = num_vec;
2195 static inline int be_msix_vec_get(struct be_adapter *adapter,
2196 struct be_eq_obj *eqo)
2198 return adapter->msix_entries[eqo->idx].vector;
2201 static int be_msix_register(struct be_adapter *adapter)
2203 struct net_device *netdev = adapter->netdev;
2204 struct be_eq_obj *eqo;
2207 for_all_evt_queues(adapter, eqo, i) {
2208 sprintf(eqo->desc, "%s-q%d", netdev->name, i);
2209 vec = be_msix_vec_get(adapter, eqo);
2210 status = request_irq(vec, be_msix, 0, eqo->desc, eqo);
2217 for (i--, eqo = &adapter->eq_obj[i]; i >= 0; i--, eqo--)
2218 free_irq(be_msix_vec_get(adapter, eqo), eqo);
2219 dev_warn(&adapter->pdev->dev, "MSIX Request IRQ failed - err %d\n",
2221 be_msix_disable(adapter);
2225 static int be_irq_register(struct be_adapter *adapter)
2227 struct net_device *netdev = adapter->netdev;
2230 if (msix_enabled(adapter)) {
2231 status = be_msix_register(adapter);
2234 /* INTx is not supported for VF */
2235 if (!be_physfn(adapter))
2240 netdev->irq = adapter->pdev->irq;
2241 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
2244 dev_err(&adapter->pdev->dev,
2245 "INTx request IRQ failed - err %d\n", status);
2249 adapter->isr_registered = true;
2253 static void be_irq_unregister(struct be_adapter *adapter)
2255 struct net_device *netdev = adapter->netdev;
2256 struct be_eq_obj *eqo;
2259 if (!adapter->isr_registered)
2263 if (!msix_enabled(adapter)) {
2264 free_irq(netdev->irq, adapter);
2269 for_all_evt_queues(adapter, eqo, i)
2270 free_irq(be_msix_vec_get(adapter, eqo), eqo);
2273 adapter->isr_registered = false;
2276 static void be_rx_qs_destroy(struct be_adapter *adapter)
2278 struct be_queue_info *q;
2279 struct be_rx_obj *rxo;
2282 for_all_rx_queues(adapter, rxo, i) {
2285 be_cmd_rxq_destroy(adapter, q);
2286 /* After the rxq is invalidated, wait for a grace time
2287 * of 1ms for all dma to end and the flush compl to
2291 be_rx_cq_clean(rxo);
2293 be_queue_free(adapter, q);
2297 static int be_close(struct net_device *netdev)
2299 struct be_adapter *adapter = netdev_priv(netdev);
2300 struct be_eq_obj *eqo;
2303 be_roce_dev_close(adapter);
2305 be_async_mcc_disable(adapter);
2307 if (!lancer_chip(adapter))
2308 be_intr_set(adapter, false);
2310 for_all_evt_queues(adapter, eqo, i) {
2311 napi_disable(&eqo->napi);
2312 if (msix_enabled(adapter))
2313 synchronize_irq(be_msix_vec_get(adapter, eqo));
2315 synchronize_irq(netdev->irq);
2319 be_irq_unregister(adapter);
2321 /* Wait for all pending tx completions to arrive so that
2322 * all tx skbs are freed.
2324 be_tx_compl_clean(adapter);
2326 be_rx_qs_destroy(adapter);
2330 static int be_rx_qs_create(struct be_adapter *adapter)
2332 struct be_rx_obj *rxo;
2336 for_all_rx_queues(adapter, rxo, i) {
2337 rc = be_queue_alloc(adapter, &rxo->q, RX_Q_LEN,
2338 sizeof(struct be_eth_rx_d));
2343 /* The FW would like the default RXQ to be created first */
2344 rxo = default_rxo(adapter);
2345 rc = be_cmd_rxq_create(adapter, &rxo->q, rxo->cq.id, rx_frag_size,
2346 adapter->if_handle, false, &rxo->rss_id);
2350 for_all_rss_queues(adapter, rxo, i) {
2351 rc = be_cmd_rxq_create(adapter, &rxo->q, rxo->cq.id,
2352 rx_frag_size, adapter->if_handle,
2353 true, &rxo->rss_id);
2358 if (be_multi_rxq(adapter)) {
2359 for (j = 0; j < 128; j += adapter->num_rx_qs - 1) {
2360 for_all_rss_queues(adapter, rxo, i) {
2363 rsstable[j + i] = rxo->rss_id;
2366 rc = be_cmd_rss_config(adapter, rsstable, 128);
2371 /* First time posting */
2372 for_all_rx_queues(adapter, rxo, i)
2373 be_post_rx_frags(rxo, GFP_KERNEL);
2377 static int be_open(struct net_device *netdev)
2379 struct be_adapter *adapter = netdev_priv(netdev);
2380 struct be_eq_obj *eqo;
2381 struct be_rx_obj *rxo;
2382 struct be_tx_obj *txo;
2386 status = be_rx_qs_create(adapter);
2390 be_irq_register(adapter);
2392 if (!lancer_chip(adapter))
2393 be_intr_set(adapter, true);
2395 for_all_rx_queues(adapter, rxo, i)
2396 be_cq_notify(adapter, rxo->cq.id, true, 0);
2398 for_all_tx_queues(adapter, txo, i)
2399 be_cq_notify(adapter, txo->cq.id, true, 0);
2401 be_async_mcc_enable(adapter);
2403 for_all_evt_queues(adapter, eqo, i) {
2404 napi_enable(&eqo->napi);
2405 be_eq_notify(adapter, eqo->q.id, true, false, 0);
2408 status = be_cmd_link_status_query(adapter, NULL, NULL,
2411 be_link_status_update(adapter, link_status);
2413 be_roce_dev_open(adapter);
2416 be_close(adapter->netdev);
2420 static int be_setup_wol(struct be_adapter *adapter, bool enable)
2422 struct be_dma_mem cmd;
2426 memset(mac, 0, ETH_ALEN);
2428 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
2429 cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma,
2433 memset(cmd.va, 0, cmd.size);
2436 status = pci_write_config_dword(adapter->pdev,
2437 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
2439 dev_err(&adapter->pdev->dev,
2440 "Could not enable Wake-on-lan\n");
2441 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va,
2445 status = be_cmd_enable_magic_wol(adapter,
2446 adapter->netdev->dev_addr, &cmd);
2447 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
2448 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
2450 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
2451 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
2452 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
2455 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma);
2460 * Generate a seed MAC address from the PF MAC Address using jhash.
2461 * MAC Address for VFs are assigned incrementally starting from the seed.
2462 * These addresses are programmed in the ASIC by the PF and the VF driver
2463 * queries for the MAC address during its probe.
2465 static inline int be_vf_eth_addr_config(struct be_adapter *adapter)
2470 struct be_vf_cfg *vf_cfg;
2472 be_vf_eth_addr_generate(adapter, mac);
2474 for_all_vfs(adapter, vf_cfg, vf) {
2475 if (lancer_chip(adapter)) {
2476 status = be_cmd_set_mac_list(adapter, mac, 1, vf + 1);
2478 status = be_cmd_pmac_add(adapter, mac,
2480 &vf_cfg->pmac_id, vf + 1);
2484 dev_err(&adapter->pdev->dev,
2485 "Mac address assignment failed for VF %d\n", vf);
2487 memcpy(vf_cfg->mac_addr, mac, ETH_ALEN);
2494 static void be_vf_clear(struct be_adapter *adapter)
2496 struct be_vf_cfg *vf_cfg;
2499 if (be_find_vfs(adapter, ASSIGNED)) {
2500 dev_warn(&adapter->pdev->dev, "VFs are assigned to VMs\n");
2504 for_all_vfs(adapter, vf_cfg, vf) {
2505 if (lancer_chip(adapter))
2506 be_cmd_set_mac_list(adapter, NULL, 0, vf + 1);
2508 be_cmd_pmac_del(adapter, vf_cfg->if_handle,
2509 vf_cfg->pmac_id, vf + 1);
2511 be_cmd_if_destroy(adapter, vf_cfg->if_handle, vf + 1);
2513 pci_disable_sriov(adapter->pdev);
2515 kfree(adapter->vf_cfg);
2516 adapter->num_vfs = 0;
2519 static int be_clear(struct be_adapter *adapter)
2523 if (adapter->flags & BE_FLAGS_WORKER_SCHEDULED) {
2524 cancel_delayed_work_sync(&adapter->work);
2525 adapter->flags &= ~BE_FLAGS_WORKER_SCHEDULED;
2528 if (sriov_enabled(adapter))
2529 be_vf_clear(adapter);
2531 for (; adapter->uc_macs > 0; adapter->uc_macs--, i++)
2532 be_cmd_pmac_del(adapter, adapter->if_handle,
2533 adapter->pmac_id[i], 0);
2535 be_cmd_if_destroy(adapter, adapter->if_handle, 0);
2537 be_mcc_queues_destroy(adapter);
2538 be_rx_cqs_destroy(adapter);
2539 be_tx_queues_destroy(adapter);
2540 be_evt_queues_destroy(adapter);
2542 /* tell fw we're done with firing cmds */
2543 be_cmd_fw_clean(adapter);
2545 be_msix_disable(adapter);
2546 pci_write_config_dword(adapter->pdev, PCICFG_CUST_SCRATCHPAD_CSR, 0);
2550 static int be_vf_setup_init(struct be_adapter *adapter)
2552 struct be_vf_cfg *vf_cfg;
2555 adapter->vf_cfg = kcalloc(adapter->num_vfs, sizeof(*vf_cfg),
2557 if (!adapter->vf_cfg)
2560 for_all_vfs(adapter, vf_cfg, vf) {
2561 vf_cfg->if_handle = -1;
2562 vf_cfg->pmac_id = -1;
2567 static int be_vf_setup(struct be_adapter *adapter)
2569 struct be_vf_cfg *vf_cfg;
2570 struct device *dev = &adapter->pdev->dev;
2571 u32 cap_flags, en_flags, vf;
2572 u16 def_vlan, lnk_speed;
2573 int status, enabled_vfs;
2575 enabled_vfs = be_find_vfs(adapter, ENABLED);
2577 dev_warn(dev, "%d VFs are already enabled\n", enabled_vfs);
2578 dev_warn(dev, "Ignoring num_vfs=%d setting\n", num_vfs);
2582 if (num_vfs > adapter->dev_num_vfs) {
2583 dev_warn(dev, "Device supports %d VFs and not %d\n",
2584 adapter->dev_num_vfs, num_vfs);
2585 num_vfs = adapter->dev_num_vfs;
2588 status = pci_enable_sriov(adapter->pdev, num_vfs);
2590 adapter->num_vfs = num_vfs;
2592 /* Platform doesn't support SRIOV though device supports it */
2593 dev_warn(dev, "SRIOV enable failed\n");
2597 status = be_vf_setup_init(adapter);
2601 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
2602 BE_IF_FLAGS_MULTICAST;
2603 for_all_vfs(adapter, vf_cfg, vf) {
2604 status = be_cmd_if_create(adapter, cap_flags, en_flags, NULL,
2605 &vf_cfg->if_handle, NULL, vf + 1);
2611 status = be_vf_eth_addr_config(adapter);
2616 for_all_vfs(adapter, vf_cfg, vf) {
2617 status = be_cmd_link_status_query(adapter, NULL, &lnk_speed,
2621 vf_cfg->tx_rate = lnk_speed * 10;
2623 status = be_cmd_get_hsw_config(adapter, &def_vlan,
2624 vf + 1, vf_cfg->if_handle);
2627 vf_cfg->def_vid = def_vlan;
2634 static void be_setup_init(struct be_adapter *adapter)
2636 adapter->vlan_prio_bmap = 0xff;
2637 adapter->phy.link_speed = -1;
2638 adapter->if_handle = -1;
2639 adapter->be3_native = false;
2640 adapter->promiscuous = false;
2641 adapter->eq_next_idx = 0;
2642 adapter->phy.forced_port_speed = -1;
2645 static int be_add_mac_from_list(struct be_adapter *adapter, u8 *mac)
2649 bool pmac_id_active;
2651 status = be_cmd_get_mac_from_list(adapter, 0, &pmac_id_active,
2656 if (pmac_id_active) {
2657 status = be_cmd_mac_addr_query(adapter, mac,
2658 MAC_ADDRESS_TYPE_NETWORK,
2659 false, adapter->if_handle, pmac_id);
2662 adapter->pmac_id[0] = pmac_id;
2664 status = be_cmd_pmac_add(adapter, mac,
2665 adapter->if_handle, &adapter->pmac_id[0], 0);
2671 /* Routine to query per function resource limits */
2672 static int be_get_config(struct be_adapter *adapter)
2677 pos = pci_find_ext_capability(adapter->pdev, PCI_EXT_CAP_ID_SRIOV);
2679 pci_read_config_word(adapter->pdev, pos + PCI_SRIOV_TOTAL_VF,
2681 adapter->dev_num_vfs = dev_num_vfs;
2686 static int be_setup(struct be_adapter *adapter)
2688 struct net_device *netdev = adapter->netdev;
2689 struct device *dev = &adapter->pdev->dev;
2690 u32 cap_flags, en_flags;
2695 be_setup_init(adapter);
2697 be_get_config(adapter);
2699 be_cmd_req_native_mode(adapter);
2701 be_msix_enable(adapter);
2703 status = be_evt_queues_create(adapter);
2707 status = be_tx_cqs_create(adapter);
2711 status = be_rx_cqs_create(adapter);
2715 status = be_mcc_queues_create(adapter);
2719 memset(mac, 0, ETH_ALEN);
2720 status = be_cmd_mac_addr_query(adapter, mac, MAC_ADDRESS_TYPE_NETWORK,
2721 true /*permanent */, 0, 0);
2724 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2725 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2727 en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
2728 BE_IF_FLAGS_MULTICAST | BE_IF_FLAGS_PASS_L3L4_ERRORS;
2729 cap_flags = en_flags | BE_IF_FLAGS_MCAST_PROMISCUOUS |
2730 BE_IF_FLAGS_VLAN_PROMISCUOUS | BE_IF_FLAGS_PROMISCUOUS;
2732 if (adapter->function_caps & BE_FUNCTION_CAPS_RSS) {
2733 cap_flags |= BE_IF_FLAGS_RSS;
2734 en_flags |= BE_IF_FLAGS_RSS;
2736 status = be_cmd_if_create(adapter, cap_flags, en_flags,
2737 netdev->dev_addr, &adapter->if_handle,
2738 &adapter->pmac_id[0], 0);
2742 /* The VF's permanent mac queried from card is incorrect.
2743 * For BEx: Query the mac configued by the PF using if_handle
2744 * For Lancer: Get and use mac_list to obtain mac address.
2746 if (!be_physfn(adapter)) {
2747 if (lancer_chip(adapter))
2748 status = be_add_mac_from_list(adapter, mac);
2750 status = be_cmd_mac_addr_query(adapter, mac,
2751 MAC_ADDRESS_TYPE_NETWORK, false,
2752 adapter->if_handle, 0);
2754 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2755 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2759 status = be_tx_qs_create(adapter);
2763 be_cmd_get_fw_ver(adapter, adapter->fw_ver, NULL);
2765 be_vid_config(adapter, false, 0);
2767 be_set_rx_mode(adapter->netdev);
2769 be_cmd_get_flow_control(adapter, &tx_fc, &rx_fc);
2771 if (rx_fc != adapter->rx_fc || tx_fc != adapter->tx_fc)
2772 be_cmd_set_flow_control(adapter, adapter->tx_fc,
2775 pcie_set_readrq(adapter->pdev, 4096);
2777 if (be_physfn(adapter) && num_vfs) {
2778 if (adapter->dev_num_vfs)
2779 be_vf_setup(adapter);
2781 dev_warn(dev, "device doesn't support SRIOV\n");
2784 be_cmd_get_phy_info(adapter);
2785 if (be_pause_supported(adapter))
2786 adapter->phy.fc_autoneg = 1;
2788 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
2789 adapter->flags |= BE_FLAGS_WORKER_SCHEDULED;
2791 pci_write_config_dword(adapter->pdev, PCICFG_CUST_SCRATCHPAD_CSR, 1);
2798 #ifdef CONFIG_NET_POLL_CONTROLLER
2799 static void be_netpoll(struct net_device *netdev)
2801 struct be_adapter *adapter = netdev_priv(netdev);
2802 struct be_eq_obj *eqo;
2805 for_all_evt_queues(adapter, eqo, i)
2812 #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
2813 char flash_cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "};
2815 static bool be_flash_redboot(struct be_adapter *adapter,
2816 const u8 *p, u32 img_start, int image_size,
2823 crc_offset = hdr_size + img_start + image_size - 4;
2827 status = be_cmd_get_flash_crc(adapter, flashed_crc,
2830 dev_err(&adapter->pdev->dev,
2831 "could not get crc from flash, not flashing redboot\n");
2835 /*update redboot only if crc does not match*/
2836 if (!memcmp(flashed_crc, p, 4))
2842 static bool phy_flashing_required(struct be_adapter *adapter)
2844 return (adapter->phy.phy_type == TN_8022 &&
2845 adapter->phy.interface_type == PHY_TYPE_BASET_10GB);
2848 static bool is_comp_in_ufi(struct be_adapter *adapter,
2849 struct flash_section_info *fsec, int type)
2851 int i = 0, img_type = 0;
2852 struct flash_section_info_g2 *fsec_g2 = NULL;
2854 if (adapter->generation != BE_GEN3)
2855 fsec_g2 = (struct flash_section_info_g2 *)fsec;
2857 for (i = 0; i < MAX_FLASH_COMP; i++) {
2859 img_type = le32_to_cpu(fsec_g2->fsec_entry[i].type);
2861 img_type = le32_to_cpu(fsec->fsec_entry[i].type);
2863 if (img_type == type)
2870 struct flash_section_info *get_fsec_info(struct be_adapter *adapter,
2872 const struct firmware *fw)
2874 struct flash_section_info *fsec = NULL;
2875 const u8 *p = fw->data;
2878 while (p < (fw->data + fw->size)) {
2879 fsec = (struct flash_section_info *)p;
2880 if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie)))
2887 static int be_flash_data(struct be_adapter *adapter,
2888 const struct firmware *fw,
2889 struct be_dma_mem *flash_cmd,
2893 int status = 0, i, filehdr_size = 0;
2894 int img_hdrs_size = (num_of_images * sizeof(struct image_hdr));
2895 u32 total_bytes = 0, flash_op;
2897 const u8 *p = fw->data;
2898 struct be_cmd_write_flashrom *req = flash_cmd->va;
2899 const struct flash_comp *pflashcomp;
2900 int num_comp, hdr_size;
2901 struct flash_section_info *fsec = NULL;
2903 struct flash_comp gen3_flash_types[] = {
2904 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, OPTYPE_ISCSI_ACTIVE,
2905 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_iSCSI},
2906 { FLASH_REDBOOT_START_g3, OPTYPE_REDBOOT,
2907 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3, IMAGE_BOOT_CODE},
2908 { FLASH_iSCSI_BIOS_START_g3, OPTYPE_BIOS,
2909 FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_ISCSI},
2910 { FLASH_PXE_BIOS_START_g3, OPTYPE_PXE_BIOS,
2911 FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_PXE},
2912 { FLASH_FCoE_BIOS_START_g3, OPTYPE_FCOE_BIOS,
2913 FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_FCoE},
2914 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, OPTYPE_ISCSI_BACKUP,
2915 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_BACKUP_iSCSI},
2916 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, OPTYPE_FCOE_FW_ACTIVE,
2917 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_FCoE},
2918 { FLASH_FCoE_BACKUP_IMAGE_START_g3, OPTYPE_FCOE_FW_BACKUP,
2919 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_BACKUP_FCoE},
2920 { FLASH_NCSI_START_g3, OPTYPE_NCSI_FW,
2921 FLASH_NCSI_IMAGE_MAX_SIZE_g3, IMAGE_NCSI},
2922 { FLASH_PHY_FW_START_g3, OPTYPE_PHY_FW,
2923 FLASH_PHY_FW_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_PHY}
2926 struct flash_comp gen2_flash_types[] = {
2927 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, OPTYPE_ISCSI_ACTIVE,
2928 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_iSCSI},
2929 { FLASH_REDBOOT_START_g2, OPTYPE_REDBOOT,
2930 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2, IMAGE_BOOT_CODE},
2931 { FLASH_iSCSI_BIOS_START_g2, OPTYPE_BIOS,
2932 FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_ISCSI},
2933 { FLASH_PXE_BIOS_START_g2, OPTYPE_PXE_BIOS,
2934 FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_PXE},
2935 { FLASH_FCoE_BIOS_START_g2, OPTYPE_FCOE_BIOS,
2936 FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_FCoE},
2937 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, OPTYPE_ISCSI_BACKUP,
2938 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_BACKUP_iSCSI},
2939 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, OPTYPE_FCOE_FW_ACTIVE,
2940 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_FCoE},
2941 { FLASH_FCoE_BACKUP_IMAGE_START_g2, OPTYPE_FCOE_FW_BACKUP,
2942 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_BACKUP_FCoE}
2945 if (adapter->generation == BE_GEN3) {
2946 pflashcomp = gen3_flash_types;
2947 filehdr_size = sizeof(struct flash_file_hdr_g3);
2948 num_comp = ARRAY_SIZE(gen3_flash_types);
2950 pflashcomp = gen2_flash_types;
2951 filehdr_size = sizeof(struct flash_file_hdr_g2);
2952 num_comp = ARRAY_SIZE(gen2_flash_types);
2954 /* Get flash section info*/
2955 fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw);
2957 dev_err(&adapter->pdev->dev,
2958 "Invalid Cookie. UFI corrupted ?\n");
2961 for (i = 0; i < num_comp; i++) {
2962 if (!is_comp_in_ufi(adapter, fsec, pflashcomp[i].img_type))
2965 if ((pflashcomp[i].optype == OPTYPE_NCSI_FW) &&
2966 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
2969 if (pflashcomp[i].optype == OPTYPE_PHY_FW) {
2970 if (!phy_flashing_required(adapter))
2974 hdr_size = filehdr_size +
2975 (num_of_images * sizeof(struct image_hdr));
2977 if ((pflashcomp[i].optype == OPTYPE_REDBOOT) &&
2978 (!be_flash_redboot(adapter, fw->data, pflashcomp[i].offset,
2979 pflashcomp[i].size, hdr_size)))
2982 /* Flash the component */
2984 p += filehdr_size + pflashcomp[i].offset + img_hdrs_size;
2985 if (p + pflashcomp[i].size > fw->data + fw->size)
2987 total_bytes = pflashcomp[i].size;
2988 while (total_bytes) {
2989 if (total_bytes > 32*1024)
2990 num_bytes = 32*1024;
2992 num_bytes = total_bytes;
2993 total_bytes -= num_bytes;
2995 if (pflashcomp[i].optype == OPTYPE_PHY_FW)
2996 flash_op = FLASHROM_OPER_PHY_FLASH;
2998 flash_op = FLASHROM_OPER_FLASH;
3000 if (pflashcomp[i].optype == OPTYPE_PHY_FW)
3001 flash_op = FLASHROM_OPER_PHY_SAVE;
3003 flash_op = FLASHROM_OPER_SAVE;
3005 memcpy(req->params.data_buf, p, num_bytes);
3007 status = be_cmd_write_flashrom(adapter, flash_cmd,
3008 pflashcomp[i].optype, flash_op, num_bytes);
3010 if ((status == ILLEGAL_IOCTL_REQ) &&
3011 (pflashcomp[i].optype ==
3014 dev_err(&adapter->pdev->dev,
3015 "cmd to write to flash rom failed.\n");
3023 static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
3027 if (fhdr->build[0] == '3')
3029 else if (fhdr->build[0] == '2')
3035 static int lancer_fw_download(struct be_adapter *adapter,
3036 const struct firmware *fw)
3038 #define LANCER_FW_DOWNLOAD_CHUNK (32 * 1024)
3039 #define LANCER_FW_DOWNLOAD_LOCATION "/prg"
3040 struct be_dma_mem flash_cmd;
3041 const u8 *data_ptr = NULL;
3042 u8 *dest_image_ptr = NULL;
3043 size_t image_size = 0;
3045 u32 data_written = 0;
3050 if (!IS_ALIGNED(fw->size, sizeof(u32))) {
3051 dev_err(&adapter->pdev->dev,
3052 "FW Image not properly aligned. "
3053 "Length must be 4 byte aligned.\n");
3055 goto lancer_fw_exit;
3058 flash_cmd.size = sizeof(struct lancer_cmd_req_write_object)
3059 + LANCER_FW_DOWNLOAD_CHUNK;
3060 flash_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, flash_cmd.size,
3061 &flash_cmd.dma, GFP_KERNEL);
3062 if (!flash_cmd.va) {
3064 dev_err(&adapter->pdev->dev,
3065 "Memory allocation failure while flashing\n");
3066 goto lancer_fw_exit;
3069 dest_image_ptr = flash_cmd.va +
3070 sizeof(struct lancer_cmd_req_write_object);
3071 image_size = fw->size;
3072 data_ptr = fw->data;
3074 while (image_size) {
3075 chunk_size = min_t(u32, image_size, LANCER_FW_DOWNLOAD_CHUNK);
3077 /* Copy the image chunk content. */
3078 memcpy(dest_image_ptr, data_ptr, chunk_size);
3080 status = lancer_cmd_write_object(adapter, &flash_cmd,
3081 chunk_size, offset, LANCER_FW_DOWNLOAD_LOCATION,
3082 &data_written, &add_status);
3087 offset += data_written;
3088 data_ptr += data_written;
3089 image_size -= data_written;
3093 /* Commit the FW written */
3094 status = lancer_cmd_write_object(adapter, &flash_cmd,
3095 0, offset, LANCER_FW_DOWNLOAD_LOCATION,
3096 &data_written, &add_status);
3099 dma_free_coherent(&adapter->pdev->dev, flash_cmd.size, flash_cmd.va,
3102 dev_err(&adapter->pdev->dev,
3103 "Firmware load error. "
3104 "Status code: 0x%x Additional Status: 0x%x\n",
3105 status, add_status);
3106 goto lancer_fw_exit;
3109 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
3114 static int be_fw_download(struct be_adapter *adapter, const struct firmware* fw)
3116 struct flash_file_hdr_g2 *fhdr;
3117 struct flash_file_hdr_g3 *fhdr3;
3118 struct image_hdr *img_hdr_ptr = NULL;
3119 struct be_dma_mem flash_cmd;
3121 int status = 0, i = 0, num_imgs = 0;
3124 fhdr = (struct flash_file_hdr_g2 *) p;
3126 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
3127 flash_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, flash_cmd.size,
3128 &flash_cmd.dma, GFP_KERNEL);
3129 if (!flash_cmd.va) {
3131 dev_err(&adapter->pdev->dev,
3132 "Memory allocation failure while flashing\n");
3136 if ((adapter->generation == BE_GEN3) &&
3137 (get_ufigen_type(fhdr) == BE_GEN3)) {
3138 fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
3139 num_imgs = le32_to_cpu(fhdr3->num_imgs);
3140 for (i = 0; i < num_imgs; i++) {
3141 img_hdr_ptr = (struct image_hdr *) (fw->data +
3142 (sizeof(struct flash_file_hdr_g3) +
3143 i * sizeof(struct image_hdr)));
3144 if (le32_to_cpu(img_hdr_ptr->imageid) == 1)
3145 status = be_flash_data(adapter, fw, &flash_cmd,
3148 } else if ((adapter->generation == BE_GEN2) &&
3149 (get_ufigen_type(fhdr) == BE_GEN2)) {
3150 status = be_flash_data(adapter, fw, &flash_cmd, 0);
3152 dev_err(&adapter->pdev->dev,
3153 "UFI and Interface are not compatible for flashing\n");
3157 dma_free_coherent(&adapter->pdev->dev, flash_cmd.size, flash_cmd.va,
3160 dev_err(&adapter->pdev->dev, "Firmware load error\n");
3164 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
3170 int be_load_fw(struct be_adapter *adapter, u8 *fw_file)
3172 const struct firmware *fw;
3175 if (!netif_running(adapter->netdev)) {
3176 dev_err(&adapter->pdev->dev,
3177 "Firmware load not allowed (interface is down)\n");
3181 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
3185 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
3187 if (lancer_chip(adapter))
3188 status = lancer_fw_download(adapter, fw);
3190 status = be_fw_download(adapter, fw);
3193 release_firmware(fw);
3197 static const struct net_device_ops be_netdev_ops = {
3198 .ndo_open = be_open,
3199 .ndo_stop = be_close,
3200 .ndo_start_xmit = be_xmit,
3201 .ndo_set_rx_mode = be_set_rx_mode,
3202 .ndo_set_mac_address = be_mac_addr_set,
3203 .ndo_change_mtu = be_change_mtu,
3204 .ndo_get_stats64 = be_get_stats64,
3205 .ndo_validate_addr = eth_validate_addr,
3206 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
3207 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
3208 .ndo_set_vf_mac = be_set_vf_mac,
3209 .ndo_set_vf_vlan = be_set_vf_vlan,
3210 .ndo_set_vf_tx_rate = be_set_vf_tx_rate,
3211 .ndo_get_vf_config = be_get_vf_config,
3212 #ifdef CONFIG_NET_POLL_CONTROLLER
3213 .ndo_poll_controller = be_netpoll,
3217 static void be_netdev_init(struct net_device *netdev)
3219 struct be_adapter *adapter = netdev_priv(netdev);
3220 struct be_eq_obj *eqo;
3223 netdev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 |
3224 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
3226 if (be_multi_rxq(adapter))
3227 netdev->hw_features |= NETIF_F_RXHASH;
3229 netdev->features |= netdev->hw_features |
3230 NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;
3232 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 |
3233 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
3235 netdev->priv_flags |= IFF_UNICAST_FLT;
3237 netdev->flags |= IFF_MULTICAST;
3239 netif_set_gso_max_size(netdev, 65535);
3241 netdev->netdev_ops = &be_netdev_ops;
3243 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
3245 for_all_evt_queues(adapter, eqo, i)
3246 netif_napi_add(netdev, &eqo->napi, be_poll, BE_NAPI_WEIGHT);
3249 static void be_unmap_pci_bars(struct be_adapter *adapter)
3252 iounmap(adapter->csr);
3254 iounmap(adapter->db);
3255 if (adapter->roce_db.base)
3256 pci_iounmap(adapter->pdev, adapter->roce_db.base);
3259 static int lancer_roce_map_pci_bars(struct be_adapter *adapter)
3261 struct pci_dev *pdev = adapter->pdev;
3264 addr = pci_iomap(pdev, 2, 0);
3268 adapter->roce_db.base = addr;
3269 adapter->roce_db.io_addr = pci_resource_start(pdev, 2);
3270 adapter->roce_db.size = 8192;
3271 adapter->roce_db.total_size = pci_resource_len(pdev, 2);
3275 static int be_map_pci_bars(struct be_adapter *adapter)
3280 if (lancer_chip(adapter)) {
3281 if (be_type_2_3(adapter)) {
3282 addr = ioremap_nocache(
3283 pci_resource_start(adapter->pdev, 0),
3284 pci_resource_len(adapter->pdev, 0));
3289 if (adapter->if_type == SLI_INTF_TYPE_3) {
3290 if (lancer_roce_map_pci_bars(adapter))
3296 if (be_physfn(adapter)) {
3297 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
3298 pci_resource_len(adapter->pdev, 2));
3301 adapter->csr = addr;
3304 if (adapter->generation == BE_GEN2) {
3307 if (be_physfn(adapter))
3312 addr = ioremap_nocache(pci_resource_start(adapter->pdev, db_reg),
3313 pci_resource_len(adapter->pdev, db_reg));
3317 if (adapter->sli_family == SKYHAWK_SLI_FAMILY) {
3318 adapter->roce_db.size = 4096;
3319 adapter->roce_db.io_addr =
3320 pci_resource_start(adapter->pdev, db_reg);
3321 adapter->roce_db.total_size =
3322 pci_resource_len(adapter->pdev, db_reg);
3326 be_unmap_pci_bars(adapter);
3330 static void be_ctrl_cleanup(struct be_adapter *adapter)
3332 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
3334 be_unmap_pci_bars(adapter);
3337 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
3340 mem = &adapter->rx_filter;
3342 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
3346 static int be_ctrl_init(struct be_adapter *adapter)
3348 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
3349 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
3350 struct be_dma_mem *rx_filter = &adapter->rx_filter;
3353 status = be_map_pci_bars(adapter);
3357 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
3358 mbox_mem_alloc->va = dma_alloc_coherent(&adapter->pdev->dev,
3359 mbox_mem_alloc->size,
3360 &mbox_mem_alloc->dma,
3362 if (!mbox_mem_alloc->va) {
3364 goto unmap_pci_bars;
3366 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
3367 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
3368 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
3369 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
3371 rx_filter->size = sizeof(struct be_cmd_req_rx_filter);
3372 rx_filter->va = dma_alloc_coherent(&adapter->pdev->dev, rx_filter->size,
3373 &rx_filter->dma, GFP_KERNEL);
3374 if (rx_filter->va == NULL) {
3378 memset(rx_filter->va, 0, rx_filter->size);
3380 mutex_init(&adapter->mbox_lock);
3381 spin_lock_init(&adapter->mcc_lock);
3382 spin_lock_init(&adapter->mcc_cq_lock);
3384 init_completion(&adapter->flash_compl);
3385 pci_save_state(adapter->pdev);
3389 dma_free_coherent(&adapter->pdev->dev, mbox_mem_alloc->size,
3390 mbox_mem_alloc->va, mbox_mem_alloc->dma);
3393 be_unmap_pci_bars(adapter);
3399 static void be_stats_cleanup(struct be_adapter *adapter)
3401 struct be_dma_mem *cmd = &adapter->stats_cmd;
3404 dma_free_coherent(&adapter->pdev->dev, cmd->size,
3408 static int be_stats_init(struct be_adapter *adapter)
3410 struct be_dma_mem *cmd = &adapter->stats_cmd;
3412 if (adapter->generation == BE_GEN2) {
3413 cmd->size = sizeof(struct be_cmd_req_get_stats_v0);
3415 if (lancer_chip(adapter))
3416 cmd->size = sizeof(struct lancer_cmd_req_pport_stats);
3418 cmd->size = sizeof(struct be_cmd_req_get_stats_v1);
3420 cmd->va = dma_alloc_coherent(&adapter->pdev->dev, cmd->size, &cmd->dma,
3422 if (cmd->va == NULL)
3424 memset(cmd->va, 0, cmd->size);
3428 static void __devexit be_remove(struct pci_dev *pdev)
3430 struct be_adapter *adapter = pci_get_drvdata(pdev);
3435 be_roce_dev_remove(adapter);
3437 unregister_netdev(adapter->netdev);
3441 be_stats_cleanup(adapter);
3443 be_ctrl_cleanup(adapter);
3445 pci_set_drvdata(pdev, NULL);
3446 pci_release_regions(pdev);
3447 pci_disable_device(pdev);
3449 free_netdev(adapter->netdev);
3452 bool be_is_wol_supported(struct be_adapter *adapter)
3454 return ((adapter->wol_cap & BE_WOL_CAP) &&
3455 !be_is_wol_excluded(adapter)) ? true : false;
3458 u32 be_get_fw_log_level(struct be_adapter *adapter)
3460 struct be_dma_mem extfat_cmd;
3461 struct be_fat_conf_params *cfgs;
3466 memset(&extfat_cmd, 0, sizeof(struct be_dma_mem));
3467 extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps);
3468 extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size,
3471 if (!extfat_cmd.va) {
3472 dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n",
3477 status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd);
3479 cfgs = (struct be_fat_conf_params *)(extfat_cmd.va +
3480 sizeof(struct be_cmd_resp_hdr));
3481 for (j = 0; j < cfgs->module[0].num_modes; j++) {
3482 if (cfgs->module[0].trace_lvl[j].mode == MODE_UART)
3483 level = cfgs->module[0].trace_lvl[j].dbg_lvl;
3486 pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va,
3491 static int be_get_initial_config(struct be_adapter *adapter)
3496 status = be_cmd_query_fw_cfg(adapter, &adapter->port_num,
3497 &adapter->function_mode, &adapter->function_caps);
3501 if (adapter->function_mode & FLEX10_MODE)
3502 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/8;
3504 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
3506 if (be_physfn(adapter))
3507 adapter->max_pmac_cnt = BE_UC_PMAC_COUNT;
3509 adapter->max_pmac_cnt = BE_VF_UC_PMAC_COUNT;
3511 /* primary mac needs 1 pmac entry */
3512 adapter->pmac_id = kcalloc(adapter->max_pmac_cnt + 1,
3513 sizeof(u32), GFP_KERNEL);
3514 if (!adapter->pmac_id)
3517 status = be_cmd_get_cntl_attributes(adapter);
3521 status = be_cmd_get_acpi_wol_cap(adapter);
3523 /* in case of a failure to get wol capabillities
3524 * check the exclusion list to determine WOL capability */
3525 if (!be_is_wol_excluded(adapter))
3526 adapter->wol_cap |= BE_WOL_CAP;
3529 if (be_is_wol_supported(adapter))
3530 adapter->wol = true;
3532 level = be_get_fw_log_level(adapter);
3533 adapter->msg_enable = level <= FW_LOG_LEVEL_DEFAULT ? NETIF_MSG_HW : 0;
3538 static int be_dev_type_check(struct be_adapter *adapter)
3540 struct pci_dev *pdev = adapter->pdev;
3541 u32 sli_intf = 0, if_type;
3543 switch (pdev->device) {
3546 adapter->generation = BE_GEN2;
3550 adapter->generation = BE_GEN3;
3554 pci_read_config_dword(pdev, SLI_INTF_REG_OFFSET, &sli_intf);
3555 adapter->if_type = (sli_intf & SLI_INTF_IF_TYPE_MASK) >>
3556 SLI_INTF_IF_TYPE_SHIFT;
3557 if_type = (sli_intf & SLI_INTF_IF_TYPE_MASK) >>
3558 SLI_INTF_IF_TYPE_SHIFT;
3559 if (((sli_intf & SLI_INTF_VALID_MASK) != SLI_INTF_VALID) ||
3560 !be_type_2_3(adapter)) {
3561 dev_err(&pdev->dev, "SLI_INTF reg val is not valid\n");
3564 adapter->sli_family = ((sli_intf & SLI_INTF_FAMILY_MASK) >>
3565 SLI_INTF_FAMILY_SHIFT);
3566 adapter->generation = BE_GEN3;
3569 pci_read_config_dword(pdev, SLI_INTF_REG_OFFSET, &sli_intf);
3570 if ((sli_intf & SLI_INTF_VALID_MASK) != SLI_INTF_VALID) {
3571 dev_err(&pdev->dev, "SLI_INTF reg val is not valid\n");
3574 adapter->sli_family = ((sli_intf & SLI_INTF_FAMILY_MASK) >>
3575 SLI_INTF_FAMILY_SHIFT);
3576 adapter->generation = BE_GEN3;
3579 adapter->generation = 0;
3582 pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf);
3583 adapter->virtfn = (sli_intf & SLI_INTF_FT_MASK) ? 1 : 0;
3587 static int lancer_wait_ready(struct be_adapter *adapter)
3589 #define SLIPORT_READY_TIMEOUT 30
3593 for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) {
3594 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
3595 if (sliport_status & SLIPORT_STATUS_RDY_MASK)
3601 if (i == SLIPORT_READY_TIMEOUT)
3607 static int lancer_test_and_set_rdy_state(struct be_adapter *adapter)
3610 u32 sliport_status, err, reset_needed;
3611 status = lancer_wait_ready(adapter);
3613 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
3614 err = sliport_status & SLIPORT_STATUS_ERR_MASK;
3615 reset_needed = sliport_status & SLIPORT_STATUS_RN_MASK;
3616 if (err && reset_needed) {
3617 iowrite32(SLI_PORT_CONTROL_IP_MASK,
3618 adapter->db + SLIPORT_CONTROL_OFFSET);
3620 /* check adapter has corrected the error */
3621 status = lancer_wait_ready(adapter);
3622 sliport_status = ioread32(adapter->db +
3623 SLIPORT_STATUS_OFFSET);
3624 sliport_status &= (SLIPORT_STATUS_ERR_MASK |
3625 SLIPORT_STATUS_RN_MASK);
3626 if (status || sliport_status)
3628 } else if (err || reset_needed) {
3635 static void lancer_test_and_recover_fn_err(struct be_adapter *adapter)
3640 if (adapter->eeh_err || adapter->ue_detected)
3643 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
3645 if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
3646 dev_err(&adapter->pdev->dev,
3647 "Adapter in error state."
3648 "Trying to recover.\n");
3650 status = lancer_test_and_set_rdy_state(adapter);
3654 netif_device_detach(adapter->netdev);
3656 if (netif_running(adapter->netdev))
3657 be_close(adapter->netdev);
3661 adapter->fw_timeout = false;
3663 status = be_setup(adapter);
3667 if (netif_running(adapter->netdev)) {
3668 status = be_open(adapter->netdev);
3673 netif_device_attach(adapter->netdev);
3675 dev_err(&adapter->pdev->dev,
3676 "Adapter error recovery succeeded\n");
3680 dev_err(&adapter->pdev->dev,
3681 "Adapter error recovery failed\n");
3684 static void be_worker(struct work_struct *work)
3686 struct be_adapter *adapter =
3687 container_of(work, struct be_adapter, work.work);
3688 struct be_rx_obj *rxo;
3689 struct be_eq_obj *eqo;
3692 if (lancer_chip(adapter))
3693 lancer_test_and_recover_fn_err(adapter);
3695 be_detect_dump_ue(adapter);
3697 /* when interrupts are not yet enabled, just reap any pending
3698 * mcc completions */
3699 if (!netif_running(adapter->netdev)) {
3700 be_process_mcc(adapter);
3704 if (!adapter->stats_cmd_sent) {
3705 if (lancer_chip(adapter))
3706 lancer_cmd_get_pport_stats(adapter,
3707 &adapter->stats_cmd);
3709 be_cmd_get_stats(adapter, &adapter->stats_cmd);
3712 for_all_rx_queues(adapter, rxo, i) {
3713 if (rxo->rx_post_starved) {
3714 rxo->rx_post_starved = false;
3715 be_post_rx_frags(rxo, GFP_KERNEL);
3719 for_all_evt_queues(adapter, eqo, i)
3720 be_eqd_update(adapter, eqo);
3723 adapter->work_counter++;
3724 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
3727 static bool be_reset_required(struct be_adapter *adapter)
3731 pci_read_config_dword(adapter->pdev, PCICFG_CUST_SCRATCHPAD_CSR, ®);
3735 static int __devinit be_probe(struct pci_dev *pdev,
3736 const struct pci_device_id *pdev_id)
3739 struct be_adapter *adapter;
3740 struct net_device *netdev;
3742 status = pci_enable_device(pdev);
3746 status = pci_request_regions(pdev, DRV_NAME);
3749 pci_set_master(pdev);
3751 netdev = alloc_etherdev_mq(sizeof(struct be_adapter), MAX_TX_QS);
3752 if (netdev == NULL) {
3756 adapter = netdev_priv(netdev);
3757 adapter->pdev = pdev;
3758 pci_set_drvdata(pdev, adapter);
3760 status = be_dev_type_check(adapter);
3764 adapter->netdev = netdev;
3765 SET_NETDEV_DEV(netdev, &pdev->dev);
3767 status = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
3769 netdev->features |= NETIF_F_HIGHDMA;
3771 status = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
3773 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
3778 status = be_ctrl_init(adapter);
3782 if (lancer_chip(adapter)) {
3783 status = lancer_wait_ready(adapter);
3785 iowrite32(SLI_PORT_CONTROL_IP_MASK,
3786 adapter->db + SLIPORT_CONTROL_OFFSET);
3787 status = lancer_test_and_set_rdy_state(adapter);
3790 dev_err(&pdev->dev, "Adapter in non recoverable error\n");
3795 /* sync up with fw's ready state */
3796 if (be_physfn(adapter)) {
3797 status = be_cmd_POST(adapter);
3802 /* tell fw we're ready to fire cmds */
3803 status = be_cmd_fw_init(adapter);
3807 if (be_reset_required(adapter)) {
3808 status = be_cmd_reset_function(adapter);
3813 /* The INTR bit may be set in the card when probed by a kdump kernel
3816 if (!lancer_chip(adapter))
3817 be_intr_set(adapter, false);
3819 status = be_stats_init(adapter);
3823 status = be_get_initial_config(adapter);
3827 INIT_DELAYED_WORK(&adapter->work, be_worker);
3828 adapter->rx_fc = adapter->tx_fc = true;
3830 status = be_setup(adapter);
3834 be_netdev_init(netdev);
3835 status = register_netdev(netdev);
3839 be_roce_dev_add(adapter);
3841 dev_info(&pdev->dev, "%s: %s port %d\n", netdev->name, nic_name(pdev),
3849 be_msix_disable(adapter);
3851 be_stats_cleanup(adapter);
3853 be_ctrl_cleanup(adapter);
3855 free_netdev(netdev);
3856 pci_set_drvdata(pdev, NULL);
3858 pci_release_regions(pdev);
3860 pci_disable_device(pdev);
3862 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
3866 static int be_suspend(struct pci_dev *pdev, pm_message_t state)
3868 struct be_adapter *adapter = pci_get_drvdata(pdev);
3869 struct net_device *netdev = adapter->netdev;
3872 be_setup_wol(adapter, true);
3874 netif_device_detach(netdev);
3875 if (netif_running(netdev)) {
3882 pci_save_state(pdev);
3883 pci_disable_device(pdev);
3884 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3888 static int be_resume(struct pci_dev *pdev)
3891 struct be_adapter *adapter = pci_get_drvdata(pdev);
3892 struct net_device *netdev = adapter->netdev;
3894 netif_device_detach(netdev);
3896 status = pci_enable_device(pdev);
3900 pci_set_power_state(pdev, 0);
3901 pci_restore_state(pdev);
3903 /* tell fw we're ready to fire cmds */
3904 status = be_cmd_fw_init(adapter);
3909 if (netif_running(netdev)) {
3914 netif_device_attach(netdev);
3917 be_setup_wol(adapter, false);
3923 * An FLR will stop BE from DMAing any data.
3925 static void be_shutdown(struct pci_dev *pdev)
3927 struct be_adapter *adapter = pci_get_drvdata(pdev);
3932 cancel_delayed_work_sync(&adapter->work);
3934 netif_device_detach(adapter->netdev);
3937 be_setup_wol(adapter, true);
3939 be_cmd_reset_function(adapter);
3941 pci_disable_device(pdev);
3944 static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
3945 pci_channel_state_t state)
3947 struct be_adapter *adapter = pci_get_drvdata(pdev);
3948 struct net_device *netdev = adapter->netdev;
3950 dev_err(&adapter->pdev->dev, "EEH error detected\n");
3952 adapter->eeh_err = true;
3954 netif_device_detach(netdev);
3956 if (netif_running(netdev)) {
3963 if (state == pci_channel_io_perm_failure)
3964 return PCI_ERS_RESULT_DISCONNECT;
3966 pci_disable_device(pdev);
3968 /* The error could cause the FW to trigger a flash debug dump.
3969 * Resetting the card while flash dump is in progress
3970 * can cause it not to recover; wait for it to finish
3973 return PCI_ERS_RESULT_NEED_RESET;
3976 static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
3978 struct be_adapter *adapter = pci_get_drvdata(pdev);
3981 dev_info(&adapter->pdev->dev, "EEH reset\n");
3982 adapter->eeh_err = false;
3983 adapter->ue_detected = false;
3984 adapter->fw_timeout = false;
3986 status = pci_enable_device(pdev);
3988 return PCI_ERS_RESULT_DISCONNECT;
3990 pci_set_master(pdev);
3991 pci_set_power_state(pdev, 0);
3992 pci_restore_state(pdev);
3994 /* Check if card is ok and fw is ready */
3995 status = be_cmd_POST(adapter);
3997 return PCI_ERS_RESULT_DISCONNECT;
3999 return PCI_ERS_RESULT_RECOVERED;
4002 static void be_eeh_resume(struct pci_dev *pdev)
4005 struct be_adapter *adapter = pci_get_drvdata(pdev);
4006 struct net_device *netdev = adapter->netdev;
4008 dev_info(&adapter->pdev->dev, "EEH resume\n");
4010 pci_save_state(pdev);
4012 /* tell fw we're ready to fire cmds */
4013 status = be_cmd_fw_init(adapter);
4017 status = be_setup(adapter);
4021 if (netif_running(netdev)) {
4022 status = be_open(netdev);
4026 netif_device_attach(netdev);
4029 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
4032 static struct pci_error_handlers be_eeh_handlers = {
4033 .error_detected = be_eeh_err_detected,
4034 .slot_reset = be_eeh_reset,
4035 .resume = be_eeh_resume,
4038 static struct pci_driver be_driver = {
4040 .id_table = be_dev_ids,
4042 .remove = be_remove,
4043 .suspend = be_suspend,
4044 .resume = be_resume,
4045 .shutdown = be_shutdown,
4046 .err_handler = &be_eeh_handlers
4049 static int __init be_init_module(void)
4051 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
4052 rx_frag_size != 2048) {
4053 printk(KERN_WARNING DRV_NAME
4054 " : Module param rx_frag_size must be 2048/4096/8192."
4056 rx_frag_size = 2048;
4059 return pci_register_driver(&be_driver);
4061 module_init(be_init_module);
4063 static void __exit be_exit_module(void)
4065 pci_unregister_driver(&be_driver);
4067 module_exit(be_exit_module);