1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2022 Davicom Semiconductor,Inc.
4 * Davicom DM9051 SPI Fast Ethernet Linux driver
7 #include <linux/etherdevice.h>
8 #include <linux/ethtool.h>
9 #include <linux/interrupt.h>
10 #include <linux/iopoll.h>
11 #include <linux/irq.h>
12 #include <linux/mii.h>
13 #include <linux/module.h>
14 #include <linux/netdevice.h>
15 #include <linux/phy.h>
16 #include <linux/regmap.h>
17 #include <linux/skbuff.h>
18 #include <linux/spinlock.h>
19 #include <linux/spi/spi.h>
20 #include <linux/types.h>
24 #define DRVNAME_9051 "dm9051"
27 * struct rx_ctl_mach - rx activities record
28 * @status_err_counter: rx status error counter
29 * @large_err_counter: rx get large packet length error counter
30 * @rx_err_counter: receive packet error counter
31 * @tx_err_counter: transmit packet error counter
32 * @fifo_rst_counter: reset operation counter
34 * To keep track for the driver operation statistics
37 u16 status_err_counter;
38 u16 large_err_counter;
45 * struct dm9051_rxctrl - dm9051 driver rx control
46 * @hash_table: Multicast hash-table data
47 * @rcr_all: KS_RXCR1 register setting
49 * The settings needs to control the receive filtering
50 * such as the multicast hash-filter and the receive register settings
52 struct dm9051_rxctrl {
58 * struct dm9051_rxhdr - rx packet data header
59 * @headbyte: lead byte equal to 0x01 notifies a valid packet
60 * @status: status bits for the received packet
61 * @rxlen: packet length
63 * The Rx packed, entered into the FIFO memory, start with these
64 * four bytes which is the Rx header, followed by the ethernet
65 * packet data and ends with an appended 4-byte CRC data.
66 * Both Rx packet and CRC data are for check purpose and finally
67 * are dropped by this driver
76 * struct board_info - maintain the saved data
77 * @spidev: spi device structure
78 * @ndev: net device structure
79 * @mdiobus: mii bus structure
80 * @phydev: phy device structure
81 * @txq: tx queue structure
82 * @regmap_dm: regmap for register read/write
83 * @regmap_dmbulk: extra regmap for bulk read/write
84 * @rxctrl_work: Work queue for updating RX mode and multicast lists
85 * @tx_work: Work queue for tx packets
86 * @pause: ethtool pause parameter structure
87 * @spi_lockm: between threads lock structure
88 * @reg_mutex: regmap access lock structure
89 * @bc: rx control statistics structure
90 * @rxhdr: rx header structure
91 * @rctl: rx control setting structure
92 * @msg_enable: message level value
93 * @imr_all: to store operating imr value for register DM9051_IMR
94 * @lcr_all: to store operating rcr value for register DM9051_LMCR
96 * The saved data variables, keep up to date for retrieval back to use
100 struct spi_device *spidev;
101 struct net_device *ndev;
102 struct mii_bus *mdiobus;
103 struct phy_device *phydev;
104 struct sk_buff_head txq;
105 struct regmap *regmap_dm;
106 struct regmap *regmap_dmbulk;
107 struct work_struct rxctrl_work;
108 struct work_struct tx_work;
109 struct ethtool_pauseparam pause;
110 struct mutex spi_lockm;
111 struct mutex reg_mutex;
112 struct rx_ctl_mach bc;
113 struct dm9051_rxhdr rxhdr;
114 struct dm9051_rxctrl rctl;
119 static int dm9051_set_reg(struct board_info *db, unsigned int reg, unsigned int val)
123 ret = regmap_write(db->regmap_dm, reg, val);
125 netif_err(db, drv, db->ndev, "%s: error %d set reg %02x\n",
130 static int dm9051_update_bits(struct board_info *db, unsigned int reg, unsigned int mask,
135 ret = regmap_update_bits(db->regmap_dm, reg, mask, val);
137 netif_err(db, drv, db->ndev, "%s: error %d update bits reg %02x\n",
142 /* skb buffer exhausted, just discard the received data
144 static int dm9051_dumpblk(struct board_info *db, u8 reg, size_t count)
146 struct net_device *ndev = db->ndev;
151 * both reg and &rb must be noinc,
152 * read once one byte via regmap_read
155 ret = regmap_read(db->regmap_dm, reg, &rb);
157 netif_err(db, drv, ndev, "%s: error %d dumping read reg %02x\n",
166 static int dm9051_set_regs(struct board_info *db, unsigned int reg, const void *val,
171 ret = regmap_bulk_write(db->regmap_dmbulk, reg, val, val_count);
173 netif_err(db, drv, db->ndev, "%s: error %d bulk writing regs %02x\n",
178 static int dm9051_get_regs(struct board_info *db, unsigned int reg, void *val,
183 ret = regmap_bulk_read(db->regmap_dmbulk, reg, val, val_count);
185 netif_err(db, drv, db->ndev, "%s: error %d bulk reading regs %02x\n",
190 static int dm9051_write_mem(struct board_info *db, unsigned int reg, const void *buff,
195 ret = regmap_noinc_write(db->regmap_dm, reg, buff, len);
197 netif_err(db, drv, db->ndev, "%s: error %d noinc writing regs %02x\n",
202 static int dm9051_read_mem(struct board_info *db, unsigned int reg, void *buff,
207 ret = regmap_noinc_read(db->regmap_dm, reg, buff, len);
209 netif_err(db, drv, db->ndev, "%s: error %d noinc reading regs %02x\n",
214 /* waiting tx-end rather than tx-req
217 static int dm9051_nsr_poll(struct board_info *db)
222 ret = regmap_read_poll_timeout(db->regmap_dm, DM9051_NSR, mval,
223 mval & (NSR_TX2END | NSR_TX1END), 1, 20);
224 if (ret == -ETIMEDOUT)
225 netdev_err(db->ndev, "timeout in checking for tx end\n");
229 static int dm9051_epcr_poll(struct board_info *db)
234 ret = regmap_read_poll_timeout(db->regmap_dm, DM9051_EPCR, mval,
235 !(mval & EPCR_ERRE), 100, 10000);
236 if (ret == -ETIMEDOUT)
237 netdev_err(db->ndev, "eeprom/phy in processing get timeout\n");
241 static int dm9051_irq_flag(struct board_info *db)
243 struct spi_device *spi = db->spidev;
244 int irq_type = irq_get_trigger_type(spi->irq);
249 return IRQF_TRIGGER_LOW;
252 static unsigned int dm9051_intcr_value(struct board_info *db)
254 return (dm9051_irq_flag(db) == IRQF_TRIGGER_LOW) ?
255 INTCR_POL_LOW : INTCR_POL_HIGH;
258 static int dm9051_set_fcr(struct board_info *db)
262 if (db->pause.rx_pause)
263 fcr |= FCR_BKPM | FCR_FLCE;
264 if (db->pause.tx_pause)
267 return dm9051_set_reg(db, DM9051_FCR, fcr);
270 static int dm9051_set_recv(struct board_info *db)
274 ret = dm9051_set_regs(db, DM9051_MAR, db->rctl.hash_table, sizeof(db->rctl.hash_table));
278 return dm9051_set_reg(db, DM9051_RCR, db->rctl.rcr_all); /* enable rx */
281 static int dm9051_core_reset(struct board_info *db)
285 db->bc.fifo_rst_counter++;
287 ret = regmap_write(db->regmap_dm, DM9051_NCR, NCR_RST); /* NCR reset */
290 ret = regmap_write(db->regmap_dm, DM9051_MBNDRY, MBNDRY_BYTE); /* MemBound */
293 ret = regmap_write(db->regmap_dm, DM9051_PPCR, PPCR_PAUSE_COUNT); /* Pause Count */
296 ret = regmap_write(db->regmap_dm, DM9051_LMCR, db->lcr_all); /* LEDMode1 */
300 return dm9051_set_reg(db, DM9051_INTCR, dm9051_intcr_value(db));
303 static int dm9051_update_fcr(struct board_info *db)
307 if (db->pause.rx_pause)
308 fcr |= FCR_BKPM | FCR_FLCE;
309 if (db->pause.tx_pause)
312 return dm9051_update_bits(db, DM9051_FCR, FCR_RXTX_BITS, fcr);
315 static int dm9051_disable_interrupt(struct board_info *db)
317 return dm9051_set_reg(db, DM9051_IMR, IMR_PAR); /* disable int */
320 static int dm9051_enable_interrupt(struct board_info *db)
322 return dm9051_set_reg(db, DM9051_IMR, db->imr_all); /* enable int */
325 static int dm9051_stop_mrcmd(struct board_info *db)
327 return dm9051_set_reg(db, DM9051_ISR, ISR_STOP_MRCMD); /* to stop mrcmd */
330 static int dm9051_clear_interrupt(struct board_info *db)
332 return dm9051_update_bits(db, DM9051_ISR, ISR_CLR_INT, ISR_CLR_INT);
335 static int dm9051_eeprom_read(struct board_info *db, int offset, u8 *to)
339 ret = regmap_write(db->regmap_dm, DM9051_EPAR, offset);
343 ret = regmap_write(db->regmap_dm, DM9051_EPCR, EPCR_ERPRR);
347 ret = dm9051_epcr_poll(db);
351 ret = regmap_write(db->regmap_dm, DM9051_EPCR, 0);
355 return regmap_bulk_read(db->regmap_dmbulk, DM9051_EPDRL, to, 2);
358 static int dm9051_eeprom_write(struct board_info *db, int offset, u8 *data)
362 ret = regmap_write(db->regmap_dm, DM9051_EPAR, offset);
366 ret = regmap_bulk_write(db->regmap_dmbulk, DM9051_EPDRL, data, 2);
370 ret = regmap_write(db->regmap_dm, DM9051_EPCR, EPCR_WEP | EPCR_ERPRW);
374 ret = dm9051_epcr_poll(db);
378 return regmap_write(db->regmap_dm, DM9051_EPCR, 0);
381 static int dm9051_phyread(void *context, unsigned int reg, unsigned int *val)
383 struct board_info *db = context;
386 ret = regmap_write(db->regmap_dm, DM9051_EPAR, DM9051_PHY | reg);
390 ret = regmap_write(db->regmap_dm, DM9051_EPCR, EPCR_ERPRR | EPCR_EPOS);
394 ret = dm9051_epcr_poll(db);
398 ret = regmap_write(db->regmap_dm, DM9051_EPCR, 0);
402 /* this is a 4 bytes data, clear to zero since following regmap_bulk_read
403 * only fill lower 2 bytes
406 return regmap_bulk_read(db->regmap_dmbulk, DM9051_EPDRL, val, 2);
409 static int dm9051_phywrite(void *context, unsigned int reg, unsigned int val)
411 struct board_info *db = context;
414 ret = regmap_write(db->regmap_dm, DM9051_EPAR, DM9051_PHY | reg);
418 ret = regmap_bulk_write(db->regmap_dmbulk, DM9051_EPDRL, &val, 2);
422 ret = regmap_write(db->regmap_dm, DM9051_EPCR, EPCR_EPOS | EPCR_ERPRW);
426 ret = dm9051_epcr_poll(db);
430 return regmap_write(db->regmap_dm, DM9051_EPCR, 0);
433 static int dm9051_mdio_read(struct mii_bus *bus, int addr, int regnum)
435 struct board_info *db = bus->priv;
436 unsigned int val = 0xffff;
439 if (addr == DM9051_PHY_ADDR) {
440 ret = dm9051_phyread(db, regnum, &val);
448 static int dm9051_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
450 struct board_info *db = bus->priv;
452 if (addr == DM9051_PHY_ADDR)
453 return dm9051_phywrite(db, regnum, val);
458 static void dm9051_reg_lock_mutex(void *dbcontext)
460 struct board_info *db = dbcontext;
462 mutex_lock(&db->reg_mutex);
465 static void dm9051_reg_unlock_mutex(void *dbcontext)
467 struct board_info *db = dbcontext;
469 mutex_unlock(&db->reg_mutex);
472 static struct regmap_config regconfigdm = {
475 .max_register = 0xff,
477 .cache_type = REGCACHE_NONE,
479 .write_flag_mask = DM_SPI_WR,
480 .val_format_endian = REGMAP_ENDIAN_LITTLE,
481 .lock = dm9051_reg_lock_mutex,
482 .unlock = dm9051_reg_unlock_mutex,
485 static struct regmap_config regconfigdmbulk = {
488 .max_register = 0xff,
490 .cache_type = REGCACHE_NONE,
492 .write_flag_mask = DM_SPI_WR,
493 .val_format_endian = REGMAP_ENDIAN_LITTLE,
494 .lock = dm9051_reg_lock_mutex,
495 .unlock = dm9051_reg_unlock_mutex,
496 .use_single_read = true,
497 .use_single_write = true,
500 static int dm9051_map_init(struct spi_device *spi, struct board_info *db)
502 /* create two regmap instances,
503 * split read/write and bulk_read/bulk_write to individual regmap
504 * to resolve regmap execution confliction problem
506 regconfigdm.lock_arg = db;
507 db->regmap_dm = devm_regmap_init_spi(db->spidev, ®configdm);
508 if (IS_ERR(db->regmap_dm))
509 return PTR_ERR(db->regmap_dm);
511 regconfigdmbulk.lock_arg = db;
512 db->regmap_dmbulk = devm_regmap_init_spi(db->spidev, ®configdmbulk);
513 if (IS_ERR(db->regmap_dmbulk))
514 return PTR_ERR(db->regmap_dmbulk);
519 static int dm9051_map_chipid(struct board_info *db)
521 struct device *dev = &db->spidev->dev;
526 ret = dm9051_get_regs(db, DM9051_VIDL, buff, sizeof(buff));
530 wid = get_unaligned_le16(buff + 2);
531 if (wid != DM9051_ID) {
532 dev_err(dev, "chipid error as %04x !\n", wid);
536 dev_info(dev, "chip %04x found\n", wid);
540 /* Read DM9051_PAR registers which is the mac address loaded from EEPROM while power-on
542 static int dm9051_map_etherdev_par(struct net_device *ndev, struct board_info *db)
547 ret = dm9051_get_regs(db, DM9051_PAR, addr, sizeof(addr));
551 if (!is_valid_ether_addr(addr)) {
552 eth_hw_addr_random(ndev);
554 ret = dm9051_set_regs(db, DM9051_PAR, ndev->dev_addr, sizeof(ndev->dev_addr));
558 dev_dbg(&db->spidev->dev, "Use random MAC address\n");
562 eth_hw_addr_set(ndev, addr);
568 static void dm9051_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
570 strscpy(info->driver, DRVNAME_9051, sizeof(info->driver));
573 static void dm9051_set_msglevel(struct net_device *ndev, u32 value)
575 struct board_info *db = to_dm9051_board(ndev);
577 db->msg_enable = value;
580 static u32 dm9051_get_msglevel(struct net_device *ndev)
582 struct board_info *db = to_dm9051_board(ndev);
584 return db->msg_enable;
587 static int dm9051_get_eeprom_len(struct net_device *dev)
592 static int dm9051_get_eeprom(struct net_device *ndev,
593 struct ethtool_eeprom *ee, u8 *data)
595 struct board_info *db = to_dm9051_board(ndev);
596 int offset = ee->offset;
600 if ((len | offset) & 1)
603 ee->magic = DM_EEPROM_MAGIC;
605 for (i = 0; i < len; i += 2) {
606 ret = dm9051_eeprom_read(db, (offset + i) / 2, data + i);
613 static int dm9051_set_eeprom(struct net_device *ndev,
614 struct ethtool_eeprom *ee, u8 *data)
616 struct board_info *db = to_dm9051_board(ndev);
617 int offset = ee->offset;
621 if ((len | offset) & 1)
624 if (ee->magic != DM_EEPROM_MAGIC)
627 for (i = 0; i < len; i += 2) {
628 ret = dm9051_eeprom_write(db, (offset + i) / 2, data + i);
635 static void dm9051_get_pauseparam(struct net_device *ndev,
636 struct ethtool_pauseparam *pause)
638 struct board_info *db = to_dm9051_board(ndev);
643 static int dm9051_set_pauseparam(struct net_device *ndev,
644 struct ethtool_pauseparam *pause)
646 struct board_info *db = to_dm9051_board(ndev);
650 if (pause->autoneg == AUTONEG_DISABLE)
651 return dm9051_update_fcr(db);
653 phy_set_sym_pause(db->phydev, pause->rx_pause, pause->tx_pause,
655 phy_start_aneg(db->phydev);
659 static const struct ethtool_ops dm9051_ethtool_ops = {
660 .get_drvinfo = dm9051_get_drvinfo,
661 .get_link_ksettings = phy_ethtool_get_link_ksettings,
662 .set_link_ksettings = phy_ethtool_set_link_ksettings,
663 .get_msglevel = dm9051_get_msglevel,
664 .set_msglevel = dm9051_set_msglevel,
665 .nway_reset = phy_ethtool_nway_reset,
666 .get_link = ethtool_op_get_link,
667 .get_eeprom_len = dm9051_get_eeprom_len,
668 .get_eeprom = dm9051_get_eeprom,
669 .set_eeprom = dm9051_set_eeprom,
670 .get_pauseparam = dm9051_get_pauseparam,
671 .set_pauseparam = dm9051_set_pauseparam,
674 static int dm9051_all_start(struct board_info *db)
678 /* GPR power on of the internal phy
680 ret = dm9051_set_reg(db, DM9051_GPR, 0);
684 /* dm9051 chip registers could not be accessed within 1 ms
685 * after GPR power on, delay 1 ms is essential
689 ret = dm9051_core_reset(db);
693 return dm9051_enable_interrupt(db);
696 static int dm9051_all_stop(struct board_info *db)
700 /* GPR power off of the internal phy,
701 * The internal phy still could be accessed after this GPR power off control
703 ret = dm9051_set_reg(db, DM9051_GPR, GPR_PHY_OFF);
707 return dm9051_set_reg(db, DM9051_RCR, RCR_RX_DISABLE);
710 /* fifo reset while rx error found
712 static int dm9051_all_restart(struct board_info *db)
714 struct net_device *ndev = db->ndev;
717 ret = dm9051_core_reset(db);
721 ret = dm9051_enable_interrupt(db);
725 netdev_dbg(ndev, " rxstatus_Er & rxlen_Er %d, RST_c %d\n",
726 db->bc.status_err_counter + db->bc.large_err_counter,
727 db->bc.fifo_rst_counter);
729 ret = dm9051_set_recv(db);
733 return dm9051_set_fcr(db);
736 /* read packets from the fifo memory
738 * > 0 - read packet number, caller can repeat the rx operation
739 * 0 - no error, caller need stop further rx operation
740 * -EBUSY - read data error, caller escape from rx operation
742 static int dm9051_loop_rx(struct board_info *db)
744 struct net_device *ndev = db->ndev;
752 ret = dm9051_read_mem(db, DM_SPI_MRCMDX, &rxbyte, 2);
756 if ((rxbyte & GENMASK(7, 0)) != DM9051_PKT_RDY)
757 break; /* exhaust-empty */
759 ret = dm9051_read_mem(db, DM_SPI_MRCMD, &db->rxhdr, DM_RXHDR_SIZE);
763 ret = dm9051_stop_mrcmd(db);
767 rxlen = le16_to_cpu(db->rxhdr.rxlen);
768 if (db->rxhdr.status & RSR_ERR_BITS || rxlen > DM9051_PKT_MAX) {
769 netdev_dbg(ndev, "rxhdr-byte (%02x)\n",
772 if (db->rxhdr.status & RSR_ERR_BITS) {
773 db->bc.status_err_counter++;
774 netdev_dbg(ndev, "check rxstatus-error (%02x)\n",
777 db->bc.large_err_counter++;
778 netdev_dbg(ndev, "check rxlen large-error (%d > %d)\n",
779 rxlen, DM9051_PKT_MAX);
781 return dm9051_all_restart(db);
784 skb = dev_alloc_skb(rxlen);
786 ret = dm9051_dumpblk(db, DM_SPI_MRCMD, rxlen);
792 rdptr = skb_put(skb, rxlen - 4);
793 ret = dm9051_read_mem(db, DM_SPI_MRCMD, rdptr, rxlen);
795 db->bc.rx_err_counter++;
800 ret = dm9051_stop_mrcmd(db);
804 skb->protocol = eth_type_trans(skb, db->ndev);
805 if (db->ndev->features & NETIF_F_RXCSUM)
806 skb_checksum_none_assert(skb);
808 db->ndev->stats.rx_bytes += rxlen;
809 db->ndev->stats.rx_packets++;
816 /* transmit a packet,
819 * -ETIMEDOUT - timeout error
821 static int dm9051_single_tx(struct board_info *db, u8 *buff, unsigned int len)
825 ret = dm9051_nsr_poll(db);
829 ret = dm9051_write_mem(db, DM_SPI_MWCMD, buff, len);
833 ret = dm9051_set_regs(db, DM9051_TXPLL, &len, 2);
837 return dm9051_set_reg(db, DM9051_TCR, TCR_TXREQ);
840 static int dm9051_loop_tx(struct board_info *db)
842 struct net_device *ndev = db->ndev;
846 while (!skb_queue_empty(&db->txq)) {
850 skb = skb_dequeue(&db->txq);
853 ret = dm9051_single_tx(db, skb->data, skb->len);
857 db->bc.tx_err_counter++;
860 ndev->stats.tx_bytes += len;
861 ndev->stats.tx_packets++;
864 if (netif_queue_stopped(ndev) &&
865 (skb_queue_len(&db->txq) < DM9051_TX_QUE_LO_WATER))
866 netif_wake_queue(ndev);
872 static irqreturn_t dm9051_rx_threaded_irq(int irq, void *pw)
874 struct board_info *db = pw;
875 int result, result_tx;
877 mutex_lock(&db->spi_lockm);
879 result = dm9051_disable_interrupt(db);
883 result = dm9051_clear_interrupt(db);
888 result = dm9051_loop_rx(db); /* threaded irq rx */
891 result_tx = dm9051_loop_tx(db); /* more tx better performance */
894 } while (result > 0);
896 dm9051_enable_interrupt(db);
898 /* To exit and has mutex unlock while rx or tx error
901 mutex_unlock(&db->spi_lockm);
906 static void dm9051_tx_delay(struct work_struct *work)
908 struct board_info *db = container_of(work, struct board_info, tx_work);
911 mutex_lock(&db->spi_lockm);
913 result = dm9051_loop_tx(db);
915 netdev_err(db->ndev, "transmit packet error\n");
917 mutex_unlock(&db->spi_lockm);
920 static void dm9051_rxctl_delay(struct work_struct *work)
922 struct board_info *db = container_of(work, struct board_info, rxctrl_work);
923 struct net_device *ndev = db->ndev;
926 mutex_lock(&db->spi_lockm);
928 result = dm9051_set_regs(db, DM9051_PAR, ndev->dev_addr, sizeof(ndev->dev_addr));
934 /* To has mutex unlock and return from this function if regmap function fail
937 mutex_unlock(&db->spi_lockm);
940 /* Open network device
941 * Called when the network device is marked active, such as a user executing
942 * 'ifconfig up' on the device
944 static int dm9051_open(struct net_device *ndev)
946 struct board_info *db = to_dm9051_board(ndev);
947 struct spi_device *spi = db->spidev;
950 db->imr_all = IMR_PAR | IMR_PRM;
951 db->lcr_all = LMCR_MODE1;
952 db->rctl.rcr_all = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
953 memset(db->rctl.hash_table, 0, sizeof(db->rctl.hash_table));
955 ndev->irq = spi->irq; /* by dts */
956 ret = request_threaded_irq(spi->irq, NULL, dm9051_rx_threaded_irq,
957 dm9051_irq_flag(db) | IRQF_ONESHOT,
960 netdev_err(ndev, "failed to get irq\n");
964 phy_support_sym_pause(db->phydev);
965 phy_start(db->phydev);
967 /* flow control parameters init */
968 db->pause.rx_pause = true;
969 db->pause.tx_pause = true;
970 db->pause.autoneg = AUTONEG_DISABLE;
972 if (db->phydev->autoneg)
973 db->pause.autoneg = AUTONEG_ENABLE;
975 ret = dm9051_all_start(db);
977 phy_stop(db->phydev);
978 free_irq(spi->irq, db);
982 netif_wake_queue(ndev);
987 /* Close network device
988 * Called to close down a network device which has been active. Cancel any
989 * work, shutdown the RX and TX process and then place the chip into a low
990 * power state while it is not being used
992 static int dm9051_stop(struct net_device *ndev)
994 struct board_info *db = to_dm9051_board(ndev);
997 ret = dm9051_all_stop(db);
1001 flush_work(&db->tx_work);
1002 flush_work(&db->rxctrl_work);
1004 phy_stop(db->phydev);
1006 free_irq(db->spidev->irq, db);
1008 netif_stop_queue(ndev);
1010 skb_queue_purge(&db->txq);
1015 /* event: play a schedule starter in condition
1017 static netdev_tx_t dm9051_start_xmit(struct sk_buff *skb, struct net_device *ndev)
1019 struct board_info *db = to_dm9051_board(ndev);
1021 skb_queue_tail(&db->txq, skb);
1022 if (skb_queue_len(&db->txq) > DM9051_TX_QUE_HI_WATER)
1023 netif_stop_queue(ndev); /* enforce limit queue size */
1025 schedule_work(&db->tx_work);
1027 return NETDEV_TX_OK;
1030 /* event: play with a schedule starter
1032 static void dm9051_set_rx_mode(struct net_device *ndev)
1034 struct board_info *db = to_dm9051_board(ndev);
1035 struct dm9051_rxctrl rxctrl;
1036 struct netdev_hw_addr *ha;
1037 u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
1040 memset(&rxctrl, 0, sizeof(rxctrl));
1043 if (ndev->flags & IFF_PROMISC) {
1045 netdev_dbg(ndev, "set_multicast rcr |= RCR_PRMSC, rcr= %02x\n", rcr);
1048 if (ndev->flags & IFF_ALLMULTI) {
1050 netdev_dbg(ndev, "set_multicast rcr |= RCR_ALLMULTI, rcr= %02x\n", rcr);
1053 rxctrl.rcr_all = rcr;
1055 /* broadcast address */
1056 rxctrl.hash_table[0] = 0;
1057 rxctrl.hash_table[1] = 0;
1058 rxctrl.hash_table[2] = 0;
1059 rxctrl.hash_table[3] = 0x8000;
1061 /* the multicast address in Hash Table : 64 bits */
1062 netdev_for_each_mc_addr(ha, ndev) {
1063 hash_val = ether_crc_le(ETH_ALEN, ha->addr) & GENMASK(5, 0);
1064 rxctrl.hash_table[hash_val / 16] |= BIT(0) << (hash_val % 16);
1067 /* schedule work to do the actual set of the data if needed */
1069 if (memcmp(&db->rctl, &rxctrl, sizeof(rxctrl))) {
1070 memcpy(&db->rctl, &rxctrl, sizeof(rxctrl));
1071 schedule_work(&db->rxctrl_work);
1075 /* event: write into the mac registers and eeprom directly
1077 static int dm9051_set_mac_address(struct net_device *ndev, void *p)
1079 struct board_info *db = to_dm9051_board(ndev);
1082 ret = eth_prepare_mac_addr_change(ndev, p);
1086 eth_commit_mac_addr_change(ndev, p);
1087 return dm9051_set_regs(db, DM9051_PAR, ndev->dev_addr, sizeof(ndev->dev_addr));
1090 static const struct net_device_ops dm9051_netdev_ops = {
1091 .ndo_open = dm9051_open,
1092 .ndo_stop = dm9051_stop,
1093 .ndo_start_xmit = dm9051_start_xmit,
1094 .ndo_set_rx_mode = dm9051_set_rx_mode,
1095 .ndo_validate_addr = eth_validate_addr,
1096 .ndo_set_mac_address = dm9051_set_mac_address,
1099 static void dm9051_operation_clear(struct board_info *db)
1101 db->bc.status_err_counter = 0;
1102 db->bc.large_err_counter = 0;
1103 db->bc.rx_err_counter = 0;
1104 db->bc.tx_err_counter = 0;
1105 db->bc.fifo_rst_counter = 0;
1108 static int dm9051_mdio_register(struct board_info *db)
1110 struct spi_device *spi = db->spidev;
1113 db->mdiobus = devm_mdiobus_alloc(&spi->dev);
1117 db->mdiobus->priv = db;
1118 db->mdiobus->read = dm9051_mdio_read;
1119 db->mdiobus->write = dm9051_mdio_write;
1120 db->mdiobus->name = "dm9051-mdiobus";
1121 db->mdiobus->phy_mask = (u32)~BIT(1);
1122 db->mdiobus->parent = &spi->dev;
1123 snprintf(db->mdiobus->id, MII_BUS_ID_SIZE,
1124 "dm9051-%s.%u", dev_name(&spi->dev), spi->chip_select);
1126 ret = devm_mdiobus_register(&spi->dev, db->mdiobus);
1128 dev_err(&spi->dev, "Could not register MDIO bus\n");
1133 static void dm9051_handle_link_change(struct net_device *ndev)
1135 struct board_info *db = to_dm9051_board(ndev);
1137 phy_print_status(db->phydev);
1139 /* only write pause settings to mac. since mac and phy are integrated
1140 * together, such as link state, speed and duplex are sync already
1142 if (db->phydev->link) {
1143 if (db->phydev->pause) {
1144 db->pause.rx_pause = true;
1145 db->pause.tx_pause = true;
1147 dm9051_update_fcr(db);
1151 /* phy connect as poll mode
1153 static int dm9051_phy_connect(struct board_info *db)
1155 char phy_id[MII_BUS_ID_SIZE + 3];
1157 snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
1158 db->mdiobus->id, DM9051_PHY_ADDR);
1160 db->phydev = phy_connect(db->ndev, phy_id, dm9051_handle_link_change,
1161 PHY_INTERFACE_MODE_MII);
1162 if (IS_ERR(db->phydev))
1163 return PTR_ERR_OR_ZERO(db->phydev);
1167 static int dm9051_probe(struct spi_device *spi)
1169 struct device *dev = &spi->dev;
1170 struct net_device *ndev;
1171 struct board_info *db;
1174 ndev = devm_alloc_etherdev(dev, sizeof(struct board_info));
1178 SET_NETDEV_DEV(ndev, dev);
1179 dev_set_drvdata(dev, ndev);
1181 db = netdev_priv(ndev);
1187 ndev->netdev_ops = &dm9051_netdev_ops;
1188 ndev->ethtool_ops = &dm9051_ethtool_ops;
1190 mutex_init(&db->spi_lockm);
1191 mutex_init(&db->reg_mutex);
1193 INIT_WORK(&db->rxctrl_work, dm9051_rxctl_delay);
1194 INIT_WORK(&db->tx_work, dm9051_tx_delay);
1196 ret = dm9051_map_init(spi, db);
1200 ret = dm9051_map_chipid(db);
1204 ret = dm9051_map_etherdev_par(ndev, db);
1208 ret = dm9051_mdio_register(db);
1212 ret = dm9051_phy_connect(db);
1216 dm9051_operation_clear(db);
1217 skb_queue_head_init(&db->txq);
1219 ret = devm_register_netdev(dev, ndev);
1221 phy_disconnect(db->phydev);
1222 return dev_err_probe(dev, ret, "device register failed");
1228 static void dm9051_drv_remove(struct spi_device *spi)
1230 struct device *dev = &spi->dev;
1231 struct net_device *ndev = dev_get_drvdata(dev);
1232 struct board_info *db = to_dm9051_board(ndev);
1234 phy_disconnect(db->phydev);
1237 static const struct of_device_id dm9051_match_table[] = {
1238 { .compatible = "davicom,dm9051" },
1242 static const struct spi_device_id dm9051_id_table[] = {
1247 static struct spi_driver dm9051_driver = {
1249 .name = DRVNAME_9051,
1250 .of_match_table = dm9051_match_table,
1252 .probe = dm9051_probe,
1253 .remove = dm9051_drv_remove,
1254 .id_table = dm9051_id_table,
1256 module_spi_driver(dm9051_driver);
1258 MODULE_AUTHOR("Joseph CHANG <joseph_chang@davicom.com.tw>");
1259 MODULE_DESCRIPTION("Davicom DM9051 network SPI driver");
1260 MODULE_LICENSE("GPL");