bnxt_en: Check for zero dir entries in NVRAM.
[platform/kernel/linux-starfive.git] / drivers / net / ethernet / broadcom / bnxt / bnxt_ethtool.c
1 /* Broadcom NetXtreme-C/E network driver.
2  *
3  * Copyright (c) 2014-2016 Broadcom Corporation
4  * Copyright (c) 2016-2017 Broadcom Limited
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation.
9  */
10
11 #include <linux/ctype.h>
12 #include <linux/stringify.h>
13 #include <linux/ethtool.h>
14 #include <linux/interrupt.h>
15 #include <linux/pci.h>
16 #include <linux/etherdevice.h>
17 #include <linux/crc32.h>
18 #include <linux/firmware.h>
19 #include <linux/utsname.h>
20 #include <linux/time.h>
21 #include "bnxt_hsi.h"
22 #include "bnxt.h"
23 #include "bnxt_xdp.h"
24 #include "bnxt_ethtool.h"
25 #include "bnxt_nvm_defs.h"      /* NVRAM content constant and structure defs */
26 #include "bnxt_fw_hdr.h"        /* Firmware hdr constant and structure defs */
27 #include "bnxt_coredump.h"
28 #define FLASH_NVRAM_TIMEOUT     ((HWRM_CMD_TIMEOUT) * 100)
29 #define FLASH_PACKAGE_TIMEOUT   ((HWRM_CMD_TIMEOUT) * 200)
30 #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
31
32 static u32 bnxt_get_msglevel(struct net_device *dev)
33 {
34         struct bnxt *bp = netdev_priv(dev);
35
36         return bp->msg_enable;
37 }
38
39 static void bnxt_set_msglevel(struct net_device *dev, u32 value)
40 {
41         struct bnxt *bp = netdev_priv(dev);
42
43         bp->msg_enable = value;
44 }
45
46 static int bnxt_get_coalesce(struct net_device *dev,
47                              struct ethtool_coalesce *coal)
48 {
49         struct bnxt *bp = netdev_priv(dev);
50         struct bnxt_coal *hw_coal;
51         u16 mult;
52
53         memset(coal, 0, sizeof(*coal));
54
55         coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM;
56
57         hw_coal = &bp->rx_coal;
58         mult = hw_coal->bufs_per_record;
59         coal->rx_coalesce_usecs = hw_coal->coal_ticks;
60         coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult;
61         coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
62         coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
63
64         hw_coal = &bp->tx_coal;
65         mult = hw_coal->bufs_per_record;
66         coal->tx_coalesce_usecs = hw_coal->coal_ticks;
67         coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult;
68         coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
69         coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
70
71         coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
72
73         return 0;
74 }
75
76 static int bnxt_set_coalesce(struct net_device *dev,
77                              struct ethtool_coalesce *coal)
78 {
79         struct bnxt *bp = netdev_priv(dev);
80         bool update_stats = false;
81         struct bnxt_coal *hw_coal;
82         int rc = 0;
83         u16 mult;
84
85         if (coal->use_adaptive_rx_coalesce) {
86                 bp->flags |= BNXT_FLAG_DIM;
87         } else {
88                 if (bp->flags & BNXT_FLAG_DIM) {
89                         bp->flags &= ~(BNXT_FLAG_DIM);
90                         goto reset_coalesce;
91                 }
92         }
93
94         hw_coal = &bp->rx_coal;
95         mult = hw_coal->bufs_per_record;
96         hw_coal->coal_ticks = coal->rx_coalesce_usecs;
97         hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult;
98         hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq;
99         hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult;
100
101         hw_coal = &bp->tx_coal;
102         mult = hw_coal->bufs_per_record;
103         hw_coal->coal_ticks = coal->tx_coalesce_usecs;
104         hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult;
105         hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq;
106         hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult;
107
108         if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
109                 u32 stats_ticks = coal->stats_block_coalesce_usecs;
110
111                 /* Allow 0, which means disable. */
112                 if (stats_ticks)
113                         stats_ticks = clamp_t(u32, stats_ticks,
114                                               BNXT_MIN_STATS_COAL_TICKS,
115                                               BNXT_MAX_STATS_COAL_TICKS);
116                 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
117                 bp->stats_coal_ticks = stats_ticks;
118                 if (bp->stats_coal_ticks)
119                         bp->current_interval =
120                                 bp->stats_coal_ticks * HZ / 1000000;
121                 else
122                         bp->current_interval = BNXT_TIMER_INTERVAL;
123                 update_stats = true;
124         }
125
126 reset_coalesce:
127         if (netif_running(dev)) {
128                 if (update_stats) {
129                         rc = bnxt_close_nic(bp, true, false);
130                         if (!rc)
131                                 rc = bnxt_open_nic(bp, true, false);
132                 } else {
133                         rc = bnxt_hwrm_set_coal(bp);
134                 }
135         }
136
137         return rc;
138 }
139
140 static const char * const bnxt_ring_rx_stats_str[] = {
141         "rx_ucast_packets",
142         "rx_mcast_packets",
143         "rx_bcast_packets",
144         "rx_discards",
145         "rx_errors",
146         "rx_ucast_bytes",
147         "rx_mcast_bytes",
148         "rx_bcast_bytes",
149 };
150
151 static const char * const bnxt_ring_tx_stats_str[] = {
152         "tx_ucast_packets",
153         "tx_mcast_packets",
154         "tx_bcast_packets",
155         "tx_errors",
156         "tx_discards",
157         "tx_ucast_bytes",
158         "tx_mcast_bytes",
159         "tx_bcast_bytes",
160 };
161
162 static const char * const bnxt_ring_tpa_stats_str[] = {
163         "tpa_packets",
164         "tpa_bytes",
165         "tpa_events",
166         "tpa_aborts",
167 };
168
169 static const char * const bnxt_ring_tpa2_stats_str[] = {
170         "rx_tpa_eligible_pkt",
171         "rx_tpa_eligible_bytes",
172         "rx_tpa_pkt",
173         "rx_tpa_bytes",
174         "rx_tpa_errors",
175 };
176
177 static const char * const bnxt_rx_sw_stats_str[] = {
178         "rx_l4_csum_errors",
179         "rx_buf_errors",
180 };
181
182 static const char * const bnxt_cmn_sw_stats_str[] = {
183         "missed_irqs",
184 };
185
186 #define BNXT_RX_STATS_ENTRY(counter)    \
187         { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
188
189 #define BNXT_TX_STATS_ENTRY(counter)    \
190         { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
191
192 #define BNXT_RX_STATS_EXT_ENTRY(counter)        \
193         { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) }
194
195 #define BNXT_TX_STATS_EXT_ENTRY(counter)        \
196         { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) }
197
198 #define BNXT_RX_STATS_EXT_PFC_ENTRY(n)                          \
199         BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us),   \
200         BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions)
201
202 #define BNXT_TX_STATS_EXT_PFC_ENTRY(n)                          \
203         BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us),   \
204         BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions)
205
206 #define BNXT_RX_STATS_EXT_PFC_ENTRIES                           \
207         BNXT_RX_STATS_EXT_PFC_ENTRY(0),                         \
208         BNXT_RX_STATS_EXT_PFC_ENTRY(1),                         \
209         BNXT_RX_STATS_EXT_PFC_ENTRY(2),                         \
210         BNXT_RX_STATS_EXT_PFC_ENTRY(3),                         \
211         BNXT_RX_STATS_EXT_PFC_ENTRY(4),                         \
212         BNXT_RX_STATS_EXT_PFC_ENTRY(5),                         \
213         BNXT_RX_STATS_EXT_PFC_ENTRY(6),                         \
214         BNXT_RX_STATS_EXT_PFC_ENTRY(7)
215
216 #define BNXT_TX_STATS_EXT_PFC_ENTRIES                           \
217         BNXT_TX_STATS_EXT_PFC_ENTRY(0),                         \
218         BNXT_TX_STATS_EXT_PFC_ENTRY(1),                         \
219         BNXT_TX_STATS_EXT_PFC_ENTRY(2),                         \
220         BNXT_TX_STATS_EXT_PFC_ENTRY(3),                         \
221         BNXT_TX_STATS_EXT_PFC_ENTRY(4),                         \
222         BNXT_TX_STATS_EXT_PFC_ENTRY(5),                         \
223         BNXT_TX_STATS_EXT_PFC_ENTRY(6),                         \
224         BNXT_TX_STATS_EXT_PFC_ENTRY(7)
225
226 #define BNXT_RX_STATS_EXT_COS_ENTRY(n)                          \
227         BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n),               \
228         BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n)
229
230 #define BNXT_TX_STATS_EXT_COS_ENTRY(n)                          \
231         BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n),               \
232         BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n)
233
234 #define BNXT_RX_STATS_EXT_COS_ENTRIES                           \
235         BNXT_RX_STATS_EXT_COS_ENTRY(0),                         \
236         BNXT_RX_STATS_EXT_COS_ENTRY(1),                         \
237         BNXT_RX_STATS_EXT_COS_ENTRY(2),                         \
238         BNXT_RX_STATS_EXT_COS_ENTRY(3),                         \
239         BNXT_RX_STATS_EXT_COS_ENTRY(4),                         \
240         BNXT_RX_STATS_EXT_COS_ENTRY(5),                         \
241         BNXT_RX_STATS_EXT_COS_ENTRY(6),                         \
242         BNXT_RX_STATS_EXT_COS_ENTRY(7)                          \
243
244 #define BNXT_TX_STATS_EXT_COS_ENTRIES                           \
245         BNXT_TX_STATS_EXT_COS_ENTRY(0),                         \
246         BNXT_TX_STATS_EXT_COS_ENTRY(1),                         \
247         BNXT_TX_STATS_EXT_COS_ENTRY(2),                         \
248         BNXT_TX_STATS_EXT_COS_ENTRY(3),                         \
249         BNXT_TX_STATS_EXT_COS_ENTRY(4),                         \
250         BNXT_TX_STATS_EXT_COS_ENTRY(5),                         \
251         BNXT_TX_STATS_EXT_COS_ENTRY(6),                         \
252         BNXT_TX_STATS_EXT_COS_ENTRY(7)                          \
253
254 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(n)                  \
255         BNXT_RX_STATS_EXT_ENTRY(rx_discard_bytes_cos##n),       \
256         BNXT_RX_STATS_EXT_ENTRY(rx_discard_packets_cos##n)
257
258 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES                           \
259         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(0),                         \
260         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(1),                         \
261         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(2),                         \
262         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(3),                         \
263         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(4),                         \
264         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(5),                         \
265         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(6),                         \
266         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(7)
267
268 #define BNXT_RX_STATS_PRI_ENTRY(counter, n)             \
269         { BNXT_RX_STATS_EXT_OFFSET(counter##_cos0),     \
270           __stringify(counter##_pri##n) }
271
272 #define BNXT_TX_STATS_PRI_ENTRY(counter, n)             \
273         { BNXT_TX_STATS_EXT_OFFSET(counter##_cos0),     \
274           __stringify(counter##_pri##n) }
275
276 #define BNXT_RX_STATS_PRI_ENTRIES(counter)              \
277         BNXT_RX_STATS_PRI_ENTRY(counter, 0),            \
278         BNXT_RX_STATS_PRI_ENTRY(counter, 1),            \
279         BNXT_RX_STATS_PRI_ENTRY(counter, 2),            \
280         BNXT_RX_STATS_PRI_ENTRY(counter, 3),            \
281         BNXT_RX_STATS_PRI_ENTRY(counter, 4),            \
282         BNXT_RX_STATS_PRI_ENTRY(counter, 5),            \
283         BNXT_RX_STATS_PRI_ENTRY(counter, 6),            \
284         BNXT_RX_STATS_PRI_ENTRY(counter, 7)
285
286 #define BNXT_TX_STATS_PRI_ENTRIES(counter)              \
287         BNXT_TX_STATS_PRI_ENTRY(counter, 0),            \
288         BNXT_TX_STATS_PRI_ENTRY(counter, 1),            \
289         BNXT_TX_STATS_PRI_ENTRY(counter, 2),            \
290         BNXT_TX_STATS_PRI_ENTRY(counter, 3),            \
291         BNXT_TX_STATS_PRI_ENTRY(counter, 4),            \
292         BNXT_TX_STATS_PRI_ENTRY(counter, 5),            \
293         BNXT_TX_STATS_PRI_ENTRY(counter, 6),            \
294         BNXT_TX_STATS_PRI_ENTRY(counter, 7)
295
296 enum {
297         RX_TOTAL_DISCARDS,
298         TX_TOTAL_DISCARDS,
299 };
300
301 static struct {
302         u64                     counter;
303         char                    string[ETH_GSTRING_LEN];
304 } bnxt_sw_func_stats[] = {
305         {0, "rx_total_discard_pkts"},
306         {0, "tx_total_discard_pkts"},
307 };
308
309 #define NUM_RING_RX_SW_STATS            ARRAY_SIZE(bnxt_rx_sw_stats_str)
310 #define NUM_RING_CMN_SW_STATS           ARRAY_SIZE(bnxt_cmn_sw_stats_str)
311 #define NUM_RING_RX_HW_STATS            ARRAY_SIZE(bnxt_ring_rx_stats_str)
312 #define NUM_RING_TX_HW_STATS            ARRAY_SIZE(bnxt_ring_tx_stats_str)
313
314 static const struct {
315         long offset;
316         char string[ETH_GSTRING_LEN];
317 } bnxt_port_stats_arr[] = {
318         BNXT_RX_STATS_ENTRY(rx_64b_frames),
319         BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
320         BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
321         BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
322         BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
323         BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames),
324         BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
325         BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
326         BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
327         BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
328         BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
329         BNXT_RX_STATS_ENTRY(rx_total_frames),
330         BNXT_RX_STATS_ENTRY(rx_ucast_frames),
331         BNXT_RX_STATS_ENTRY(rx_mcast_frames),
332         BNXT_RX_STATS_ENTRY(rx_bcast_frames),
333         BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
334         BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
335         BNXT_RX_STATS_ENTRY(rx_pause_frames),
336         BNXT_RX_STATS_ENTRY(rx_pfc_frames),
337         BNXT_RX_STATS_ENTRY(rx_align_err_frames),
338         BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
339         BNXT_RX_STATS_ENTRY(rx_jbr_frames),
340         BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
341         BNXT_RX_STATS_ENTRY(rx_tagged_frames),
342         BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
343         BNXT_RX_STATS_ENTRY(rx_good_frames),
344         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
345         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
346         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
347         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
348         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
349         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
350         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
351         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
352         BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
353         BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
354         BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
355         BNXT_RX_STATS_ENTRY(rx_bytes),
356         BNXT_RX_STATS_ENTRY(rx_runt_bytes),
357         BNXT_RX_STATS_ENTRY(rx_runt_frames),
358         BNXT_RX_STATS_ENTRY(rx_stat_discard),
359         BNXT_RX_STATS_ENTRY(rx_stat_err),
360
361         BNXT_TX_STATS_ENTRY(tx_64b_frames),
362         BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
363         BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
364         BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
365         BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
366         BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames),
367         BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
368         BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames),
369         BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
370         BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
371         BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
372         BNXT_TX_STATS_ENTRY(tx_good_frames),
373         BNXT_TX_STATS_ENTRY(tx_total_frames),
374         BNXT_TX_STATS_ENTRY(tx_ucast_frames),
375         BNXT_TX_STATS_ENTRY(tx_mcast_frames),
376         BNXT_TX_STATS_ENTRY(tx_bcast_frames),
377         BNXT_TX_STATS_ENTRY(tx_pause_frames),
378         BNXT_TX_STATS_ENTRY(tx_pfc_frames),
379         BNXT_TX_STATS_ENTRY(tx_jabber_frames),
380         BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
381         BNXT_TX_STATS_ENTRY(tx_err),
382         BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
383         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
384         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
385         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
386         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
387         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
388         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
389         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
390         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
391         BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
392         BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
393         BNXT_TX_STATS_ENTRY(tx_total_collisions),
394         BNXT_TX_STATS_ENTRY(tx_bytes),
395         BNXT_TX_STATS_ENTRY(tx_xthol_frames),
396         BNXT_TX_STATS_ENTRY(tx_stat_discard),
397         BNXT_TX_STATS_ENTRY(tx_stat_error),
398 };
399
400 static const struct {
401         long offset;
402         char string[ETH_GSTRING_LEN];
403 } bnxt_port_stats_ext_arr[] = {
404         BNXT_RX_STATS_EXT_ENTRY(link_down_events),
405         BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events),
406         BNXT_RX_STATS_EXT_ENTRY(resume_pause_events),
407         BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events),
408         BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events),
409         BNXT_RX_STATS_EXT_COS_ENTRIES,
410         BNXT_RX_STATS_EXT_PFC_ENTRIES,
411         BNXT_RX_STATS_EXT_ENTRY(rx_bits),
412         BNXT_RX_STATS_EXT_ENTRY(rx_buffer_passed_threshold),
413         BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err),
414         BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits),
415         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES,
416 };
417
418 static const struct {
419         long offset;
420         char string[ETH_GSTRING_LEN];
421 } bnxt_tx_port_stats_ext_arr[] = {
422         BNXT_TX_STATS_EXT_COS_ENTRIES,
423         BNXT_TX_STATS_EXT_PFC_ENTRIES,
424 };
425
426 static const struct {
427         long base_off;
428         char string[ETH_GSTRING_LEN];
429 } bnxt_rx_bytes_pri_arr[] = {
430         BNXT_RX_STATS_PRI_ENTRIES(rx_bytes),
431 };
432
433 static const struct {
434         long base_off;
435         char string[ETH_GSTRING_LEN];
436 } bnxt_rx_pkts_pri_arr[] = {
437         BNXT_RX_STATS_PRI_ENTRIES(rx_packets),
438 };
439
440 static const struct {
441         long base_off;
442         char string[ETH_GSTRING_LEN];
443 } bnxt_tx_bytes_pri_arr[] = {
444         BNXT_TX_STATS_PRI_ENTRIES(tx_bytes),
445 };
446
447 static const struct {
448         long base_off;
449         char string[ETH_GSTRING_LEN];
450 } bnxt_tx_pkts_pri_arr[] = {
451         BNXT_TX_STATS_PRI_ENTRIES(tx_packets),
452 };
453
454 #define BNXT_NUM_SW_FUNC_STATS  ARRAY_SIZE(bnxt_sw_func_stats)
455 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
456 #define BNXT_NUM_STATS_PRI                      \
457         (ARRAY_SIZE(bnxt_rx_bytes_pri_arr) +    \
458          ARRAY_SIZE(bnxt_rx_pkts_pri_arr) +     \
459          ARRAY_SIZE(bnxt_tx_bytes_pri_arr) +    \
460          ARRAY_SIZE(bnxt_tx_pkts_pri_arr))
461
462 static int bnxt_get_num_tpa_ring_stats(struct bnxt *bp)
463 {
464         if (BNXT_SUPPORTS_TPA(bp)) {
465                 if (bp->max_tpa_v2)
466                         return ARRAY_SIZE(bnxt_ring_tpa2_stats_str);
467                 return ARRAY_SIZE(bnxt_ring_tpa_stats_str);
468         }
469         return 0;
470 }
471
472 static int bnxt_get_num_ring_stats(struct bnxt *bp)
473 {
474         int rx, tx, cmn;
475         bool sh = false;
476
477         if (bp->flags & BNXT_FLAG_SHARED_RINGS)
478                 sh = true;
479
480         rx = NUM_RING_RX_HW_STATS + NUM_RING_RX_SW_STATS +
481              bnxt_get_num_tpa_ring_stats(bp);
482         tx = NUM_RING_TX_HW_STATS;
483         cmn = NUM_RING_CMN_SW_STATS;
484         if (sh)
485                 return (rx + tx + cmn) * bp->cp_nr_rings;
486         else
487                 return rx * bp->rx_nr_rings + tx * bp->tx_nr_rings +
488                        cmn * bp->cp_nr_rings;
489 }
490
491 static int bnxt_get_num_stats(struct bnxt *bp)
492 {
493         int num_stats = bnxt_get_num_ring_stats(bp);
494
495         num_stats += BNXT_NUM_SW_FUNC_STATS;
496
497         if (bp->flags & BNXT_FLAG_PORT_STATS)
498                 num_stats += BNXT_NUM_PORT_STATS;
499
500         if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
501                 num_stats += bp->fw_rx_stats_ext_size +
502                              bp->fw_tx_stats_ext_size;
503                 if (bp->pri2cos_valid)
504                         num_stats += BNXT_NUM_STATS_PRI;
505         }
506
507         return num_stats;
508 }
509
510 static int bnxt_get_sset_count(struct net_device *dev, int sset)
511 {
512         struct bnxt *bp = netdev_priv(dev);
513
514         switch (sset) {
515         case ETH_SS_STATS:
516                 return bnxt_get_num_stats(bp);
517         case ETH_SS_TEST:
518                 if (!bp->num_tests)
519                         return -EOPNOTSUPP;
520                 return bp->num_tests;
521         default:
522                 return -EOPNOTSUPP;
523         }
524 }
525
526 static bool is_rx_ring(struct bnxt *bp, int ring_num)
527 {
528         return ring_num < bp->rx_nr_rings;
529 }
530
531 static bool is_tx_ring(struct bnxt *bp, int ring_num)
532 {
533         int tx_base = 0;
534
535         if (!(bp->flags & BNXT_FLAG_SHARED_RINGS))
536                 tx_base = bp->rx_nr_rings;
537
538         if (ring_num >= tx_base && ring_num < (tx_base + bp->tx_nr_rings))
539                 return true;
540         return false;
541 }
542
543 static void bnxt_get_ethtool_stats(struct net_device *dev,
544                                    struct ethtool_stats *stats, u64 *buf)
545 {
546         u32 i, j = 0;
547         struct bnxt *bp = netdev_priv(dev);
548         u32 tpa_stats;
549
550         if (!bp->bnapi) {
551                 j += bnxt_get_num_ring_stats(bp) + BNXT_NUM_SW_FUNC_STATS;
552                 goto skip_ring_stats;
553         }
554
555         for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++)
556                 bnxt_sw_func_stats[i].counter = 0;
557
558         tpa_stats = bnxt_get_num_tpa_ring_stats(bp);
559         for (i = 0; i < bp->cp_nr_rings; i++) {
560                 struct bnxt_napi *bnapi = bp->bnapi[i];
561                 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
562                 u64 *sw_stats = cpr->stats.sw_stats;
563                 u64 *sw;
564                 int k;
565
566                 if (is_rx_ring(bp, i)) {
567                         for (k = 0; k < NUM_RING_RX_HW_STATS; j++, k++)
568                                 buf[j] = sw_stats[k];
569                 }
570                 if (is_tx_ring(bp, i)) {
571                         k = NUM_RING_RX_HW_STATS;
572                         for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS;
573                                j++, k++)
574                                 buf[j] = sw_stats[k];
575                 }
576                 if (!tpa_stats || !is_rx_ring(bp, i))
577                         goto skip_tpa_ring_stats;
578
579                 k = NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS;
580                 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS +
581                            tpa_stats; j++, k++)
582                         buf[j] = sw_stats[k];
583
584 skip_tpa_ring_stats:
585                 sw = (u64 *)&cpr->sw_stats.rx;
586                 if (is_rx_ring(bp, i)) {
587                         for (k = 0; k < NUM_RING_RX_SW_STATS; j++, k++)
588                                 buf[j] = sw[k];
589                 }
590
591                 sw = (u64 *)&cpr->sw_stats.cmn;
592                 for (k = 0; k < NUM_RING_CMN_SW_STATS; j++, k++)
593                         buf[j] = sw[k];
594
595                 bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter +=
596                         BNXT_GET_RING_STATS64(sw_stats, rx_discard_pkts);
597                 bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter +=
598                         BNXT_GET_RING_STATS64(sw_stats, tx_discard_pkts);
599         }
600
601         for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++)
602                 buf[j] = bnxt_sw_func_stats[i].counter;
603
604 skip_ring_stats:
605         if (bp->flags & BNXT_FLAG_PORT_STATS) {
606                 u64 *port_stats = bp->port_stats.sw_stats;
607
608                 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++)
609                         buf[j] = *(port_stats + bnxt_port_stats_arr[i].offset);
610         }
611         if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
612                 u64 *rx_port_stats_ext = bp->rx_port_stats_ext.sw_stats;
613                 u64 *tx_port_stats_ext = bp->tx_port_stats_ext.sw_stats;
614
615                 for (i = 0; i < bp->fw_rx_stats_ext_size; i++, j++) {
616                         buf[j] = *(rx_port_stats_ext +
617                                    bnxt_port_stats_ext_arr[i].offset);
618                 }
619                 for (i = 0; i < bp->fw_tx_stats_ext_size; i++, j++) {
620                         buf[j] = *(tx_port_stats_ext +
621                                    bnxt_tx_port_stats_ext_arr[i].offset);
622                 }
623                 if (bp->pri2cos_valid) {
624                         for (i = 0; i < 8; i++, j++) {
625                                 long n = bnxt_rx_bytes_pri_arr[i].base_off +
626                                          bp->pri2cos_idx[i];
627
628                                 buf[j] = *(rx_port_stats_ext + n);
629                         }
630                         for (i = 0; i < 8; i++, j++) {
631                                 long n = bnxt_rx_pkts_pri_arr[i].base_off +
632                                          bp->pri2cos_idx[i];
633
634                                 buf[j] = *(rx_port_stats_ext + n);
635                         }
636                         for (i = 0; i < 8; i++, j++) {
637                                 long n = bnxt_tx_bytes_pri_arr[i].base_off +
638                                          bp->pri2cos_idx[i];
639
640                                 buf[j] = *(tx_port_stats_ext + n);
641                         }
642                         for (i = 0; i < 8; i++, j++) {
643                                 long n = bnxt_tx_pkts_pri_arr[i].base_off +
644                                          bp->pri2cos_idx[i];
645
646                                 buf[j] = *(tx_port_stats_ext + n);
647                         }
648                 }
649         }
650 }
651
652 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
653 {
654         struct bnxt *bp = netdev_priv(dev);
655         static const char * const *str;
656         u32 i, j, num_str;
657
658         switch (stringset) {
659         case ETH_SS_STATS:
660                 for (i = 0; i < bp->cp_nr_rings; i++) {
661                         if (is_rx_ring(bp, i)) {
662                                 num_str = NUM_RING_RX_HW_STATS;
663                                 for (j = 0; j < num_str; j++) {
664                                         sprintf(buf, "[%d]: %s", i,
665                                                 bnxt_ring_rx_stats_str[j]);
666                                         buf += ETH_GSTRING_LEN;
667                                 }
668                         }
669                         if (is_tx_ring(bp, i)) {
670                                 num_str = NUM_RING_TX_HW_STATS;
671                                 for (j = 0; j < num_str; j++) {
672                                         sprintf(buf, "[%d]: %s", i,
673                                                 bnxt_ring_tx_stats_str[j]);
674                                         buf += ETH_GSTRING_LEN;
675                                 }
676                         }
677                         num_str = bnxt_get_num_tpa_ring_stats(bp);
678                         if (!num_str || !is_rx_ring(bp, i))
679                                 goto skip_tpa_stats;
680
681                         if (bp->max_tpa_v2)
682                                 str = bnxt_ring_tpa2_stats_str;
683                         else
684                                 str = bnxt_ring_tpa_stats_str;
685
686                         for (j = 0; j < num_str; j++) {
687                                 sprintf(buf, "[%d]: %s", i, str[j]);
688                                 buf += ETH_GSTRING_LEN;
689                         }
690 skip_tpa_stats:
691                         if (is_rx_ring(bp, i)) {
692                                 num_str = NUM_RING_RX_SW_STATS;
693                                 for (j = 0; j < num_str; j++) {
694                                         sprintf(buf, "[%d]: %s", i,
695                                                 bnxt_rx_sw_stats_str[j]);
696                                         buf += ETH_GSTRING_LEN;
697                                 }
698                         }
699                         num_str = NUM_RING_CMN_SW_STATS;
700                         for (j = 0; j < num_str; j++) {
701                                 sprintf(buf, "[%d]: %s", i,
702                                         bnxt_cmn_sw_stats_str[j]);
703                                 buf += ETH_GSTRING_LEN;
704                         }
705                 }
706                 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) {
707                         strcpy(buf, bnxt_sw_func_stats[i].string);
708                         buf += ETH_GSTRING_LEN;
709                 }
710
711                 if (bp->flags & BNXT_FLAG_PORT_STATS) {
712                         for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
713                                 strcpy(buf, bnxt_port_stats_arr[i].string);
714                                 buf += ETH_GSTRING_LEN;
715                         }
716                 }
717                 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
718                         for (i = 0; i < bp->fw_rx_stats_ext_size; i++) {
719                                 strcpy(buf, bnxt_port_stats_ext_arr[i].string);
720                                 buf += ETH_GSTRING_LEN;
721                         }
722                         for (i = 0; i < bp->fw_tx_stats_ext_size; i++) {
723                                 strcpy(buf,
724                                        bnxt_tx_port_stats_ext_arr[i].string);
725                                 buf += ETH_GSTRING_LEN;
726                         }
727                         if (bp->pri2cos_valid) {
728                                 for (i = 0; i < 8; i++) {
729                                         strcpy(buf,
730                                                bnxt_rx_bytes_pri_arr[i].string);
731                                         buf += ETH_GSTRING_LEN;
732                                 }
733                                 for (i = 0; i < 8; i++) {
734                                         strcpy(buf,
735                                                bnxt_rx_pkts_pri_arr[i].string);
736                                         buf += ETH_GSTRING_LEN;
737                                 }
738                                 for (i = 0; i < 8; i++) {
739                                         strcpy(buf,
740                                                bnxt_tx_bytes_pri_arr[i].string);
741                                         buf += ETH_GSTRING_LEN;
742                                 }
743                                 for (i = 0; i < 8; i++) {
744                                         strcpy(buf,
745                                                bnxt_tx_pkts_pri_arr[i].string);
746                                         buf += ETH_GSTRING_LEN;
747                                 }
748                         }
749                 }
750                 break;
751         case ETH_SS_TEST:
752                 if (bp->num_tests)
753                         memcpy(buf, bp->test_info->string,
754                                bp->num_tests * ETH_GSTRING_LEN);
755                 break;
756         default:
757                 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
758                            stringset);
759                 break;
760         }
761 }
762
763 static void bnxt_get_ringparam(struct net_device *dev,
764                                struct ethtool_ringparam *ering)
765 {
766         struct bnxt *bp = netdev_priv(dev);
767
768         ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
769         ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
770         ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
771
772         ering->rx_pending = bp->rx_ring_size;
773         ering->rx_jumbo_pending = bp->rx_agg_ring_size;
774         ering->tx_pending = bp->tx_ring_size;
775 }
776
777 static int bnxt_set_ringparam(struct net_device *dev,
778                               struct ethtool_ringparam *ering)
779 {
780         struct bnxt *bp = netdev_priv(dev);
781
782         if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
783             (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
784             (ering->tx_pending <= MAX_SKB_FRAGS))
785                 return -EINVAL;
786
787         if (netif_running(dev))
788                 bnxt_close_nic(bp, false, false);
789
790         bp->rx_ring_size = ering->rx_pending;
791         bp->tx_ring_size = ering->tx_pending;
792         bnxt_set_ring_params(bp);
793
794         if (netif_running(dev))
795                 return bnxt_open_nic(bp, false, false);
796
797         return 0;
798 }
799
800 static void bnxt_get_channels(struct net_device *dev,
801                               struct ethtool_channels *channel)
802 {
803         struct bnxt *bp = netdev_priv(dev);
804         struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
805         int max_rx_rings, max_tx_rings, tcs;
806         int max_tx_sch_inputs;
807
808         /* Get the most up-to-date max_tx_sch_inputs. */
809         if (netif_running(dev) && BNXT_NEW_RM(bp))
810                 bnxt_hwrm_func_resc_qcaps(bp, false);
811         max_tx_sch_inputs = hw_resc->max_tx_sch_inputs;
812
813         bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
814         if (max_tx_sch_inputs)
815                 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
816         channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
817
818         if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
819                 max_rx_rings = 0;
820                 max_tx_rings = 0;
821         }
822         if (max_tx_sch_inputs)
823                 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
824
825         tcs = netdev_get_num_tc(dev);
826         if (tcs > 1)
827                 max_tx_rings /= tcs;
828
829         channel->max_rx = max_rx_rings;
830         channel->max_tx = max_tx_rings;
831         channel->max_other = 0;
832         if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
833                 channel->combined_count = bp->rx_nr_rings;
834                 if (BNXT_CHIP_TYPE_NITRO_A0(bp))
835                         channel->combined_count--;
836         } else {
837                 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
838                         channel->rx_count = bp->rx_nr_rings;
839                         channel->tx_count = bp->tx_nr_rings_per_tc;
840                 }
841         }
842 }
843
844 static int bnxt_set_channels(struct net_device *dev,
845                              struct ethtool_channels *channel)
846 {
847         struct bnxt *bp = netdev_priv(dev);
848         int req_tx_rings, req_rx_rings, tcs;
849         bool sh = false;
850         int tx_xdp = 0;
851         int rc = 0;
852
853         if (channel->other_count)
854                 return -EINVAL;
855
856         if (!channel->combined_count &&
857             (!channel->rx_count || !channel->tx_count))
858                 return -EINVAL;
859
860         if (channel->combined_count &&
861             (channel->rx_count || channel->tx_count))
862                 return -EINVAL;
863
864         if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
865                                             channel->tx_count))
866                 return -EINVAL;
867
868         if (channel->combined_count)
869                 sh = true;
870
871         tcs = netdev_get_num_tc(dev);
872
873         req_tx_rings = sh ? channel->combined_count : channel->tx_count;
874         req_rx_rings = sh ? channel->combined_count : channel->rx_count;
875         if (bp->tx_nr_rings_xdp) {
876                 if (!sh) {
877                         netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
878                         return -EINVAL;
879                 }
880                 tx_xdp = req_rx_rings;
881         }
882         rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp);
883         if (rc) {
884                 netdev_warn(dev, "Unable to allocate the requested rings\n");
885                 return rc;
886         }
887
888         if (bnxt_get_nr_rss_ctxs(bp, req_rx_rings) !=
889             bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) &&
890             (dev->priv_flags & IFF_RXFH_CONFIGURED)) {
891                 netdev_warn(dev, "RSS table size change required, RSS table entries must be default to proceed\n");
892                 return -EINVAL;
893         }
894
895         if (netif_running(dev)) {
896                 if (BNXT_PF(bp)) {
897                         /* TODO CHIMP_FW: Send message to all VF's
898                          * before PF unload
899                          */
900                 }
901                 rc = bnxt_close_nic(bp, true, false);
902                 if (rc) {
903                         netdev_err(bp->dev, "Set channel failure rc :%x\n",
904                                    rc);
905                         return rc;
906                 }
907         }
908
909         if (sh) {
910                 bp->flags |= BNXT_FLAG_SHARED_RINGS;
911                 bp->rx_nr_rings = channel->combined_count;
912                 bp->tx_nr_rings_per_tc = channel->combined_count;
913         } else {
914                 bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
915                 bp->rx_nr_rings = channel->rx_count;
916                 bp->tx_nr_rings_per_tc = channel->tx_count;
917         }
918         bp->tx_nr_rings_xdp = tx_xdp;
919         bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
920         if (tcs > 1)
921                 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
922
923         bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
924                                bp->tx_nr_rings + bp->rx_nr_rings;
925
926         /* After changing number of rx channels, update NTUPLE feature. */
927         netdev_update_features(dev);
928         if (netif_running(dev)) {
929                 rc = bnxt_open_nic(bp, true, false);
930                 if ((!rc) && BNXT_PF(bp)) {
931                         /* TODO CHIMP_FW: Send message to all VF's
932                          * to renable
933                          */
934                 }
935         } else {
936                 rc = bnxt_reserve_rings(bp, true);
937         }
938
939         return rc;
940 }
941
942 #ifdef CONFIG_RFS_ACCEL
943 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
944                             u32 *rule_locs)
945 {
946         int i, j = 0;
947
948         cmd->data = bp->ntp_fltr_count;
949         for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
950                 struct hlist_head *head;
951                 struct bnxt_ntuple_filter *fltr;
952
953                 head = &bp->ntp_fltr_hash_tbl[i];
954                 rcu_read_lock();
955                 hlist_for_each_entry_rcu(fltr, head, hash) {
956                         if (j == cmd->rule_cnt)
957                                 break;
958                         rule_locs[j++] = fltr->sw_id;
959                 }
960                 rcu_read_unlock();
961                 if (j == cmd->rule_cnt)
962                         break;
963         }
964         cmd->rule_cnt = j;
965         return 0;
966 }
967
968 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
969 {
970         struct ethtool_rx_flow_spec *fs =
971                 (struct ethtool_rx_flow_spec *)&cmd->fs;
972         struct bnxt_ntuple_filter *fltr;
973         struct flow_keys *fkeys;
974         int i, rc = -EINVAL;
975
976         if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
977                 return rc;
978
979         for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
980                 struct hlist_head *head;
981
982                 head = &bp->ntp_fltr_hash_tbl[i];
983                 rcu_read_lock();
984                 hlist_for_each_entry_rcu(fltr, head, hash) {
985                         if (fltr->sw_id == fs->location)
986                                 goto fltr_found;
987                 }
988                 rcu_read_unlock();
989         }
990         return rc;
991
992 fltr_found:
993         fkeys = &fltr->fkeys;
994         if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
995                 if (fkeys->basic.ip_proto == IPPROTO_TCP)
996                         fs->flow_type = TCP_V4_FLOW;
997                 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
998                         fs->flow_type = UDP_V4_FLOW;
999                 else
1000                         goto fltr_err;
1001
1002                 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
1003                 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
1004
1005                 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
1006                 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
1007
1008                 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
1009                 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
1010
1011                 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
1012                 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
1013         } else {
1014                 int i;
1015
1016                 if (fkeys->basic.ip_proto == IPPROTO_TCP)
1017                         fs->flow_type = TCP_V6_FLOW;
1018                 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
1019                         fs->flow_type = UDP_V6_FLOW;
1020                 else
1021                         goto fltr_err;
1022
1023                 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
1024                         fkeys->addrs.v6addrs.src;
1025                 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
1026                         fkeys->addrs.v6addrs.dst;
1027                 for (i = 0; i < 4; i++) {
1028                         fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
1029                         fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
1030                 }
1031                 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
1032                 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
1033
1034                 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
1035                 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
1036         }
1037
1038         fs->ring_cookie = fltr->rxq;
1039         rc = 0;
1040
1041 fltr_err:
1042         rcu_read_unlock();
1043
1044         return rc;
1045 }
1046 #endif
1047
1048 static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
1049 {
1050         if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
1051                 return RXH_IP_SRC | RXH_IP_DST;
1052         return 0;
1053 }
1054
1055 static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
1056 {
1057         if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
1058                 return RXH_IP_SRC | RXH_IP_DST;
1059         return 0;
1060 }
1061
1062 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1063 {
1064         cmd->data = 0;
1065         switch (cmd->flow_type) {
1066         case TCP_V4_FLOW:
1067                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
1068                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1069                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1070                 cmd->data |= get_ethtool_ipv4_rss(bp);
1071                 break;
1072         case UDP_V4_FLOW:
1073                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
1074                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1075                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1076                 /* fall through */
1077         case SCTP_V4_FLOW:
1078         case AH_ESP_V4_FLOW:
1079         case AH_V4_FLOW:
1080         case ESP_V4_FLOW:
1081         case IPV4_FLOW:
1082                 cmd->data |= get_ethtool_ipv4_rss(bp);
1083                 break;
1084
1085         case TCP_V6_FLOW:
1086                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
1087                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1088                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1089                 cmd->data |= get_ethtool_ipv6_rss(bp);
1090                 break;
1091         case UDP_V6_FLOW:
1092                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
1093                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1094                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1095                 /* fall through */
1096         case SCTP_V6_FLOW:
1097         case AH_ESP_V6_FLOW:
1098         case AH_V6_FLOW:
1099         case ESP_V6_FLOW:
1100         case IPV6_FLOW:
1101                 cmd->data |= get_ethtool_ipv6_rss(bp);
1102                 break;
1103         }
1104         return 0;
1105 }
1106
1107 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
1108 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
1109
1110 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1111 {
1112         u32 rss_hash_cfg = bp->rss_hash_cfg;
1113         int tuple, rc = 0;
1114
1115         if (cmd->data == RXH_4TUPLE)
1116                 tuple = 4;
1117         else if (cmd->data == RXH_2TUPLE)
1118                 tuple = 2;
1119         else if (!cmd->data)
1120                 tuple = 0;
1121         else
1122                 return -EINVAL;
1123
1124         if (cmd->flow_type == TCP_V4_FLOW) {
1125                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1126                 if (tuple == 4)
1127                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1128         } else if (cmd->flow_type == UDP_V4_FLOW) {
1129                 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
1130                         return -EINVAL;
1131                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1132                 if (tuple == 4)
1133                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1134         } else if (cmd->flow_type == TCP_V6_FLOW) {
1135                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1136                 if (tuple == 4)
1137                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1138         } else if (cmd->flow_type == UDP_V6_FLOW) {
1139                 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
1140                         return -EINVAL;
1141                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1142                 if (tuple == 4)
1143                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1144         } else if (tuple == 4) {
1145                 return -EINVAL;
1146         }
1147
1148         switch (cmd->flow_type) {
1149         case TCP_V4_FLOW:
1150         case UDP_V4_FLOW:
1151         case SCTP_V4_FLOW:
1152         case AH_ESP_V4_FLOW:
1153         case AH_V4_FLOW:
1154         case ESP_V4_FLOW:
1155         case IPV4_FLOW:
1156                 if (tuple == 2)
1157                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1158                 else if (!tuple)
1159                         rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1160                 break;
1161
1162         case TCP_V6_FLOW:
1163         case UDP_V6_FLOW:
1164         case SCTP_V6_FLOW:
1165         case AH_ESP_V6_FLOW:
1166         case AH_V6_FLOW:
1167         case ESP_V6_FLOW:
1168         case IPV6_FLOW:
1169                 if (tuple == 2)
1170                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1171                 else if (!tuple)
1172                         rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1173                 break;
1174         }
1175
1176         if (bp->rss_hash_cfg == rss_hash_cfg)
1177                 return 0;
1178
1179         bp->rss_hash_cfg = rss_hash_cfg;
1180         if (netif_running(bp->dev)) {
1181                 bnxt_close_nic(bp, false, false);
1182                 rc = bnxt_open_nic(bp, false, false);
1183         }
1184         return rc;
1185 }
1186
1187 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
1188                           u32 *rule_locs)
1189 {
1190         struct bnxt *bp = netdev_priv(dev);
1191         int rc = 0;
1192
1193         switch (cmd->cmd) {
1194 #ifdef CONFIG_RFS_ACCEL
1195         case ETHTOOL_GRXRINGS:
1196                 cmd->data = bp->rx_nr_rings;
1197                 break;
1198
1199         case ETHTOOL_GRXCLSRLCNT:
1200                 cmd->rule_cnt = bp->ntp_fltr_count;
1201                 cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
1202                 break;
1203
1204         case ETHTOOL_GRXCLSRLALL:
1205                 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
1206                 break;
1207
1208         case ETHTOOL_GRXCLSRULE:
1209                 rc = bnxt_grxclsrule(bp, cmd);
1210                 break;
1211 #endif
1212
1213         case ETHTOOL_GRXFH:
1214                 rc = bnxt_grxfh(bp, cmd);
1215                 break;
1216
1217         default:
1218                 rc = -EOPNOTSUPP;
1219                 break;
1220         }
1221
1222         return rc;
1223 }
1224
1225 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1226 {
1227         struct bnxt *bp = netdev_priv(dev);
1228         int rc;
1229
1230         switch (cmd->cmd) {
1231         case ETHTOOL_SRXFH:
1232                 rc = bnxt_srxfh(bp, cmd);
1233                 break;
1234
1235         default:
1236                 rc = -EOPNOTSUPP;
1237                 break;
1238         }
1239         return rc;
1240 }
1241
1242 u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
1243 {
1244         struct bnxt *bp = netdev_priv(dev);
1245
1246         if (bp->flags & BNXT_FLAG_CHIP_P5)
1247                 return ALIGN(bp->rx_nr_rings, BNXT_RSS_TABLE_ENTRIES_P5);
1248         return HW_HASH_INDEX_SIZE;
1249 }
1250
1251 static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
1252 {
1253         return HW_HASH_KEY_SIZE;
1254 }
1255
1256 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
1257                          u8 *hfunc)
1258 {
1259         struct bnxt *bp = netdev_priv(dev);
1260         struct bnxt_vnic_info *vnic;
1261         u32 i, tbl_size;
1262
1263         if (hfunc)
1264                 *hfunc = ETH_RSS_HASH_TOP;
1265
1266         if (!bp->vnic_info)
1267                 return 0;
1268
1269         vnic = &bp->vnic_info[0];
1270         if (indir && bp->rss_indir_tbl) {
1271                 tbl_size = bnxt_get_rxfh_indir_size(dev);
1272                 for (i = 0; i < tbl_size; i++)
1273                         indir[i] = bp->rss_indir_tbl[i];
1274         }
1275
1276         if (key && vnic->rss_hash_key)
1277                 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
1278
1279         return 0;
1280 }
1281
1282 static int bnxt_set_rxfh(struct net_device *dev, const u32 *indir,
1283                          const u8 *key, const u8 hfunc)
1284 {
1285         struct bnxt *bp = netdev_priv(dev);
1286         int rc = 0;
1287
1288         if (hfunc && hfunc != ETH_RSS_HASH_TOP)
1289                 return -EOPNOTSUPP;
1290
1291         if (key)
1292                 return -EOPNOTSUPP;
1293
1294         if (indir) {
1295                 u32 i, pad, tbl_size = bnxt_get_rxfh_indir_size(dev);
1296
1297                 for (i = 0; i < tbl_size; i++)
1298                         bp->rss_indir_tbl[i] = indir[i];
1299                 pad = bp->rss_indir_tbl_entries - tbl_size;
1300                 if (pad)
1301                         memset(&bp->rss_indir_tbl[i], 0, pad * sizeof(u16));
1302         }
1303
1304         if (netif_running(bp->dev)) {
1305                 bnxt_close_nic(bp, false, false);
1306                 rc = bnxt_open_nic(bp, false, false);
1307         }
1308         return rc;
1309 }
1310
1311 static void bnxt_get_drvinfo(struct net_device *dev,
1312                              struct ethtool_drvinfo *info)
1313 {
1314         struct bnxt *bp = netdev_priv(dev);
1315
1316         strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
1317         strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version));
1318         strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
1319         info->n_stats = bnxt_get_num_stats(bp);
1320         info->testinfo_len = bp->num_tests;
1321         /* TODO CHIMP_FW: eeprom dump details */
1322         info->eedump_len = 0;
1323         /* TODO CHIMP FW: reg dump details */
1324         info->regdump_len = 0;
1325 }
1326
1327 static int bnxt_get_regs_len(struct net_device *dev)
1328 {
1329         struct bnxt *bp = netdev_priv(dev);
1330         int reg_len;
1331
1332         reg_len = BNXT_PXP_REG_LEN;
1333
1334         if (bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED)
1335                 reg_len += sizeof(struct pcie_ctx_hw_stats);
1336
1337         return reg_len;
1338 }
1339
1340 static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1341                           void *_p)
1342 {
1343         struct pcie_ctx_hw_stats *hw_pcie_stats;
1344         struct hwrm_pcie_qstats_input req = {0};
1345         struct bnxt *bp = netdev_priv(dev);
1346         dma_addr_t hw_pcie_stats_addr;
1347         int rc;
1348
1349         regs->version = 0;
1350         bnxt_dbg_hwrm_rd_reg(bp, 0, BNXT_PXP_REG_LEN / 4, _p);
1351
1352         if (!(bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED))
1353                 return;
1354
1355         hw_pcie_stats = dma_alloc_coherent(&bp->pdev->dev,
1356                                            sizeof(*hw_pcie_stats),
1357                                            &hw_pcie_stats_addr, GFP_KERNEL);
1358         if (!hw_pcie_stats)
1359                 return;
1360
1361         regs->version = 1;
1362         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PCIE_QSTATS, -1, -1);
1363         req.pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats));
1364         req.pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr);
1365         mutex_lock(&bp->hwrm_cmd_lock);
1366         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1367         if (!rc) {
1368                 __le64 *src = (__le64 *)hw_pcie_stats;
1369                 u64 *dst = (u64 *)(_p + BNXT_PXP_REG_LEN);
1370                 int i;
1371
1372                 for (i = 0; i < sizeof(*hw_pcie_stats) / sizeof(__le64); i++)
1373                         dst[i] = le64_to_cpu(src[i]);
1374         }
1375         mutex_unlock(&bp->hwrm_cmd_lock);
1376         dma_free_coherent(&bp->pdev->dev, sizeof(*hw_pcie_stats), hw_pcie_stats,
1377                           hw_pcie_stats_addr);
1378 }
1379
1380 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1381 {
1382         struct bnxt *bp = netdev_priv(dev);
1383
1384         wol->supported = 0;
1385         wol->wolopts = 0;
1386         memset(&wol->sopass, 0, sizeof(wol->sopass));
1387         if (bp->flags & BNXT_FLAG_WOL_CAP) {
1388                 wol->supported = WAKE_MAGIC;
1389                 if (bp->wol)
1390                         wol->wolopts = WAKE_MAGIC;
1391         }
1392 }
1393
1394 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1395 {
1396         struct bnxt *bp = netdev_priv(dev);
1397
1398         if (wol->wolopts & ~WAKE_MAGIC)
1399                 return -EINVAL;
1400
1401         if (wol->wolopts & WAKE_MAGIC) {
1402                 if (!(bp->flags & BNXT_FLAG_WOL_CAP))
1403                         return -EINVAL;
1404                 if (!bp->wol) {
1405                         if (bnxt_hwrm_alloc_wol_fltr(bp))
1406                                 return -EBUSY;
1407                         bp->wol = 1;
1408                 }
1409         } else {
1410                 if (bp->wol) {
1411                         if (bnxt_hwrm_free_wol_fltr(bp))
1412                                 return -EBUSY;
1413                         bp->wol = 0;
1414                 }
1415         }
1416         return 0;
1417 }
1418
1419 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
1420 {
1421         u32 speed_mask = 0;
1422
1423         /* TODO: support 25GB, 40GB, 50GB with different cable type */
1424         /* set the advertised speeds */
1425         if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
1426                 speed_mask |= ADVERTISED_100baseT_Full;
1427         if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
1428                 speed_mask |= ADVERTISED_1000baseT_Full;
1429         if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
1430                 speed_mask |= ADVERTISED_2500baseX_Full;
1431         if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
1432                 speed_mask |= ADVERTISED_10000baseT_Full;
1433         if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
1434                 speed_mask |= ADVERTISED_40000baseCR4_Full;
1435
1436         if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
1437                 speed_mask |= ADVERTISED_Pause;
1438         else if (fw_pause & BNXT_LINK_PAUSE_TX)
1439                 speed_mask |= ADVERTISED_Asym_Pause;
1440         else if (fw_pause & BNXT_LINK_PAUSE_RX)
1441                 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
1442
1443         return speed_mask;
1444 }
1445
1446 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
1447 {                                                                       \
1448         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB)                    \
1449                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1450                                                      100baseT_Full);    \
1451         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB)                      \
1452                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1453                                                      1000baseT_Full);   \
1454         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB)                     \
1455                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1456                                                      10000baseT_Full);  \
1457         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB)                     \
1458                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1459                                                      25000baseCR_Full); \
1460         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB)                     \
1461                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1462                                                      40000baseCR4_Full);\
1463         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB)                     \
1464                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1465                                                      50000baseCR2_Full);\
1466         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB)                    \
1467                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1468                                                      100000baseCR4_Full);\
1469         if ((fw_pause) & BNXT_LINK_PAUSE_RX) {                          \
1470                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1471                                                      Pause);            \
1472                 if (!((fw_pause) & BNXT_LINK_PAUSE_TX))                 \
1473                         ethtool_link_ksettings_add_link_mode(           \
1474                                         lk_ksettings, name, Asym_Pause);\
1475         } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) {                   \
1476                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1477                                                      Asym_Pause);       \
1478         }                                                               \
1479 }
1480
1481 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name)          \
1482 {                                                                       \
1483         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1484                                                   100baseT_Full) ||     \
1485             ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1486                                                   100baseT_Half))       \
1487                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB;               \
1488         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1489                                                   1000baseT_Full) ||    \
1490             ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1491                                                   1000baseT_Half))      \
1492                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB;                 \
1493         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1494                                                   10000baseT_Full))     \
1495                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB;                \
1496         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1497                                                   25000baseCR_Full))    \
1498                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB;                \
1499         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1500                                                   40000baseCR4_Full))   \
1501                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB;                \
1502         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1503                                                   50000baseCR2_Full))   \
1504                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB;                \
1505         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1506                                                   100000baseCR4_Full))  \
1507                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB;               \
1508 }
1509
1510 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
1511                                 struct ethtool_link_ksettings *lk_ksettings)
1512 {
1513         u16 fw_speeds = link_info->advertising;
1514         u8 fw_pause = 0;
1515
1516         if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1517                 fw_pause = link_info->auto_pause_setting;
1518
1519         BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
1520 }
1521
1522 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
1523                                 struct ethtool_link_ksettings *lk_ksettings)
1524 {
1525         u16 fw_speeds = link_info->lp_auto_link_speeds;
1526         u8 fw_pause = 0;
1527
1528         if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1529                 fw_pause = link_info->lp_pause;
1530
1531         BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
1532                                 lp_advertising);
1533 }
1534
1535 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
1536                                 struct ethtool_link_ksettings *lk_ksettings)
1537 {
1538         u16 fw_speeds = link_info->support_speeds;
1539
1540         BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
1541
1542         ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
1543         ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1544                                              Asym_Pause);
1545
1546         if (link_info->support_auto_speeds)
1547                 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1548                                                      Autoneg);
1549 }
1550
1551 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
1552 {
1553         switch (fw_link_speed) {
1554         case BNXT_LINK_SPEED_100MB:
1555                 return SPEED_100;
1556         case BNXT_LINK_SPEED_1GB:
1557                 return SPEED_1000;
1558         case BNXT_LINK_SPEED_2_5GB:
1559                 return SPEED_2500;
1560         case BNXT_LINK_SPEED_10GB:
1561                 return SPEED_10000;
1562         case BNXT_LINK_SPEED_20GB:
1563                 return SPEED_20000;
1564         case BNXT_LINK_SPEED_25GB:
1565                 return SPEED_25000;
1566         case BNXT_LINK_SPEED_40GB:
1567                 return SPEED_40000;
1568         case BNXT_LINK_SPEED_50GB:
1569                 return SPEED_50000;
1570         case BNXT_LINK_SPEED_100GB:
1571                 return SPEED_100000;
1572         default:
1573                 return SPEED_UNKNOWN;
1574         }
1575 }
1576
1577 static int bnxt_get_link_ksettings(struct net_device *dev,
1578                                    struct ethtool_link_ksettings *lk_ksettings)
1579 {
1580         struct bnxt *bp = netdev_priv(dev);
1581         struct bnxt_link_info *link_info = &bp->link_info;
1582         struct ethtool_link_settings *base = &lk_ksettings->base;
1583         u32 ethtool_speed;
1584
1585         ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
1586         mutex_lock(&bp->link_lock);
1587         bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
1588
1589         ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
1590         if (link_info->autoneg) {
1591                 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
1592                 ethtool_link_ksettings_add_link_mode(lk_ksettings,
1593                                                      advertising, Autoneg);
1594                 base->autoneg = AUTONEG_ENABLE;
1595                 base->duplex = DUPLEX_UNKNOWN;
1596                 if (link_info->phy_link_status == BNXT_LINK_LINK) {
1597                         bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
1598                         if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
1599                                 base->duplex = DUPLEX_FULL;
1600                         else
1601                                 base->duplex = DUPLEX_HALF;
1602                 }
1603                 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
1604         } else {
1605                 base->autoneg = AUTONEG_DISABLE;
1606                 ethtool_speed =
1607                         bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
1608                 base->duplex = DUPLEX_HALF;
1609                 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
1610                         base->duplex = DUPLEX_FULL;
1611         }
1612         base->speed = ethtool_speed;
1613
1614         base->port = PORT_NONE;
1615         if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1616                 base->port = PORT_TP;
1617                 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1618                                                      TP);
1619                 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1620                                                      TP);
1621         } else {
1622                 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1623                                                      FIBRE);
1624                 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1625                                                      FIBRE);
1626
1627                 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
1628                         base->port = PORT_DA;
1629                 else if (link_info->media_type ==
1630                          PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
1631                         base->port = PORT_FIBRE;
1632         }
1633         base->phy_address = link_info->phy_addr;
1634         mutex_unlock(&bp->link_lock);
1635
1636         return 0;
1637 }
1638
1639 static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed)
1640 {
1641         struct bnxt *bp = netdev_priv(dev);
1642         struct bnxt_link_info *link_info = &bp->link_info;
1643         u16 support_spds = link_info->support_speeds;
1644         u32 fw_speed = 0;
1645
1646         switch (ethtool_speed) {
1647         case SPEED_100:
1648                 if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
1649                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
1650                 break;
1651         case SPEED_1000:
1652                 if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
1653                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
1654                 break;
1655         case SPEED_2500:
1656                 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
1657                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
1658                 break;
1659         case SPEED_10000:
1660                 if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
1661                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
1662                 break;
1663         case SPEED_20000:
1664                 if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
1665                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
1666                 break;
1667         case SPEED_25000:
1668                 if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
1669                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
1670                 break;
1671         case SPEED_40000:
1672                 if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
1673                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
1674                 break;
1675         case SPEED_50000:
1676                 if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
1677                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
1678                 break;
1679         case SPEED_100000:
1680                 if (support_spds & BNXT_LINK_SPEED_MSK_100GB)
1681                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB;
1682                 break;
1683         default:
1684                 netdev_err(dev, "unsupported speed!\n");
1685                 break;
1686         }
1687         return fw_speed;
1688 }
1689
1690 u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
1691 {
1692         u16 fw_speed_mask = 0;
1693
1694         /* only support autoneg at speed 100, 1000, and 10000 */
1695         if (advertising & (ADVERTISED_100baseT_Full |
1696                            ADVERTISED_100baseT_Half)) {
1697                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
1698         }
1699         if (advertising & (ADVERTISED_1000baseT_Full |
1700                            ADVERTISED_1000baseT_Half)) {
1701                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
1702         }
1703         if (advertising & ADVERTISED_10000baseT_Full)
1704                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
1705
1706         if (advertising & ADVERTISED_40000baseCR4_Full)
1707                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
1708
1709         return fw_speed_mask;
1710 }
1711
1712 static int bnxt_set_link_ksettings(struct net_device *dev,
1713                            const struct ethtool_link_ksettings *lk_ksettings)
1714 {
1715         struct bnxt *bp = netdev_priv(dev);
1716         struct bnxt_link_info *link_info = &bp->link_info;
1717         const struct ethtool_link_settings *base = &lk_ksettings->base;
1718         bool set_pause = false;
1719         u16 fw_advertising = 0;
1720         u32 speed;
1721         int rc = 0;
1722
1723         if (!BNXT_PHY_CFG_ABLE(bp))
1724                 return -EOPNOTSUPP;
1725
1726         mutex_lock(&bp->link_lock);
1727         if (base->autoneg == AUTONEG_ENABLE) {
1728                 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
1729                                         advertising);
1730                 link_info->autoneg |= BNXT_AUTONEG_SPEED;
1731                 if (!fw_advertising)
1732                         link_info->advertising = link_info->support_auto_speeds;
1733                 else
1734                         link_info->advertising = fw_advertising;
1735                 /* any change to autoneg will cause link change, therefore the
1736                  * driver should put back the original pause setting in autoneg
1737                  */
1738                 set_pause = true;
1739         } else {
1740                 u16 fw_speed;
1741                 u8 phy_type = link_info->phy_type;
1742
1743                 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET  ||
1744                     phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
1745                     link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1746                         netdev_err(dev, "10GBase-T devices must autoneg\n");
1747                         rc = -EINVAL;
1748                         goto set_setting_exit;
1749                 }
1750                 if (base->duplex == DUPLEX_HALF) {
1751                         netdev_err(dev, "HALF DUPLEX is not supported!\n");
1752                         rc = -EINVAL;
1753                         goto set_setting_exit;
1754                 }
1755                 speed = base->speed;
1756                 fw_speed = bnxt_get_fw_speed(dev, speed);
1757                 if (!fw_speed) {
1758                         rc = -EINVAL;
1759                         goto set_setting_exit;
1760                 }
1761                 link_info->req_link_speed = fw_speed;
1762                 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
1763                 link_info->autoneg = 0;
1764                 link_info->advertising = 0;
1765         }
1766
1767         if (netif_running(dev))
1768                 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
1769
1770 set_setting_exit:
1771         mutex_unlock(&bp->link_lock);
1772         return rc;
1773 }
1774
1775 static void bnxt_get_pauseparam(struct net_device *dev,
1776                                 struct ethtool_pauseparam *epause)
1777 {
1778         struct bnxt *bp = netdev_priv(dev);
1779         struct bnxt_link_info *link_info = &bp->link_info;
1780
1781         if (BNXT_VF(bp))
1782                 return;
1783         epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
1784         epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
1785         epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
1786 }
1787
1788 static int bnxt_set_pauseparam(struct net_device *dev,
1789                                struct ethtool_pauseparam *epause)
1790 {
1791         int rc = 0;
1792         struct bnxt *bp = netdev_priv(dev);
1793         struct bnxt_link_info *link_info = &bp->link_info;
1794
1795         if (!BNXT_PHY_CFG_ABLE(bp))
1796                 return -EOPNOTSUPP;
1797
1798         if (epause->autoneg) {
1799                 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
1800                         return -EINVAL;
1801
1802                 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
1803                 if (bp->hwrm_spec_code >= 0x10201)
1804                         link_info->req_flow_ctrl =
1805                                 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
1806         } else {
1807                 /* when transition from auto pause to force pause,
1808                  * force a link change
1809                  */
1810                 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1811                         link_info->force_link_chng = true;
1812                 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
1813                 link_info->req_flow_ctrl = 0;
1814         }
1815         if (epause->rx_pause)
1816                 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
1817
1818         if (epause->tx_pause)
1819                 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
1820
1821         if (netif_running(dev)) {
1822                 mutex_lock(&bp->link_lock);
1823                 rc = bnxt_hwrm_set_pause(bp);
1824                 mutex_unlock(&bp->link_lock);
1825         }
1826         return rc;
1827 }
1828
1829 static u32 bnxt_get_link(struct net_device *dev)
1830 {
1831         struct bnxt *bp = netdev_priv(dev);
1832
1833         /* TODO: handle MF, VF, driver close case */
1834         return bp->link_info.link_up;
1835 }
1836
1837 static void bnxt_print_admin_err(struct bnxt *bp)
1838 {
1839         netdev_info(bp->dev, "PF does not have admin privileges to flash or reset the device\n");
1840 }
1841
1842 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1843                                 u16 ext, u16 *index, u32 *item_length,
1844                                 u32 *data_length);
1845
1846 static int bnxt_flash_nvram(struct net_device *dev,
1847                             u16 dir_type,
1848                             u16 dir_ordinal,
1849                             u16 dir_ext,
1850                             u16 dir_attr,
1851                             const u8 *data,
1852                             size_t data_len)
1853 {
1854         struct bnxt *bp = netdev_priv(dev);
1855         int rc;
1856         struct hwrm_nvm_write_input req = {0};
1857         dma_addr_t dma_handle;
1858         u8 *kmem;
1859
1860         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
1861
1862         req.dir_type = cpu_to_le16(dir_type);
1863         req.dir_ordinal = cpu_to_le16(dir_ordinal);
1864         req.dir_ext = cpu_to_le16(dir_ext);
1865         req.dir_attr = cpu_to_le16(dir_attr);
1866         req.dir_data_length = cpu_to_le32(data_len);
1867
1868         kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
1869                                   GFP_KERNEL);
1870         if (!kmem) {
1871                 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1872                            (unsigned)data_len);
1873                 return -ENOMEM;
1874         }
1875         memcpy(kmem, data, data_len);
1876         req.host_src_addr = cpu_to_le64(dma_handle);
1877
1878         rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
1879         dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
1880
1881         if (rc == -EACCES)
1882                 bnxt_print_admin_err(bp);
1883         return rc;
1884 }
1885
1886 static int bnxt_hwrm_firmware_reset(struct net_device *dev, u8 proc_type,
1887                                     u8 self_reset, u8 flags)
1888 {
1889         struct hwrm_fw_reset_input req = {0};
1890         struct bnxt *bp = netdev_priv(dev);
1891         int rc;
1892
1893         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
1894
1895         req.embedded_proc_type = proc_type;
1896         req.selfrst_status = self_reset;
1897         req.flags = flags;
1898
1899         if (proc_type == FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP) {
1900                 rc = hwrm_send_message_silent(bp, &req, sizeof(req),
1901                                               HWRM_CMD_TIMEOUT);
1902         } else {
1903                 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1904                 if (rc == -EACCES)
1905                         bnxt_print_admin_err(bp);
1906         }
1907         return rc;
1908 }
1909
1910 static int bnxt_firmware_reset(struct net_device *dev,
1911                                enum bnxt_nvm_directory_type dir_type)
1912 {
1913         u8 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE;
1914         u8 proc_type, flags = 0;
1915
1916         /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
1917         /*       (e.g. when firmware isn't already running) */
1918         switch (dir_type) {
1919         case BNX_DIR_TYPE_CHIMP_PATCH:
1920         case BNX_DIR_TYPE_BOOTCODE:
1921         case BNX_DIR_TYPE_BOOTCODE_2:
1922                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
1923                 /* Self-reset ChiMP upon next PCIe reset: */
1924                 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1925                 break;
1926         case BNX_DIR_TYPE_APE_FW:
1927         case BNX_DIR_TYPE_APE_PATCH:
1928                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
1929                 /* Self-reset APE upon next PCIe reset: */
1930                 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1931                 break;
1932         case BNX_DIR_TYPE_KONG_FW:
1933         case BNX_DIR_TYPE_KONG_PATCH:
1934                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
1935                 break;
1936         case BNX_DIR_TYPE_BONO_FW:
1937         case BNX_DIR_TYPE_BONO_PATCH:
1938                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
1939                 break;
1940         default:
1941                 return -EINVAL;
1942         }
1943
1944         return bnxt_hwrm_firmware_reset(dev, proc_type, self_reset, flags);
1945 }
1946
1947 static int bnxt_firmware_reset_chip(struct net_device *dev)
1948 {
1949         struct bnxt *bp = netdev_priv(dev);
1950         u8 flags = 0;
1951
1952         if (bp->fw_cap & BNXT_FW_CAP_HOT_RESET)
1953                 flags = FW_RESET_REQ_FLAGS_RESET_GRACEFUL;
1954
1955         return bnxt_hwrm_firmware_reset(dev,
1956                                         FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP,
1957                                         FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP,
1958                                         flags);
1959 }
1960
1961 static int bnxt_firmware_reset_ap(struct net_device *dev)
1962 {
1963         return bnxt_hwrm_firmware_reset(dev, FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP,
1964                                         FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE,
1965                                         0);
1966 }
1967
1968 static int bnxt_flash_firmware(struct net_device *dev,
1969                                u16 dir_type,
1970                                const u8 *fw_data,
1971                                size_t fw_size)
1972 {
1973         int     rc = 0;
1974         u16     code_type;
1975         u32     stored_crc;
1976         u32     calculated_crc;
1977         struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
1978
1979         switch (dir_type) {
1980         case BNX_DIR_TYPE_BOOTCODE:
1981         case BNX_DIR_TYPE_BOOTCODE_2:
1982                 code_type = CODE_BOOT;
1983                 break;
1984         case BNX_DIR_TYPE_CHIMP_PATCH:
1985                 code_type = CODE_CHIMP_PATCH;
1986                 break;
1987         case BNX_DIR_TYPE_APE_FW:
1988                 code_type = CODE_MCTP_PASSTHRU;
1989                 break;
1990         case BNX_DIR_TYPE_APE_PATCH:
1991                 code_type = CODE_APE_PATCH;
1992                 break;
1993         case BNX_DIR_TYPE_KONG_FW:
1994                 code_type = CODE_KONG_FW;
1995                 break;
1996         case BNX_DIR_TYPE_KONG_PATCH:
1997                 code_type = CODE_KONG_PATCH;
1998                 break;
1999         case BNX_DIR_TYPE_BONO_FW:
2000                 code_type = CODE_BONO_FW;
2001                 break;
2002         case BNX_DIR_TYPE_BONO_PATCH:
2003                 code_type = CODE_BONO_PATCH;
2004                 break;
2005         default:
2006                 netdev_err(dev, "Unsupported directory entry type: %u\n",
2007                            dir_type);
2008                 return -EINVAL;
2009         }
2010         if (fw_size < sizeof(struct bnxt_fw_header)) {
2011                 netdev_err(dev, "Invalid firmware file size: %u\n",
2012                            (unsigned int)fw_size);
2013                 return -EINVAL;
2014         }
2015         if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
2016                 netdev_err(dev, "Invalid firmware signature: %08X\n",
2017                            le32_to_cpu(header->signature));
2018                 return -EINVAL;
2019         }
2020         if (header->code_type != code_type) {
2021                 netdev_err(dev, "Expected firmware type: %d, read: %d\n",
2022                            code_type, header->code_type);
2023                 return -EINVAL;
2024         }
2025         if (header->device != DEVICE_CUMULUS_FAMILY) {
2026                 netdev_err(dev, "Expected firmware device family %d, read: %d\n",
2027                            DEVICE_CUMULUS_FAMILY, header->device);
2028                 return -EINVAL;
2029         }
2030         /* Confirm the CRC32 checksum of the file: */
2031         stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
2032                                              sizeof(stored_crc)));
2033         calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
2034         if (calculated_crc != stored_crc) {
2035                 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
2036                            (unsigned long)stored_crc,
2037                            (unsigned long)calculated_crc);
2038                 return -EINVAL;
2039         }
2040         rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
2041                               0, 0, fw_data, fw_size);
2042         if (rc == 0)    /* Firmware update successful */
2043                 rc = bnxt_firmware_reset(dev, dir_type);
2044
2045         return rc;
2046 }
2047
2048 static int bnxt_flash_microcode(struct net_device *dev,
2049                                 u16 dir_type,
2050                                 const u8 *fw_data,
2051                                 size_t fw_size)
2052 {
2053         struct bnxt_ucode_trailer *trailer;
2054         u32 calculated_crc;
2055         u32 stored_crc;
2056         int rc = 0;
2057
2058         if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
2059                 netdev_err(dev, "Invalid microcode file size: %u\n",
2060                            (unsigned int)fw_size);
2061                 return -EINVAL;
2062         }
2063         trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
2064                                                 sizeof(*trailer)));
2065         if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
2066                 netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
2067                            le32_to_cpu(trailer->sig));
2068                 return -EINVAL;
2069         }
2070         if (le16_to_cpu(trailer->dir_type) != dir_type) {
2071                 netdev_err(dev, "Expected microcode type: %d, read: %d\n",
2072                            dir_type, le16_to_cpu(trailer->dir_type));
2073                 return -EINVAL;
2074         }
2075         if (le16_to_cpu(trailer->trailer_length) <
2076                 sizeof(struct bnxt_ucode_trailer)) {
2077                 netdev_err(dev, "Invalid microcode trailer length: %d\n",
2078                            le16_to_cpu(trailer->trailer_length));
2079                 return -EINVAL;
2080         }
2081
2082         /* Confirm the CRC32 checksum of the file: */
2083         stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
2084                                              sizeof(stored_crc)));
2085         calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
2086         if (calculated_crc != stored_crc) {
2087                 netdev_err(dev,
2088                            "CRC32 (%08lX) does not match calculated: %08lX\n",
2089                            (unsigned long)stored_crc,
2090                            (unsigned long)calculated_crc);
2091                 return -EINVAL;
2092         }
2093         rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
2094                               0, 0, fw_data, fw_size);
2095
2096         return rc;
2097 }
2098
2099 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
2100 {
2101         switch (dir_type) {
2102         case BNX_DIR_TYPE_CHIMP_PATCH:
2103         case BNX_DIR_TYPE_BOOTCODE:
2104         case BNX_DIR_TYPE_BOOTCODE_2:
2105         case BNX_DIR_TYPE_APE_FW:
2106         case BNX_DIR_TYPE_APE_PATCH:
2107         case BNX_DIR_TYPE_KONG_FW:
2108         case BNX_DIR_TYPE_KONG_PATCH:
2109         case BNX_DIR_TYPE_BONO_FW:
2110         case BNX_DIR_TYPE_BONO_PATCH:
2111                 return true;
2112         }
2113
2114         return false;
2115 }
2116
2117 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
2118 {
2119         switch (dir_type) {
2120         case BNX_DIR_TYPE_AVS:
2121         case BNX_DIR_TYPE_EXP_ROM_MBA:
2122         case BNX_DIR_TYPE_PCIE:
2123         case BNX_DIR_TYPE_TSCF_UCODE:
2124         case BNX_DIR_TYPE_EXT_PHY:
2125         case BNX_DIR_TYPE_CCM:
2126         case BNX_DIR_TYPE_ISCSI_BOOT:
2127         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
2128         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
2129                 return true;
2130         }
2131
2132         return false;
2133 }
2134
2135 static bool bnxt_dir_type_is_executable(u16 dir_type)
2136 {
2137         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
2138                 bnxt_dir_type_is_other_exec_format(dir_type);
2139 }
2140
2141 static int bnxt_flash_firmware_from_file(struct net_device *dev,
2142                                          u16 dir_type,
2143                                          const char *filename)
2144 {
2145         const struct firmware  *fw;
2146         int                     rc;
2147
2148         rc = request_firmware(&fw, filename, &dev->dev);
2149         if (rc != 0) {
2150                 netdev_err(dev, "Error %d requesting firmware file: %s\n",
2151                            rc, filename);
2152                 return rc;
2153         }
2154         if (bnxt_dir_type_is_ape_bin_format(dir_type))
2155                 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
2156         else if (bnxt_dir_type_is_other_exec_format(dir_type))
2157                 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
2158         else
2159                 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
2160                                       0, 0, fw->data, fw->size);
2161         release_firmware(fw);
2162         return rc;
2163 }
2164
2165 int bnxt_flash_package_from_file(struct net_device *dev, const char *filename,
2166                                  u32 install_type)
2167 {
2168         struct bnxt *bp = netdev_priv(dev);
2169         struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
2170         struct hwrm_nvm_install_update_input install = {0};
2171         const struct firmware *fw;
2172         u32 item_len;
2173         int rc = 0;
2174         u16 index;
2175
2176         bnxt_hwrm_fw_set_time(bp);
2177
2178         rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
2179                                   BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
2180                                   &index, &item_len, NULL);
2181         if (rc) {
2182                 netdev_err(dev, "PKG update area not created in nvram\n");
2183                 return rc;
2184         }
2185
2186         rc = request_firmware(&fw, filename, &dev->dev);
2187         if (rc != 0) {
2188                 netdev_err(dev, "PKG error %d requesting file: %s\n",
2189                            rc, filename);
2190                 return rc;
2191         }
2192
2193         if (fw->size > item_len) {
2194                 netdev_err(dev, "PKG insufficient update area in nvram: %lu\n",
2195                            (unsigned long)fw->size);
2196                 rc = -EFBIG;
2197         } else {
2198                 dma_addr_t dma_handle;
2199                 u8 *kmem;
2200                 struct hwrm_nvm_modify_input modify = {0};
2201
2202                 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
2203
2204                 modify.dir_idx = cpu_to_le16(index);
2205                 modify.len = cpu_to_le32(fw->size);
2206
2207                 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
2208                                           &dma_handle, GFP_KERNEL);
2209                 if (!kmem) {
2210                         netdev_err(dev,
2211                                    "dma_alloc_coherent failure, length = %u\n",
2212                                    (unsigned int)fw->size);
2213                         rc = -ENOMEM;
2214                 } else {
2215                         memcpy(kmem, fw->data, fw->size);
2216                         modify.host_src_addr = cpu_to_le64(dma_handle);
2217
2218                         rc = hwrm_send_message(bp, &modify, sizeof(modify),
2219                                                FLASH_PACKAGE_TIMEOUT);
2220                         dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
2221                                           dma_handle);
2222                 }
2223         }
2224         release_firmware(fw);
2225         if (rc)
2226                 goto err_exit;
2227
2228         if ((install_type & 0xffff) == 0)
2229                 install_type >>= 16;
2230         bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
2231         install.install_type = cpu_to_le32(install_type);
2232
2233         mutex_lock(&bp->hwrm_cmd_lock);
2234         rc = _hwrm_send_message(bp, &install, sizeof(install),
2235                                 INSTALL_PACKAGE_TIMEOUT);
2236         if (rc) {
2237                 u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
2238
2239                 if (resp->error_code && error_code ==
2240                     NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
2241                         install.flags |= cpu_to_le16(
2242                                NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
2243                         rc = _hwrm_send_message(bp, &install, sizeof(install),
2244                                                 INSTALL_PACKAGE_TIMEOUT);
2245                 }
2246                 if (rc)
2247                         goto flash_pkg_exit;
2248         }
2249
2250         if (resp->result) {
2251                 netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
2252                            (s8)resp->result, (int)resp->problem_item);
2253                 rc = -ENOPKG;
2254         }
2255 flash_pkg_exit:
2256         mutex_unlock(&bp->hwrm_cmd_lock);
2257 err_exit:
2258         if (rc == -EACCES)
2259                 bnxt_print_admin_err(bp);
2260         return rc;
2261 }
2262
2263 static int bnxt_flash_device(struct net_device *dev,
2264                              struct ethtool_flash *flash)
2265 {
2266         if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
2267                 netdev_err(dev, "flashdev not supported from a virtual function\n");
2268                 return -EINVAL;
2269         }
2270
2271         if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
2272             flash->region > 0xffff)
2273                 return bnxt_flash_package_from_file(dev, flash->data,
2274                                                     flash->region);
2275
2276         return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
2277 }
2278
2279 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
2280 {
2281         struct bnxt *bp = netdev_priv(dev);
2282         int rc;
2283         struct hwrm_nvm_get_dir_info_input req = {0};
2284         struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
2285
2286         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
2287
2288         mutex_lock(&bp->hwrm_cmd_lock);
2289         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2290         if (!rc) {
2291                 *entries = le32_to_cpu(output->entries);
2292                 *length = le32_to_cpu(output->entry_length);
2293         }
2294         mutex_unlock(&bp->hwrm_cmd_lock);
2295         return rc;
2296 }
2297
2298 static int bnxt_get_eeprom_len(struct net_device *dev)
2299 {
2300         struct bnxt *bp = netdev_priv(dev);
2301
2302         if (BNXT_VF(bp))
2303                 return 0;
2304
2305         /* The -1 return value allows the entire 32-bit range of offsets to be
2306          * passed via the ethtool command-line utility.
2307          */
2308         return -1;
2309 }
2310
2311 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
2312 {
2313         struct bnxt *bp = netdev_priv(dev);
2314         int rc;
2315         u32 dir_entries;
2316         u32 entry_length;
2317         u8 *buf;
2318         size_t buflen;
2319         dma_addr_t dma_handle;
2320         struct hwrm_nvm_get_dir_entries_input req = {0};
2321
2322         rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
2323         if (rc != 0)
2324                 return rc;
2325
2326         if (!dir_entries || !entry_length)
2327                 return -EIO;
2328
2329         /* Insert 2 bytes of directory info (count and size of entries) */
2330         if (len < 2)
2331                 return -EINVAL;
2332
2333         *data++ = dir_entries;
2334         *data++ = entry_length;
2335         len -= 2;
2336         memset(data, 0xff, len);
2337
2338         buflen = dir_entries * entry_length;
2339         buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
2340                                  GFP_KERNEL);
2341         if (!buf) {
2342                 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
2343                            (unsigned)buflen);
2344                 return -ENOMEM;
2345         }
2346         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
2347         req.host_dest_addr = cpu_to_le64(dma_handle);
2348         rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2349         if (rc == 0)
2350                 memcpy(data, buf, len > buflen ? buflen : len);
2351         dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
2352         return rc;
2353 }
2354
2355 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
2356                                u32 length, u8 *data)
2357 {
2358         struct bnxt *bp = netdev_priv(dev);
2359         int rc;
2360         u8 *buf;
2361         dma_addr_t dma_handle;
2362         struct hwrm_nvm_read_input req = {0};
2363
2364         if (!length)
2365                 return -EINVAL;
2366
2367         buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
2368                                  GFP_KERNEL);
2369         if (!buf) {
2370                 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
2371                            (unsigned)length);
2372                 return -ENOMEM;
2373         }
2374         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
2375         req.host_dest_addr = cpu_to_le64(dma_handle);
2376         req.dir_idx = cpu_to_le16(index);
2377         req.offset = cpu_to_le32(offset);
2378         req.len = cpu_to_le32(length);
2379
2380         rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2381         if (rc == 0)
2382                 memcpy(data, buf, length);
2383         dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
2384         return rc;
2385 }
2386
2387 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
2388                                 u16 ext, u16 *index, u32 *item_length,
2389                                 u32 *data_length)
2390 {
2391         struct bnxt *bp = netdev_priv(dev);
2392         int rc;
2393         struct hwrm_nvm_find_dir_entry_input req = {0};
2394         struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
2395
2396         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
2397         req.enables = 0;
2398         req.dir_idx = 0;
2399         req.dir_type = cpu_to_le16(type);
2400         req.dir_ordinal = cpu_to_le16(ordinal);
2401         req.dir_ext = cpu_to_le16(ext);
2402         req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
2403         mutex_lock(&bp->hwrm_cmd_lock);
2404         rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2405         if (rc == 0) {
2406                 if (index)
2407                         *index = le16_to_cpu(output->dir_idx);
2408                 if (item_length)
2409                         *item_length = le32_to_cpu(output->dir_item_length);
2410                 if (data_length)
2411                         *data_length = le32_to_cpu(output->dir_data_length);
2412         }
2413         mutex_unlock(&bp->hwrm_cmd_lock);
2414         return rc;
2415 }
2416
2417 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
2418 {
2419         char    *retval = NULL;
2420         char    *p;
2421         char    *value;
2422         int     field = 0;
2423
2424         if (datalen < 1)
2425                 return NULL;
2426         /* null-terminate the log data (removing last '\n'): */
2427         data[datalen - 1] = 0;
2428         for (p = data; *p != 0; p++) {
2429                 field = 0;
2430                 retval = NULL;
2431                 while (*p != 0 && *p != '\n') {
2432                         value = p;
2433                         while (*p != 0 && *p != '\t' && *p != '\n')
2434                                 p++;
2435                         if (field == desired_field)
2436                                 retval = value;
2437                         if (*p != '\t')
2438                                 break;
2439                         *p = 0;
2440                         field++;
2441                         p++;
2442                 }
2443                 if (*p == 0)
2444                         break;
2445                 *p = 0;
2446         }
2447         return retval;
2448 }
2449
2450 static void bnxt_get_pkgver(struct net_device *dev)
2451 {
2452         struct bnxt *bp = netdev_priv(dev);
2453         u16 index = 0;
2454         char *pkgver;
2455         u32 pkglen;
2456         u8 *pkgbuf;
2457         int len;
2458
2459         if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
2460                                  BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
2461                                  &index, NULL, &pkglen) != 0)
2462                 return;
2463
2464         pkgbuf = kzalloc(pkglen, GFP_KERNEL);
2465         if (!pkgbuf) {
2466                 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n",
2467                         pkglen);
2468                 return;
2469         }
2470
2471         if (bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf))
2472                 goto err;
2473
2474         pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf,
2475                                    pkglen);
2476         if (pkgver && *pkgver != 0 && isdigit(*pkgver)) {
2477                 len = strlen(bp->fw_ver_str);
2478                 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1,
2479                          "/pkg %s", pkgver);
2480         }
2481 err:
2482         kfree(pkgbuf);
2483 }
2484
2485 static int bnxt_get_eeprom(struct net_device *dev,
2486                            struct ethtool_eeprom *eeprom,
2487                            u8 *data)
2488 {
2489         u32 index;
2490         u32 offset;
2491
2492         if (eeprom->offset == 0) /* special offset value to get directory */
2493                 return bnxt_get_nvram_directory(dev, eeprom->len, data);
2494
2495         index = eeprom->offset >> 24;
2496         offset = eeprom->offset & 0xffffff;
2497
2498         if (index == 0) {
2499                 netdev_err(dev, "unsupported index value: %d\n", index);
2500                 return -EINVAL;
2501         }
2502
2503         return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
2504 }
2505
2506 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
2507 {
2508         struct bnxt *bp = netdev_priv(dev);
2509         struct hwrm_nvm_erase_dir_entry_input req = {0};
2510
2511         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
2512         req.dir_idx = cpu_to_le16(index);
2513         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2514 }
2515
2516 static int bnxt_set_eeprom(struct net_device *dev,
2517                            struct ethtool_eeprom *eeprom,
2518                            u8 *data)
2519 {
2520         struct bnxt *bp = netdev_priv(dev);
2521         u8 index, dir_op;
2522         u16 type, ext, ordinal, attr;
2523
2524         if (!BNXT_PF(bp)) {
2525                 netdev_err(dev, "NVM write not supported from a virtual function\n");
2526                 return -EINVAL;
2527         }
2528
2529         type = eeprom->magic >> 16;
2530
2531         if (type == 0xffff) { /* special value for directory operations */
2532                 index = eeprom->magic & 0xff;
2533                 dir_op = eeprom->magic >> 8;
2534                 if (index == 0)
2535                         return -EINVAL;
2536                 switch (dir_op) {
2537                 case 0x0e: /* erase */
2538                         if (eeprom->offset != ~eeprom->magic)
2539                                 return -EINVAL;
2540                         return bnxt_erase_nvram_directory(dev, index - 1);
2541                 default:
2542                         return -EINVAL;
2543                 }
2544         }
2545
2546         /* Create or re-write an NVM item: */
2547         if (bnxt_dir_type_is_executable(type))
2548                 return -EOPNOTSUPP;
2549         ext = eeprom->magic & 0xffff;
2550         ordinal = eeprom->offset >> 16;
2551         attr = eeprom->offset & 0xffff;
2552
2553         return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
2554                                 eeprom->len);
2555 }
2556
2557 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
2558 {
2559         struct bnxt *bp = netdev_priv(dev);
2560         struct ethtool_eee *eee = &bp->eee;
2561         struct bnxt_link_info *link_info = &bp->link_info;
2562         u32 advertising =
2563                  _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
2564         int rc = 0;
2565
2566         if (!BNXT_PHY_CFG_ABLE(bp))
2567                 return -EOPNOTSUPP;
2568
2569         if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2570                 return -EOPNOTSUPP;
2571
2572         if (!edata->eee_enabled)
2573                 goto eee_ok;
2574
2575         if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
2576                 netdev_warn(dev, "EEE requires autoneg\n");
2577                 return -EINVAL;
2578         }
2579         if (edata->tx_lpi_enabled) {
2580                 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
2581                                        edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
2582                         netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
2583                                     bp->lpi_tmr_lo, bp->lpi_tmr_hi);
2584                         return -EINVAL;
2585                 } else if (!bp->lpi_tmr_hi) {
2586                         edata->tx_lpi_timer = eee->tx_lpi_timer;
2587                 }
2588         }
2589         if (!edata->advertised) {
2590                 edata->advertised = advertising & eee->supported;
2591         } else if (edata->advertised & ~advertising) {
2592                 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
2593                             edata->advertised, advertising);
2594                 return -EINVAL;
2595         }
2596
2597         eee->advertised = edata->advertised;
2598         eee->tx_lpi_enabled = edata->tx_lpi_enabled;
2599         eee->tx_lpi_timer = edata->tx_lpi_timer;
2600 eee_ok:
2601         eee->eee_enabled = edata->eee_enabled;
2602
2603         if (netif_running(dev))
2604                 rc = bnxt_hwrm_set_link_setting(bp, false, true);
2605
2606         return rc;
2607 }
2608
2609 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
2610 {
2611         struct bnxt *bp = netdev_priv(dev);
2612
2613         if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2614                 return -EOPNOTSUPP;
2615
2616         *edata = bp->eee;
2617         if (!bp->eee.eee_enabled) {
2618                 /* Preserve tx_lpi_timer so that the last value will be used
2619                  * by default when it is re-enabled.
2620                  */
2621                 edata->advertised = 0;
2622                 edata->tx_lpi_enabled = 0;
2623         }
2624
2625         if (!bp->eee.eee_active)
2626                 edata->lp_advertised = 0;
2627
2628         return 0;
2629 }
2630
2631 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
2632                                             u16 page_number, u16 start_addr,
2633                                             u16 data_length, u8 *buf)
2634 {
2635         struct hwrm_port_phy_i2c_read_input req = {0};
2636         struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
2637         int rc, byte_offset = 0;
2638
2639         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
2640         req.i2c_slave_addr = i2c_addr;
2641         req.page_number = cpu_to_le16(page_number);
2642         req.port_id = cpu_to_le16(bp->pf.port_id);
2643         do {
2644                 u16 xfer_size;
2645
2646                 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
2647                 data_length -= xfer_size;
2648                 req.page_offset = cpu_to_le16(start_addr + byte_offset);
2649                 req.data_length = xfer_size;
2650                 req.enables = cpu_to_le32(start_addr + byte_offset ?
2651                                  PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
2652                 mutex_lock(&bp->hwrm_cmd_lock);
2653                 rc = _hwrm_send_message(bp, &req, sizeof(req),
2654                                         HWRM_CMD_TIMEOUT);
2655                 if (!rc)
2656                         memcpy(buf + byte_offset, output->data, xfer_size);
2657                 mutex_unlock(&bp->hwrm_cmd_lock);
2658                 byte_offset += xfer_size;
2659         } while (!rc && data_length > 0);
2660
2661         return rc;
2662 }
2663
2664 static int bnxt_get_module_info(struct net_device *dev,
2665                                 struct ethtool_modinfo *modinfo)
2666 {
2667         u8 data[SFF_DIAG_SUPPORT_OFFSET + 1];
2668         struct bnxt *bp = netdev_priv(dev);
2669         int rc;
2670
2671         /* No point in going further if phy status indicates
2672          * module is not inserted or if it is powered down or
2673          * if it is of type 10GBase-T
2674          */
2675         if (bp->link_info.module_status >
2676                 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
2677                 return -EOPNOTSUPP;
2678
2679         /* This feature is not supported in older firmware versions */
2680         if (bp->hwrm_spec_code < 0x10202)
2681                 return -EOPNOTSUPP;
2682
2683         rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0,
2684                                               SFF_DIAG_SUPPORT_OFFSET + 1,
2685                                               data);
2686         if (!rc) {
2687                 u8 module_id = data[0];
2688                 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET];
2689
2690                 switch (module_id) {
2691                 case SFF_MODULE_ID_SFP:
2692                         modinfo->type = ETH_MODULE_SFF_8472;
2693                         modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2694                         if (!diag_supported)
2695                                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2696                         break;
2697                 case SFF_MODULE_ID_QSFP:
2698                 case SFF_MODULE_ID_QSFP_PLUS:
2699                         modinfo->type = ETH_MODULE_SFF_8436;
2700                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2701                         break;
2702                 case SFF_MODULE_ID_QSFP28:
2703                         modinfo->type = ETH_MODULE_SFF_8636;
2704                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2705                         break;
2706                 default:
2707                         rc = -EOPNOTSUPP;
2708                         break;
2709                 }
2710         }
2711         return rc;
2712 }
2713
2714 static int bnxt_get_module_eeprom(struct net_device *dev,
2715                                   struct ethtool_eeprom *eeprom,
2716                                   u8 *data)
2717 {
2718         struct bnxt *bp = netdev_priv(dev);
2719         u16  start = eeprom->offset, length = eeprom->len;
2720         int rc = 0;
2721
2722         memset(data, 0, eeprom->len);
2723
2724         /* Read A0 portion of the EEPROM */
2725         if (start < ETH_MODULE_SFF_8436_LEN) {
2726                 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
2727                         length = ETH_MODULE_SFF_8436_LEN - start;
2728                 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
2729                                                       start, length, data);
2730                 if (rc)
2731                         return rc;
2732                 start += length;
2733                 data += length;
2734                 length = eeprom->len - length;
2735         }
2736
2737         /* Read A2 portion of the EEPROM */
2738         if (length) {
2739                 start -= ETH_MODULE_SFF_8436_LEN;
2740                 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1,
2741                                                       start, length, data);
2742         }
2743         return rc;
2744 }
2745
2746 static int bnxt_nway_reset(struct net_device *dev)
2747 {
2748         int rc = 0;
2749
2750         struct bnxt *bp = netdev_priv(dev);
2751         struct bnxt_link_info *link_info = &bp->link_info;
2752
2753         if (!BNXT_PHY_CFG_ABLE(bp))
2754                 return -EOPNOTSUPP;
2755
2756         if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
2757                 return -EINVAL;
2758
2759         if (netif_running(dev))
2760                 rc = bnxt_hwrm_set_link_setting(bp, true, false);
2761
2762         return rc;
2763 }
2764
2765 static int bnxt_set_phys_id(struct net_device *dev,
2766                             enum ethtool_phys_id_state state)
2767 {
2768         struct hwrm_port_led_cfg_input req = {0};
2769         struct bnxt *bp = netdev_priv(dev);
2770         struct bnxt_pf_info *pf = &bp->pf;
2771         struct bnxt_led_cfg *led_cfg;
2772         u8 led_state;
2773         __le16 duration;
2774         int i;
2775
2776         if (!bp->num_leds || BNXT_VF(bp))
2777                 return -EOPNOTSUPP;
2778
2779         if (state == ETHTOOL_ID_ACTIVE) {
2780                 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
2781                 duration = cpu_to_le16(500);
2782         } else if (state == ETHTOOL_ID_INACTIVE) {
2783                 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
2784                 duration = cpu_to_le16(0);
2785         } else {
2786                 return -EINVAL;
2787         }
2788         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
2789         req.port_id = cpu_to_le16(pf->port_id);
2790         req.num_leds = bp->num_leds;
2791         led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
2792         for (i = 0; i < bp->num_leds; i++, led_cfg++) {
2793                 req.enables |= BNXT_LED_DFLT_ENABLES(i);
2794                 led_cfg->led_id = bp->leds[i].led_id;
2795                 led_cfg->led_state = led_state;
2796                 led_cfg->led_blink_on = duration;
2797                 led_cfg->led_blink_off = duration;
2798                 led_cfg->led_group_id = bp->leds[i].led_group_id;
2799         }
2800         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2801 }
2802
2803 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
2804 {
2805         struct hwrm_selftest_irq_input req = {0};
2806
2807         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
2808         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2809 }
2810
2811 static int bnxt_test_irq(struct bnxt *bp)
2812 {
2813         int i;
2814
2815         for (i = 0; i < bp->cp_nr_rings; i++) {
2816                 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
2817                 int rc;
2818
2819                 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
2820                 if (rc)
2821                         return rc;
2822         }
2823         return 0;
2824 }
2825
2826 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
2827 {
2828         struct hwrm_port_mac_cfg_input req = {0};
2829
2830         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
2831
2832         req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
2833         if (enable)
2834                 req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
2835         else
2836                 req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
2837         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2838 }
2839
2840 static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds)
2841 {
2842         struct hwrm_port_phy_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
2843         struct hwrm_port_phy_qcaps_input req = {0};
2844         int rc;
2845
2846         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_QCAPS, -1, -1);
2847         mutex_lock(&bp->hwrm_cmd_lock);
2848         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2849         if (!rc)
2850                 *force_speeds = le16_to_cpu(resp->supported_speeds_force_mode);
2851
2852         mutex_unlock(&bp->hwrm_cmd_lock);
2853         return rc;
2854 }
2855
2856 static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
2857                                     struct hwrm_port_phy_cfg_input *req)
2858 {
2859         struct bnxt_link_info *link_info = &bp->link_info;
2860         u16 fw_advertising;
2861         u16 fw_speed;
2862         int rc;
2863
2864         if (!link_info->autoneg ||
2865             (bp->test_info->flags & BNXT_TEST_FL_AN_PHY_LPBK))
2866                 return 0;
2867
2868         rc = bnxt_query_force_speeds(bp, &fw_advertising);
2869         if (rc)
2870                 return rc;
2871
2872         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
2873         if (bp->link_info.link_up)
2874                 fw_speed = bp->link_info.link_speed;
2875         else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
2876                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
2877         else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
2878                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
2879         else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
2880                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
2881         else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
2882                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
2883
2884         req->force_link_speed = cpu_to_le16(fw_speed);
2885         req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
2886                                   PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
2887         rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
2888         req->flags = 0;
2889         req->force_link_speed = cpu_to_le16(0);
2890         return rc;
2891 }
2892
2893 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext)
2894 {
2895         struct hwrm_port_phy_cfg_input req = {0};
2896
2897         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
2898
2899         if (enable) {
2900                 bnxt_disable_an_for_lpbk(bp, &req);
2901                 if (ext)
2902                         req.lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL;
2903                 else
2904                         req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
2905         } else {
2906                 req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
2907         }
2908         req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
2909         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2910 }
2911
2912 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
2913                             u32 raw_cons, int pkt_size)
2914 {
2915         struct bnxt_napi *bnapi = cpr->bnapi;
2916         struct bnxt_rx_ring_info *rxr;
2917         struct bnxt_sw_rx_bd *rx_buf;
2918         struct rx_cmp *rxcmp;
2919         u16 cp_cons, cons;
2920         u8 *data;
2921         u32 len;
2922         int i;
2923
2924         rxr = bnapi->rx_ring;
2925         cp_cons = RING_CMP(raw_cons);
2926         rxcmp = (struct rx_cmp *)
2927                 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
2928         cons = rxcmp->rx_cmp_opaque;
2929         rx_buf = &rxr->rx_buf_ring[cons];
2930         data = rx_buf->data_ptr;
2931         len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
2932         if (len != pkt_size)
2933                 return -EIO;
2934         i = ETH_ALEN;
2935         if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
2936                 return -EIO;
2937         i += ETH_ALEN;
2938         for (  ; i < pkt_size; i++) {
2939                 if (data[i] != (u8)(i & 0xff))
2940                         return -EIO;
2941         }
2942         return 0;
2943 }
2944
2945 static int bnxt_poll_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
2946                               int pkt_size)
2947 {
2948         struct tx_cmp *txcmp;
2949         int rc = -EIO;
2950         u32 raw_cons;
2951         u32 cons;
2952         int i;
2953
2954         raw_cons = cpr->cp_raw_cons;
2955         for (i = 0; i < 200; i++) {
2956                 cons = RING_CMP(raw_cons);
2957                 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
2958
2959                 if (!TX_CMP_VALID(txcmp, raw_cons)) {
2960                         udelay(5);
2961                         continue;
2962                 }
2963
2964                 /* The valid test of the entry must be done first before
2965                  * reading any further.
2966                  */
2967                 dma_rmb();
2968                 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
2969                         rc = bnxt_rx_loopback(bp, cpr, raw_cons, pkt_size);
2970                         raw_cons = NEXT_RAW_CMP(raw_cons);
2971                         raw_cons = NEXT_RAW_CMP(raw_cons);
2972                         break;
2973                 }
2974                 raw_cons = NEXT_RAW_CMP(raw_cons);
2975         }
2976         cpr->cp_raw_cons = raw_cons;
2977         return rc;
2978 }
2979
2980 static int bnxt_run_loopback(struct bnxt *bp)
2981 {
2982         struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
2983         struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0];
2984         struct bnxt_cp_ring_info *cpr;
2985         int pkt_size, i = 0;
2986         struct sk_buff *skb;
2987         dma_addr_t map;
2988         u8 *data;
2989         int rc;
2990
2991         cpr = &rxr->bnapi->cp_ring;
2992         if (bp->flags & BNXT_FLAG_CHIP_P5)
2993                 cpr = cpr->cp_ring_arr[BNXT_RX_HDL];
2994         pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
2995         skb = netdev_alloc_skb(bp->dev, pkt_size);
2996         if (!skb)
2997                 return -ENOMEM;
2998         data = skb_put(skb, pkt_size);
2999         eth_broadcast_addr(data);
3000         i += ETH_ALEN;
3001         ether_addr_copy(&data[i], bp->dev->dev_addr);
3002         i += ETH_ALEN;
3003         for ( ; i < pkt_size; i++)
3004                 data[i] = (u8)(i & 0xff);
3005
3006         map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
3007                              PCI_DMA_TODEVICE);
3008         if (dma_mapping_error(&bp->pdev->dev, map)) {
3009                 dev_kfree_skb(skb);
3010                 return -EIO;
3011         }
3012         bnxt_xmit_bd(bp, txr, map, pkt_size);
3013
3014         /* Sync BD data before updating doorbell */
3015         wmb();
3016
3017         bnxt_db_write(bp, &txr->tx_db, txr->tx_prod);
3018         rc = bnxt_poll_loopback(bp, cpr, pkt_size);
3019
3020         dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
3021         dev_kfree_skb(skb);
3022         return rc;
3023 }
3024
3025 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
3026 {
3027         struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
3028         struct hwrm_selftest_exec_input req = {0};
3029         int rc;
3030
3031         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
3032         mutex_lock(&bp->hwrm_cmd_lock);
3033         resp->test_success = 0;
3034         req.flags = test_mask;
3035         rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
3036         *test_results = resp->test_success;
3037         mutex_unlock(&bp->hwrm_cmd_lock);
3038         return rc;
3039 }
3040
3041 #define BNXT_DRV_TESTS                  4
3042 #define BNXT_MACLPBK_TEST_IDX           (bp->num_tests - BNXT_DRV_TESTS)
3043 #define BNXT_PHYLPBK_TEST_IDX           (BNXT_MACLPBK_TEST_IDX + 1)
3044 #define BNXT_EXTLPBK_TEST_IDX           (BNXT_MACLPBK_TEST_IDX + 2)
3045 #define BNXT_IRQ_TEST_IDX               (BNXT_MACLPBK_TEST_IDX + 3)
3046
3047 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
3048                            u64 *buf)
3049 {
3050         struct bnxt *bp = netdev_priv(dev);
3051         bool do_ext_lpbk = false;
3052         bool offline = false;
3053         u8 test_results = 0;
3054         u8 test_mask = 0;
3055         int rc = 0, i;
3056
3057         if (!bp->num_tests || !BNXT_SINGLE_PF(bp))
3058                 return;
3059         memset(buf, 0, sizeof(u64) * bp->num_tests);
3060         if (!netif_running(dev)) {
3061                 etest->flags |= ETH_TEST_FL_FAILED;
3062                 return;
3063         }
3064
3065         if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) &&
3066             (bp->test_info->flags & BNXT_TEST_FL_EXT_LPBK))
3067                 do_ext_lpbk = true;
3068
3069         if (etest->flags & ETH_TEST_FL_OFFLINE) {
3070                 if (bp->pf.active_vfs) {
3071                         etest->flags |= ETH_TEST_FL_FAILED;
3072                         netdev_warn(dev, "Offline tests cannot be run with active VFs\n");
3073                         return;
3074                 }
3075                 offline = true;
3076         }
3077
3078         for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
3079                 u8 bit_val = 1 << i;
3080
3081                 if (!(bp->test_info->offline_mask & bit_val))
3082                         test_mask |= bit_val;
3083                 else if (offline)
3084                         test_mask |= bit_val;
3085         }
3086         if (!offline) {
3087                 bnxt_run_fw_tests(bp, test_mask, &test_results);
3088         } else {
3089                 rc = bnxt_close_nic(bp, false, false);
3090                 if (rc)
3091                         return;
3092                 bnxt_run_fw_tests(bp, test_mask, &test_results);
3093
3094                 buf[BNXT_MACLPBK_TEST_IDX] = 1;
3095                 bnxt_hwrm_mac_loopback(bp, true);
3096                 msleep(250);
3097                 rc = bnxt_half_open_nic(bp);
3098                 if (rc) {
3099                         bnxt_hwrm_mac_loopback(bp, false);
3100                         etest->flags |= ETH_TEST_FL_FAILED;
3101                         return;
3102                 }
3103                 if (bnxt_run_loopback(bp))
3104                         etest->flags |= ETH_TEST_FL_FAILED;
3105                 else
3106                         buf[BNXT_MACLPBK_TEST_IDX] = 0;
3107
3108                 bnxt_hwrm_mac_loopback(bp, false);
3109                 bnxt_hwrm_phy_loopback(bp, true, false);
3110                 msleep(1000);
3111                 if (bnxt_run_loopback(bp)) {
3112                         buf[BNXT_PHYLPBK_TEST_IDX] = 1;
3113                         etest->flags |= ETH_TEST_FL_FAILED;
3114                 }
3115                 if (do_ext_lpbk) {
3116                         etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE;
3117                         bnxt_hwrm_phy_loopback(bp, true, true);
3118                         msleep(1000);
3119                         if (bnxt_run_loopback(bp)) {
3120                                 buf[BNXT_EXTLPBK_TEST_IDX] = 1;
3121                                 etest->flags |= ETH_TEST_FL_FAILED;
3122                         }
3123                 }
3124                 bnxt_hwrm_phy_loopback(bp, false, false);
3125                 bnxt_half_close_nic(bp);
3126                 rc = bnxt_open_nic(bp, false, true);
3127         }
3128         if (rc || bnxt_test_irq(bp)) {
3129                 buf[BNXT_IRQ_TEST_IDX] = 1;
3130                 etest->flags |= ETH_TEST_FL_FAILED;
3131         }
3132         for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
3133                 u8 bit_val = 1 << i;
3134
3135                 if ((test_mask & bit_val) && !(test_results & bit_val)) {
3136                         buf[i] = 1;
3137                         etest->flags |= ETH_TEST_FL_FAILED;
3138                 }
3139         }
3140 }
3141
3142 static int bnxt_reset(struct net_device *dev, u32 *flags)
3143 {
3144         struct bnxt *bp = netdev_priv(dev);
3145         bool reload = false;
3146         u32 req = *flags;
3147
3148         if (!req)
3149                 return -EINVAL;
3150
3151         if (!BNXT_PF(bp)) {
3152                 netdev_err(dev, "Reset is not supported from a VF\n");
3153                 return -EOPNOTSUPP;
3154         }
3155
3156         if (pci_vfs_assigned(bp->pdev) &&
3157             !(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) {
3158                 netdev_err(dev,
3159                            "Reset not allowed when VFs are assigned to VMs\n");
3160                 return -EBUSY;
3161         }
3162
3163         if ((req & BNXT_FW_RESET_CHIP) == BNXT_FW_RESET_CHIP) {
3164                 /* This feature is not supported in older firmware versions */
3165                 if (bp->hwrm_spec_code >= 0x10803) {
3166                         if (!bnxt_firmware_reset_chip(dev)) {
3167                                 netdev_info(dev, "Firmware reset request successful.\n");
3168                                 if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET))
3169                                         reload = true;
3170                                 *flags &= ~BNXT_FW_RESET_CHIP;
3171                         }
3172                 } else if (req == BNXT_FW_RESET_CHIP) {
3173                         return -EOPNOTSUPP; /* only request, fail hard */
3174                 }
3175         }
3176
3177         if (req & BNXT_FW_RESET_AP) {
3178                 /* This feature is not supported in older firmware versions */
3179                 if (bp->hwrm_spec_code >= 0x10803) {
3180                         if (!bnxt_firmware_reset_ap(dev)) {
3181                                 netdev_info(dev, "Reset application processor successful.\n");
3182                                 reload = true;
3183                                 *flags &= ~BNXT_FW_RESET_AP;
3184                         }
3185                 } else if (req == BNXT_FW_RESET_AP) {
3186                         return -EOPNOTSUPP; /* only request, fail hard */
3187                 }
3188         }
3189
3190         if (reload)
3191                 netdev_info(dev, "Reload driver to complete reset\n");
3192
3193         return 0;
3194 }
3195
3196 static int bnxt_hwrm_dbg_dma_data(struct bnxt *bp, void *msg, int msg_len,
3197                                   struct bnxt_hwrm_dbg_dma_info *info)
3198 {
3199         struct hwrm_dbg_cmn_output *cmn_resp = bp->hwrm_cmd_resp_addr;
3200         struct hwrm_dbg_cmn_input *cmn_req = msg;
3201         __le16 *seq_ptr = msg + info->seq_off;
3202         u16 seq = 0, len, segs_off;
3203         void *resp = cmn_resp;
3204         dma_addr_t dma_handle;
3205         int rc, off = 0;
3206         void *dma_buf;
3207
3208         dma_buf = dma_alloc_coherent(&bp->pdev->dev, info->dma_len, &dma_handle,
3209                                      GFP_KERNEL);
3210         if (!dma_buf)
3211                 return -ENOMEM;
3212
3213         segs_off = offsetof(struct hwrm_dbg_coredump_list_output,
3214                             total_segments);
3215         cmn_req->host_dest_addr = cpu_to_le64(dma_handle);
3216         cmn_req->host_buf_len = cpu_to_le32(info->dma_len);
3217         mutex_lock(&bp->hwrm_cmd_lock);
3218         while (1) {
3219                 *seq_ptr = cpu_to_le16(seq);
3220                 rc = _hwrm_send_message(bp, msg, msg_len,
3221                                         HWRM_COREDUMP_TIMEOUT);
3222                 if (rc)
3223                         break;
3224
3225                 len = le16_to_cpu(*((__le16 *)(resp + info->data_len_off)));
3226                 if (!seq &&
3227                     cmn_req->req_type == cpu_to_le16(HWRM_DBG_COREDUMP_LIST)) {
3228                         info->segs = le16_to_cpu(*((__le16 *)(resp +
3229                                                               segs_off)));
3230                         if (!info->segs) {
3231                                 rc = -EIO;
3232                                 break;
3233                         }
3234
3235                         info->dest_buf_size = info->segs *
3236                                         sizeof(struct coredump_segment_record);
3237                         info->dest_buf = kmalloc(info->dest_buf_size,
3238                                                  GFP_KERNEL);
3239                         if (!info->dest_buf) {
3240                                 rc = -ENOMEM;
3241                                 break;
3242                         }
3243                 }
3244
3245                 if (info->dest_buf) {
3246                         if ((info->seg_start + off + len) <=
3247                             BNXT_COREDUMP_BUF_LEN(info->buf_len)) {
3248                                 memcpy(info->dest_buf + off, dma_buf, len);
3249                         } else {
3250                                 rc = -ENOBUFS;
3251                                 break;
3252                         }
3253                 }
3254
3255                 if (cmn_req->req_type ==
3256                                 cpu_to_le16(HWRM_DBG_COREDUMP_RETRIEVE))
3257                         info->dest_buf_size += len;
3258
3259                 if (!(cmn_resp->flags & HWRM_DBG_CMN_FLAGS_MORE))
3260                         break;
3261
3262                 seq++;
3263                 off += len;
3264         }
3265         mutex_unlock(&bp->hwrm_cmd_lock);
3266         dma_free_coherent(&bp->pdev->dev, info->dma_len, dma_buf, dma_handle);
3267         return rc;
3268 }
3269
3270 static int bnxt_hwrm_dbg_coredump_list(struct bnxt *bp,
3271                                        struct bnxt_coredump *coredump)
3272 {
3273         struct hwrm_dbg_coredump_list_input req = {0};
3274         struct bnxt_hwrm_dbg_dma_info info = {NULL};
3275         int rc;
3276
3277         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_LIST, -1, -1);
3278
3279         info.dma_len = COREDUMP_LIST_BUF_LEN;
3280         info.seq_off = offsetof(struct hwrm_dbg_coredump_list_input, seq_no);
3281         info.data_len_off = offsetof(struct hwrm_dbg_coredump_list_output,
3282                                      data_len);
3283
3284         rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info);
3285         if (!rc) {
3286                 coredump->data = info.dest_buf;
3287                 coredump->data_size = info.dest_buf_size;
3288                 coredump->total_segs = info.segs;
3289         }
3290         return rc;
3291 }
3292
3293 static int bnxt_hwrm_dbg_coredump_initiate(struct bnxt *bp, u16 component_id,
3294                                            u16 segment_id)
3295 {
3296         struct hwrm_dbg_coredump_initiate_input req = {0};
3297
3298         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_INITIATE, -1, -1);
3299         req.component_id = cpu_to_le16(component_id);
3300         req.segment_id = cpu_to_le16(segment_id);
3301
3302         return hwrm_send_message(bp, &req, sizeof(req), HWRM_COREDUMP_TIMEOUT);
3303 }
3304
3305 static int bnxt_hwrm_dbg_coredump_retrieve(struct bnxt *bp, u16 component_id,
3306                                            u16 segment_id, u32 *seg_len,
3307                                            void *buf, u32 buf_len, u32 offset)
3308 {
3309         struct hwrm_dbg_coredump_retrieve_input req = {0};
3310         struct bnxt_hwrm_dbg_dma_info info = {NULL};
3311         int rc;
3312
3313         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_RETRIEVE, -1, -1);
3314         req.component_id = cpu_to_le16(component_id);
3315         req.segment_id = cpu_to_le16(segment_id);
3316
3317         info.dma_len = COREDUMP_RETRIEVE_BUF_LEN;
3318         info.seq_off = offsetof(struct hwrm_dbg_coredump_retrieve_input,
3319                                 seq_no);
3320         info.data_len_off = offsetof(struct hwrm_dbg_coredump_retrieve_output,
3321                                      data_len);
3322         if (buf) {
3323                 info.dest_buf = buf + offset;
3324                 info.buf_len = buf_len;
3325                 info.seg_start = offset;
3326         }
3327
3328         rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info);
3329         if (!rc)
3330                 *seg_len = info.dest_buf_size;
3331
3332         return rc;
3333 }
3334
3335 static void
3336 bnxt_fill_coredump_seg_hdr(struct bnxt *bp,
3337                            struct bnxt_coredump_segment_hdr *seg_hdr,
3338                            struct coredump_segment_record *seg_rec, u32 seg_len,
3339                            int status, u32 duration, u32 instance)
3340 {
3341         memset(seg_hdr, 0, sizeof(*seg_hdr));
3342         memcpy(seg_hdr->signature, "sEgM", 4);
3343         if (seg_rec) {
3344                 seg_hdr->component_id = (__force __le32)seg_rec->component_id;
3345                 seg_hdr->segment_id = (__force __le32)seg_rec->segment_id;
3346                 seg_hdr->low_version = seg_rec->version_low;
3347                 seg_hdr->high_version = seg_rec->version_hi;
3348         } else {
3349                 /* For hwrm_ver_get response Component id = 2
3350                  * and Segment id = 0
3351                  */
3352                 seg_hdr->component_id = cpu_to_le32(2);
3353                 seg_hdr->segment_id = 0;
3354         }
3355         seg_hdr->function_id = cpu_to_le16(bp->pdev->devfn);
3356         seg_hdr->length = cpu_to_le32(seg_len);
3357         seg_hdr->status = cpu_to_le32(status);
3358         seg_hdr->duration = cpu_to_le32(duration);
3359         seg_hdr->data_offset = cpu_to_le32(sizeof(*seg_hdr));
3360         seg_hdr->instance = cpu_to_le32(instance);
3361 }
3362
3363 static void
3364 bnxt_fill_coredump_record(struct bnxt *bp, struct bnxt_coredump_record *record,
3365                           time64_t start, s16 start_utc, u16 total_segs,
3366                           int status)
3367 {
3368         time64_t end = ktime_get_real_seconds();
3369         u32 os_ver_major = 0, os_ver_minor = 0;
3370         struct tm tm;
3371
3372         time64_to_tm(start, 0, &tm);
3373         memset(record, 0, sizeof(*record));
3374         memcpy(record->signature, "cOrE", 4);
3375         record->flags = 0;
3376         record->low_version = 0;
3377         record->high_version = 1;
3378         record->asic_state = 0;
3379         strlcpy(record->system_name, utsname()->nodename,
3380                 sizeof(record->system_name));
3381         record->year = cpu_to_le16(tm.tm_year + 1900);
3382         record->month = cpu_to_le16(tm.tm_mon + 1);
3383         record->day = cpu_to_le16(tm.tm_mday);
3384         record->hour = cpu_to_le16(tm.tm_hour);
3385         record->minute = cpu_to_le16(tm.tm_min);
3386         record->second = cpu_to_le16(tm.tm_sec);
3387         record->utc_bias = cpu_to_le16(start_utc);
3388         strcpy(record->commandline, "ethtool -w");
3389         record->total_segments = cpu_to_le32(total_segs);
3390
3391         sscanf(utsname()->release, "%u.%u", &os_ver_major, &os_ver_minor);
3392         record->os_ver_major = cpu_to_le32(os_ver_major);
3393         record->os_ver_minor = cpu_to_le32(os_ver_minor);
3394
3395         strlcpy(record->os_name, utsname()->sysname, 32);
3396         time64_to_tm(end, 0, &tm);
3397         record->end_year = cpu_to_le16(tm.tm_year + 1900);
3398         record->end_month = cpu_to_le16(tm.tm_mon + 1);
3399         record->end_day = cpu_to_le16(tm.tm_mday);
3400         record->end_hour = cpu_to_le16(tm.tm_hour);
3401         record->end_minute = cpu_to_le16(tm.tm_min);
3402         record->end_second = cpu_to_le16(tm.tm_sec);
3403         record->end_utc_bias = cpu_to_le16(sys_tz.tz_minuteswest * 60);
3404         record->asic_id1 = cpu_to_le32(bp->chip_num << 16 |
3405                                        bp->ver_resp.chip_rev << 8 |
3406                                        bp->ver_resp.chip_metal);
3407         record->asic_id2 = 0;
3408         record->coredump_status = cpu_to_le32(status);
3409         record->ioctl_low_version = 0;
3410         record->ioctl_high_version = 0;
3411 }
3412
3413 static int bnxt_get_coredump(struct bnxt *bp, void *buf, u32 *dump_len)
3414 {
3415         u32 ver_get_resp_len = sizeof(struct hwrm_ver_get_output);
3416         u32 offset = 0, seg_hdr_len, seg_record_len, buf_len = 0;
3417         struct coredump_segment_record *seg_record = NULL;
3418         struct bnxt_coredump_segment_hdr seg_hdr;
3419         struct bnxt_coredump coredump = {NULL};
3420         time64_t start_time;
3421         u16 start_utc;
3422         int rc = 0, i;
3423
3424         if (buf)
3425                 buf_len = *dump_len;
3426
3427         start_time = ktime_get_real_seconds();
3428         start_utc = sys_tz.tz_minuteswest * 60;
3429         seg_hdr_len = sizeof(seg_hdr);
3430
3431         /* First segment should be hwrm_ver_get response */
3432         *dump_len = seg_hdr_len + ver_get_resp_len;
3433         if (buf) {
3434                 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, NULL, ver_get_resp_len,
3435                                            0, 0, 0);
3436                 memcpy(buf + offset, &seg_hdr, seg_hdr_len);
3437                 offset += seg_hdr_len;
3438                 memcpy(buf + offset, &bp->ver_resp, ver_get_resp_len);
3439                 offset += ver_get_resp_len;
3440         }
3441
3442         rc = bnxt_hwrm_dbg_coredump_list(bp, &coredump);
3443         if (rc) {
3444                 netdev_err(bp->dev, "Failed to get coredump segment list\n");
3445                 goto err;
3446         }
3447
3448         *dump_len += seg_hdr_len * coredump.total_segs;
3449
3450         seg_record = (struct coredump_segment_record *)coredump.data;
3451         seg_record_len = sizeof(*seg_record);
3452
3453         for (i = 0; i < coredump.total_segs; i++) {
3454                 u16 comp_id = le16_to_cpu(seg_record->component_id);
3455                 u16 seg_id = le16_to_cpu(seg_record->segment_id);
3456                 u32 duration = 0, seg_len = 0;
3457                 unsigned long start, end;
3458
3459                 if (buf && ((offset + seg_hdr_len) >
3460                             BNXT_COREDUMP_BUF_LEN(buf_len))) {
3461                         rc = -ENOBUFS;
3462                         goto err;
3463                 }
3464
3465                 start = jiffies;
3466
3467                 rc = bnxt_hwrm_dbg_coredump_initiate(bp, comp_id, seg_id);
3468                 if (rc) {
3469                         netdev_err(bp->dev,
3470                                    "Failed to initiate coredump for seg = %d\n",
3471                                    seg_record->segment_id);
3472                         goto next_seg;
3473                 }
3474
3475                 /* Write segment data into the buffer */
3476                 rc = bnxt_hwrm_dbg_coredump_retrieve(bp, comp_id, seg_id,
3477                                                      &seg_len, buf, buf_len,
3478                                                      offset + seg_hdr_len);
3479                 if (rc && rc == -ENOBUFS)
3480                         goto err;
3481                 else if (rc)
3482                         netdev_err(bp->dev,
3483                                    "Failed to retrieve coredump for seg = %d\n",
3484                                    seg_record->segment_id);
3485
3486 next_seg:
3487                 end = jiffies;
3488                 duration = jiffies_to_msecs(end - start);
3489                 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, seg_record, seg_len,
3490                                            rc, duration, 0);
3491
3492                 if (buf) {
3493                         /* Write segment header into the buffer */
3494                         memcpy(buf + offset, &seg_hdr, seg_hdr_len);
3495                         offset += seg_hdr_len + seg_len;
3496                 }
3497
3498                 *dump_len += seg_len;
3499                 seg_record =
3500                         (struct coredump_segment_record *)((u8 *)seg_record +
3501                                                            seg_record_len);
3502         }
3503
3504 err:
3505         if (buf)
3506                 bnxt_fill_coredump_record(bp, buf + offset, start_time,
3507                                           start_utc, coredump.total_segs + 1,
3508                                           rc);
3509         kfree(coredump.data);
3510         *dump_len += sizeof(struct bnxt_coredump_record);
3511         if (rc == -ENOBUFS)
3512                 netdev_err(bp->dev, "Firmware returned large coredump buffer\n");
3513         return rc;
3514 }
3515
3516 static int bnxt_set_dump(struct net_device *dev, struct ethtool_dump *dump)
3517 {
3518         struct bnxt *bp = netdev_priv(dev);
3519
3520         if (dump->flag > BNXT_DUMP_CRASH) {
3521                 netdev_info(dev, "Supports only Live(0) and Crash(1) dumps.\n");
3522                 return -EINVAL;
3523         }
3524
3525         if (!IS_ENABLED(CONFIG_TEE_BNXT_FW) && dump->flag == BNXT_DUMP_CRASH) {
3526                 netdev_info(dev, "Cannot collect crash dump as TEE_BNXT_FW config option is not enabled.\n");
3527                 return -EOPNOTSUPP;
3528         }
3529
3530         bp->dump_flag = dump->flag;
3531         return 0;
3532 }
3533
3534 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump)
3535 {
3536         struct bnxt *bp = netdev_priv(dev);
3537
3538         if (bp->hwrm_spec_code < 0x10801)
3539                 return -EOPNOTSUPP;
3540
3541         dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 |
3542                         bp->ver_resp.hwrm_fw_min_8b << 16 |
3543                         bp->ver_resp.hwrm_fw_bld_8b << 8 |
3544                         bp->ver_resp.hwrm_fw_rsvd_8b;
3545
3546         dump->flag = bp->dump_flag;
3547         if (bp->dump_flag == BNXT_DUMP_CRASH)
3548                 dump->len = BNXT_CRASH_DUMP_LEN;
3549         else
3550                 bnxt_get_coredump(bp, NULL, &dump->len);
3551         return 0;
3552 }
3553
3554 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump,
3555                               void *buf)
3556 {
3557         struct bnxt *bp = netdev_priv(dev);
3558
3559         if (bp->hwrm_spec_code < 0x10801)
3560                 return -EOPNOTSUPP;
3561
3562         memset(buf, 0, dump->len);
3563
3564         dump->flag = bp->dump_flag;
3565         if (dump->flag == BNXT_DUMP_CRASH) {
3566 #ifdef CONFIG_TEE_BNXT_FW
3567                 return tee_bnxt_copy_coredump(buf, 0, dump->len);
3568 #endif
3569         } else {
3570                 return bnxt_get_coredump(bp, buf, &dump->len);
3571         }
3572
3573         return 0;
3574 }
3575
3576 void bnxt_ethtool_init(struct bnxt *bp)
3577 {
3578         struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
3579         struct hwrm_selftest_qlist_input req = {0};
3580         struct bnxt_test_info *test_info;
3581         struct net_device *dev = bp->dev;
3582         int i, rc;
3583
3584         if (!(bp->fw_cap & BNXT_FW_CAP_PKG_VER))
3585                 bnxt_get_pkgver(dev);
3586
3587         bp->num_tests = 0;
3588         if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp))
3589                 return;
3590
3591         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
3592         mutex_lock(&bp->hwrm_cmd_lock);
3593         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3594         if (rc)
3595                 goto ethtool_init_exit;
3596
3597         test_info = bp->test_info;
3598         if (!test_info)
3599                 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
3600         if (!test_info)
3601                 goto ethtool_init_exit;
3602
3603         bp->test_info = test_info;
3604         bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
3605         if (bp->num_tests > BNXT_MAX_TEST)
3606                 bp->num_tests = BNXT_MAX_TEST;
3607
3608         test_info->offline_mask = resp->offline_tests;
3609         test_info->timeout = le16_to_cpu(resp->test_timeout);
3610         if (!test_info->timeout)
3611                 test_info->timeout = HWRM_CMD_TIMEOUT;
3612         for (i = 0; i < bp->num_tests; i++) {
3613                 char *str = test_info->string[i];
3614                 char *fw_str = resp->test0_name + i * 32;
3615
3616                 if (i == BNXT_MACLPBK_TEST_IDX) {
3617                         strcpy(str, "Mac loopback test (offline)");
3618                 } else if (i == BNXT_PHYLPBK_TEST_IDX) {
3619                         strcpy(str, "Phy loopback test (offline)");
3620                 } else if (i == BNXT_EXTLPBK_TEST_IDX) {
3621                         strcpy(str, "Ext loopback test (offline)");
3622                 } else if (i == BNXT_IRQ_TEST_IDX) {
3623                         strcpy(str, "Interrupt_test (offline)");
3624                 } else {
3625                         strlcpy(str, fw_str, ETH_GSTRING_LEN);
3626                         strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
3627                         if (test_info->offline_mask & (1 << i))
3628                                 strncat(str, " (offline)",
3629                                         ETH_GSTRING_LEN - strlen(str));
3630                         else
3631                                 strncat(str, " (online)",
3632                                         ETH_GSTRING_LEN - strlen(str));
3633                 }
3634         }
3635
3636 ethtool_init_exit:
3637         mutex_unlock(&bp->hwrm_cmd_lock);
3638 }
3639
3640 void bnxt_ethtool_free(struct bnxt *bp)
3641 {
3642         kfree(bp->test_info);
3643         bp->test_info = NULL;
3644 }
3645
3646 const struct ethtool_ops bnxt_ethtool_ops = {
3647         .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
3648                                      ETHTOOL_COALESCE_MAX_FRAMES |
3649                                      ETHTOOL_COALESCE_USECS_IRQ |
3650                                      ETHTOOL_COALESCE_MAX_FRAMES_IRQ |
3651                                      ETHTOOL_COALESCE_STATS_BLOCK_USECS |
3652                                      ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
3653         .get_link_ksettings     = bnxt_get_link_ksettings,
3654         .set_link_ksettings     = bnxt_set_link_ksettings,
3655         .get_pauseparam         = bnxt_get_pauseparam,
3656         .set_pauseparam         = bnxt_set_pauseparam,
3657         .get_drvinfo            = bnxt_get_drvinfo,
3658         .get_regs_len           = bnxt_get_regs_len,
3659         .get_regs               = bnxt_get_regs,
3660         .get_wol                = bnxt_get_wol,
3661         .set_wol                = bnxt_set_wol,
3662         .get_coalesce           = bnxt_get_coalesce,
3663         .set_coalesce           = bnxt_set_coalesce,
3664         .get_msglevel           = bnxt_get_msglevel,
3665         .set_msglevel           = bnxt_set_msglevel,
3666         .get_sset_count         = bnxt_get_sset_count,
3667         .get_strings            = bnxt_get_strings,
3668         .get_ethtool_stats      = bnxt_get_ethtool_stats,
3669         .set_ringparam          = bnxt_set_ringparam,
3670         .get_ringparam          = bnxt_get_ringparam,
3671         .get_channels           = bnxt_get_channels,
3672         .set_channels           = bnxt_set_channels,
3673         .get_rxnfc              = bnxt_get_rxnfc,
3674         .set_rxnfc              = bnxt_set_rxnfc,
3675         .get_rxfh_indir_size    = bnxt_get_rxfh_indir_size,
3676         .get_rxfh_key_size      = bnxt_get_rxfh_key_size,
3677         .get_rxfh               = bnxt_get_rxfh,
3678         .set_rxfh               = bnxt_set_rxfh,
3679         .flash_device           = bnxt_flash_device,
3680         .get_eeprom_len         = bnxt_get_eeprom_len,
3681         .get_eeprom             = bnxt_get_eeprom,
3682         .set_eeprom             = bnxt_set_eeprom,
3683         .get_link               = bnxt_get_link,
3684         .get_eee                = bnxt_get_eee,
3685         .set_eee                = bnxt_set_eee,
3686         .get_module_info        = bnxt_get_module_info,
3687         .get_module_eeprom      = bnxt_get_module_eeprom,
3688         .nway_reset             = bnxt_nway_reset,
3689         .set_phys_id            = bnxt_set_phys_id,
3690         .self_test              = bnxt_self_test,
3691         .reset                  = bnxt_reset,
3692         .set_dump               = bnxt_set_dump,
3693         .get_dump_flag          = bnxt_get_dump_flag,
3694         .get_dump_data          = bnxt_get_dump_data,
3695 };