drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c

   1 /* Broadcom NetXtreme-C/E network driver.
   2  *
   3  * Copyright (c) 2014-2016 Broadcom Corporation
   4  * Copyright (c) 2016-2017 Broadcom Limited
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation.
   9  */
  10
  11 #include <linux/ctype.h>
  12 #include <linux/stringify.h>
  13 #include <linux/ethtool.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/pci.h>
  16 #include <linux/etherdevice.h>
  17 #include <linux/crc32.h>
  18 #include <linux/firmware.h>
  19 #include <linux/utsname.h>
  20 #include <linux/time.h>
  21 #include "bnxt_hsi.h"
  22 #include "bnxt.h"
  23 #include "bnxt_xdp.h"
  24 #include "bnxt_ethtool.h"
  25 #include "bnxt_nvm_defs.h"      /* NVRAM content constant and structure defs */
  26 #include "bnxt_fw_hdr.h"        /* Firmware hdr constant and structure defs */
  27 #include "bnxt_coredump.h"
  28 #define FLASH_NVRAM_TIMEOUT     ((HWRM_CMD_TIMEOUT) * 100)
  29 #define FLASH_PACKAGE_TIMEOUT   ((HWRM_CMD_TIMEOUT) * 200)
  30 #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  31
  32 static u32 bnxt_get_msglevel(struct net_device *dev)
  33 {
  34         struct bnxt *bp = netdev_priv(dev);
  35
  36         return bp->msg_enable;
  37 }
  38
  39 static void bnxt_set_msglevel(struct net_device *dev, u32 value)
  40 {
  41         struct bnxt *bp = netdev_priv(dev);
  42
  43         bp->msg_enable = value;
  44 }
  45
  46 static int bnxt_get_coalesce(struct net_device *dev,
  47                              struct ethtool_coalesce *coal)
  48 {
  49         struct bnxt *bp = netdev_priv(dev);
  50         struct bnxt_coal *hw_coal;
  51         u16 mult;
  52
  53         memset(coal, 0, sizeof(*coal));
  54
  55         coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM;
  56
  57         hw_coal = &bp->rx_coal;
  58         mult = hw_coal->bufs_per_record;
  59         coal->rx_coalesce_usecs = hw_coal->coal_ticks;
  60         coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult;
  61         coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
  62         coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
  63
  64         hw_coal = &bp->tx_coal;
  65         mult = hw_coal->bufs_per_record;
  66         coal->tx_coalesce_usecs = hw_coal->coal_ticks;
  67         coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult;
  68         coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
  69         coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
  70
  71         coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
  72
  73         return 0;
  74 }
  75
  76 static int bnxt_set_coalesce(struct net_device *dev,
  77                              struct ethtool_coalesce *coal)
  78 {
  79         struct bnxt *bp = netdev_priv(dev);
  80         bool update_stats = false;
  81         struct bnxt_coal *hw_coal;
  82         int rc = 0;
  83         u16 mult;
  84
  85         if (coal->use_adaptive_rx_coalesce) {
  86                 bp->flags |= BNXT_FLAG_DIM;
  87         } else {
  88                 if (bp->flags & BNXT_FLAG_DIM) {
  89                         bp->flags &= ~(BNXT_FLAG_DIM);
  90                         goto reset_coalesce;
  91                 }
  92         }
  93
  94         hw_coal = &bp->rx_coal;
  95         mult = hw_coal->bufs_per_record;
  96         hw_coal->coal_ticks = coal->rx_coalesce_usecs;
  97         hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult;
  98         hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq;
  99         hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult;
 100
 101         hw_coal = &bp->tx_coal;
 102         mult = hw_coal->bufs_per_record;
 103         hw_coal->coal_ticks = coal->tx_coalesce_usecs;
 104         hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult;
 105         hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq;
 106         hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult;
 107
 108         if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
 109                 u32 stats_ticks = coal->stats_block_coalesce_usecs;
 110
 111                 /* Allow 0, which means disable. */
 112                 if (stats_ticks)
 113                         stats_ticks = clamp_t(u32, stats_ticks,
 114                                               BNXT_MIN_STATS_COAL_TICKS,
 115                                               BNXT_MAX_STATS_COAL_TICKS);
 116                 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
 117                 bp->stats_coal_ticks = stats_ticks;
 118                 if (bp->stats_coal_ticks)
 119                         bp->current_interval =
 120                                 bp->stats_coal_ticks * HZ / 1000000;
 121                 else
 122                         bp->current_interval = BNXT_TIMER_INTERVAL;
 123                 update_stats = true;
 124         }
 125
 126 reset_coalesce:
 127         if (netif_running(dev)) {
 128                 if (update_stats) {
 129                         rc = bnxt_close_nic(bp, true, false);
 130                         if (!rc)
 131                                 rc = bnxt_open_nic(bp, true, false);
 132                 } else {
 133                         rc = bnxt_hwrm_set_coal(bp);
 134                 }
 135         }
 136
 137         return rc;
 138 }
 139
 140 static const char * const bnxt_ring_rx_stats_str[] = {
 141         "rx_ucast_packets",
 142         "rx_mcast_packets",
 143         "rx_bcast_packets",
 144         "rx_discards",
 145         "rx_errors",
 146         "rx_ucast_bytes",
 147         "rx_mcast_bytes",
 148         "rx_bcast_bytes",
 149 };
 150
 151 static const char * const bnxt_ring_tx_stats_str[] = {
 152         "tx_ucast_packets",
 153         "tx_mcast_packets",
 154         "tx_bcast_packets",
 155         "tx_errors",
 156         "tx_discards",
 157         "tx_ucast_bytes",
 158         "tx_mcast_bytes",
 159         "tx_bcast_bytes",
 160 };
 161
 162 static const char * const bnxt_ring_tpa_stats_str[] = {
 163         "tpa_packets",
 164         "tpa_bytes",
 165         "tpa_events",
 166         "tpa_aborts",
 167 };
 168
 169 static const char * const bnxt_ring_tpa2_stats_str[] = {
 170         "rx_tpa_eligible_pkt",
 171         "rx_tpa_eligible_bytes",
 172         "rx_tpa_pkt",
 173         "rx_tpa_bytes",
 174         "rx_tpa_errors",
 175 };
 176
 177 static const char * const bnxt_rx_sw_stats_str[] = {
 178         "rx_l4_csum_errors",
 179         "rx_buf_errors",
 180 };
 181
 182 static const char * const bnxt_cmn_sw_stats_str[] = {
 183         "missed_irqs",
 184 };
 185
 186 #define BNXT_RX_STATS_ENTRY(counter)    \
 187         { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
 188
 189 #define BNXT_TX_STATS_ENTRY(counter)    \
 190         { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
 191
 192 #define BNXT_RX_STATS_EXT_ENTRY(counter)        \
 193         { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) }
 194
 195 #define BNXT_TX_STATS_EXT_ENTRY(counter)        \
 196         { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) }
 197
 198 #define BNXT_RX_STATS_EXT_PFC_ENTRY(n)                          \
 199         BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us),   \
 200         BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions)
 201
 202 #define BNXT_TX_STATS_EXT_PFC_ENTRY(n)                          \
 203         BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us),   \
 204         BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions)
 205
 206 #define BNXT_RX_STATS_EXT_PFC_ENTRIES                           \
 207         BNXT_RX_STATS_EXT_PFC_ENTRY(0),                         \
 208         BNXT_RX_STATS_EXT_PFC_ENTRY(1),                         \
 209         BNXT_RX_STATS_EXT_PFC_ENTRY(2),                         \
 210         BNXT_RX_STATS_EXT_PFC_ENTRY(3),                         \
 211         BNXT_RX_STATS_EXT_PFC_ENTRY(4),                         \
 212         BNXT_RX_STATS_EXT_PFC_ENTRY(5),                         \
 213         BNXT_RX_STATS_EXT_PFC_ENTRY(6),                         \
 214         BNXT_RX_STATS_EXT_PFC_ENTRY(7)
 215
 216 #define BNXT_TX_STATS_EXT_PFC_ENTRIES                           \
 217         BNXT_TX_STATS_EXT_PFC_ENTRY(0),                         \
 218         BNXT_TX_STATS_EXT_PFC_ENTRY(1),                         \
 219         BNXT_TX_STATS_EXT_PFC_ENTRY(2),                         \
 220         BNXT_TX_STATS_EXT_PFC_ENTRY(3),                         \
 221         BNXT_TX_STATS_EXT_PFC_ENTRY(4),                         \
 222         BNXT_TX_STATS_EXT_PFC_ENTRY(5),                         \
 223         BNXT_TX_STATS_EXT_PFC_ENTRY(6),                         \
 224         BNXT_TX_STATS_EXT_PFC_ENTRY(7)
 225
 226 #define BNXT_RX_STATS_EXT_COS_ENTRY(n)                          \
 227         BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n),               \
 228         BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n)
 229
 230 #define BNXT_TX_STATS_EXT_COS_ENTRY(n)                          \
 231         BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n),               \
 232         BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n)
 233
 234 #define BNXT_RX_STATS_EXT_COS_ENTRIES                           \
 235         BNXT_RX_STATS_EXT_COS_ENTRY(0),                         \
 236         BNXT_RX_STATS_EXT_COS_ENTRY(1),                         \
 237         BNXT_RX_STATS_EXT_COS_ENTRY(2),                         \
 238         BNXT_RX_STATS_EXT_COS_ENTRY(3),                         \
 239         BNXT_RX_STATS_EXT_COS_ENTRY(4),                         \
 240         BNXT_RX_STATS_EXT_COS_ENTRY(5),                         \
 241         BNXT_RX_STATS_EXT_COS_ENTRY(6),                         \
 242         BNXT_RX_STATS_EXT_COS_ENTRY(7)                          \
 243
 244 #define BNXT_TX_STATS_EXT_COS_ENTRIES                           \
 245         BNXT_TX_STATS_EXT_COS_ENTRY(0),                         \
 246         BNXT_TX_STATS_EXT_COS_ENTRY(1),                         \
 247         BNXT_TX_STATS_EXT_COS_ENTRY(2),                         \
 248         BNXT_TX_STATS_EXT_COS_ENTRY(3),                         \
 249         BNXT_TX_STATS_EXT_COS_ENTRY(4),                         \
 250         BNXT_TX_STATS_EXT_COS_ENTRY(5),                         \
 251         BNXT_TX_STATS_EXT_COS_ENTRY(6),                         \
 252         BNXT_TX_STATS_EXT_COS_ENTRY(7)                          \
 253
 254 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(n)                  \
 255         BNXT_RX_STATS_EXT_ENTRY(rx_discard_bytes_cos##n),       \
 256         BNXT_RX_STATS_EXT_ENTRY(rx_discard_packets_cos##n)
 257
 258 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES                           \
 259         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(0),                         \
 260         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(1),                         \
 261         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(2),                         \
 262         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(3),                         \
 263         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(4),                         \
 264         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(5),                         \
 265         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(6),                         \
 266         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(7)
 267
 268 #define BNXT_RX_STATS_PRI_ENTRY(counter, n)             \
 269         { BNXT_RX_STATS_EXT_OFFSET(counter##_cos0),     \
 270           __stringify(counter##_pri##n) }
 271
 272 #define BNXT_TX_STATS_PRI_ENTRY(counter, n)             \
 273         { BNXT_TX_STATS_EXT_OFFSET(counter##_cos0),     \
 274           __stringify(counter##_pri##n) }
 275
 276 #define BNXT_RX_STATS_PRI_ENTRIES(counter)              \
 277         BNXT_RX_STATS_PRI_ENTRY(counter, 0),            \
 278         BNXT_RX_STATS_PRI_ENTRY(counter, 1),            \
 279         BNXT_RX_STATS_PRI_ENTRY(counter, 2),            \
 280         BNXT_RX_STATS_PRI_ENTRY(counter, 3),            \
 281         BNXT_RX_STATS_PRI_ENTRY(counter, 4),            \
 282         BNXT_RX_STATS_PRI_ENTRY(counter, 5),            \
 283         BNXT_RX_STATS_PRI_ENTRY(counter, 6),            \
 284         BNXT_RX_STATS_PRI_ENTRY(counter, 7)
 285
 286 #define BNXT_TX_STATS_PRI_ENTRIES(counter)              \
 287         BNXT_TX_STATS_PRI_ENTRY(counter, 0),            \
 288         BNXT_TX_STATS_PRI_ENTRY(counter, 1),            \
 289         BNXT_TX_STATS_PRI_ENTRY(counter, 2),            \
 290         BNXT_TX_STATS_PRI_ENTRY(counter, 3),            \
 291         BNXT_TX_STATS_PRI_ENTRY(counter, 4),            \
 292         BNXT_TX_STATS_PRI_ENTRY(counter, 5),            \
 293         BNXT_TX_STATS_PRI_ENTRY(counter, 6),            \
 294         BNXT_TX_STATS_PRI_ENTRY(counter, 7)
 295
 296 enum {
 297         RX_TOTAL_DISCARDS,
 298         TX_TOTAL_DISCARDS,
 299 };
 300
 301 static struct {
 302         u64                     counter;
 303         char                    string[ETH_GSTRING_LEN];
 304 } bnxt_sw_func_stats[] = {
 305         {0, "rx_total_discard_pkts"},
 306         {0, "tx_total_discard_pkts"},
 307 };
 308
 309 #define NUM_RING_RX_SW_STATS            ARRAY_SIZE(bnxt_rx_sw_stats_str)
 310 #define NUM_RING_CMN_SW_STATS           ARRAY_SIZE(bnxt_cmn_sw_stats_str)
 311 #define NUM_RING_RX_HW_STATS            ARRAY_SIZE(bnxt_ring_rx_stats_str)
 312 #define NUM_RING_TX_HW_STATS            ARRAY_SIZE(bnxt_ring_tx_stats_str)
 313
 314 static const struct {
 315         long offset;
 316         char string[ETH_GSTRING_LEN];
 317 } bnxt_port_stats_arr[] = {
 318         BNXT_RX_STATS_ENTRY(rx_64b_frames),
 319         BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
 320         BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
 321         BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
 322         BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
 323         BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames),
 324         BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
 325         BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
 326         BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
 327         BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
 328         BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
 329         BNXT_RX_STATS_ENTRY(rx_total_frames),
 330         BNXT_RX_STATS_ENTRY(rx_ucast_frames),
 331         BNXT_RX_STATS_ENTRY(rx_mcast_frames),
 332         BNXT_RX_STATS_ENTRY(rx_bcast_frames),
 333         BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
 334         BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
 335         BNXT_RX_STATS_ENTRY(rx_pause_frames),
 336         BNXT_RX_STATS_ENTRY(rx_pfc_frames),
 337         BNXT_RX_STATS_ENTRY(rx_align_err_frames),
 338         BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
 339         BNXT_RX_STATS_ENTRY(rx_jbr_frames),
 340         BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
 341         BNXT_RX_STATS_ENTRY(rx_tagged_frames),
 342         BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
 343         BNXT_RX_STATS_ENTRY(rx_good_frames),
 344         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
 345         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
 346         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
 347         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
 348         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
 349         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
 350         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
 351         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
 352         BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
 353         BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
 354         BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
 355         BNXT_RX_STATS_ENTRY(rx_bytes),
 356         BNXT_RX_STATS_ENTRY(rx_runt_bytes),
 357         BNXT_RX_STATS_ENTRY(rx_runt_frames),
 358         BNXT_RX_STATS_ENTRY(rx_stat_discard),
 359         BNXT_RX_STATS_ENTRY(rx_stat_err),
 360
 361         BNXT_TX_STATS_ENTRY(tx_64b_frames),
 362         BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
 363         BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
 364         BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
 365         BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
 366         BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames),
 367         BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
 368         BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames),
 369         BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
 370         BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
 371         BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
 372         BNXT_TX_STATS_ENTRY(tx_good_frames),
 373         BNXT_TX_STATS_ENTRY(tx_total_frames),
 374         BNXT_TX_STATS_ENTRY(tx_ucast_frames),
 375         BNXT_TX_STATS_ENTRY(tx_mcast_frames),
 376         BNXT_TX_STATS_ENTRY(tx_bcast_frames),
 377         BNXT_TX_STATS_ENTRY(tx_pause_frames),
 378         BNXT_TX_STATS_ENTRY(tx_pfc_frames),
 379         BNXT_TX_STATS_ENTRY(tx_jabber_frames),
 380         BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
 381         BNXT_TX_STATS_ENTRY(tx_err),
 382         BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
 383         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
 384         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
 385         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
 386         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
 387         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
 388         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
 389         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
 390         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
 391         BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
 392         BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
 393         BNXT_TX_STATS_ENTRY(tx_total_collisions),
 394         BNXT_TX_STATS_ENTRY(tx_bytes),
 395         BNXT_TX_STATS_ENTRY(tx_xthol_frames),
 396         BNXT_TX_STATS_ENTRY(tx_stat_discard),
 397         BNXT_TX_STATS_ENTRY(tx_stat_error),
 398 };
 399
 400 static const struct {
 401         long offset;
 402         char string[ETH_GSTRING_LEN];
 403 } bnxt_port_stats_ext_arr[] = {
 404         BNXT_RX_STATS_EXT_ENTRY(link_down_events),
 405         BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events),
 406         BNXT_RX_STATS_EXT_ENTRY(resume_pause_events),
 407         BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events),
 408         BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events),
 409         BNXT_RX_STATS_EXT_COS_ENTRIES,
 410         BNXT_RX_STATS_EXT_PFC_ENTRIES,
 411         BNXT_RX_STATS_EXT_ENTRY(rx_bits),
 412         BNXT_RX_STATS_EXT_ENTRY(rx_buffer_passed_threshold),
 413         BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err),
 414         BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits),
 415         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES,
 416 };
 417
 418 static const struct {
 419         long offset;
 420         char string[ETH_GSTRING_LEN];
 421 } bnxt_tx_port_stats_ext_arr[] = {
 422         BNXT_TX_STATS_EXT_COS_ENTRIES,
 423         BNXT_TX_STATS_EXT_PFC_ENTRIES,
 424 };
 425
 426 static const struct {
 427         long base_off;
 428         char string[ETH_GSTRING_LEN];
 429 } bnxt_rx_bytes_pri_arr[] = {
 430         BNXT_RX_STATS_PRI_ENTRIES(rx_bytes),
 431 };
 432
 433 static const struct {
 434         long base_off;
 435         char string[ETH_GSTRING_LEN];
 436 } bnxt_rx_pkts_pri_arr[] = {
 437         BNXT_RX_STATS_PRI_ENTRIES(rx_packets),
 438 };
 439
 440 static const struct {
 441         long base_off;
 442         char string[ETH_GSTRING_LEN];
 443 } bnxt_tx_bytes_pri_arr[] = {
 444         BNXT_TX_STATS_PRI_ENTRIES(tx_bytes),
 445 };
 446
 447 static const struct {
 448         long base_off;
 449         char string[ETH_GSTRING_LEN];
 450 } bnxt_tx_pkts_pri_arr[] = {
 451         BNXT_TX_STATS_PRI_ENTRIES(tx_packets),
 452 };
 453
 454 #define BNXT_NUM_SW_FUNC_STATS  ARRAY_SIZE(bnxt_sw_func_stats)
 455 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
 456 #define BNXT_NUM_STATS_PRI                      \
 457         (ARRAY_SIZE(bnxt_rx_bytes_pri_arr) +    \
 458          ARRAY_SIZE(bnxt_rx_pkts_pri_arr) +     \
 459          ARRAY_SIZE(bnxt_tx_bytes_pri_arr) +    \
 460          ARRAY_SIZE(bnxt_tx_pkts_pri_arr))
 461
 462 static int bnxt_get_num_tpa_ring_stats(struct bnxt *bp)
 463 {
 464         if (BNXT_SUPPORTS_TPA(bp)) {
 465                 if (bp->max_tpa_v2)
 466                         return ARRAY_SIZE(bnxt_ring_tpa2_stats_str);
 467                 return ARRAY_SIZE(bnxt_ring_tpa_stats_str);
 468         }
 469         return 0;
 470 }
 471
 472 static int bnxt_get_num_ring_stats(struct bnxt *bp)
 473 {
 474         int rx, tx, cmn;
 475
 476         rx = NUM_RING_RX_HW_STATS + NUM_RING_RX_SW_STATS +
 477              bnxt_get_num_tpa_ring_stats(bp);
 478         tx = NUM_RING_TX_HW_STATS;
 479         cmn = NUM_RING_CMN_SW_STATS;
 480         return rx * bp->rx_nr_rings + tx * bp->tx_nr_rings +
 481                cmn * bp->cp_nr_rings;
 482 }
 483
 484 static int bnxt_get_num_stats(struct bnxt *bp)
 485 {
 486         int num_stats = bnxt_get_num_ring_stats(bp);
 487
 488         num_stats += BNXT_NUM_SW_FUNC_STATS;
 489
 490         if (bp->flags & BNXT_FLAG_PORT_STATS)
 491                 num_stats += BNXT_NUM_PORT_STATS;
 492
 493         if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
 494                 num_stats += bp->fw_rx_stats_ext_size +
 495                              bp->fw_tx_stats_ext_size;
 496                 if (bp->pri2cos_valid)
 497                         num_stats += BNXT_NUM_STATS_PRI;
 498         }
 499
 500         return num_stats;
 501 }
 502
 503 static int bnxt_get_sset_count(struct net_device *dev, int sset)
 504 {
 505         struct bnxt *bp = netdev_priv(dev);
 506
 507         switch (sset) {
 508         case ETH_SS_STATS:
 509                 return bnxt_get_num_stats(bp);
 510         case ETH_SS_TEST:
 511                 if (!bp->num_tests)
 512                         return -EOPNOTSUPP;
 513                 return bp->num_tests;
 514         default:
 515                 return -EOPNOTSUPP;
 516         }
 517 }
 518
 519 static bool is_rx_ring(struct bnxt *bp, int ring_num)
 520 {
 521         return ring_num < bp->rx_nr_rings;
 522 }
 523
 524 static bool is_tx_ring(struct bnxt *bp, int ring_num)
 525 {
 526         int tx_base = 0;
 527
 528         if (!(bp->flags & BNXT_FLAG_SHARED_RINGS))
 529                 tx_base = bp->rx_nr_rings;
 530
 531         if (ring_num >= tx_base && ring_num < (tx_base + bp->tx_nr_rings))
 532                 return true;
 533         return false;
 534 }
 535
 536 static void bnxt_get_ethtool_stats(struct net_device *dev,
 537                                    struct ethtool_stats *stats, u64 *buf)
 538 {
 539         u32 i, j = 0;
 540         struct bnxt *bp = netdev_priv(dev);
 541         u32 tpa_stats;
 542
 543         if (!bp->bnapi) {
 544                 j += bnxt_get_num_ring_stats(bp) + BNXT_NUM_SW_FUNC_STATS;
 545                 goto skip_ring_stats;
 546         }
 547
 548         for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++)
 549                 bnxt_sw_func_stats[i].counter = 0;
 550
 551         tpa_stats = bnxt_get_num_tpa_ring_stats(bp);
 552         for (i = 0; i < bp->cp_nr_rings; i++) {
 553                 struct bnxt_napi *bnapi = bp->bnapi[i];
 554                 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
 555                 u64 *sw_stats = cpr->stats.sw_stats;
 556                 u64 *sw;
 557                 int k;
 558
 559                 if (is_rx_ring(bp, i)) {
 560                         for (k = 0; k < NUM_RING_RX_HW_STATS; j++, k++)
 561                                 buf[j] = sw_stats[k];
 562                 }
 563                 if (is_tx_ring(bp, i)) {
 564                         k = NUM_RING_RX_HW_STATS;
 565                         for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS;
 566                                j++, k++)
 567                                 buf[j] = sw_stats[k];
 568                 }
 569                 if (!tpa_stats || !is_rx_ring(bp, i))
 570                         goto skip_tpa_ring_stats;
 571
 572                 k = NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS;
 573                 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS +
 574                            tpa_stats; j++, k++)
 575                         buf[j] = sw_stats[k];
 576
 577 skip_tpa_ring_stats:
 578                 sw = (u64 *)&cpr->sw_stats.rx;
 579                 if (is_rx_ring(bp, i)) {
 580                         for (k = 0; k < NUM_RING_RX_SW_STATS; j++, k++)
 581                                 buf[j] = sw[k];
 582                 }
 583
 584                 sw = (u64 *)&cpr->sw_stats.cmn;
 585                 for (k = 0; k < NUM_RING_CMN_SW_STATS; j++, k++)
 586                         buf[j] = sw[k];
 587
 588                 bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter +=
 589                         BNXT_GET_RING_STATS64(sw_stats, rx_discard_pkts);
 590                 bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter +=
 591                         BNXT_GET_RING_STATS64(sw_stats, tx_discard_pkts);
 592         }
 593
 594         for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++)
 595                 buf[j] = bnxt_sw_func_stats[i].counter;
 596
 597 skip_ring_stats:
 598         if (bp->flags & BNXT_FLAG_PORT_STATS) {
 599                 u64 *port_stats = bp->port_stats.sw_stats;
 600
 601                 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++)
 602                         buf[j] = *(port_stats + bnxt_port_stats_arr[i].offset);
 603         }
 604         if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
 605                 u64 *rx_port_stats_ext = bp->rx_port_stats_ext.sw_stats;
 606                 u64 *tx_port_stats_ext = bp->tx_port_stats_ext.sw_stats;
 607
 608                 for (i = 0; i < bp->fw_rx_stats_ext_size; i++, j++) {
 609                         buf[j] = *(rx_port_stats_ext +
 610                                    bnxt_port_stats_ext_arr[i].offset);
 611                 }
 612                 for (i = 0; i < bp->fw_tx_stats_ext_size; i++, j++) {
 613                         buf[j] = *(tx_port_stats_ext +
 614                                    bnxt_tx_port_stats_ext_arr[i].offset);
 615                 }
 616                 if (bp->pri2cos_valid) {
 617                         for (i = 0; i < 8; i++, j++) {
 618                                 long n = bnxt_rx_bytes_pri_arr[i].base_off +
 619                                          bp->pri2cos_idx[i];
 620
 621                                 buf[j] = *(rx_port_stats_ext + n);
 622                         }
 623                         for (i = 0; i < 8; i++, j++) {
 624                                 long n = bnxt_rx_pkts_pri_arr[i].base_off +
 625                                          bp->pri2cos_idx[i];
 626
 627                                 buf[j] = *(rx_port_stats_ext + n);
 628                         }
 629                         for (i = 0; i < 8; i++, j++) {
 630                                 long n = bnxt_tx_bytes_pri_arr[i].base_off +
 631                                          bp->pri2cos_idx[i];
 632
 633                                 buf[j] = *(tx_port_stats_ext + n);
 634                         }
 635                         for (i = 0; i < 8; i++, j++) {
 636                                 long n = bnxt_tx_pkts_pri_arr[i].base_off +
 637                                          bp->pri2cos_idx[i];
 638
 639                                 buf[j] = *(tx_port_stats_ext + n);
 640                         }
 641                 }
 642         }
 643 }
 644
 645 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
 646 {
 647         struct bnxt *bp = netdev_priv(dev);
 648         static const char * const *str;
 649         u32 i, j, num_str;
 650
 651         switch (stringset) {
 652         case ETH_SS_STATS:
 653                 for (i = 0; i < bp->cp_nr_rings; i++) {
 654                         if (is_rx_ring(bp, i)) {
 655                                 num_str = NUM_RING_RX_HW_STATS;
 656                                 for (j = 0; j < num_str; j++) {
 657                                         sprintf(buf, "[%d]: %s", i,
 658                                                 bnxt_ring_rx_stats_str[j]);
 659                                         buf += ETH_GSTRING_LEN;
 660                                 }
 661                         }
 662                         if (is_tx_ring(bp, i)) {
 663                                 num_str = NUM_RING_TX_HW_STATS;
 664                                 for (j = 0; j < num_str; j++) {
 665                                         sprintf(buf, "[%d]: %s", i,
 666                                                 bnxt_ring_tx_stats_str[j]);
 667                                         buf += ETH_GSTRING_LEN;
 668                                 }
 669                         }
 670                         num_str = bnxt_get_num_tpa_ring_stats(bp);
 671                         if (!num_str || !is_rx_ring(bp, i))
 672                                 goto skip_tpa_stats;
 673
 674                         if (bp->max_tpa_v2)
 675                                 str = bnxt_ring_tpa2_stats_str;
 676                         else
 677                                 str = bnxt_ring_tpa_stats_str;
 678
 679                         for (j = 0; j < num_str; j++) {
 680                                 sprintf(buf, "[%d]: %s", i, str[j]);
 681                                 buf += ETH_GSTRING_LEN;
 682                         }
 683 skip_tpa_stats:
 684                         if (is_rx_ring(bp, i)) {
 685                                 num_str = NUM_RING_RX_SW_STATS;
 686                                 for (j = 0; j < num_str; j++) {
 687                                         sprintf(buf, "[%d]: %s", i,
 688                                                 bnxt_rx_sw_stats_str[j]);
 689                                         buf += ETH_GSTRING_LEN;
 690                                 }
 691                         }
 692                         num_str = NUM_RING_CMN_SW_STATS;
 693                         for (j = 0; j < num_str; j++) {
 694                                 sprintf(buf, "[%d]: %s", i,
 695                                         bnxt_cmn_sw_stats_str[j]);
 696                                 buf += ETH_GSTRING_LEN;
 697                         }
 698                 }
 699                 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) {
 700                         strcpy(buf, bnxt_sw_func_stats[i].string);
 701                         buf += ETH_GSTRING_LEN;
 702                 }
 703
 704                 if (bp->flags & BNXT_FLAG_PORT_STATS) {
 705                         for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
 706                                 strcpy(buf, bnxt_port_stats_arr[i].string);
 707                                 buf += ETH_GSTRING_LEN;
 708                         }
 709                 }
 710                 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
 711                         for (i = 0; i < bp->fw_rx_stats_ext_size; i++) {
 712                                 strcpy(buf, bnxt_port_stats_ext_arr[i].string);
 713                                 buf += ETH_GSTRING_LEN;
 714                         }
 715                         for (i = 0; i < bp->fw_tx_stats_ext_size; i++) {
 716                                 strcpy(buf,
 717                                        bnxt_tx_port_stats_ext_arr[i].string);
 718                                 buf += ETH_GSTRING_LEN;
 719                         }
 720                         if (bp->pri2cos_valid) {
 721                                 for (i = 0; i < 8; i++) {
 722                                         strcpy(buf,
 723                                                bnxt_rx_bytes_pri_arr[i].string);
 724                                         buf += ETH_GSTRING_LEN;
 725                                 }
 726                                 for (i = 0; i < 8; i++) {
 727                                         strcpy(buf,
 728                                                bnxt_rx_pkts_pri_arr[i].string);
 729                                         buf += ETH_GSTRING_LEN;
 730                                 }
 731                                 for (i = 0; i < 8; i++) {
 732                                         strcpy(buf,
 733                                                bnxt_tx_bytes_pri_arr[i].string);
 734                                         buf += ETH_GSTRING_LEN;
 735                                 }
 736                                 for (i = 0; i < 8; i++) {
 737                                         strcpy(buf,
 738                                                bnxt_tx_pkts_pri_arr[i].string);
 739                                         buf += ETH_GSTRING_LEN;
 740                                 }
 741                         }
 742                 }
 743                 break;
 744         case ETH_SS_TEST:
 745                 if (bp->num_tests)
 746                         memcpy(buf, bp->test_info->string,
 747                                bp->num_tests * ETH_GSTRING_LEN);
 748                 break;
 749         default:
 750                 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
 751                            stringset);
 752                 break;
 753         }
 754 }
 755
 756 static void bnxt_get_ringparam(struct net_device *dev,
 757                                struct ethtool_ringparam *ering)
 758 {
 759         struct bnxt *bp = netdev_priv(dev);
 760
 761         ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
 762         ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
 763         ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
 764
 765         ering->rx_pending = bp->rx_ring_size;
 766         ering->rx_jumbo_pending = bp->rx_agg_ring_size;
 767         ering->tx_pending = bp->tx_ring_size;
 768 }
 769
 770 static int bnxt_set_ringparam(struct net_device *dev,
 771                               struct ethtool_ringparam *ering)
 772 {
 773         struct bnxt *bp = netdev_priv(dev);
 774
 775         if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
 776             (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
 777             (ering->tx_pending <= MAX_SKB_FRAGS))
 778                 return -EINVAL;
 779
 780         if (netif_running(dev))
 781                 bnxt_close_nic(bp, false, false);
 782
 783         bp->rx_ring_size = ering->rx_pending;
 784         bp->tx_ring_size = ering->tx_pending;
 785         bnxt_set_ring_params(bp);
 786
 787         if (netif_running(dev))
 788                 return bnxt_open_nic(bp, false, false);
 789
 790         return 0;
 791 }
 792
 793 static void bnxt_get_channels(struct net_device *dev,
 794                               struct ethtool_channels *channel)
 795 {
 796         struct bnxt *bp = netdev_priv(dev);
 797         struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
 798         int max_rx_rings, max_tx_rings, tcs;
 799         int max_tx_sch_inputs;
 800
 801         /* Get the most up-to-date max_tx_sch_inputs. */
 802         if (netif_running(dev) && BNXT_NEW_RM(bp))
 803                 bnxt_hwrm_func_resc_qcaps(bp, false);
 804         max_tx_sch_inputs = hw_resc->max_tx_sch_inputs;
 805
 806         bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
 807         if (max_tx_sch_inputs)
 808                 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
 809         channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
 810
 811         if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
 812                 max_rx_rings = 0;
 813                 max_tx_rings = 0;
 814         }
 815         if (max_tx_sch_inputs)
 816                 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
 817
 818         tcs = netdev_get_num_tc(dev);
 819         if (tcs > 1)
 820                 max_tx_rings /= tcs;
 821
 822         channel->max_rx = max_rx_rings;
 823         channel->max_tx = max_tx_rings;
 824         channel->max_other = 0;
 825         if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
 826                 channel->combined_count = bp->rx_nr_rings;
 827                 if (BNXT_CHIP_TYPE_NITRO_A0(bp))
 828                         channel->combined_count--;
 829         } else {
 830                 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
 831                         channel->rx_count = bp->rx_nr_rings;
 832                         channel->tx_count = bp->tx_nr_rings_per_tc;
 833                 }
 834         }
 835 }
 836
 837 static int bnxt_set_channels(struct net_device *dev,
 838                              struct ethtool_channels *channel)
 839 {
 840         struct bnxt *bp = netdev_priv(dev);
 841         int req_tx_rings, req_rx_rings, tcs;
 842         bool sh = false;
 843         int tx_xdp = 0;
 844         int rc = 0;
 845
 846         if (channel->other_count)
 847                 return -EINVAL;
 848
 849         if (!channel->combined_count &&
 850             (!channel->rx_count || !channel->tx_count))
 851                 return -EINVAL;
 852
 853         if (channel->combined_count &&
 854             (channel->rx_count || channel->tx_count))
 855                 return -EINVAL;
 856
 857         if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
 858                                             channel->tx_count))
 859                 return -EINVAL;
 860
 861         if (channel->combined_count)
 862                 sh = true;
 863
 864         tcs = netdev_get_num_tc(dev);
 865
 866         req_tx_rings = sh ? channel->combined_count : channel->tx_count;
 867         req_rx_rings = sh ? channel->combined_count : channel->rx_count;
 868         if (bp->tx_nr_rings_xdp) {
 869                 if (!sh) {
 870                         netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
 871                         return -EINVAL;
 872                 }
 873                 tx_xdp = req_rx_rings;
 874         }
 875         rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp);
 876         if (rc) {
 877                 netdev_warn(dev, "Unable to allocate the requested rings\n");
 878                 return rc;
 879         }
 880
 881         if (bnxt_get_nr_rss_ctxs(bp, req_rx_rings) !=
 882             bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) &&
 883             (dev->priv_flags & IFF_RXFH_CONFIGURED)) {
 884                 netdev_warn(dev, "RSS table size change required, RSS table entries must be default to proceed\n");
 885                 return -EINVAL;
 886         }
 887
 888         if (netif_running(dev)) {
 889                 if (BNXT_PF(bp)) {
 890                         /* TODO CHIMP_FW: Send message to all VF's
 891                          * before PF unload
 892                          */
 893                 }
 894                 rc = bnxt_close_nic(bp, true, false);
 895                 if (rc) {
 896                         netdev_err(bp->dev, "Set channel failure rc :%x\n",
 897                                    rc);
 898                         return rc;
 899                 }
 900         }
 901
 902         if (sh) {
 903                 bp->flags |= BNXT_FLAG_SHARED_RINGS;
 904                 bp->rx_nr_rings = channel->combined_count;
 905                 bp->tx_nr_rings_per_tc = channel->combined_count;
 906         } else {
 907                 bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
 908                 bp->rx_nr_rings = channel->rx_count;
 909                 bp->tx_nr_rings_per_tc = channel->tx_count;
 910         }
 911         bp->tx_nr_rings_xdp = tx_xdp;
 912         bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
 913         if (tcs > 1)
 914                 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
 915
 916         bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
 917                                bp->tx_nr_rings + bp->rx_nr_rings;
 918
 919         /* After changing number of rx channels, update NTUPLE feature. */
 920         netdev_update_features(dev);
 921         if (netif_running(dev)) {
 922                 rc = bnxt_open_nic(bp, true, false);
 923                 if ((!rc) && BNXT_PF(bp)) {
 924                         /* TODO CHIMP_FW: Send message to all VF's
 925                          * to renable
 926                          */
 927                 }
 928         } else {
 929                 rc = bnxt_reserve_rings(bp, true);
 930         }
 931
 932         return rc;
 933 }
 934
 935 #ifdef CONFIG_RFS_ACCEL
 936 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
 937                             u32 *rule_locs)
 938 {
 939         int i, j = 0;
 940
 941         cmd->data = bp->ntp_fltr_count;
 942         for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
 943                 struct hlist_head *head;
 944                 struct bnxt_ntuple_filter *fltr;
 945
 946                 head = &bp->ntp_fltr_hash_tbl[i];
 947                 rcu_read_lock();
 948                 hlist_for_each_entry_rcu(fltr, head, hash) {
 949                         if (j == cmd->rule_cnt)
 950                                 break;
 951                         rule_locs[j++] = fltr->sw_id;
 952                 }
 953                 rcu_read_unlock();
 954                 if (j == cmd->rule_cnt)
 955                         break;
 956         }
 957         cmd->rule_cnt = j;
 958         return 0;
 959 }
 960
 961 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
 962 {
 963         struct ethtool_rx_flow_spec *fs =
 964                 (struct ethtool_rx_flow_spec *)&cmd->fs;
 965         struct bnxt_ntuple_filter *fltr;
 966         struct flow_keys *fkeys;
 967         int i, rc = -EINVAL;
 968
 969         if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
 970                 return rc;
 971
 972         for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
 973                 struct hlist_head *head;
 974
 975                 head = &bp->ntp_fltr_hash_tbl[i];
 976                 rcu_read_lock();
 977                 hlist_for_each_entry_rcu(fltr, head, hash) {
 978                         if (fltr->sw_id == fs->location)
 979                                 goto fltr_found;
 980                 }
 981                 rcu_read_unlock();
 982         }
 983         return rc;
 984
 985 fltr_found:
 986         fkeys = &fltr->fkeys;
 987         if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
 988                 if (fkeys->basic.ip_proto == IPPROTO_TCP)
 989                         fs->flow_type = TCP_V4_FLOW;
 990                 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
 991                         fs->flow_type = UDP_V4_FLOW;
 992                 else
 993                         goto fltr_err;
 994
 995                 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
 996                 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
 997
 998                 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
 999                 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
1000
1001                 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
1002                 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
1003
1004                 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
1005                 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
1006         } else {
1007                 int i;
1008
1009                 if (fkeys->basic.ip_proto == IPPROTO_TCP)
1010                         fs->flow_type = TCP_V6_FLOW;
1011                 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
1012                         fs->flow_type = UDP_V6_FLOW;
1013                 else
1014                         goto fltr_err;
1015
1016                 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
1017                         fkeys->addrs.v6addrs.src;
1018                 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
1019                         fkeys->addrs.v6addrs.dst;
1020                 for (i = 0; i < 4; i++) {
1021                         fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
1022                         fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
1023                 }
1024                 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
1025                 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
1026
1027                 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
1028                 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
1029         }
1030
1031         fs->ring_cookie = fltr->rxq;
1032         rc = 0;
1033
1034 fltr_err:
1035         rcu_read_unlock();
1036
1037         return rc;
1038 }
1039 #endif
1040
1041 static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
1042 {
1043         if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
1044                 return RXH_IP_SRC | RXH_IP_DST;
1045         return 0;
1046 }
1047
1048 static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
1049 {
1050         if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
1051                 return RXH_IP_SRC | RXH_IP_DST;
1052         return 0;
1053 }
1054
1055 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1056 {
1057         cmd->data = 0;
1058         switch (cmd->flow_type) {
1059         case TCP_V4_FLOW:
1060                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
1061                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1062                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1063                 cmd->data |= get_ethtool_ipv4_rss(bp);
1064                 break;
1065         case UDP_V4_FLOW:
1066                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
1067                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1068                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1069                 fallthrough;
1070         case SCTP_V4_FLOW:
1071         case AH_ESP_V4_FLOW:
1072         case AH_V4_FLOW:
1073         case ESP_V4_FLOW:
1074         case IPV4_FLOW:
1075                 cmd->data |= get_ethtool_ipv4_rss(bp);
1076                 break;
1077
1078         case TCP_V6_FLOW:
1079                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
1080                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1081                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1082                 cmd->data |= get_ethtool_ipv6_rss(bp);
1083                 break;
1084         case UDP_V6_FLOW:
1085                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
1086                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1087                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1088                 fallthrough;
1089         case SCTP_V6_FLOW:
1090         case AH_ESP_V6_FLOW:
1091         case AH_V6_FLOW:
1092         case ESP_V6_FLOW:
1093         case IPV6_FLOW:
1094                 cmd->data |= get_ethtool_ipv6_rss(bp);
1095                 break;
1096         }
1097         return 0;
1098 }
1099
1100 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
1101 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
1102
1103 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1104 {
1105         u32 rss_hash_cfg = bp->rss_hash_cfg;
1106         int tuple, rc = 0;
1107
1108         if (cmd->data == RXH_4TUPLE)
1109                 tuple = 4;
1110         else if (cmd->data == RXH_2TUPLE)
1111                 tuple = 2;
1112         else if (!cmd->data)
1113                 tuple = 0;
1114         else
1115                 return -EINVAL;
1116
1117         if (cmd->flow_type == TCP_V4_FLOW) {
1118                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1119                 if (tuple == 4)
1120                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1121         } else if (cmd->flow_type == UDP_V4_FLOW) {
1122                 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
1123                         return -EINVAL;
1124                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1125                 if (tuple == 4)
1126                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1127         } else if (cmd->flow_type == TCP_V6_FLOW) {
1128                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1129                 if (tuple == 4)
1130                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1131         } else if (cmd->flow_type == UDP_V6_FLOW) {
1132                 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
1133                         return -EINVAL;
1134                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1135                 if (tuple == 4)
1136                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1137         } else if (tuple == 4) {
1138                 return -EINVAL;
1139         }
1140
1141         switch (cmd->flow_type) {
1142         case TCP_V4_FLOW:
1143         case UDP_V4_FLOW:
1144         case SCTP_V4_FLOW:
1145         case AH_ESP_V4_FLOW:
1146         case AH_V4_FLOW:
1147         case ESP_V4_FLOW:
1148         case IPV4_FLOW:
1149                 if (tuple == 2)
1150                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1151                 else if (!tuple)
1152                         rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1153                 break;
1154
1155         case TCP_V6_FLOW:
1156         case UDP_V6_FLOW:
1157         case SCTP_V6_FLOW:
1158         case AH_ESP_V6_FLOW:
1159         case AH_V6_FLOW:
1160         case ESP_V6_FLOW:
1161         case IPV6_FLOW:
1162                 if (tuple == 2)
1163                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1164                 else if (!tuple)
1165                         rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1166                 break;
1167         }
1168
1169         if (bp->rss_hash_cfg == rss_hash_cfg)
1170                 return 0;
1171
1172         bp->rss_hash_cfg = rss_hash_cfg;
1173         if (netif_running(bp->dev)) {
1174                 bnxt_close_nic(bp, false, false);
1175                 rc = bnxt_open_nic(bp, false, false);
1176         }
1177         return rc;
1178 }
1179
1180 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
1181                           u32 *rule_locs)
1182 {
1183         struct bnxt *bp = netdev_priv(dev);
1184         int rc = 0;
1185
1186         switch (cmd->cmd) {
1187 #ifdef CONFIG_RFS_ACCEL
1188         case ETHTOOL_GRXRINGS:
1189                 cmd->data = bp->rx_nr_rings;
1190                 break;
1191
1192         case ETHTOOL_GRXCLSRLCNT:
1193                 cmd->rule_cnt = bp->ntp_fltr_count;
1194                 cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
1195                 break;
1196
1197         case ETHTOOL_GRXCLSRLALL:
1198                 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
1199                 break;
1200
1201         case ETHTOOL_GRXCLSRULE:
1202                 rc = bnxt_grxclsrule(bp, cmd);
1203                 break;
1204 #endif
1205
1206         case ETHTOOL_GRXFH:
1207                 rc = bnxt_grxfh(bp, cmd);
1208                 break;
1209
1210         default:
1211                 rc = -EOPNOTSUPP;
1212                 break;
1213         }
1214
1215         return rc;
1216 }
1217
1218 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1219 {
1220         struct bnxt *bp = netdev_priv(dev);
1221         int rc;
1222
1223         switch (cmd->cmd) {
1224         case ETHTOOL_SRXFH:
1225                 rc = bnxt_srxfh(bp, cmd);
1226                 break;
1227
1228         default:
1229                 rc = -EOPNOTSUPP;
1230                 break;
1231         }
1232         return rc;
1233 }
1234
1235 u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
1236 {
1237         struct bnxt *bp = netdev_priv(dev);
1238
1239         if (bp->flags & BNXT_FLAG_CHIP_P5)
1240                 return ALIGN(bp->rx_nr_rings, BNXT_RSS_TABLE_ENTRIES_P5);
1241         return HW_HASH_INDEX_SIZE;
1242 }
1243
1244 static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
1245 {
1246         return HW_HASH_KEY_SIZE;
1247 }
1248
1249 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
1250                          u8 *hfunc)
1251 {
1252         struct bnxt *bp = netdev_priv(dev);
1253         struct bnxt_vnic_info *vnic;
1254         u32 i, tbl_size;
1255
1256         if (hfunc)
1257                 *hfunc = ETH_RSS_HASH_TOP;
1258
1259         if (!bp->vnic_info)
1260                 return 0;
1261
1262         vnic = &bp->vnic_info[0];
1263         if (indir && bp->rss_indir_tbl) {
1264                 tbl_size = bnxt_get_rxfh_indir_size(dev);
1265                 for (i = 0; i < tbl_size; i++)
1266                         indir[i] = bp->rss_indir_tbl[i];
1267         }
1268
1269         if (key && vnic->rss_hash_key)
1270                 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
1271
1272         return 0;
1273 }
1274
1275 static int bnxt_set_rxfh(struct net_device *dev, const u32 *indir,
1276                          const u8 *key, const u8 hfunc)
1277 {
1278         struct bnxt *bp = netdev_priv(dev);
1279         int rc = 0;
1280
1281         if (hfunc && hfunc != ETH_RSS_HASH_TOP)
1282                 return -EOPNOTSUPP;
1283
1284         if (key)
1285                 return -EOPNOTSUPP;
1286
1287         if (indir) {
1288                 u32 i, pad, tbl_size = bnxt_get_rxfh_indir_size(dev);
1289
1290                 for (i = 0; i < tbl_size; i++)
1291                         bp->rss_indir_tbl[i] = indir[i];
1292                 pad = bp->rss_indir_tbl_entries - tbl_size;
1293                 if (pad)
1294                         memset(&bp->rss_indir_tbl[i], 0, pad * sizeof(u16));
1295         }
1296
1297         if (netif_running(bp->dev)) {
1298                 bnxt_close_nic(bp, false, false);
1299                 rc = bnxt_open_nic(bp, false, false);
1300         }
1301         return rc;
1302 }
1303
1304 static void bnxt_get_drvinfo(struct net_device *dev,
1305                              struct ethtool_drvinfo *info)
1306 {
1307         struct bnxt *bp = netdev_priv(dev);
1308
1309         strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
1310         strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version));
1311         strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
1312         info->n_stats = bnxt_get_num_stats(bp);
1313         info->testinfo_len = bp->num_tests;
1314         /* TODO CHIMP_FW: eeprom dump details */
1315         info->eedump_len = 0;
1316         /* TODO CHIMP FW: reg dump details */
1317         info->regdump_len = 0;
1318 }
1319
1320 static int bnxt_get_regs_len(struct net_device *dev)
1321 {
1322         struct bnxt *bp = netdev_priv(dev);
1323         int reg_len;
1324
1325         reg_len = BNXT_PXP_REG_LEN;
1326
1327         if (bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED)
1328                 reg_len += sizeof(struct pcie_ctx_hw_stats);
1329
1330         return reg_len;
1331 }
1332
1333 static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1334                           void *_p)
1335 {
1336         struct pcie_ctx_hw_stats *hw_pcie_stats;
1337         struct hwrm_pcie_qstats_input req = {0};
1338         struct bnxt *bp = netdev_priv(dev);
1339         dma_addr_t hw_pcie_stats_addr;
1340         int rc;
1341
1342         regs->version = 0;
1343         bnxt_dbg_hwrm_rd_reg(bp, 0, BNXT_PXP_REG_LEN / 4, _p);
1344
1345         if (!(bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED))
1346                 return;
1347
1348         hw_pcie_stats = dma_alloc_coherent(&bp->pdev->dev,
1349                                            sizeof(*hw_pcie_stats),
1350                                            &hw_pcie_stats_addr, GFP_KERNEL);
1351         if (!hw_pcie_stats)
1352                 return;
1353
1354         regs->version = 1;
1355         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PCIE_QSTATS, -1, -1);
1356         req.pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats));
1357         req.pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr);
1358         mutex_lock(&bp->hwrm_cmd_lock);
1359         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1360         if (!rc) {
1361                 __le64 *src = (__le64 *)hw_pcie_stats;
1362                 u64 *dst = (u64 *)(_p + BNXT_PXP_REG_LEN);
1363                 int i;
1364
1365                 for (i = 0; i < sizeof(*hw_pcie_stats) / sizeof(__le64); i++)
1366                         dst[i] = le64_to_cpu(src[i]);
1367         }
1368         mutex_unlock(&bp->hwrm_cmd_lock);
1369         dma_free_coherent(&bp->pdev->dev, sizeof(*hw_pcie_stats), hw_pcie_stats,
1370                           hw_pcie_stats_addr);
1371 }
1372
1373 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1374 {
1375         struct bnxt *bp = netdev_priv(dev);
1376
1377         wol->supported = 0;
1378         wol->wolopts = 0;
1379         memset(&wol->sopass, 0, sizeof(wol->sopass));
1380         if (bp->flags & BNXT_FLAG_WOL_CAP) {
1381                 wol->supported = WAKE_MAGIC;
1382                 if (bp->wol)
1383                         wol->wolopts = WAKE_MAGIC;
1384         }
1385 }
1386
1387 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1388 {
1389         struct bnxt *bp = netdev_priv(dev);
1390
1391         if (wol->wolopts & ~WAKE_MAGIC)
1392                 return -EINVAL;
1393
1394         if (wol->wolopts & WAKE_MAGIC) {
1395                 if (!(bp->flags & BNXT_FLAG_WOL_CAP))
1396                         return -EINVAL;
1397                 if (!bp->wol) {
1398                         if (bnxt_hwrm_alloc_wol_fltr(bp))
1399                                 return -EBUSY;
1400                         bp->wol = 1;
1401                 }
1402         } else {
1403                 if (bp->wol) {
1404                         if (bnxt_hwrm_free_wol_fltr(bp))
1405                                 return -EBUSY;
1406                         bp->wol = 0;
1407                 }
1408         }
1409         return 0;
1410 }
1411
1412 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
1413 {
1414         u32 speed_mask = 0;
1415
1416         /* TODO: support 25GB, 40GB, 50GB with different cable type */
1417         /* set the advertised speeds */
1418         if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
1419                 speed_mask |= ADVERTISED_100baseT_Full;
1420         if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
1421                 speed_mask |= ADVERTISED_1000baseT_Full;
1422         if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
1423                 speed_mask |= ADVERTISED_2500baseX_Full;
1424         if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
1425                 speed_mask |= ADVERTISED_10000baseT_Full;
1426         if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
1427                 speed_mask |= ADVERTISED_40000baseCR4_Full;
1428
1429         if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
1430                 speed_mask |= ADVERTISED_Pause;
1431         else if (fw_pause & BNXT_LINK_PAUSE_TX)
1432                 speed_mask |= ADVERTISED_Asym_Pause;
1433         else if (fw_pause & BNXT_LINK_PAUSE_RX)
1434                 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
1435
1436         return speed_mask;
1437 }
1438
1439 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
1440 {                                                                       \
1441         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB)                    \
1442                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1443                                                      100baseT_Full);    \
1444         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB)                      \
1445                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1446                                                      1000baseT_Full);   \
1447         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB)                     \
1448                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1449                                                      10000baseT_Full);  \
1450         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB)                     \
1451                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1452                                                      25000baseCR_Full); \
1453         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB)                     \
1454                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1455                                                      40000baseCR4_Full);\
1456         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB)                     \
1457                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1458                                                      50000baseCR2_Full);\
1459         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB)                    \
1460                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1461                                                      100000baseCR4_Full);\
1462         if ((fw_pause) & BNXT_LINK_PAUSE_RX) {                          \
1463                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1464                                                      Pause);            \
1465                 if (!((fw_pause) & BNXT_LINK_PAUSE_TX))                 \
1466                         ethtool_link_ksettings_add_link_mode(           \
1467                                         lk_ksettings, name, Asym_Pause);\
1468         } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) {                   \
1469                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1470                                                      Asym_Pause);       \
1471         }                                                               \
1472 }
1473
1474 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name)          \
1475 {                                                                       \
1476         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1477                                                   100baseT_Full) ||     \
1478             ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1479                                                   100baseT_Half))       \
1480                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB;               \
1481         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1482                                                   1000baseT_Full) ||    \
1483             ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1484                                                   1000baseT_Half))      \
1485                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB;                 \
1486         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1487                                                   10000baseT_Full))     \
1488                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB;                \
1489         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1490                                                   25000baseCR_Full))    \
1491                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB;                \
1492         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1493                                                   40000baseCR4_Full))   \
1494                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB;                \
1495         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1496                                                   50000baseCR2_Full))   \
1497                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB;                \
1498         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1499                                                   100000baseCR4_Full))  \
1500                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB;               \
1501 }
1502
1503 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
1504                                 struct ethtool_link_ksettings *lk_ksettings)
1505 {
1506         u16 fw_speeds = link_info->advertising;
1507         u8 fw_pause = 0;
1508
1509         if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1510                 fw_pause = link_info->auto_pause_setting;
1511
1512         BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
1513 }
1514
1515 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
1516                                 struct ethtool_link_ksettings *lk_ksettings)
1517 {
1518         u16 fw_speeds = link_info->lp_auto_link_speeds;
1519         u8 fw_pause = 0;
1520
1521         if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1522                 fw_pause = link_info->lp_pause;
1523
1524         BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
1525                                 lp_advertising);
1526 }
1527
1528 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
1529                                 struct ethtool_link_ksettings *lk_ksettings)
1530 {
1531         u16 fw_speeds = link_info->support_speeds;
1532
1533         BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
1534
1535         ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
1536         ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1537                                              Asym_Pause);
1538
1539         if (link_info->support_auto_speeds)
1540                 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1541                                                      Autoneg);
1542 }
1543
1544 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
1545 {
1546         switch (fw_link_speed) {
1547         case BNXT_LINK_SPEED_100MB:
1548                 return SPEED_100;
1549         case BNXT_LINK_SPEED_1GB:
1550                 return SPEED_1000;
1551         case BNXT_LINK_SPEED_2_5GB:
1552                 return SPEED_2500;
1553         case BNXT_LINK_SPEED_10GB:
1554                 return SPEED_10000;
1555         case BNXT_LINK_SPEED_20GB:
1556                 return SPEED_20000;
1557         case BNXT_LINK_SPEED_25GB:
1558                 return SPEED_25000;
1559         case BNXT_LINK_SPEED_40GB:
1560                 return SPEED_40000;
1561         case BNXT_LINK_SPEED_50GB:
1562                 return SPEED_50000;
1563         case BNXT_LINK_SPEED_100GB:
1564                 return SPEED_100000;
1565         default:
1566                 return SPEED_UNKNOWN;
1567         }
1568 }
1569
1570 static int bnxt_get_link_ksettings(struct net_device *dev,
1571                                    struct ethtool_link_ksettings *lk_ksettings)
1572 {
1573         struct bnxt *bp = netdev_priv(dev);
1574         struct bnxt_link_info *link_info = &bp->link_info;
1575         struct ethtool_link_settings *base = &lk_ksettings->base;
1576         u32 ethtool_speed;
1577
1578         ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
1579         mutex_lock(&bp->link_lock);
1580         bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
1581
1582         ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
1583         if (link_info->autoneg) {
1584                 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
1585                 ethtool_link_ksettings_add_link_mode(lk_ksettings,
1586                                                      advertising, Autoneg);
1587                 base->autoneg = AUTONEG_ENABLE;
1588                 base->duplex = DUPLEX_UNKNOWN;
1589                 if (link_info->phy_link_status == BNXT_LINK_LINK) {
1590                         bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
1591                         if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
1592                                 base->duplex = DUPLEX_FULL;
1593                         else
1594                                 base->duplex = DUPLEX_HALF;
1595                 }
1596                 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
1597         } else {
1598                 base->autoneg = AUTONEG_DISABLE;
1599                 ethtool_speed =
1600                         bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
1601                 base->duplex = DUPLEX_HALF;
1602                 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
1603                         base->duplex = DUPLEX_FULL;
1604         }
1605         base->speed = ethtool_speed;
1606
1607         base->port = PORT_NONE;
1608         if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1609                 base->port = PORT_TP;
1610                 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1611                                                      TP);
1612                 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1613                                                      TP);
1614         } else {
1615                 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1616                                                      FIBRE);
1617                 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1618                                                      FIBRE);
1619
1620                 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
1621                         base->port = PORT_DA;
1622                 else if (link_info->media_type ==
1623                          PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
1624                         base->port = PORT_FIBRE;
1625         }
1626         base->phy_address = link_info->phy_addr;
1627         mutex_unlock(&bp->link_lock);
1628
1629         return 0;
1630 }
1631
1632 static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed)
1633 {
1634         struct bnxt *bp = netdev_priv(dev);
1635         struct bnxt_link_info *link_info = &bp->link_info;
1636         u16 support_spds = link_info->support_speeds;
1637         u32 fw_speed = 0;
1638
1639         switch (ethtool_speed) {
1640         case SPEED_100:
1641                 if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
1642                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
1643                 break;
1644         case SPEED_1000:
1645                 if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
1646                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
1647                 break;
1648         case SPEED_2500:
1649                 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
1650                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
1651                 break;
1652         case SPEED_10000:
1653                 if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
1654                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
1655                 break;
1656         case SPEED_20000:
1657                 if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
1658                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
1659                 break;
1660         case SPEED_25000:
1661                 if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
1662                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
1663                 break;
1664         case SPEED_40000:
1665                 if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
1666                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
1667                 break;
1668         case SPEED_50000:
1669                 if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
1670                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
1671                 break;
1672         case SPEED_100000:
1673                 if (support_spds & BNXT_LINK_SPEED_MSK_100GB)
1674                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB;
1675                 break;
1676         default:
1677                 netdev_err(dev, "unsupported speed!\n");
1678                 break;
1679         }
1680         return fw_speed;
1681 }
1682
1683 u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
1684 {
1685         u16 fw_speed_mask = 0;
1686
1687         /* only support autoneg at speed 100, 1000, and 10000 */
1688         if (advertising & (ADVERTISED_100baseT_Full |
1689                            ADVERTISED_100baseT_Half)) {
1690                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
1691         }
1692         if (advertising & (ADVERTISED_1000baseT_Full |
1693                            ADVERTISED_1000baseT_Half)) {
1694                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
1695         }
1696         if (advertising & ADVERTISED_10000baseT_Full)
1697                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
1698
1699         if (advertising & ADVERTISED_40000baseCR4_Full)
1700                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
1701
1702         return fw_speed_mask;
1703 }
1704
1705 static int bnxt_set_link_ksettings(struct net_device *dev,
1706                            const struct ethtool_link_ksettings *lk_ksettings)
1707 {
1708         struct bnxt *bp = netdev_priv(dev);
1709         struct bnxt_link_info *link_info = &bp->link_info;
1710         const struct ethtool_link_settings *base = &lk_ksettings->base;
1711         bool set_pause = false;
1712         u16 fw_advertising = 0;
1713         u32 speed;
1714         int rc = 0;
1715
1716         if (!BNXT_PHY_CFG_ABLE(bp))
1717                 return -EOPNOTSUPP;
1718
1719         mutex_lock(&bp->link_lock);
1720         if (base->autoneg == AUTONEG_ENABLE) {
1721                 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
1722                                         advertising);
1723                 link_info->autoneg |= BNXT_AUTONEG_SPEED;
1724                 if (!fw_advertising)
1725                         link_info->advertising = link_info->support_auto_speeds;
1726                 else
1727                         link_info->advertising = fw_advertising;
1728                 /* any change to autoneg will cause link change, therefore the
1729                  * driver should put back the original pause setting in autoneg
1730                  */
1731                 set_pause = true;
1732         } else {
1733                 u16 fw_speed;
1734                 u8 phy_type = link_info->phy_type;
1735
1736                 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET  ||
1737                     phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
1738                     link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1739                         netdev_err(dev, "10GBase-T devices must autoneg\n");
1740                         rc = -EINVAL;
1741                         goto set_setting_exit;
1742                 }
1743                 if (base->duplex == DUPLEX_HALF) {
1744                         netdev_err(dev, "HALF DUPLEX is not supported!\n");
1745                         rc = -EINVAL;
1746                         goto set_setting_exit;
1747                 }
1748                 speed = base->speed;
1749                 fw_speed = bnxt_get_fw_speed(dev, speed);
1750                 if (!fw_speed) {
1751                         rc = -EINVAL;
1752                         goto set_setting_exit;
1753                 }
1754                 link_info->req_link_speed = fw_speed;
1755                 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
1756                 link_info->autoneg = 0;
1757                 link_info->advertising = 0;
1758         }
1759
1760         if (netif_running(dev))
1761                 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
1762
1763 set_setting_exit:
1764         mutex_unlock(&bp->link_lock);
1765         return rc;
1766 }
1767
1768 static void bnxt_get_pauseparam(struct net_device *dev,
1769                                 struct ethtool_pauseparam *epause)
1770 {
1771         struct bnxt *bp = netdev_priv(dev);
1772         struct bnxt_link_info *link_info = &bp->link_info;
1773
1774         if (BNXT_VF(bp))
1775                 return;
1776         epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
1777         epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
1778         epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
1779 }
1780
1781 static int bnxt_set_pauseparam(struct net_device *dev,
1782                                struct ethtool_pauseparam *epause)
1783 {
1784         int rc = 0;
1785         struct bnxt *bp = netdev_priv(dev);
1786         struct bnxt_link_info *link_info = &bp->link_info;
1787
1788         if (!BNXT_PHY_CFG_ABLE(bp))
1789                 return -EOPNOTSUPP;
1790
1791         if (epause->autoneg) {
1792                 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
1793                         return -EINVAL;
1794
1795                 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
1796                 if (bp->hwrm_spec_code >= 0x10201)
1797                         link_info->req_flow_ctrl =
1798                                 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
1799         } else {
1800                 /* when transition from auto pause to force pause,
1801                  * force a link change
1802                  */
1803                 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1804                         link_info->force_link_chng = true;
1805                 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
1806                 link_info->req_flow_ctrl = 0;
1807         }
1808         if (epause->rx_pause)
1809                 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
1810
1811         if (epause->tx_pause)
1812                 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
1813
1814         if (netif_running(dev)) {
1815                 mutex_lock(&bp->link_lock);
1816                 rc = bnxt_hwrm_set_pause(bp);
1817                 mutex_unlock(&bp->link_lock);
1818         }
1819         return rc;
1820 }
1821
1822 static u32 bnxt_get_link(struct net_device *dev)
1823 {
1824         struct bnxt *bp = netdev_priv(dev);
1825
1826         /* TODO: handle MF, VF, driver close case */
1827         return bp->link_info.link_up;
1828 }
1829
1830 static void bnxt_print_admin_err(struct bnxt *bp)
1831 {
1832         netdev_info(bp->dev, "PF does not have admin privileges to flash or reset the device\n");
1833 }
1834
1835 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1836                                 u16 ext, u16 *index, u32 *item_length,
1837                                 u32 *data_length);
1838
1839 static int bnxt_flash_nvram(struct net_device *dev,
1840                             u16 dir_type,
1841                             u16 dir_ordinal,
1842                             u16 dir_ext,
1843                             u16 dir_attr,
1844                             const u8 *data,
1845                             size_t data_len)
1846 {
1847         struct bnxt *bp = netdev_priv(dev);
1848         int rc;
1849         struct hwrm_nvm_write_input req = {0};
1850         dma_addr_t dma_handle;
1851         u8 *kmem;
1852
1853         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
1854
1855         req.dir_type = cpu_to_le16(dir_type);
1856         req.dir_ordinal = cpu_to_le16(dir_ordinal);
1857         req.dir_ext = cpu_to_le16(dir_ext);
1858         req.dir_attr = cpu_to_le16(dir_attr);
1859         req.dir_data_length = cpu_to_le32(data_len);
1860
1861         kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
1862                                   GFP_KERNEL);
1863         if (!kmem) {
1864                 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1865                            (unsigned)data_len);
1866                 return -ENOMEM;
1867         }
1868         memcpy(kmem, data, data_len);
1869         req.host_src_addr = cpu_to_le64(dma_handle);
1870
1871         rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
1872         dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
1873
1874         if (rc == -EACCES)
1875                 bnxt_print_admin_err(bp);
1876         return rc;
1877 }
1878
1879 static int bnxt_hwrm_firmware_reset(struct net_device *dev, u8 proc_type,
1880                                     u8 self_reset, u8 flags)
1881 {
1882         struct hwrm_fw_reset_input req = {0};
1883         struct bnxt *bp = netdev_priv(dev);
1884         int rc;
1885
1886         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
1887
1888         req.embedded_proc_type = proc_type;
1889         req.selfrst_status = self_reset;
1890         req.flags = flags;
1891
1892         if (proc_type == FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP) {
1893                 rc = hwrm_send_message_silent(bp, &req, sizeof(req),
1894                                               HWRM_CMD_TIMEOUT);
1895         } else {
1896                 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1897                 if (rc == -EACCES)
1898                         bnxt_print_admin_err(bp);
1899         }
1900         return rc;
1901 }
1902
1903 static int bnxt_firmware_reset(struct net_device *dev,
1904                                enum bnxt_nvm_directory_type dir_type)
1905 {
1906         u8 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE;
1907         u8 proc_type, flags = 0;
1908
1909         /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
1910         /*       (e.g. when firmware isn't already running) */
1911         switch (dir_type) {
1912         case BNX_DIR_TYPE_CHIMP_PATCH:
1913         case BNX_DIR_TYPE_BOOTCODE:
1914         case BNX_DIR_TYPE_BOOTCODE_2:
1915                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
1916                 /* Self-reset ChiMP upon next PCIe reset: */
1917                 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1918                 break;
1919         case BNX_DIR_TYPE_APE_FW:
1920         case BNX_DIR_TYPE_APE_PATCH:
1921                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
1922                 /* Self-reset APE upon next PCIe reset: */
1923                 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1924                 break;
1925         case BNX_DIR_TYPE_KONG_FW:
1926         case BNX_DIR_TYPE_KONG_PATCH:
1927                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
1928                 break;
1929         case BNX_DIR_TYPE_BONO_FW:
1930         case BNX_DIR_TYPE_BONO_PATCH:
1931                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
1932                 break;
1933         default:
1934                 return -EINVAL;
1935         }
1936
1937         return bnxt_hwrm_firmware_reset(dev, proc_type, self_reset, flags);
1938 }
1939
1940 static int bnxt_firmware_reset_chip(struct net_device *dev)
1941 {
1942         struct bnxt *bp = netdev_priv(dev);
1943         u8 flags = 0;
1944
1945         if (bp->fw_cap & BNXT_FW_CAP_HOT_RESET)
1946                 flags = FW_RESET_REQ_FLAGS_RESET_GRACEFUL;
1947
1948         return bnxt_hwrm_firmware_reset(dev,
1949                                         FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP,
1950                                         FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP,
1951                                         flags);
1952 }
1953
1954 static int bnxt_firmware_reset_ap(struct net_device *dev)
1955 {
1956         return bnxt_hwrm_firmware_reset(dev, FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP,
1957                                         FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE,
1958                                         0);
1959 }
1960
1961 static int bnxt_flash_firmware(struct net_device *dev,
1962                                u16 dir_type,
1963                                const u8 *fw_data,
1964                                size_t fw_size)
1965 {
1966         int     rc = 0;
1967         u16     code_type;
1968         u32     stored_crc;
1969         u32     calculated_crc;
1970         struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
1971
1972         switch (dir_type) {
1973         case BNX_DIR_TYPE_BOOTCODE:
1974         case BNX_DIR_TYPE_BOOTCODE_2:
1975                 code_type = CODE_BOOT;
1976                 break;
1977         case BNX_DIR_TYPE_CHIMP_PATCH:
1978                 code_type = CODE_CHIMP_PATCH;
1979                 break;
1980         case BNX_DIR_TYPE_APE_FW:
1981                 code_type = CODE_MCTP_PASSTHRU;
1982                 break;
1983         case BNX_DIR_TYPE_APE_PATCH:
1984                 code_type = CODE_APE_PATCH;
1985                 break;
1986         case BNX_DIR_TYPE_KONG_FW:
1987                 code_type = CODE_KONG_FW;
1988                 break;
1989         case BNX_DIR_TYPE_KONG_PATCH:
1990                 code_type = CODE_KONG_PATCH;
1991                 break;
1992         case BNX_DIR_TYPE_BONO_FW:
1993                 code_type = CODE_BONO_FW;
1994                 break;
1995         case BNX_DIR_TYPE_BONO_PATCH:
1996                 code_type = CODE_BONO_PATCH;
1997                 break;
1998         default:
1999                 netdev_err(dev, "Unsupported directory entry type: %u\n",
2000                            dir_type);
2001                 return -EINVAL;
2002         }
2003         if (fw_size < sizeof(struct bnxt_fw_header)) {
2004                 netdev_err(dev, "Invalid firmware file size: %u\n",
2005                            (unsigned int)fw_size);
2006                 return -EINVAL;
2007         }
2008         if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
2009                 netdev_err(dev, "Invalid firmware signature: %08X\n",
2010                            le32_to_cpu(header->signature));
2011                 return -EINVAL;
2012         }
2013         if (header->code_type != code_type) {
2014                 netdev_err(dev, "Expected firmware type: %d, read: %d\n",
2015                            code_type, header->code_type);
2016                 return -EINVAL;
2017         }
2018         if (header->device != DEVICE_CUMULUS_FAMILY) {
2019                 netdev_err(dev, "Expected firmware device family %d, read: %d\n",
2020                            DEVICE_CUMULUS_FAMILY, header->device);
2021                 return -EINVAL;
2022         }
2023         /* Confirm the CRC32 checksum of the file: */
2024         stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
2025                                              sizeof(stored_crc)));
2026         calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
2027         if (calculated_crc != stored_crc) {
2028                 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
2029                            (unsigned long)stored_crc,
2030                            (unsigned long)calculated_crc);
2031                 return -EINVAL;
2032         }
2033         rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
2034                               0, 0, fw_data, fw_size);
2035         if (rc == 0)    /* Firmware update successful */
2036                 rc = bnxt_firmware_reset(dev, dir_type);
2037
2038         return rc;
2039 }
2040
2041 static int bnxt_flash_microcode(struct net_device *dev,
2042                                 u16 dir_type,
2043                                 const u8 *fw_data,
2044                                 size_t fw_size)
2045 {
2046         struct bnxt_ucode_trailer *trailer;
2047         u32 calculated_crc;
2048         u32 stored_crc;
2049         int rc = 0;
2050
2051         if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
2052                 netdev_err(dev, "Invalid microcode file size: %u\n",
2053                            (unsigned int)fw_size);
2054                 return -EINVAL;
2055         }
2056         trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
2057                                                 sizeof(*trailer)));
2058         if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
2059                 netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
2060                            le32_to_cpu(trailer->sig));
2061                 return -EINVAL;
2062         }
2063         if (le16_to_cpu(trailer->dir_type) != dir_type) {
2064                 netdev_err(dev, "Expected microcode type: %d, read: %d\n",
2065                            dir_type, le16_to_cpu(trailer->dir_type));
2066                 return -EINVAL;
2067         }
2068         if (le16_to_cpu(trailer->trailer_length) <
2069                 sizeof(struct bnxt_ucode_trailer)) {
2070                 netdev_err(dev, "Invalid microcode trailer length: %d\n",
2071                            le16_to_cpu(trailer->trailer_length));
2072                 return -EINVAL;
2073         }
2074
2075         /* Confirm the CRC32 checksum of the file: */
2076         stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
2077                                              sizeof(stored_crc)));
2078         calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
2079         if (calculated_crc != stored_crc) {
2080                 netdev_err(dev,
2081                            "CRC32 (%08lX) does not match calculated: %08lX\n",
2082                            (unsigned long)stored_crc,
2083                            (unsigned long)calculated_crc);
2084                 return -EINVAL;
2085         }
2086         rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
2087                               0, 0, fw_data, fw_size);
2088
2089         return rc;
2090 }
2091
2092 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
2093 {
2094         switch (dir_type) {
2095         case BNX_DIR_TYPE_CHIMP_PATCH:
2096         case BNX_DIR_TYPE_BOOTCODE:
2097         case BNX_DIR_TYPE_BOOTCODE_2:
2098         case BNX_DIR_TYPE_APE_FW:
2099         case BNX_DIR_TYPE_APE_PATCH:
2100         case BNX_DIR_TYPE_KONG_FW:
2101         case BNX_DIR_TYPE_KONG_PATCH:
2102         case BNX_DIR_TYPE_BONO_FW:
2103         case BNX_DIR_TYPE_BONO_PATCH:
2104                 return true;
2105         }
2106
2107         return false;
2108 }
2109
2110 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
2111 {
2112         switch (dir_type) {
2113         case BNX_DIR_TYPE_AVS:
2114         case BNX_DIR_TYPE_EXP_ROM_MBA:
2115         case BNX_DIR_TYPE_PCIE:
2116         case BNX_DIR_TYPE_TSCF_UCODE:
2117         case BNX_DIR_TYPE_EXT_PHY:
2118         case BNX_DIR_TYPE_CCM:
2119         case BNX_DIR_TYPE_ISCSI_BOOT:
2120         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
2121         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
2122                 return true;
2123         }
2124
2125         return false;
2126 }
2127
2128 static bool bnxt_dir_type_is_executable(u16 dir_type)
2129 {
2130         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
2131                 bnxt_dir_type_is_other_exec_format(dir_type);
2132 }
2133
2134 static int bnxt_flash_firmware_from_file(struct net_device *dev,
2135                                          u16 dir_type,
2136                                          const char *filename)
2137 {
2138         const struct firmware  *fw;
2139         int                     rc;
2140
2141         rc = request_firmware(&fw, filename, &dev->dev);
2142         if (rc != 0) {
2143                 netdev_err(dev, "Error %d requesting firmware file: %s\n",
2144                            rc, filename);
2145                 return rc;
2146         }
2147         if (bnxt_dir_type_is_ape_bin_format(dir_type))
2148                 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
2149         else if (bnxt_dir_type_is_other_exec_format(dir_type))
2150                 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
2151         else
2152                 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
2153                                       0, 0, fw->data, fw->size);
2154         release_firmware(fw);
2155         return rc;
2156 }
2157
2158 int bnxt_flash_package_from_file(struct net_device *dev, const char *filename,
2159                                  u32 install_type)
2160 {
2161         struct bnxt *bp = netdev_priv(dev);
2162         struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
2163         struct hwrm_nvm_install_update_input install = {0};
2164         const struct firmware *fw;
2165         u32 item_len;
2166         int rc = 0;
2167         u16 index;
2168
2169         bnxt_hwrm_fw_set_time(bp);
2170
2171         rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
2172                                   BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
2173                                   &index, &item_len, NULL);
2174         if (rc) {
2175                 netdev_err(dev, "PKG update area not created in nvram\n");
2176                 return rc;
2177         }
2178
2179         rc = request_firmware(&fw, filename, &dev->dev);
2180         if (rc != 0) {
2181                 netdev_err(dev, "PKG error %d requesting file: %s\n",
2182                            rc, filename);
2183                 return rc;
2184         }
2185
2186         if (fw->size > item_len) {
2187                 netdev_err(dev, "PKG insufficient update area in nvram: %lu\n",
2188                            (unsigned long)fw->size);
2189                 rc = -EFBIG;
2190         } else {
2191                 dma_addr_t dma_handle;
2192                 u8 *kmem;
2193                 struct hwrm_nvm_modify_input modify = {0};
2194
2195                 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
2196
2197                 modify.dir_idx = cpu_to_le16(index);
2198                 modify.len = cpu_to_le32(fw->size);
2199
2200                 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
2201                                           &dma_handle, GFP_KERNEL);
2202                 if (!kmem) {
2203                         netdev_err(dev,
2204                                    "dma_alloc_coherent failure, length = %u\n",
2205                                    (unsigned int)fw->size);
2206                         rc = -ENOMEM;
2207                 } else {
2208                         memcpy(kmem, fw->data, fw->size);
2209                         modify.host_src_addr = cpu_to_le64(dma_handle);
2210
2211                         rc = hwrm_send_message(bp, &modify, sizeof(modify),
2212                                                FLASH_PACKAGE_TIMEOUT);
2213                         dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
2214                                           dma_handle);
2215                 }
2216         }
2217         release_firmware(fw);
2218         if (rc)
2219                 goto err_exit;
2220
2221         if ((install_type & 0xffff) == 0)
2222                 install_type >>= 16;
2223         bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
2224         install.install_type = cpu_to_le32(install_type);
2225
2226         mutex_lock(&bp->hwrm_cmd_lock);
2227         rc = _hwrm_send_message(bp, &install, sizeof(install),
2228                                 INSTALL_PACKAGE_TIMEOUT);
2229         if (rc) {
2230                 u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
2231
2232                 if (resp->error_code && error_code ==
2233                     NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
2234                         install.flags |= cpu_to_le16(
2235                                NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
2236                         rc = _hwrm_send_message(bp, &install, sizeof(install),
2237                                                 INSTALL_PACKAGE_TIMEOUT);
2238                 }
2239                 if (rc)
2240                         goto flash_pkg_exit;
2241         }
2242
2243         if (resp->result) {
2244                 netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
2245                            (s8)resp->result, (int)resp->problem_item);
2246                 rc = -ENOPKG;
2247         }
2248 flash_pkg_exit:
2249         mutex_unlock(&bp->hwrm_cmd_lock);
2250 err_exit:
2251         if (rc == -EACCES)
2252                 bnxt_print_admin_err(bp);
2253         return rc;
2254 }
2255
2256 static int bnxt_flash_device(struct net_device *dev,
2257                              struct ethtool_flash *flash)
2258 {
2259         if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
2260                 netdev_err(dev, "flashdev not supported from a virtual function\n");
2261                 return -EINVAL;
2262         }
2263
2264         if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
2265             flash->region > 0xffff)
2266                 return bnxt_flash_package_from_file(dev, flash->data,
2267                                                     flash->region);
2268
2269         return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
2270 }
2271
2272 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
2273 {
2274         struct bnxt *bp = netdev_priv(dev);
2275         int rc;
2276         struct hwrm_nvm_get_dir_info_input req = {0};
2277         struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
2278
2279         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
2280
2281         mutex_lock(&bp->hwrm_cmd_lock);
2282         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2283         if (!rc) {
2284                 *entries = le32_to_cpu(output->entries);
2285                 *length = le32_to_cpu(output->entry_length);
2286         }
2287         mutex_unlock(&bp->hwrm_cmd_lock);
2288         return rc;
2289 }
2290
2291 static int bnxt_get_eeprom_len(struct net_device *dev)
2292 {
2293         struct bnxt *bp = netdev_priv(dev);
2294
2295         if (BNXT_VF(bp))
2296                 return 0;
2297
2298         /* The -1 return value allows the entire 32-bit range of offsets to be
2299          * passed via the ethtool command-line utility.
2300          */
2301         return -1;
2302 }
2303
2304 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
2305 {
2306         struct bnxt *bp = netdev_priv(dev);
2307         int rc;
2308         u32 dir_entries;
2309         u32 entry_length;
2310         u8 *buf;
2311         size_t buflen;
2312         dma_addr_t dma_handle;
2313         struct hwrm_nvm_get_dir_entries_input req = {0};
2314
2315         rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
2316         if (rc != 0)
2317                 return rc;
2318
2319         if (!dir_entries || !entry_length)
2320                 return -EIO;
2321
2322         /* Insert 2 bytes of directory info (count and size of entries) */
2323         if (len < 2)
2324                 return -EINVAL;
2325
2326         *data++ = dir_entries;
2327         *data++ = entry_length;
2328         len -= 2;
2329         memset(data, 0xff, len);
2330
2331         buflen = dir_entries * entry_length;
2332         buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
2333                                  GFP_KERNEL);
2334         if (!buf) {
2335                 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
2336                            (unsigned)buflen);
2337                 return -ENOMEM;
2338         }
2339         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
2340         req.host_dest_addr = cpu_to_le64(dma_handle);
2341         rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2342         if (rc == 0)
2343                 memcpy(data, buf, len > buflen ? buflen : len);
2344         dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
2345         return rc;
2346 }
2347
2348 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
2349                                u32 length, u8 *data)
2350 {
2351         struct bnxt *bp = netdev_priv(dev);
2352         int rc;
2353         u8 *buf;
2354         dma_addr_t dma_handle;
2355         struct hwrm_nvm_read_input req = {0};
2356
2357         if (!length)
2358                 return -EINVAL;
2359
2360         buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
2361                                  GFP_KERNEL);
2362         if (!buf) {
2363                 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
2364                            (unsigned)length);
2365                 return -ENOMEM;
2366         }
2367         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
2368         req.host_dest_addr = cpu_to_le64(dma_handle);
2369         req.dir_idx = cpu_to_le16(index);
2370         req.offset = cpu_to_le32(offset);
2371         req.len = cpu_to_le32(length);
2372
2373         rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2374         if (rc == 0)
2375                 memcpy(data, buf, length);
2376         dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
2377         return rc;
2378 }
2379
2380 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
2381                                 u16 ext, u16 *index, u32 *item_length,
2382                                 u32 *data_length)
2383 {
2384         struct bnxt *bp = netdev_priv(dev);
2385         int rc;
2386         struct hwrm_nvm_find_dir_entry_input req = {0};
2387         struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
2388
2389         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
2390         req.enables = 0;
2391         req.dir_idx = 0;
2392         req.dir_type = cpu_to_le16(type);
2393         req.dir_ordinal = cpu_to_le16(ordinal);
2394         req.dir_ext = cpu_to_le16(ext);
2395         req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
2396         mutex_lock(&bp->hwrm_cmd_lock);
2397         rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2398         if (rc == 0) {
2399                 if (index)
2400                         *index = le16_to_cpu(output->dir_idx);
2401                 if (item_length)
2402                         *item_length = le32_to_cpu(output->dir_item_length);
2403                 if (data_length)
2404                         *data_length = le32_to_cpu(output->dir_data_length);
2405         }
2406         mutex_unlock(&bp->hwrm_cmd_lock);
2407         return rc;
2408 }
2409
2410 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
2411 {
2412         char    *retval = NULL;
2413         char    *p;
2414         char    *value;
2415         int     field = 0;
2416
2417         if (datalen < 1)
2418                 return NULL;
2419         /* null-terminate the log data (removing last '\n'): */
2420         data[datalen - 1] = 0;
2421         for (p = data; *p != 0; p++) {
2422                 field = 0;
2423                 retval = NULL;
2424                 while (*p != 0 && *p != '\n') {
2425                         value = p;
2426                         while (*p != 0 && *p != '\t' && *p != '\n')
2427                                 p++;
2428                         if (field == desired_field)
2429                                 retval = value;
2430                         if (*p != '\t')
2431                                 break;
2432                         *p = 0;
2433                         field++;
2434                         p++;
2435                 }
2436                 if (*p == 0)
2437                         break;
2438                 *p = 0;
2439         }
2440         return retval;
2441 }
2442
2443 static void bnxt_get_pkgver(struct net_device *dev)
2444 {
2445         struct bnxt *bp = netdev_priv(dev);
2446         u16 index = 0;
2447         char *pkgver;
2448         u32 pkglen;
2449         u8 *pkgbuf;
2450         int len;
2451
2452         if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
2453                                  BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
2454                                  &index, NULL, &pkglen) != 0)
2455                 return;
2456
2457         pkgbuf = kzalloc(pkglen, GFP_KERNEL);
2458         if (!pkgbuf) {
2459                 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n",
2460                         pkglen);
2461                 return;
2462         }
2463
2464         if (bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf))
2465                 goto err;
2466
2467         pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf,
2468                                    pkglen);
2469         if (pkgver && *pkgver != 0 && isdigit(*pkgver)) {
2470                 len = strlen(bp->fw_ver_str);
2471                 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1,
2472                          "/pkg %s", pkgver);
2473         }
2474 err:
2475         kfree(pkgbuf);
2476 }
2477
2478 static int bnxt_get_eeprom(struct net_device *dev,
2479                            struct ethtool_eeprom *eeprom,
2480                            u8 *data)
2481 {
2482         u32 index;
2483         u32 offset;
2484
2485         if (eeprom->offset == 0) /* special offset value to get directory */
2486                 return bnxt_get_nvram_directory(dev, eeprom->len, data);
2487
2488         index = eeprom->offset >> 24;
2489         offset = eeprom->offset & 0xffffff;
2490
2491         if (index == 0) {
2492                 netdev_err(dev, "unsupported index value: %d\n", index);
2493                 return -EINVAL;
2494         }
2495
2496         return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
2497 }
2498
2499 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
2500 {
2501         struct bnxt *bp = netdev_priv(dev);
2502         struct hwrm_nvm_erase_dir_entry_input req = {0};
2503
2504         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
2505         req.dir_idx = cpu_to_le16(index);
2506         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2507 }
2508
2509 static int bnxt_set_eeprom(struct net_device *dev,
2510                            struct ethtool_eeprom *eeprom,
2511                            u8 *data)
2512 {
2513         struct bnxt *bp = netdev_priv(dev);
2514         u8 index, dir_op;
2515         u16 type, ext, ordinal, attr;
2516
2517         if (!BNXT_PF(bp)) {
2518                 netdev_err(dev, "NVM write not supported from a virtual function\n");
2519                 return -EINVAL;
2520         }
2521
2522         type = eeprom->magic >> 16;
2523
2524         if (type == 0xffff) { /* special value for directory operations */
2525                 index = eeprom->magic & 0xff;
2526                 dir_op = eeprom->magic >> 8;
2527                 if (index == 0)
2528                         return -EINVAL;
2529                 switch (dir_op) {
2530                 case 0x0e: /* erase */
2531                         if (eeprom->offset != ~eeprom->magic)
2532                                 return -EINVAL;
2533                         return bnxt_erase_nvram_directory(dev, index - 1);
2534                 default:
2535                         return -EINVAL;
2536                 }
2537         }
2538
2539         /* Create or re-write an NVM item: */
2540         if (bnxt_dir_type_is_executable(type))
2541                 return -EOPNOTSUPP;
2542         ext = eeprom->magic & 0xffff;
2543         ordinal = eeprom->offset >> 16;
2544         attr = eeprom->offset & 0xffff;
2545
2546         return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
2547                                 eeprom->len);
2548 }
2549
2550 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
2551 {
2552         struct bnxt *bp = netdev_priv(dev);
2553         struct ethtool_eee *eee = &bp->eee;
2554         struct bnxt_link_info *link_info = &bp->link_info;
2555         u32 advertising =
2556                  _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
2557         int rc = 0;
2558
2559         if (!BNXT_PHY_CFG_ABLE(bp))
2560                 return -EOPNOTSUPP;
2561
2562         if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2563                 return -EOPNOTSUPP;
2564
2565         if (!edata->eee_enabled)
2566                 goto eee_ok;
2567
2568         if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
2569                 netdev_warn(dev, "EEE requires autoneg\n");
2570                 return -EINVAL;
2571         }
2572         if (edata->tx_lpi_enabled) {
2573                 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
2574                                        edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
2575                         netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
2576                                     bp->lpi_tmr_lo, bp->lpi_tmr_hi);
2577                         return -EINVAL;
2578                 } else if (!bp->lpi_tmr_hi) {
2579                         edata->tx_lpi_timer = eee->tx_lpi_timer;
2580                 }
2581         }
2582         if (!edata->advertised) {
2583                 edata->advertised = advertising & eee->supported;
2584         } else if (edata->advertised & ~advertising) {
2585                 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
2586                             edata->advertised, advertising);
2587                 return -EINVAL;
2588         }
2589
2590         eee->advertised = edata->advertised;
2591         eee->tx_lpi_enabled = edata->tx_lpi_enabled;
2592         eee->tx_lpi_timer = edata->tx_lpi_timer;
2593 eee_ok:
2594         eee->eee_enabled = edata->eee_enabled;
2595
2596         if (netif_running(dev))
2597                 rc = bnxt_hwrm_set_link_setting(bp, false, true);
2598
2599         return rc;
2600 }
2601
2602 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
2603 {
2604         struct bnxt *bp = netdev_priv(dev);
2605
2606         if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2607                 return -EOPNOTSUPP;
2608
2609         *edata = bp->eee;
2610         if (!bp->eee.eee_enabled) {
2611                 /* Preserve tx_lpi_timer so that the last value will be used
2612                  * by default when it is re-enabled.
2613                  */
2614                 edata->advertised = 0;
2615                 edata->tx_lpi_enabled = 0;
2616         }
2617
2618         if (!bp->eee.eee_active)
2619                 edata->lp_advertised = 0;
2620
2621         return 0;
2622 }
2623
2624 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
2625                                             u16 page_number, u16 start_addr,
2626                                             u16 data_length, u8 *buf)
2627 {
2628         struct hwrm_port_phy_i2c_read_input req = {0};
2629         struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
2630         int rc, byte_offset = 0;
2631
2632         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
2633         req.i2c_slave_addr = i2c_addr;
2634         req.page_number = cpu_to_le16(page_number);
2635         req.port_id = cpu_to_le16(bp->pf.port_id);
2636         do {
2637                 u16 xfer_size;
2638
2639                 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
2640                 data_length -= xfer_size;
2641                 req.page_offset = cpu_to_le16(start_addr + byte_offset);
2642                 req.data_length = xfer_size;
2643                 req.enables = cpu_to_le32(start_addr + byte_offset ?
2644                                  PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
2645                 mutex_lock(&bp->hwrm_cmd_lock);
2646                 rc = _hwrm_send_message(bp, &req, sizeof(req),
2647                                         HWRM_CMD_TIMEOUT);
2648                 if (!rc)
2649                         memcpy(buf + byte_offset, output->data, xfer_size);
2650                 mutex_unlock(&bp->hwrm_cmd_lock);
2651                 byte_offset += xfer_size;
2652         } while (!rc && data_length > 0);
2653
2654         return rc;
2655 }
2656
2657 static int bnxt_get_module_info(struct net_device *dev,
2658                                 struct ethtool_modinfo *modinfo)
2659 {
2660         u8 data[SFF_DIAG_SUPPORT_OFFSET + 1];
2661         struct bnxt *bp = netdev_priv(dev);
2662         int rc;
2663
2664         /* No point in going further if phy status indicates
2665          * module is not inserted or if it is powered down or
2666          * if it is of type 10GBase-T
2667          */
2668         if (bp->link_info.module_status >
2669                 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
2670                 return -EOPNOTSUPP;
2671
2672         /* This feature is not supported in older firmware versions */
2673         if (bp->hwrm_spec_code < 0x10202)
2674                 return -EOPNOTSUPP;
2675
2676         rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0,
2677                                               SFF_DIAG_SUPPORT_OFFSET + 1,
2678                                               data);
2679         if (!rc) {
2680                 u8 module_id = data[0];
2681                 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET];
2682
2683                 switch (module_id) {
2684                 case SFF_MODULE_ID_SFP:
2685                         modinfo->type = ETH_MODULE_SFF_8472;
2686                         modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2687                         if (!diag_supported)
2688                                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2689                         break;
2690                 case SFF_MODULE_ID_QSFP:
2691                 case SFF_MODULE_ID_QSFP_PLUS:
2692                         modinfo->type = ETH_MODULE_SFF_8436;
2693                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2694                         break;
2695                 case SFF_MODULE_ID_QSFP28:
2696                         modinfo->type = ETH_MODULE_SFF_8636;
2697                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2698                         break;
2699                 default:
2700                         rc = -EOPNOTSUPP;
2701                         break;
2702                 }
2703         }
2704         return rc;
2705 }
2706
2707 static int bnxt_get_module_eeprom(struct net_device *dev,
2708                                   struct ethtool_eeprom *eeprom,
2709                                   u8 *data)
2710 {
2711         struct bnxt *bp = netdev_priv(dev);
2712         u16  start = eeprom->offset, length = eeprom->len;
2713         int rc = 0;
2714
2715         memset(data, 0, eeprom->len);
2716
2717         /* Read A0 portion of the EEPROM */
2718         if (start < ETH_MODULE_SFF_8436_LEN) {
2719                 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
2720                         length = ETH_MODULE_SFF_8436_LEN - start;
2721                 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
2722                                                       start, length, data);
2723                 if (rc)
2724                         return rc;
2725                 start += length;
2726                 data += length;
2727                 length = eeprom->len - length;
2728         }
2729
2730         /* Read A2 portion of the EEPROM */
2731         if (length) {
2732                 start -= ETH_MODULE_SFF_8436_LEN;
2733                 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1,
2734                                                       start, length, data);
2735         }
2736         return rc;
2737 }
2738
2739 static int bnxt_nway_reset(struct net_device *dev)
2740 {
2741         int rc = 0;
2742
2743         struct bnxt *bp = netdev_priv(dev);
2744         struct bnxt_link_info *link_info = &bp->link_info;
2745
2746         if (!BNXT_PHY_CFG_ABLE(bp))
2747                 return -EOPNOTSUPP;
2748
2749         if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
2750                 return -EINVAL;
2751
2752         if (netif_running(dev))
2753                 rc = bnxt_hwrm_set_link_setting(bp, true, false);
2754
2755         return rc;
2756 }
2757
2758 static int bnxt_set_phys_id(struct net_device *dev,
2759                             enum ethtool_phys_id_state state)
2760 {
2761         struct hwrm_port_led_cfg_input req = {0};
2762         struct bnxt *bp = netdev_priv(dev);
2763         struct bnxt_pf_info *pf = &bp->pf;
2764         struct bnxt_led_cfg *led_cfg;
2765         u8 led_state;
2766         __le16 duration;
2767         int i;
2768
2769         if (!bp->num_leds || BNXT_VF(bp))
2770                 return -EOPNOTSUPP;
2771
2772         if (state == ETHTOOL_ID_ACTIVE) {
2773                 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
2774                 duration = cpu_to_le16(500);
2775         } else if (state == ETHTOOL_ID_INACTIVE) {
2776                 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
2777                 duration = cpu_to_le16(0);
2778         } else {
2779                 return -EINVAL;
2780         }
2781         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
2782         req.port_id = cpu_to_le16(pf->port_id);
2783         req.num_leds = bp->num_leds;
2784         led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
2785         for (i = 0; i < bp->num_leds; i++, led_cfg++) {
2786                 req.enables |= BNXT_LED_DFLT_ENABLES(i);
2787                 led_cfg->led_id = bp->leds[i].led_id;
2788                 led_cfg->led_state = led_state;
2789                 led_cfg->led_blink_on = duration;
2790                 led_cfg->led_blink_off = duration;
2791                 led_cfg->led_group_id = bp->leds[i].led_group_id;
2792         }
2793         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2794 }
2795
2796 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
2797 {
2798         struct hwrm_selftest_irq_input req = {0};
2799
2800         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
2801         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2802 }
2803
2804 static int bnxt_test_irq(struct bnxt *bp)
2805 {
2806         int i;
2807
2808         for (i = 0; i < bp->cp_nr_rings; i++) {
2809                 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
2810                 int rc;
2811
2812                 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
2813                 if (rc)
2814                         return rc;
2815         }
2816         return 0;
2817 }
2818
2819 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
2820 {
2821         struct hwrm_port_mac_cfg_input req = {0};
2822
2823         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
2824
2825         req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
2826         if (enable)
2827                 req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
2828         else
2829                 req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
2830         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2831 }
2832
2833 static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds)
2834 {
2835         struct hwrm_port_phy_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
2836         struct hwrm_port_phy_qcaps_input req = {0};
2837         int rc;
2838
2839         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_QCAPS, -1, -1);
2840         mutex_lock(&bp->hwrm_cmd_lock);
2841         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2842         if (!rc)
2843                 *force_speeds = le16_to_cpu(resp->supported_speeds_force_mode);
2844
2845         mutex_unlock(&bp->hwrm_cmd_lock);
2846         return rc;
2847 }
2848
2849 static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
2850                                     struct hwrm_port_phy_cfg_input *req)
2851 {
2852         struct bnxt_link_info *link_info = &bp->link_info;
2853         u16 fw_advertising;
2854         u16 fw_speed;
2855         int rc;
2856
2857         if (!link_info->autoneg ||
2858             (bp->test_info->flags & BNXT_TEST_FL_AN_PHY_LPBK))
2859                 return 0;
2860
2861         rc = bnxt_query_force_speeds(bp, &fw_advertising);
2862         if (rc)
2863                 return rc;
2864
2865         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
2866         if (bp->link_info.link_up)
2867                 fw_speed = bp->link_info.link_speed;
2868         else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
2869                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
2870         else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
2871                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
2872         else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
2873                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
2874         else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
2875                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
2876
2877         req->force_link_speed = cpu_to_le16(fw_speed);
2878         req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
2879                                   PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
2880         rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
2881         req->flags = 0;
2882         req->force_link_speed = cpu_to_le16(0);
2883         return rc;
2884 }
2885
2886 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext)
2887 {
2888         struct hwrm_port_phy_cfg_input req = {0};
2889
2890         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
2891
2892         if (enable) {
2893                 bnxt_disable_an_for_lpbk(bp, &req);
2894                 if (ext)
2895                         req.lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL;
2896                 else
2897                         req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
2898         } else {
2899                 req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
2900         }
2901         req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
2902         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2903 }
2904
2905 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
2906                             u32 raw_cons, int pkt_size)
2907 {
2908         struct bnxt_napi *bnapi = cpr->bnapi;
2909         struct bnxt_rx_ring_info *rxr;
2910         struct bnxt_sw_rx_bd *rx_buf;
2911         struct rx_cmp *rxcmp;
2912         u16 cp_cons, cons;
2913         u8 *data;
2914         u32 len;
2915         int i;
2916
2917         rxr = bnapi->rx_ring;
2918         cp_cons = RING_CMP(raw_cons);
2919         rxcmp = (struct rx_cmp *)
2920                 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
2921         cons = rxcmp->rx_cmp_opaque;
2922         rx_buf = &rxr->rx_buf_ring[cons];
2923         data = rx_buf->data_ptr;
2924         len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
2925         if (len != pkt_size)
2926                 return -EIO;
2927         i = ETH_ALEN;
2928         if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
2929                 return -EIO;
2930         i += ETH_ALEN;
2931         for (  ; i < pkt_size; i++) {
2932                 if (data[i] != (u8)(i & 0xff))
2933                         return -EIO;
2934         }
2935         return 0;
2936 }
2937
2938 static int bnxt_poll_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
2939                               int pkt_size)
2940 {
2941         struct tx_cmp *txcmp;
2942         int rc = -EIO;
2943         u32 raw_cons;
2944         u32 cons;
2945         int i;
2946
2947         raw_cons = cpr->cp_raw_cons;
2948         for (i = 0; i < 200; i++) {
2949                 cons = RING_CMP(raw_cons);
2950                 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
2951
2952                 if (!TX_CMP_VALID(txcmp, raw_cons)) {
2953                         udelay(5);
2954                         continue;
2955                 }
2956
2957                 /* The valid test of the entry must be done first before
2958                  * reading any further.
2959                  */
2960                 dma_rmb();
2961                 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
2962                         rc = bnxt_rx_loopback(bp, cpr, raw_cons, pkt_size);
2963                         raw_cons = NEXT_RAW_CMP(raw_cons);
2964                         raw_cons = NEXT_RAW_CMP(raw_cons);
2965                         break;
2966                 }
2967                 raw_cons = NEXT_RAW_CMP(raw_cons);
2968         }
2969         cpr->cp_raw_cons = raw_cons;
2970         return rc;
2971 }
2972
2973 static int bnxt_run_loopback(struct bnxt *bp)
2974 {
2975         struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
2976         struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0];
2977         struct bnxt_cp_ring_info *cpr;
2978         int pkt_size, i = 0;
2979         struct sk_buff *skb;
2980         dma_addr_t map;
2981         u8 *data;
2982         int rc;
2983
2984         cpr = &rxr->bnapi->cp_ring;
2985         if (bp->flags & BNXT_FLAG_CHIP_P5)
2986                 cpr = cpr->cp_ring_arr[BNXT_RX_HDL];
2987         pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
2988         skb = netdev_alloc_skb(bp->dev, pkt_size);
2989         if (!skb)
2990                 return -ENOMEM;
2991         data = skb_put(skb, pkt_size);
2992         eth_broadcast_addr(data);
2993         i += ETH_ALEN;
2994         ether_addr_copy(&data[i], bp->dev->dev_addr);
2995         i += ETH_ALEN;
2996         for ( ; i < pkt_size; i++)
2997                 data[i] = (u8)(i & 0xff);
2998
2999         map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
3000                              PCI_DMA_TODEVICE);
3001         if (dma_mapping_error(&bp->pdev->dev, map)) {
3002                 dev_kfree_skb(skb);
3003                 return -EIO;
3004         }
3005         bnxt_xmit_bd(bp, txr, map, pkt_size);
3006
3007         /* Sync BD data before updating doorbell */
3008         wmb();
3009
3010         bnxt_db_write(bp, &txr->tx_db, txr->tx_prod);
3011         rc = bnxt_poll_loopback(bp, cpr, pkt_size);
3012
3013         dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
3014         dev_kfree_skb(skb);
3015         return rc;
3016 }
3017
3018 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
3019 {
3020         struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
3021         struct hwrm_selftest_exec_input req = {0};
3022         int rc;
3023
3024         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
3025         mutex_lock(&bp->hwrm_cmd_lock);
3026         resp->test_success = 0;
3027         req.flags = test_mask;
3028         rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
3029         *test_results = resp->test_success;
3030         mutex_unlock(&bp->hwrm_cmd_lock);
3031         return rc;
3032 }
3033
3034 #define BNXT_DRV_TESTS                  4
3035 #define BNXT_MACLPBK_TEST_IDX           (bp->num_tests - BNXT_DRV_TESTS)
3036 #define BNXT_PHYLPBK_TEST_IDX           (BNXT_MACLPBK_TEST_IDX + 1)
3037 #define BNXT_EXTLPBK_TEST_IDX           (BNXT_MACLPBK_TEST_IDX + 2)
3038 #define BNXT_IRQ_TEST_IDX               (BNXT_MACLPBK_TEST_IDX + 3)
3039
3040 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
3041                            u64 *buf)
3042 {
3043         struct bnxt *bp = netdev_priv(dev);
3044         bool do_ext_lpbk = false;
3045         bool offline = false;
3046         u8 test_results = 0;
3047         u8 test_mask = 0;
3048         int rc = 0, i;
3049
3050         if (!bp->num_tests || !BNXT_SINGLE_PF(bp))
3051                 return;
3052         memset(buf, 0, sizeof(u64) * bp->num_tests);
3053         if (!netif_running(dev)) {
3054                 etest->flags |= ETH_TEST_FL_FAILED;
3055                 return;
3056         }
3057
3058         if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) &&
3059             (bp->test_info->flags & BNXT_TEST_FL_EXT_LPBK))
3060                 do_ext_lpbk = true;
3061
3062         if (etest->flags & ETH_TEST_FL_OFFLINE) {
3063                 if (bp->pf.active_vfs) {
3064                         etest->flags |= ETH_TEST_FL_FAILED;
3065                         netdev_warn(dev, "Offline tests cannot be run with active VFs\n");
3066                         return;
3067                 }
3068                 offline = true;
3069         }
3070
3071         for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
3072                 u8 bit_val = 1 << i;
3073
3074                 if (!(bp->test_info->offline_mask & bit_val))
3075                         test_mask |= bit_val;
3076                 else if (offline)
3077                         test_mask |= bit_val;
3078         }
3079         if (!offline) {
3080                 bnxt_run_fw_tests(bp, test_mask, &test_results);
3081         } else {
3082                 rc = bnxt_close_nic(bp, false, false);
3083                 if (rc)
3084                         return;
3085                 bnxt_run_fw_tests(bp, test_mask, &test_results);
3086
3087                 buf[BNXT_MACLPBK_TEST_IDX] = 1;
3088                 bnxt_hwrm_mac_loopback(bp, true);
3089                 msleep(250);
3090                 rc = bnxt_half_open_nic(bp);
3091                 if (rc) {
3092                         bnxt_hwrm_mac_loopback(bp, false);
3093                         etest->flags |= ETH_TEST_FL_FAILED;
3094                         return;
3095                 }
3096                 if (bnxt_run_loopback(bp))
3097                         etest->flags |= ETH_TEST_FL_FAILED;
3098                 else
3099                         buf[BNXT_MACLPBK_TEST_IDX] = 0;
3100
3101                 bnxt_hwrm_mac_loopback(bp, false);
3102                 bnxt_hwrm_phy_loopback(bp, true, false);
3103                 msleep(1000);
3104                 if (bnxt_run_loopback(bp)) {
3105                         buf[BNXT_PHYLPBK_TEST_IDX] = 1;
3106                         etest->flags |= ETH_TEST_FL_FAILED;
3107                 }
3108                 if (do_ext_lpbk) {
3109                         etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE;
3110                         bnxt_hwrm_phy_loopback(bp, true, true);
3111                         msleep(1000);
3112                         if (bnxt_run_loopback(bp)) {
3113                                 buf[BNXT_EXTLPBK_TEST_IDX] = 1;
3114                                 etest->flags |= ETH_TEST_FL_FAILED;
3115                         }
3116                 }
3117                 bnxt_hwrm_phy_loopback(bp, false, false);
3118                 bnxt_half_close_nic(bp);
3119                 rc = bnxt_open_nic(bp, false, true);
3120         }
3121         if (rc || bnxt_test_irq(bp)) {
3122                 buf[BNXT_IRQ_TEST_IDX] = 1;
3123                 etest->flags |= ETH_TEST_FL_FAILED;
3124         }
3125         for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
3126                 u8 bit_val = 1 << i;
3127
3128                 if ((test_mask & bit_val) && !(test_results & bit_val)) {
3129                         buf[i] = 1;
3130                         etest->flags |= ETH_TEST_FL_FAILED;
3131                 }
3132         }
3133 }
3134
3135 static int bnxt_reset(struct net_device *dev, u32 *flags)
3136 {
3137         struct bnxt *bp = netdev_priv(dev);
3138         bool reload = false;
3139         u32 req = *flags;
3140
3141         if (!req)
3142                 return -EINVAL;
3143
3144         if (!BNXT_PF(bp)) {
3145                 netdev_err(dev, "Reset is not supported from a VF\n");
3146                 return -EOPNOTSUPP;
3147         }
3148
3149         if (pci_vfs_assigned(bp->pdev) &&
3150             !(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) {
3151                 netdev_err(dev,
3152                            "Reset not allowed when VFs are assigned to VMs\n");
3153                 return -EBUSY;
3154         }
3155
3156         if ((req & BNXT_FW_RESET_CHIP) == BNXT_FW_RESET_CHIP) {
3157                 /* This feature is not supported in older firmware versions */
3158                 if (bp->hwrm_spec_code >= 0x10803) {
3159                         if (!bnxt_firmware_reset_chip(dev)) {
3160                                 netdev_info(dev, "Firmware reset request successful.\n");
3161                                 if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET))
3162                                         reload = true;
3163                                 *flags &= ~BNXT_FW_RESET_CHIP;
3164                         }
3165                 } else if (req == BNXT_FW_RESET_CHIP) {
3166                         return -EOPNOTSUPP; /* only request, fail hard */
3167                 }
3168         }
3169
3170         if (req & BNXT_FW_RESET_AP) {
3171                 /* This feature is not supported in older firmware versions */
3172                 if (bp->hwrm_spec_code >= 0x10803) {
3173                         if (!bnxt_firmware_reset_ap(dev)) {
3174                                 netdev_info(dev, "Reset application processor successful.\n");
3175                                 reload = true;
3176                                 *flags &= ~BNXT_FW_RESET_AP;
3177                         }
3178                 } else if (req == BNXT_FW_RESET_AP) {
3179                         return -EOPNOTSUPP; /* only request, fail hard */
3180                 }
3181         }
3182
3183         if (reload)
3184                 netdev_info(dev, "Reload driver to complete reset\n");
3185
3186         return 0;
3187 }
3188
3189 static int bnxt_hwrm_dbg_dma_data(struct bnxt *bp, void *msg, int msg_len,
3190                                   struct bnxt_hwrm_dbg_dma_info *info)
3191 {
3192         struct hwrm_dbg_cmn_output *cmn_resp = bp->hwrm_cmd_resp_addr;
3193         struct hwrm_dbg_cmn_input *cmn_req = msg;
3194         __le16 *seq_ptr = msg + info->seq_off;
3195         u16 seq = 0, len, segs_off;
3196         void *resp = cmn_resp;
3197         dma_addr_t dma_handle;
3198         int rc, off = 0;
3199         void *dma_buf;
3200
3201         dma_buf = dma_alloc_coherent(&bp->pdev->dev, info->dma_len, &dma_handle,
3202                                      GFP_KERNEL);
3203         if (!dma_buf)
3204                 return -ENOMEM;
3205
3206         segs_off = offsetof(struct hwrm_dbg_coredump_list_output,
3207                             total_segments);
3208         cmn_req->host_dest_addr = cpu_to_le64(dma_handle);
3209         cmn_req->host_buf_len = cpu_to_le32(info->dma_len);
3210         mutex_lock(&bp->hwrm_cmd_lock);
3211         while (1) {
3212                 *seq_ptr = cpu_to_le16(seq);
3213                 rc = _hwrm_send_message(bp, msg, msg_len,
3214                                         HWRM_COREDUMP_TIMEOUT);
3215                 if (rc)
3216                         break;
3217
3218                 len = le16_to_cpu(*((__le16 *)(resp + info->data_len_off)));
3219                 if (!seq &&
3220                     cmn_req->req_type == cpu_to_le16(HWRM_DBG_COREDUMP_LIST)) {
3221                         info->segs = le16_to_cpu(*((__le16 *)(resp +
3222                                                               segs_off)));
3223                         if (!info->segs) {
3224                                 rc = -EIO;
3225                                 break;
3226                         }
3227
3228                         info->dest_buf_size = info->segs *
3229                                         sizeof(struct coredump_segment_record);
3230                         info->dest_buf = kmalloc(info->dest_buf_size,
3231                                                  GFP_KERNEL);
3232                         if (!info->dest_buf) {
3233                                 rc = -ENOMEM;
3234                                 break;
3235                         }
3236                 }
3237
3238                 if (info->dest_buf) {
3239                         if ((info->seg_start + off + len) <=
3240                             BNXT_COREDUMP_BUF_LEN(info->buf_len)) {
3241                                 memcpy(info->dest_buf + off, dma_buf, len);
3242                         } else {
3243                                 rc = -ENOBUFS;
3244                                 break;
3245                         }
3246                 }
3247
3248                 if (cmn_req->req_type ==
3249                                 cpu_to_le16(HWRM_DBG_COREDUMP_RETRIEVE))
3250                         info->dest_buf_size += len;
3251
3252                 if (!(cmn_resp->flags & HWRM_DBG_CMN_FLAGS_MORE))
3253                         break;
3254
3255                 seq++;
3256                 off += len;
3257         }
3258         mutex_unlock(&bp->hwrm_cmd_lock);
3259         dma_free_coherent(&bp->pdev->dev, info->dma_len, dma_buf, dma_handle);
3260         return rc;
3261 }
3262
3263 static int bnxt_hwrm_dbg_coredump_list(struct bnxt *bp,
3264                                        struct bnxt_coredump *coredump)
3265 {
3266         struct hwrm_dbg_coredump_list_input req = {0};
3267         struct bnxt_hwrm_dbg_dma_info info = {NULL};
3268         int rc;
3269
3270         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_LIST, -1, -1);
3271
3272         info.dma_len = COREDUMP_LIST_BUF_LEN;
3273         info.seq_off = offsetof(struct hwrm_dbg_coredump_list_input, seq_no);
3274         info.data_len_off = offsetof(struct hwrm_dbg_coredump_list_output,
3275                                      data_len);
3276
3277         rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info);
3278         if (!rc) {
3279                 coredump->data = info.dest_buf;
3280                 coredump->data_size = info.dest_buf_size;
3281                 coredump->total_segs = info.segs;
3282         }
3283         return rc;
3284 }
3285
3286 static int bnxt_hwrm_dbg_coredump_initiate(struct bnxt *bp, u16 component_id,
3287                                            u16 segment_id)
3288 {
3289         struct hwrm_dbg_coredump_initiate_input req = {0};
3290
3291         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_INITIATE, -1, -1);
3292         req.component_id = cpu_to_le16(component_id);
3293         req.segment_id = cpu_to_le16(segment_id);
3294
3295         return hwrm_send_message(bp, &req, sizeof(req), HWRM_COREDUMP_TIMEOUT);
3296 }
3297
3298 static int bnxt_hwrm_dbg_coredump_retrieve(struct bnxt *bp, u16 component_id,
3299                                            u16 segment_id, u32 *seg_len,
3300                                            void *buf, u32 buf_len, u32 offset)
3301 {
3302         struct hwrm_dbg_coredump_retrieve_input req = {0};
3303         struct bnxt_hwrm_dbg_dma_info info = {NULL};
3304         int rc;
3305
3306         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_RETRIEVE, -1, -1);
3307         req.component_id = cpu_to_le16(component_id);
3308         req.segment_id = cpu_to_le16(segment_id);
3309
3310         info.dma_len = COREDUMP_RETRIEVE_BUF_LEN;
3311         info.seq_off = offsetof(struct hwrm_dbg_coredump_retrieve_input,
3312                                 seq_no);
3313         info.data_len_off = offsetof(struct hwrm_dbg_coredump_retrieve_output,
3314                                      data_len);
3315         if (buf) {
3316                 info.dest_buf = buf + offset;
3317                 info.buf_len = buf_len;
3318                 info.seg_start = offset;
3319         }
3320
3321         rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info);
3322         if (!rc)
3323                 *seg_len = info.dest_buf_size;
3324
3325         return rc;
3326 }
3327
3328 static void
3329 bnxt_fill_coredump_seg_hdr(struct bnxt *bp,
3330                            struct bnxt_coredump_segment_hdr *seg_hdr,
3331                            struct coredump_segment_record *seg_rec, u32 seg_len,
3332                            int status, u32 duration, u32 instance)
3333 {
3334         memset(seg_hdr, 0, sizeof(*seg_hdr));
3335         memcpy(seg_hdr->signature, "sEgM", 4);
3336         if (seg_rec) {
3337                 seg_hdr->component_id = (__force __le32)seg_rec->component_id;
3338                 seg_hdr->segment_id = (__force __le32)seg_rec->segment_id;
3339                 seg_hdr->low_version = seg_rec->version_low;
3340                 seg_hdr->high_version = seg_rec->version_hi;
3341         } else {
3342                 /* For hwrm_ver_get response Component id = 2
3343                  * and Segment id = 0
3344                  */
3345                 seg_hdr->component_id = cpu_to_le32(2);
3346                 seg_hdr->segment_id = 0;
3347         }
3348         seg_hdr->function_id = cpu_to_le16(bp->pdev->devfn);
3349         seg_hdr->length = cpu_to_le32(seg_len);
3350         seg_hdr->status = cpu_to_le32(status);
3351         seg_hdr->duration = cpu_to_le32(duration);
3352         seg_hdr->data_offset = cpu_to_le32(sizeof(*seg_hdr));
3353         seg_hdr->instance = cpu_to_le32(instance);
3354 }
3355
3356 static void
3357 bnxt_fill_coredump_record(struct bnxt *bp, struct bnxt_coredump_record *record,
3358                           time64_t start, s16 start_utc, u16 total_segs,
3359                           int status)
3360 {
3361         time64_t end = ktime_get_real_seconds();
3362         u32 os_ver_major = 0, os_ver_minor = 0;
3363         struct tm tm;
3364
3365         time64_to_tm(start, 0, &tm);
3366         memset(record, 0, sizeof(*record));
3367         memcpy(record->signature, "cOrE", 4);
3368         record->flags = 0;
3369         record->low_version = 0;
3370         record->high_version = 1;
3371         record->asic_state = 0;
3372         strlcpy(record->system_name, utsname()->nodename,
3373                 sizeof(record->system_name));
3374         record->year = cpu_to_le16(tm.tm_year + 1900);
3375         record->month = cpu_to_le16(tm.tm_mon + 1);
3376         record->day = cpu_to_le16(tm.tm_mday);
3377         record->hour = cpu_to_le16(tm.tm_hour);
3378         record->minute = cpu_to_le16(tm.tm_min);
3379         record->second = cpu_to_le16(tm.tm_sec);
3380         record->utc_bias = cpu_to_le16(start_utc);
3381         strcpy(record->commandline, "ethtool -w");
3382         record->total_segments = cpu_to_le32(total_segs);
3383
3384         sscanf(utsname()->release, "%u.%u", &os_ver_major, &os_ver_minor);
3385         record->os_ver_major = cpu_to_le32(os_ver_major);
3386         record->os_ver_minor = cpu_to_le32(os_ver_minor);
3387
3388         strlcpy(record->os_name, utsname()->sysname, 32);
3389         time64_to_tm(end, 0, &tm);
3390         record->end_year = cpu_to_le16(tm.tm_year + 1900);
3391         record->end_month = cpu_to_le16(tm.tm_mon + 1);
3392         record->end_day = cpu_to_le16(tm.tm_mday);
3393         record->end_hour = cpu_to_le16(tm.tm_hour);
3394         record->end_minute = cpu_to_le16(tm.tm_min);
3395         record->end_second = cpu_to_le16(tm.tm_sec);
3396         record->end_utc_bias = cpu_to_le16(sys_tz.tz_minuteswest * 60);
3397         record->asic_id1 = cpu_to_le32(bp->chip_num << 16 |
3398                                        bp->ver_resp.chip_rev << 8 |
3399                                        bp->ver_resp.chip_metal);
3400         record->asic_id2 = 0;
3401         record->coredump_status = cpu_to_le32(status);
3402         record->ioctl_low_version = 0;
3403         record->ioctl_high_version = 0;
3404 }
3405
3406 static int bnxt_get_coredump(struct bnxt *bp, void *buf, u32 *dump_len)
3407 {
3408         u32 ver_get_resp_len = sizeof(struct hwrm_ver_get_output);
3409         u32 offset = 0, seg_hdr_len, seg_record_len, buf_len = 0;
3410         struct coredump_segment_record *seg_record = NULL;
3411         struct bnxt_coredump_segment_hdr seg_hdr;
3412         struct bnxt_coredump coredump = {NULL};
3413         time64_t start_time;
3414         u16 start_utc;
3415         int rc = 0, i;
3416
3417         if (buf)
3418                 buf_len = *dump_len;
3419
3420         start_time = ktime_get_real_seconds();
3421         start_utc = sys_tz.tz_minuteswest * 60;
3422         seg_hdr_len = sizeof(seg_hdr);
3423
3424         /* First segment should be hwrm_ver_get response */
3425         *dump_len = seg_hdr_len + ver_get_resp_len;
3426         if (buf) {
3427                 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, NULL, ver_get_resp_len,
3428                                            0, 0, 0);
3429                 memcpy(buf + offset, &seg_hdr, seg_hdr_len);
3430                 offset += seg_hdr_len;
3431                 memcpy(buf + offset, &bp->ver_resp, ver_get_resp_len);
3432                 offset += ver_get_resp_len;
3433         }
3434
3435         rc = bnxt_hwrm_dbg_coredump_list(bp, &coredump);
3436         if (rc) {
3437                 netdev_err(bp->dev, "Failed to get coredump segment list\n");
3438                 goto err;
3439         }
3440
3441         *dump_len += seg_hdr_len * coredump.total_segs;
3442
3443         seg_record = (struct coredump_segment_record *)coredump.data;
3444         seg_record_len = sizeof(*seg_record);
3445
3446         for (i = 0; i < coredump.total_segs; i++) {
3447                 u16 comp_id = le16_to_cpu(seg_record->component_id);
3448                 u16 seg_id = le16_to_cpu(seg_record->segment_id);
3449                 u32 duration = 0, seg_len = 0;
3450                 unsigned long start, end;
3451
3452                 if (buf && ((offset + seg_hdr_len) >
3453                             BNXT_COREDUMP_BUF_LEN(buf_len))) {
3454                         rc = -ENOBUFS;
3455                         goto err;
3456                 }
3457
3458                 start = jiffies;
3459
3460                 rc = bnxt_hwrm_dbg_coredump_initiate(bp, comp_id, seg_id);
3461                 if (rc) {
3462                         netdev_err(bp->dev,
3463                                    "Failed to initiate coredump for seg = %d\n",
3464                                    seg_record->segment_id);
3465                         goto next_seg;
3466                 }
3467
3468                 /* Write segment data into the buffer */
3469                 rc = bnxt_hwrm_dbg_coredump_retrieve(bp, comp_id, seg_id,
3470                                                      &seg_len, buf, buf_len,
3471                                                      offset + seg_hdr_len);
3472                 if (rc && rc == -ENOBUFS)
3473                         goto err;
3474                 else if (rc)
3475                         netdev_err(bp->dev,
3476                                    "Failed to retrieve coredump for seg = %d\n",
3477                                    seg_record->segment_id);
3478
3479 next_seg:
3480                 end = jiffies;
3481                 duration = jiffies_to_msecs(end - start);
3482                 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, seg_record, seg_len,
3483                                            rc, duration, 0);
3484
3485                 if (buf) {
3486                         /* Write segment header into the buffer */
3487                         memcpy(buf + offset, &seg_hdr, seg_hdr_len);
3488                         offset += seg_hdr_len + seg_len;
3489                 }
3490
3491                 *dump_len += seg_len;
3492                 seg_record =
3493                         (struct coredump_segment_record *)((u8 *)seg_record +
3494                                                            seg_record_len);
3495         }
3496
3497 err:
3498         if (buf)
3499                 bnxt_fill_coredump_record(bp, buf + offset, start_time,
3500                                           start_utc, coredump.total_segs + 1,
3501                                           rc);
3502         kfree(coredump.data);
3503         *dump_len += sizeof(struct bnxt_coredump_record);
3504         if (rc == -ENOBUFS)
3505                 netdev_err(bp->dev, "Firmware returned large coredump buffer\n");
3506         return rc;
3507 }
3508
3509 static int bnxt_set_dump(struct net_device *dev, struct ethtool_dump *dump)
3510 {
3511         struct bnxt *bp = netdev_priv(dev);
3512
3513         if (dump->flag > BNXT_DUMP_CRASH) {
3514                 netdev_info(dev, "Supports only Live(0) and Crash(1) dumps.\n");
3515                 return -EINVAL;
3516         }
3517
3518         if (!IS_ENABLED(CONFIG_TEE_BNXT_FW) && dump->flag == BNXT_DUMP_CRASH) {
3519                 netdev_info(dev, "Cannot collect crash dump as TEE_BNXT_FW config option is not enabled.\n");
3520                 return -EOPNOTSUPP;
3521         }
3522
3523         bp->dump_flag = dump->flag;
3524         return 0;
3525 }
3526
3527 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump)
3528 {
3529         struct bnxt *bp = netdev_priv(dev);
3530
3531         if (bp->hwrm_spec_code < 0x10801)
3532                 return -EOPNOTSUPP;
3533
3534         dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 |
3535                         bp->ver_resp.hwrm_fw_min_8b << 16 |
3536                         bp->ver_resp.hwrm_fw_bld_8b << 8 |
3537                         bp->ver_resp.hwrm_fw_rsvd_8b;
3538
3539         dump->flag = bp->dump_flag;
3540         if (bp->dump_flag == BNXT_DUMP_CRASH)
3541                 dump->len = BNXT_CRASH_DUMP_LEN;
3542         else
3543                 bnxt_get_coredump(bp, NULL, &dump->len);
3544         return 0;
3545 }
3546
3547 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump,
3548                               void *buf)
3549 {
3550         struct bnxt *bp = netdev_priv(dev);
3551
3552         if (bp->hwrm_spec_code < 0x10801)
3553                 return -EOPNOTSUPP;
3554
3555         memset(buf, 0, dump->len);
3556
3557         dump->flag = bp->dump_flag;
3558         if (dump->flag == BNXT_DUMP_CRASH) {
3559 #ifdef CONFIG_TEE_BNXT_FW
3560                 return tee_bnxt_copy_coredump(buf, 0, dump->len);
3561 #endif
3562         } else {
3563                 return bnxt_get_coredump(bp, buf, &dump->len);
3564         }
3565
3566         return 0;
3567 }
3568
3569 void bnxt_ethtool_init(struct bnxt *bp)
3570 {
3571         struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
3572         struct hwrm_selftest_qlist_input req = {0};
3573         struct bnxt_test_info *test_info;
3574         struct net_device *dev = bp->dev;
3575         int i, rc;
3576
3577         if (!(bp->fw_cap & BNXT_FW_CAP_PKG_VER))
3578                 bnxt_get_pkgver(dev);
3579
3580         bp->num_tests = 0;
3581         if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp))
3582                 return;
3583
3584         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
3585         mutex_lock(&bp->hwrm_cmd_lock);
3586         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3587         if (rc)
3588                 goto ethtool_init_exit;
3589
3590         test_info = bp->test_info;
3591         if (!test_info)
3592                 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
3593         if (!test_info)
3594                 goto ethtool_init_exit;
3595
3596         bp->test_info = test_info;
3597         bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
3598         if (bp->num_tests > BNXT_MAX_TEST)
3599                 bp->num_tests = BNXT_MAX_TEST;
3600
3601         test_info->offline_mask = resp->offline_tests;
3602         test_info->timeout = le16_to_cpu(resp->test_timeout);
3603         if (!test_info->timeout)
3604                 test_info->timeout = HWRM_CMD_TIMEOUT;
3605         for (i = 0; i < bp->num_tests; i++) {
3606                 char *str = test_info->string[i];
3607                 char *fw_str = resp->test0_name + i * 32;
3608
3609                 if (i == BNXT_MACLPBK_TEST_IDX) {
3610                         strcpy(str, "Mac loopback test (offline)");
3611                 } else if (i == BNXT_PHYLPBK_TEST_IDX) {
3612                         strcpy(str, "Phy loopback test (offline)");
3613                 } else if (i == BNXT_EXTLPBK_TEST_IDX) {
3614                         strcpy(str, "Ext loopback test (offline)");
3615                 } else if (i == BNXT_IRQ_TEST_IDX) {
3616                         strcpy(str, "Interrupt_test (offline)");
3617                 } else {
3618                         strlcpy(str, fw_str, ETH_GSTRING_LEN);
3619                         strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
3620                         if (test_info->offline_mask & (1 << i))
3621                                 strncat(str, " (offline)",
3622                                         ETH_GSTRING_LEN - strlen(str));
3623                         else
3624                                 strncat(str, " (online)",
3625                                         ETH_GSTRING_LEN - strlen(str));
3626                 }
3627         }
3628
3629 ethtool_init_exit:
3630         mutex_unlock(&bp->hwrm_cmd_lock);
3631 }
3632
3633 void bnxt_ethtool_free(struct bnxt *bp)
3634 {
3635         kfree(bp->test_info);
3636         bp->test_info = NULL;
3637 }
3638
3639 const struct ethtool_ops bnxt_ethtool_ops = {
3640         .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
3641                                      ETHTOOL_COALESCE_MAX_FRAMES |
3642                                      ETHTOOL_COALESCE_USECS_IRQ |
3643                                      ETHTOOL_COALESCE_MAX_FRAMES_IRQ |
3644                                      ETHTOOL_COALESCE_STATS_BLOCK_USECS |
3645                                      ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
3646         .get_link_ksettings     = bnxt_get_link_ksettings,
3647         .set_link_ksettings     = bnxt_set_link_ksettings,
3648         .get_pauseparam         = bnxt_get_pauseparam,
3649         .set_pauseparam         = bnxt_set_pauseparam,
3650         .get_drvinfo            = bnxt_get_drvinfo,
3651         .get_regs_len           = bnxt_get_regs_len,
3652         .get_regs               = bnxt_get_regs,
3653         .get_wol                = bnxt_get_wol,
3654         .set_wol                = bnxt_set_wol,
3655         .get_coalesce           = bnxt_get_coalesce,
3656         .set_coalesce           = bnxt_set_coalesce,
3657         .get_msglevel           = bnxt_get_msglevel,
3658         .set_msglevel           = bnxt_set_msglevel,
3659         .get_sset_count         = bnxt_get_sset_count,
3660         .get_strings            = bnxt_get_strings,
3661         .get_ethtool_stats      = bnxt_get_ethtool_stats,
3662         .set_ringparam          = bnxt_set_ringparam,
3663         .get_ringparam          = bnxt_get_ringparam,
3664         .get_channels           = bnxt_get_channels,
3665         .set_channels           = bnxt_set_channels,
3666         .get_rxnfc              = bnxt_get_rxnfc,
3667         .set_rxnfc              = bnxt_set_rxnfc,
3668         .get_rxfh_indir_size    = bnxt_get_rxfh_indir_size,
3669         .get_rxfh_key_size      = bnxt_get_rxfh_key_size,
3670         .get_rxfh               = bnxt_get_rxfh,
3671         .set_rxfh               = bnxt_set_rxfh,
3672         .flash_device           = bnxt_flash_device,
3673         .get_eeprom_len         = bnxt_get_eeprom_len,
3674         .get_eeprom             = bnxt_get_eeprom,
3675         .set_eeprom             = bnxt_set_eeprom,
3676         .get_link               = bnxt_get_link,
3677         .get_eee                = bnxt_get_eee,
3678         .set_eee                = bnxt_set_eee,
3679         .get_module_info        = bnxt_get_module_info,
3680         .get_module_eeprom      = bnxt_get_module_eeprom,
3681         .nway_reset             = bnxt_nway_reset,
3682         .set_phys_id            = bnxt_set_phys_id,
3683         .self_test              = bnxt_self_test,
3684         .reset                  = bnxt_reset,
3685         .set_dump               = bnxt_set_dump,
3686         .get_dump_flag          = bnxt_get_dump_flag,
3687         .get_dump_data          = bnxt_get_dump_data,
3688 };