2 * Broadcom BCM7xxx System Port Ethernet MAC driver
4 * Copyright (C) 2014 Broadcom Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/netdevice.h>
18 #include <linux/etherdevice.h>
19 #include <linux/platform_device.h>
21 #include <linux/of_net.h>
22 #include <linux/of_mdio.h>
23 #include <linux/phy.h>
24 #include <linux/phy_fixed.h>
29 #include "bcmsysport.h"
31 /* I/O accessors register helpers */
32 #define BCM_SYSPORT_IO_MACRO(name, offset) \
33 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \
35 u32 reg = readl_relaxed(priv->base + offset + off); \
38 static inline void name##_writel(struct bcm_sysport_priv *priv, \
41 writel_relaxed(val, priv->base + offset + off); \
44 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
45 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
46 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
47 BCM_SYSPORT_IO_MACRO(gib, SYS_PORT_GIB_OFFSET);
48 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
49 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
50 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
51 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
52 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
53 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
55 /* On SYSTEMPORT Lite, any register after RDMA_STATUS has the exact
56 * same layout, except it has been moved by 4 bytes up, *sigh*
58 static inline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off)
60 if (priv->is_lite && off >= RDMA_STATUS)
62 return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off);
65 static inline void rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off)
67 if (priv->is_lite && off >= RDMA_STATUS)
69 writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off);
72 static inline u32 tdma_control_bit(struct bcm_sysport_priv *priv, u32 bit)
84 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
85 * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
87 #define BCM_SYSPORT_INTR_L2(which) \
88 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
91 priv->irq##which##_mask &= ~(mask); \
92 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
94 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
97 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
98 priv->irq##which##_mask |= (mask); \
101 BCM_SYSPORT_INTR_L2(0)
102 BCM_SYSPORT_INTR_L2(1)
104 /* Register accesses to GISB/RBUS registers are expensive (few hundred
105 * nanoseconds), so keep the check for 64-bits explicit here to save
106 * one register write per-packet on 32-bits platforms.
108 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
112 #ifdef CONFIG_PHYS_ADDR_T_64BIT
113 writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
114 d + DESC_ADDR_HI_STATUS_LEN);
116 writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO);
119 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
120 struct dma_desc *desc,
123 /* Ports are latched, so write upper address first */
124 tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
125 tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
128 /* Ethtool operations */
129 static int bcm_sysport_set_rx_csum(struct net_device *dev,
130 netdev_features_t wanted)
132 struct bcm_sysport_priv *priv = netdev_priv(dev);
135 priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
136 reg = rxchk_readl(priv, RXCHK_CONTROL);
142 /* If UniMAC forwards CRC, we need to skip over it to get
143 * a valid CHK bit to be set in the per-packet status word
145 if (priv->rx_chk_en && priv->crc_fwd)
146 reg |= RXCHK_SKIP_FCS;
148 reg &= ~RXCHK_SKIP_FCS;
150 /* If Broadcom tags are enabled (e.g: using a switch), make
151 * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
152 * tag after the Ethernet MAC Source Address.
154 if (netdev_uses_dsa(dev))
155 reg |= RXCHK_BRCM_TAG_EN;
157 reg &= ~RXCHK_BRCM_TAG_EN;
159 rxchk_writel(priv, reg, RXCHK_CONTROL);
164 static int bcm_sysport_set_tx_csum(struct net_device *dev,
165 netdev_features_t wanted)
167 struct bcm_sysport_priv *priv = netdev_priv(dev);
170 /* Hardware transmit checksum requires us to enable the Transmit status
171 * block prepended to the packet contents
173 priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
174 reg = tdma_readl(priv, TDMA_CONTROL);
176 reg |= tdma_control_bit(priv, TSB_EN);
178 reg &= ~tdma_control_bit(priv, TSB_EN);
179 tdma_writel(priv, reg, TDMA_CONTROL);
184 static int bcm_sysport_set_features(struct net_device *dev,
185 netdev_features_t features)
187 netdev_features_t changed = features ^ dev->features;
188 netdev_features_t wanted = dev->wanted_features;
191 if (changed & NETIF_F_RXCSUM)
192 ret = bcm_sysport_set_rx_csum(dev, wanted);
193 if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
194 ret = bcm_sysport_set_tx_csum(dev, wanted);
199 /* Hardware counters must be kept in sync because the order/offset
200 * is important here (order in structure declaration = order in hardware)
202 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
204 STAT_NETDEV64(rx_packets),
205 STAT_NETDEV64(tx_packets),
206 STAT_NETDEV64(rx_bytes),
207 STAT_NETDEV64(tx_bytes),
208 STAT_NETDEV(rx_errors),
209 STAT_NETDEV(tx_errors),
210 STAT_NETDEV(rx_dropped),
211 STAT_NETDEV(tx_dropped),
212 STAT_NETDEV(multicast),
213 /* UniMAC RSV counters */
214 STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
215 STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
216 STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
217 STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
218 STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
219 STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
220 STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
221 STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
222 STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
223 STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
224 STAT_MIB_RX("rx_pkts", mib.rx.pkt),
225 STAT_MIB_RX("rx_bytes", mib.rx.bytes),
226 STAT_MIB_RX("rx_multicast", mib.rx.mca),
227 STAT_MIB_RX("rx_broadcast", mib.rx.bca),
228 STAT_MIB_RX("rx_fcs", mib.rx.fcs),
229 STAT_MIB_RX("rx_control", mib.rx.cf),
230 STAT_MIB_RX("rx_pause", mib.rx.pf),
231 STAT_MIB_RX("rx_unknown", mib.rx.uo),
232 STAT_MIB_RX("rx_align", mib.rx.aln),
233 STAT_MIB_RX("rx_outrange", mib.rx.flr),
234 STAT_MIB_RX("rx_code", mib.rx.cde),
235 STAT_MIB_RX("rx_carrier", mib.rx.fcr),
236 STAT_MIB_RX("rx_oversize", mib.rx.ovr),
237 STAT_MIB_RX("rx_jabber", mib.rx.jbr),
238 STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
239 STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
240 STAT_MIB_RX("rx_unicast", mib.rx.uc),
241 STAT_MIB_RX("rx_ppp", mib.rx.ppp),
242 STAT_MIB_RX("rx_crc", mib.rx.rcrc),
243 /* UniMAC TSV counters */
244 STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
245 STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
246 STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
247 STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
248 STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
249 STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
250 STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
251 STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
252 STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
253 STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
254 STAT_MIB_TX("tx_pkts", mib.tx.pkts),
255 STAT_MIB_TX("tx_multicast", mib.tx.mca),
256 STAT_MIB_TX("tx_broadcast", mib.tx.bca),
257 STAT_MIB_TX("tx_pause", mib.tx.pf),
258 STAT_MIB_TX("tx_control", mib.tx.cf),
259 STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
260 STAT_MIB_TX("tx_oversize", mib.tx.ovr),
261 STAT_MIB_TX("tx_defer", mib.tx.drf),
262 STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
263 STAT_MIB_TX("tx_single_col", mib.tx.scl),
264 STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
265 STAT_MIB_TX("tx_late_col", mib.tx.lcl),
266 STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
267 STAT_MIB_TX("tx_frags", mib.tx.frg),
268 STAT_MIB_TX("tx_total_col", mib.tx.ncl),
269 STAT_MIB_TX("tx_jabber", mib.tx.jbr),
270 STAT_MIB_TX("tx_bytes", mib.tx.bytes),
271 STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
272 STAT_MIB_TX("tx_unicast", mib.tx.uc),
273 /* UniMAC RUNT counters */
274 STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
275 STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
276 STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
277 STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
278 /* RXCHK misc statistics */
279 STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
280 STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
281 RXCHK_OTHER_DISC_CNTR),
282 /* RBUF misc statistics */
283 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
284 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
285 STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
286 STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
287 STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
288 /* Per TX-queue statistics are dynamically appended */
291 #define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats)
293 static void bcm_sysport_get_drvinfo(struct net_device *dev,
294 struct ethtool_drvinfo *info)
296 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
297 strlcpy(info->version, "0.1", sizeof(info->version));
298 strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
301 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
303 struct bcm_sysport_priv *priv = netdev_priv(dev);
305 return priv->msg_enable;
308 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
310 struct bcm_sysport_priv *priv = netdev_priv(dev);
312 priv->msg_enable = enable;
315 static inline bool bcm_sysport_lite_stat_valid(enum bcm_sysport_stat_type type)
318 case BCM_SYSPORT_STAT_NETDEV:
319 case BCM_SYSPORT_STAT_NETDEV64:
320 case BCM_SYSPORT_STAT_RXCHK:
321 case BCM_SYSPORT_STAT_RBUF:
322 case BCM_SYSPORT_STAT_SOFT:
329 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
331 struct bcm_sysport_priv *priv = netdev_priv(dev);
332 const struct bcm_sysport_stats *s;
335 switch (string_set) {
337 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
338 s = &bcm_sysport_gstrings_stats[i];
340 !bcm_sysport_lite_stat_valid(s->type))
344 /* Include per-queue statistics */
345 return j + dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
351 static void bcm_sysport_get_strings(struct net_device *dev,
352 u32 stringset, u8 *data)
354 struct bcm_sysport_priv *priv = netdev_priv(dev);
355 const struct bcm_sysport_stats *s;
361 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
362 s = &bcm_sysport_gstrings_stats[i];
364 !bcm_sysport_lite_stat_valid(s->type))
367 memcpy(data + j * ETH_GSTRING_LEN, s->stat_string,
372 for (i = 0; i < dev->num_tx_queues; i++) {
373 snprintf(buf, sizeof(buf), "txq%d_packets", i);
374 memcpy(data + j * ETH_GSTRING_LEN, buf,
378 snprintf(buf, sizeof(buf), "txq%d_bytes", i);
379 memcpy(data + j * ETH_GSTRING_LEN, buf,
389 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
393 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
394 const struct bcm_sysport_stats *s;
399 s = &bcm_sysport_gstrings_stats[i];
401 case BCM_SYSPORT_STAT_NETDEV:
402 case BCM_SYSPORT_STAT_NETDEV64:
403 case BCM_SYSPORT_STAT_SOFT:
405 case BCM_SYSPORT_STAT_MIB_RX:
406 case BCM_SYSPORT_STAT_MIB_TX:
407 case BCM_SYSPORT_STAT_RUNT:
411 if (s->type != BCM_SYSPORT_STAT_MIB_RX)
412 offset = UMAC_MIB_STAT_OFFSET;
413 val = umac_readl(priv, UMAC_MIB_START + j + offset);
415 case BCM_SYSPORT_STAT_RXCHK:
416 val = rxchk_readl(priv, s->reg_offset);
418 rxchk_writel(priv, 0, s->reg_offset);
420 case BCM_SYSPORT_STAT_RBUF:
421 val = rbuf_readl(priv, s->reg_offset);
423 rbuf_writel(priv, 0, s->reg_offset);
428 p = (char *)priv + s->stat_offset;
432 netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
435 static void bcm_sysport_update_tx_stats(struct bcm_sysport_priv *priv,
436 u64 *tx_bytes, u64 *tx_packets)
438 struct bcm_sysport_tx_ring *ring;
439 u64 bytes = 0, packets = 0;
443 for (q = 0; q < priv->netdev->num_tx_queues; q++) {
444 ring = &priv->tx_rings[q];
446 start = u64_stats_fetch_begin_irq(&priv->syncp);
448 packets = ring->packets;
449 } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
452 *tx_packets += packets;
456 static void bcm_sysport_get_stats(struct net_device *dev,
457 struct ethtool_stats *stats, u64 *data)
459 struct bcm_sysport_priv *priv = netdev_priv(dev);
460 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
461 struct u64_stats_sync *syncp = &priv->syncp;
462 struct bcm_sysport_tx_ring *ring;
463 u64 tx_bytes = 0, tx_packets = 0;
467 if (netif_running(dev)) {
468 bcm_sysport_update_mib_counters(priv);
469 bcm_sysport_update_tx_stats(priv, &tx_bytes, &tx_packets);
470 stats64->tx_bytes = tx_bytes;
471 stats64->tx_packets = tx_packets;
474 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
475 const struct bcm_sysport_stats *s;
478 s = &bcm_sysport_gstrings_stats[i];
479 if (s->type == BCM_SYSPORT_STAT_NETDEV)
480 p = (char *)&dev->stats;
481 else if (s->type == BCM_SYSPORT_STAT_NETDEV64)
486 if (priv->is_lite && !bcm_sysport_lite_stat_valid(s->type))
490 if (s->stat_sizeof == sizeof(u64) &&
491 s->type == BCM_SYSPORT_STAT_NETDEV64) {
493 start = u64_stats_fetch_begin_irq(syncp);
495 } while (u64_stats_fetch_retry_irq(syncp, start));
501 /* For SYSTEMPORT Lite since we have holes in our statistics, j would
502 * be equal to BCM_SYSPORT_STATS_LEN at the end of the loop, but it
503 * needs to point to how many total statistics we have minus the
504 * number of per TX queue statistics
506 j = bcm_sysport_get_sset_count(dev, ETH_SS_STATS) -
507 dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
509 for (i = 0; i < dev->num_tx_queues; i++) {
510 ring = &priv->tx_rings[i];
511 data[j] = ring->packets;
513 data[j] = ring->bytes;
518 static void bcm_sysport_get_wol(struct net_device *dev,
519 struct ethtool_wolinfo *wol)
521 struct bcm_sysport_priv *priv = netdev_priv(dev);
524 wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
525 wol->wolopts = priv->wolopts;
527 if (!(priv->wolopts & WAKE_MAGICSECURE))
530 /* Return the programmed SecureOn password */
531 reg = umac_readl(priv, UMAC_PSW_MS);
532 put_unaligned_be16(reg, &wol->sopass[0]);
533 reg = umac_readl(priv, UMAC_PSW_LS);
534 put_unaligned_be32(reg, &wol->sopass[2]);
537 static int bcm_sysport_set_wol(struct net_device *dev,
538 struct ethtool_wolinfo *wol)
540 struct bcm_sysport_priv *priv = netdev_priv(dev);
541 struct device *kdev = &priv->pdev->dev;
542 u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
544 if (!device_can_wakeup(kdev))
547 if (wol->wolopts & ~supported)
550 /* Program the SecureOn password */
551 if (wol->wolopts & WAKE_MAGICSECURE) {
552 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
554 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
558 /* Flag the device and relevant IRQ as wakeup capable */
560 device_set_wakeup_enable(kdev, 1);
561 if (priv->wol_irq_disabled)
562 enable_irq_wake(priv->wol_irq);
563 priv->wol_irq_disabled = 0;
565 device_set_wakeup_enable(kdev, 0);
566 /* Avoid unbalanced disable_irq_wake calls */
567 if (!priv->wol_irq_disabled)
568 disable_irq_wake(priv->wol_irq);
569 priv->wol_irq_disabled = 1;
572 priv->wolopts = wol->wolopts;
577 static int bcm_sysport_get_coalesce(struct net_device *dev,
578 struct ethtool_coalesce *ec)
580 struct bcm_sysport_priv *priv = netdev_priv(dev);
583 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0));
585 ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000;
586 ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK;
588 reg = rdma_readl(priv, RDMA_MBDONE_INTR);
590 ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000;
591 ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK;
596 static int bcm_sysport_set_coalesce(struct net_device *dev,
597 struct ethtool_coalesce *ec)
599 struct bcm_sysport_priv *priv = netdev_priv(dev);
603 /* Base system clock is 125Mhz, DMA timeout is this reference clock
604 * divided by 1024, which yield roughly 8.192 us, our maximum value has
605 * to fit in the RING_TIMEOUT_MASK (16 bits).
607 if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
608 ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
609 ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
610 ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1)
613 if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) ||
614 (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0))
617 for (i = 0; i < dev->num_tx_queues; i++) {
618 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(i));
619 reg &= ~(RING_INTR_THRESH_MASK |
620 RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT);
621 reg |= ec->tx_max_coalesced_frames;
622 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) <<
624 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(i));
627 reg = rdma_readl(priv, RDMA_MBDONE_INTR);
628 reg &= ~(RDMA_INTR_THRESH_MASK |
629 RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT);
630 reg |= ec->rx_max_coalesced_frames;
631 reg |= DIV_ROUND_UP(ec->rx_coalesce_usecs * 1000, 8192) <<
633 rdma_writel(priv, reg, RDMA_MBDONE_INTR);
638 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
640 dev_consume_skb_any(cb->skb);
642 dma_unmap_addr_set(cb, dma_addr, 0);
645 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
646 struct bcm_sysport_cb *cb)
648 struct device *kdev = &priv->pdev->dev;
649 struct net_device *ndev = priv->netdev;
650 struct sk_buff *skb, *rx_skb;
653 /* Allocate a new SKB for a new packet */
654 skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
656 priv->mib.alloc_rx_buff_failed++;
657 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
661 mapping = dma_map_single(kdev, skb->data,
662 RX_BUF_LENGTH, DMA_FROM_DEVICE);
663 if (dma_mapping_error(kdev, mapping)) {
664 priv->mib.rx_dma_failed++;
665 dev_kfree_skb_any(skb);
666 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
670 /* Grab the current SKB on the ring */
673 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
674 RX_BUF_LENGTH, DMA_FROM_DEVICE);
676 /* Put the new SKB on the ring */
678 dma_unmap_addr_set(cb, dma_addr, mapping);
679 dma_desc_set_addr(priv, cb->bd_addr, mapping);
681 netif_dbg(priv, rx_status, ndev, "RX refill\n");
683 /* Return the current SKB to the caller */
687 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
689 struct bcm_sysport_cb *cb;
693 for (i = 0; i < priv->num_rx_bds; i++) {
694 cb = &priv->rx_cbs[i];
695 skb = bcm_sysport_rx_refill(priv, cb);
705 /* Poll the hardware for up to budget packets to process */
706 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
709 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
710 struct net_device *ndev = priv->netdev;
711 unsigned int processed = 0, to_process;
712 struct bcm_sysport_cb *cb;
714 unsigned int p_index;
718 /* Clear status before servicing to reduce spurious interrupts */
719 intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR);
721 /* Determine how much we should process since last call, SYSTEMPORT Lite
722 * groups the producer and consumer indexes into the same 32-bit
723 * which we access using RDMA_CONS_INDEX
726 p_index = rdma_readl(priv, RDMA_PROD_INDEX);
728 p_index = rdma_readl(priv, RDMA_CONS_INDEX);
729 p_index &= RDMA_PROD_INDEX_MASK;
731 to_process = (p_index - priv->rx_c_index) & RDMA_CONS_INDEX_MASK;
733 netif_dbg(priv, rx_status, ndev,
734 "p_index=%d rx_c_index=%d to_process=%d\n",
735 p_index, priv->rx_c_index, to_process);
737 while ((processed < to_process) && (processed < budget)) {
738 cb = &priv->rx_cbs[priv->rx_read_ptr];
739 skb = bcm_sysport_rx_refill(priv, cb);
742 /* We do not have a backing SKB, so we do not a corresponding
743 * DMA mapping for this incoming packet since
744 * bcm_sysport_rx_refill always either has both skb and mapping
747 if (unlikely(!skb)) {
748 netif_err(priv, rx_err, ndev, "out of memory!\n");
749 ndev->stats.rx_dropped++;
750 ndev->stats.rx_errors++;
754 /* Extract the Receive Status Block prepended */
755 rsb = (struct bcm_rsb *)skb->data;
756 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
757 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
760 netif_dbg(priv, rx_status, ndev,
761 "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
762 p_index, priv->rx_c_index, priv->rx_read_ptr,
765 if (unlikely(len > RX_BUF_LENGTH)) {
766 netif_err(priv, rx_status, ndev, "oversized packet\n");
767 ndev->stats.rx_length_errors++;
768 ndev->stats.rx_errors++;
769 dev_kfree_skb_any(skb);
773 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
774 netif_err(priv, rx_status, ndev, "fragmented packet!\n");
775 ndev->stats.rx_dropped++;
776 ndev->stats.rx_errors++;
777 dev_kfree_skb_any(skb);
781 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
782 netif_err(priv, rx_err, ndev, "error packet\n");
783 if (status & RX_STATUS_OVFLOW)
784 ndev->stats.rx_over_errors++;
785 ndev->stats.rx_dropped++;
786 ndev->stats.rx_errors++;
787 dev_kfree_skb_any(skb);
793 /* Hardware validated our checksum */
794 if (likely(status & DESC_L4_CSUM))
795 skb->ip_summed = CHECKSUM_UNNECESSARY;
797 /* Hardware pre-pends packets with 2bytes before Ethernet
798 * header plus we have the Receive Status Block, strip off all
799 * of this from the SKB.
801 skb_pull(skb, sizeof(*rsb) + 2);
802 len -= (sizeof(*rsb) + 2);
804 /* UniMAC may forward CRC */
806 skb_trim(skb, len - ETH_FCS_LEN);
810 skb->protocol = eth_type_trans(skb, ndev);
811 ndev->stats.rx_packets++;
812 ndev->stats.rx_bytes += len;
813 u64_stats_update_begin(&priv->syncp);
814 stats64->rx_packets++;
815 stats64->rx_bytes += len;
816 u64_stats_update_end(&priv->syncp);
818 napi_gro_receive(&priv->napi, skb);
823 if (priv->rx_read_ptr == priv->num_rx_bds)
824 priv->rx_read_ptr = 0;
830 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_tx_ring *ring,
831 struct bcm_sysport_cb *cb,
832 unsigned int *bytes_compl,
833 unsigned int *pkts_compl)
835 struct bcm_sysport_priv *priv = ring->priv;
836 struct device *kdev = &priv->pdev->dev;
839 *bytes_compl += cb->skb->len;
840 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
841 dma_unmap_len(cb, dma_len),
844 bcm_sysport_free_cb(cb);
846 } else if (dma_unmap_addr(cb, dma_addr)) {
847 *bytes_compl += dma_unmap_len(cb, dma_len);
848 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
849 dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
850 dma_unmap_addr_set(cb, dma_addr, 0);
854 /* Reclaim queued SKBs for transmission completion, lockless version */
855 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
856 struct bcm_sysport_tx_ring *ring)
858 unsigned int c_index, last_c_index, last_tx_cn, num_tx_cbs;
859 unsigned int pkts_compl = 0, bytes_compl = 0;
860 struct net_device *ndev = priv->netdev;
861 struct bcm_sysport_cb *cb;
864 /* Clear status before servicing to reduce spurious interrupts */
865 if (!ring->priv->is_lite)
866 intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR);
868 intrl2_0_writel(ring->priv, BIT(ring->index +
869 INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR);
871 /* Compute how many descriptors have been processed since last call */
872 hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
873 c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
874 ring->p_index = (hw_ind & RING_PROD_INDEX_MASK);
876 last_c_index = ring->c_index;
877 num_tx_cbs = ring->size;
879 c_index &= (num_tx_cbs - 1);
881 if (c_index >= last_c_index)
882 last_tx_cn = c_index - last_c_index;
884 last_tx_cn = num_tx_cbs - last_c_index + c_index;
886 netif_dbg(priv, tx_done, ndev,
887 "ring=%d c_index=%d last_tx_cn=%d last_c_index=%d\n",
888 ring->index, c_index, last_tx_cn, last_c_index);
890 while (last_tx_cn-- > 0) {
891 cb = ring->cbs + last_c_index;
892 bcm_sysport_tx_reclaim_one(ring, cb, &bytes_compl, &pkts_compl);
896 last_c_index &= (num_tx_cbs - 1);
899 u64_stats_update_begin(&priv->syncp);
900 ring->packets += pkts_compl;
901 ring->bytes += bytes_compl;
902 u64_stats_update_end(&priv->syncp);
904 ring->c_index = c_index;
906 netif_dbg(priv, tx_done, ndev,
907 "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
908 ring->index, ring->c_index, pkts_compl, bytes_compl);
913 /* Locked version of the per-ring TX reclaim routine */
914 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
915 struct bcm_sysport_tx_ring *ring)
917 struct netdev_queue *txq;
918 unsigned int released;
921 txq = netdev_get_tx_queue(priv->netdev, ring->index);
923 spin_lock_irqsave(&ring->lock, flags);
924 released = __bcm_sysport_tx_reclaim(priv, ring);
926 netif_tx_wake_queue(txq);
928 spin_unlock_irqrestore(&ring->lock, flags);
933 /* Locked version of the per-ring TX reclaim, but does not wake the queue */
934 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv,
935 struct bcm_sysport_tx_ring *ring)
939 spin_lock_irqsave(&ring->lock, flags);
940 __bcm_sysport_tx_reclaim(priv, ring);
941 spin_unlock_irqrestore(&ring->lock, flags);
944 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
946 struct bcm_sysport_tx_ring *ring =
947 container_of(napi, struct bcm_sysport_tx_ring, napi);
948 unsigned int work_done = 0;
950 work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
952 if (work_done == 0) {
954 /* re-enable TX interrupt */
955 if (!ring->priv->is_lite)
956 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
958 intrl2_0_mask_clear(ring->priv, BIT(ring->index +
959 INTRL2_0_TDMA_MBDONE_SHIFT));
967 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
971 for (q = 0; q < priv->netdev->num_tx_queues; q++)
972 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
975 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
977 struct bcm_sysport_priv *priv =
978 container_of(napi, struct bcm_sysport_priv, napi);
979 unsigned int work_done = 0;
981 work_done = bcm_sysport_desc_rx(priv, budget);
983 priv->rx_c_index += work_done;
984 priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
986 /* SYSTEMPORT Lite groups the producer/consumer index, producer is
987 * maintained by HW, but writes to it will be ignore while RDMA
991 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
993 rdma_writel(priv, priv->rx_c_index << 16, RDMA_CONS_INDEX);
995 if (work_done < budget) {
996 napi_complete_done(napi, work_done);
997 /* re-enable RX interrupts */
998 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
1004 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
1008 /* Stop monitoring MPD interrupt */
1009 intrl2_0_mask_set(priv, INTRL2_0_MPD);
1011 /* Clear the MagicPacket detection logic */
1012 reg = umac_readl(priv, UMAC_MPD_CTRL);
1014 umac_writel(priv, reg, UMAC_MPD_CTRL);
1016 netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
1019 /* RX and misc interrupt routine */
1020 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
1022 struct net_device *dev = dev_id;
1023 struct bcm_sysport_priv *priv = netdev_priv(dev);
1024 struct bcm_sysport_tx_ring *txr;
1025 unsigned int ring, ring_bit;
1027 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
1028 ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
1029 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
1031 if (unlikely(priv->irq0_stat == 0)) {
1032 netdev_warn(priv->netdev, "spurious RX interrupt\n");
1036 if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
1037 if (likely(napi_schedule_prep(&priv->napi))) {
1038 /* disable RX interrupts */
1039 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
1040 __napi_schedule_irqoff(&priv->napi);
1044 /* TX ring is full, perform a full reclaim since we do not know
1045 * which one would trigger this interrupt
1047 if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
1048 bcm_sysport_tx_reclaim_all(priv);
1050 if (priv->irq0_stat & INTRL2_0_MPD) {
1051 netdev_info(priv->netdev, "Wake-on-LAN interrupt!\n");
1052 bcm_sysport_resume_from_wol(priv);
1058 for (ring = 0; ring < dev->num_tx_queues; ring++) {
1059 ring_bit = BIT(ring + INTRL2_0_TDMA_MBDONE_SHIFT);
1060 if (!(priv->irq0_stat & ring_bit))
1063 txr = &priv->tx_rings[ring];
1065 if (likely(napi_schedule_prep(&txr->napi))) {
1066 intrl2_0_mask_set(priv, ring_bit);
1067 __napi_schedule(&txr->napi);
1074 /* TX interrupt service routine */
1075 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
1077 struct net_device *dev = dev_id;
1078 struct bcm_sysport_priv *priv = netdev_priv(dev);
1079 struct bcm_sysport_tx_ring *txr;
1082 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
1083 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
1084 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1086 if (unlikely(priv->irq1_stat == 0)) {
1087 netdev_warn(priv->netdev, "spurious TX interrupt\n");
1091 for (ring = 0; ring < dev->num_tx_queues; ring++) {
1092 if (!(priv->irq1_stat & BIT(ring)))
1095 txr = &priv->tx_rings[ring];
1097 if (likely(napi_schedule_prep(&txr->napi))) {
1098 intrl2_1_mask_set(priv, BIT(ring));
1099 __napi_schedule_irqoff(&txr->napi);
1106 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
1108 struct bcm_sysport_priv *priv = dev_id;
1110 pm_wakeup_event(&priv->pdev->dev, 0);
1115 #ifdef CONFIG_NET_POLL_CONTROLLER
1116 static void bcm_sysport_poll_controller(struct net_device *dev)
1118 struct bcm_sysport_priv *priv = netdev_priv(dev);
1120 disable_irq(priv->irq0);
1121 bcm_sysport_rx_isr(priv->irq0, priv);
1122 enable_irq(priv->irq0);
1124 if (!priv->is_lite) {
1125 disable_irq(priv->irq1);
1126 bcm_sysport_tx_isr(priv->irq1, priv);
1127 enable_irq(priv->irq1);
1132 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
1133 struct net_device *dev)
1135 struct sk_buff *nskb;
1136 struct bcm_tsb *tsb;
1142 /* Re-allocate SKB if needed */
1143 if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
1144 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
1147 dev->stats.tx_errors++;
1148 dev->stats.tx_dropped++;
1154 tsb = skb_push(skb, sizeof(*tsb));
1155 /* Zero-out TSB by default */
1156 memset(tsb, 0, sizeof(*tsb));
1158 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1159 ip_ver = htons(skb->protocol);
1162 ip_proto = ip_hdr(skb)->protocol;
1165 ip_proto = ipv6_hdr(skb)->nexthdr;
1171 /* Get the checksum offset and the L4 (transport) offset */
1172 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
1173 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
1174 csum_info |= (csum_start << L4_PTR_SHIFT);
1176 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
1177 csum_info |= L4_LENGTH_VALID;
1178 if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
1179 csum_info |= L4_UDP;
1184 tsb->l4_ptr_dest_map = csum_info;
1190 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
1191 struct net_device *dev)
1193 struct bcm_sysport_priv *priv = netdev_priv(dev);
1194 struct device *kdev = &priv->pdev->dev;
1195 struct bcm_sysport_tx_ring *ring;
1196 struct bcm_sysport_cb *cb;
1197 struct netdev_queue *txq;
1198 struct dma_desc *desc;
1199 unsigned int skb_len;
1200 unsigned long flags;
1206 queue = skb_get_queue_mapping(skb);
1207 txq = netdev_get_tx_queue(dev, queue);
1208 ring = &priv->tx_rings[queue];
1210 /* lock against tx reclaim in BH context and TX ring full interrupt */
1211 spin_lock_irqsave(&ring->lock, flags);
1212 if (unlikely(ring->desc_count == 0)) {
1213 netif_tx_stop_queue(txq);
1214 netdev_err(dev, "queue %d awake and ring full!\n", queue);
1215 ret = NETDEV_TX_BUSY;
1219 /* The Ethernet switch we are interfaced with needs packets to be at
1220 * least 64 bytes (including FCS) otherwise they will be discarded when
1221 * they enter the switch port logic. When Broadcom tags are enabled, we
1222 * need to make sure that packets are at least 68 bytes
1223 * (including FCS and tag) because the length verification is done after
1224 * the Broadcom tag is stripped off the ingress packet.
1226 if (skb_put_padto(skb, ETH_ZLEN + ENET_BRCM_TAG_LEN)) {
1231 /* Insert TSB and checksum infos */
1233 skb = bcm_sysport_insert_tsb(skb, dev);
1242 mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
1243 if (dma_mapping_error(kdev, mapping)) {
1244 priv->mib.tx_dma_failed++;
1245 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
1246 skb->data, skb_len);
1251 /* Remember the SKB for future freeing */
1252 cb = &ring->cbs[ring->curr_desc];
1254 dma_unmap_addr_set(cb, dma_addr, mapping);
1255 dma_unmap_len_set(cb, dma_len, skb_len);
1257 /* Fetch a descriptor entry from our pool */
1258 desc = ring->desc_cpu;
1260 desc->addr_lo = lower_32_bits(mapping);
1261 len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
1262 len_status |= (skb_len << DESC_LEN_SHIFT);
1263 len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
1265 if (skb->ip_summed == CHECKSUM_PARTIAL)
1266 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
1269 if (ring->curr_desc == ring->size)
1270 ring->curr_desc = 0;
1273 /* Ensure write completion of the descriptor status/length
1274 * in DRAM before the System Port WRITE_PORT register latches
1278 desc->addr_status_len = len_status;
1281 /* Write this descriptor address to the RING write port */
1282 tdma_port_write_desc_addr(priv, desc, ring->index);
1284 /* Check ring space and update SW control flow */
1285 if (ring->desc_count == 0)
1286 netif_tx_stop_queue(txq);
1288 netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1289 ring->index, ring->desc_count, ring->curr_desc);
1293 spin_unlock_irqrestore(&ring->lock, flags);
1297 static void bcm_sysport_tx_timeout(struct net_device *dev)
1299 netdev_warn(dev, "transmit timeout!\n");
1301 netif_trans_update(dev);
1302 dev->stats.tx_errors++;
1304 netif_tx_wake_all_queues(dev);
1307 /* phylib adjust link callback */
1308 static void bcm_sysport_adj_link(struct net_device *dev)
1310 struct bcm_sysport_priv *priv = netdev_priv(dev);
1311 struct phy_device *phydev = dev->phydev;
1312 unsigned int changed = 0;
1313 u32 cmd_bits = 0, reg;
1315 if (priv->old_link != phydev->link) {
1317 priv->old_link = phydev->link;
1320 if (priv->old_duplex != phydev->duplex) {
1322 priv->old_duplex = phydev->duplex;
1328 switch (phydev->speed) {
1330 cmd_bits = CMD_SPEED_2500;
1333 cmd_bits = CMD_SPEED_1000;
1336 cmd_bits = CMD_SPEED_100;
1339 cmd_bits = CMD_SPEED_10;
1344 cmd_bits <<= CMD_SPEED_SHIFT;
1346 if (phydev->duplex == DUPLEX_HALF)
1347 cmd_bits |= CMD_HD_EN;
1349 if (priv->old_pause != phydev->pause) {
1351 priv->old_pause = phydev->pause;
1355 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1361 reg = umac_readl(priv, UMAC_CMD);
1362 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1363 CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1364 CMD_TX_PAUSE_IGNORE);
1366 umac_writel(priv, reg, UMAC_CMD);
1370 phy_print_status(phydev);
1373 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1376 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1377 struct device *kdev = &priv->pdev->dev;
1382 /* Simple descriptors partitioning for now */
1385 /* We just need one DMA descriptor which is DMA-able, since writing to
1386 * the port will allocate a new descriptor in its internal linked-list
1388 p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma,
1391 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1395 ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1397 dma_free_coherent(kdev, sizeof(struct dma_desc),
1398 ring->desc_cpu, ring->desc_dma);
1399 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1403 /* Initialize SW view of the ring */
1404 spin_lock_init(&ring->lock);
1406 netif_tx_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1407 ring->index = index;
1409 ring->alloc_size = ring->size;
1411 ring->desc_count = ring->size;
1412 ring->curr_desc = 0;
1414 /* Initialize HW ring */
1415 tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1416 tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1417 tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1418 tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1420 /* Configure QID and port mapping */
1421 reg = tdma_readl(priv, TDMA_DESC_RING_MAPPING(index));
1422 reg &= ~(RING_QID_MASK | RING_PORT_ID_MASK << RING_PORT_ID_SHIFT);
1423 if (ring->inspect) {
1424 reg |= ring->switch_queue & RING_QID_MASK;
1425 reg |= ring->switch_port << RING_PORT_ID_SHIFT;
1427 reg |= RING_IGNORE_STATUS;
1429 tdma_writel(priv, reg, TDMA_DESC_RING_MAPPING(index));
1430 tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1432 /* Enable ACB algorithm 2 */
1433 reg = tdma_readl(priv, TDMA_CONTROL);
1434 reg |= tdma_control_bit(priv, ACB_ALGO);
1435 tdma_writel(priv, reg, TDMA_CONTROL);
1437 /* Do not use tdma_control_bit() here because TSB_SWAP1 collides
1438 * with the original definition of ACB_ALGO
1440 reg = tdma_readl(priv, TDMA_CONTROL);
1442 reg &= ~BIT(TSB_SWAP1);
1443 /* Set a correct TSB format based on host endian */
1444 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1445 reg |= tdma_control_bit(priv, TSB_SWAP0);
1447 reg &= ~tdma_control_bit(priv, TSB_SWAP0);
1448 tdma_writel(priv, reg, TDMA_CONTROL);
1450 /* Program the number of descriptors as MAX_THRESHOLD and half of
1451 * its size for the hysteresis trigger
1453 tdma_writel(priv, ring->size |
1454 1 << RING_HYST_THRESH_SHIFT,
1455 TDMA_DESC_RING_MAX_HYST(index));
1457 /* Enable the ring queue in the arbiter */
1458 reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1459 reg |= (1 << index);
1460 tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1462 napi_enable(&ring->napi);
1464 netif_dbg(priv, hw, priv->netdev,
1465 "TDMA cfg, size=%d, desc_cpu=%p switch q=%d,port=%d\n",
1466 ring->size, ring->desc_cpu, ring->switch_queue,
1472 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1475 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1476 struct device *kdev = &priv->pdev->dev;
1479 /* Caller should stop the TDMA engine */
1480 reg = tdma_readl(priv, TDMA_STATUS);
1481 if (!(reg & TDMA_DISABLED))
1482 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1484 /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
1485 * fail, so by checking this pointer we know whether the TX ring was
1486 * fully initialized or not.
1491 napi_disable(&ring->napi);
1492 netif_napi_del(&ring->napi);
1494 bcm_sysport_tx_clean(priv, ring);
1499 if (ring->desc_dma) {
1500 dma_free_coherent(kdev, sizeof(struct dma_desc),
1501 ring->desc_cpu, ring->desc_dma);
1505 ring->alloc_size = 0;
1507 netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1511 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1512 unsigned int enable)
1514 unsigned int timeout = 1000;
1517 reg = rdma_readl(priv, RDMA_CONTROL);
1522 rdma_writel(priv, reg, RDMA_CONTROL);
1524 /* Poll for RMDA disabling completion */
1526 reg = rdma_readl(priv, RDMA_STATUS);
1527 if (!!(reg & RDMA_DISABLED) == !enable)
1529 usleep_range(1000, 2000);
1530 } while (timeout-- > 0);
1532 netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1538 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1539 unsigned int enable)
1541 unsigned int timeout = 1000;
1544 reg = tdma_readl(priv, TDMA_CONTROL);
1546 reg |= tdma_control_bit(priv, TDMA_EN);
1548 reg &= ~tdma_control_bit(priv, TDMA_EN);
1549 tdma_writel(priv, reg, TDMA_CONTROL);
1551 /* Poll for TMDA disabling completion */
1553 reg = tdma_readl(priv, TDMA_STATUS);
1554 if (!!(reg & TDMA_DISABLED) == !enable)
1557 usleep_range(1000, 2000);
1558 } while (timeout-- > 0);
1560 netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1565 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1567 struct bcm_sysport_cb *cb;
1572 /* Initialize SW view of the RX ring */
1573 priv->num_rx_bds = priv->num_rx_desc_words / WORDS_PER_DESC;
1574 priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1575 priv->rx_c_index = 0;
1576 priv->rx_read_ptr = 0;
1577 priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1579 if (!priv->rx_cbs) {
1580 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1584 for (i = 0; i < priv->num_rx_bds; i++) {
1585 cb = priv->rx_cbs + i;
1586 cb->bd_addr = priv->rx_bds + i * DESC_SIZE;
1589 ret = bcm_sysport_alloc_rx_bufs(priv);
1591 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1595 /* Initialize HW, ensure RDMA is disabled */
1596 reg = rdma_readl(priv, RDMA_STATUS);
1597 if (!(reg & RDMA_DISABLED))
1598 rdma_enable_set(priv, 0);
1600 rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1601 rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1602 rdma_writel(priv, 0, RDMA_PROD_INDEX);
1603 rdma_writel(priv, 0, RDMA_CONS_INDEX);
1604 rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1605 RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1606 /* Operate the queue in ring mode */
1607 rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1608 rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1609 rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1610 rdma_writel(priv, priv->num_rx_desc_words - 1, RDMA_END_ADDR_LO);
1612 rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1614 netif_dbg(priv, hw, priv->netdev,
1615 "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1616 priv->num_rx_bds, priv->rx_bds);
1621 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1623 struct bcm_sysport_cb *cb;
1627 /* Caller should ensure RDMA is disabled */
1628 reg = rdma_readl(priv, RDMA_STATUS);
1629 if (!(reg & RDMA_DISABLED))
1630 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1632 for (i = 0; i < priv->num_rx_bds; i++) {
1633 cb = &priv->rx_cbs[i];
1634 if (dma_unmap_addr(cb, dma_addr))
1635 dma_unmap_single(&priv->pdev->dev,
1636 dma_unmap_addr(cb, dma_addr),
1637 RX_BUF_LENGTH, DMA_FROM_DEVICE);
1638 bcm_sysport_free_cb(cb);
1641 kfree(priv->rx_cbs);
1642 priv->rx_cbs = NULL;
1644 netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1647 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1649 struct bcm_sysport_priv *priv = netdev_priv(dev);
1655 reg = umac_readl(priv, UMAC_CMD);
1656 if (dev->flags & IFF_PROMISC)
1659 reg &= ~CMD_PROMISC;
1660 umac_writel(priv, reg, UMAC_CMD);
1662 /* No support for ALLMULTI */
1663 if (dev->flags & IFF_ALLMULTI)
1667 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1668 u32 mask, unsigned int enable)
1672 if (!priv->is_lite) {
1673 reg = umac_readl(priv, UMAC_CMD);
1678 umac_writel(priv, reg, UMAC_CMD);
1680 reg = gib_readl(priv, GIB_CONTROL);
1685 gib_writel(priv, reg, GIB_CONTROL);
1688 /* UniMAC stops on a packet boundary, wait for a full-sized packet
1689 * to be processed (1 msec).
1692 usleep_range(1000, 2000);
1695 static inline void umac_reset(struct bcm_sysport_priv *priv)
1702 reg = umac_readl(priv, UMAC_CMD);
1703 reg |= CMD_SW_RESET;
1704 umac_writel(priv, reg, UMAC_CMD);
1706 reg = umac_readl(priv, UMAC_CMD);
1707 reg &= ~CMD_SW_RESET;
1708 umac_writel(priv, reg, UMAC_CMD);
1711 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1712 unsigned char *addr)
1714 u32 mac0 = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) |
1716 u32 mac1 = (addr[4] << 8) | addr[5];
1718 if (!priv->is_lite) {
1719 umac_writel(priv, mac0, UMAC_MAC0);
1720 umac_writel(priv, mac1, UMAC_MAC1);
1722 gib_writel(priv, mac0, GIB_MAC0);
1723 gib_writel(priv, mac1, GIB_MAC1);
1727 static void topctrl_flush(struct bcm_sysport_priv *priv)
1729 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1730 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1732 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1733 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1736 static int bcm_sysport_change_mac(struct net_device *dev, void *p)
1738 struct bcm_sysport_priv *priv = netdev_priv(dev);
1739 struct sockaddr *addr = p;
1741 if (!is_valid_ether_addr(addr->sa_data))
1744 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1746 /* interface is disabled, changes to MAC will be reflected on next
1749 if (!netif_running(dev))
1752 umac_set_hw_addr(priv, dev->dev_addr);
1757 static void bcm_sysport_get_stats64(struct net_device *dev,
1758 struct rtnl_link_stats64 *stats)
1760 struct bcm_sysport_priv *priv = netdev_priv(dev);
1761 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
1764 netdev_stats_to_stats64(stats, &dev->stats);
1766 bcm_sysport_update_tx_stats(priv, &stats->tx_bytes,
1767 &stats->tx_packets);
1770 start = u64_stats_fetch_begin_irq(&priv->syncp);
1771 stats->rx_packets = stats64->rx_packets;
1772 stats->rx_bytes = stats64->rx_bytes;
1773 } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
1776 static void bcm_sysport_netif_start(struct net_device *dev)
1778 struct bcm_sysport_priv *priv = netdev_priv(dev);
1781 napi_enable(&priv->napi);
1783 /* Enable RX interrupt and TX ring full interrupt */
1784 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1786 phy_start(dev->phydev);
1788 /* Enable TX interrupts for the TXQs */
1790 intrl2_1_mask_clear(priv, 0xffffffff);
1792 intrl2_0_mask_clear(priv, INTRL2_0_TDMA_MBDONE_MASK);
1794 /* Last call before we start the real business */
1795 netif_tx_start_all_queues(dev);
1798 static void rbuf_init(struct bcm_sysport_priv *priv)
1802 reg = rbuf_readl(priv, RBUF_CONTROL);
1803 reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1804 /* Set a correct RSB format on SYSTEMPORT Lite */
1806 reg &= ~RBUF_RSB_SWAP1;
1808 /* Set a correct RSB format based on host endian */
1809 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1810 reg |= RBUF_RSB_SWAP0;
1812 reg &= ~RBUF_RSB_SWAP0;
1813 rbuf_writel(priv, reg, RBUF_CONTROL);
1816 static inline void bcm_sysport_mask_all_intrs(struct bcm_sysport_priv *priv)
1818 intrl2_0_mask_set(priv, 0xffffffff);
1819 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1820 if (!priv->is_lite) {
1821 intrl2_1_mask_set(priv, 0xffffffff);
1822 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1826 static inline void gib_set_pad_extension(struct bcm_sysport_priv *priv)
1830 reg = gib_readl(priv, GIB_CONTROL);
1831 /* Include Broadcom tag in pad extension and fix up IPG_LENGTH */
1832 if (netdev_uses_dsa(priv->netdev)) {
1833 reg &= ~(GIB_PAD_EXTENSION_MASK << GIB_PAD_EXTENSION_SHIFT);
1834 reg |= ENET_BRCM_TAG_LEN << GIB_PAD_EXTENSION_SHIFT;
1836 reg &= ~(GIB_IPG_LEN_MASK << GIB_IPG_LEN_SHIFT);
1837 reg |= 12 << GIB_IPG_LEN_SHIFT;
1838 gib_writel(priv, reg, GIB_CONTROL);
1841 static int bcm_sysport_open(struct net_device *dev)
1843 struct bcm_sysport_priv *priv = netdev_priv(dev);
1844 struct phy_device *phydev;
1851 /* Flush TX and RX FIFOs at TOPCTRL level */
1852 topctrl_flush(priv);
1854 /* Disable the UniMAC RX/TX */
1855 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1857 /* Enable RBUF 2bytes alignment and Receive Status Block */
1860 /* Set maximum frame length */
1862 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1864 gib_set_pad_extension(priv);
1866 /* Set MAC address */
1867 umac_set_hw_addr(priv, dev->dev_addr);
1869 /* Read CRC forward */
1871 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1873 priv->crc_fwd = !!(gib_readl(priv, GIB_CONTROL) &
1876 phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1877 0, priv->phy_interface);
1879 netdev_err(dev, "could not attach to PHY\n");
1883 /* Reset house keeping link status */
1884 priv->old_duplex = -1;
1885 priv->old_link = -1;
1886 priv->old_pause = -1;
1888 /* mask all interrupts and request them */
1889 bcm_sysport_mask_all_intrs(priv);
1891 ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1893 netdev_err(dev, "failed to request RX interrupt\n");
1894 goto out_phy_disconnect;
1897 if (!priv->is_lite) {
1898 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0,
1901 netdev_err(dev, "failed to request TX interrupt\n");
1906 /* Initialize both hardware and software ring */
1907 for (i = 0; i < dev->num_tx_queues; i++) {
1908 ret = bcm_sysport_init_tx_ring(priv, i);
1910 netdev_err(dev, "failed to initialize TX ring %d\n",
1912 goto out_free_tx_ring;
1916 /* Initialize linked-list */
1917 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1919 /* Initialize RX ring */
1920 ret = bcm_sysport_init_rx_ring(priv);
1922 netdev_err(dev, "failed to initialize RX ring\n");
1923 goto out_free_rx_ring;
1927 ret = rdma_enable_set(priv, 1);
1929 goto out_free_rx_ring;
1932 ret = tdma_enable_set(priv, 1);
1934 goto out_clear_rx_int;
1936 /* Turn on UniMAC TX/RX */
1937 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1939 bcm_sysport_netif_start(dev);
1944 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1946 bcm_sysport_fini_rx_ring(priv);
1948 for (i = 0; i < dev->num_tx_queues; i++)
1949 bcm_sysport_fini_tx_ring(priv, i);
1951 free_irq(priv->irq1, dev);
1953 free_irq(priv->irq0, dev);
1955 phy_disconnect(phydev);
1959 static void bcm_sysport_netif_stop(struct net_device *dev)
1961 struct bcm_sysport_priv *priv = netdev_priv(dev);
1963 /* stop all software from updating hardware */
1964 netif_tx_stop_all_queues(dev);
1965 napi_disable(&priv->napi);
1966 phy_stop(dev->phydev);
1968 /* mask all interrupts */
1969 bcm_sysport_mask_all_intrs(priv);
1972 static int bcm_sysport_stop(struct net_device *dev)
1974 struct bcm_sysport_priv *priv = netdev_priv(dev);
1978 bcm_sysport_netif_stop(dev);
1980 /* Disable UniMAC RX */
1981 umac_enable_set(priv, CMD_RX_EN, 0);
1983 ret = tdma_enable_set(priv, 0);
1985 netdev_err(dev, "timeout disabling RDMA\n");
1989 /* Wait for a maximum packet size to be drained */
1990 usleep_range(2000, 3000);
1992 ret = rdma_enable_set(priv, 0);
1994 netdev_err(dev, "timeout disabling TDMA\n");
1998 /* Disable UniMAC TX */
1999 umac_enable_set(priv, CMD_TX_EN, 0);
2001 /* Free RX/TX rings SW structures */
2002 for (i = 0; i < dev->num_tx_queues; i++)
2003 bcm_sysport_fini_tx_ring(priv, i);
2004 bcm_sysport_fini_rx_ring(priv);
2006 free_irq(priv->irq0, dev);
2008 free_irq(priv->irq1, dev);
2010 /* Disconnect from PHY */
2011 phy_disconnect(dev->phydev);
2016 static const struct ethtool_ops bcm_sysport_ethtool_ops = {
2017 .get_drvinfo = bcm_sysport_get_drvinfo,
2018 .get_msglevel = bcm_sysport_get_msglvl,
2019 .set_msglevel = bcm_sysport_set_msglvl,
2020 .get_link = ethtool_op_get_link,
2021 .get_strings = bcm_sysport_get_strings,
2022 .get_ethtool_stats = bcm_sysport_get_stats,
2023 .get_sset_count = bcm_sysport_get_sset_count,
2024 .get_wol = bcm_sysport_get_wol,
2025 .set_wol = bcm_sysport_set_wol,
2026 .get_coalesce = bcm_sysport_get_coalesce,
2027 .set_coalesce = bcm_sysport_set_coalesce,
2028 .get_link_ksettings = phy_ethtool_get_link_ksettings,
2029 .set_link_ksettings = phy_ethtool_set_link_ksettings,
2032 static u16 bcm_sysport_select_queue(struct net_device *dev, struct sk_buff *skb,
2034 select_queue_fallback_t fallback)
2036 struct bcm_sysport_priv *priv = netdev_priv(dev);
2037 u16 queue = skb_get_queue_mapping(skb);
2038 struct bcm_sysport_tx_ring *tx_ring;
2039 unsigned int q, port;
2041 if (!netdev_uses_dsa(dev))
2042 return fallback(dev, skb);
2044 /* DSA tagging layer will have configured the correct queue */
2045 q = BRCM_TAG_GET_QUEUE(queue);
2046 port = BRCM_TAG_GET_PORT(queue);
2047 tx_ring = priv->ring_map[q + port * priv->per_port_num_tx_queues];
2049 if (unlikely(!tx_ring))
2050 return fallback(dev, skb);
2052 return tx_ring->index;
2055 static const struct net_device_ops bcm_sysport_netdev_ops = {
2056 .ndo_start_xmit = bcm_sysport_xmit,
2057 .ndo_tx_timeout = bcm_sysport_tx_timeout,
2058 .ndo_open = bcm_sysport_open,
2059 .ndo_stop = bcm_sysport_stop,
2060 .ndo_set_features = bcm_sysport_set_features,
2061 .ndo_set_rx_mode = bcm_sysport_set_rx_mode,
2062 .ndo_set_mac_address = bcm_sysport_change_mac,
2063 #ifdef CONFIG_NET_POLL_CONTROLLER
2064 .ndo_poll_controller = bcm_sysport_poll_controller,
2066 .ndo_get_stats64 = bcm_sysport_get_stats64,
2067 .ndo_select_queue = bcm_sysport_select_queue,
2070 static int bcm_sysport_map_queues(struct net_device *dev,
2071 struct dsa_notifier_register_info *info)
2073 struct bcm_sysport_priv *priv = netdev_priv(dev);
2074 struct bcm_sysport_tx_ring *ring;
2075 struct net_device *slave_dev;
2076 unsigned int num_tx_queues;
2077 unsigned int q, start, port;
2079 /* We can't be setting up queue inspection for non directly attached
2082 if (info->switch_number)
2085 if (dev->netdev_ops != &bcm_sysport_netdev_ops)
2088 port = info->port_number;
2089 slave_dev = info->info.dev;
2091 /* On SYSTEMPORT Lite we have twice as less queues, so we cannot do a
2092 * 1:1 mapping, we can only do a 2:1 mapping. By reducing the number of
2093 * per-port (slave_dev) network devices queue, we achieve just that.
2094 * This need to happen now before any slave network device is used such
2095 * it accurately reflects the number of real TX queues.
2098 netif_set_real_num_tx_queues(slave_dev,
2099 slave_dev->num_tx_queues / 2);
2100 num_tx_queues = slave_dev->real_num_tx_queues;
2102 if (priv->per_port_num_tx_queues &&
2103 priv->per_port_num_tx_queues != num_tx_queues)
2104 netdev_warn(slave_dev, "asymetric number of per-port queues\n");
2106 priv->per_port_num_tx_queues = num_tx_queues;
2108 start = find_first_zero_bit(&priv->queue_bitmap, dev->num_tx_queues);
2109 for (q = 0; q < num_tx_queues; q++) {
2110 ring = &priv->tx_rings[q + start];
2112 /* Just remember the mapping actual programming done
2113 * during bcm_sysport_init_tx_ring
2115 ring->switch_queue = q;
2116 ring->switch_port = port;
2117 ring->inspect = true;
2118 priv->ring_map[q + port * num_tx_queues] = ring;
2120 /* Set all queues as being used now */
2121 set_bit(q + start, &priv->queue_bitmap);
2127 static int bcm_sysport_dsa_notifier(struct notifier_block *unused,
2128 unsigned long event, void *ptr)
2130 struct dsa_notifier_register_info *info;
2132 if (event != DSA_PORT_REGISTER)
2137 return notifier_from_errno(bcm_sysport_map_queues(info->master, info));
2140 #define REV_FMT "v%2x.%02x"
2142 static const struct bcm_sysport_hw_params bcm_sysport_params[] = {
2145 .num_rx_desc_words = SP_NUM_HW_RX_DESC_WORDS,
2147 [SYSTEMPORT_LITE] = {
2149 .num_rx_desc_words = SP_LT_NUM_HW_RX_DESC_WORDS,
2153 static const struct of_device_id bcm_sysport_of_match[] = {
2154 { .compatible = "brcm,systemportlite-v1.00",
2155 .data = &bcm_sysport_params[SYSTEMPORT_LITE] },
2156 { .compatible = "brcm,systemport-v1.00",
2157 .data = &bcm_sysport_params[SYSTEMPORT] },
2158 { .compatible = "brcm,systemport",
2159 .data = &bcm_sysport_params[SYSTEMPORT] },
2162 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
2164 static int bcm_sysport_probe(struct platform_device *pdev)
2166 const struct bcm_sysport_hw_params *params;
2167 const struct of_device_id *of_id = NULL;
2168 struct bcm_sysport_priv *priv;
2169 struct device_node *dn;
2170 struct net_device *dev;
2171 const void *macaddr;
2176 dn = pdev->dev.of_node;
2177 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2178 of_id = of_match_node(bcm_sysport_of_match, dn);
2179 if (!of_id || !of_id->data)
2182 /* Fairly quickly we need to know the type of adapter we have */
2183 params = of_id->data;
2185 /* Read the Transmit/Receive Queue properties */
2186 if (of_property_read_u32(dn, "systemport,num-txq", &txq))
2187 txq = TDMA_NUM_RINGS;
2188 if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
2191 /* Sanity check the number of transmit queues */
2192 if (!txq || txq > TDMA_NUM_RINGS)
2195 dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
2199 /* Initialize private members */
2200 priv = netdev_priv(dev);
2202 /* Allocate number of TX rings */
2203 priv->tx_rings = devm_kcalloc(&pdev->dev, txq,
2204 sizeof(struct bcm_sysport_tx_ring),
2206 if (!priv->tx_rings)
2209 priv->is_lite = params->is_lite;
2210 priv->num_rx_desc_words = params->num_rx_desc_words;
2212 priv->irq0 = platform_get_irq(pdev, 0);
2213 if (!priv->is_lite) {
2214 priv->irq1 = platform_get_irq(pdev, 1);
2215 priv->wol_irq = platform_get_irq(pdev, 2);
2217 priv->wol_irq = platform_get_irq(pdev, 1);
2219 if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) {
2220 dev_err(&pdev->dev, "invalid interrupts\n");
2222 goto err_free_netdev;
2225 priv->base = devm_ioremap_resource(&pdev->dev, r);
2226 if (IS_ERR(priv->base)) {
2227 ret = PTR_ERR(priv->base);
2228 goto err_free_netdev;
2234 priv->phy_interface = of_get_phy_mode(dn);
2235 /* Default to GMII interface mode */
2236 if (priv->phy_interface < 0)
2237 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
2239 /* In the case of a fixed PHY, the DT node associated
2240 * to the PHY is the Ethernet MAC DT node.
2242 if (of_phy_is_fixed_link(dn)) {
2243 ret = of_phy_register_fixed_link(dn);
2245 dev_err(&pdev->dev, "failed to register fixed PHY\n");
2246 goto err_free_netdev;
2252 /* Initialize netdevice members */
2253 macaddr = of_get_mac_address(dn);
2254 if (!macaddr || !is_valid_ether_addr(macaddr)) {
2255 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
2256 eth_hw_addr_random(dev);
2258 ether_addr_copy(dev->dev_addr, macaddr);
2261 SET_NETDEV_DEV(dev, &pdev->dev);
2262 dev_set_drvdata(&pdev->dev, dev);
2263 dev->ethtool_ops = &bcm_sysport_ethtool_ops;
2264 dev->netdev_ops = &bcm_sysport_netdev_ops;
2265 netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
2267 /* HW supported features, none enabled by default */
2268 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
2269 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2271 /* Request the WOL interrupt and advertise suspend if available */
2272 priv->wol_irq_disabled = 1;
2273 ret = devm_request_irq(&pdev->dev, priv->wol_irq,
2274 bcm_sysport_wol_isr, 0, dev->name, priv);
2276 device_set_wakeup_capable(&pdev->dev, 1);
2278 /* Set the needed headroom once and for all */
2279 BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
2280 dev->needed_headroom += sizeof(struct bcm_tsb);
2282 /* libphy will adjust the link state accordingly */
2283 netif_carrier_off(dev);
2285 u64_stats_init(&priv->syncp);
2287 priv->dsa_notifier.notifier_call = bcm_sysport_dsa_notifier;
2289 ret = register_dsa_notifier(&priv->dsa_notifier);
2291 dev_err(&pdev->dev, "failed to register DSA notifier\n");
2292 goto err_deregister_fixed_link;
2295 ret = register_netdev(dev);
2297 dev_err(&pdev->dev, "failed to register net_device\n");
2298 goto err_deregister_notifier;
2301 priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
2302 dev_info(&pdev->dev,
2303 "Broadcom SYSTEMPORT%s" REV_FMT
2304 " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
2305 priv->is_lite ? " Lite" : "",
2306 (priv->rev >> 8) & 0xff, priv->rev & 0xff,
2307 priv->base, priv->irq0, priv->irq1, txq, rxq);
2311 err_deregister_notifier:
2312 unregister_dsa_notifier(&priv->dsa_notifier);
2313 err_deregister_fixed_link:
2314 if (of_phy_is_fixed_link(dn))
2315 of_phy_deregister_fixed_link(dn);
2321 static int bcm_sysport_remove(struct platform_device *pdev)
2323 struct net_device *dev = dev_get_drvdata(&pdev->dev);
2324 struct bcm_sysport_priv *priv = netdev_priv(dev);
2325 struct device_node *dn = pdev->dev.of_node;
2327 /* Not much to do, ndo_close has been called
2328 * and we use managed allocations
2330 unregister_dsa_notifier(&priv->dsa_notifier);
2331 unregister_netdev(dev);
2332 if (of_phy_is_fixed_link(dn))
2333 of_phy_deregister_fixed_link(dn);
2335 dev_set_drvdata(&pdev->dev, NULL);
2340 #ifdef CONFIG_PM_SLEEP
2341 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
2343 struct net_device *ndev = priv->netdev;
2344 unsigned int timeout = 1000;
2347 /* Password has already been programmed */
2348 reg = umac_readl(priv, UMAC_MPD_CTRL);
2351 if (priv->wolopts & WAKE_MAGICSECURE)
2353 umac_writel(priv, reg, UMAC_MPD_CTRL);
2355 /* Make sure RBUF entered WoL mode as result */
2357 reg = rbuf_readl(priv, RBUF_STATUS);
2358 if (reg & RBUF_WOL_MODE)
2362 } while (timeout-- > 0);
2364 /* Do not leave the UniMAC RBUF matching only MPD packets */
2366 reg = umac_readl(priv, UMAC_MPD_CTRL);
2368 umac_writel(priv, reg, UMAC_MPD_CTRL);
2369 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
2373 /* UniMAC receive needs to be turned on */
2374 umac_enable_set(priv, CMD_RX_EN, 1);
2376 /* Enable the interrupt wake-up source */
2377 intrl2_0_mask_clear(priv, INTRL2_0_MPD);
2379 netif_dbg(priv, wol, ndev, "entered WOL mode\n");
2384 static int bcm_sysport_suspend(struct device *d)
2386 struct net_device *dev = dev_get_drvdata(d);
2387 struct bcm_sysport_priv *priv = netdev_priv(dev);
2392 if (!netif_running(dev))
2395 bcm_sysport_netif_stop(dev);
2397 phy_suspend(dev->phydev);
2399 netif_device_detach(dev);
2401 /* Disable UniMAC RX */
2402 umac_enable_set(priv, CMD_RX_EN, 0);
2404 ret = rdma_enable_set(priv, 0);
2406 netdev_err(dev, "RDMA timeout!\n");
2410 /* Disable RXCHK if enabled */
2411 if (priv->rx_chk_en) {
2412 reg = rxchk_readl(priv, RXCHK_CONTROL);
2414 rxchk_writel(priv, reg, RXCHK_CONTROL);
2419 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
2421 ret = tdma_enable_set(priv, 0);
2423 netdev_err(dev, "TDMA timeout!\n");
2427 /* Wait for a packet boundary */
2428 usleep_range(2000, 3000);
2430 umac_enable_set(priv, CMD_TX_EN, 0);
2432 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
2434 /* Free RX/TX rings SW structures */
2435 for (i = 0; i < dev->num_tx_queues; i++)
2436 bcm_sysport_fini_tx_ring(priv, i);
2437 bcm_sysport_fini_rx_ring(priv);
2439 /* Get prepared for Wake-on-LAN */
2440 if (device_may_wakeup(d) && priv->wolopts)
2441 ret = bcm_sysport_suspend_to_wol(priv);
2446 static int bcm_sysport_resume(struct device *d)
2448 struct net_device *dev = dev_get_drvdata(d);
2449 struct bcm_sysport_priv *priv = netdev_priv(dev);
2454 if (!netif_running(dev))
2459 /* We may have been suspended and never received a WOL event that
2460 * would turn off MPD detection, take care of that now
2462 bcm_sysport_resume_from_wol(priv);
2464 /* Initialize both hardware and software ring */
2465 for (i = 0; i < dev->num_tx_queues; i++) {
2466 ret = bcm_sysport_init_tx_ring(priv, i);
2468 netdev_err(dev, "failed to initialize TX ring %d\n",
2470 goto out_free_tx_rings;
2474 /* Initialize linked-list */
2475 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2477 /* Initialize RX ring */
2478 ret = bcm_sysport_init_rx_ring(priv);
2480 netdev_err(dev, "failed to initialize RX ring\n");
2481 goto out_free_rx_ring;
2484 netif_device_attach(dev);
2486 /* RX pipe enable */
2487 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
2489 ret = rdma_enable_set(priv, 1);
2491 netdev_err(dev, "failed to enable RDMA\n");
2492 goto out_free_rx_ring;
2496 if (priv->rx_chk_en) {
2497 reg = rxchk_readl(priv, RXCHK_CONTROL);
2499 rxchk_writel(priv, reg, RXCHK_CONTROL);
2504 /* Set maximum frame length */
2506 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
2508 gib_set_pad_extension(priv);
2510 /* Set MAC address */
2511 umac_set_hw_addr(priv, dev->dev_addr);
2513 umac_enable_set(priv, CMD_RX_EN, 1);
2515 /* TX pipe enable */
2516 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
2518 umac_enable_set(priv, CMD_TX_EN, 1);
2520 ret = tdma_enable_set(priv, 1);
2522 netdev_err(dev, "TDMA timeout!\n");
2523 goto out_free_rx_ring;
2526 phy_resume(dev->phydev);
2528 bcm_sysport_netif_start(dev);
2533 bcm_sysport_fini_rx_ring(priv);
2535 for (i = 0; i < dev->num_tx_queues; i++)
2536 bcm_sysport_fini_tx_ring(priv, i);
2541 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
2542 bcm_sysport_suspend, bcm_sysport_resume);
2544 static struct platform_driver bcm_sysport_driver = {
2545 .probe = bcm_sysport_probe,
2546 .remove = bcm_sysport_remove,
2548 .name = "brcm-systemport",
2549 .of_match_table = bcm_sysport_of_match,
2550 .pm = &bcm_sysport_pm_ops,
2553 module_platform_driver(bcm_sysport_driver);
2555 MODULE_AUTHOR("Broadcom Corporation");
2556 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
2557 MODULE_ALIAS("platform:brcm-systemport");
2558 MODULE_LICENSE("GPL");