drivers/net/dsa/sja1105/sja1105_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
   3  * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
   4  */
   5
   6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   7
   8 #include <linux/delay.h>
   9 #include <linux/module.h>
  10 #include <linux/printk.h>
  11 #include <linux/spi/spi.h>
  12 #include <linux/errno.h>
  13 #include <linux/gpio/consumer.h>
  14 #include <linux/phylink.h>
  15 #include <linux/of.h>
  16 #include <linux/of_net.h>
  17 #include <linux/of_mdio.h>
  18 #include <linux/of_device.h>
  19 #include <linux/pcs/pcs-xpcs.h>
  20 #include <linux/netdev_features.h>
  21 #include <linux/netdevice.h>
  22 #include <linux/if_bridge.h>
  23 #include <linux/if_ether.h>
  24 #include <linux/dsa/8021q.h>
  25 #include "sja1105.h"
  26 #include "sja1105_tas.h"
  27
  28 #define SJA1105_UNKNOWN_MULTICAST       0x010000000000ull
  29 #define SJA1105_DEFAULT_VLAN            (VLAN_N_VID - 1)
  30
  31 static const struct dsa_switch_ops sja1105_switch_ops;
  32
  33 static void sja1105_hw_reset(struct gpio_desc *gpio, unsigned int pulse_len,
  34                              unsigned int startup_delay)
  35 {
  36         gpiod_set_value_cansleep(gpio, 1);
  37         /* Wait for minimum reset pulse length */
  38         msleep(pulse_len);
  39         gpiod_set_value_cansleep(gpio, 0);
  40         /* Wait until chip is ready after reset */
  41         msleep(startup_delay);
  42 }
  43
  44 static void
  45 sja1105_port_allow_traffic(struct sja1105_l2_forwarding_entry *l2_fwd,
  46                            int from, int to, bool allow)
  47 {
  48         if (allow)
  49                 l2_fwd[from].reach_port |= BIT(to);
  50         else
  51                 l2_fwd[from].reach_port &= ~BIT(to);
  52 }
  53
  54 static bool sja1105_can_forward(struct sja1105_l2_forwarding_entry *l2_fwd,
  55                                 int from, int to)
  56 {
  57         return !!(l2_fwd[from].reach_port & BIT(to));
  58 }
  59
  60 static int sja1105_init_mac_settings(struct sja1105_private *priv)
  61 {
  62         struct sja1105_mac_config_entry default_mac = {
  63                 /* Enable all 8 priority queues on egress.
  64                  * Every queue i holds top[i] - base[i] frames.
  65                  * Sum of top[i] - base[i] is 511 (max hardware limit).
  66                  */
  67                 .top  = {0x3F, 0x7F, 0xBF, 0xFF, 0x13F, 0x17F, 0x1BF, 0x1FF},
  68                 .base = {0x0, 0x40, 0x80, 0xC0, 0x100, 0x140, 0x180, 0x1C0},
  69                 .enabled = {true, true, true, true, true, true, true, true},
  70                 /* Keep standard IFG of 12 bytes on egress. */
  71                 .ifg = 0,
  72                 /* Always put the MAC speed in automatic mode, where it can be
  73                  * adjusted at runtime by PHYLINK.
  74                  */
  75                 .speed = priv->info->port_speed[SJA1105_SPEED_AUTO],
  76                 /* No static correction for 1-step 1588 events */
  77                 .tp_delin = 0,
  78                 .tp_delout = 0,
  79                 /* Disable aging for critical TTEthernet traffic */
  80                 .maxage = 0xFF,
  81                 /* Internal VLAN (pvid) to apply to untagged ingress */
  82                 .vlanprio = 0,
  83                 .vlanid = 1,
  84                 .ing_mirr = false,
  85                 .egr_mirr = false,
  86                 /* Don't drop traffic with other EtherType than ETH_P_IP */
  87                 .drpnona664 = false,
  88                 /* Don't drop double-tagged traffic */
  89                 .drpdtag = false,
  90                 /* Don't drop untagged traffic */
  91                 .drpuntag = false,
  92                 /* Don't retag 802.1p (VID 0) traffic with the pvid */
  93                 .retag = false,
  94                 /* Disable learning and I/O on user ports by default -
  95                  * STP will enable it.
  96                  */
  97                 .dyn_learn = false,
  98                 .egress = false,
  99                 .ingress = false,
 100         };
 101         struct sja1105_mac_config_entry *mac;
 102         struct dsa_switch *ds = priv->ds;
 103         struct sja1105_table *table;
 104         int i;
 105
 106         table = &priv->static_config.tables[BLK_IDX_MAC_CONFIG];
 107
 108         /* Discard previous MAC Configuration Table */
 109         if (table->entry_count) {
 110                 kfree(table->entries);
 111                 table->entry_count = 0;
 112         }
 113
 114         table->entries = kcalloc(table->ops->max_entry_count,
 115                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 116         if (!table->entries)
 117                 return -ENOMEM;
 118
 119         table->entry_count = table->ops->max_entry_count;
 120
 121         mac = table->entries;
 122
 123         for (i = 0; i < ds->num_ports; i++) {
 124                 mac[i] = default_mac;
 125
 126                 /* Let sja1105_bridge_stp_state_set() keep address learning
 127                  * enabled for the CPU port.
 128                  */
 129                 if (dsa_is_cpu_port(ds, i))
 130                         priv->learn_ena |= BIT(i);
 131         }
 132
 133         return 0;
 134 }
 135
 136 static int sja1105_init_mii_settings(struct sja1105_private *priv)
 137 {
 138         struct device *dev = &priv->spidev->dev;
 139         struct sja1105_xmii_params_entry *mii;
 140         struct dsa_switch *ds = priv->ds;
 141         struct sja1105_table *table;
 142         int i;
 143
 144         table = &priv->static_config.tables[BLK_IDX_XMII_PARAMS];
 145
 146         /* Discard previous xMII Mode Parameters Table */
 147         if (table->entry_count) {
 148                 kfree(table->entries);
 149                 table->entry_count = 0;
 150         }
 151
 152         table->entries = kcalloc(table->ops->max_entry_count,
 153                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 154         if (!table->entries)
 155                 return -ENOMEM;
 156
 157         /* Override table based on PHYLINK DT bindings */
 158         table->entry_count = table->ops->max_entry_count;
 159
 160         mii = table->entries;
 161
 162         for (i = 0; i < ds->num_ports; i++) {
 163                 sja1105_mii_role_t role = XMII_MAC;
 164
 165                 if (dsa_is_unused_port(priv->ds, i))
 166                         continue;
 167
 168                 switch (priv->phy_mode[i]) {
 169                 case PHY_INTERFACE_MODE_INTERNAL:
 170                         if (priv->info->internal_phy[i] == SJA1105_NO_PHY)
 171                                 goto unsupported;
 172
 173                         mii->xmii_mode[i] = XMII_MODE_MII;
 174                         if (priv->info->internal_phy[i] == SJA1105_PHY_BASE_TX)
 175                                 mii->special[i] = true;
 176
 177                         break;
 178                 case PHY_INTERFACE_MODE_REVMII:
 179                         role = XMII_PHY;
 180                         fallthrough;
 181                 case PHY_INTERFACE_MODE_MII:
 182                         if (!priv->info->supports_mii[i])
 183                                 goto unsupported;
 184
 185                         mii->xmii_mode[i] = XMII_MODE_MII;
 186                         break;
 187                 case PHY_INTERFACE_MODE_REVRMII:
 188                         role = XMII_PHY;
 189                         fallthrough;
 190                 case PHY_INTERFACE_MODE_RMII:
 191                         if (!priv->info->supports_rmii[i])
 192                                 goto unsupported;
 193
 194                         mii->xmii_mode[i] = XMII_MODE_RMII;
 195                         break;
 196                 case PHY_INTERFACE_MODE_RGMII:
 197                 case PHY_INTERFACE_MODE_RGMII_ID:
 198                 case PHY_INTERFACE_MODE_RGMII_RXID:
 199                 case PHY_INTERFACE_MODE_RGMII_TXID:
 200                         if (!priv->info->supports_rgmii[i])
 201                                 goto unsupported;
 202
 203                         mii->xmii_mode[i] = XMII_MODE_RGMII;
 204                         break;
 205                 case PHY_INTERFACE_MODE_SGMII:
 206                         if (!priv->info->supports_sgmii[i])
 207                                 goto unsupported;
 208
 209                         mii->xmii_mode[i] = XMII_MODE_SGMII;
 210                         mii->special[i] = true;
 211                         break;
 212                 case PHY_INTERFACE_MODE_2500BASEX:
 213                         if (!priv->info->supports_2500basex[i])
 214                                 goto unsupported;
 215
 216                         mii->xmii_mode[i] = XMII_MODE_SGMII;
 217                         mii->special[i] = true;
 218                         break;
 219 unsupported:
 220                 default:
 221                         dev_err(dev, "Unsupported PHY mode %s on port %d!\n",
 222                                 phy_modes(priv->phy_mode[i]), i);
 223                         return -EINVAL;
 224                 }
 225
 226                 mii->phy_mac[i] = role;
 227         }
 228         return 0;
 229 }
 230
 231 static int sja1105_init_static_fdb(struct sja1105_private *priv)
 232 {
 233         struct sja1105_l2_lookup_entry *l2_lookup;
 234         struct sja1105_table *table;
 235         int port;
 236
 237         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
 238
 239         /* We only populate the FDB table through dynamic L2 Address Lookup
 240          * entries, except for a special entry at the end which is a catch-all
 241          * for unknown multicast and will be used to control flooding domain.
 242          */
 243         if (table->entry_count) {
 244                 kfree(table->entries);
 245                 table->entry_count = 0;
 246         }
 247
 248         if (!priv->info->can_limit_mcast_flood)
 249                 return 0;
 250
 251         table->entries = kcalloc(1, table->ops->unpacked_entry_size,
 252                                  GFP_KERNEL);
 253         if (!table->entries)
 254                 return -ENOMEM;
 255
 256         table->entry_count = 1;
 257         l2_lookup = table->entries;
 258
 259         /* All L2 multicast addresses have an odd first octet */
 260         l2_lookup[0].macaddr = SJA1105_UNKNOWN_MULTICAST;
 261         l2_lookup[0].mask_macaddr = SJA1105_UNKNOWN_MULTICAST;
 262         l2_lookup[0].lockeds = true;
 263         l2_lookup[0].index = SJA1105_MAX_L2_LOOKUP_COUNT - 1;
 264
 265         /* Flood multicast to every port by default */
 266         for (port = 0; port < priv->ds->num_ports; port++)
 267                 if (!dsa_is_unused_port(priv->ds, port))
 268                         l2_lookup[0].destports |= BIT(port);
 269
 270         return 0;
 271 }
 272
 273 static int sja1105_init_l2_lookup_params(struct sja1105_private *priv)
 274 {
 275         struct sja1105_l2_lookup_params_entry default_l2_lookup_params = {
 276                 /* Learned FDB entries are forgotten after 300 seconds */
 277                 .maxage = SJA1105_AGEING_TIME_MS(300000),
 278                 /* All entries within a FDB bin are available for learning */
 279                 .dyn_tbsz = SJA1105ET_FDB_BIN_SIZE,
 280                 /* And the P/Q/R/S equivalent setting: */
 281                 .start_dynspc = 0,
 282                 /* 2^8 + 2^5 + 2^3 + 2^2 + 2^1 + 1 in Koopman notation */
 283                 .poly = 0x97,
 284                 /* This selects between Independent VLAN Learning (IVL) and
 285                  * Shared VLAN Learning (SVL)
 286                  */
 287                 .shared_learn = true,
 288                 /* Don't discard management traffic based on ENFPORT -
 289                  * we don't perform SMAC port enforcement anyway, so
 290                  * what we are setting here doesn't matter.
 291                  */
 292                 .no_enf_hostprt = false,
 293                 /* Don't learn SMAC for mac_fltres1 and mac_fltres0.
 294                  * Maybe correlate with no_linklocal_learn from bridge driver?
 295                  */
 296                 .no_mgmt_learn = true,
 297                 /* P/Q/R/S only */
 298                 .use_static = true,
 299                 /* Dynamically learned FDB entries can overwrite other (older)
 300                  * dynamic FDB entries
 301                  */
 302                 .owr_dyn = true,
 303                 .drpnolearn = true,
 304         };
 305         struct dsa_switch *ds = priv->ds;
 306         int port, num_used_ports = 0;
 307         struct sja1105_table *table;
 308         u64 max_fdb_entries;
 309
 310         for (port = 0; port < ds->num_ports; port++)
 311                 if (!dsa_is_unused_port(ds, port))
 312                         num_used_ports++;
 313
 314         max_fdb_entries = SJA1105_MAX_L2_LOOKUP_COUNT / num_used_ports;
 315
 316         for (port = 0; port < ds->num_ports; port++) {
 317                 if (dsa_is_unused_port(ds, port))
 318                         continue;
 319
 320                 default_l2_lookup_params.maxaddrp[port] = max_fdb_entries;
 321         }
 322
 323         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
 324
 325         if (table->entry_count) {
 326                 kfree(table->entries);
 327                 table->entry_count = 0;
 328         }
 329
 330         table->entries = kcalloc(table->ops->max_entry_count,
 331                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 332         if (!table->entries)
 333                 return -ENOMEM;
 334
 335         table->entry_count = table->ops->max_entry_count;
 336
 337         /* This table only has a single entry */
 338         ((struct sja1105_l2_lookup_params_entry *)table->entries)[0] =
 339                                 default_l2_lookup_params;
 340
 341         return 0;
 342 }
 343
 344 /* Set up a default VLAN for untagged traffic injected from the CPU
 345  * using management routes (e.g. STP, PTP) as opposed to tag_8021q.
 346  * All DT-defined ports are members of this VLAN, and there are no
 347  * restrictions on forwarding (since the CPU selects the destination).
 348  * Frames from this VLAN will always be transmitted as untagged, and
 349  * neither the bridge nor the 8021q module cannot create this VLAN ID.
 350  */
 351 static int sja1105_init_static_vlan(struct sja1105_private *priv)
 352 {
 353         struct sja1105_table *table;
 354         struct sja1105_vlan_lookup_entry pvid = {
 355                 .type_entry = SJA1110_VLAN_D_TAG,
 356                 .ving_mirr = 0,
 357                 .vegr_mirr = 0,
 358                 .vmemb_port = 0,
 359                 .vlan_bc = 0,
 360                 .tag_port = 0,
 361                 .vlanid = SJA1105_DEFAULT_VLAN,
 362         };
 363         struct dsa_switch *ds = priv->ds;
 364         int port;
 365
 366         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
 367
 368         if (table->entry_count) {
 369                 kfree(table->entries);
 370                 table->entry_count = 0;
 371         }
 372
 373         table->entries = kzalloc(table->ops->unpacked_entry_size,
 374                                  GFP_KERNEL);
 375         if (!table->entries)
 376                 return -ENOMEM;
 377
 378         table->entry_count = 1;
 379
 380         for (port = 0; port < ds->num_ports; port++) {
 381                 struct sja1105_bridge_vlan *v;
 382
 383                 if (dsa_is_unused_port(ds, port))
 384                         continue;
 385
 386                 pvid.vmemb_port |= BIT(port);
 387                 pvid.vlan_bc |= BIT(port);
 388                 pvid.tag_port &= ~BIT(port);
 389
 390                 v = kzalloc(sizeof(*v), GFP_KERNEL);
 391                 if (!v)
 392                         return -ENOMEM;
 393
 394                 v->port = port;
 395                 v->vid = SJA1105_DEFAULT_VLAN;
 396                 v->untagged = true;
 397                 if (dsa_is_cpu_port(ds, port))
 398                         v->pvid = true;
 399                 list_add(&v->list, &priv->dsa_8021q_vlans);
 400         }
 401
 402         ((struct sja1105_vlan_lookup_entry *)table->entries)[0] = pvid;
 403         return 0;
 404 }
 405
 406 static int sja1105_init_l2_forwarding(struct sja1105_private *priv)
 407 {
 408         struct sja1105_l2_forwarding_entry *l2fwd;
 409         struct dsa_switch *ds = priv->ds;
 410         struct sja1105_table *table;
 411         int i, j;
 412
 413         table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING];
 414
 415         if (table->entry_count) {
 416                 kfree(table->entries);
 417                 table->entry_count = 0;
 418         }
 419
 420         table->entries = kcalloc(table->ops->max_entry_count,
 421                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 422         if (!table->entries)
 423                 return -ENOMEM;
 424
 425         table->entry_count = table->ops->max_entry_count;
 426
 427         l2fwd = table->entries;
 428
 429         /* First 5 entries define the forwarding rules */
 430         for (i = 0; i < ds->num_ports; i++) {
 431                 unsigned int upstream = dsa_upstream_port(priv->ds, i);
 432
 433                 if (dsa_is_unused_port(ds, i))
 434                         continue;
 435
 436                 for (j = 0; j < SJA1105_NUM_TC; j++)
 437                         l2fwd[i].vlan_pmap[j] = j;
 438
 439                 /* All ports start up with egress flooding enabled,
 440                  * including the CPU port.
 441                  */
 442                 priv->ucast_egress_floods |= BIT(i);
 443                 priv->bcast_egress_floods |= BIT(i);
 444
 445                 if (i == upstream)
 446                         continue;
 447
 448                 sja1105_port_allow_traffic(l2fwd, i, upstream, true);
 449                 sja1105_port_allow_traffic(l2fwd, upstream, i, true);
 450
 451                 l2fwd[i].bc_domain = BIT(upstream);
 452                 l2fwd[i].fl_domain = BIT(upstream);
 453
 454                 l2fwd[upstream].bc_domain |= BIT(i);
 455                 l2fwd[upstream].fl_domain |= BIT(i);
 456         }
 457
 458         /* Next 8 entries define VLAN PCP mapping from ingress to egress.
 459          * Create a one-to-one mapping.
 460          */
 461         for (i = 0; i < SJA1105_NUM_TC; i++) {
 462                 for (j = 0; j < ds->num_ports; j++) {
 463                         if (dsa_is_unused_port(ds, j))
 464                                 continue;
 465
 466                         l2fwd[ds->num_ports + i].vlan_pmap[j] = i;
 467                 }
 468
 469                 l2fwd[ds->num_ports + i].type_egrpcp2outputq = true;
 470         }
 471
 472         return 0;
 473 }
 474
 475 static int sja1110_init_pcp_remapping(struct sja1105_private *priv)
 476 {
 477         struct sja1110_pcp_remapping_entry *pcp_remap;
 478         struct dsa_switch *ds = priv->ds;
 479         struct sja1105_table *table;
 480         int port, tc;
 481
 482         table = &priv->static_config.tables[BLK_IDX_PCP_REMAPPING];
 483
 484         /* Nothing to do for SJA1105 */
 485         if (!table->ops->max_entry_count)
 486                 return 0;
 487
 488         if (table->entry_count) {
 489                 kfree(table->entries);
 490                 table->entry_count = 0;
 491         }
 492
 493         table->entries = kcalloc(table->ops->max_entry_count,
 494                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 495         if (!table->entries)
 496                 return -ENOMEM;
 497
 498         table->entry_count = table->ops->max_entry_count;
 499
 500         pcp_remap = table->entries;
 501
 502         /* Repeat the configuration done for vlan_pmap */
 503         for (port = 0; port < ds->num_ports; port++) {
 504                 if (dsa_is_unused_port(ds, port))
 505                         continue;
 506
 507                 for (tc = 0; tc < SJA1105_NUM_TC; tc++)
 508                         pcp_remap[port].egrpcp[tc] = tc;
 509         }
 510
 511         return 0;
 512 }
 513
 514 static int sja1105_init_l2_forwarding_params(struct sja1105_private *priv)
 515 {
 516         struct sja1105_l2_forwarding_params_entry *l2fwd_params;
 517         struct sja1105_table *table;
 518
 519         table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS];
 520
 521         if (table->entry_count) {
 522                 kfree(table->entries);
 523                 table->entry_count = 0;
 524         }
 525
 526         table->entries = kcalloc(table->ops->max_entry_count,
 527                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 528         if (!table->entries)
 529                 return -ENOMEM;
 530
 531         table->entry_count = table->ops->max_entry_count;
 532
 533         /* This table only has a single entry */
 534         l2fwd_params = table->entries;
 535
 536         /* Disallow dynamic reconfiguration of vlan_pmap */
 537         l2fwd_params->max_dynp = 0;
 538         /* Use a single memory partition for all ingress queues */
 539         l2fwd_params->part_spc[0] = priv->info->max_frame_mem;
 540
 541         return 0;
 542 }
 543
 544 void sja1105_frame_memory_partitioning(struct sja1105_private *priv)
 545 {
 546         struct sja1105_l2_forwarding_params_entry *l2_fwd_params;
 547         struct sja1105_vl_forwarding_params_entry *vl_fwd_params;
 548         int max_mem = priv->info->max_frame_mem;
 549         struct sja1105_table *table;
 550
 551         /* VLAN retagging is implemented using a loopback port that consumes
 552          * frame buffers. That leaves less for us.
 553          */
 554         if (priv->vlan_state == SJA1105_VLAN_BEST_EFFORT)
 555                 max_mem -= SJA1105_FRAME_MEMORY_RETAGGING_OVERHEAD;
 556
 557         table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS];
 558         l2_fwd_params = table->entries;
 559         l2_fwd_params->part_spc[0] = max_mem;
 560
 561         /* If we have any critical-traffic virtual links, we need to reserve
 562          * some frame buffer memory for them. At the moment, hardcode the value
 563          * at 100 blocks of 128 bytes of memory each. This leaves 829 blocks
 564          * remaining for best-effort traffic. TODO: figure out a more flexible
 565          * way to perform the frame buffer partitioning.
 566          */
 567         if (!priv->static_config.tables[BLK_IDX_VL_FORWARDING].entry_count)
 568                 return;
 569
 570         table = &priv->static_config.tables[BLK_IDX_VL_FORWARDING_PARAMS];
 571         vl_fwd_params = table->entries;
 572
 573         l2_fwd_params->part_spc[0] -= SJA1105_VL_FRAME_MEMORY;
 574         vl_fwd_params->partspc[0] = SJA1105_VL_FRAME_MEMORY;
 575 }
 576
 577 /* SJA1110 TDMACONFIGIDX values:
 578  *
 579  *      | 100 Mbps ports |  1Gbps ports  | 2.5Gbps ports | Disabled ports
 580  * -----+----------------+---------------+---------------+---------------
 581  *   0  |   0, [5:10]    |     [1:2]     |     [3:4]     |     retag
 582  *   1  |0, [5:10], retag|     [1:2]     |     [3:4]     |       -
 583  *   2  |   0, [5:10]    |  [1:3], retag |       4       |       -
 584  *   3  |   0, [5:10]    |[1:2], 4, retag|       3       |       -
 585  *   4  |  0, 2, [5:10]  |    1, retag   |     [3:4]     |       -
 586  *   5  |  0, 1, [5:10]  |    2, retag   |     [3:4]     |       -
 587  *  14  |   0, [5:10]    | [1:4], retag  |       -       |       -
 588  *  15  |     [5:10]     | [0:4], retag  |       -       |       -
 589  */
 590 static void sja1110_select_tdmaconfigidx(struct sja1105_private *priv)
 591 {
 592         struct sja1105_general_params_entry *general_params;
 593         struct sja1105_table *table;
 594         bool port_1_is_base_tx;
 595         bool port_3_is_2500;
 596         bool port_4_is_2500;
 597         u64 tdmaconfigidx;
 598
 599         if (priv->info->device_id != SJA1110_DEVICE_ID)
 600                 return;
 601
 602         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
 603         general_params = table->entries;
 604
 605         /* All the settings below are "as opposed to SGMII", which is the
 606          * other pinmuxing option.
 607          */
 608         port_1_is_base_tx = priv->phy_mode[1] == PHY_INTERFACE_MODE_INTERNAL;
 609         port_3_is_2500 = priv->phy_mode[3] == PHY_INTERFACE_MODE_2500BASEX;
 610         port_4_is_2500 = priv->phy_mode[4] == PHY_INTERFACE_MODE_2500BASEX;
 611
 612         if (port_1_is_base_tx)
 613                 /* Retagging port will operate at 1 Gbps */
 614                 tdmaconfigidx = 5;
 615         else if (port_3_is_2500 && port_4_is_2500)
 616                 /* Retagging port will operate at 100 Mbps */
 617                 tdmaconfigidx = 1;
 618         else if (port_3_is_2500)
 619                 /* Retagging port will operate at 1 Gbps */
 620                 tdmaconfigidx = 3;
 621         else if (port_4_is_2500)
 622                 /* Retagging port will operate at 1 Gbps */
 623                 tdmaconfigidx = 2;
 624         else
 625                 /* Retagging port will operate at 1 Gbps */
 626                 tdmaconfigidx = 14;
 627
 628         general_params->tdmaconfigidx = tdmaconfigidx;
 629 }
 630
 631 static int sja1105_init_general_params(struct sja1105_private *priv)
 632 {
 633         struct sja1105_general_params_entry default_general_params = {
 634                 /* Allow dynamic changing of the mirror port */
 635                 .mirr_ptacu = true,
 636                 .switchid = priv->ds->index,
 637                 /* Priority queue for link-local management frames
 638                  * (both ingress to and egress from CPU - PTP, STP etc)
 639                  */
 640                 .hostprio = 7,
 641                 .mac_fltres1 = SJA1105_LINKLOCAL_FILTER_A,
 642                 .mac_flt1    = SJA1105_LINKLOCAL_FILTER_A_MASK,
 643                 .incl_srcpt1 = false,
 644                 .send_meta1  = false,
 645                 .mac_fltres0 = SJA1105_LINKLOCAL_FILTER_B,
 646                 .mac_flt0    = SJA1105_LINKLOCAL_FILTER_B_MASK,
 647                 .incl_srcpt0 = false,
 648                 .send_meta0  = false,
 649                 /* The destination for traffic matching mac_fltres1 and
 650                  * mac_fltres0 on all ports except host_port. Such traffic
 651                  * receieved on host_port itself would be dropped, except
 652                  * by installing a temporary 'management route'
 653                  */
 654                 .host_port = priv->ds->num_ports,
 655                 /* Default to an invalid value */
 656                 .mirr_port = priv->ds->num_ports,
 657                 /* No TTEthernet */
 658                 .vllupformat = SJA1105_VL_FORMAT_PSFP,
 659                 .vlmarker = 0,
 660                 .vlmask = 0,
 661                 /* Only update correctionField for 1-step PTP (L2 transport) */
 662                 .ignore2stf = 0,
 663                 /* Forcefully disable VLAN filtering by telling
 664                  * the switch that VLAN has a different EtherType.
 665                  */
 666                 .tpid = ETH_P_SJA1105,
 667                 .tpid2 = ETH_P_SJA1105,
 668                 /* Enable the TTEthernet engine on SJA1110 */
 669                 .tte_en = true,
 670                 /* Set up the EtherType for control packets on SJA1110 */
 671                 .header_type = ETH_P_SJA1110,
 672         };
 673         struct sja1105_general_params_entry *general_params;
 674         struct dsa_switch *ds = priv->ds;
 675         struct sja1105_table *table;
 676         int port;
 677
 678         for (port = 0; port < ds->num_ports; port++) {
 679                 if (dsa_is_cpu_port(ds, port)) {
 680                         default_general_params.host_port = port;
 681                         break;
 682                 }
 683         }
 684
 685         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
 686
 687         if (table->entry_count) {
 688                 kfree(table->entries);
 689                 table->entry_count = 0;
 690         }
 691
 692         table->entries = kcalloc(table->ops->max_entry_count,
 693                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 694         if (!table->entries)
 695                 return -ENOMEM;
 696
 697         table->entry_count = table->ops->max_entry_count;
 698
 699         general_params = table->entries;
 700
 701         /* This table only has a single entry */
 702         general_params[0] = default_general_params;
 703
 704         sja1110_select_tdmaconfigidx(priv);
 705
 706         /* Link-local traffic received on casc_port will be forwarded
 707          * to host_port without embedding the source port and device ID
 708          * info in the destination MAC address, and no RX timestamps will be
 709          * taken either (presumably because it is a cascaded port and a
 710          * downstream SJA switch already did that).
 711          * To disable the feature, we need to do different things depending on
 712          * switch generation. On SJA1105 we need to set an invalid port, while
 713          * on SJA1110 which support multiple cascaded ports, this field is a
 714          * bitmask so it must be left zero.
 715          */
 716         if (!priv->info->multiple_cascade_ports)
 717                 general_params->casc_port = ds->num_ports;
 718
 719         return 0;
 720 }
 721
 722 static int sja1105_init_avb_params(struct sja1105_private *priv)
 723 {
 724         struct sja1105_avb_params_entry *avb;
 725         struct sja1105_table *table;
 726
 727         table = &priv->static_config.tables[BLK_IDX_AVB_PARAMS];
 728
 729         /* Discard previous AVB Parameters Table */
 730         if (table->entry_count) {
 731                 kfree(table->entries);
 732                 table->entry_count = 0;
 733         }
 734
 735         table->entries = kcalloc(table->ops->max_entry_count,
 736                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 737         if (!table->entries)
 738                 return -ENOMEM;
 739
 740         table->entry_count = table->ops->max_entry_count;
 741
 742         avb = table->entries;
 743
 744         /* Configure the MAC addresses for meta frames */
 745         avb->destmeta = SJA1105_META_DMAC;
 746         avb->srcmeta  = SJA1105_META_SMAC;
 747         /* On P/Q/R/S, configure the direction of the PTP_CLK pin as input by
 748          * default. This is because there might be boards with a hardware
 749          * layout where enabling the pin as output might cause an electrical
 750          * clash. On E/T the pin is always an output, which the board designers
 751          * probably already knew, so even if there are going to be electrical
 752          * issues, there's nothing we can do.
 753          */
 754         avb->cas_master = false;
 755
 756         return 0;
 757 }
 758
 759 /* The L2 policing table is 2-stage. The table is looked up for each frame
 760  * according to the ingress port, whether it was broadcast or not, and the
 761  * classified traffic class (given by VLAN PCP). This portion of the lookup is
 762  * fixed, and gives access to the SHARINDX, an indirection register pointing
 763  * within the policing table itself, which is used to resolve the policer that
 764  * will be used for this frame.
 765  *
 766  *  Stage 1                              Stage 2
 767  * +------------+--------+              +---------------------------------+
 768  * |Port 0 TC 0 |SHARINDX|              | Policer 0: Rate, Burst, MTU     |
 769  * +------------+--------+              +---------------------------------+
 770  * |Port 0 TC 1 |SHARINDX|              | Policer 1: Rate, Burst, MTU     |
 771  * +------------+--------+              +---------------------------------+
 772  *    ...                               | Policer 2: Rate, Burst, MTU     |
 773  * +------------+--------+              +---------------------------------+
 774  * |Port 0 TC 7 |SHARINDX|              | Policer 3: Rate, Burst, MTU     |
 775  * +------------+--------+              +---------------------------------+
 776  * |Port 1 TC 0 |SHARINDX|              | Policer 4: Rate, Burst, MTU     |
 777  * +------------+--------+              +---------------------------------+
 778  *    ...                               | Policer 5: Rate, Burst, MTU     |
 779  * +------------+--------+              +---------------------------------+
 780  * |Port 1 TC 7 |SHARINDX|              | Policer 6: Rate, Burst, MTU     |
 781  * +------------+--------+              +---------------------------------+
 782  *    ...                               | Policer 7: Rate, Burst, MTU     |
 783  * +------------+--------+              +---------------------------------+
 784  * |Port 4 TC 7 |SHARINDX|                 ...
 785  * +------------+--------+
 786  * |Port 0 BCAST|SHARINDX|                 ...
 787  * +------------+--------+
 788  * |Port 1 BCAST|SHARINDX|                 ...
 789  * +------------+--------+
 790  *    ...                                  ...
 791  * +------------+--------+              +---------------------------------+
 792  * |Port 4 BCAST|SHARINDX|              | Policer 44: Rate, Burst, MTU    |
 793  * +------------+--------+              +---------------------------------+
 794  *
 795  * In this driver, we shall use policers 0-4 as statically alocated port
 796  * (matchall) policers. So we need to make the SHARINDX for all lookups
 797  * corresponding to this ingress port (8 VLAN PCP lookups and 1 broadcast
 798  * lookup) equal.
 799  * The remaining policers (40) shall be dynamically allocated for flower
 800  * policers, where the key is either vlan_prio or dst_mac ff:ff:ff:ff:ff:ff.
 801  */
 802 #define SJA1105_RATE_MBPS(speed) (((speed) * 64000) / 1000)
 803
 804 static int sja1105_init_l2_policing(struct sja1105_private *priv)
 805 {
 806         struct sja1105_l2_policing_entry *policing;
 807         struct dsa_switch *ds = priv->ds;
 808         struct sja1105_table *table;
 809         int port, tc;
 810
 811         table = &priv->static_config.tables[BLK_IDX_L2_POLICING];
 812
 813         /* Discard previous L2 Policing Table */
 814         if (table->entry_count) {
 815                 kfree(table->entries);
 816                 table->entry_count = 0;
 817         }
 818
 819         table->entries = kcalloc(table->ops->max_entry_count,
 820                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 821         if (!table->entries)
 822                 return -ENOMEM;
 823
 824         table->entry_count = table->ops->max_entry_count;
 825
 826         policing = table->entries;
 827
 828         /* Setup shared indices for the matchall policers */
 829         for (port = 0; port < ds->num_ports; port++) {
 830                 int mcast = (ds->num_ports * (SJA1105_NUM_TC + 1)) + port;
 831                 int bcast = (ds->num_ports * SJA1105_NUM_TC) + port;
 832
 833                 for (tc = 0; tc < SJA1105_NUM_TC; tc++)
 834                         policing[port * SJA1105_NUM_TC + tc].sharindx = port;
 835
 836                 policing[bcast].sharindx = port;
 837                 /* Only SJA1110 has multicast policers */
 838                 if (mcast <= table->ops->max_entry_count)
 839                         policing[mcast].sharindx = port;
 840         }
 841
 842         /* Setup the matchall policer parameters */
 843         for (port = 0; port < ds->num_ports; port++) {
 844                 int mtu = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
 845
 846                 if (dsa_is_cpu_port(priv->ds, port))
 847                         mtu += VLAN_HLEN;
 848
 849                 policing[port].smax = 65535; /* Burst size in bytes */
 850                 policing[port].rate = SJA1105_RATE_MBPS(1000);
 851                 policing[port].maxlen = mtu;
 852                 policing[port].partition = 0;
 853         }
 854
 855         return 0;
 856 }
 857
 858 static int sja1105_static_config_load(struct sja1105_private *priv)
 859 {
 860         int rc;
 861
 862         sja1105_static_config_free(&priv->static_config);
 863         rc = sja1105_static_config_init(&priv->static_config,
 864                                         priv->info->static_ops,
 865                                         priv->info->device_id);
 866         if (rc)
 867                 return rc;
 868
 869         /* Build static configuration */
 870         rc = sja1105_init_mac_settings(priv);
 871         if (rc < 0)
 872                 return rc;
 873         rc = sja1105_init_mii_settings(priv);
 874         if (rc < 0)
 875                 return rc;
 876         rc = sja1105_init_static_fdb(priv);
 877         if (rc < 0)
 878                 return rc;
 879         rc = sja1105_init_static_vlan(priv);
 880         if (rc < 0)
 881                 return rc;
 882         rc = sja1105_init_l2_lookup_params(priv);
 883         if (rc < 0)
 884                 return rc;
 885         rc = sja1105_init_l2_forwarding(priv);
 886         if (rc < 0)
 887                 return rc;
 888         rc = sja1105_init_l2_forwarding_params(priv);
 889         if (rc < 0)
 890                 return rc;
 891         rc = sja1105_init_l2_policing(priv);
 892         if (rc < 0)
 893                 return rc;
 894         rc = sja1105_init_general_params(priv);
 895         if (rc < 0)
 896                 return rc;
 897         rc = sja1105_init_avb_params(priv);
 898         if (rc < 0)
 899                 return rc;
 900         rc = sja1110_init_pcp_remapping(priv);
 901         if (rc < 0)
 902                 return rc;
 903
 904         /* Send initial configuration to hardware via SPI */
 905         return sja1105_static_config_upload(priv);
 906 }
 907
 908 static int sja1105_parse_rgmii_delays(struct sja1105_private *priv)
 909 {
 910         struct dsa_switch *ds = priv->ds;
 911         int port;
 912
 913         for (port = 0; port < ds->num_ports; port++) {
 914                 if (!priv->fixed_link[port])
 915                         continue;
 916
 917                 if (priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_RXID ||
 918                     priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_ID)
 919                         priv->rgmii_rx_delay[port] = true;
 920
 921                 if (priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_TXID ||
 922                     priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_ID)
 923                         priv->rgmii_tx_delay[port] = true;
 924
 925                 if ((priv->rgmii_rx_delay[port] || priv->rgmii_tx_delay[port]) &&
 926                     !priv->info->setup_rgmii_delay)
 927                         return -EINVAL;
 928         }
 929         return 0;
 930 }
 931
 932 static int sja1105_parse_ports_node(struct sja1105_private *priv,
 933                                     struct device_node *ports_node)
 934 {
 935         struct device *dev = &priv->spidev->dev;
 936         struct device_node *child;
 937
 938         for_each_available_child_of_node(ports_node, child) {
 939                 struct device_node *phy_node;
 940                 phy_interface_t phy_mode;
 941                 u32 index;
 942                 int err;
 943
 944                 /* Get switch port number from DT */
 945                 if (of_property_read_u32(child, "reg", &index) < 0) {
 946                         dev_err(dev, "Port number not defined in device tree "
 947                                 "(property \"reg\")\n");
 948                         of_node_put(child);
 949                         return -ENODEV;
 950                 }
 951
 952                 /* Get PHY mode from DT */
 953                 err = of_get_phy_mode(child, &phy_mode);
 954                 if (err) {
 955                         dev_err(dev, "Failed to read phy-mode or "
 956                                 "phy-interface-type property for port %d\n",
 957                                 index);
 958                         of_node_put(child);
 959                         return -ENODEV;
 960                 }
 961
 962                 phy_node = of_parse_phandle(child, "phy-handle", 0);
 963                 if (!phy_node) {
 964                         if (!of_phy_is_fixed_link(child)) {
 965                                 dev_err(dev, "phy-handle or fixed-link "
 966                                         "properties missing!\n");
 967                                 of_node_put(child);
 968                                 return -ENODEV;
 969                         }
 970                         /* phy-handle is missing, but fixed-link isn't.
 971                          * So it's a fixed link. Default to PHY role.
 972                          */
 973                         priv->fixed_link[index] = true;
 974                 } else {
 975                         of_node_put(phy_node);
 976                 }
 977
 978                 priv->phy_mode[index] = phy_mode;
 979         }
 980
 981         return 0;
 982 }
 983
 984 static int sja1105_parse_dt(struct sja1105_private *priv)
 985 {
 986         struct device *dev = &priv->spidev->dev;
 987         struct device_node *switch_node = dev->of_node;
 988         struct device_node *ports_node;
 989         int rc;
 990
 991         ports_node = of_get_child_by_name(switch_node, "ports");
 992         if (!ports_node)
 993                 ports_node = of_get_child_by_name(switch_node, "ethernet-ports");
 994         if (!ports_node) {
 995                 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n");
 996                 return -ENODEV;
 997         }
 998
 999         rc = sja1105_parse_ports_node(priv, ports_node);
1000         of_node_put(ports_node);
1001
1002         return rc;
1003 }
1004
1005 /* Convert link speed from SJA1105 to ethtool encoding */
1006 static int sja1105_port_speed_to_ethtool(struct sja1105_private *priv,
1007                                          u64 speed)
1008 {
1009         if (speed == priv->info->port_speed[SJA1105_SPEED_10MBPS])
1010                 return SPEED_10;
1011         if (speed == priv->info->port_speed[SJA1105_SPEED_100MBPS])
1012                 return SPEED_100;
1013         if (speed == priv->info->port_speed[SJA1105_SPEED_1000MBPS])
1014                 return SPEED_1000;
1015         if (speed == priv->info->port_speed[SJA1105_SPEED_2500MBPS])
1016                 return SPEED_2500;
1017         return SPEED_UNKNOWN;
1018 }
1019
1020 /* Set link speed in the MAC configuration for a specific port. */
1021 static int sja1105_adjust_port_config(struct sja1105_private *priv, int port,
1022                                       int speed_mbps)
1023 {
1024         struct sja1105_mac_config_entry *mac;
1025         struct device *dev = priv->ds->dev;
1026         u64 speed;
1027         int rc;
1028
1029         /* On P/Q/R/S, one can read from the device via the MAC reconfiguration
1030          * tables. On E/T, MAC reconfig tables are not readable, only writable.
1031          * We have to *know* what the MAC looks like.  For the sake of keeping
1032          * the code common, we'll use the static configuration tables as a
1033          * reasonable approximation for both E/T and P/Q/R/S.
1034          */
1035         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1036
1037         switch (speed_mbps) {
1038         case SPEED_UNKNOWN:
1039                 /* PHYLINK called sja1105_mac_config() to inform us about
1040                  * the state->interface, but AN has not completed and the
1041                  * speed is not yet valid. UM10944.pdf says that setting
1042                  * SJA1105_SPEED_AUTO at runtime disables the port, so that is
1043                  * ok for power consumption in case AN will never complete -
1044                  * otherwise PHYLINK should come back with a new update.
1045                  */
1046                 speed = priv->info->port_speed[SJA1105_SPEED_AUTO];
1047                 break;
1048         case SPEED_10:
1049                 speed = priv->info->port_speed[SJA1105_SPEED_10MBPS];
1050                 break;
1051         case SPEED_100:
1052                 speed = priv->info->port_speed[SJA1105_SPEED_100MBPS];
1053                 break;
1054         case SPEED_1000:
1055                 speed = priv->info->port_speed[SJA1105_SPEED_1000MBPS];
1056                 break;
1057         case SPEED_2500:
1058                 speed = priv->info->port_speed[SJA1105_SPEED_2500MBPS];
1059                 break;
1060         default:
1061                 dev_err(dev, "Invalid speed %iMbps\n", speed_mbps);
1062                 return -EINVAL;
1063         }
1064
1065         /* Overwrite SJA1105_SPEED_AUTO from the static MAC configuration
1066          * table, since this will be used for the clocking setup, and we no
1067          * longer need to store it in the static config (already told hardware
1068          * we want auto during upload phase).
1069          * Actually for the SGMII port, the MAC is fixed at 1 Gbps and
1070          * we need to configure the PCS only (if even that).
1071          */
1072         if (priv->phy_mode[port] == PHY_INTERFACE_MODE_SGMII)
1073                 mac[port].speed = priv->info->port_speed[SJA1105_SPEED_1000MBPS];
1074         else if (priv->phy_mode[port] == PHY_INTERFACE_MODE_2500BASEX)
1075                 mac[port].speed = priv->info->port_speed[SJA1105_SPEED_2500MBPS];
1076         else
1077                 mac[port].speed = speed;
1078
1079         /* Write to the dynamic reconfiguration tables */
1080         rc = sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1081                                           &mac[port], true);
1082         if (rc < 0) {
1083                 dev_err(dev, "Failed to write MAC config: %d\n", rc);
1084                 return rc;
1085         }
1086
1087         /* Reconfigure the PLLs for the RGMII interfaces (required 125 MHz at
1088          * gigabit, 25 MHz at 100 Mbps and 2.5 MHz at 10 Mbps). For MII and
1089          * RMII no change of the clock setup is required. Actually, changing
1090          * the clock setup does interrupt the clock signal for a certain time
1091          * which causes trouble for all PHYs relying on this signal.
1092          */
1093         if (!phy_interface_mode_is_rgmii(priv->phy_mode[port]))
1094                 return 0;
1095
1096         return sja1105_clocking_setup_port(priv, port);
1097 }
1098
1099 /* The SJA1105 MAC programming model is through the static config (the xMII
1100  * Mode table cannot be dynamically reconfigured), and we have to program
1101  * that early (earlier than PHYLINK calls us, anyway).
1102  * So just error out in case the connected PHY attempts to change the initial
1103  * system interface MII protocol from what is defined in the DT, at least for
1104  * now.
1105  */
1106 static bool sja1105_phy_mode_mismatch(struct sja1105_private *priv, int port,
1107                                       phy_interface_t interface)
1108 {
1109         return priv->phy_mode[port] != interface;
1110 }
1111
1112 static void sja1105_mac_config(struct dsa_switch *ds, int port,
1113                                unsigned int mode,
1114                                const struct phylink_link_state *state)
1115 {
1116         struct dsa_port *dp = dsa_to_port(ds, port);
1117         struct sja1105_private *priv = ds->priv;
1118         struct dw_xpcs *xpcs;
1119
1120         if (sja1105_phy_mode_mismatch(priv, port, state->interface)) {
1121                 dev_err(ds->dev, "Changing PHY mode to %s not supported!\n",
1122                         phy_modes(state->interface));
1123                 return;
1124         }
1125
1126         xpcs = priv->xpcs[port];
1127
1128         if (xpcs)
1129                 phylink_set_pcs(dp->pl, &xpcs->pcs);
1130 }
1131
1132 static void sja1105_mac_link_down(struct dsa_switch *ds, int port,
1133                                   unsigned int mode,
1134                                   phy_interface_t interface)
1135 {
1136         sja1105_inhibit_tx(ds->priv, BIT(port), true);
1137 }
1138
1139 static void sja1105_mac_link_up(struct dsa_switch *ds, int port,
1140                                 unsigned int mode,
1141                                 phy_interface_t interface,
1142                                 struct phy_device *phydev,
1143                                 int speed, int duplex,
1144                                 bool tx_pause, bool rx_pause)
1145 {
1146         struct sja1105_private *priv = ds->priv;
1147
1148         sja1105_adjust_port_config(priv, port, speed);
1149
1150         sja1105_inhibit_tx(priv, BIT(port), false);
1151 }
1152
1153 static void sja1105_phylink_validate(struct dsa_switch *ds, int port,
1154                                      unsigned long *supported,
1155                                      struct phylink_link_state *state)
1156 {
1157         /* Construct a new mask which exhaustively contains all link features
1158          * supported by the MAC, and then apply that (logical AND) to what will
1159          * be sent to the PHY for "marketing".
1160          */
1161         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
1162         struct sja1105_private *priv = ds->priv;
1163         struct sja1105_xmii_params_entry *mii;
1164
1165         mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
1166
1167         /* include/linux/phylink.h says:
1168          *     When @state->interface is %PHY_INTERFACE_MODE_NA, phylink
1169          *     expects the MAC driver to return all supported link modes.
1170          */
1171         if (state->interface != PHY_INTERFACE_MODE_NA &&
1172             sja1105_phy_mode_mismatch(priv, port, state->interface)) {
1173                 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
1174                 return;
1175         }
1176
1177         /* The MAC does not support pause frames, and also doesn't
1178          * support half-duplex traffic modes.
1179          */
1180         phylink_set(mask, Autoneg);
1181         phylink_set(mask, MII);
1182         phylink_set(mask, 10baseT_Full);
1183         phylink_set(mask, 100baseT_Full);
1184         phylink_set(mask, 100baseT1_Full);
1185         if (mii->xmii_mode[port] == XMII_MODE_RGMII ||
1186             mii->xmii_mode[port] == XMII_MODE_SGMII)
1187                 phylink_set(mask, 1000baseT_Full);
1188         if (priv->info->supports_2500basex[port]) {
1189                 phylink_set(mask, 2500baseT_Full);
1190                 phylink_set(mask, 2500baseX_Full);
1191         }
1192
1193         bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS);
1194         bitmap_and(state->advertising, state->advertising, mask,
1195                    __ETHTOOL_LINK_MODE_MASK_NBITS);
1196 }
1197
1198 static int
1199 sja1105_find_static_fdb_entry(struct sja1105_private *priv, int port,
1200                               const struct sja1105_l2_lookup_entry *requested)
1201 {
1202         struct sja1105_l2_lookup_entry *l2_lookup;
1203         struct sja1105_table *table;
1204         int i;
1205
1206         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
1207         l2_lookup = table->entries;
1208
1209         for (i = 0; i < table->entry_count; i++)
1210                 if (l2_lookup[i].macaddr == requested->macaddr &&
1211                     l2_lookup[i].vlanid == requested->vlanid &&
1212                     l2_lookup[i].destports & BIT(port))
1213                         return i;
1214
1215         return -1;
1216 }
1217
1218 /* We want FDB entries added statically through the bridge command to persist
1219  * across switch resets, which are a common thing during normal SJA1105
1220  * operation. So we have to back them up in the static configuration tables
1221  * and hence apply them on next static config upload... yay!
1222  */
1223 static int
1224 sja1105_static_fdb_change(struct sja1105_private *priv, int port,
1225                           const struct sja1105_l2_lookup_entry *requested,
1226                           bool keep)
1227 {
1228         struct sja1105_l2_lookup_entry *l2_lookup;
1229         struct sja1105_table *table;
1230         int rc, match;
1231
1232         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
1233
1234         match = sja1105_find_static_fdb_entry(priv, port, requested);
1235         if (match < 0) {
1236                 /* Can't delete a missing entry. */
1237                 if (!keep)
1238                         return 0;
1239
1240                 /* No match => new entry */
1241                 rc = sja1105_table_resize(table, table->entry_count + 1);
1242                 if (rc)
1243                         return rc;
1244
1245                 match = table->entry_count - 1;
1246         }
1247
1248         /* Assign pointer after the resize (it may be new memory) */
1249         l2_lookup = table->entries;
1250
1251         /* We have a match.
1252          * If the job was to add this FDB entry, it's already done (mostly
1253          * anyway, since the port forwarding mask may have changed, case in
1254          * which we update it).
1255          * Otherwise we have to delete it.
1256          */
1257         if (keep) {
1258                 l2_lookup[match] = *requested;
1259                 return 0;
1260         }
1261
1262         /* To remove, the strategy is to overwrite the element with
1263          * the last one, and then reduce the array size by 1
1264          */
1265         l2_lookup[match] = l2_lookup[table->entry_count - 1];
1266         return sja1105_table_resize(table, table->entry_count - 1);
1267 }
1268
1269 /* First-generation switches have a 4-way set associative TCAM that
1270  * holds the FDB entries. An FDB index spans from 0 to 1023 and is comprised of
1271  * a "bin" (grouping of 4 entries) and a "way" (an entry within a bin).
1272  * For the placement of a newly learnt FDB entry, the switch selects the bin
1273  * based on a hash function, and the way within that bin incrementally.
1274  */
1275 static int sja1105et_fdb_index(int bin, int way)
1276 {
1277         return bin * SJA1105ET_FDB_BIN_SIZE + way;
1278 }
1279
1280 static int sja1105et_is_fdb_entry_in_bin(struct sja1105_private *priv, int bin,
1281                                          const u8 *addr, u16 vid,
1282                                          struct sja1105_l2_lookup_entry *match,
1283                                          int *last_unused)
1284 {
1285         int way;
1286
1287         for (way = 0; way < SJA1105ET_FDB_BIN_SIZE; way++) {
1288                 struct sja1105_l2_lookup_entry l2_lookup = {0};
1289                 int index = sja1105et_fdb_index(bin, way);
1290
1291                 /* Skip unused entries, optionally marking them
1292                  * into the return value
1293                  */
1294                 if (sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1295                                                 index, &l2_lookup)) {
1296                         if (last_unused)
1297                                 *last_unused = way;
1298                         continue;
1299                 }
1300
1301                 if (l2_lookup.macaddr == ether_addr_to_u64(addr) &&
1302                     l2_lookup.vlanid == vid) {
1303                         if (match)
1304                                 *match = l2_lookup;
1305                         return way;
1306                 }
1307         }
1308         /* Return an invalid entry index if not found */
1309         return -1;
1310 }
1311
1312 int sja1105et_fdb_add(struct dsa_switch *ds, int port,
1313                       const unsigned char *addr, u16 vid)
1314 {
1315         struct sja1105_l2_lookup_entry l2_lookup = {0};
1316         struct sja1105_private *priv = ds->priv;
1317         struct device *dev = ds->dev;
1318         int last_unused = -1;
1319         int bin, way, rc;
1320
1321         bin = sja1105et_fdb_hash(priv, addr, vid);
1322
1323         way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
1324                                             &l2_lookup, &last_unused);
1325         if (way >= 0) {
1326                 /* We have an FDB entry. Is our port in the destination
1327                  * mask? If yes, we need to do nothing. If not, we need
1328                  * to rewrite the entry by adding this port to it.
1329                  */
1330                 if (l2_lookup.destports & BIT(port))
1331                         return 0;
1332                 l2_lookup.destports |= BIT(port);
1333         } else {
1334                 int index = sja1105et_fdb_index(bin, way);
1335
1336                 /* We don't have an FDB entry. We construct a new one and
1337                  * try to find a place for it within the FDB table.
1338                  */
1339                 l2_lookup.macaddr = ether_addr_to_u64(addr);
1340                 l2_lookup.destports = BIT(port);
1341                 l2_lookup.vlanid = vid;
1342
1343                 if (last_unused >= 0) {
1344                         way = last_unused;
1345                 } else {
1346                         /* Bin is full, need to evict somebody.
1347                          * Choose victim at random. If you get these messages
1348                          * often, you may need to consider changing the
1349                          * distribution function:
1350                          * static_config[BLK_IDX_L2_LOOKUP_PARAMS].entries->poly
1351                          */
1352                         get_random_bytes(&way, sizeof(u8));
1353                         way %= SJA1105ET_FDB_BIN_SIZE;
1354                         dev_warn(dev, "Warning, FDB bin %d full while adding entry for %pM. Evicting entry %u.\n",
1355                                  bin, addr, way);
1356                         /* Evict entry */
1357                         sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1358                                                      index, NULL, false);
1359                 }
1360         }
1361         l2_lookup.index = sja1105et_fdb_index(bin, way);
1362
1363         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1364                                           l2_lookup.index, &l2_lookup,
1365                                           true);
1366         if (rc < 0)
1367                 return rc;
1368
1369         return sja1105_static_fdb_change(priv, port, &l2_lookup, true);
1370 }
1371
1372 int sja1105et_fdb_del(struct dsa_switch *ds, int port,
1373                       const unsigned char *addr, u16 vid)
1374 {
1375         struct sja1105_l2_lookup_entry l2_lookup = {0};
1376         struct sja1105_private *priv = ds->priv;
1377         int index, bin, way, rc;
1378         bool keep;
1379
1380         bin = sja1105et_fdb_hash(priv, addr, vid);
1381         way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
1382                                             &l2_lookup, NULL);
1383         if (way < 0)
1384                 return 0;
1385         index = sja1105et_fdb_index(bin, way);
1386
1387         /* We have an FDB entry. Is our port in the destination mask? If yes,
1388          * we need to remove it. If the resulting port mask becomes empty, we
1389          * need to completely evict the FDB entry.
1390          * Otherwise we just write it back.
1391          */
1392         l2_lookup.destports &= ~BIT(port);
1393
1394         if (l2_lookup.destports)
1395                 keep = true;
1396         else
1397                 keep = false;
1398
1399         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1400                                           index, &l2_lookup, keep);
1401         if (rc < 0)
1402                 return rc;
1403
1404         return sja1105_static_fdb_change(priv, port, &l2_lookup, keep);
1405 }
1406
1407 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port,
1408                         const unsigned char *addr, u16 vid)
1409 {
1410         struct sja1105_l2_lookup_entry l2_lookup = {0};
1411         struct sja1105_private *priv = ds->priv;
1412         int rc, i;
1413
1414         /* Search for an existing entry in the FDB table */
1415         l2_lookup.macaddr = ether_addr_to_u64(addr);
1416         l2_lookup.vlanid = vid;
1417         l2_lookup.iotag = SJA1105_S_TAG;
1418         l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1419         if (priv->vlan_state != SJA1105_VLAN_UNAWARE) {
1420                 l2_lookup.mask_vlanid = VLAN_VID_MASK;
1421                 l2_lookup.mask_iotag = BIT(0);
1422         } else {
1423                 l2_lookup.mask_vlanid = 0;
1424                 l2_lookup.mask_iotag = 0;
1425         }
1426         l2_lookup.destports = BIT(port);
1427
1428         rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1429                                          SJA1105_SEARCH, &l2_lookup);
1430         if (rc == 0) {
1431                 /* Found and this port is already in the entry's
1432                  * port mask => job done
1433                  */
1434                 if (l2_lookup.destports & BIT(port))
1435                         return 0;
1436                 /* l2_lookup.index is populated by the switch in case it
1437                  * found something.
1438                  */
1439                 l2_lookup.destports |= BIT(port);
1440                 goto skip_finding_an_index;
1441         }
1442
1443         /* Not found, so try to find an unused spot in the FDB.
1444          * This is slightly inefficient because the strategy is knock-knock at
1445          * every possible position from 0 to 1023.
1446          */
1447         for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
1448                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1449                                                  i, NULL);
1450                 if (rc < 0)
1451                         break;
1452         }
1453         if (i == SJA1105_MAX_L2_LOOKUP_COUNT) {
1454                 dev_err(ds->dev, "FDB is full, cannot add entry.\n");
1455                 return -EINVAL;
1456         }
1457         l2_lookup.lockeds = true;
1458         l2_lookup.index = i;
1459
1460 skip_finding_an_index:
1461         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1462                                           l2_lookup.index, &l2_lookup,
1463                                           true);
1464         if (rc < 0)
1465                 return rc;
1466
1467         return sja1105_static_fdb_change(priv, port, &l2_lookup, true);
1468 }
1469
1470 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port,
1471                         const unsigned char *addr, u16 vid)
1472 {
1473         struct sja1105_l2_lookup_entry l2_lookup = {0};
1474         struct sja1105_private *priv = ds->priv;
1475         bool keep;
1476         int rc;
1477
1478         l2_lookup.macaddr = ether_addr_to_u64(addr);
1479         l2_lookup.vlanid = vid;
1480         l2_lookup.iotag = SJA1105_S_TAG;
1481         l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1482         if (priv->vlan_state != SJA1105_VLAN_UNAWARE) {
1483                 l2_lookup.mask_vlanid = VLAN_VID_MASK;
1484                 l2_lookup.mask_iotag = BIT(0);
1485         } else {
1486                 l2_lookup.mask_vlanid = 0;
1487                 l2_lookup.mask_iotag = 0;
1488         }
1489         l2_lookup.destports = BIT(port);
1490
1491         rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1492                                          SJA1105_SEARCH, &l2_lookup);
1493         if (rc < 0)
1494                 return 0;
1495
1496         l2_lookup.destports &= ~BIT(port);
1497
1498         /* Decide whether we remove just this port from the FDB entry,
1499          * or if we remove it completely.
1500          */
1501         if (l2_lookup.destports)
1502                 keep = true;
1503         else
1504                 keep = false;
1505
1506         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1507                                           l2_lookup.index, &l2_lookup, keep);
1508         if (rc < 0)
1509                 return rc;
1510
1511         return sja1105_static_fdb_change(priv, port, &l2_lookup, keep);
1512 }
1513
1514 static int sja1105_fdb_add(struct dsa_switch *ds, int port,
1515                            const unsigned char *addr, u16 vid)
1516 {
1517         struct sja1105_private *priv = ds->priv;
1518
1519         /* dsa_8021q is in effect when the bridge's vlan_filtering isn't,
1520          * so the switch still does some VLAN processing internally.
1521          * But Shared VLAN Learning (SVL) is also active, and it will take
1522          * care of autonomous forwarding between the unique pvid's of each
1523          * port.  Here we just make sure that users can't add duplicate FDB
1524          * entries when in this mode - the actual VID doesn't matter except
1525          * for what gets printed in 'bridge fdb show'.  In the case of zero,
1526          * no VID gets printed at all.
1527          */
1528         if (priv->vlan_state != SJA1105_VLAN_FILTERING_FULL)
1529                 vid = 0;
1530
1531         return priv->info->fdb_add_cmd(ds, port, addr, vid);
1532 }
1533
1534 static int sja1105_fdb_del(struct dsa_switch *ds, int port,
1535                            const unsigned char *addr, u16 vid)
1536 {
1537         struct sja1105_private *priv = ds->priv;
1538
1539         if (priv->vlan_state != SJA1105_VLAN_FILTERING_FULL)
1540                 vid = 0;
1541
1542         return priv->info->fdb_del_cmd(ds, port, addr, vid);
1543 }
1544
1545 static int sja1105_fdb_dump(struct dsa_switch *ds, int port,
1546                             dsa_fdb_dump_cb_t *cb, void *data)
1547 {
1548         struct sja1105_private *priv = ds->priv;
1549         struct device *dev = ds->dev;
1550         int i;
1551
1552         for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
1553                 struct sja1105_l2_lookup_entry l2_lookup = {0};
1554                 u8 macaddr[ETH_ALEN];
1555                 int rc;
1556
1557                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1558                                                  i, &l2_lookup);
1559                 /* No fdb entry at i, not an issue */
1560                 if (rc == -ENOENT)
1561                         continue;
1562                 if (rc) {
1563                         dev_err(dev, "Failed to dump FDB: %d\n", rc);
1564                         return rc;
1565                 }
1566
1567                 /* FDB dump callback is per port. This means we have to
1568                  * disregard a valid entry if it's not for this port, even if
1569                  * only to revisit it later. This is inefficient because the
1570                  * 1024-sized FDB table needs to be traversed 4 times through
1571                  * SPI during a 'bridge fdb show' command.
1572                  */
1573                 if (!(l2_lookup.destports & BIT(port)))
1574                         continue;
1575
1576                 /* We need to hide the FDB entry for unknown multicast */
1577                 if (l2_lookup.macaddr == SJA1105_UNKNOWN_MULTICAST &&
1578                     l2_lookup.mask_macaddr == SJA1105_UNKNOWN_MULTICAST)
1579                         continue;
1580
1581                 u64_to_ether_addr(l2_lookup.macaddr, macaddr);
1582
1583                 /* We need to hide the dsa_8021q VLANs from the user. */
1584                 if (priv->vlan_state == SJA1105_VLAN_UNAWARE)
1585                         l2_lookup.vlanid = 0;
1586                 cb(macaddr, l2_lookup.vlanid, l2_lookup.lockeds, data);
1587         }
1588         return 0;
1589 }
1590
1591 static int sja1105_mdb_add(struct dsa_switch *ds, int port,
1592                            const struct switchdev_obj_port_mdb *mdb)
1593 {
1594         return sja1105_fdb_add(ds, port, mdb->addr, mdb->vid);
1595 }
1596
1597 static int sja1105_mdb_del(struct dsa_switch *ds, int port,
1598                            const struct switchdev_obj_port_mdb *mdb)
1599 {
1600         return sja1105_fdb_del(ds, port, mdb->addr, mdb->vid);
1601 }
1602
1603 /* Common function for unicast and broadcast flood configuration.
1604  * Flooding is configured between each {ingress, egress} port pair, and since
1605  * the bridge's semantics are those of "egress flooding", it means we must
1606  * enable flooding towards this port from all ingress ports that are in the
1607  * same forwarding domain.
1608  */
1609 static int sja1105_manage_flood_domains(struct sja1105_private *priv)
1610 {
1611         struct sja1105_l2_forwarding_entry *l2_fwd;
1612         struct dsa_switch *ds = priv->ds;
1613         int from, to, rc;
1614
1615         l2_fwd = priv->static_config.tables[BLK_IDX_L2_FORWARDING].entries;
1616
1617         for (from = 0; from < ds->num_ports; from++) {
1618                 u64 fl_domain = 0, bc_domain = 0;
1619
1620                 for (to = 0; to < priv->ds->num_ports; to++) {
1621                         if (!sja1105_can_forward(l2_fwd, from, to))
1622                                 continue;
1623
1624                         if (priv->ucast_egress_floods & BIT(to))
1625                                 fl_domain |= BIT(to);
1626                         if (priv->bcast_egress_floods & BIT(to))
1627                                 bc_domain |= BIT(to);
1628                 }
1629
1630                 /* Nothing changed, nothing to do */
1631                 if (l2_fwd[from].fl_domain == fl_domain &&
1632                     l2_fwd[from].bc_domain == bc_domain)
1633                         continue;
1634
1635                 l2_fwd[from].fl_domain = fl_domain;
1636                 l2_fwd[from].bc_domain = bc_domain;
1637
1638                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1639                                                   from, &l2_fwd[from], true);
1640                 if (rc < 0)
1641                         return rc;
1642         }
1643
1644         return 0;
1645 }
1646
1647 static int sja1105_bridge_member(struct dsa_switch *ds, int port,
1648                                  struct net_device *br, bool member)
1649 {
1650         struct sja1105_l2_forwarding_entry *l2_fwd;
1651         struct sja1105_private *priv = ds->priv;
1652         int i, rc;
1653
1654         l2_fwd = priv->static_config.tables[BLK_IDX_L2_FORWARDING].entries;
1655
1656         for (i = 0; i < ds->num_ports; i++) {
1657                 /* Add this port to the forwarding matrix of the
1658                  * other ports in the same bridge, and viceversa.
1659                  */
1660                 if (!dsa_is_user_port(ds, i))
1661                         continue;
1662                 /* For the ports already under the bridge, only one thing needs
1663                  * to be done, and that is to add this port to their
1664                  * reachability domain. So we can perform the SPI write for
1665                  * them immediately. However, for this port itself (the one
1666                  * that is new to the bridge), we need to add all other ports
1667                  * to its reachability domain. So we do that incrementally in
1668                  * this loop, and perform the SPI write only at the end, once
1669                  * the domain contains all other bridge ports.
1670                  */
1671                 if (i == port)
1672                         continue;
1673                 if (dsa_to_port(ds, i)->bridge_dev != br)
1674                         continue;
1675                 sja1105_port_allow_traffic(l2_fwd, i, port, member);
1676                 sja1105_port_allow_traffic(l2_fwd, port, i, member);
1677
1678                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1679                                                   i, &l2_fwd[i], true);
1680                 if (rc < 0)
1681                         return rc;
1682         }
1683
1684         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1685                                           port, &l2_fwd[port], true);
1686         if (rc)
1687                 return rc;
1688
1689         return sja1105_manage_flood_domains(priv);
1690 }
1691
1692 static void sja1105_bridge_stp_state_set(struct dsa_switch *ds, int port,
1693                                          u8 state)
1694 {
1695         struct sja1105_private *priv = ds->priv;
1696         struct sja1105_mac_config_entry *mac;
1697
1698         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1699
1700         switch (state) {
1701         case BR_STATE_DISABLED:
1702         case BR_STATE_BLOCKING:
1703                 /* From UM10944 description of DRPDTAG (why put this there?):
1704                  * "Management traffic flows to the port regardless of the state
1705                  * of the INGRESS flag". So BPDUs are still be allowed to pass.
1706                  * At the moment no difference between DISABLED and BLOCKING.
1707                  */
1708                 mac[port].ingress   = false;
1709                 mac[port].egress    = false;
1710                 mac[port].dyn_learn = false;
1711                 break;
1712         case BR_STATE_LISTENING:
1713                 mac[port].ingress   = true;
1714                 mac[port].egress    = false;
1715                 mac[port].dyn_learn = false;
1716                 break;
1717         case BR_STATE_LEARNING:
1718                 mac[port].ingress   = true;
1719                 mac[port].egress    = false;
1720                 mac[port].dyn_learn = !!(priv->learn_ena & BIT(port));
1721                 break;
1722         case BR_STATE_FORWARDING:
1723                 mac[port].ingress   = true;
1724                 mac[port].egress    = true;
1725                 mac[port].dyn_learn = !!(priv->learn_ena & BIT(port));
1726                 break;
1727         default:
1728                 dev_err(ds->dev, "invalid STP state: %d\n", state);
1729                 return;
1730         }
1731
1732         sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1733                                      &mac[port], true);
1734 }
1735
1736 static int sja1105_bridge_join(struct dsa_switch *ds, int port,
1737                                struct net_device *br)
1738 {
1739         return sja1105_bridge_member(ds, port, br, true);
1740 }
1741
1742 static void sja1105_bridge_leave(struct dsa_switch *ds, int port,
1743                                  struct net_device *br)
1744 {
1745         sja1105_bridge_member(ds, port, br, false);
1746 }
1747
1748 #define BYTES_PER_KBIT (1000LL / 8)
1749
1750 static int sja1105_find_unused_cbs_shaper(struct sja1105_private *priv)
1751 {
1752         int i;
1753
1754         for (i = 0; i < priv->info->num_cbs_shapers; i++)
1755                 if (!priv->cbs[i].idle_slope && !priv->cbs[i].send_slope)
1756                         return i;
1757
1758         return -1;
1759 }
1760
1761 static int sja1105_delete_cbs_shaper(struct sja1105_private *priv, int port,
1762                                      int prio)
1763 {
1764         int i;
1765
1766         for (i = 0; i < priv->info->num_cbs_shapers; i++) {
1767                 struct sja1105_cbs_entry *cbs = &priv->cbs[i];
1768
1769                 if (cbs->port == port && cbs->prio == prio) {
1770                         memset(cbs, 0, sizeof(*cbs));
1771                         return sja1105_dynamic_config_write(priv, BLK_IDX_CBS,
1772                                                             i, cbs, true);
1773                 }
1774         }
1775
1776         return 0;
1777 }
1778
1779 static int sja1105_setup_tc_cbs(struct dsa_switch *ds, int port,
1780                                 struct tc_cbs_qopt_offload *offload)
1781 {
1782         struct sja1105_private *priv = ds->priv;
1783         struct sja1105_cbs_entry *cbs;
1784         int index;
1785
1786         if (!offload->enable)
1787                 return sja1105_delete_cbs_shaper(priv, port, offload->queue);
1788
1789         index = sja1105_find_unused_cbs_shaper(priv);
1790         if (index < 0)
1791                 return -ENOSPC;
1792
1793         cbs = &priv->cbs[index];
1794         cbs->port = port;
1795         cbs->prio = offload->queue;
1796         /* locredit and sendslope are negative by definition. In hardware,
1797          * positive values must be provided, and the negative sign is implicit.
1798          */
1799         cbs->credit_hi = offload->hicredit;
1800         cbs->credit_lo = abs(offload->locredit);
1801         /* User space is in kbits/sec, hardware in bytes/sec */
1802         cbs->idle_slope = offload->idleslope * BYTES_PER_KBIT;
1803         cbs->send_slope = abs(offload->sendslope * BYTES_PER_KBIT);
1804         /* Convert the negative values from 64-bit 2's complement
1805          * to 32-bit 2's complement (for the case of 0x80000000 whose
1806          * negative is still negative).
1807          */
1808         cbs->credit_lo &= GENMASK_ULL(31, 0);
1809         cbs->send_slope &= GENMASK_ULL(31, 0);
1810
1811         return sja1105_dynamic_config_write(priv, BLK_IDX_CBS, index, cbs,
1812                                             true);
1813 }
1814
1815 static int sja1105_reload_cbs(struct sja1105_private *priv)
1816 {
1817         int rc = 0, i;
1818
1819         /* The credit based shapers are only allocated if
1820          * CONFIG_NET_SCH_CBS is enabled.
1821          */
1822         if (!priv->cbs)
1823                 return 0;
1824
1825         for (i = 0; i < priv->info->num_cbs_shapers; i++) {
1826                 struct sja1105_cbs_entry *cbs = &priv->cbs[i];
1827
1828                 if (!cbs->idle_slope && !cbs->send_slope)
1829                         continue;
1830
1831                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_CBS, i, cbs,
1832                                                   true);
1833                 if (rc)
1834                         break;
1835         }
1836
1837         return rc;
1838 }
1839
1840 static const char * const sja1105_reset_reasons[] = {
1841         [SJA1105_VLAN_FILTERING] = "VLAN filtering",
1842         [SJA1105_RX_HWTSTAMPING] = "RX timestamping",
1843         [SJA1105_AGEING_TIME] = "Ageing time",
1844         [SJA1105_SCHEDULING] = "Time-aware scheduling",
1845         [SJA1105_BEST_EFFORT_POLICING] = "Best-effort policing",
1846         [SJA1105_VIRTUAL_LINKS] = "Virtual links",
1847 };
1848
1849 /* For situations where we need to change a setting at runtime that is only
1850  * available through the static configuration, resetting the switch in order
1851  * to upload the new static config is unavoidable. Back up the settings we
1852  * modify at runtime (currently only MAC) and restore them after uploading,
1853  * such that this operation is relatively seamless.
1854  */
1855 int sja1105_static_config_reload(struct sja1105_private *priv,
1856                                  enum sja1105_reset_reason reason)
1857 {
1858         struct ptp_system_timestamp ptp_sts_before;
1859         struct ptp_system_timestamp ptp_sts_after;
1860         int speed_mbps[SJA1105_MAX_NUM_PORTS];
1861         u16 bmcr[SJA1105_MAX_NUM_PORTS] = {0};
1862         struct sja1105_mac_config_entry *mac;
1863         struct dsa_switch *ds = priv->ds;
1864         s64 t1, t2, t3, t4;
1865         s64 t12, t34;
1866         int rc, i;
1867         s64 now;
1868
1869         mutex_lock(&priv->mgmt_lock);
1870
1871         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1872
1873         /* Back up the dynamic link speed changed by sja1105_adjust_port_config
1874          * in order to temporarily restore it to SJA1105_SPEED_AUTO - which the
1875          * switch wants to see in the static config in order to allow us to
1876          * change it through the dynamic interface later.
1877          */
1878         for (i = 0; i < ds->num_ports; i++) {
1879                 u32 reg_addr = mdiobus_c45_addr(MDIO_MMD_VEND2, MDIO_CTRL1);
1880
1881                 speed_mbps[i] = sja1105_port_speed_to_ethtool(priv,
1882                                                               mac[i].speed);
1883                 mac[i].speed = priv->info->port_speed[SJA1105_SPEED_AUTO];
1884
1885                 if (priv->xpcs[i])
1886                         bmcr[i] = mdiobus_read(priv->mdio_pcs, i, reg_addr);
1887         }
1888
1889         /* No PTP operations can run right now */
1890         mutex_lock(&priv->ptp_data.lock);
1891
1892         rc = __sja1105_ptp_gettimex(ds, &now, &ptp_sts_before);
1893         if (rc < 0) {
1894                 mutex_unlock(&priv->ptp_data.lock);
1895                 goto out;
1896         }
1897
1898         /* Reset switch and send updated static configuration */
1899         rc = sja1105_static_config_upload(priv);
1900         if (rc < 0) {
1901                 mutex_unlock(&priv->ptp_data.lock);
1902                 goto out;
1903         }
1904
1905         rc = __sja1105_ptp_settime(ds, 0, &ptp_sts_after);
1906         if (rc < 0) {
1907                 mutex_unlock(&priv->ptp_data.lock);
1908                 goto out;
1909         }
1910
1911         t1 = timespec64_to_ns(&ptp_sts_before.pre_ts);
1912         t2 = timespec64_to_ns(&ptp_sts_before.post_ts);
1913         t3 = timespec64_to_ns(&ptp_sts_after.pre_ts);
1914         t4 = timespec64_to_ns(&ptp_sts_after.post_ts);
1915         /* Mid point, corresponds to pre-reset PTPCLKVAL */
1916         t12 = t1 + (t2 - t1) / 2;
1917         /* Mid point, corresponds to post-reset PTPCLKVAL, aka 0 */
1918         t34 = t3 + (t4 - t3) / 2;
1919         /* Advance PTPCLKVAL by the time it took since its readout */
1920         now += (t34 - t12);
1921
1922         __sja1105_ptp_adjtime(ds, now);
1923
1924         mutex_unlock(&priv->ptp_data.lock);
1925
1926         dev_info(priv->ds->dev,
1927                  "Reset switch and programmed static config. Reason: %s\n",
1928                  sja1105_reset_reasons[reason]);
1929
1930         /* Configure the CGU (PLLs) for MII and RMII PHYs.
1931          * For these interfaces there is no dynamic configuration
1932          * needed, since PLLs have same settings at all speeds.
1933          */
1934         if (priv->info->clocking_setup) {
1935                 rc = priv->info->clocking_setup(priv);
1936                 if (rc < 0)
1937                         goto out;
1938         }
1939
1940         for (i = 0; i < ds->num_ports; i++) {
1941                 struct dw_xpcs *xpcs = priv->xpcs[i];
1942                 unsigned int mode;
1943
1944                 rc = sja1105_adjust_port_config(priv, i, speed_mbps[i]);
1945                 if (rc < 0)
1946                         goto out;
1947
1948                 if (!xpcs)
1949                         continue;
1950
1951                 if (bmcr[i] & BMCR_ANENABLE)
1952                         mode = MLO_AN_INBAND;
1953                 else if (priv->fixed_link[i])
1954                         mode = MLO_AN_FIXED;
1955                 else
1956                         mode = MLO_AN_PHY;
1957
1958                 rc = xpcs_do_config(xpcs, priv->phy_mode[i], mode);
1959                 if (rc < 0)
1960                         goto out;
1961
1962                 if (!phylink_autoneg_inband(mode)) {
1963                         int speed = SPEED_UNKNOWN;
1964
1965                         if (priv->phy_mode[i] == PHY_INTERFACE_MODE_2500BASEX)
1966                                 speed = SPEED_2500;
1967                         else if (bmcr[i] & BMCR_SPEED1000)
1968                                 speed = SPEED_1000;
1969                         else if (bmcr[i] & BMCR_SPEED100)
1970                                 speed = SPEED_100;
1971                         else
1972                                 speed = SPEED_10;
1973
1974                         xpcs_link_up(&xpcs->pcs, mode, priv->phy_mode[i],
1975                                      speed, DUPLEX_FULL);
1976                 }
1977         }
1978
1979         rc = sja1105_reload_cbs(priv);
1980         if (rc < 0)
1981                 goto out;
1982 out:
1983         mutex_unlock(&priv->mgmt_lock);
1984
1985         return rc;
1986 }
1987
1988 static int sja1105_pvid_apply(struct sja1105_private *priv, int port, u16 pvid)
1989 {
1990         struct sja1105_mac_config_entry *mac;
1991
1992         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1993
1994         mac[port].vlanid = pvid;
1995
1996         return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1997                                            &mac[port], true);
1998 }
1999
2000 static int sja1105_crosschip_bridge_join(struct dsa_switch *ds,
2001                                          int tree_index, int sw_index,
2002                                          int other_port, struct net_device *br)
2003 {
2004         struct dsa_switch *other_ds = dsa_switch_find(tree_index, sw_index);
2005         struct sja1105_private *other_priv = other_ds->priv;
2006         struct sja1105_private *priv = ds->priv;
2007         int port, rc;
2008
2009         if (other_ds->ops != &sja1105_switch_ops)
2010                 return 0;
2011
2012         for (port = 0; port < ds->num_ports; port++) {
2013                 if (!dsa_is_user_port(ds, port))
2014                         continue;
2015                 if (dsa_to_port(ds, port)->bridge_dev != br)
2016                         continue;
2017
2018                 rc = dsa_8021q_crosschip_bridge_join(priv->dsa_8021q_ctx,
2019                                                      port,
2020                                                      other_priv->dsa_8021q_ctx,
2021                                                      other_port);
2022                 if (rc)
2023                         return rc;
2024
2025                 rc = dsa_8021q_crosschip_bridge_join(other_priv->dsa_8021q_ctx,
2026                                                      other_port,
2027                                                      priv->dsa_8021q_ctx,
2028                                                      port);
2029                 if (rc)
2030                         return rc;
2031         }
2032
2033         return 0;
2034 }
2035
2036 static void sja1105_crosschip_bridge_leave(struct dsa_switch *ds,
2037                                            int tree_index, int sw_index,
2038                                            int other_port,
2039                                            struct net_device *br)
2040 {
2041         struct dsa_switch *other_ds = dsa_switch_find(tree_index, sw_index);
2042         struct sja1105_private *other_priv = other_ds->priv;
2043         struct sja1105_private *priv = ds->priv;
2044         int port;
2045
2046         if (other_ds->ops != &sja1105_switch_ops)
2047                 return;
2048
2049         for (port = 0; port < ds->num_ports; port++) {
2050                 if (!dsa_is_user_port(ds, port))
2051                         continue;
2052                 if (dsa_to_port(ds, port)->bridge_dev != br)
2053                         continue;
2054
2055                 dsa_8021q_crosschip_bridge_leave(priv->dsa_8021q_ctx, port,
2056                                                  other_priv->dsa_8021q_ctx,
2057                                                  other_port);
2058
2059                 dsa_8021q_crosschip_bridge_leave(other_priv->dsa_8021q_ctx,
2060                                                  other_port,
2061                                                  priv->dsa_8021q_ctx, port);
2062         }
2063 }
2064
2065 static int sja1105_setup_8021q_tagging(struct dsa_switch *ds, bool enabled)
2066 {
2067         struct sja1105_private *priv = ds->priv;
2068         int rc;
2069
2070         rc = dsa_8021q_setup(priv->dsa_8021q_ctx, enabled);
2071         if (rc)
2072                 return rc;
2073
2074         dev_info(ds->dev, "%s switch tagging\n",
2075                  enabled ? "Enabled" : "Disabled");
2076         return 0;
2077 }
2078
2079 static enum dsa_tag_protocol
2080 sja1105_get_tag_protocol(struct dsa_switch *ds, int port,
2081                          enum dsa_tag_protocol mp)
2082 {
2083         struct sja1105_private *priv = ds->priv;
2084
2085         return priv->info->tag_proto;
2086 }
2087
2088 static int sja1105_find_free_subvlan(u16 *subvlan_map, bool pvid)
2089 {
2090         int subvlan;
2091
2092         if (pvid)
2093                 return 0;
2094
2095         for (subvlan = 1; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2096                 if (subvlan_map[subvlan] == VLAN_N_VID)
2097                         return subvlan;
2098
2099         return -1;
2100 }
2101
2102 static int sja1105_find_subvlan(u16 *subvlan_map, u16 vid)
2103 {
2104         int subvlan;
2105
2106         for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2107                 if (subvlan_map[subvlan] == vid)
2108                         return subvlan;
2109
2110         return -1;
2111 }
2112
2113 static int sja1105_find_committed_subvlan(struct sja1105_private *priv,
2114                                           int port, u16 vid)
2115 {
2116         struct sja1105_port *sp = &priv->ports[port];
2117
2118         return sja1105_find_subvlan(sp->subvlan_map, vid);
2119 }
2120
2121 static void sja1105_init_subvlan_map(u16 *subvlan_map)
2122 {
2123         int subvlan;
2124
2125         for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2126                 subvlan_map[subvlan] = VLAN_N_VID;
2127 }
2128
2129 static void sja1105_commit_subvlan_map(struct sja1105_private *priv, int port,
2130                                        u16 *subvlan_map)
2131 {
2132         struct sja1105_port *sp = &priv->ports[port];
2133         int subvlan;
2134
2135         for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2136                 sp->subvlan_map[subvlan] = subvlan_map[subvlan];
2137 }
2138
2139 static int sja1105_is_vlan_configured(struct sja1105_private *priv, u16 vid)
2140 {
2141         struct sja1105_vlan_lookup_entry *vlan;
2142         int count, i;
2143
2144         vlan = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entries;
2145         count = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entry_count;
2146
2147         for (i = 0; i < count; i++)
2148                 if (vlan[i].vlanid == vid)
2149                         return i;
2150
2151         /* Return an invalid entry index if not found */
2152         return -1;
2153 }
2154
2155 static int
2156 sja1105_find_retagging_entry(struct sja1105_retagging_entry *retagging,
2157                              int count, int from_port, u16 from_vid,
2158                              u16 to_vid)
2159 {
2160         int i;
2161
2162         for (i = 0; i < count; i++)
2163                 if (retagging[i].ing_port == BIT(from_port) &&
2164                     retagging[i].vlan_ing == from_vid &&
2165                     retagging[i].vlan_egr == to_vid)
2166                         return i;
2167
2168         /* Return an invalid entry index if not found */
2169         return -1;
2170 }
2171
2172 static int sja1105_commit_vlans(struct sja1105_private *priv,
2173                                 struct sja1105_vlan_lookup_entry *new_vlan,
2174                                 struct sja1105_retagging_entry *new_retagging,
2175                                 int num_retagging)
2176 {
2177         struct sja1105_retagging_entry *retagging;
2178         struct sja1105_vlan_lookup_entry *vlan;
2179         struct sja1105_table *table;
2180         int num_vlans = 0;
2181         int rc, i, k = 0;
2182
2183         /* VLAN table */
2184         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
2185         vlan = table->entries;
2186
2187         for (i = 0; i < VLAN_N_VID; i++) {
2188                 int match = sja1105_is_vlan_configured(priv, i);
2189
2190                 if (new_vlan[i].vlanid != VLAN_N_VID)
2191                         num_vlans++;
2192
2193                 if (new_vlan[i].vlanid == VLAN_N_VID && match >= 0) {
2194                         /* Was there before, no longer is. Delete */
2195                         dev_dbg(priv->ds->dev, "Deleting VLAN %d\n", i);
2196                         rc = sja1105_dynamic_config_write(priv,
2197                                                           BLK_IDX_VLAN_LOOKUP,
2198                                                           i, &vlan[match], false);
2199                         if (rc < 0)
2200                                 return rc;
2201                 } else if (new_vlan[i].vlanid != VLAN_N_VID) {
2202                         /* Nothing changed, don't do anything */
2203                         if (match >= 0 &&
2204                             vlan[match].vlanid == new_vlan[i].vlanid &&
2205                             vlan[match].tag_port == new_vlan[i].tag_port &&
2206                             vlan[match].vlan_bc == new_vlan[i].vlan_bc &&
2207                             vlan[match].vmemb_port == new_vlan[i].vmemb_port)
2208                                 continue;
2209                         /* Update entry */
2210                         dev_dbg(priv->ds->dev, "Updating VLAN %d\n", i);
2211                         rc = sja1105_dynamic_config_write(priv,
2212                                                           BLK_IDX_VLAN_LOOKUP,
2213                                                           i, &new_vlan[i],
2214                                                           true);
2215                         if (rc < 0)
2216                                 return rc;
2217                 }
2218         }
2219
2220         if (table->entry_count)
2221                 kfree(table->entries);
2222
2223         table->entries = kcalloc(num_vlans, table->ops->unpacked_entry_size,
2224                                  GFP_KERNEL);
2225         if (!table->entries)
2226                 return -ENOMEM;
2227
2228         table->entry_count = num_vlans;
2229         vlan = table->entries;
2230
2231         for (i = 0; i < VLAN_N_VID; i++) {
2232                 if (new_vlan[i].vlanid == VLAN_N_VID)
2233                         continue;
2234                 vlan[k++] = new_vlan[i];
2235         }
2236
2237         /* VLAN Retagging Table */
2238         table = &priv->static_config.tables[BLK_IDX_RETAGGING];
2239         retagging = table->entries;
2240
2241         for (i = 0; i < table->entry_count; i++) {
2242                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_RETAGGING,
2243                                                   i, &retagging[i], false);
2244                 if (rc)
2245                         return rc;
2246         }
2247
2248         if (table->entry_count)
2249                 kfree(table->entries);
2250
2251         table->entries = kcalloc(num_retagging, table->ops->unpacked_entry_size,
2252                                  GFP_KERNEL);
2253         if (!table->entries)
2254                 return -ENOMEM;
2255
2256         table->entry_count = num_retagging;
2257         retagging = table->entries;
2258
2259         for (i = 0; i < num_retagging; i++) {
2260                 retagging[i] = new_retagging[i];
2261
2262                 /* Update entry */
2263                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_RETAGGING,
2264                                                   i, &retagging[i], true);
2265                 if (rc < 0)
2266                         return rc;
2267         }
2268
2269         return 0;
2270 }
2271
2272 struct sja1105_crosschip_vlan {
2273         struct list_head list;
2274         u16 vid;
2275         bool untagged;
2276         int port;
2277         int other_port;
2278         struct dsa_8021q_context *other_ctx;
2279 };
2280
2281 struct sja1105_crosschip_switch {
2282         struct list_head list;
2283         struct dsa_8021q_context *other_ctx;
2284 };
2285
2286 static int sja1105_commit_pvid(struct sja1105_private *priv)
2287 {
2288         struct sja1105_bridge_vlan *v;
2289         struct list_head *vlan_list;
2290         int rc = 0;
2291
2292         if (priv->vlan_state == SJA1105_VLAN_FILTERING_FULL)
2293                 vlan_list = &priv->bridge_vlans;
2294         else
2295                 vlan_list = &priv->dsa_8021q_vlans;
2296
2297         list_for_each_entry(v, vlan_list, list) {
2298                 if (v->pvid) {
2299                         rc = sja1105_pvid_apply(priv, v->port, v->vid);
2300                         if (rc)
2301                                 break;
2302                 }
2303         }
2304
2305         return rc;
2306 }
2307
2308 static int
2309 sja1105_build_bridge_vlans(struct sja1105_private *priv,
2310                            struct sja1105_vlan_lookup_entry *new_vlan)
2311 {
2312         struct sja1105_bridge_vlan *v;
2313
2314         if (priv->vlan_state == SJA1105_VLAN_UNAWARE)
2315                 return 0;
2316
2317         list_for_each_entry(v, &priv->bridge_vlans, list) {
2318                 int match = v->vid;
2319
2320                 new_vlan[match].vlanid = v->vid;
2321                 new_vlan[match].vmemb_port |= BIT(v->port);
2322                 new_vlan[match].vlan_bc |= BIT(v->port);
2323                 if (!v->untagged)
2324                         new_vlan[match].tag_port |= BIT(v->port);
2325                 new_vlan[match].type_entry = SJA1110_VLAN_D_TAG;
2326         }
2327
2328         return 0;
2329 }
2330
2331 static int
2332 sja1105_build_dsa_8021q_vlans(struct sja1105_private *priv,
2333                               struct sja1105_vlan_lookup_entry *new_vlan)
2334 {
2335         struct sja1105_bridge_vlan *v;
2336
2337         if (priv->vlan_state == SJA1105_VLAN_FILTERING_FULL)
2338                 return 0;
2339
2340         list_for_each_entry(v, &priv->dsa_8021q_vlans, list) {
2341                 int match = v->vid;
2342
2343                 new_vlan[match].vlanid = v->vid;
2344                 new_vlan[match].vmemb_port |= BIT(v->port);
2345                 new_vlan[match].vlan_bc |= BIT(v->port);
2346                 if (!v->untagged)
2347                         new_vlan[match].tag_port |= BIT(v->port);
2348                 new_vlan[match].type_entry = SJA1110_VLAN_D_TAG;
2349         }
2350
2351         return 0;
2352 }
2353
2354 static int sja1105_build_subvlans(struct sja1105_private *priv,
2355                                   u16 subvlan_map[][DSA_8021Q_N_SUBVLAN],
2356                                   struct sja1105_vlan_lookup_entry *new_vlan,
2357                                   struct sja1105_retagging_entry *new_retagging,
2358                                   int *num_retagging)
2359 {
2360         struct sja1105_bridge_vlan *v;
2361         int k = *num_retagging;
2362
2363         if (priv->vlan_state != SJA1105_VLAN_BEST_EFFORT)
2364                 return 0;
2365
2366         list_for_each_entry(v, &priv->bridge_vlans, list) {
2367                 int upstream = dsa_upstream_port(priv->ds, v->port);
2368                 int match, subvlan;
2369                 u16 rx_vid;
2370
2371                 /* Only sub-VLANs on user ports need to be applied.
2372                  * Bridge VLANs also include VLANs added automatically
2373                  * by DSA on the CPU port.
2374                  */
2375                 if (!dsa_is_user_port(priv->ds, v->port))
2376                         continue;
2377
2378                 subvlan = sja1105_find_subvlan(subvlan_map[v->port],
2379                                                v->vid);
2380                 if (subvlan < 0) {
2381                         subvlan = sja1105_find_free_subvlan(subvlan_map[v->port],
2382                                                             v->pvid);
2383                         if (subvlan < 0) {
2384                                 dev_err(priv->ds->dev, "No more free subvlans\n");
2385                                 return -ENOSPC;
2386                         }
2387                 }
2388
2389                 rx_vid = dsa_8021q_rx_vid_subvlan(priv->ds, v->port, subvlan);
2390
2391                 /* @v->vid on @v->port needs to be retagged to @rx_vid
2392                  * on @upstream. Assume @v->vid on @v->port and on
2393                  * @upstream was already configured by the previous
2394                  * iteration over bridge_vlans.
2395                  */
2396                 match = rx_vid;
2397                 new_vlan[match].vlanid = rx_vid;
2398                 new_vlan[match].vmemb_port |= BIT(v->port);
2399                 new_vlan[match].vmemb_port |= BIT(upstream);
2400                 new_vlan[match].vlan_bc |= BIT(v->port);
2401                 new_vlan[match].vlan_bc |= BIT(upstream);
2402                 /* The "untagged" flag is set the same as for the
2403                  * original VLAN
2404                  */
2405                 if (!v->untagged)
2406                         new_vlan[match].tag_port |= BIT(v->port);
2407                 /* But it's always tagged towards the CPU */
2408                 new_vlan[match].tag_port |= BIT(upstream);
2409                 new_vlan[match].type_entry = SJA1110_VLAN_D_TAG;
2410
2411                 /* The Retagging Table generates packet *clones* with
2412                  * the new VLAN. This is a very odd hardware quirk
2413                  * which we need to suppress by dropping the original
2414                  * packet.
2415                  * Deny egress of the original VLAN towards the CPU
2416                  * port. This will force the switch to drop it, and
2417                  * we'll see only the retagged packets.
2418                  */
2419                 match = v->vid;
2420                 new_vlan[match].vlan_bc &= ~BIT(upstream);
2421
2422                 /* And the retagging itself */
2423                 new_retagging[k].vlan_ing = v->vid;
2424                 new_retagging[k].vlan_egr = rx_vid;
2425                 new_retagging[k].ing_port = BIT(v->port);
2426                 new_retagging[k].egr_port = BIT(upstream);
2427                 if (k++ == SJA1105_MAX_RETAGGING_COUNT) {
2428                         dev_err(priv->ds->dev, "No more retagging rules\n");
2429                         return -ENOSPC;
2430                 }
2431
2432                 subvlan_map[v->port][subvlan] = v->vid;
2433         }
2434
2435         *num_retagging = k;
2436
2437         return 0;
2438 }
2439
2440 /* Sadly, in crosschip scenarios where the CPU port is also the link to another
2441  * switch, we should retag backwards (the dsa_8021q vid to the original vid) on
2442  * the CPU port of neighbour switches.
2443  */
2444 static int
2445 sja1105_build_crosschip_subvlans(struct sja1105_private *priv,
2446                                  struct sja1105_vlan_lookup_entry *new_vlan,
2447                                  struct sja1105_retagging_entry *new_retagging,
2448                                  int *num_retagging)
2449 {
2450         struct sja1105_crosschip_vlan *tmp, *pos;
2451         struct dsa_8021q_crosschip_link *c;
2452         struct sja1105_bridge_vlan *v, *w;
2453         struct list_head crosschip_vlans;
2454         int k = *num_retagging;
2455         int rc = 0;
2456
2457         if (priv->vlan_state != SJA1105_VLAN_BEST_EFFORT)
2458                 return 0;
2459
2460         INIT_LIST_HEAD(&crosschip_vlans);
2461
2462         list_for_each_entry(c, &priv->dsa_8021q_ctx->crosschip_links, list) {
2463                 struct sja1105_private *other_priv = c->other_ctx->ds->priv;
2464
2465                 if (other_priv->vlan_state == SJA1105_VLAN_FILTERING_FULL)
2466                         continue;
2467
2468                 /* Crosschip links are also added to the CPU ports.
2469                  * Ignore those.
2470                  */
2471                 if (!dsa_is_user_port(priv->ds, c->port))
2472                         continue;
2473                 if (!dsa_is_user_port(c->other_ctx->ds, c->other_port))
2474                         continue;
2475
2476                 /* Search for VLANs on the remote port */
2477                 list_for_each_entry(v, &other_priv->bridge_vlans, list) {
2478                         bool already_added = false;
2479                         bool we_have_it = false;
2480
2481                         if (v->port != c->other_port)
2482                                 continue;
2483
2484                         /* If @v is a pvid on @other_ds, it does not need
2485                          * re-retagging, because its SVL field is 0 and we
2486                          * already allow that, via the dsa_8021q crosschip
2487                          * links.
2488                          */
2489                         if (v->pvid)
2490                                 continue;
2491
2492                         /* Search for the VLAN on our local port */
2493                         list_for_each_entry(w, &priv->bridge_vlans, list) {
2494                                 if (w->port == c->port && w->vid == v->vid) {
2495                                         we_have_it = true;
2496                                         break;
2497                                 }
2498                         }
2499
2500                         if (!we_have_it)
2501                                 continue;
2502
2503                         list_for_each_entry(tmp, &crosschip_vlans, list) {
2504                                 if (tmp->vid == v->vid &&
2505                                     tmp->untagged == v->untagged &&
2506                                     tmp->port == c->port &&
2507                                     tmp->other_port == v->port &&
2508                                     tmp->other_ctx == c->other_ctx) {
2509                                         already_added = true;
2510                                         break;
2511                                 }
2512                         }
2513
2514                         if (already_added)
2515                                 continue;
2516
2517                         tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
2518                         if (!tmp) {
2519                                 dev_err(priv->ds->dev, "Failed to allocate memory\n");
2520                                 rc = -ENOMEM;
2521                                 goto out;
2522                         }
2523                         tmp->vid = v->vid;
2524                         tmp->port = c->port;
2525                         tmp->other_port = v->port;
2526                         tmp->other_ctx = c->other_ctx;
2527                         tmp->untagged = v->untagged;
2528                         list_add(&tmp->list, &crosschip_vlans);
2529                 }
2530         }
2531
2532         list_for_each_entry(tmp, &crosschip_vlans, list) {
2533                 struct sja1105_private *other_priv = tmp->other_ctx->ds->priv;
2534                 int upstream = dsa_upstream_port(priv->ds, tmp->port);
2535                 int match, subvlan;
2536                 u16 rx_vid;
2537
2538                 subvlan = sja1105_find_committed_subvlan(other_priv,
2539                                                          tmp->other_port,
2540                                                          tmp->vid);
2541                 /* If this happens, it's a bug. The neighbour switch does not
2542                  * have a subvlan for tmp->vid on tmp->other_port, but it
2543                  * should, since we already checked for its vlan_state.
2544                  */
2545                 if (WARN_ON(subvlan < 0)) {
2546                         rc = -EINVAL;
2547                         goto out;
2548                 }
2549
2550                 rx_vid = dsa_8021q_rx_vid_subvlan(tmp->other_ctx->ds,
2551                                                   tmp->other_port,
2552                                                   subvlan);
2553
2554                 /* The @rx_vid retagged from @tmp->vid on
2555                  * {@tmp->other_ds, @tmp->other_port} needs to be
2556                  * re-retagged to @tmp->vid on the way back to us.
2557                  *
2558                  * Assume the original @tmp->vid is already configured
2559                  * on this local switch, otherwise we wouldn't be
2560                  * retagging its subvlan on the other switch in the
2561                  * first place. We just need to add a reverse retagging
2562                  * rule for @rx_vid and install @rx_vid on our ports.
2563                  */
2564                 match = rx_vid;
2565                 new_vlan[match].vlanid = rx_vid;
2566                 new_vlan[match].vmemb_port |= BIT(tmp->port);
2567                 new_vlan[match].vmemb_port |= BIT(upstream);
2568                 /* The "untagged" flag is set the same as for the
2569                  * original VLAN. And towards the CPU, it doesn't
2570                  * really matter, because @rx_vid will only receive
2571                  * traffic on that port. For consistency with other dsa_8021q
2572                  * VLANs, we'll keep the CPU port tagged.
2573                  */
2574                 if (!tmp->untagged)
2575                         new_vlan[match].tag_port |= BIT(tmp->port);
2576                 new_vlan[match].tag_port |= BIT(upstream);
2577                 new_vlan[match].type_entry = SJA1110_VLAN_D_TAG;
2578                 /* Deny egress of @rx_vid towards our front-panel port.
2579                  * This will force the switch to drop it, and we'll see
2580                  * only the re-retagged packets (having the original,
2581                  * pre-initial-retagging, VLAN @tmp->vid).
2582                  */
2583                 new_vlan[match].vlan_bc &= ~BIT(tmp->port);
2584
2585                 /* On reverse retagging, the same ingress VLAN goes to multiple
2586                  * ports. So we have an opportunity to create composite rules
2587                  * to not waste the limited space in the retagging table.
2588                  */
2589                 k = sja1105_find_retagging_entry(new_retagging, *num_retagging,
2590                                                  upstream, rx_vid, tmp->vid);
2591                 if (k < 0) {
2592                         if (*num_retagging == SJA1105_MAX_RETAGGING_COUNT) {
2593                                 dev_err(priv->ds->dev, "No more retagging rules\n");
2594                                 rc = -ENOSPC;
2595                                 goto out;
2596                         }
2597                         k = (*num_retagging)++;
2598                 }
2599                 /* And the retagging itself */
2600                 new_retagging[k].vlan_ing = rx_vid;
2601                 new_retagging[k].vlan_egr = tmp->vid;
2602                 new_retagging[k].ing_port = BIT(upstream);
2603                 new_retagging[k].egr_port |= BIT(tmp->port);
2604         }
2605
2606 out:
2607         list_for_each_entry_safe(tmp, pos, &crosschip_vlans, list) {
2608                 list_del(&tmp->list);
2609                 kfree(tmp);
2610         }
2611
2612         return rc;
2613 }
2614
2615 static int sja1105_build_vlan_table(struct sja1105_private *priv, bool notify);
2616
2617 static int sja1105_notify_crosschip_switches(struct sja1105_private *priv)
2618 {
2619         struct sja1105_crosschip_switch *s, *pos;
2620         struct list_head crosschip_switches;
2621         struct dsa_8021q_crosschip_link *c;
2622         int rc = 0;
2623
2624         INIT_LIST_HEAD(&crosschip_switches);
2625
2626         list_for_each_entry(c, &priv->dsa_8021q_ctx->crosschip_links, list) {
2627                 bool already_added = false;
2628
2629                 list_for_each_entry(s, &crosschip_switches, list) {
2630                         if (s->other_ctx == c->other_ctx) {
2631                                 already_added = true;
2632                                 break;
2633                         }
2634                 }
2635
2636                 if (already_added)
2637                         continue;
2638
2639                 s = kzalloc(sizeof(*s), GFP_KERNEL);
2640                 if (!s) {
2641                         dev_err(priv->ds->dev, "Failed to allocate memory\n");
2642                         rc = -ENOMEM;
2643                         goto out;
2644                 }
2645                 s->other_ctx = c->other_ctx;
2646                 list_add(&s->list, &crosschip_switches);
2647         }
2648
2649         list_for_each_entry(s, &crosschip_switches, list) {
2650                 struct sja1105_private *other_priv = s->other_ctx->ds->priv;
2651
2652                 rc = sja1105_build_vlan_table(other_priv, false);
2653                 if (rc)
2654                         goto out;
2655         }
2656
2657 out:
2658         list_for_each_entry_safe(s, pos, &crosschip_switches, list) {
2659                 list_del(&s->list);
2660                 kfree(s);
2661         }
2662
2663         return rc;
2664 }
2665
2666 static int sja1105_build_vlan_table(struct sja1105_private *priv, bool notify)
2667 {
2668         u16 subvlan_map[SJA1105_MAX_NUM_PORTS][DSA_8021Q_N_SUBVLAN];
2669         struct sja1105_retagging_entry *new_retagging;
2670         struct sja1105_vlan_lookup_entry *new_vlan;
2671         struct sja1105_table *table;
2672         int i, num_retagging = 0;
2673         int rc;
2674
2675         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
2676         new_vlan = kcalloc(VLAN_N_VID,
2677                            table->ops->unpacked_entry_size, GFP_KERNEL);
2678         if (!new_vlan)
2679                 return -ENOMEM;
2680
2681         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
2682         new_retagging = kcalloc(SJA1105_MAX_RETAGGING_COUNT,
2683                                 table->ops->unpacked_entry_size, GFP_KERNEL);
2684         if (!new_retagging) {
2685                 kfree(new_vlan);
2686                 return -ENOMEM;
2687         }
2688
2689         for (i = 0; i < VLAN_N_VID; i++)
2690                 new_vlan[i].vlanid = VLAN_N_VID;
2691
2692         for (i = 0; i < SJA1105_MAX_RETAGGING_COUNT; i++)
2693                 new_retagging[i].vlan_ing = VLAN_N_VID;
2694
2695         for (i = 0; i < priv->ds->num_ports; i++)
2696                 sja1105_init_subvlan_map(subvlan_map[i]);
2697
2698         /* Bridge VLANs */
2699         rc = sja1105_build_bridge_vlans(priv, new_vlan);
2700         if (rc)
2701                 goto out;
2702
2703         /* VLANs necessary for dsa_8021q operation, given to us by tag_8021q.c:
2704          * - RX VLANs
2705          * - TX VLANs
2706          * - Crosschip links
2707          */
2708         rc = sja1105_build_dsa_8021q_vlans(priv, new_vlan);
2709         if (rc)
2710                 goto out;
2711
2712         /* Private VLANs necessary for dsa_8021q operation, which we need to
2713          * determine on our own:
2714          * - Sub-VLANs
2715          * - Sub-VLANs of crosschip switches
2716          */
2717         rc = sja1105_build_subvlans(priv, subvlan_map, new_vlan, new_retagging,
2718                                     &num_retagging);
2719         if (rc)
2720                 goto out;
2721
2722         rc = sja1105_build_crosschip_subvlans(priv, new_vlan, new_retagging,
2723                                               &num_retagging);
2724         if (rc)
2725                 goto out;
2726
2727         rc = sja1105_commit_vlans(priv, new_vlan, new_retagging, num_retagging);
2728         if (rc)
2729                 goto out;
2730
2731         rc = sja1105_commit_pvid(priv);
2732         if (rc)
2733                 goto out;
2734
2735         for (i = 0; i < priv->ds->num_ports; i++)
2736                 sja1105_commit_subvlan_map(priv, i, subvlan_map[i]);
2737
2738         if (notify) {
2739                 rc = sja1105_notify_crosschip_switches(priv);
2740                 if (rc)
2741                         goto out;
2742         }
2743
2744 out:
2745         kfree(new_vlan);
2746         kfree(new_retagging);
2747
2748         return rc;
2749 }
2750
2751 /* The TPID setting belongs to the General Parameters table,
2752  * which can only be partially reconfigured at runtime (and not the TPID).
2753  * So a switch reset is required.
2754  */
2755 int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,
2756                            struct netlink_ext_ack *extack)
2757 {
2758         struct sja1105_l2_lookup_params_entry *l2_lookup_params;
2759         struct sja1105_general_params_entry *general_params;
2760         struct sja1105_private *priv = ds->priv;
2761         enum sja1105_vlan_state state;
2762         struct sja1105_table *table;
2763         struct sja1105_rule *rule;
2764         bool want_tagging;
2765         u16 tpid, tpid2;
2766         int rc;
2767
2768         list_for_each_entry(rule, &priv->flow_block.rules, list) {
2769                 if (rule->type == SJA1105_RULE_VL) {
2770                         NL_SET_ERR_MSG_MOD(extack,
2771                                            "Cannot change VLAN filtering with active VL rules");
2772                         return -EBUSY;
2773                 }
2774         }
2775
2776         if (enabled) {
2777                 /* Enable VLAN filtering. */
2778                 tpid  = ETH_P_8021Q;
2779                 tpid2 = ETH_P_8021AD;
2780         } else {
2781                 /* Disable VLAN filtering. */
2782                 tpid  = ETH_P_SJA1105;
2783                 tpid2 = ETH_P_SJA1105;
2784         }
2785
2786         for (port = 0; port < ds->num_ports; port++) {
2787                 struct sja1105_port *sp = &priv->ports[port];
2788
2789                 if (enabled)
2790                         sp->xmit_tpid = priv->info->qinq_tpid;
2791                 else
2792                         sp->xmit_tpid = ETH_P_SJA1105;
2793         }
2794
2795         if (!enabled)
2796                 state = SJA1105_VLAN_UNAWARE;
2797         else if (priv->best_effort_vlan_filtering)
2798                 state = SJA1105_VLAN_BEST_EFFORT;
2799         else
2800                 state = SJA1105_VLAN_FILTERING_FULL;
2801
2802         if (priv->vlan_state == state)
2803                 return 0;
2804
2805         priv->vlan_state = state;
2806         want_tagging = (state == SJA1105_VLAN_UNAWARE ||
2807                         state == SJA1105_VLAN_BEST_EFFORT);
2808
2809         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
2810         general_params = table->entries;
2811         /* EtherType used to identify inner tagged (C-tag) VLAN traffic */
2812         general_params->tpid = tpid;
2813         /* EtherType used to identify outer tagged (S-tag) VLAN traffic */
2814         general_params->tpid2 = tpid2;
2815         /* When VLAN filtering is on, we need to at least be able to
2816          * decode management traffic through the "backup plan".
2817          */
2818         general_params->incl_srcpt1 = enabled;
2819         general_params->incl_srcpt0 = enabled;
2820
2821         want_tagging = priv->best_effort_vlan_filtering || !enabled;
2822
2823         /* VLAN filtering => independent VLAN learning.
2824          * No VLAN filtering (or best effort) => shared VLAN learning.
2825          *
2826          * In shared VLAN learning mode, untagged traffic still gets
2827          * pvid-tagged, and the FDB table gets populated with entries
2828          * containing the "real" (pvid or from VLAN tag) VLAN ID.
2829          * However the switch performs a masked L2 lookup in the FDB,
2830          * effectively only looking up a frame's DMAC (and not VID) for the
2831          * forwarding decision.
2832          *
2833          * This is extremely convenient for us, because in modes with
2834          * vlan_filtering=0, dsa_8021q actually installs unique pvid's into
2835          * each front panel port. This is good for identification but breaks
2836          * learning badly - the VID of the learnt FDB entry is unique, aka
2837          * no frames coming from any other port are going to have it. So
2838          * for forwarding purposes, this is as though learning was broken
2839          * (all frames get flooded).
2840          */
2841         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
2842         l2_lookup_params = table->entries;
2843         l2_lookup_params->shared_learn = want_tagging;
2844
2845         sja1105_frame_memory_partitioning(priv);
2846
2847         rc = sja1105_build_vlan_table(priv, false);
2848         if (rc)
2849                 return rc;
2850
2851         rc = sja1105_static_config_reload(priv, SJA1105_VLAN_FILTERING);
2852         if (rc)
2853                 NL_SET_ERR_MSG_MOD(extack, "Failed to change VLAN Ethertype");
2854
2855         /* Switch port identification based on 802.1Q is only passable
2856          * if we are not under a vlan_filtering bridge. So make sure
2857          * the two configurations are mutually exclusive (of course, the
2858          * user may know better, i.e. best_effort_vlan_filtering).
2859          */
2860         return sja1105_setup_8021q_tagging(ds, want_tagging);
2861 }
2862
2863 /* Returns number of VLANs added (0 or 1) on success,
2864  * or a negative error code.
2865  */
2866 static int sja1105_vlan_add_one(struct dsa_switch *ds, int port, u16 vid,
2867                                 u16 flags, struct list_head *vlan_list)
2868 {
2869         bool untagged = flags & BRIDGE_VLAN_INFO_UNTAGGED;
2870         bool pvid = flags & BRIDGE_VLAN_INFO_PVID;
2871         struct sja1105_bridge_vlan *v;
2872
2873         list_for_each_entry(v, vlan_list, list) {
2874                 if (v->port == port && v->vid == vid) {
2875                         /* Already added */
2876                         if (v->untagged == untagged && v->pvid == pvid)
2877                                 /* Nothing changed */
2878                                 return 0;
2879
2880                         /* It's the same VLAN, but some of the flags changed
2881                          * and the user did not bother to delete it first.
2882                          * Update it and trigger sja1105_build_vlan_table.
2883                          */
2884                         v->untagged = untagged;
2885                         v->pvid = pvid;
2886                         return 1;
2887                 }
2888         }
2889
2890         v = kzalloc(sizeof(*v), GFP_KERNEL);
2891         if (!v) {
2892                 dev_err(ds->dev, "Out of memory while storing VLAN\n");
2893                 return -ENOMEM;
2894         }
2895
2896         v->port = port;
2897         v->vid = vid;
2898         v->untagged = untagged;
2899         v->pvid = pvid;
2900         list_add(&v->list, vlan_list);
2901
2902         return 1;
2903 }
2904
2905 /* Returns number of VLANs deleted (0 or 1) */
2906 static int sja1105_vlan_del_one(struct dsa_switch *ds, int port, u16 vid,
2907                                 struct list_head *vlan_list)
2908 {
2909         struct sja1105_bridge_vlan *v, *n;
2910
2911         list_for_each_entry_safe(v, n, vlan_list, list) {
2912                 if (v->port == port && v->vid == vid) {
2913                         list_del(&v->list);
2914                         kfree(v);
2915                         return 1;
2916                 }
2917         }
2918
2919         return 0;
2920 }
2921
2922 static int sja1105_vlan_add(struct dsa_switch *ds, int port,
2923                             const struct switchdev_obj_port_vlan *vlan,
2924                             struct netlink_ext_ack *extack)
2925 {
2926         struct sja1105_private *priv = ds->priv;
2927         bool vlan_table_changed = false;
2928         int rc;
2929
2930         /* If the user wants best-effort VLAN filtering (aka vlan_filtering
2931          * bridge plus tagging), be sure to at least deny alterations to the
2932          * configuration done by dsa_8021q.
2933          */
2934         if (priv->vlan_state != SJA1105_VLAN_FILTERING_FULL &&
2935             vid_is_dsa_8021q(vlan->vid)) {
2936                 NL_SET_ERR_MSG_MOD(extack,
2937                                    "Range 1024-3071 reserved for dsa_8021q operation");
2938                 return -EBUSY;
2939         }
2940
2941         rc = sja1105_vlan_add_one(ds, port, vlan->vid, vlan->flags,
2942                                   &priv->bridge_vlans);
2943         if (rc < 0)
2944                 return rc;
2945         if (rc > 0)
2946                 vlan_table_changed = true;
2947
2948         if (!vlan_table_changed)
2949                 return 0;
2950
2951         return sja1105_build_vlan_table(priv, true);
2952 }
2953
2954 static int sja1105_vlan_del(struct dsa_switch *ds, int port,
2955                             const struct switchdev_obj_port_vlan *vlan)
2956 {
2957         struct sja1105_private *priv = ds->priv;
2958         bool vlan_table_changed = false;
2959         int rc;
2960
2961         rc = sja1105_vlan_del_one(ds, port, vlan->vid, &priv->bridge_vlans);
2962         if (rc > 0)
2963                 vlan_table_changed = true;
2964
2965         if (!vlan_table_changed)
2966                 return 0;
2967
2968         return sja1105_build_vlan_table(priv, true);
2969 }
2970
2971 static int sja1105_dsa_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid,
2972                                       u16 flags)
2973 {
2974         struct sja1105_private *priv = ds->priv;
2975         int rc;
2976
2977         rc = sja1105_vlan_add_one(ds, port, vid, flags, &priv->dsa_8021q_vlans);
2978         if (rc <= 0)
2979                 return rc;
2980
2981         return sja1105_build_vlan_table(priv, true);
2982 }
2983
2984 static int sja1105_dsa_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)
2985 {
2986         struct sja1105_private *priv = ds->priv;
2987         int rc;
2988
2989         rc = sja1105_vlan_del_one(ds, port, vid, &priv->dsa_8021q_vlans);
2990         if (!rc)
2991                 return 0;
2992
2993         return sja1105_build_vlan_table(priv, true);
2994 }
2995
2996 static const struct dsa_8021q_ops sja1105_dsa_8021q_ops = {
2997         .vlan_add       = sja1105_dsa_8021q_vlan_add,
2998         .vlan_del       = sja1105_dsa_8021q_vlan_del,
2999 };
3000
3001 /* The programming model for the SJA1105 switch is "all-at-once" via static
3002  * configuration tables. Some of these can be dynamically modified at runtime,
3003  * but not the xMII mode parameters table.
3004  * Furthermode, some PHYs may not have crystals for generating their clocks
3005  * (e.g. RMII). Instead, their 50MHz clock is supplied via the SJA1105 port's
3006  * ref_clk pin. So port clocking needs to be initialized early, before
3007  * connecting to PHYs is attempted, otherwise they won't respond through MDIO.
3008  * Setting correct PHY link speed does not matter now.
3009  * But dsa_slave_phy_setup is called later than sja1105_setup, so the PHY
3010  * bindings are not yet parsed by DSA core. We need to parse early so that we
3011  * can populate the xMII mode parameters table.
3012  */
3013 static int sja1105_setup(struct dsa_switch *ds)
3014 {
3015         struct sja1105_private *priv = ds->priv;
3016         int rc;
3017
3018         rc = sja1105_parse_dt(priv);
3019         if (rc < 0) {
3020                 dev_err(ds->dev, "Failed to parse DT: %d\n", rc);
3021                 return rc;
3022         }
3023
3024         /* Error out early if internal delays are required through DT
3025          * and we can't apply them.
3026          */
3027         rc = sja1105_parse_rgmii_delays(priv);
3028         if (rc < 0) {
3029                 dev_err(ds->dev, "RGMII delay not supported\n");
3030                 return rc;
3031         }
3032
3033         rc = sja1105_ptp_clock_register(ds);
3034         if (rc < 0) {
3035                 dev_err(ds->dev, "Failed to register PTP clock: %d\n", rc);
3036                 return rc;
3037         }
3038
3039         rc = sja1105_mdiobus_register(ds);
3040         if (rc < 0) {
3041                 dev_err(ds->dev, "Failed to register MDIO bus: %pe\n",
3042                         ERR_PTR(rc));
3043                 goto out_ptp_clock_unregister;
3044         }
3045
3046         if (priv->info->disable_microcontroller) {
3047                 rc = priv->info->disable_microcontroller(priv);
3048                 if (rc < 0) {
3049                         dev_err(ds->dev,
3050                                 "Failed to disable microcontroller: %pe\n",
3051                                 ERR_PTR(rc));
3052                         goto out_mdiobus_unregister;
3053                 }
3054         }
3055
3056         /* Create and send configuration down to device */
3057         rc = sja1105_static_config_load(priv);
3058         if (rc < 0) {
3059                 dev_err(ds->dev, "Failed to load static config: %d\n", rc);
3060                 goto out_mdiobus_unregister;
3061         }
3062
3063         /* Configure the CGU (PHY link modes and speeds) */
3064         if (priv->info->clocking_setup) {
3065                 rc = priv->info->clocking_setup(priv);
3066                 if (rc < 0) {
3067                         dev_err(ds->dev,
3068                                 "Failed to configure MII clocking: %pe\n",
3069                                 ERR_PTR(rc));
3070                         goto out_static_config_free;
3071                 }
3072         }
3073
3074         /* On SJA1105, VLAN filtering per se is always enabled in hardware.
3075          * The only thing we can do to disable it is lie about what the 802.1Q
3076          * EtherType is.
3077          * So it will still try to apply VLAN filtering, but all ingress
3078          * traffic (except frames received with EtherType of ETH_P_SJA1105)
3079          * will be internally tagged with a distorted VLAN header where the
3080          * TPID is ETH_P_SJA1105, and the VLAN ID is the port pvid.
3081          */
3082         ds->vlan_filtering_is_global = true;
3083
3084         /* Advertise the 8 egress queues */
3085         ds->num_tx_queues = SJA1105_NUM_TC;
3086
3087         ds->mtu_enforcement_ingress = true;
3088
3089         priv->best_effort_vlan_filtering = true;
3090
3091         rc = sja1105_devlink_setup(ds);
3092         if (rc < 0)
3093                 goto out_static_config_free;
3094
3095         /* The DSA/switchdev model brings up switch ports in standalone mode by
3096          * default, and that means vlan_filtering is 0 since they're not under
3097          * a bridge, so it's safe to set up switch tagging at this time.
3098          */
3099         rtnl_lock();
3100         rc = sja1105_setup_8021q_tagging(ds, true);
3101         rtnl_unlock();
3102         if (rc)
3103                 goto out_devlink_teardown;
3104
3105         return 0;
3106
3107 out_devlink_teardown:
3108         sja1105_devlink_teardown(ds);
3109 out_mdiobus_unregister:
3110         sja1105_mdiobus_unregister(ds);
3111 out_ptp_clock_unregister:
3112         sja1105_ptp_clock_unregister(ds);
3113 out_static_config_free:
3114         sja1105_static_config_free(&priv->static_config);
3115
3116         return rc;
3117 }
3118
3119 static void sja1105_teardown(struct dsa_switch *ds)
3120 {
3121         struct sja1105_private *priv = ds->priv;
3122         struct sja1105_bridge_vlan *v, *n;
3123         int port;
3124
3125         for (port = 0; port < ds->num_ports; port++) {
3126                 struct sja1105_port *sp = &priv->ports[port];
3127
3128                 if (!dsa_is_user_port(ds, port))
3129                         continue;
3130
3131                 if (sp->xmit_worker)
3132                         kthread_destroy_worker(sp->xmit_worker);
3133         }
3134
3135         sja1105_devlink_teardown(ds);
3136         sja1105_flower_teardown(ds);
3137         sja1105_tas_teardown(ds);
3138         sja1105_ptp_clock_unregister(ds);
3139         sja1105_static_config_free(&priv->static_config);
3140
3141         list_for_each_entry_safe(v, n, &priv->dsa_8021q_vlans, list) {
3142                 list_del(&v->list);
3143                 kfree(v);
3144         }
3145
3146         list_for_each_entry_safe(v, n, &priv->bridge_vlans, list) {
3147                 list_del(&v->list);
3148                 kfree(v);
3149         }
3150 }
3151
3152 static void sja1105_port_disable(struct dsa_switch *ds, int port)
3153 {
3154         struct sja1105_private *priv = ds->priv;
3155         struct sja1105_port *sp = &priv->ports[port];
3156
3157         if (!dsa_is_user_port(ds, port))
3158                 return;
3159
3160         kthread_cancel_work_sync(&sp->xmit_work);
3161         skb_queue_purge(&sp->xmit_queue);
3162 }
3163
3164 static int sja1105_mgmt_xmit(struct dsa_switch *ds, int port, int slot,
3165                              struct sk_buff *skb, bool takets)
3166 {
3167         struct sja1105_mgmt_entry mgmt_route = {0};
3168         struct sja1105_private *priv = ds->priv;
3169         struct ethhdr *hdr;
3170         int timeout = 10;
3171         int rc;
3172
3173         hdr = eth_hdr(skb);
3174
3175         mgmt_route.macaddr = ether_addr_to_u64(hdr->h_dest);
3176         mgmt_route.destports = BIT(port);
3177         mgmt_route.enfport = 1;
3178         mgmt_route.tsreg = 0;
3179         mgmt_route.takets = takets;
3180
3181         rc = sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
3182                                           slot, &mgmt_route, true);
3183         if (rc < 0) {
3184                 kfree_skb(skb);
3185                 return rc;
3186         }
3187
3188         /* Transfer skb to the host port. */
3189         dsa_enqueue_skb(skb, dsa_to_port(ds, port)->slave);
3190
3191         /* Wait until the switch has processed the frame */
3192         do {
3193                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_MGMT_ROUTE,
3194                                                  slot, &mgmt_route);
3195                 if (rc < 0) {
3196                         dev_err_ratelimited(priv->ds->dev,
3197                                             "failed to poll for mgmt route\n");
3198                         continue;
3199                 }
3200
3201                 /* UM10944: The ENFPORT flag of the respective entry is
3202                  * cleared when a match is found. The host can use this
3203                  * flag as an acknowledgment.
3204                  */
3205                 cpu_relax();
3206         } while (mgmt_route.enfport && --timeout);
3207
3208         if (!timeout) {
3209                 /* Clean up the management route so that a follow-up
3210                  * frame may not match on it by mistake.
3211                  * This is only hardware supported on P/Q/R/S - on E/T it is
3212                  * a no-op and we are silently discarding the -EOPNOTSUPP.
3213                  */
3214                 sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
3215                                              slot, &mgmt_route, false);
3216                 dev_err_ratelimited(priv->ds->dev, "xmit timed out\n");
3217         }
3218
3219         return NETDEV_TX_OK;
3220 }
3221
3222 #define work_to_port(work) \
3223                 container_of((work), struct sja1105_port, xmit_work)
3224 #define tagger_to_sja1105(t) \
3225                 container_of((t), struct sja1105_private, tagger_data)
3226
3227 /* Deferred work is unfortunately necessary because setting up the management
3228  * route cannot be done from atomit context (SPI transfer takes a sleepable
3229  * lock on the bus)
3230  */
3231 static void sja1105_port_deferred_xmit(struct kthread_work *work)
3232 {
3233         struct sja1105_port *sp = work_to_port(work);
3234         struct sja1105_tagger_data *tagger_data = sp->data;
3235         struct sja1105_private *priv = tagger_to_sja1105(tagger_data);
3236         int port = sp - priv->ports;
3237         struct sk_buff *skb;
3238
3239         while ((skb = skb_dequeue(&sp->xmit_queue)) != NULL) {
3240                 struct sk_buff *clone = SJA1105_SKB_CB(skb)->clone;
3241
3242                 mutex_lock(&priv->mgmt_lock);
3243
3244                 sja1105_mgmt_xmit(priv->ds, port, 0, skb, !!clone);
3245
3246                 /* The clone, if there, was made by dsa_skb_tx_timestamp */
3247                 if (clone)
3248                         sja1105_ptp_txtstamp_skb(priv->ds, port, clone);
3249
3250                 mutex_unlock(&priv->mgmt_lock);
3251         }
3252 }
3253
3254 /* The MAXAGE setting belongs to the L2 Forwarding Parameters table,
3255  * which cannot be reconfigured at runtime. So a switch reset is required.
3256  */
3257 static int sja1105_set_ageing_time(struct dsa_switch *ds,
3258                                    unsigned int ageing_time)
3259 {
3260         struct sja1105_l2_lookup_params_entry *l2_lookup_params;
3261         struct sja1105_private *priv = ds->priv;
3262         struct sja1105_table *table;
3263         unsigned int maxage;
3264
3265         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
3266         l2_lookup_params = table->entries;
3267
3268         maxage = SJA1105_AGEING_TIME_MS(ageing_time);
3269
3270         if (l2_lookup_params->maxage == maxage)
3271                 return 0;
3272
3273         l2_lookup_params->maxage = maxage;
3274
3275         return sja1105_static_config_reload(priv, SJA1105_AGEING_TIME);
3276 }
3277
3278 static int sja1105_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
3279 {
3280         struct sja1105_l2_policing_entry *policing;
3281         struct sja1105_private *priv = ds->priv;
3282
3283         new_mtu += VLAN_ETH_HLEN + ETH_FCS_LEN;
3284
3285         if (dsa_is_cpu_port(ds, port))
3286                 new_mtu += VLAN_HLEN;
3287
3288         policing = priv->static_config.tables[BLK_IDX_L2_POLICING].entries;
3289
3290         if (policing[port].maxlen == new_mtu)
3291                 return 0;
3292
3293         policing[port].maxlen = new_mtu;
3294
3295         return sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);
3296 }
3297
3298 static int sja1105_get_max_mtu(struct dsa_switch *ds, int port)
3299 {
3300         return 2043 - VLAN_ETH_HLEN - ETH_FCS_LEN;
3301 }
3302
3303 static int sja1105_port_setup_tc(struct dsa_switch *ds, int port,
3304                                  enum tc_setup_type type,
3305                                  void *type_data)
3306 {
3307         switch (type) {
3308         case TC_SETUP_QDISC_TAPRIO:
3309                 return sja1105_setup_tc_taprio(ds, port, type_data);
3310         case TC_SETUP_QDISC_CBS:
3311                 return sja1105_setup_tc_cbs(ds, port, type_data);
3312         default:
3313                 return -EOPNOTSUPP;
3314         }
3315 }
3316
3317 /* We have a single mirror (@to) port, but can configure ingress and egress
3318  * mirroring on all other (@from) ports.
3319  * We need to allow mirroring rules only as long as the @to port is always the
3320  * same, and we need to unset the @to port from mirr_port only when there is no
3321  * mirroring rule that references it.
3322  */
3323 static int sja1105_mirror_apply(struct sja1105_private *priv, int from, int to,
3324                                 bool ingress, bool enabled)
3325 {
3326         struct sja1105_general_params_entry *general_params;
3327         struct sja1105_mac_config_entry *mac;
3328         struct dsa_switch *ds = priv->ds;
3329         struct sja1105_table *table;
3330         bool already_enabled;
3331         u64 new_mirr_port;
3332         int rc;
3333
3334         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
3335         general_params = table->entries;
3336
3337         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
3338
3339         already_enabled = (general_params->mirr_port != ds->num_ports);
3340         if (already_enabled && enabled && general_params->mirr_port != to) {
3341                 dev_err(priv->ds->dev,
3342                         "Delete mirroring rules towards port %llu first\n",
3343                         general_params->mirr_port);
3344                 return -EBUSY;
3345         }
3346
3347         new_mirr_port = to;
3348         if (!enabled) {
3349                 bool keep = false;
3350                 int port;
3351
3352                 /* Anybody still referencing mirr_port? */
3353                 for (port = 0; port < ds->num_ports; port++) {
3354                         if (mac[port].ing_mirr || mac[port].egr_mirr) {
3355                                 keep = true;
3356                                 break;
3357                         }
3358                 }
3359                 /* Unset already_enabled for next time */
3360                 if (!keep)
3361                         new_mirr_port = ds->num_ports;
3362         }
3363         if (new_mirr_port != general_params->mirr_port) {
3364                 general_params->mirr_port = new_mirr_port;
3365
3366                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_GENERAL_PARAMS,
3367                                                   0, general_params, true);
3368                 if (rc < 0)
3369                         return rc;
3370         }
3371
3372         if (ingress)
3373                 mac[from].ing_mirr = enabled;
3374         else
3375                 mac[from].egr_mirr = enabled;
3376
3377         return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, from,
3378                                             &mac[from], true);
3379 }
3380
3381 static int sja1105_mirror_add(struct dsa_switch *ds, int port,
3382                               struct dsa_mall_mirror_tc_entry *mirror,
3383                               bool ingress)
3384 {
3385         return sja1105_mirror_apply(ds->priv, port, mirror->to_local_port,
3386                                     ingress, true);
3387 }
3388
3389 static void sja1105_mirror_del(struct dsa_switch *ds, int port,
3390                                struct dsa_mall_mirror_tc_entry *mirror)
3391 {
3392         sja1105_mirror_apply(ds->priv, port, mirror->to_local_port,
3393                              mirror->ingress, false);
3394 }
3395
3396 static int sja1105_port_policer_add(struct dsa_switch *ds, int port,
3397                                     struct dsa_mall_policer_tc_entry *policer)
3398 {
3399         struct sja1105_l2_policing_entry *policing;
3400         struct sja1105_private *priv = ds->priv;
3401
3402         policing = priv->static_config.tables[BLK_IDX_L2_POLICING].entries;
3403
3404         /* In hardware, every 8 microseconds the credit level is incremented by
3405          * the value of RATE bytes divided by 64, up to a maximum of SMAX
3406          * bytes.
3407          */
3408         policing[port].rate = div_u64(512 * policer->rate_bytes_per_sec,
3409                                       1000000);
3410         policing[port].smax = policer->burst;
3411
3412         return sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);
3413 }
3414
3415 static void sja1105_port_policer_del(struct dsa_switch *ds, int port)
3416 {
3417         struct sja1105_l2_policing_entry *policing;
3418         struct sja1105_private *priv = ds->priv;
3419
3420         policing = priv->static_config.tables[BLK_IDX_L2_POLICING].entries;
3421
3422         policing[port].rate = SJA1105_RATE_MBPS(1000);
3423         policing[port].smax = 65535;
3424
3425         sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);
3426 }
3427
3428 static int sja1105_port_set_learning(struct sja1105_private *priv, int port,
3429                                      bool enabled)
3430 {
3431         struct sja1105_mac_config_entry *mac;
3432         int rc;
3433
3434         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
3435
3436         mac[port].dyn_learn = enabled;
3437
3438         rc = sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
3439                                           &mac[port], true);
3440         if (rc)
3441                 return rc;
3442
3443         if (enabled)
3444                 priv->learn_ena |= BIT(port);
3445         else
3446                 priv->learn_ena &= ~BIT(port);
3447
3448         return 0;
3449 }
3450
3451 static int sja1105_port_ucast_bcast_flood(struct sja1105_private *priv, int to,
3452                                           struct switchdev_brport_flags flags)
3453 {
3454         if (flags.mask & BR_FLOOD) {
3455                 if (flags.val & BR_FLOOD)
3456                         priv->ucast_egress_floods |= BIT(to);
3457                 else
3458                         priv->ucast_egress_floods &= ~BIT(to);
3459         }
3460
3461         if (flags.mask & BR_BCAST_FLOOD) {
3462                 if (flags.val & BR_BCAST_FLOOD)
3463                         priv->bcast_egress_floods |= BIT(to);
3464                 else
3465                         priv->bcast_egress_floods &= ~BIT(to);
3466         }
3467
3468         return sja1105_manage_flood_domains(priv);
3469 }
3470
3471 static int sja1105_port_mcast_flood(struct sja1105_private *priv, int to,
3472                                     struct switchdev_brport_flags flags,
3473                                     struct netlink_ext_ack *extack)
3474 {
3475         struct sja1105_l2_lookup_entry *l2_lookup;
3476         struct sja1105_table *table;
3477         int match;
3478
3479         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
3480         l2_lookup = table->entries;
3481
3482         for (match = 0; match < table->entry_count; match++)
3483                 if (l2_lookup[match].macaddr == SJA1105_UNKNOWN_MULTICAST &&
3484                     l2_lookup[match].mask_macaddr == SJA1105_UNKNOWN_MULTICAST)
3485                         break;
3486
3487         if (match == table->entry_count) {
3488                 NL_SET_ERR_MSG_MOD(extack,
3489                                    "Could not find FDB entry for unknown multicast");
3490                 return -ENOSPC;
3491         }
3492
3493         if (flags.val & BR_MCAST_FLOOD)
3494                 l2_lookup[match].destports |= BIT(to);
3495         else
3496                 l2_lookup[match].destports &= ~BIT(to);
3497
3498         return sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
3499                                             l2_lookup[match].index,
3500                                             &l2_lookup[match],
3501                                             true);
3502 }
3503
3504 static int sja1105_port_pre_bridge_flags(struct dsa_switch *ds, int port,
3505                                          struct switchdev_brport_flags flags,
3506                                          struct netlink_ext_ack *extack)
3507 {
3508         struct sja1105_private *priv = ds->priv;
3509
3510         if (flags.mask & ~(BR_LEARNING | BR_FLOOD | BR_MCAST_FLOOD |
3511                            BR_BCAST_FLOOD))
3512                 return -EINVAL;
3513
3514         if (flags.mask & (BR_FLOOD | BR_MCAST_FLOOD) &&
3515             !priv->info->can_limit_mcast_flood) {
3516                 bool multicast = !!(flags.val & BR_MCAST_FLOOD);
3517                 bool unicast = !!(flags.val & BR_FLOOD);
3518
3519                 if (unicast != multicast) {
3520                         NL_SET_ERR_MSG_MOD(extack,
3521                                            "This chip cannot configure multicast flooding independently of unicast");
3522                         return -EINVAL;
3523                 }
3524         }
3525
3526         return 0;
3527 }
3528
3529 static int sja1105_port_bridge_flags(struct dsa_switch *ds, int port,
3530                                      struct switchdev_brport_flags flags,
3531                                      struct netlink_ext_ack *extack)
3532 {
3533         struct sja1105_private *priv = ds->priv;
3534         int rc;
3535
3536         if (flags.mask & BR_LEARNING) {
3537                 bool learn_ena = !!(flags.val & BR_LEARNING);
3538
3539                 rc = sja1105_port_set_learning(priv, port, learn_ena);
3540                 if (rc)
3541                         return rc;
3542         }
3543
3544         if (flags.mask & (BR_FLOOD | BR_BCAST_FLOOD)) {
3545                 rc = sja1105_port_ucast_bcast_flood(priv, port, flags);
3546                 if (rc)
3547                         return rc;
3548         }
3549
3550         /* For chips that can't offload BR_MCAST_FLOOD independently, there
3551          * is nothing to do here, we ensured the configuration is in sync by
3552          * offloading BR_FLOOD.
3553          */
3554         if (flags.mask & BR_MCAST_FLOOD && priv->info->can_limit_mcast_flood) {
3555                 rc = sja1105_port_mcast_flood(priv, port, flags,
3556                                               extack);
3557                 if (rc)
3558                         return rc;
3559         }
3560
3561         return 0;
3562 }
3563
3564 static const struct dsa_switch_ops sja1105_switch_ops = {
3565         .get_tag_protocol       = sja1105_get_tag_protocol,
3566         .setup                  = sja1105_setup,
3567         .teardown               = sja1105_teardown,
3568         .set_ageing_time        = sja1105_set_ageing_time,
3569         .port_change_mtu        = sja1105_change_mtu,
3570         .port_max_mtu           = sja1105_get_max_mtu,
3571         .phylink_validate       = sja1105_phylink_validate,
3572         .phylink_mac_config     = sja1105_mac_config,
3573         .phylink_mac_link_up    = sja1105_mac_link_up,
3574         .phylink_mac_link_down  = sja1105_mac_link_down,
3575         .get_strings            = sja1105_get_strings,
3576         .get_ethtool_stats      = sja1105_get_ethtool_stats,
3577         .get_sset_count         = sja1105_get_sset_count,
3578         .get_ts_info            = sja1105_get_ts_info,
3579         .port_disable           = sja1105_port_disable,
3580         .port_fdb_dump          = sja1105_fdb_dump,
3581         .port_fdb_add           = sja1105_fdb_add,
3582         .port_fdb_del           = sja1105_fdb_del,
3583         .port_bridge_join       = sja1105_bridge_join,
3584         .port_bridge_leave      = sja1105_bridge_leave,
3585         .port_pre_bridge_flags  = sja1105_port_pre_bridge_flags,
3586         .port_bridge_flags      = sja1105_port_bridge_flags,
3587         .port_stp_state_set     = sja1105_bridge_stp_state_set,
3588         .port_vlan_filtering    = sja1105_vlan_filtering,
3589         .port_vlan_add          = sja1105_vlan_add,
3590         .port_vlan_del          = sja1105_vlan_del,
3591         .port_mdb_add           = sja1105_mdb_add,
3592         .port_mdb_del           = sja1105_mdb_del,
3593         .port_hwtstamp_get      = sja1105_hwtstamp_get,
3594         .port_hwtstamp_set      = sja1105_hwtstamp_set,
3595         .port_rxtstamp          = sja1105_port_rxtstamp,
3596         .port_txtstamp          = sja1105_port_txtstamp,
3597         .port_setup_tc          = sja1105_port_setup_tc,
3598         .port_mirror_add        = sja1105_mirror_add,
3599         .port_mirror_del        = sja1105_mirror_del,
3600         .port_policer_add       = sja1105_port_policer_add,
3601         .port_policer_del       = sja1105_port_policer_del,
3602         .cls_flower_add         = sja1105_cls_flower_add,
3603         .cls_flower_del         = sja1105_cls_flower_del,
3604         .cls_flower_stats       = sja1105_cls_flower_stats,
3605         .crosschip_bridge_join  = sja1105_crosschip_bridge_join,
3606         .crosschip_bridge_leave = sja1105_crosschip_bridge_leave,
3607         .devlink_param_get      = sja1105_devlink_param_get,
3608         .devlink_param_set      = sja1105_devlink_param_set,
3609         .devlink_info_get       = sja1105_devlink_info_get,
3610 };
3611
3612 static const struct of_device_id sja1105_dt_ids[];
3613
3614 static int sja1105_check_device_id(struct sja1105_private *priv)
3615 {
3616         const struct sja1105_regs *regs = priv->info->regs;
3617         u8 prod_id[SJA1105_SIZE_DEVICE_ID] = {0};
3618         struct device *dev = &priv->spidev->dev;
3619         const struct of_device_id *match;
3620         u32 device_id;
3621         u64 part_no;
3622         int rc;
3623
3624         rc = sja1105_xfer_u32(priv, SPI_READ, regs->device_id, &device_id,
3625                               NULL);
3626         if (rc < 0)
3627                 return rc;
3628
3629         rc = sja1105_xfer_buf(priv, SPI_READ, regs->prod_id, prod_id,
3630                               SJA1105_SIZE_DEVICE_ID);
3631         if (rc < 0)
3632                 return rc;
3633
3634         sja1105_unpack(prod_id, &part_no, 19, 4, SJA1105_SIZE_DEVICE_ID);
3635
3636         for (match = sja1105_dt_ids; match->compatible[0]; match++) {
3637                 const struct sja1105_info *info = match->data;
3638
3639                 /* Is what's been probed in our match table at all? */
3640                 if (info->device_id != device_id || info->part_no != part_no)
3641                         continue;
3642
3643                 /* But is it what's in the device tree? */
3644                 if (priv->info->device_id != device_id ||
3645                     priv->info->part_no != part_no) {
3646                         dev_warn(dev, "Device tree specifies chip %s but found %s, please fix it!\n",
3647                                  priv->info->name, info->name);
3648                         /* It isn't. No problem, pick that up. */
3649                         priv->info = info;
3650                 }
3651
3652                 return 0;
3653         }
3654
3655         dev_err(dev, "Unexpected {device ID, part number}: 0x%x 0x%llx\n",
3656                 device_id, part_no);
3657
3658         return -ENODEV;
3659 }
3660
3661 static int sja1105_probe(struct spi_device *spi)
3662 {
3663         struct sja1105_tagger_data *tagger_data;
3664         struct device *dev = &spi->dev;
3665         struct sja1105_private *priv;
3666         size_t max_xfer, max_msg;
3667         struct dsa_switch *ds;
3668         int rc, port;
3669
3670         if (!dev->of_node) {
3671                 dev_err(dev, "No DTS bindings for SJA1105 driver\n");
3672                 return -EINVAL;
3673         }
3674
3675         priv = devm_kzalloc(dev, sizeof(struct sja1105_private), GFP_KERNEL);
3676         if (!priv)
3677                 return -ENOMEM;
3678
3679         /* Configure the optional reset pin and bring up switch */
3680         priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
3681         if (IS_ERR(priv->reset_gpio))
3682                 dev_dbg(dev, "reset-gpios not defined, ignoring\n");
3683         else
3684                 sja1105_hw_reset(priv->reset_gpio, 1, 1);
3685
3686         /* Populate our driver private structure (priv) based on
3687          * the device tree node that was probed (spi)
3688          */
3689         priv->spidev = spi;
3690         spi_set_drvdata(spi, priv);
3691
3692         /* Configure the SPI bus */
3693         spi->bits_per_word = 8;
3694         rc = spi_setup(spi);
3695         if (rc < 0) {
3696                 dev_err(dev, "Could not init SPI\n");
3697                 return rc;
3698         }
3699
3700         /* In sja1105_xfer, we send spi_messages composed of two spi_transfers:
3701          * a small one for the message header and another one for the current
3702          * chunk of the packed buffer.
3703          * Check that the restrictions imposed by the SPI controller are
3704          * respected: the chunk buffer is smaller than the max transfer size,
3705          * and the total length of the chunk plus its message header is smaller
3706          * than the max message size.
3707          * We do that during probe time since the maximum transfer size is a
3708          * runtime invariant.
3709          */
3710         max_xfer = spi_max_transfer_size(spi);
3711         max_msg = spi_max_message_size(spi);
3712
3713         /* We need to send at least one 64-bit word of SPI payload per message
3714          * in order to be able to make useful progress.
3715          */
3716         if (max_msg < SJA1105_SIZE_SPI_MSG_HEADER + 8) {
3717                 dev_err(dev, "SPI master cannot send large enough buffers, aborting\n");
3718                 return -EINVAL;
3719         }
3720
3721         priv->max_xfer_len = SJA1105_SIZE_SPI_MSG_MAXLEN;
3722         if (priv->max_xfer_len > max_xfer)
3723                 priv->max_xfer_len = max_xfer;
3724         if (priv->max_xfer_len > max_msg - SJA1105_SIZE_SPI_MSG_HEADER)
3725                 priv->max_xfer_len = max_msg - SJA1105_SIZE_SPI_MSG_HEADER;
3726
3727         priv->info = of_device_get_match_data(dev);
3728
3729         /* Detect hardware device */
3730         rc = sja1105_check_device_id(priv);
3731         if (rc < 0) {
3732                 dev_err(dev, "Device ID check failed: %d\n", rc);
3733                 return rc;
3734         }
3735
3736         dev_info(dev, "Probed switch chip: %s\n", priv->info->name);
3737
3738         ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL);
3739         if (!ds)
3740                 return -ENOMEM;
3741
3742         ds->dev = dev;
3743         ds->num_ports = priv->info->num_ports;
3744         ds->ops = &sja1105_switch_ops;
3745         ds->priv = priv;
3746         priv->ds = ds;
3747
3748         tagger_data = &priv->tagger_data;
3749
3750         mutex_init(&priv->ptp_data.lock);
3751         mutex_init(&priv->mgmt_lock);
3752
3753         priv->dsa_8021q_ctx = devm_kzalloc(dev, sizeof(*priv->dsa_8021q_ctx),
3754                                            GFP_KERNEL);
3755         if (!priv->dsa_8021q_ctx)
3756                 return -ENOMEM;
3757
3758         priv->dsa_8021q_ctx->ops = &sja1105_dsa_8021q_ops;
3759         priv->dsa_8021q_ctx->proto = htons(ETH_P_8021Q);
3760         priv->dsa_8021q_ctx->ds = ds;
3761
3762         INIT_LIST_HEAD(&priv->dsa_8021q_ctx->crosschip_links);
3763         INIT_LIST_HEAD(&priv->bridge_vlans);
3764         INIT_LIST_HEAD(&priv->dsa_8021q_vlans);
3765
3766         sja1105_tas_setup(ds);
3767         sja1105_flower_setup(ds);
3768
3769         rc = dsa_register_switch(priv->ds);
3770         if (rc)
3771                 return rc;
3772
3773         if (IS_ENABLED(CONFIG_NET_SCH_CBS)) {
3774                 priv->cbs = devm_kcalloc(dev, priv->info->num_cbs_shapers,
3775                                          sizeof(struct sja1105_cbs_entry),
3776                                          GFP_KERNEL);
3777                 if (!priv->cbs) {
3778                         rc = -ENOMEM;
3779                         goto out_unregister_switch;
3780                 }
3781         }
3782
3783         /* Connections between dsa_port and sja1105_port */
3784         for (port = 0; port < ds->num_ports; port++) {
3785                 struct sja1105_port *sp = &priv->ports[port];
3786                 struct dsa_port *dp = dsa_to_port(ds, port);
3787                 struct net_device *slave;
3788                 int subvlan;
3789
3790                 if (!dsa_is_user_port(ds, port))
3791                         continue;
3792
3793                 dp->priv = sp;
3794                 sp->dp = dp;
3795                 sp->data = tagger_data;
3796                 slave = dp->slave;
3797                 kthread_init_work(&sp->xmit_work, sja1105_port_deferred_xmit);
3798                 sp->xmit_worker = kthread_create_worker(0, "%s_xmit",
3799                                                         slave->name);
3800                 if (IS_ERR(sp->xmit_worker)) {
3801                         rc = PTR_ERR(sp->xmit_worker);
3802                         dev_err(ds->dev,
3803                                 "failed to create deferred xmit thread: %d\n",
3804                                 rc);
3805                         goto out_destroy_workers;
3806                 }
3807                 skb_queue_head_init(&sp->xmit_queue);
3808                 sp->xmit_tpid = ETH_P_SJA1105;
3809
3810                 for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
3811                         sp->subvlan_map[subvlan] = VLAN_N_VID;
3812         }
3813
3814         return 0;
3815
3816 out_destroy_workers:
3817         while (port-- > 0) {
3818                 struct sja1105_port *sp = &priv->ports[port];
3819
3820                 if (!dsa_is_user_port(ds, port))
3821                         continue;
3822
3823                 kthread_destroy_worker(sp->xmit_worker);
3824         }
3825
3826 out_unregister_switch:
3827         dsa_unregister_switch(ds);
3828
3829         return rc;
3830 }
3831
3832 static int sja1105_remove(struct spi_device *spi)
3833 {
3834         struct sja1105_private *priv = spi_get_drvdata(spi);
3835
3836         dsa_unregister_switch(priv->ds);
3837         return 0;
3838 }
3839
3840 static const struct of_device_id sja1105_dt_ids[] = {
3841         { .compatible = "nxp,sja1105e", .data = &sja1105e_info },
3842         { .compatible = "nxp,sja1105t", .data = &sja1105t_info },
3843         { .compatible = "nxp,sja1105p", .data = &sja1105p_info },
3844         { .compatible = "nxp,sja1105q", .data = &sja1105q_info },
3845         { .compatible = "nxp,sja1105r", .data = &sja1105r_info },
3846         { .compatible = "nxp,sja1105s", .data = &sja1105s_info },
3847         { .compatible = "nxp,sja1110a", .data = &sja1110a_info },
3848         { .compatible = "nxp,sja1110b", .data = &sja1110b_info },
3849         { .compatible = "nxp,sja1110c", .data = &sja1110c_info },
3850         { .compatible = "nxp,sja1110d", .data = &sja1110d_info },
3851         { /* sentinel */ },
3852 };
3853 MODULE_DEVICE_TABLE(of, sja1105_dt_ids);
3854
3855 static struct spi_driver sja1105_driver = {
3856         .driver = {
3857                 .name  = "sja1105",
3858                 .owner = THIS_MODULE,
3859                 .of_match_table = of_match_ptr(sja1105_dt_ids),
3860         },
3861         .probe  = sja1105_probe,
3862         .remove = sja1105_remove,
3863 };
3864
3865 module_spi_driver(sja1105_driver);
3866
3867 MODULE_AUTHOR("Vladimir Oltean <olteanv@gmail.com>");
3868 MODULE_AUTHOR("Georg Waibel <georg.waibel@sensor-technik.de>");
3869 MODULE_DESCRIPTION("SJA1105 Driver");
3870 MODULE_LICENSE("GPL v2");