drivers/net/dsa/sja1105/sja1105_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
   3  * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
   4  */
   5
   6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   7
   8 #include <linux/delay.h>
   9 #include <linux/module.h>
  10 #include <linux/printk.h>
  11 #include <linux/spi/spi.h>
  12 #include <linux/errno.h>
  13 #include <linux/gpio/consumer.h>
  14 #include <linux/phylink.h>
  15 #include <linux/of.h>
  16 #include <linux/of_net.h>
  17 #include <linux/of_mdio.h>
  18 #include <linux/of_device.h>
  19 #include <linux/pcs/pcs-xpcs.h>
  20 #include <linux/netdev_features.h>
  21 #include <linux/netdevice.h>
  22 #include <linux/if_bridge.h>
  23 #include <linux/if_ether.h>
  24 #include <linux/dsa/8021q.h>
  25 #include "sja1105.h"
  26 #include "sja1105_tas.h"
  27
  28 #define SJA1105_UNKNOWN_MULTICAST       0x010000000000ull
  29 #define SJA1105_DEFAULT_VLAN            (VLAN_N_VID - 1)
  30
  31 static const struct dsa_switch_ops sja1105_switch_ops;
  32
  33 static void sja1105_hw_reset(struct gpio_desc *gpio, unsigned int pulse_len,
  34                              unsigned int startup_delay)
  35 {
  36         gpiod_set_value_cansleep(gpio, 1);
  37         /* Wait for minimum reset pulse length */
  38         msleep(pulse_len);
  39         gpiod_set_value_cansleep(gpio, 0);
  40         /* Wait until chip is ready after reset */
  41         msleep(startup_delay);
  42 }
  43
  44 static void
  45 sja1105_port_allow_traffic(struct sja1105_l2_forwarding_entry *l2_fwd,
  46                            int from, int to, bool allow)
  47 {
  48         if (allow)
  49                 l2_fwd[from].reach_port |= BIT(to);
  50         else
  51                 l2_fwd[from].reach_port &= ~BIT(to);
  52 }
  53
  54 static bool sja1105_can_forward(struct sja1105_l2_forwarding_entry *l2_fwd,
  55                                 int from, int to)
  56 {
  57         return !!(l2_fwd[from].reach_port & BIT(to));
  58 }
  59
  60 static int sja1105_init_mac_settings(struct sja1105_private *priv)
  61 {
  62         struct sja1105_mac_config_entry default_mac = {
  63                 /* Enable all 8 priority queues on egress.
  64                  * Every queue i holds top[i] - base[i] frames.
  65                  * Sum of top[i] - base[i] is 511 (max hardware limit).
  66                  */
  67                 .top  = {0x3F, 0x7F, 0xBF, 0xFF, 0x13F, 0x17F, 0x1BF, 0x1FF},
  68                 .base = {0x0, 0x40, 0x80, 0xC0, 0x100, 0x140, 0x180, 0x1C0},
  69                 .enabled = {true, true, true, true, true, true, true, true},
  70                 /* Keep standard IFG of 12 bytes on egress. */
  71                 .ifg = 0,
  72                 /* Always put the MAC speed in automatic mode, where it can be
  73                  * adjusted at runtime by PHYLINK.
  74                  */
  75                 .speed = priv->info->port_speed[SJA1105_SPEED_AUTO],
  76                 /* No static correction for 1-step 1588 events */
  77                 .tp_delin = 0,
  78                 .tp_delout = 0,
  79                 /* Disable aging for critical TTEthernet traffic */
  80                 .maxage = 0xFF,
  81                 /* Internal VLAN (pvid) to apply to untagged ingress */
  82                 .vlanprio = 0,
  83                 .vlanid = 1,
  84                 .ing_mirr = false,
  85                 .egr_mirr = false,
  86                 /* Don't drop traffic with other EtherType than ETH_P_IP */
  87                 .drpnona664 = false,
  88                 /* Don't drop double-tagged traffic */
  89                 .drpdtag = false,
  90                 /* Don't drop untagged traffic */
  91                 .drpuntag = false,
  92                 /* Don't retag 802.1p (VID 0) traffic with the pvid */
  93                 .retag = false,
  94                 /* Disable learning and I/O on user ports by default -
  95                  * STP will enable it.
  96                  */
  97                 .dyn_learn = false,
  98                 .egress = false,
  99                 .ingress = false,
 100         };
 101         struct sja1105_mac_config_entry *mac;
 102         struct dsa_switch *ds = priv->ds;
 103         struct sja1105_table *table;
 104         int i;
 105
 106         table = &priv->static_config.tables[BLK_IDX_MAC_CONFIG];
 107
 108         /* Discard previous MAC Configuration Table */
 109         if (table->entry_count) {
 110                 kfree(table->entries);
 111                 table->entry_count = 0;
 112         }
 113
 114         table->entries = kcalloc(table->ops->max_entry_count,
 115                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 116         if (!table->entries)
 117                 return -ENOMEM;
 118
 119         table->entry_count = table->ops->max_entry_count;
 120
 121         mac = table->entries;
 122
 123         for (i = 0; i < ds->num_ports; i++) {
 124                 mac[i] = default_mac;
 125                 if (i == dsa_upstream_port(priv->ds, i)) {
 126                         /* STP doesn't get called for CPU port, so we need to
 127                          * set the I/O parameters statically.
 128                          */
 129                         mac[i].dyn_learn = true;
 130                         mac[i].ingress = true;
 131                         mac[i].egress = true;
 132                 }
 133         }
 134
 135         return 0;
 136 }
 137
 138 static int sja1105_init_mii_settings(struct sja1105_private *priv)
 139 {
 140         struct device *dev = &priv->spidev->dev;
 141         struct sja1105_xmii_params_entry *mii;
 142         struct dsa_switch *ds = priv->ds;
 143         struct sja1105_table *table;
 144         int i;
 145
 146         table = &priv->static_config.tables[BLK_IDX_XMII_PARAMS];
 147
 148         /* Discard previous xMII Mode Parameters Table */
 149         if (table->entry_count) {
 150                 kfree(table->entries);
 151                 table->entry_count = 0;
 152         }
 153
 154         table->entries = kcalloc(table->ops->max_entry_count,
 155                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 156         if (!table->entries)
 157                 return -ENOMEM;
 158
 159         /* Override table based on PHYLINK DT bindings */
 160         table->entry_count = table->ops->max_entry_count;
 161
 162         mii = table->entries;
 163
 164         for (i = 0; i < ds->num_ports; i++) {
 165                 sja1105_mii_role_t role = XMII_MAC;
 166
 167                 if (dsa_is_unused_port(priv->ds, i))
 168                         continue;
 169
 170                 switch (priv->phy_mode[i]) {
 171                 case PHY_INTERFACE_MODE_INTERNAL:
 172                         if (priv->info->internal_phy[i] == SJA1105_NO_PHY)
 173                                 goto unsupported;
 174
 175                         mii->xmii_mode[i] = XMII_MODE_MII;
 176                         if (priv->info->internal_phy[i] == SJA1105_PHY_BASE_TX)
 177                                 mii->special[i] = true;
 178
 179                         break;
 180                 case PHY_INTERFACE_MODE_REVMII:
 181                         role = XMII_PHY;
 182                         fallthrough;
 183                 case PHY_INTERFACE_MODE_MII:
 184                         if (!priv->info->supports_mii[i])
 185                                 goto unsupported;
 186
 187                         mii->xmii_mode[i] = XMII_MODE_MII;
 188                         break;
 189                 case PHY_INTERFACE_MODE_REVRMII:
 190                         role = XMII_PHY;
 191                         fallthrough;
 192                 case PHY_INTERFACE_MODE_RMII:
 193                         if (!priv->info->supports_rmii[i])
 194                                 goto unsupported;
 195
 196                         mii->xmii_mode[i] = XMII_MODE_RMII;
 197                         break;
 198                 case PHY_INTERFACE_MODE_RGMII:
 199                 case PHY_INTERFACE_MODE_RGMII_ID:
 200                 case PHY_INTERFACE_MODE_RGMII_RXID:
 201                 case PHY_INTERFACE_MODE_RGMII_TXID:
 202                         if (!priv->info->supports_rgmii[i])
 203                                 goto unsupported;
 204
 205                         mii->xmii_mode[i] = XMII_MODE_RGMII;
 206                         break;
 207                 case PHY_INTERFACE_MODE_SGMII:
 208                         if (!priv->info->supports_sgmii[i])
 209                                 goto unsupported;
 210
 211                         mii->xmii_mode[i] = XMII_MODE_SGMII;
 212                         mii->special[i] = true;
 213                         break;
 214                 case PHY_INTERFACE_MODE_2500BASEX:
 215                         if (!priv->info->supports_2500basex[i])
 216                                 goto unsupported;
 217
 218                         mii->xmii_mode[i] = XMII_MODE_SGMII;
 219                         mii->special[i] = true;
 220                         break;
 221 unsupported:
 222                 default:
 223                         dev_err(dev, "Unsupported PHY mode %s on port %d!\n",
 224                                 phy_modes(priv->phy_mode[i]), i);
 225                         return -EINVAL;
 226                 }
 227
 228                 mii->phy_mac[i] = role;
 229         }
 230         return 0;
 231 }
 232
 233 static int sja1105_init_static_fdb(struct sja1105_private *priv)
 234 {
 235         struct sja1105_l2_lookup_entry *l2_lookup;
 236         struct sja1105_table *table;
 237         int port;
 238
 239         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
 240
 241         /* We only populate the FDB table through dynamic L2 Address Lookup
 242          * entries, except for a special entry at the end which is a catch-all
 243          * for unknown multicast and will be used to control flooding domain.
 244          */
 245         if (table->entry_count) {
 246                 kfree(table->entries);
 247                 table->entry_count = 0;
 248         }
 249
 250         if (!priv->info->can_limit_mcast_flood)
 251                 return 0;
 252
 253         table->entries = kcalloc(1, table->ops->unpacked_entry_size,
 254                                  GFP_KERNEL);
 255         if (!table->entries)
 256                 return -ENOMEM;
 257
 258         table->entry_count = 1;
 259         l2_lookup = table->entries;
 260
 261         /* All L2 multicast addresses have an odd first octet */
 262         l2_lookup[0].macaddr = SJA1105_UNKNOWN_MULTICAST;
 263         l2_lookup[0].mask_macaddr = SJA1105_UNKNOWN_MULTICAST;
 264         l2_lookup[0].lockeds = true;
 265         l2_lookup[0].index = SJA1105_MAX_L2_LOOKUP_COUNT - 1;
 266
 267         /* Flood multicast to every port by default */
 268         for (port = 0; port < priv->ds->num_ports; port++)
 269                 if (!dsa_is_unused_port(priv->ds, port))
 270                         l2_lookup[0].destports |= BIT(port);
 271
 272         return 0;
 273 }
 274
 275 static int sja1105_init_l2_lookup_params(struct sja1105_private *priv)
 276 {
 277         struct sja1105_l2_lookup_params_entry default_l2_lookup_params = {
 278                 /* Learned FDB entries are forgotten after 300 seconds */
 279                 .maxage = SJA1105_AGEING_TIME_MS(300000),
 280                 /* All entries within a FDB bin are available for learning */
 281                 .dyn_tbsz = SJA1105ET_FDB_BIN_SIZE,
 282                 /* And the P/Q/R/S equivalent setting: */
 283                 .start_dynspc = 0,
 284                 /* 2^8 + 2^5 + 2^3 + 2^2 + 2^1 + 1 in Koopman notation */
 285                 .poly = 0x97,
 286                 /* This selects between Independent VLAN Learning (IVL) and
 287                  * Shared VLAN Learning (SVL)
 288                  */
 289                 .shared_learn = true,
 290                 /* Don't discard management traffic based on ENFPORT -
 291                  * we don't perform SMAC port enforcement anyway, so
 292                  * what we are setting here doesn't matter.
 293                  */
 294                 .no_enf_hostprt = false,
 295                 /* Don't learn SMAC for mac_fltres1 and mac_fltres0.
 296                  * Maybe correlate with no_linklocal_learn from bridge driver?
 297                  */
 298                 .no_mgmt_learn = true,
 299                 /* P/Q/R/S only */
 300                 .use_static = true,
 301                 /* Dynamically learned FDB entries can overwrite other (older)
 302                  * dynamic FDB entries
 303                  */
 304                 .owr_dyn = true,
 305                 .drpnolearn = true,
 306         };
 307         struct dsa_switch *ds = priv->ds;
 308         int port, num_used_ports = 0;
 309         struct sja1105_table *table;
 310         u64 max_fdb_entries;
 311
 312         for (port = 0; port < ds->num_ports; port++)
 313                 if (!dsa_is_unused_port(ds, port))
 314                         num_used_ports++;
 315
 316         max_fdb_entries = SJA1105_MAX_L2_LOOKUP_COUNT / num_used_ports;
 317
 318         for (port = 0; port < ds->num_ports; port++) {
 319                 if (dsa_is_unused_port(ds, port))
 320                         continue;
 321
 322                 default_l2_lookup_params.maxaddrp[port] = max_fdb_entries;
 323         }
 324
 325         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
 326
 327         if (table->entry_count) {
 328                 kfree(table->entries);
 329                 table->entry_count = 0;
 330         }
 331
 332         table->entries = kcalloc(table->ops->max_entry_count,
 333                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 334         if (!table->entries)
 335                 return -ENOMEM;
 336
 337         table->entry_count = table->ops->max_entry_count;
 338
 339         /* This table only has a single entry */
 340         ((struct sja1105_l2_lookup_params_entry *)table->entries)[0] =
 341                                 default_l2_lookup_params;
 342
 343         return 0;
 344 }
 345
 346 /* Set up a default VLAN for untagged traffic injected from the CPU
 347  * using management routes (e.g. STP, PTP) as opposed to tag_8021q.
 348  * All DT-defined ports are members of this VLAN, and there are no
 349  * restrictions on forwarding (since the CPU selects the destination).
 350  * Frames from this VLAN will always be transmitted as untagged, and
 351  * neither the bridge nor the 8021q module cannot create this VLAN ID.
 352  */
 353 static int sja1105_init_static_vlan(struct sja1105_private *priv)
 354 {
 355         struct sja1105_table *table;
 356         struct sja1105_vlan_lookup_entry pvid = {
 357                 .type_entry = SJA1110_VLAN_D_TAG,
 358                 .ving_mirr = 0,
 359                 .vegr_mirr = 0,
 360                 .vmemb_port = 0,
 361                 .vlan_bc = 0,
 362                 .tag_port = 0,
 363                 .vlanid = SJA1105_DEFAULT_VLAN,
 364         };
 365         struct dsa_switch *ds = priv->ds;
 366         int port;
 367
 368         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
 369
 370         if (table->entry_count) {
 371                 kfree(table->entries);
 372                 table->entry_count = 0;
 373         }
 374
 375         table->entries = kzalloc(table->ops->unpacked_entry_size,
 376                                  GFP_KERNEL);
 377         if (!table->entries)
 378                 return -ENOMEM;
 379
 380         table->entry_count = 1;
 381
 382         for (port = 0; port < ds->num_ports; port++) {
 383                 struct sja1105_bridge_vlan *v;
 384
 385                 if (dsa_is_unused_port(ds, port))
 386                         continue;
 387
 388                 pvid.vmemb_port |= BIT(port);
 389                 pvid.vlan_bc |= BIT(port);
 390                 pvid.tag_port &= ~BIT(port);
 391
 392                 v = kzalloc(sizeof(*v), GFP_KERNEL);
 393                 if (!v)
 394                         return -ENOMEM;
 395
 396                 v->port = port;
 397                 v->vid = SJA1105_DEFAULT_VLAN;
 398                 v->untagged = true;
 399                 if (dsa_is_cpu_port(ds, port))
 400                         v->pvid = true;
 401                 list_add(&v->list, &priv->dsa_8021q_vlans);
 402         }
 403
 404         ((struct sja1105_vlan_lookup_entry *)table->entries)[0] = pvid;
 405         return 0;
 406 }
 407
 408 static int sja1105_init_l2_forwarding(struct sja1105_private *priv)
 409 {
 410         struct sja1105_l2_forwarding_entry *l2fwd;
 411         struct dsa_switch *ds = priv->ds;
 412         struct sja1105_table *table;
 413         int i, j;
 414
 415         table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING];
 416
 417         if (table->entry_count) {
 418                 kfree(table->entries);
 419                 table->entry_count = 0;
 420         }
 421
 422         table->entries = kcalloc(table->ops->max_entry_count,
 423                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 424         if (!table->entries)
 425                 return -ENOMEM;
 426
 427         table->entry_count = table->ops->max_entry_count;
 428
 429         l2fwd = table->entries;
 430
 431         /* First 5 entries define the forwarding rules */
 432         for (i = 0; i < ds->num_ports; i++) {
 433                 unsigned int upstream = dsa_upstream_port(priv->ds, i);
 434
 435                 if (dsa_is_unused_port(ds, i))
 436                         continue;
 437
 438                 for (j = 0; j < SJA1105_NUM_TC; j++)
 439                         l2fwd[i].vlan_pmap[j] = j;
 440
 441                 /* All ports start up with egress flooding enabled,
 442                  * including the CPU port.
 443                  */
 444                 priv->ucast_egress_floods |= BIT(i);
 445                 priv->bcast_egress_floods |= BIT(i);
 446
 447                 if (i == upstream)
 448                         continue;
 449
 450                 sja1105_port_allow_traffic(l2fwd, i, upstream, true);
 451                 sja1105_port_allow_traffic(l2fwd, upstream, i, true);
 452
 453                 l2fwd[i].bc_domain = BIT(upstream);
 454                 l2fwd[i].fl_domain = BIT(upstream);
 455
 456                 l2fwd[upstream].bc_domain |= BIT(i);
 457                 l2fwd[upstream].fl_domain |= BIT(i);
 458         }
 459
 460         /* Next 8 entries define VLAN PCP mapping from ingress to egress.
 461          * Create a one-to-one mapping.
 462          */
 463         for (i = 0; i < SJA1105_NUM_TC; i++) {
 464                 for (j = 0; j < ds->num_ports; j++) {
 465                         if (dsa_is_unused_port(ds, j))
 466                                 continue;
 467
 468                         l2fwd[ds->num_ports + i].vlan_pmap[j] = i;
 469                 }
 470
 471                 l2fwd[ds->num_ports + i].type_egrpcp2outputq = true;
 472         }
 473
 474         return 0;
 475 }
 476
 477 static int sja1110_init_pcp_remapping(struct sja1105_private *priv)
 478 {
 479         struct sja1110_pcp_remapping_entry *pcp_remap;
 480         struct dsa_switch *ds = priv->ds;
 481         struct sja1105_table *table;
 482         int port, tc;
 483
 484         table = &priv->static_config.tables[BLK_IDX_PCP_REMAPPING];
 485
 486         /* Nothing to do for SJA1105 */
 487         if (!table->ops->max_entry_count)
 488                 return 0;
 489
 490         if (table->entry_count) {
 491                 kfree(table->entries);
 492                 table->entry_count = 0;
 493         }
 494
 495         table->entries = kcalloc(table->ops->max_entry_count,
 496                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 497         if (!table->entries)
 498                 return -ENOMEM;
 499
 500         table->entry_count = table->ops->max_entry_count;
 501
 502         pcp_remap = table->entries;
 503
 504         /* Repeat the configuration done for vlan_pmap */
 505         for (port = 0; port < ds->num_ports; port++) {
 506                 if (dsa_is_unused_port(ds, port))
 507                         continue;
 508
 509                 for (tc = 0; tc < SJA1105_NUM_TC; tc++)
 510                         pcp_remap[port].egrpcp[tc] = tc;
 511         }
 512
 513         return 0;
 514 }
 515
 516 static int sja1105_init_l2_forwarding_params(struct sja1105_private *priv)
 517 {
 518         struct sja1105_l2_forwarding_params_entry *l2fwd_params;
 519         struct sja1105_table *table;
 520
 521         table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS];
 522
 523         if (table->entry_count) {
 524                 kfree(table->entries);
 525                 table->entry_count = 0;
 526         }
 527
 528         table->entries = kcalloc(table->ops->max_entry_count,
 529                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 530         if (!table->entries)
 531                 return -ENOMEM;
 532
 533         table->entry_count = table->ops->max_entry_count;
 534
 535         /* This table only has a single entry */
 536         l2fwd_params = table->entries;
 537
 538         /* Disallow dynamic reconfiguration of vlan_pmap */
 539         l2fwd_params->max_dynp = 0;
 540         /* Use a single memory partition for all ingress queues */
 541         l2fwd_params->part_spc[0] = priv->info->max_frame_mem;
 542
 543         return 0;
 544 }
 545
 546 void sja1105_frame_memory_partitioning(struct sja1105_private *priv)
 547 {
 548         struct sja1105_l2_forwarding_params_entry *l2_fwd_params;
 549         struct sja1105_vl_forwarding_params_entry *vl_fwd_params;
 550         int max_mem = priv->info->max_frame_mem;
 551         struct sja1105_table *table;
 552
 553         /* VLAN retagging is implemented using a loopback port that consumes
 554          * frame buffers. That leaves less for us.
 555          */
 556         if (priv->vlan_state == SJA1105_VLAN_BEST_EFFORT)
 557                 max_mem -= SJA1105_FRAME_MEMORY_RETAGGING_OVERHEAD;
 558
 559         table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS];
 560         l2_fwd_params = table->entries;
 561         l2_fwd_params->part_spc[0] = max_mem;
 562
 563         /* If we have any critical-traffic virtual links, we need to reserve
 564          * some frame buffer memory for them. At the moment, hardcode the value
 565          * at 100 blocks of 128 bytes of memory each. This leaves 829 blocks
 566          * remaining for best-effort traffic. TODO: figure out a more flexible
 567          * way to perform the frame buffer partitioning.
 568          */
 569         if (!priv->static_config.tables[BLK_IDX_VL_FORWARDING].entry_count)
 570                 return;
 571
 572         table = &priv->static_config.tables[BLK_IDX_VL_FORWARDING_PARAMS];
 573         vl_fwd_params = table->entries;
 574
 575         l2_fwd_params->part_spc[0] -= SJA1105_VL_FRAME_MEMORY;
 576         vl_fwd_params->partspc[0] = SJA1105_VL_FRAME_MEMORY;
 577 }
 578
 579 /* SJA1110 TDMACONFIGIDX values:
 580  *
 581  *      | 100 Mbps ports |  1Gbps ports  | 2.5Gbps ports | Disabled ports
 582  * -----+----------------+---------------+---------------+---------------
 583  *   0  |   0, [5:10]    |     [1:2]     |     [3:4]     |     retag
 584  *   1  |0, [5:10], retag|     [1:2]     |     [3:4]     |       -
 585  *   2  |   0, [5:10]    |  [1:3], retag |       4       |       -
 586  *   3  |   0, [5:10]    |[1:2], 4, retag|       3       |       -
 587  *   4  |  0, 2, [5:10]  |    1, retag   |     [3:4]     |       -
 588  *   5  |  0, 1, [5:10]  |    2, retag   |     [3:4]     |       -
 589  *  14  |   0, [5:10]    | [1:4], retag  |       -       |       -
 590  *  15  |     [5:10]     | [0:4], retag  |       -       |       -
 591  */
 592 static void sja1110_select_tdmaconfigidx(struct sja1105_private *priv)
 593 {
 594         struct sja1105_general_params_entry *general_params;
 595         struct sja1105_table *table;
 596         bool port_1_is_base_tx;
 597         bool port_3_is_2500;
 598         bool port_4_is_2500;
 599         u64 tdmaconfigidx;
 600
 601         if (priv->info->device_id != SJA1110_DEVICE_ID)
 602                 return;
 603
 604         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
 605         general_params = table->entries;
 606
 607         /* All the settings below are "as opposed to SGMII", which is the
 608          * other pinmuxing option.
 609          */
 610         port_1_is_base_tx = priv->phy_mode[1] == PHY_INTERFACE_MODE_INTERNAL;
 611         port_3_is_2500 = priv->phy_mode[3] == PHY_INTERFACE_MODE_2500BASEX;
 612         port_4_is_2500 = priv->phy_mode[4] == PHY_INTERFACE_MODE_2500BASEX;
 613
 614         if (port_1_is_base_tx)
 615                 /* Retagging port will operate at 1 Gbps */
 616                 tdmaconfigidx = 5;
 617         else if (port_3_is_2500 && port_4_is_2500)
 618                 /* Retagging port will operate at 100 Mbps */
 619                 tdmaconfigidx = 1;
 620         else if (port_3_is_2500)
 621                 /* Retagging port will operate at 1 Gbps */
 622                 tdmaconfigidx = 3;
 623         else if (port_4_is_2500)
 624                 /* Retagging port will operate at 1 Gbps */
 625                 tdmaconfigidx = 2;
 626         else
 627                 /* Retagging port will operate at 1 Gbps */
 628                 tdmaconfigidx = 14;
 629
 630         general_params->tdmaconfigidx = tdmaconfigidx;
 631 }
 632
 633 static int sja1105_init_general_params(struct sja1105_private *priv)
 634 {
 635         struct sja1105_general_params_entry default_general_params = {
 636                 /* Allow dynamic changing of the mirror port */
 637                 .mirr_ptacu = true,
 638                 .switchid = priv->ds->index,
 639                 /* Priority queue for link-local management frames
 640                  * (both ingress to and egress from CPU - PTP, STP etc)
 641                  */
 642                 .hostprio = 7,
 643                 .mac_fltres1 = SJA1105_LINKLOCAL_FILTER_A,
 644                 .mac_flt1    = SJA1105_LINKLOCAL_FILTER_A_MASK,
 645                 .incl_srcpt1 = false,
 646                 .send_meta1  = false,
 647                 .mac_fltres0 = SJA1105_LINKLOCAL_FILTER_B,
 648                 .mac_flt0    = SJA1105_LINKLOCAL_FILTER_B_MASK,
 649                 .incl_srcpt0 = false,
 650                 .send_meta0  = false,
 651                 /* The destination for traffic matching mac_fltres1 and
 652                  * mac_fltres0 on all ports except host_port. Such traffic
 653                  * receieved on host_port itself would be dropped, except
 654                  * by installing a temporary 'management route'
 655                  */
 656                 .host_port = priv->ds->num_ports,
 657                 /* Default to an invalid value */
 658                 .mirr_port = priv->ds->num_ports,
 659                 /* No TTEthernet */
 660                 .vllupformat = SJA1105_VL_FORMAT_PSFP,
 661                 .vlmarker = 0,
 662                 .vlmask = 0,
 663                 /* Only update correctionField for 1-step PTP (L2 transport) */
 664                 .ignore2stf = 0,
 665                 /* Forcefully disable VLAN filtering by telling
 666                  * the switch that VLAN has a different EtherType.
 667                  */
 668                 .tpid = ETH_P_SJA1105,
 669                 .tpid2 = ETH_P_SJA1105,
 670                 /* Enable the TTEthernet engine on SJA1110 */
 671                 .tte_en = true,
 672                 /* Set up the EtherType for control packets on SJA1110 */
 673                 .header_type = ETH_P_SJA1110,
 674         };
 675         struct sja1105_general_params_entry *general_params;
 676         struct dsa_switch *ds = priv->ds;
 677         struct sja1105_table *table;
 678         int port;
 679
 680         for (port = 0; port < ds->num_ports; port++) {
 681                 if (dsa_is_cpu_port(ds, port)) {
 682                         default_general_params.host_port = port;
 683                         break;
 684                 }
 685         }
 686
 687         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
 688
 689         if (table->entry_count) {
 690                 kfree(table->entries);
 691                 table->entry_count = 0;
 692         }
 693
 694         table->entries = kcalloc(table->ops->max_entry_count,
 695                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 696         if (!table->entries)
 697                 return -ENOMEM;
 698
 699         table->entry_count = table->ops->max_entry_count;
 700
 701         general_params = table->entries;
 702
 703         /* This table only has a single entry */
 704         general_params[0] = default_general_params;
 705
 706         sja1110_select_tdmaconfigidx(priv);
 707
 708         /* Link-local traffic received on casc_port will be forwarded
 709          * to host_port without embedding the source port and device ID
 710          * info in the destination MAC address, and no RX timestamps will be
 711          * taken either (presumably because it is a cascaded port and a
 712          * downstream SJA switch already did that).
 713          * To disable the feature, we need to do different things depending on
 714          * switch generation. On SJA1105 we need to set an invalid port, while
 715          * on SJA1110 which support multiple cascaded ports, this field is a
 716          * bitmask so it must be left zero.
 717          */
 718         if (!priv->info->multiple_cascade_ports)
 719                 general_params->casc_port = ds->num_ports;
 720
 721         return 0;
 722 }
 723
 724 static int sja1105_init_avb_params(struct sja1105_private *priv)
 725 {
 726         struct sja1105_avb_params_entry *avb;
 727         struct sja1105_table *table;
 728
 729         table = &priv->static_config.tables[BLK_IDX_AVB_PARAMS];
 730
 731         /* Discard previous AVB Parameters Table */
 732         if (table->entry_count) {
 733                 kfree(table->entries);
 734                 table->entry_count = 0;
 735         }
 736
 737         table->entries = kcalloc(table->ops->max_entry_count,
 738                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 739         if (!table->entries)
 740                 return -ENOMEM;
 741
 742         table->entry_count = table->ops->max_entry_count;
 743
 744         avb = table->entries;
 745
 746         /* Configure the MAC addresses for meta frames */
 747         avb->destmeta = SJA1105_META_DMAC;
 748         avb->srcmeta  = SJA1105_META_SMAC;
 749         /* On P/Q/R/S, configure the direction of the PTP_CLK pin as input by
 750          * default. This is because there might be boards with a hardware
 751          * layout where enabling the pin as output might cause an electrical
 752          * clash. On E/T the pin is always an output, which the board designers
 753          * probably already knew, so even if there are going to be electrical
 754          * issues, there's nothing we can do.
 755          */
 756         avb->cas_master = false;
 757
 758         return 0;
 759 }
 760
 761 /* The L2 policing table is 2-stage. The table is looked up for each frame
 762  * according to the ingress port, whether it was broadcast or not, and the
 763  * classified traffic class (given by VLAN PCP). This portion of the lookup is
 764  * fixed, and gives access to the SHARINDX, an indirection register pointing
 765  * within the policing table itself, which is used to resolve the policer that
 766  * will be used for this frame.
 767  *
 768  *  Stage 1                              Stage 2
 769  * +------------+--------+              +---------------------------------+
 770  * |Port 0 TC 0 |SHARINDX|              | Policer 0: Rate, Burst, MTU     |
 771  * +------------+--------+              +---------------------------------+
 772  * |Port 0 TC 1 |SHARINDX|              | Policer 1: Rate, Burst, MTU     |
 773  * +------------+--------+              +---------------------------------+
 774  *    ...                               | Policer 2: Rate, Burst, MTU     |
 775  * +------------+--------+              +---------------------------------+
 776  * |Port 0 TC 7 |SHARINDX|              | Policer 3: Rate, Burst, MTU     |
 777  * +------------+--------+              +---------------------------------+
 778  * |Port 1 TC 0 |SHARINDX|              | Policer 4: Rate, Burst, MTU     |
 779  * +------------+--------+              +---------------------------------+
 780  *    ...                               | Policer 5: Rate, Burst, MTU     |
 781  * +------------+--------+              +---------------------------------+
 782  * |Port 1 TC 7 |SHARINDX|              | Policer 6: Rate, Burst, MTU     |
 783  * +------------+--------+              +---------------------------------+
 784  *    ...                               | Policer 7: Rate, Burst, MTU     |
 785  * +------------+--------+              +---------------------------------+
 786  * |Port 4 TC 7 |SHARINDX|                 ...
 787  * +------------+--------+
 788  * |Port 0 BCAST|SHARINDX|                 ...
 789  * +------------+--------+
 790  * |Port 1 BCAST|SHARINDX|                 ...
 791  * +------------+--------+
 792  *    ...                                  ...
 793  * +------------+--------+              +---------------------------------+
 794  * |Port 4 BCAST|SHARINDX|              | Policer 44: Rate, Burst, MTU    |
 795  * +------------+--------+              +---------------------------------+
 796  *
 797  * In this driver, we shall use policers 0-4 as statically alocated port
 798  * (matchall) policers. So we need to make the SHARINDX for all lookups
 799  * corresponding to this ingress port (8 VLAN PCP lookups and 1 broadcast
 800  * lookup) equal.
 801  * The remaining policers (40) shall be dynamically allocated for flower
 802  * policers, where the key is either vlan_prio or dst_mac ff:ff:ff:ff:ff:ff.
 803  */
 804 #define SJA1105_RATE_MBPS(speed) (((speed) * 64000) / 1000)
 805
 806 static int sja1105_init_l2_policing(struct sja1105_private *priv)
 807 {
 808         struct sja1105_l2_policing_entry *policing;
 809         struct dsa_switch *ds = priv->ds;
 810         struct sja1105_table *table;
 811         int port, tc;
 812
 813         table = &priv->static_config.tables[BLK_IDX_L2_POLICING];
 814
 815         /* Discard previous L2 Policing Table */
 816         if (table->entry_count) {
 817                 kfree(table->entries);
 818                 table->entry_count = 0;
 819         }
 820
 821         table->entries = kcalloc(table->ops->max_entry_count,
 822                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 823         if (!table->entries)
 824                 return -ENOMEM;
 825
 826         table->entry_count = table->ops->max_entry_count;
 827
 828         policing = table->entries;
 829
 830         /* Setup shared indices for the matchall policers */
 831         for (port = 0; port < ds->num_ports; port++) {
 832                 int mcast = (ds->num_ports * (SJA1105_NUM_TC + 1)) + port;
 833                 int bcast = (ds->num_ports * SJA1105_NUM_TC) + port;
 834
 835                 for (tc = 0; tc < SJA1105_NUM_TC; tc++)
 836                         policing[port * SJA1105_NUM_TC + tc].sharindx = port;
 837
 838                 policing[bcast].sharindx = port;
 839                 /* Only SJA1110 has multicast policers */
 840                 if (mcast <= table->ops->max_entry_count)
 841                         policing[mcast].sharindx = port;
 842         }
 843
 844         /* Setup the matchall policer parameters */
 845         for (port = 0; port < ds->num_ports; port++) {
 846                 int mtu = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
 847
 848                 if (dsa_is_cpu_port(priv->ds, port))
 849                         mtu += VLAN_HLEN;
 850
 851                 policing[port].smax = 65535; /* Burst size in bytes */
 852                 policing[port].rate = SJA1105_RATE_MBPS(1000);
 853                 policing[port].maxlen = mtu;
 854                 policing[port].partition = 0;
 855         }
 856
 857         return 0;
 858 }
 859
 860 static int sja1105_static_config_load(struct sja1105_private *priv)
 861 {
 862         int rc;
 863
 864         sja1105_static_config_free(&priv->static_config);
 865         rc = sja1105_static_config_init(&priv->static_config,
 866                                         priv->info->static_ops,
 867                                         priv->info->device_id);
 868         if (rc)
 869                 return rc;
 870
 871         /* Build static configuration */
 872         rc = sja1105_init_mac_settings(priv);
 873         if (rc < 0)
 874                 return rc;
 875         rc = sja1105_init_mii_settings(priv);
 876         if (rc < 0)
 877                 return rc;
 878         rc = sja1105_init_static_fdb(priv);
 879         if (rc < 0)
 880                 return rc;
 881         rc = sja1105_init_static_vlan(priv);
 882         if (rc < 0)
 883                 return rc;
 884         rc = sja1105_init_l2_lookup_params(priv);
 885         if (rc < 0)
 886                 return rc;
 887         rc = sja1105_init_l2_forwarding(priv);
 888         if (rc < 0)
 889                 return rc;
 890         rc = sja1105_init_l2_forwarding_params(priv);
 891         if (rc < 0)
 892                 return rc;
 893         rc = sja1105_init_l2_policing(priv);
 894         if (rc < 0)
 895                 return rc;
 896         rc = sja1105_init_general_params(priv);
 897         if (rc < 0)
 898                 return rc;
 899         rc = sja1105_init_avb_params(priv);
 900         if (rc < 0)
 901                 return rc;
 902         rc = sja1110_init_pcp_remapping(priv);
 903         if (rc < 0)
 904                 return rc;
 905
 906         /* Send initial configuration to hardware via SPI */
 907         return sja1105_static_config_upload(priv);
 908 }
 909
 910 static int sja1105_parse_rgmii_delays(struct sja1105_private *priv)
 911 {
 912         struct dsa_switch *ds = priv->ds;
 913         int port;
 914
 915         for (port = 0; port < ds->num_ports; port++) {
 916                 if (!priv->fixed_link[port])
 917                         continue;
 918
 919                 if (priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_RXID ||
 920                     priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_ID)
 921                         priv->rgmii_rx_delay[port] = true;
 922
 923                 if (priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_TXID ||
 924                     priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_ID)
 925                         priv->rgmii_tx_delay[port] = true;
 926
 927                 if ((priv->rgmii_rx_delay[port] || priv->rgmii_tx_delay[port]) &&
 928                     !priv->info->setup_rgmii_delay)
 929                         return -EINVAL;
 930         }
 931         return 0;
 932 }
 933
 934 static int sja1105_parse_ports_node(struct sja1105_private *priv,
 935                                     struct device_node *ports_node)
 936 {
 937         struct device *dev = &priv->spidev->dev;
 938         struct device_node *child;
 939
 940         for_each_available_child_of_node(ports_node, child) {
 941                 struct device_node *phy_node;
 942                 phy_interface_t phy_mode;
 943                 u32 index;
 944                 int err;
 945
 946                 /* Get switch port number from DT */
 947                 if (of_property_read_u32(child, "reg", &index) < 0) {
 948                         dev_err(dev, "Port number not defined in device tree "
 949                                 "(property \"reg\")\n");
 950                         of_node_put(child);
 951                         return -ENODEV;
 952                 }
 953
 954                 /* Get PHY mode from DT */
 955                 err = of_get_phy_mode(child, &phy_mode);
 956                 if (err) {
 957                         dev_err(dev, "Failed to read phy-mode or "
 958                                 "phy-interface-type property for port %d\n",
 959                                 index);
 960                         of_node_put(child);
 961                         return -ENODEV;
 962                 }
 963
 964                 phy_node = of_parse_phandle(child, "phy-handle", 0);
 965                 if (!phy_node) {
 966                         if (!of_phy_is_fixed_link(child)) {
 967                                 dev_err(dev, "phy-handle or fixed-link "
 968                                         "properties missing!\n");
 969                                 of_node_put(child);
 970                                 return -ENODEV;
 971                         }
 972                         /* phy-handle is missing, but fixed-link isn't.
 973                          * So it's a fixed link. Default to PHY role.
 974                          */
 975                         priv->fixed_link[index] = true;
 976                 } else {
 977                         of_node_put(phy_node);
 978                 }
 979
 980                 priv->phy_mode[index] = phy_mode;
 981         }
 982
 983         return 0;
 984 }
 985
 986 static int sja1105_parse_dt(struct sja1105_private *priv)
 987 {
 988         struct device *dev = &priv->spidev->dev;
 989         struct device_node *switch_node = dev->of_node;
 990         struct device_node *ports_node;
 991         int rc;
 992
 993         ports_node = of_get_child_by_name(switch_node, "ports");
 994         if (!ports_node)
 995                 ports_node = of_get_child_by_name(switch_node, "ethernet-ports");
 996         if (!ports_node) {
 997                 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n");
 998                 return -ENODEV;
 999         }
1000
1001         rc = sja1105_parse_ports_node(priv, ports_node);
1002         of_node_put(ports_node);
1003
1004         return rc;
1005 }
1006
1007 /* Convert link speed from SJA1105 to ethtool encoding */
1008 static int sja1105_port_speed_to_ethtool(struct sja1105_private *priv,
1009                                          u64 speed)
1010 {
1011         if (speed == priv->info->port_speed[SJA1105_SPEED_10MBPS])
1012                 return SPEED_10;
1013         if (speed == priv->info->port_speed[SJA1105_SPEED_100MBPS])
1014                 return SPEED_100;
1015         if (speed == priv->info->port_speed[SJA1105_SPEED_1000MBPS])
1016                 return SPEED_1000;
1017         if (speed == priv->info->port_speed[SJA1105_SPEED_2500MBPS])
1018                 return SPEED_2500;
1019         return SPEED_UNKNOWN;
1020 }
1021
1022 /* Set link speed in the MAC configuration for a specific port. */
1023 static int sja1105_adjust_port_config(struct sja1105_private *priv, int port,
1024                                       int speed_mbps)
1025 {
1026         struct sja1105_mac_config_entry *mac;
1027         struct device *dev = priv->ds->dev;
1028         u64 speed;
1029         int rc;
1030
1031         /* On P/Q/R/S, one can read from the device via the MAC reconfiguration
1032          * tables. On E/T, MAC reconfig tables are not readable, only writable.
1033          * We have to *know* what the MAC looks like.  For the sake of keeping
1034          * the code common, we'll use the static configuration tables as a
1035          * reasonable approximation for both E/T and P/Q/R/S.
1036          */
1037         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1038
1039         switch (speed_mbps) {
1040         case SPEED_UNKNOWN:
1041                 /* PHYLINK called sja1105_mac_config() to inform us about
1042                  * the state->interface, but AN has not completed and the
1043                  * speed is not yet valid. UM10944.pdf says that setting
1044                  * SJA1105_SPEED_AUTO at runtime disables the port, so that is
1045                  * ok for power consumption in case AN will never complete -
1046                  * otherwise PHYLINK should come back with a new update.
1047                  */
1048                 speed = priv->info->port_speed[SJA1105_SPEED_AUTO];
1049                 break;
1050         case SPEED_10:
1051                 speed = priv->info->port_speed[SJA1105_SPEED_10MBPS];
1052                 break;
1053         case SPEED_100:
1054                 speed = priv->info->port_speed[SJA1105_SPEED_100MBPS];
1055                 break;
1056         case SPEED_1000:
1057                 speed = priv->info->port_speed[SJA1105_SPEED_1000MBPS];
1058                 break;
1059         case SPEED_2500:
1060                 speed = priv->info->port_speed[SJA1105_SPEED_2500MBPS];
1061                 break;
1062         default:
1063                 dev_err(dev, "Invalid speed %iMbps\n", speed_mbps);
1064                 return -EINVAL;
1065         }
1066
1067         /* Overwrite SJA1105_SPEED_AUTO from the static MAC configuration
1068          * table, since this will be used for the clocking setup, and we no
1069          * longer need to store it in the static config (already told hardware
1070          * we want auto during upload phase).
1071          * Actually for the SGMII port, the MAC is fixed at 1 Gbps and
1072          * we need to configure the PCS only (if even that).
1073          */
1074         if (priv->phy_mode[port] == PHY_INTERFACE_MODE_SGMII)
1075                 mac[port].speed = priv->info->port_speed[SJA1105_SPEED_1000MBPS];
1076         else if (priv->phy_mode[port] == PHY_INTERFACE_MODE_2500BASEX)
1077                 mac[port].speed = priv->info->port_speed[SJA1105_SPEED_2500MBPS];
1078         else
1079                 mac[port].speed = speed;
1080
1081         /* Write to the dynamic reconfiguration tables */
1082         rc = sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1083                                           &mac[port], true);
1084         if (rc < 0) {
1085                 dev_err(dev, "Failed to write MAC config: %d\n", rc);
1086                 return rc;
1087         }
1088
1089         /* Reconfigure the PLLs for the RGMII interfaces (required 125 MHz at
1090          * gigabit, 25 MHz at 100 Mbps and 2.5 MHz at 10 Mbps). For MII and
1091          * RMII no change of the clock setup is required. Actually, changing
1092          * the clock setup does interrupt the clock signal for a certain time
1093          * which causes trouble for all PHYs relying on this signal.
1094          */
1095         if (!phy_interface_mode_is_rgmii(priv->phy_mode[port]))
1096                 return 0;
1097
1098         return sja1105_clocking_setup_port(priv, port);
1099 }
1100
1101 /* The SJA1105 MAC programming model is through the static config (the xMII
1102  * Mode table cannot be dynamically reconfigured), and we have to program
1103  * that early (earlier than PHYLINK calls us, anyway).
1104  * So just error out in case the connected PHY attempts to change the initial
1105  * system interface MII protocol from what is defined in the DT, at least for
1106  * now.
1107  */
1108 static bool sja1105_phy_mode_mismatch(struct sja1105_private *priv, int port,
1109                                       phy_interface_t interface)
1110 {
1111         return priv->phy_mode[port] != interface;
1112 }
1113
1114 static void sja1105_mac_config(struct dsa_switch *ds, int port,
1115                                unsigned int mode,
1116                                const struct phylink_link_state *state)
1117 {
1118         struct dsa_port *dp = dsa_to_port(ds, port);
1119         struct sja1105_private *priv = ds->priv;
1120         struct dw_xpcs *xpcs;
1121
1122         if (sja1105_phy_mode_mismatch(priv, port, state->interface)) {
1123                 dev_err(ds->dev, "Changing PHY mode to %s not supported!\n",
1124                         phy_modes(state->interface));
1125                 return;
1126         }
1127
1128         xpcs = priv->xpcs[port];
1129
1130         if (xpcs)
1131                 phylink_set_pcs(dp->pl, &xpcs->pcs);
1132 }
1133
1134 static void sja1105_mac_link_down(struct dsa_switch *ds, int port,
1135                                   unsigned int mode,
1136                                   phy_interface_t interface)
1137 {
1138         sja1105_inhibit_tx(ds->priv, BIT(port), true);
1139 }
1140
1141 static void sja1105_mac_link_up(struct dsa_switch *ds, int port,
1142                                 unsigned int mode,
1143                                 phy_interface_t interface,
1144                                 struct phy_device *phydev,
1145                                 int speed, int duplex,
1146                                 bool tx_pause, bool rx_pause)
1147 {
1148         struct sja1105_private *priv = ds->priv;
1149
1150         sja1105_adjust_port_config(priv, port, speed);
1151
1152         sja1105_inhibit_tx(priv, BIT(port), false);
1153 }
1154
1155 static void sja1105_phylink_validate(struct dsa_switch *ds, int port,
1156                                      unsigned long *supported,
1157                                      struct phylink_link_state *state)
1158 {
1159         /* Construct a new mask which exhaustively contains all link features
1160          * supported by the MAC, and then apply that (logical AND) to what will
1161          * be sent to the PHY for "marketing".
1162          */
1163         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
1164         struct sja1105_private *priv = ds->priv;
1165         struct sja1105_xmii_params_entry *mii;
1166
1167         mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
1168
1169         /* include/linux/phylink.h says:
1170          *     When @state->interface is %PHY_INTERFACE_MODE_NA, phylink
1171          *     expects the MAC driver to return all supported link modes.
1172          */
1173         if (state->interface != PHY_INTERFACE_MODE_NA &&
1174             sja1105_phy_mode_mismatch(priv, port, state->interface)) {
1175                 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
1176                 return;
1177         }
1178
1179         /* The MAC does not support pause frames, and also doesn't
1180          * support half-duplex traffic modes.
1181          */
1182         phylink_set(mask, Autoneg);
1183         phylink_set(mask, MII);
1184         phylink_set(mask, 10baseT_Full);
1185         phylink_set(mask, 100baseT_Full);
1186         phylink_set(mask, 100baseT1_Full);
1187         if (mii->xmii_mode[port] == XMII_MODE_RGMII ||
1188             mii->xmii_mode[port] == XMII_MODE_SGMII)
1189                 phylink_set(mask, 1000baseT_Full);
1190         if (priv->info->supports_2500basex[port]) {
1191                 phylink_set(mask, 2500baseT_Full);
1192                 phylink_set(mask, 2500baseX_Full);
1193         }
1194
1195         bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS);
1196         bitmap_and(state->advertising, state->advertising, mask,
1197                    __ETHTOOL_LINK_MODE_MASK_NBITS);
1198 }
1199
1200 static int
1201 sja1105_find_static_fdb_entry(struct sja1105_private *priv, int port,
1202                               const struct sja1105_l2_lookup_entry *requested)
1203 {
1204         struct sja1105_l2_lookup_entry *l2_lookup;
1205         struct sja1105_table *table;
1206         int i;
1207
1208         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
1209         l2_lookup = table->entries;
1210
1211         for (i = 0; i < table->entry_count; i++)
1212                 if (l2_lookup[i].macaddr == requested->macaddr &&
1213                     l2_lookup[i].vlanid == requested->vlanid &&
1214                     l2_lookup[i].destports & BIT(port))
1215                         return i;
1216
1217         return -1;
1218 }
1219
1220 /* We want FDB entries added statically through the bridge command to persist
1221  * across switch resets, which are a common thing during normal SJA1105
1222  * operation. So we have to back them up in the static configuration tables
1223  * and hence apply them on next static config upload... yay!
1224  */
1225 static int
1226 sja1105_static_fdb_change(struct sja1105_private *priv, int port,
1227                           const struct sja1105_l2_lookup_entry *requested,
1228                           bool keep)
1229 {
1230         struct sja1105_l2_lookup_entry *l2_lookup;
1231         struct sja1105_table *table;
1232         int rc, match;
1233
1234         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
1235
1236         match = sja1105_find_static_fdb_entry(priv, port, requested);
1237         if (match < 0) {
1238                 /* Can't delete a missing entry. */
1239                 if (!keep)
1240                         return 0;
1241
1242                 /* No match => new entry */
1243                 rc = sja1105_table_resize(table, table->entry_count + 1);
1244                 if (rc)
1245                         return rc;
1246
1247                 match = table->entry_count - 1;
1248         }
1249
1250         /* Assign pointer after the resize (it may be new memory) */
1251         l2_lookup = table->entries;
1252
1253         /* We have a match.
1254          * If the job was to add this FDB entry, it's already done (mostly
1255          * anyway, since the port forwarding mask may have changed, case in
1256          * which we update it).
1257          * Otherwise we have to delete it.
1258          */
1259         if (keep) {
1260                 l2_lookup[match] = *requested;
1261                 return 0;
1262         }
1263
1264         /* To remove, the strategy is to overwrite the element with
1265          * the last one, and then reduce the array size by 1
1266          */
1267         l2_lookup[match] = l2_lookup[table->entry_count - 1];
1268         return sja1105_table_resize(table, table->entry_count - 1);
1269 }
1270
1271 /* First-generation switches have a 4-way set associative TCAM that
1272  * holds the FDB entries. An FDB index spans from 0 to 1023 and is comprised of
1273  * a "bin" (grouping of 4 entries) and a "way" (an entry within a bin).
1274  * For the placement of a newly learnt FDB entry, the switch selects the bin
1275  * based on a hash function, and the way within that bin incrementally.
1276  */
1277 static int sja1105et_fdb_index(int bin, int way)
1278 {
1279         return bin * SJA1105ET_FDB_BIN_SIZE + way;
1280 }
1281
1282 static int sja1105et_is_fdb_entry_in_bin(struct sja1105_private *priv, int bin,
1283                                          const u8 *addr, u16 vid,
1284                                          struct sja1105_l2_lookup_entry *match,
1285                                          int *last_unused)
1286 {
1287         int way;
1288
1289         for (way = 0; way < SJA1105ET_FDB_BIN_SIZE; way++) {
1290                 struct sja1105_l2_lookup_entry l2_lookup = {0};
1291                 int index = sja1105et_fdb_index(bin, way);
1292
1293                 /* Skip unused entries, optionally marking them
1294                  * into the return value
1295                  */
1296                 if (sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1297                                                 index, &l2_lookup)) {
1298                         if (last_unused)
1299                                 *last_unused = way;
1300                         continue;
1301                 }
1302
1303                 if (l2_lookup.macaddr == ether_addr_to_u64(addr) &&
1304                     l2_lookup.vlanid == vid) {
1305                         if (match)
1306                                 *match = l2_lookup;
1307                         return way;
1308                 }
1309         }
1310         /* Return an invalid entry index if not found */
1311         return -1;
1312 }
1313
1314 int sja1105et_fdb_add(struct dsa_switch *ds, int port,
1315                       const unsigned char *addr, u16 vid)
1316 {
1317         struct sja1105_l2_lookup_entry l2_lookup = {0};
1318         struct sja1105_private *priv = ds->priv;
1319         struct device *dev = ds->dev;
1320         int last_unused = -1;
1321         int bin, way, rc;
1322
1323         bin = sja1105et_fdb_hash(priv, addr, vid);
1324
1325         way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
1326                                             &l2_lookup, &last_unused);
1327         if (way >= 0) {
1328                 /* We have an FDB entry. Is our port in the destination
1329                  * mask? If yes, we need to do nothing. If not, we need
1330                  * to rewrite the entry by adding this port to it.
1331                  */
1332                 if (l2_lookup.destports & BIT(port))
1333                         return 0;
1334                 l2_lookup.destports |= BIT(port);
1335         } else {
1336                 int index = sja1105et_fdb_index(bin, way);
1337
1338                 /* We don't have an FDB entry. We construct a new one and
1339                  * try to find a place for it within the FDB table.
1340                  */
1341                 l2_lookup.macaddr = ether_addr_to_u64(addr);
1342                 l2_lookup.destports = BIT(port);
1343                 l2_lookup.vlanid = vid;
1344
1345                 if (last_unused >= 0) {
1346                         way = last_unused;
1347                 } else {
1348                         /* Bin is full, need to evict somebody.
1349                          * Choose victim at random. If you get these messages
1350                          * often, you may need to consider changing the
1351                          * distribution function:
1352                          * static_config[BLK_IDX_L2_LOOKUP_PARAMS].entries->poly
1353                          */
1354                         get_random_bytes(&way, sizeof(u8));
1355                         way %= SJA1105ET_FDB_BIN_SIZE;
1356                         dev_warn(dev, "Warning, FDB bin %d full while adding entry for %pM. Evicting entry %u.\n",
1357                                  bin, addr, way);
1358                         /* Evict entry */
1359                         sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1360                                                      index, NULL, false);
1361                 }
1362         }
1363         l2_lookup.index = sja1105et_fdb_index(bin, way);
1364
1365         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1366                                           l2_lookup.index, &l2_lookup,
1367                                           true);
1368         if (rc < 0)
1369                 return rc;
1370
1371         return sja1105_static_fdb_change(priv, port, &l2_lookup, true);
1372 }
1373
1374 int sja1105et_fdb_del(struct dsa_switch *ds, int port,
1375                       const unsigned char *addr, u16 vid)
1376 {
1377         struct sja1105_l2_lookup_entry l2_lookup = {0};
1378         struct sja1105_private *priv = ds->priv;
1379         int index, bin, way, rc;
1380         bool keep;
1381
1382         bin = sja1105et_fdb_hash(priv, addr, vid);
1383         way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
1384                                             &l2_lookup, NULL);
1385         if (way < 0)
1386                 return 0;
1387         index = sja1105et_fdb_index(bin, way);
1388
1389         /* We have an FDB entry. Is our port in the destination mask? If yes,
1390          * we need to remove it. If the resulting port mask becomes empty, we
1391          * need to completely evict the FDB entry.
1392          * Otherwise we just write it back.
1393          */
1394         l2_lookup.destports &= ~BIT(port);
1395
1396         if (l2_lookup.destports)
1397                 keep = true;
1398         else
1399                 keep = false;
1400
1401         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1402                                           index, &l2_lookup, keep);
1403         if (rc < 0)
1404                 return rc;
1405
1406         return sja1105_static_fdb_change(priv, port, &l2_lookup, keep);
1407 }
1408
1409 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port,
1410                         const unsigned char *addr, u16 vid)
1411 {
1412         struct sja1105_l2_lookup_entry l2_lookup = {0};
1413         struct sja1105_private *priv = ds->priv;
1414         int rc, i;
1415
1416         /* Search for an existing entry in the FDB table */
1417         l2_lookup.macaddr = ether_addr_to_u64(addr);
1418         l2_lookup.vlanid = vid;
1419         l2_lookup.iotag = SJA1105_S_TAG;
1420         l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1421         if (priv->vlan_state != SJA1105_VLAN_UNAWARE) {
1422                 l2_lookup.mask_vlanid = VLAN_VID_MASK;
1423                 l2_lookup.mask_iotag = BIT(0);
1424         } else {
1425                 l2_lookup.mask_vlanid = 0;
1426                 l2_lookup.mask_iotag = 0;
1427         }
1428         l2_lookup.destports = BIT(port);
1429
1430         rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1431                                          SJA1105_SEARCH, &l2_lookup);
1432         if (rc == 0) {
1433                 /* Found and this port is already in the entry's
1434                  * port mask => job done
1435                  */
1436                 if (l2_lookup.destports & BIT(port))
1437                         return 0;
1438                 /* l2_lookup.index is populated by the switch in case it
1439                  * found something.
1440                  */
1441                 l2_lookup.destports |= BIT(port);
1442                 goto skip_finding_an_index;
1443         }
1444
1445         /* Not found, so try to find an unused spot in the FDB.
1446          * This is slightly inefficient because the strategy is knock-knock at
1447          * every possible position from 0 to 1023.
1448          */
1449         for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
1450                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1451                                                  i, NULL);
1452                 if (rc < 0)
1453                         break;
1454         }
1455         if (i == SJA1105_MAX_L2_LOOKUP_COUNT) {
1456                 dev_err(ds->dev, "FDB is full, cannot add entry.\n");
1457                 return -EINVAL;
1458         }
1459         l2_lookup.lockeds = true;
1460         l2_lookup.index = i;
1461
1462 skip_finding_an_index:
1463         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1464                                           l2_lookup.index, &l2_lookup,
1465                                           true);
1466         if (rc < 0)
1467                 return rc;
1468
1469         return sja1105_static_fdb_change(priv, port, &l2_lookup, true);
1470 }
1471
1472 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port,
1473                         const unsigned char *addr, u16 vid)
1474 {
1475         struct sja1105_l2_lookup_entry l2_lookup = {0};
1476         struct sja1105_private *priv = ds->priv;
1477         bool keep;
1478         int rc;
1479
1480         l2_lookup.macaddr = ether_addr_to_u64(addr);
1481         l2_lookup.vlanid = vid;
1482         l2_lookup.iotag = SJA1105_S_TAG;
1483         l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1484         if (priv->vlan_state != SJA1105_VLAN_UNAWARE) {
1485                 l2_lookup.mask_vlanid = VLAN_VID_MASK;
1486                 l2_lookup.mask_iotag = BIT(0);
1487         } else {
1488                 l2_lookup.mask_vlanid = 0;
1489                 l2_lookup.mask_iotag = 0;
1490         }
1491         l2_lookup.destports = BIT(port);
1492
1493         rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1494                                          SJA1105_SEARCH, &l2_lookup);
1495         if (rc < 0)
1496                 return 0;
1497
1498         l2_lookup.destports &= ~BIT(port);
1499
1500         /* Decide whether we remove just this port from the FDB entry,
1501          * or if we remove it completely.
1502          */
1503         if (l2_lookup.destports)
1504                 keep = true;
1505         else
1506                 keep = false;
1507
1508         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1509                                           l2_lookup.index, &l2_lookup, keep);
1510         if (rc < 0)
1511                 return rc;
1512
1513         return sja1105_static_fdb_change(priv, port, &l2_lookup, keep);
1514 }
1515
1516 static int sja1105_fdb_add(struct dsa_switch *ds, int port,
1517                            const unsigned char *addr, u16 vid)
1518 {
1519         struct sja1105_private *priv = ds->priv;
1520
1521         /* dsa_8021q is in effect when the bridge's vlan_filtering isn't,
1522          * so the switch still does some VLAN processing internally.
1523          * But Shared VLAN Learning (SVL) is also active, and it will take
1524          * care of autonomous forwarding between the unique pvid's of each
1525          * port.  Here we just make sure that users can't add duplicate FDB
1526          * entries when in this mode - the actual VID doesn't matter except
1527          * for what gets printed in 'bridge fdb show'.  In the case of zero,
1528          * no VID gets printed at all.
1529          */
1530         if (priv->vlan_state != SJA1105_VLAN_FILTERING_FULL)
1531                 vid = 0;
1532
1533         return priv->info->fdb_add_cmd(ds, port, addr, vid);
1534 }
1535
1536 static int sja1105_fdb_del(struct dsa_switch *ds, int port,
1537                            const unsigned char *addr, u16 vid)
1538 {
1539         struct sja1105_private *priv = ds->priv;
1540
1541         if (priv->vlan_state != SJA1105_VLAN_FILTERING_FULL)
1542                 vid = 0;
1543
1544         return priv->info->fdb_del_cmd(ds, port, addr, vid);
1545 }
1546
1547 static int sja1105_fdb_dump(struct dsa_switch *ds, int port,
1548                             dsa_fdb_dump_cb_t *cb, void *data)
1549 {
1550         struct sja1105_private *priv = ds->priv;
1551         struct device *dev = ds->dev;
1552         int i;
1553
1554         for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
1555                 struct sja1105_l2_lookup_entry l2_lookup = {0};
1556                 u8 macaddr[ETH_ALEN];
1557                 int rc;
1558
1559                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1560                                                  i, &l2_lookup);
1561                 /* No fdb entry at i, not an issue */
1562                 if (rc == -ENOENT)
1563                         continue;
1564                 if (rc) {
1565                         dev_err(dev, "Failed to dump FDB: %d\n", rc);
1566                         return rc;
1567                 }
1568
1569                 /* FDB dump callback is per port. This means we have to
1570                  * disregard a valid entry if it's not for this port, even if
1571                  * only to revisit it later. This is inefficient because the
1572                  * 1024-sized FDB table needs to be traversed 4 times through
1573                  * SPI during a 'bridge fdb show' command.
1574                  */
1575                 if (!(l2_lookup.destports & BIT(port)))
1576                         continue;
1577
1578                 /* We need to hide the FDB entry for unknown multicast */
1579                 if (l2_lookup.macaddr == SJA1105_UNKNOWN_MULTICAST &&
1580                     l2_lookup.mask_macaddr == SJA1105_UNKNOWN_MULTICAST)
1581                         continue;
1582
1583                 u64_to_ether_addr(l2_lookup.macaddr, macaddr);
1584
1585                 /* We need to hide the dsa_8021q VLANs from the user. */
1586                 if (priv->vlan_state == SJA1105_VLAN_UNAWARE)
1587                         l2_lookup.vlanid = 0;
1588                 cb(macaddr, l2_lookup.vlanid, l2_lookup.lockeds, data);
1589         }
1590         return 0;
1591 }
1592
1593 static int sja1105_mdb_add(struct dsa_switch *ds, int port,
1594                            const struct switchdev_obj_port_mdb *mdb)
1595 {
1596         return sja1105_fdb_add(ds, port, mdb->addr, mdb->vid);
1597 }
1598
1599 static int sja1105_mdb_del(struct dsa_switch *ds, int port,
1600                            const struct switchdev_obj_port_mdb *mdb)
1601 {
1602         return sja1105_fdb_del(ds, port, mdb->addr, mdb->vid);
1603 }
1604
1605 /* Common function for unicast and broadcast flood configuration.
1606  * Flooding is configured between each {ingress, egress} port pair, and since
1607  * the bridge's semantics are those of "egress flooding", it means we must
1608  * enable flooding towards this port from all ingress ports that are in the
1609  * same forwarding domain.
1610  */
1611 static int sja1105_manage_flood_domains(struct sja1105_private *priv)
1612 {
1613         struct sja1105_l2_forwarding_entry *l2_fwd;
1614         struct dsa_switch *ds = priv->ds;
1615         int from, to, rc;
1616
1617         l2_fwd = priv->static_config.tables[BLK_IDX_L2_FORWARDING].entries;
1618
1619         for (from = 0; from < ds->num_ports; from++) {
1620                 u64 fl_domain = 0, bc_domain = 0;
1621
1622                 for (to = 0; to < priv->ds->num_ports; to++) {
1623                         if (!sja1105_can_forward(l2_fwd, from, to))
1624                                 continue;
1625
1626                         if (priv->ucast_egress_floods & BIT(to))
1627                                 fl_domain |= BIT(to);
1628                         if (priv->bcast_egress_floods & BIT(to))
1629                                 bc_domain |= BIT(to);
1630                 }
1631
1632                 /* Nothing changed, nothing to do */
1633                 if (l2_fwd[from].fl_domain == fl_domain &&
1634                     l2_fwd[from].bc_domain == bc_domain)
1635                         continue;
1636
1637                 l2_fwd[from].fl_domain = fl_domain;
1638                 l2_fwd[from].bc_domain = bc_domain;
1639
1640                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1641                                                   from, &l2_fwd[from], true);
1642                 if (rc < 0)
1643                         return rc;
1644         }
1645
1646         return 0;
1647 }
1648
1649 static int sja1105_bridge_member(struct dsa_switch *ds, int port,
1650                                  struct net_device *br, bool member)
1651 {
1652         struct sja1105_l2_forwarding_entry *l2_fwd;
1653         struct sja1105_private *priv = ds->priv;
1654         int i, rc;
1655
1656         l2_fwd = priv->static_config.tables[BLK_IDX_L2_FORWARDING].entries;
1657
1658         for (i = 0; i < ds->num_ports; i++) {
1659                 /* Add this port to the forwarding matrix of the
1660                  * other ports in the same bridge, and viceversa.
1661                  */
1662                 if (!dsa_is_user_port(ds, i))
1663                         continue;
1664                 /* For the ports already under the bridge, only one thing needs
1665                  * to be done, and that is to add this port to their
1666                  * reachability domain. So we can perform the SPI write for
1667                  * them immediately. However, for this port itself (the one
1668                  * that is new to the bridge), we need to add all other ports
1669                  * to its reachability domain. So we do that incrementally in
1670                  * this loop, and perform the SPI write only at the end, once
1671                  * the domain contains all other bridge ports.
1672                  */
1673                 if (i == port)
1674                         continue;
1675                 if (dsa_to_port(ds, i)->bridge_dev != br)
1676                         continue;
1677                 sja1105_port_allow_traffic(l2_fwd, i, port, member);
1678                 sja1105_port_allow_traffic(l2_fwd, port, i, member);
1679
1680                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1681                                                   i, &l2_fwd[i], true);
1682                 if (rc < 0)
1683                         return rc;
1684         }
1685
1686         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1687                                           port, &l2_fwd[port], true);
1688         if (rc)
1689                 return rc;
1690
1691         return sja1105_manage_flood_domains(priv);
1692 }
1693
1694 static void sja1105_bridge_stp_state_set(struct dsa_switch *ds, int port,
1695                                          u8 state)
1696 {
1697         struct sja1105_private *priv = ds->priv;
1698         struct sja1105_mac_config_entry *mac;
1699
1700         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1701
1702         switch (state) {
1703         case BR_STATE_DISABLED:
1704         case BR_STATE_BLOCKING:
1705                 /* From UM10944 description of DRPDTAG (why put this there?):
1706                  * "Management traffic flows to the port regardless of the state
1707                  * of the INGRESS flag". So BPDUs are still be allowed to pass.
1708                  * At the moment no difference between DISABLED and BLOCKING.
1709                  */
1710                 mac[port].ingress   = false;
1711                 mac[port].egress    = false;
1712                 mac[port].dyn_learn = false;
1713                 break;
1714         case BR_STATE_LISTENING:
1715                 mac[port].ingress   = true;
1716                 mac[port].egress    = false;
1717                 mac[port].dyn_learn = false;
1718                 break;
1719         case BR_STATE_LEARNING:
1720                 mac[port].ingress   = true;
1721                 mac[port].egress    = false;
1722                 mac[port].dyn_learn = !!(priv->learn_ena & BIT(port));
1723                 break;
1724         case BR_STATE_FORWARDING:
1725                 mac[port].ingress   = true;
1726                 mac[port].egress    = true;
1727                 mac[port].dyn_learn = !!(priv->learn_ena & BIT(port));
1728                 break;
1729         default:
1730                 dev_err(ds->dev, "invalid STP state: %d\n", state);
1731                 return;
1732         }
1733
1734         sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1735                                      &mac[port], true);
1736 }
1737
1738 static int sja1105_bridge_join(struct dsa_switch *ds, int port,
1739                                struct net_device *br)
1740 {
1741         return sja1105_bridge_member(ds, port, br, true);
1742 }
1743
1744 static void sja1105_bridge_leave(struct dsa_switch *ds, int port,
1745                                  struct net_device *br)
1746 {
1747         sja1105_bridge_member(ds, port, br, false);
1748 }
1749
1750 #define BYTES_PER_KBIT (1000LL / 8)
1751
1752 static int sja1105_find_unused_cbs_shaper(struct sja1105_private *priv)
1753 {
1754         int i;
1755
1756         for (i = 0; i < priv->info->num_cbs_shapers; i++)
1757                 if (!priv->cbs[i].idle_slope && !priv->cbs[i].send_slope)
1758                         return i;
1759
1760         return -1;
1761 }
1762
1763 static int sja1105_delete_cbs_shaper(struct sja1105_private *priv, int port,
1764                                      int prio)
1765 {
1766         int i;
1767
1768         for (i = 0; i < priv->info->num_cbs_shapers; i++) {
1769                 struct sja1105_cbs_entry *cbs = &priv->cbs[i];
1770
1771                 if (cbs->port == port && cbs->prio == prio) {
1772                         memset(cbs, 0, sizeof(*cbs));
1773                         return sja1105_dynamic_config_write(priv, BLK_IDX_CBS,
1774                                                             i, cbs, true);
1775                 }
1776         }
1777
1778         return 0;
1779 }
1780
1781 static int sja1105_setup_tc_cbs(struct dsa_switch *ds, int port,
1782                                 struct tc_cbs_qopt_offload *offload)
1783 {
1784         struct sja1105_private *priv = ds->priv;
1785         struct sja1105_cbs_entry *cbs;
1786         int index;
1787
1788         if (!offload->enable)
1789                 return sja1105_delete_cbs_shaper(priv, port, offload->queue);
1790
1791         index = sja1105_find_unused_cbs_shaper(priv);
1792         if (index < 0)
1793                 return -ENOSPC;
1794
1795         cbs = &priv->cbs[index];
1796         cbs->port = port;
1797         cbs->prio = offload->queue;
1798         /* locredit and sendslope are negative by definition. In hardware,
1799          * positive values must be provided, and the negative sign is implicit.
1800          */
1801         cbs->credit_hi = offload->hicredit;
1802         cbs->credit_lo = abs(offload->locredit);
1803         /* User space is in kbits/sec, hardware in bytes/sec */
1804         cbs->idle_slope = offload->idleslope * BYTES_PER_KBIT;
1805         cbs->send_slope = abs(offload->sendslope * BYTES_PER_KBIT);
1806         /* Convert the negative values from 64-bit 2's complement
1807          * to 32-bit 2's complement (for the case of 0x80000000 whose
1808          * negative is still negative).
1809          */
1810         cbs->credit_lo &= GENMASK_ULL(31, 0);
1811         cbs->send_slope &= GENMASK_ULL(31, 0);
1812
1813         return sja1105_dynamic_config_write(priv, BLK_IDX_CBS, index, cbs,
1814                                             true);
1815 }
1816
1817 static int sja1105_reload_cbs(struct sja1105_private *priv)
1818 {
1819         int rc = 0, i;
1820
1821         /* The credit based shapers are only allocated if
1822          * CONFIG_NET_SCH_CBS is enabled.
1823          */
1824         if (!priv->cbs)
1825                 return 0;
1826
1827         for (i = 0; i < priv->info->num_cbs_shapers; i++) {
1828                 struct sja1105_cbs_entry *cbs = &priv->cbs[i];
1829
1830                 if (!cbs->idle_slope && !cbs->send_slope)
1831                         continue;
1832
1833                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_CBS, i, cbs,
1834                                                   true);
1835                 if (rc)
1836                         break;
1837         }
1838
1839         return rc;
1840 }
1841
1842 static const char * const sja1105_reset_reasons[] = {
1843         [SJA1105_VLAN_FILTERING] = "VLAN filtering",
1844         [SJA1105_RX_HWTSTAMPING] = "RX timestamping",
1845         [SJA1105_AGEING_TIME] = "Ageing time",
1846         [SJA1105_SCHEDULING] = "Time-aware scheduling",
1847         [SJA1105_BEST_EFFORT_POLICING] = "Best-effort policing",
1848         [SJA1105_VIRTUAL_LINKS] = "Virtual links",
1849 };
1850
1851 /* For situations where we need to change a setting at runtime that is only
1852  * available through the static configuration, resetting the switch in order
1853  * to upload the new static config is unavoidable. Back up the settings we
1854  * modify at runtime (currently only MAC) and restore them after uploading,
1855  * such that this operation is relatively seamless.
1856  */
1857 int sja1105_static_config_reload(struct sja1105_private *priv,
1858                                  enum sja1105_reset_reason reason)
1859 {
1860         struct ptp_system_timestamp ptp_sts_before;
1861         struct ptp_system_timestamp ptp_sts_after;
1862         int speed_mbps[SJA1105_MAX_NUM_PORTS];
1863         u16 bmcr[SJA1105_MAX_NUM_PORTS] = {0};
1864         struct sja1105_mac_config_entry *mac;
1865         struct dsa_switch *ds = priv->ds;
1866         s64 t1, t2, t3, t4;
1867         s64 t12, t34;
1868         int rc, i;
1869         s64 now;
1870
1871         mutex_lock(&priv->mgmt_lock);
1872
1873         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1874
1875         /* Back up the dynamic link speed changed by sja1105_adjust_port_config
1876          * in order to temporarily restore it to SJA1105_SPEED_AUTO - which the
1877          * switch wants to see in the static config in order to allow us to
1878          * change it through the dynamic interface later.
1879          */
1880         for (i = 0; i < ds->num_ports; i++) {
1881                 u32 reg_addr = mdiobus_c45_addr(MDIO_MMD_VEND2, MDIO_CTRL1);
1882
1883                 speed_mbps[i] = sja1105_port_speed_to_ethtool(priv,
1884                                                               mac[i].speed);
1885                 mac[i].speed = priv->info->port_speed[SJA1105_SPEED_AUTO];
1886
1887                 if (priv->xpcs[i])
1888                         bmcr[i] = mdiobus_read(priv->mdio_pcs, i, reg_addr);
1889         }
1890
1891         /* No PTP operations can run right now */
1892         mutex_lock(&priv->ptp_data.lock);
1893
1894         rc = __sja1105_ptp_gettimex(ds, &now, &ptp_sts_before);
1895         if (rc < 0) {
1896                 mutex_unlock(&priv->ptp_data.lock);
1897                 goto out;
1898         }
1899
1900         /* Reset switch and send updated static configuration */
1901         rc = sja1105_static_config_upload(priv);
1902         if (rc < 0) {
1903                 mutex_unlock(&priv->ptp_data.lock);
1904                 goto out;
1905         }
1906
1907         rc = __sja1105_ptp_settime(ds, 0, &ptp_sts_after);
1908         if (rc < 0) {
1909                 mutex_unlock(&priv->ptp_data.lock);
1910                 goto out;
1911         }
1912
1913         t1 = timespec64_to_ns(&ptp_sts_before.pre_ts);
1914         t2 = timespec64_to_ns(&ptp_sts_before.post_ts);
1915         t3 = timespec64_to_ns(&ptp_sts_after.pre_ts);
1916         t4 = timespec64_to_ns(&ptp_sts_after.post_ts);
1917         /* Mid point, corresponds to pre-reset PTPCLKVAL */
1918         t12 = t1 + (t2 - t1) / 2;
1919         /* Mid point, corresponds to post-reset PTPCLKVAL, aka 0 */
1920         t34 = t3 + (t4 - t3) / 2;
1921         /* Advance PTPCLKVAL by the time it took since its readout */
1922         now += (t34 - t12);
1923
1924         __sja1105_ptp_adjtime(ds, now);
1925
1926         mutex_unlock(&priv->ptp_data.lock);
1927
1928         dev_info(priv->ds->dev,
1929                  "Reset switch and programmed static config. Reason: %s\n",
1930                  sja1105_reset_reasons[reason]);
1931
1932         /* Configure the CGU (PLLs) for MII and RMII PHYs.
1933          * For these interfaces there is no dynamic configuration
1934          * needed, since PLLs have same settings at all speeds.
1935          */
1936         if (priv->info->clocking_setup) {
1937                 rc = priv->info->clocking_setup(priv);
1938                 if (rc < 0)
1939                         goto out;
1940         }
1941
1942         for (i = 0; i < ds->num_ports; i++) {
1943                 struct dw_xpcs *xpcs = priv->xpcs[i];
1944                 unsigned int mode;
1945
1946                 rc = sja1105_adjust_port_config(priv, i, speed_mbps[i]);
1947                 if (rc < 0)
1948                         goto out;
1949
1950                 if (!xpcs)
1951                         continue;
1952
1953                 if (bmcr[i] & BMCR_ANENABLE)
1954                         mode = MLO_AN_INBAND;
1955                 else if (priv->fixed_link[i])
1956                         mode = MLO_AN_FIXED;
1957                 else
1958                         mode = MLO_AN_PHY;
1959
1960                 rc = xpcs_do_config(xpcs, priv->phy_mode[i], mode);
1961                 if (rc < 0)
1962                         goto out;
1963
1964                 if (!phylink_autoneg_inband(mode)) {
1965                         int speed = SPEED_UNKNOWN;
1966
1967                         if (priv->phy_mode[i] == PHY_INTERFACE_MODE_2500BASEX)
1968                                 speed = SPEED_2500;
1969                         else if (bmcr[i] & BMCR_SPEED1000)
1970                                 speed = SPEED_1000;
1971                         else if (bmcr[i] & BMCR_SPEED100)
1972                                 speed = SPEED_100;
1973                         else
1974                                 speed = SPEED_10;
1975
1976                         xpcs_link_up(&xpcs->pcs, mode, priv->phy_mode[i],
1977                                      speed, DUPLEX_FULL);
1978                 }
1979         }
1980
1981         rc = sja1105_reload_cbs(priv);
1982         if (rc < 0)
1983                 goto out;
1984 out:
1985         mutex_unlock(&priv->mgmt_lock);
1986
1987         return rc;
1988 }
1989
1990 static int sja1105_pvid_apply(struct sja1105_private *priv, int port, u16 pvid)
1991 {
1992         struct sja1105_mac_config_entry *mac;
1993
1994         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1995
1996         mac[port].vlanid = pvid;
1997
1998         return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1999                                            &mac[port], true);
2000 }
2001
2002 static int sja1105_crosschip_bridge_join(struct dsa_switch *ds,
2003                                          int tree_index, int sw_index,
2004                                          int other_port, struct net_device *br)
2005 {
2006         struct dsa_switch *other_ds = dsa_switch_find(tree_index, sw_index);
2007         struct sja1105_private *other_priv = other_ds->priv;
2008         struct sja1105_private *priv = ds->priv;
2009         int port, rc;
2010
2011         if (other_ds->ops != &sja1105_switch_ops)
2012                 return 0;
2013
2014         for (port = 0; port < ds->num_ports; port++) {
2015                 if (!dsa_is_user_port(ds, port))
2016                         continue;
2017                 if (dsa_to_port(ds, port)->bridge_dev != br)
2018                         continue;
2019
2020                 rc = dsa_8021q_crosschip_bridge_join(priv->dsa_8021q_ctx,
2021                                                      port,
2022                                                      other_priv->dsa_8021q_ctx,
2023                                                      other_port);
2024                 if (rc)
2025                         return rc;
2026
2027                 rc = dsa_8021q_crosschip_bridge_join(other_priv->dsa_8021q_ctx,
2028                                                      other_port,
2029                                                      priv->dsa_8021q_ctx,
2030                                                      port);
2031                 if (rc)
2032                         return rc;
2033         }
2034
2035         return 0;
2036 }
2037
2038 static void sja1105_crosschip_bridge_leave(struct dsa_switch *ds,
2039                                            int tree_index, int sw_index,
2040                                            int other_port,
2041                                            struct net_device *br)
2042 {
2043         struct dsa_switch *other_ds = dsa_switch_find(tree_index, sw_index);
2044         struct sja1105_private *other_priv = other_ds->priv;
2045         struct sja1105_private *priv = ds->priv;
2046         int port;
2047
2048         if (other_ds->ops != &sja1105_switch_ops)
2049                 return;
2050
2051         for (port = 0; port < ds->num_ports; port++) {
2052                 if (!dsa_is_user_port(ds, port))
2053                         continue;
2054                 if (dsa_to_port(ds, port)->bridge_dev != br)
2055                         continue;
2056
2057                 dsa_8021q_crosschip_bridge_leave(priv->dsa_8021q_ctx, port,
2058                                                  other_priv->dsa_8021q_ctx,
2059                                                  other_port);
2060
2061                 dsa_8021q_crosschip_bridge_leave(other_priv->dsa_8021q_ctx,
2062                                                  other_port,
2063                                                  priv->dsa_8021q_ctx, port);
2064         }
2065 }
2066
2067 static int sja1105_setup_8021q_tagging(struct dsa_switch *ds, bool enabled)
2068 {
2069         struct sja1105_private *priv = ds->priv;
2070         int rc;
2071
2072         rc = dsa_8021q_setup(priv->dsa_8021q_ctx, enabled);
2073         if (rc)
2074                 return rc;
2075
2076         dev_info(ds->dev, "%s switch tagging\n",
2077                  enabled ? "Enabled" : "Disabled");
2078         return 0;
2079 }
2080
2081 static enum dsa_tag_protocol
2082 sja1105_get_tag_protocol(struct dsa_switch *ds, int port,
2083                          enum dsa_tag_protocol mp)
2084 {
2085         struct sja1105_private *priv = ds->priv;
2086
2087         return priv->info->tag_proto;
2088 }
2089
2090 static int sja1105_find_free_subvlan(u16 *subvlan_map, bool pvid)
2091 {
2092         int subvlan;
2093
2094         if (pvid)
2095                 return 0;
2096
2097         for (subvlan = 1; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2098                 if (subvlan_map[subvlan] == VLAN_N_VID)
2099                         return subvlan;
2100
2101         return -1;
2102 }
2103
2104 static int sja1105_find_subvlan(u16 *subvlan_map, u16 vid)
2105 {
2106         int subvlan;
2107
2108         for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2109                 if (subvlan_map[subvlan] == vid)
2110                         return subvlan;
2111
2112         return -1;
2113 }
2114
2115 static int sja1105_find_committed_subvlan(struct sja1105_private *priv,
2116                                           int port, u16 vid)
2117 {
2118         struct sja1105_port *sp = &priv->ports[port];
2119
2120         return sja1105_find_subvlan(sp->subvlan_map, vid);
2121 }
2122
2123 static void sja1105_init_subvlan_map(u16 *subvlan_map)
2124 {
2125         int subvlan;
2126
2127         for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2128                 subvlan_map[subvlan] = VLAN_N_VID;
2129 }
2130
2131 static void sja1105_commit_subvlan_map(struct sja1105_private *priv, int port,
2132                                        u16 *subvlan_map)
2133 {
2134         struct sja1105_port *sp = &priv->ports[port];
2135         int subvlan;
2136
2137         for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2138                 sp->subvlan_map[subvlan] = subvlan_map[subvlan];
2139 }
2140
2141 static int sja1105_is_vlan_configured(struct sja1105_private *priv, u16 vid)
2142 {
2143         struct sja1105_vlan_lookup_entry *vlan;
2144         int count, i;
2145
2146         vlan = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entries;
2147         count = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entry_count;
2148
2149         for (i = 0; i < count; i++)
2150                 if (vlan[i].vlanid == vid)
2151                         return i;
2152
2153         /* Return an invalid entry index if not found */
2154         return -1;
2155 }
2156
2157 static int
2158 sja1105_find_retagging_entry(struct sja1105_retagging_entry *retagging,
2159                              int count, int from_port, u16 from_vid,
2160                              u16 to_vid)
2161 {
2162         int i;
2163
2164         for (i = 0; i < count; i++)
2165                 if (retagging[i].ing_port == BIT(from_port) &&
2166                     retagging[i].vlan_ing == from_vid &&
2167                     retagging[i].vlan_egr == to_vid)
2168                         return i;
2169
2170         /* Return an invalid entry index if not found */
2171         return -1;
2172 }
2173
2174 static int sja1105_commit_vlans(struct sja1105_private *priv,
2175                                 struct sja1105_vlan_lookup_entry *new_vlan,
2176                                 struct sja1105_retagging_entry *new_retagging,
2177                                 int num_retagging)
2178 {
2179         struct sja1105_retagging_entry *retagging;
2180         struct sja1105_vlan_lookup_entry *vlan;
2181         struct sja1105_table *table;
2182         int num_vlans = 0;
2183         int rc, i, k = 0;
2184
2185         /* VLAN table */
2186         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
2187         vlan = table->entries;
2188
2189         for (i = 0; i < VLAN_N_VID; i++) {
2190                 int match = sja1105_is_vlan_configured(priv, i);
2191
2192                 if (new_vlan[i].vlanid != VLAN_N_VID)
2193                         num_vlans++;
2194
2195                 if (new_vlan[i].vlanid == VLAN_N_VID && match >= 0) {
2196                         /* Was there before, no longer is. Delete */
2197                         dev_dbg(priv->ds->dev, "Deleting VLAN %d\n", i);
2198                         rc = sja1105_dynamic_config_write(priv,
2199                                                           BLK_IDX_VLAN_LOOKUP,
2200                                                           i, &vlan[match], false);
2201                         if (rc < 0)
2202                                 return rc;
2203                 } else if (new_vlan[i].vlanid != VLAN_N_VID) {
2204                         /* Nothing changed, don't do anything */
2205                         if (match >= 0 &&
2206                             vlan[match].vlanid == new_vlan[i].vlanid &&
2207                             vlan[match].tag_port == new_vlan[i].tag_port &&
2208                             vlan[match].vlan_bc == new_vlan[i].vlan_bc &&
2209                             vlan[match].vmemb_port == new_vlan[i].vmemb_port)
2210                                 continue;
2211                         /* Update entry */
2212                         dev_dbg(priv->ds->dev, "Updating VLAN %d\n", i);
2213                         rc = sja1105_dynamic_config_write(priv,
2214                                                           BLK_IDX_VLAN_LOOKUP,
2215                                                           i, &new_vlan[i],
2216                                                           true);
2217                         if (rc < 0)
2218                                 return rc;
2219                 }
2220         }
2221
2222         if (table->entry_count)
2223                 kfree(table->entries);
2224
2225         table->entries = kcalloc(num_vlans, table->ops->unpacked_entry_size,
2226                                  GFP_KERNEL);
2227         if (!table->entries)
2228                 return -ENOMEM;
2229
2230         table->entry_count = num_vlans;
2231         vlan = table->entries;
2232
2233         for (i = 0; i < VLAN_N_VID; i++) {
2234                 if (new_vlan[i].vlanid == VLAN_N_VID)
2235                         continue;
2236                 vlan[k++] = new_vlan[i];
2237         }
2238
2239         /* VLAN Retagging Table */
2240         table = &priv->static_config.tables[BLK_IDX_RETAGGING];
2241         retagging = table->entries;
2242
2243         for (i = 0; i < table->entry_count; i++) {
2244                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_RETAGGING,
2245                                                   i, &retagging[i], false);
2246                 if (rc)
2247                         return rc;
2248         }
2249
2250         if (table->entry_count)
2251                 kfree(table->entries);
2252
2253         table->entries = kcalloc(num_retagging, table->ops->unpacked_entry_size,
2254                                  GFP_KERNEL);
2255         if (!table->entries)
2256                 return -ENOMEM;
2257
2258         table->entry_count = num_retagging;
2259         retagging = table->entries;
2260
2261         for (i = 0; i < num_retagging; i++) {
2262                 retagging[i] = new_retagging[i];
2263
2264                 /* Update entry */
2265                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_RETAGGING,
2266                                                   i, &retagging[i], true);
2267                 if (rc < 0)
2268                         return rc;
2269         }
2270
2271         return 0;
2272 }
2273
2274 struct sja1105_crosschip_vlan {
2275         struct list_head list;
2276         u16 vid;
2277         bool untagged;
2278         int port;
2279         int other_port;
2280         struct dsa_8021q_context *other_ctx;
2281 };
2282
2283 struct sja1105_crosschip_switch {
2284         struct list_head list;
2285         struct dsa_8021q_context *other_ctx;
2286 };
2287
2288 static int sja1105_commit_pvid(struct sja1105_private *priv)
2289 {
2290         struct sja1105_bridge_vlan *v;
2291         struct list_head *vlan_list;
2292         int rc = 0;
2293
2294         if (priv->vlan_state == SJA1105_VLAN_FILTERING_FULL)
2295                 vlan_list = &priv->bridge_vlans;
2296         else
2297                 vlan_list = &priv->dsa_8021q_vlans;
2298
2299         list_for_each_entry(v, vlan_list, list) {
2300                 if (v->pvid) {
2301                         rc = sja1105_pvid_apply(priv, v->port, v->vid);
2302                         if (rc)
2303                                 break;
2304                 }
2305         }
2306
2307         return rc;
2308 }
2309
2310 static int
2311 sja1105_build_bridge_vlans(struct sja1105_private *priv,
2312                            struct sja1105_vlan_lookup_entry *new_vlan)
2313 {
2314         struct sja1105_bridge_vlan *v;
2315
2316         if (priv->vlan_state == SJA1105_VLAN_UNAWARE)
2317                 return 0;
2318
2319         list_for_each_entry(v, &priv->bridge_vlans, list) {
2320                 int match = v->vid;
2321
2322                 new_vlan[match].vlanid = v->vid;
2323                 new_vlan[match].vmemb_port |= BIT(v->port);
2324                 new_vlan[match].vlan_bc |= BIT(v->port);
2325                 if (!v->untagged)
2326                         new_vlan[match].tag_port |= BIT(v->port);
2327                 new_vlan[match].type_entry = SJA1110_VLAN_D_TAG;
2328         }
2329
2330         return 0;
2331 }
2332
2333 static int
2334 sja1105_build_dsa_8021q_vlans(struct sja1105_private *priv,
2335                               struct sja1105_vlan_lookup_entry *new_vlan)
2336 {
2337         struct sja1105_bridge_vlan *v;
2338
2339         if (priv->vlan_state == SJA1105_VLAN_FILTERING_FULL)
2340                 return 0;
2341
2342         list_for_each_entry(v, &priv->dsa_8021q_vlans, list) {
2343                 int match = v->vid;
2344
2345                 new_vlan[match].vlanid = v->vid;
2346                 new_vlan[match].vmemb_port |= BIT(v->port);
2347                 new_vlan[match].vlan_bc |= BIT(v->port);
2348                 if (!v->untagged)
2349                         new_vlan[match].tag_port |= BIT(v->port);
2350                 new_vlan[match].type_entry = SJA1110_VLAN_D_TAG;
2351         }
2352
2353         return 0;
2354 }
2355
2356 static int sja1105_build_subvlans(struct sja1105_private *priv,
2357                                   u16 subvlan_map[][DSA_8021Q_N_SUBVLAN],
2358                                   struct sja1105_vlan_lookup_entry *new_vlan,
2359                                   struct sja1105_retagging_entry *new_retagging,
2360                                   int *num_retagging)
2361 {
2362         struct sja1105_bridge_vlan *v;
2363         int k = *num_retagging;
2364
2365         if (priv->vlan_state != SJA1105_VLAN_BEST_EFFORT)
2366                 return 0;
2367
2368         list_for_each_entry(v, &priv->bridge_vlans, list) {
2369                 int upstream = dsa_upstream_port(priv->ds, v->port);
2370                 int match, subvlan;
2371                 u16 rx_vid;
2372
2373                 /* Only sub-VLANs on user ports need to be applied.
2374                  * Bridge VLANs also include VLANs added automatically
2375                  * by DSA on the CPU port.
2376                  */
2377                 if (!dsa_is_user_port(priv->ds, v->port))
2378                         continue;
2379
2380                 subvlan = sja1105_find_subvlan(subvlan_map[v->port],
2381                                                v->vid);
2382                 if (subvlan < 0) {
2383                         subvlan = sja1105_find_free_subvlan(subvlan_map[v->port],
2384                                                             v->pvid);
2385                         if (subvlan < 0) {
2386                                 dev_err(priv->ds->dev, "No more free subvlans\n");
2387                                 return -ENOSPC;
2388                         }
2389                 }
2390
2391                 rx_vid = dsa_8021q_rx_vid_subvlan(priv->ds, v->port, subvlan);
2392
2393                 /* @v->vid on @v->port needs to be retagged to @rx_vid
2394                  * on @upstream. Assume @v->vid on @v->port and on
2395                  * @upstream was already configured by the previous
2396                  * iteration over bridge_vlans.
2397                  */
2398                 match = rx_vid;
2399                 new_vlan[match].vlanid = rx_vid;
2400                 new_vlan[match].vmemb_port |= BIT(v->port);
2401                 new_vlan[match].vmemb_port |= BIT(upstream);
2402                 new_vlan[match].vlan_bc |= BIT(v->port);
2403                 new_vlan[match].vlan_bc |= BIT(upstream);
2404                 /* The "untagged" flag is set the same as for the
2405                  * original VLAN
2406                  */
2407                 if (!v->untagged)
2408                         new_vlan[match].tag_port |= BIT(v->port);
2409                 /* But it's always tagged towards the CPU */
2410                 new_vlan[match].tag_port |= BIT(upstream);
2411                 new_vlan[match].type_entry = SJA1110_VLAN_D_TAG;
2412
2413                 /* The Retagging Table generates packet *clones* with
2414                  * the new VLAN. This is a very odd hardware quirk
2415                  * which we need to suppress by dropping the original
2416                  * packet.
2417                  * Deny egress of the original VLAN towards the CPU
2418                  * port. This will force the switch to drop it, and
2419                  * we'll see only the retagged packets.
2420                  */
2421                 match = v->vid;
2422                 new_vlan[match].vlan_bc &= ~BIT(upstream);
2423
2424                 /* And the retagging itself */
2425                 new_retagging[k].vlan_ing = v->vid;
2426                 new_retagging[k].vlan_egr = rx_vid;
2427                 new_retagging[k].ing_port = BIT(v->port);
2428                 new_retagging[k].egr_port = BIT(upstream);
2429                 if (k++ == SJA1105_MAX_RETAGGING_COUNT) {
2430                         dev_err(priv->ds->dev, "No more retagging rules\n");
2431                         return -ENOSPC;
2432                 }
2433
2434                 subvlan_map[v->port][subvlan] = v->vid;
2435         }
2436
2437         *num_retagging = k;
2438
2439         return 0;
2440 }
2441
2442 /* Sadly, in crosschip scenarios where the CPU port is also the link to another
2443  * switch, we should retag backwards (the dsa_8021q vid to the original vid) on
2444  * the CPU port of neighbour switches.
2445  */
2446 static int
2447 sja1105_build_crosschip_subvlans(struct sja1105_private *priv,
2448                                  struct sja1105_vlan_lookup_entry *new_vlan,
2449                                  struct sja1105_retagging_entry *new_retagging,
2450                                  int *num_retagging)
2451 {
2452         struct sja1105_crosschip_vlan *tmp, *pos;
2453         struct dsa_8021q_crosschip_link *c;
2454         struct sja1105_bridge_vlan *v, *w;
2455         struct list_head crosschip_vlans;
2456         int k = *num_retagging;
2457         int rc = 0;
2458
2459         if (priv->vlan_state != SJA1105_VLAN_BEST_EFFORT)
2460                 return 0;
2461
2462         INIT_LIST_HEAD(&crosschip_vlans);
2463
2464         list_for_each_entry(c, &priv->dsa_8021q_ctx->crosschip_links, list) {
2465                 struct sja1105_private *other_priv = c->other_ctx->ds->priv;
2466
2467                 if (other_priv->vlan_state == SJA1105_VLAN_FILTERING_FULL)
2468                         continue;
2469
2470                 /* Crosschip links are also added to the CPU ports.
2471                  * Ignore those.
2472                  */
2473                 if (!dsa_is_user_port(priv->ds, c->port))
2474                         continue;
2475                 if (!dsa_is_user_port(c->other_ctx->ds, c->other_port))
2476                         continue;
2477
2478                 /* Search for VLANs on the remote port */
2479                 list_for_each_entry(v, &other_priv->bridge_vlans, list) {
2480                         bool already_added = false;
2481                         bool we_have_it = false;
2482
2483                         if (v->port != c->other_port)
2484                                 continue;
2485
2486                         /* If @v is a pvid on @other_ds, it does not need
2487                          * re-retagging, because its SVL field is 0 and we
2488                          * already allow that, via the dsa_8021q crosschip
2489                          * links.
2490                          */
2491                         if (v->pvid)
2492                                 continue;
2493
2494                         /* Search for the VLAN on our local port */
2495                         list_for_each_entry(w, &priv->bridge_vlans, list) {
2496                                 if (w->port == c->port && w->vid == v->vid) {
2497                                         we_have_it = true;
2498                                         break;
2499                                 }
2500                         }
2501
2502                         if (!we_have_it)
2503                                 continue;
2504
2505                         list_for_each_entry(tmp, &crosschip_vlans, list) {
2506                                 if (tmp->vid == v->vid &&
2507                                     tmp->untagged == v->untagged &&
2508                                     tmp->port == c->port &&
2509                                     tmp->other_port == v->port &&
2510                                     tmp->other_ctx == c->other_ctx) {
2511                                         already_added = true;
2512                                         break;
2513                                 }
2514                         }
2515
2516                         if (already_added)
2517                                 continue;
2518
2519                         tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
2520                         if (!tmp) {
2521                                 dev_err(priv->ds->dev, "Failed to allocate memory\n");
2522                                 rc = -ENOMEM;
2523                                 goto out;
2524                         }
2525                         tmp->vid = v->vid;
2526                         tmp->port = c->port;
2527                         tmp->other_port = v->port;
2528                         tmp->other_ctx = c->other_ctx;
2529                         tmp->untagged = v->untagged;
2530                         list_add(&tmp->list, &crosschip_vlans);
2531                 }
2532         }
2533
2534         list_for_each_entry(tmp, &crosschip_vlans, list) {
2535                 struct sja1105_private *other_priv = tmp->other_ctx->ds->priv;
2536                 int upstream = dsa_upstream_port(priv->ds, tmp->port);
2537                 int match, subvlan;
2538                 u16 rx_vid;
2539
2540                 subvlan = sja1105_find_committed_subvlan(other_priv,
2541                                                          tmp->other_port,
2542                                                          tmp->vid);
2543                 /* If this happens, it's a bug. The neighbour switch does not
2544                  * have a subvlan for tmp->vid on tmp->other_port, but it
2545                  * should, since we already checked for its vlan_state.
2546                  */
2547                 if (WARN_ON(subvlan < 0)) {
2548                         rc = -EINVAL;
2549                         goto out;
2550                 }
2551
2552                 rx_vid = dsa_8021q_rx_vid_subvlan(tmp->other_ctx->ds,
2553                                                   tmp->other_port,
2554                                                   subvlan);
2555
2556                 /* The @rx_vid retagged from @tmp->vid on
2557                  * {@tmp->other_ds, @tmp->other_port} needs to be
2558                  * re-retagged to @tmp->vid on the way back to us.
2559                  *
2560                  * Assume the original @tmp->vid is already configured
2561                  * on this local switch, otherwise we wouldn't be
2562                  * retagging its subvlan on the other switch in the
2563                  * first place. We just need to add a reverse retagging
2564                  * rule for @rx_vid and install @rx_vid on our ports.
2565                  */
2566                 match = rx_vid;
2567                 new_vlan[match].vlanid = rx_vid;
2568                 new_vlan[match].vmemb_port |= BIT(tmp->port);
2569                 new_vlan[match].vmemb_port |= BIT(upstream);
2570                 /* The "untagged" flag is set the same as for the
2571                  * original VLAN. And towards the CPU, it doesn't
2572                  * really matter, because @rx_vid will only receive
2573                  * traffic on that port. For consistency with other dsa_8021q
2574                  * VLANs, we'll keep the CPU port tagged.
2575                  */
2576                 if (!tmp->untagged)
2577                         new_vlan[match].tag_port |= BIT(tmp->port);
2578                 new_vlan[match].tag_port |= BIT(upstream);
2579                 new_vlan[match].type_entry = SJA1110_VLAN_D_TAG;
2580                 /* Deny egress of @rx_vid towards our front-panel port.
2581                  * This will force the switch to drop it, and we'll see
2582                  * only the re-retagged packets (having the original,
2583                  * pre-initial-retagging, VLAN @tmp->vid).
2584                  */
2585                 new_vlan[match].vlan_bc &= ~BIT(tmp->port);
2586
2587                 /* On reverse retagging, the same ingress VLAN goes to multiple
2588                  * ports. So we have an opportunity to create composite rules
2589                  * to not waste the limited space in the retagging table.
2590                  */
2591                 k = sja1105_find_retagging_entry(new_retagging, *num_retagging,
2592                                                  upstream, rx_vid, tmp->vid);
2593                 if (k < 0) {
2594                         if (*num_retagging == SJA1105_MAX_RETAGGING_COUNT) {
2595                                 dev_err(priv->ds->dev, "No more retagging rules\n");
2596                                 rc = -ENOSPC;
2597                                 goto out;
2598                         }
2599                         k = (*num_retagging)++;
2600                 }
2601                 /* And the retagging itself */
2602                 new_retagging[k].vlan_ing = rx_vid;
2603                 new_retagging[k].vlan_egr = tmp->vid;
2604                 new_retagging[k].ing_port = BIT(upstream);
2605                 new_retagging[k].egr_port |= BIT(tmp->port);
2606         }
2607
2608 out:
2609         list_for_each_entry_safe(tmp, pos, &crosschip_vlans, list) {
2610                 list_del(&tmp->list);
2611                 kfree(tmp);
2612         }
2613
2614         return rc;
2615 }
2616
2617 static int sja1105_build_vlan_table(struct sja1105_private *priv, bool notify);
2618
2619 static int sja1105_notify_crosschip_switches(struct sja1105_private *priv)
2620 {
2621         struct sja1105_crosschip_switch *s, *pos;
2622         struct list_head crosschip_switches;
2623         struct dsa_8021q_crosschip_link *c;
2624         int rc = 0;
2625
2626         INIT_LIST_HEAD(&crosschip_switches);
2627
2628         list_for_each_entry(c, &priv->dsa_8021q_ctx->crosschip_links, list) {
2629                 bool already_added = false;
2630
2631                 list_for_each_entry(s, &crosschip_switches, list) {
2632                         if (s->other_ctx == c->other_ctx) {
2633                                 already_added = true;
2634                                 break;
2635                         }
2636                 }
2637
2638                 if (already_added)
2639                         continue;
2640
2641                 s = kzalloc(sizeof(*s), GFP_KERNEL);
2642                 if (!s) {
2643                         dev_err(priv->ds->dev, "Failed to allocate memory\n");
2644                         rc = -ENOMEM;
2645                         goto out;
2646                 }
2647                 s->other_ctx = c->other_ctx;
2648                 list_add(&s->list, &crosschip_switches);
2649         }
2650
2651         list_for_each_entry(s, &crosschip_switches, list) {
2652                 struct sja1105_private *other_priv = s->other_ctx->ds->priv;
2653
2654                 rc = sja1105_build_vlan_table(other_priv, false);
2655                 if (rc)
2656                         goto out;
2657         }
2658
2659 out:
2660         list_for_each_entry_safe(s, pos, &crosschip_switches, list) {
2661                 list_del(&s->list);
2662                 kfree(s);
2663         }
2664
2665         return rc;
2666 }
2667
2668 static int sja1105_build_vlan_table(struct sja1105_private *priv, bool notify)
2669 {
2670         u16 subvlan_map[SJA1105_MAX_NUM_PORTS][DSA_8021Q_N_SUBVLAN];
2671         struct sja1105_retagging_entry *new_retagging;
2672         struct sja1105_vlan_lookup_entry *new_vlan;
2673         struct sja1105_table *table;
2674         int i, num_retagging = 0;
2675         int rc;
2676
2677         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
2678         new_vlan = kcalloc(VLAN_N_VID,
2679                            table->ops->unpacked_entry_size, GFP_KERNEL);
2680         if (!new_vlan)
2681                 return -ENOMEM;
2682
2683         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
2684         new_retagging = kcalloc(SJA1105_MAX_RETAGGING_COUNT,
2685                                 table->ops->unpacked_entry_size, GFP_KERNEL);
2686         if (!new_retagging) {
2687                 kfree(new_vlan);
2688                 return -ENOMEM;
2689         }
2690
2691         for (i = 0; i < VLAN_N_VID; i++)
2692                 new_vlan[i].vlanid = VLAN_N_VID;
2693
2694         for (i = 0; i < SJA1105_MAX_RETAGGING_COUNT; i++)
2695                 new_retagging[i].vlan_ing = VLAN_N_VID;
2696
2697         for (i = 0; i < priv->ds->num_ports; i++)
2698                 sja1105_init_subvlan_map(subvlan_map[i]);
2699
2700         /* Bridge VLANs */
2701         rc = sja1105_build_bridge_vlans(priv, new_vlan);
2702         if (rc)
2703                 goto out;
2704
2705         /* VLANs necessary for dsa_8021q operation, given to us by tag_8021q.c:
2706          * - RX VLANs
2707          * - TX VLANs
2708          * - Crosschip links
2709          */
2710         rc = sja1105_build_dsa_8021q_vlans(priv, new_vlan);
2711         if (rc)
2712                 goto out;
2713
2714         /* Private VLANs necessary for dsa_8021q operation, which we need to
2715          * determine on our own:
2716          * - Sub-VLANs
2717          * - Sub-VLANs of crosschip switches
2718          */
2719         rc = sja1105_build_subvlans(priv, subvlan_map, new_vlan, new_retagging,
2720                                     &num_retagging);
2721         if (rc)
2722                 goto out;
2723
2724         rc = sja1105_build_crosschip_subvlans(priv, new_vlan, new_retagging,
2725                                               &num_retagging);
2726         if (rc)
2727                 goto out;
2728
2729         rc = sja1105_commit_vlans(priv, new_vlan, new_retagging, num_retagging);
2730         if (rc)
2731                 goto out;
2732
2733         rc = sja1105_commit_pvid(priv);
2734         if (rc)
2735                 goto out;
2736
2737         for (i = 0; i < priv->ds->num_ports; i++)
2738                 sja1105_commit_subvlan_map(priv, i, subvlan_map[i]);
2739
2740         if (notify) {
2741                 rc = sja1105_notify_crosschip_switches(priv);
2742                 if (rc)
2743                         goto out;
2744         }
2745
2746 out:
2747         kfree(new_vlan);
2748         kfree(new_retagging);
2749
2750         return rc;
2751 }
2752
2753 /* The TPID setting belongs to the General Parameters table,
2754  * which can only be partially reconfigured at runtime (and not the TPID).
2755  * So a switch reset is required.
2756  */
2757 int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,
2758                            struct netlink_ext_ack *extack)
2759 {
2760         struct sja1105_l2_lookup_params_entry *l2_lookup_params;
2761         struct sja1105_general_params_entry *general_params;
2762         struct sja1105_private *priv = ds->priv;
2763         enum sja1105_vlan_state state;
2764         struct sja1105_table *table;
2765         struct sja1105_rule *rule;
2766         bool want_tagging;
2767         u16 tpid, tpid2;
2768         int rc;
2769
2770         list_for_each_entry(rule, &priv->flow_block.rules, list) {
2771                 if (rule->type == SJA1105_RULE_VL) {
2772                         NL_SET_ERR_MSG_MOD(extack,
2773                                            "Cannot change VLAN filtering with active VL rules");
2774                         return -EBUSY;
2775                 }
2776         }
2777
2778         if (enabled) {
2779                 /* Enable VLAN filtering. */
2780                 tpid  = ETH_P_8021Q;
2781                 tpid2 = ETH_P_8021AD;
2782         } else {
2783                 /* Disable VLAN filtering. */
2784                 tpid  = ETH_P_SJA1105;
2785                 tpid2 = ETH_P_SJA1105;
2786         }
2787
2788         for (port = 0; port < ds->num_ports; port++) {
2789                 struct sja1105_port *sp = &priv->ports[port];
2790
2791                 if (enabled)
2792                         sp->xmit_tpid = priv->info->qinq_tpid;
2793                 else
2794                         sp->xmit_tpid = ETH_P_SJA1105;
2795         }
2796
2797         if (!enabled)
2798                 state = SJA1105_VLAN_UNAWARE;
2799         else if (priv->best_effort_vlan_filtering)
2800                 state = SJA1105_VLAN_BEST_EFFORT;
2801         else
2802                 state = SJA1105_VLAN_FILTERING_FULL;
2803
2804         if (priv->vlan_state == state)
2805                 return 0;
2806
2807         priv->vlan_state = state;
2808         want_tagging = (state == SJA1105_VLAN_UNAWARE ||
2809                         state == SJA1105_VLAN_BEST_EFFORT);
2810
2811         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
2812         general_params = table->entries;
2813         /* EtherType used to identify inner tagged (C-tag) VLAN traffic */
2814         general_params->tpid = tpid;
2815         /* EtherType used to identify outer tagged (S-tag) VLAN traffic */
2816         general_params->tpid2 = tpid2;
2817         /* When VLAN filtering is on, we need to at least be able to
2818          * decode management traffic through the "backup plan".
2819          */
2820         general_params->incl_srcpt1 = enabled;
2821         general_params->incl_srcpt0 = enabled;
2822
2823         want_tagging = priv->best_effort_vlan_filtering || !enabled;
2824
2825         /* VLAN filtering => independent VLAN learning.
2826          * No VLAN filtering (or best effort) => shared VLAN learning.
2827          *
2828          * In shared VLAN learning mode, untagged traffic still gets
2829          * pvid-tagged, and the FDB table gets populated with entries
2830          * containing the "real" (pvid or from VLAN tag) VLAN ID.
2831          * However the switch performs a masked L2 lookup in the FDB,
2832          * effectively only looking up a frame's DMAC (and not VID) for the
2833          * forwarding decision.
2834          *
2835          * This is extremely convenient for us, because in modes with
2836          * vlan_filtering=0, dsa_8021q actually installs unique pvid's into
2837          * each front panel port. This is good for identification but breaks
2838          * learning badly - the VID of the learnt FDB entry is unique, aka
2839          * no frames coming from any other port are going to have it. So
2840          * for forwarding purposes, this is as though learning was broken
2841          * (all frames get flooded).
2842          */
2843         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
2844         l2_lookup_params = table->entries;
2845         l2_lookup_params->shared_learn = want_tagging;
2846
2847         sja1105_frame_memory_partitioning(priv);
2848
2849         rc = sja1105_build_vlan_table(priv, false);
2850         if (rc)
2851                 return rc;
2852
2853         rc = sja1105_static_config_reload(priv, SJA1105_VLAN_FILTERING);
2854         if (rc)
2855                 NL_SET_ERR_MSG_MOD(extack, "Failed to change VLAN Ethertype");
2856
2857         /* Switch port identification based on 802.1Q is only passable
2858          * if we are not under a vlan_filtering bridge. So make sure
2859          * the two configurations are mutually exclusive (of course, the
2860          * user may know better, i.e. best_effort_vlan_filtering).
2861          */
2862         return sja1105_setup_8021q_tagging(ds, want_tagging);
2863 }
2864
2865 /* Returns number of VLANs added (0 or 1) on success,
2866  * or a negative error code.
2867  */
2868 static int sja1105_vlan_add_one(struct dsa_switch *ds, int port, u16 vid,
2869                                 u16 flags, struct list_head *vlan_list)
2870 {
2871         bool untagged = flags & BRIDGE_VLAN_INFO_UNTAGGED;
2872         bool pvid = flags & BRIDGE_VLAN_INFO_PVID;
2873         struct sja1105_bridge_vlan *v;
2874
2875         list_for_each_entry(v, vlan_list, list) {
2876                 if (v->port == port && v->vid == vid) {
2877                         /* Already added */
2878                         if (v->untagged == untagged && v->pvid == pvid)
2879                                 /* Nothing changed */
2880                                 return 0;
2881
2882                         /* It's the same VLAN, but some of the flags changed
2883                          * and the user did not bother to delete it first.
2884                          * Update it and trigger sja1105_build_vlan_table.
2885                          */
2886                         v->untagged = untagged;
2887                         v->pvid = pvid;
2888                         return 1;
2889                 }
2890         }
2891
2892         v = kzalloc(sizeof(*v), GFP_KERNEL);
2893         if (!v) {
2894                 dev_err(ds->dev, "Out of memory while storing VLAN\n");
2895                 return -ENOMEM;
2896         }
2897
2898         v->port = port;
2899         v->vid = vid;
2900         v->untagged = untagged;
2901         v->pvid = pvid;
2902         list_add(&v->list, vlan_list);
2903
2904         return 1;
2905 }
2906
2907 /* Returns number of VLANs deleted (0 or 1) */
2908 static int sja1105_vlan_del_one(struct dsa_switch *ds, int port, u16 vid,
2909                                 struct list_head *vlan_list)
2910 {
2911         struct sja1105_bridge_vlan *v, *n;
2912
2913         list_for_each_entry_safe(v, n, vlan_list, list) {
2914                 if (v->port == port && v->vid == vid) {
2915                         list_del(&v->list);
2916                         kfree(v);
2917                         return 1;
2918                 }
2919         }
2920
2921         return 0;
2922 }
2923
2924 static int sja1105_vlan_add(struct dsa_switch *ds, int port,
2925                             const struct switchdev_obj_port_vlan *vlan,
2926                             struct netlink_ext_ack *extack)
2927 {
2928         struct sja1105_private *priv = ds->priv;
2929         bool vlan_table_changed = false;
2930         int rc;
2931
2932         /* If the user wants best-effort VLAN filtering (aka vlan_filtering
2933          * bridge plus tagging), be sure to at least deny alterations to the
2934          * configuration done by dsa_8021q.
2935          */
2936         if (priv->vlan_state != SJA1105_VLAN_FILTERING_FULL &&
2937             vid_is_dsa_8021q(vlan->vid)) {
2938                 NL_SET_ERR_MSG_MOD(extack,
2939                                    "Range 1024-3071 reserved for dsa_8021q operation");
2940                 return -EBUSY;
2941         }
2942
2943         rc = sja1105_vlan_add_one(ds, port, vlan->vid, vlan->flags,
2944                                   &priv->bridge_vlans);
2945         if (rc < 0)
2946                 return rc;
2947         if (rc > 0)
2948                 vlan_table_changed = true;
2949
2950         if (!vlan_table_changed)
2951                 return 0;
2952
2953         return sja1105_build_vlan_table(priv, true);
2954 }
2955
2956 static int sja1105_vlan_del(struct dsa_switch *ds, int port,
2957                             const struct switchdev_obj_port_vlan *vlan)
2958 {
2959         struct sja1105_private *priv = ds->priv;
2960         bool vlan_table_changed = false;
2961         int rc;
2962
2963         rc = sja1105_vlan_del_one(ds, port, vlan->vid, &priv->bridge_vlans);
2964         if (rc > 0)
2965                 vlan_table_changed = true;
2966
2967         if (!vlan_table_changed)
2968                 return 0;
2969
2970         return sja1105_build_vlan_table(priv, true);
2971 }
2972
2973 static int sja1105_dsa_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid,
2974                                       u16 flags)
2975 {
2976         struct sja1105_private *priv = ds->priv;
2977         int rc;
2978
2979         rc = sja1105_vlan_add_one(ds, port, vid, flags, &priv->dsa_8021q_vlans);
2980         if (rc <= 0)
2981                 return rc;
2982
2983         return sja1105_build_vlan_table(priv, true);
2984 }
2985
2986 static int sja1105_dsa_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)
2987 {
2988         struct sja1105_private *priv = ds->priv;
2989         int rc;
2990
2991         rc = sja1105_vlan_del_one(ds, port, vid, &priv->dsa_8021q_vlans);
2992         if (!rc)
2993                 return 0;
2994
2995         return sja1105_build_vlan_table(priv, true);
2996 }
2997
2998 static const struct dsa_8021q_ops sja1105_dsa_8021q_ops = {
2999         .vlan_add       = sja1105_dsa_8021q_vlan_add,
3000         .vlan_del       = sja1105_dsa_8021q_vlan_del,
3001 };
3002
3003 /* The programming model for the SJA1105 switch is "all-at-once" via static
3004  * configuration tables. Some of these can be dynamically modified at runtime,
3005  * but not the xMII mode parameters table.
3006  * Furthermode, some PHYs may not have crystals for generating their clocks
3007  * (e.g. RMII). Instead, their 50MHz clock is supplied via the SJA1105 port's
3008  * ref_clk pin. So port clocking needs to be initialized early, before
3009  * connecting to PHYs is attempted, otherwise they won't respond through MDIO.
3010  * Setting correct PHY link speed does not matter now.
3011  * But dsa_slave_phy_setup is called later than sja1105_setup, so the PHY
3012  * bindings are not yet parsed by DSA core. We need to parse early so that we
3013  * can populate the xMII mode parameters table.
3014  */
3015 static int sja1105_setup(struct dsa_switch *ds)
3016 {
3017         struct sja1105_private *priv = ds->priv;
3018         int rc;
3019
3020         rc = sja1105_parse_dt(priv);
3021         if (rc < 0) {
3022                 dev_err(ds->dev, "Failed to parse DT: %d\n", rc);
3023                 return rc;
3024         }
3025
3026         /* Error out early if internal delays are required through DT
3027          * and we can't apply them.
3028          */
3029         rc = sja1105_parse_rgmii_delays(priv);
3030         if (rc < 0) {
3031                 dev_err(ds->dev, "RGMII delay not supported\n");
3032                 return rc;
3033         }
3034
3035         rc = sja1105_ptp_clock_register(ds);
3036         if (rc < 0) {
3037                 dev_err(ds->dev, "Failed to register PTP clock: %d\n", rc);
3038                 return rc;
3039         }
3040
3041         rc = sja1105_mdiobus_register(ds);
3042         if (rc < 0) {
3043                 dev_err(ds->dev, "Failed to register MDIO bus: %pe\n",
3044                         ERR_PTR(rc));
3045                 goto out_ptp_clock_unregister;
3046         }
3047
3048         if (priv->info->disable_microcontroller) {
3049                 rc = priv->info->disable_microcontroller(priv);
3050                 if (rc < 0) {
3051                         dev_err(ds->dev,
3052                                 "Failed to disable microcontroller: %pe\n",
3053                                 ERR_PTR(rc));
3054                         goto out_mdiobus_unregister;
3055                 }
3056         }
3057
3058         /* Create and send configuration down to device */
3059         rc = sja1105_static_config_load(priv);
3060         if (rc < 0) {
3061                 dev_err(ds->dev, "Failed to load static config: %d\n", rc);
3062                 goto out_mdiobus_unregister;
3063         }
3064
3065         /* Configure the CGU (PHY link modes and speeds) */
3066         if (priv->info->clocking_setup) {
3067                 rc = priv->info->clocking_setup(priv);
3068                 if (rc < 0) {
3069                         dev_err(ds->dev,
3070                                 "Failed to configure MII clocking: %pe\n",
3071                                 ERR_PTR(rc));
3072                         goto out_static_config_free;
3073                 }
3074         }
3075
3076         /* On SJA1105, VLAN filtering per se is always enabled in hardware.
3077          * The only thing we can do to disable it is lie about what the 802.1Q
3078          * EtherType is.
3079          * So it will still try to apply VLAN filtering, but all ingress
3080          * traffic (except frames received with EtherType of ETH_P_SJA1105)
3081          * will be internally tagged with a distorted VLAN header where the
3082          * TPID is ETH_P_SJA1105, and the VLAN ID is the port pvid.
3083          */
3084         ds->vlan_filtering_is_global = true;
3085
3086         /* Advertise the 8 egress queues */
3087         ds->num_tx_queues = SJA1105_NUM_TC;
3088
3089         ds->mtu_enforcement_ingress = true;
3090
3091         priv->best_effort_vlan_filtering = true;
3092
3093         rc = sja1105_devlink_setup(ds);
3094         if (rc < 0)
3095                 goto out_static_config_free;
3096
3097         /* The DSA/switchdev model brings up switch ports in standalone mode by
3098          * default, and that means vlan_filtering is 0 since they're not under
3099          * a bridge, so it's safe to set up switch tagging at this time.
3100          */
3101         rtnl_lock();
3102         rc = sja1105_setup_8021q_tagging(ds, true);
3103         rtnl_unlock();
3104         if (rc)
3105                 goto out_devlink_teardown;
3106
3107         return 0;
3108
3109 out_devlink_teardown:
3110         sja1105_devlink_teardown(ds);
3111 out_mdiobus_unregister:
3112         sja1105_mdiobus_unregister(ds);
3113 out_ptp_clock_unregister:
3114         sja1105_ptp_clock_unregister(ds);
3115 out_static_config_free:
3116         sja1105_static_config_free(&priv->static_config);
3117
3118         return rc;
3119 }
3120
3121 static void sja1105_teardown(struct dsa_switch *ds)
3122 {
3123         struct sja1105_private *priv = ds->priv;
3124         struct sja1105_bridge_vlan *v, *n;
3125         int port;
3126
3127         for (port = 0; port < ds->num_ports; port++) {
3128                 struct sja1105_port *sp = &priv->ports[port];
3129
3130                 if (!dsa_is_user_port(ds, port))
3131                         continue;
3132
3133                 if (sp->xmit_worker)
3134                         kthread_destroy_worker(sp->xmit_worker);
3135         }
3136
3137         sja1105_devlink_teardown(ds);
3138         sja1105_flower_teardown(ds);
3139         sja1105_tas_teardown(ds);
3140         sja1105_ptp_clock_unregister(ds);
3141         sja1105_static_config_free(&priv->static_config);
3142
3143         list_for_each_entry_safe(v, n, &priv->dsa_8021q_vlans, list) {
3144                 list_del(&v->list);
3145                 kfree(v);
3146         }
3147
3148         list_for_each_entry_safe(v, n, &priv->bridge_vlans, list) {
3149                 list_del(&v->list);
3150                 kfree(v);
3151         }
3152 }
3153
3154 static void sja1105_port_disable(struct dsa_switch *ds, int port)
3155 {
3156         struct sja1105_private *priv = ds->priv;
3157         struct sja1105_port *sp = &priv->ports[port];
3158
3159         if (!dsa_is_user_port(ds, port))
3160                 return;
3161
3162         kthread_cancel_work_sync(&sp->xmit_work);
3163         skb_queue_purge(&sp->xmit_queue);
3164 }
3165
3166 static int sja1105_mgmt_xmit(struct dsa_switch *ds, int port, int slot,
3167                              struct sk_buff *skb, bool takets)
3168 {
3169         struct sja1105_mgmt_entry mgmt_route = {0};
3170         struct sja1105_private *priv = ds->priv;
3171         struct ethhdr *hdr;
3172         int timeout = 10;
3173         int rc;
3174
3175         hdr = eth_hdr(skb);
3176
3177         mgmt_route.macaddr = ether_addr_to_u64(hdr->h_dest);
3178         mgmt_route.destports = BIT(port);
3179         mgmt_route.enfport = 1;
3180         mgmt_route.tsreg = 0;
3181         mgmt_route.takets = takets;
3182
3183         rc = sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
3184                                           slot, &mgmt_route, true);
3185         if (rc < 0) {
3186                 kfree_skb(skb);
3187                 return rc;
3188         }
3189
3190         /* Transfer skb to the host port. */
3191         dsa_enqueue_skb(skb, dsa_to_port(ds, port)->slave);
3192
3193         /* Wait until the switch has processed the frame */
3194         do {
3195                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_MGMT_ROUTE,
3196                                                  slot, &mgmt_route);
3197                 if (rc < 0) {
3198                         dev_err_ratelimited(priv->ds->dev,
3199                                             "failed to poll for mgmt route\n");
3200                         continue;
3201                 }
3202
3203                 /* UM10944: The ENFPORT flag of the respective entry is
3204                  * cleared when a match is found. The host can use this
3205                  * flag as an acknowledgment.
3206                  */
3207                 cpu_relax();
3208         } while (mgmt_route.enfport && --timeout);
3209
3210         if (!timeout) {
3211                 /* Clean up the management route so that a follow-up
3212                  * frame may not match on it by mistake.
3213                  * This is only hardware supported on P/Q/R/S - on E/T it is
3214                  * a no-op and we are silently discarding the -EOPNOTSUPP.
3215                  */
3216                 sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
3217                                              slot, &mgmt_route, false);
3218                 dev_err_ratelimited(priv->ds->dev, "xmit timed out\n");
3219         }
3220
3221         return NETDEV_TX_OK;
3222 }
3223
3224 #define work_to_port(work) \
3225                 container_of((work), struct sja1105_port, xmit_work)
3226 #define tagger_to_sja1105(t) \
3227                 container_of((t), struct sja1105_private, tagger_data)
3228
3229 /* Deferred work is unfortunately necessary because setting up the management
3230  * route cannot be done from atomit context (SPI transfer takes a sleepable
3231  * lock on the bus)
3232  */
3233 static void sja1105_port_deferred_xmit(struct kthread_work *work)
3234 {
3235         struct sja1105_port *sp = work_to_port(work);
3236         struct sja1105_tagger_data *tagger_data = sp->data;
3237         struct sja1105_private *priv = tagger_to_sja1105(tagger_data);
3238         int port = sp - priv->ports;
3239         struct sk_buff *skb;
3240
3241         while ((skb = skb_dequeue(&sp->xmit_queue)) != NULL) {
3242                 struct sk_buff *clone = SJA1105_SKB_CB(skb)->clone;
3243
3244                 mutex_lock(&priv->mgmt_lock);
3245
3246                 sja1105_mgmt_xmit(priv->ds, port, 0, skb, !!clone);
3247
3248                 /* The clone, if there, was made by dsa_skb_tx_timestamp */
3249                 if (clone)
3250                         sja1105_ptp_txtstamp_skb(priv->ds, port, clone);
3251
3252                 mutex_unlock(&priv->mgmt_lock);
3253         }
3254 }
3255
3256 /* The MAXAGE setting belongs to the L2 Forwarding Parameters table,
3257  * which cannot be reconfigured at runtime. So a switch reset is required.
3258  */
3259 static int sja1105_set_ageing_time(struct dsa_switch *ds,
3260                                    unsigned int ageing_time)
3261 {
3262         struct sja1105_l2_lookup_params_entry *l2_lookup_params;
3263         struct sja1105_private *priv = ds->priv;
3264         struct sja1105_table *table;
3265         unsigned int maxage;
3266
3267         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
3268         l2_lookup_params = table->entries;
3269
3270         maxage = SJA1105_AGEING_TIME_MS(ageing_time);
3271
3272         if (l2_lookup_params->maxage == maxage)
3273                 return 0;
3274
3275         l2_lookup_params->maxage = maxage;
3276
3277         return sja1105_static_config_reload(priv, SJA1105_AGEING_TIME);
3278 }
3279
3280 static int sja1105_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
3281 {
3282         struct sja1105_l2_policing_entry *policing;
3283         struct sja1105_private *priv = ds->priv;
3284
3285         new_mtu += VLAN_ETH_HLEN + ETH_FCS_LEN;
3286
3287         if (dsa_is_cpu_port(ds, port))
3288                 new_mtu += VLAN_HLEN;
3289
3290         policing = priv->static_config.tables[BLK_IDX_L2_POLICING].entries;
3291
3292         if (policing[port].maxlen == new_mtu)
3293                 return 0;
3294
3295         policing[port].maxlen = new_mtu;
3296
3297         return sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);
3298 }
3299
3300 static int sja1105_get_max_mtu(struct dsa_switch *ds, int port)
3301 {
3302         return 2043 - VLAN_ETH_HLEN - ETH_FCS_LEN;
3303 }
3304
3305 static int sja1105_port_setup_tc(struct dsa_switch *ds, int port,
3306                                  enum tc_setup_type type,
3307                                  void *type_data)
3308 {
3309         switch (type) {
3310         case TC_SETUP_QDISC_TAPRIO:
3311                 return sja1105_setup_tc_taprio(ds, port, type_data);
3312         case TC_SETUP_QDISC_CBS:
3313                 return sja1105_setup_tc_cbs(ds, port, type_data);
3314         default:
3315                 return -EOPNOTSUPP;
3316         }
3317 }
3318
3319 /* We have a single mirror (@to) port, but can configure ingress and egress
3320  * mirroring on all other (@from) ports.
3321  * We need to allow mirroring rules only as long as the @to port is always the
3322  * same, and we need to unset the @to port from mirr_port only when there is no
3323  * mirroring rule that references it.
3324  */
3325 static int sja1105_mirror_apply(struct sja1105_private *priv, int from, int to,
3326                                 bool ingress, bool enabled)
3327 {
3328         struct sja1105_general_params_entry *general_params;
3329         struct sja1105_mac_config_entry *mac;
3330         struct dsa_switch *ds = priv->ds;
3331         struct sja1105_table *table;
3332         bool already_enabled;
3333         u64 new_mirr_port;
3334         int rc;
3335
3336         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
3337         general_params = table->entries;
3338
3339         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
3340
3341         already_enabled = (general_params->mirr_port != ds->num_ports);
3342         if (already_enabled && enabled && general_params->mirr_port != to) {
3343                 dev_err(priv->ds->dev,
3344                         "Delete mirroring rules towards port %llu first\n",
3345                         general_params->mirr_port);
3346                 return -EBUSY;
3347         }
3348
3349         new_mirr_port = to;
3350         if (!enabled) {
3351                 bool keep = false;
3352                 int port;
3353
3354                 /* Anybody still referencing mirr_port? */
3355                 for (port = 0; port < ds->num_ports; port++) {
3356                         if (mac[port].ing_mirr || mac[port].egr_mirr) {
3357                                 keep = true;
3358                                 break;
3359                         }
3360                 }
3361                 /* Unset already_enabled for next time */
3362                 if (!keep)
3363                         new_mirr_port = ds->num_ports;
3364         }
3365         if (new_mirr_port != general_params->mirr_port) {
3366                 general_params->mirr_port = new_mirr_port;
3367
3368                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_GENERAL_PARAMS,
3369                                                   0, general_params, true);
3370                 if (rc < 0)
3371                         return rc;
3372         }
3373
3374         if (ingress)
3375                 mac[from].ing_mirr = enabled;
3376         else
3377                 mac[from].egr_mirr = enabled;
3378
3379         return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, from,
3380                                             &mac[from], true);
3381 }
3382
3383 static int sja1105_mirror_add(struct dsa_switch *ds, int port,
3384                               struct dsa_mall_mirror_tc_entry *mirror,
3385                               bool ingress)
3386 {
3387         return sja1105_mirror_apply(ds->priv, port, mirror->to_local_port,
3388                                     ingress, true);
3389 }
3390
3391 static void sja1105_mirror_del(struct dsa_switch *ds, int port,
3392                                struct dsa_mall_mirror_tc_entry *mirror)
3393 {
3394         sja1105_mirror_apply(ds->priv, port, mirror->to_local_port,
3395                              mirror->ingress, false);
3396 }
3397
3398 static int sja1105_port_policer_add(struct dsa_switch *ds, int port,
3399                                     struct dsa_mall_policer_tc_entry *policer)
3400 {
3401         struct sja1105_l2_policing_entry *policing;
3402         struct sja1105_private *priv = ds->priv;
3403
3404         policing = priv->static_config.tables[BLK_IDX_L2_POLICING].entries;
3405
3406         /* In hardware, every 8 microseconds the credit level is incremented by
3407          * the value of RATE bytes divided by 64, up to a maximum of SMAX
3408          * bytes.
3409          */
3410         policing[port].rate = div_u64(512 * policer->rate_bytes_per_sec,
3411                                       1000000);
3412         policing[port].smax = policer->burst;
3413
3414         return sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);
3415 }
3416
3417 static void sja1105_port_policer_del(struct dsa_switch *ds, int port)
3418 {
3419         struct sja1105_l2_policing_entry *policing;
3420         struct sja1105_private *priv = ds->priv;
3421
3422         policing = priv->static_config.tables[BLK_IDX_L2_POLICING].entries;
3423
3424         policing[port].rate = SJA1105_RATE_MBPS(1000);
3425         policing[port].smax = 65535;
3426
3427         sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);
3428 }
3429
3430 static int sja1105_port_set_learning(struct sja1105_private *priv, int port,
3431                                      bool enabled)
3432 {
3433         struct sja1105_mac_config_entry *mac;
3434         int rc;
3435
3436         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
3437
3438         mac[port].dyn_learn = enabled;
3439
3440         rc = sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
3441                                           &mac[port], true);
3442         if (rc)
3443                 return rc;
3444
3445         if (enabled)
3446                 priv->learn_ena |= BIT(port);
3447         else
3448                 priv->learn_ena &= ~BIT(port);
3449
3450         return 0;
3451 }
3452
3453 static int sja1105_port_ucast_bcast_flood(struct sja1105_private *priv, int to,
3454                                           struct switchdev_brport_flags flags)
3455 {
3456         if (flags.mask & BR_FLOOD) {
3457                 if (flags.val & BR_FLOOD)
3458                         priv->ucast_egress_floods |= BIT(to);
3459                 else
3460                         priv->ucast_egress_floods &= ~BIT(to);
3461         }
3462
3463         if (flags.mask & BR_BCAST_FLOOD) {
3464                 if (flags.val & BR_BCAST_FLOOD)
3465                         priv->bcast_egress_floods |= BIT(to);
3466                 else
3467                         priv->bcast_egress_floods &= ~BIT(to);
3468         }
3469
3470         return sja1105_manage_flood_domains(priv);
3471 }
3472
3473 static int sja1105_port_mcast_flood(struct sja1105_private *priv, int to,
3474                                     struct switchdev_brport_flags flags,
3475                                     struct netlink_ext_ack *extack)
3476 {
3477         struct sja1105_l2_lookup_entry *l2_lookup;
3478         struct sja1105_table *table;
3479         int match;
3480
3481         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
3482         l2_lookup = table->entries;
3483
3484         for (match = 0; match < table->entry_count; match++)
3485                 if (l2_lookup[match].macaddr == SJA1105_UNKNOWN_MULTICAST &&
3486                     l2_lookup[match].mask_macaddr == SJA1105_UNKNOWN_MULTICAST)
3487                         break;
3488
3489         if (match == table->entry_count) {
3490                 NL_SET_ERR_MSG_MOD(extack,
3491                                    "Could not find FDB entry for unknown multicast");
3492                 return -ENOSPC;
3493         }
3494
3495         if (flags.val & BR_MCAST_FLOOD)
3496                 l2_lookup[match].destports |= BIT(to);
3497         else
3498                 l2_lookup[match].destports &= ~BIT(to);
3499
3500         return sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
3501                                             l2_lookup[match].index,
3502                                             &l2_lookup[match],
3503                                             true);
3504 }
3505
3506 static int sja1105_port_pre_bridge_flags(struct dsa_switch *ds, int port,
3507                                          struct switchdev_brport_flags flags,
3508                                          struct netlink_ext_ack *extack)
3509 {
3510         struct sja1105_private *priv = ds->priv;
3511
3512         if (flags.mask & ~(BR_LEARNING | BR_FLOOD | BR_MCAST_FLOOD |
3513                            BR_BCAST_FLOOD))
3514                 return -EINVAL;
3515
3516         if (flags.mask & (BR_FLOOD | BR_MCAST_FLOOD) &&
3517             !priv->info->can_limit_mcast_flood) {
3518                 bool multicast = !!(flags.val & BR_MCAST_FLOOD);
3519                 bool unicast = !!(flags.val & BR_FLOOD);
3520
3521                 if (unicast != multicast) {
3522                         NL_SET_ERR_MSG_MOD(extack,
3523                                            "This chip cannot configure multicast flooding independently of unicast");
3524                         return -EINVAL;
3525                 }
3526         }
3527
3528         return 0;
3529 }
3530
3531 static int sja1105_port_bridge_flags(struct dsa_switch *ds, int port,
3532                                      struct switchdev_brport_flags flags,
3533                                      struct netlink_ext_ack *extack)
3534 {
3535         struct sja1105_private *priv = ds->priv;
3536         int rc;
3537
3538         if (flags.mask & BR_LEARNING) {
3539                 bool learn_ena = !!(flags.val & BR_LEARNING);
3540
3541                 rc = sja1105_port_set_learning(priv, port, learn_ena);
3542                 if (rc)
3543                         return rc;
3544         }
3545
3546         if (flags.mask & (BR_FLOOD | BR_BCAST_FLOOD)) {
3547                 rc = sja1105_port_ucast_bcast_flood(priv, port, flags);
3548                 if (rc)
3549                         return rc;
3550         }
3551
3552         /* For chips that can't offload BR_MCAST_FLOOD independently, there
3553          * is nothing to do here, we ensured the configuration is in sync by
3554          * offloading BR_FLOOD.
3555          */
3556         if (flags.mask & BR_MCAST_FLOOD && priv->info->can_limit_mcast_flood) {
3557                 rc = sja1105_port_mcast_flood(priv, port, flags,
3558                                               extack);
3559                 if (rc)
3560                         return rc;
3561         }
3562
3563         return 0;
3564 }
3565
3566 static const struct dsa_switch_ops sja1105_switch_ops = {
3567         .get_tag_protocol       = sja1105_get_tag_protocol,
3568         .setup                  = sja1105_setup,
3569         .teardown               = sja1105_teardown,
3570         .set_ageing_time        = sja1105_set_ageing_time,
3571         .port_change_mtu        = sja1105_change_mtu,
3572         .port_max_mtu           = sja1105_get_max_mtu,
3573         .phylink_validate       = sja1105_phylink_validate,
3574         .phylink_mac_config     = sja1105_mac_config,
3575         .phylink_mac_link_up    = sja1105_mac_link_up,
3576         .phylink_mac_link_down  = sja1105_mac_link_down,
3577         .get_strings            = sja1105_get_strings,
3578         .get_ethtool_stats      = sja1105_get_ethtool_stats,
3579         .get_sset_count         = sja1105_get_sset_count,
3580         .get_ts_info            = sja1105_get_ts_info,
3581         .port_disable           = sja1105_port_disable,
3582         .port_fdb_dump          = sja1105_fdb_dump,
3583         .port_fdb_add           = sja1105_fdb_add,
3584         .port_fdb_del           = sja1105_fdb_del,
3585         .port_bridge_join       = sja1105_bridge_join,
3586         .port_bridge_leave      = sja1105_bridge_leave,
3587         .port_pre_bridge_flags  = sja1105_port_pre_bridge_flags,
3588         .port_bridge_flags      = sja1105_port_bridge_flags,
3589         .port_stp_state_set     = sja1105_bridge_stp_state_set,
3590         .port_vlan_filtering    = sja1105_vlan_filtering,
3591         .port_vlan_add          = sja1105_vlan_add,
3592         .port_vlan_del          = sja1105_vlan_del,
3593         .port_mdb_add           = sja1105_mdb_add,
3594         .port_mdb_del           = sja1105_mdb_del,
3595         .port_hwtstamp_get      = sja1105_hwtstamp_get,
3596         .port_hwtstamp_set      = sja1105_hwtstamp_set,
3597         .port_rxtstamp          = sja1105_port_rxtstamp,
3598         .port_txtstamp          = sja1105_port_txtstamp,
3599         .port_setup_tc          = sja1105_port_setup_tc,
3600         .port_mirror_add        = sja1105_mirror_add,
3601         .port_mirror_del        = sja1105_mirror_del,
3602         .port_policer_add       = sja1105_port_policer_add,
3603         .port_policer_del       = sja1105_port_policer_del,
3604         .cls_flower_add         = sja1105_cls_flower_add,
3605         .cls_flower_del         = sja1105_cls_flower_del,
3606         .cls_flower_stats       = sja1105_cls_flower_stats,
3607         .crosschip_bridge_join  = sja1105_crosschip_bridge_join,
3608         .crosschip_bridge_leave = sja1105_crosschip_bridge_leave,
3609         .devlink_param_get      = sja1105_devlink_param_get,
3610         .devlink_param_set      = sja1105_devlink_param_set,
3611         .devlink_info_get       = sja1105_devlink_info_get,
3612 };
3613
3614 static const struct of_device_id sja1105_dt_ids[];
3615
3616 static int sja1105_check_device_id(struct sja1105_private *priv)
3617 {
3618         const struct sja1105_regs *regs = priv->info->regs;
3619         u8 prod_id[SJA1105_SIZE_DEVICE_ID] = {0};
3620         struct device *dev = &priv->spidev->dev;
3621         const struct of_device_id *match;
3622         u32 device_id;
3623         u64 part_no;
3624         int rc;
3625
3626         rc = sja1105_xfer_u32(priv, SPI_READ, regs->device_id, &device_id,
3627                               NULL);
3628         if (rc < 0)
3629                 return rc;
3630
3631         rc = sja1105_xfer_buf(priv, SPI_READ, regs->prod_id, prod_id,
3632                               SJA1105_SIZE_DEVICE_ID);
3633         if (rc < 0)
3634                 return rc;
3635
3636         sja1105_unpack(prod_id, &part_no, 19, 4, SJA1105_SIZE_DEVICE_ID);
3637
3638         for (match = sja1105_dt_ids; match->compatible[0]; match++) {
3639                 const struct sja1105_info *info = match->data;
3640
3641                 /* Is what's been probed in our match table at all? */
3642                 if (info->device_id != device_id || info->part_no != part_no)
3643                         continue;
3644
3645                 /* But is it what's in the device tree? */
3646                 if (priv->info->device_id != device_id ||
3647                     priv->info->part_no != part_no) {
3648                         dev_warn(dev, "Device tree specifies chip %s but found %s, please fix it!\n",
3649                                  priv->info->name, info->name);
3650                         /* It isn't. No problem, pick that up. */
3651                         priv->info = info;
3652                 }
3653
3654                 return 0;
3655         }
3656
3657         dev_err(dev, "Unexpected {device ID, part number}: 0x%x 0x%llx\n",
3658                 device_id, part_no);
3659
3660         return -ENODEV;
3661 }
3662
3663 static int sja1105_probe(struct spi_device *spi)
3664 {
3665         struct sja1105_tagger_data *tagger_data;
3666         struct device *dev = &spi->dev;
3667         struct sja1105_private *priv;
3668         size_t max_xfer, max_msg;
3669         struct dsa_switch *ds;
3670         int rc, port;
3671
3672         if (!dev->of_node) {
3673                 dev_err(dev, "No DTS bindings for SJA1105 driver\n");
3674                 return -EINVAL;
3675         }
3676
3677         priv = devm_kzalloc(dev, sizeof(struct sja1105_private), GFP_KERNEL);
3678         if (!priv)
3679                 return -ENOMEM;
3680
3681         /* Configure the optional reset pin and bring up switch */
3682         priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
3683         if (IS_ERR(priv->reset_gpio))
3684                 dev_dbg(dev, "reset-gpios not defined, ignoring\n");
3685         else
3686                 sja1105_hw_reset(priv->reset_gpio, 1, 1);
3687
3688         /* Populate our driver private structure (priv) based on
3689          * the device tree node that was probed (spi)
3690          */
3691         priv->spidev = spi;
3692         spi_set_drvdata(spi, priv);
3693
3694         /* Configure the SPI bus */
3695         spi->bits_per_word = 8;
3696         rc = spi_setup(spi);
3697         if (rc < 0) {
3698                 dev_err(dev, "Could not init SPI\n");
3699                 return rc;
3700         }
3701
3702         /* In sja1105_xfer, we send spi_messages composed of two spi_transfers:
3703          * a small one for the message header and another one for the current
3704          * chunk of the packed buffer.
3705          * Check that the restrictions imposed by the SPI controller are
3706          * respected: the chunk buffer is smaller than the max transfer size,
3707          * and the total length of the chunk plus its message header is smaller
3708          * than the max message size.
3709          * We do that during probe time since the maximum transfer size is a
3710          * runtime invariant.
3711          */
3712         max_xfer = spi_max_transfer_size(spi);
3713         max_msg = spi_max_message_size(spi);
3714
3715         /* We need to send at least one 64-bit word of SPI payload per message
3716          * in order to be able to make useful progress.
3717          */
3718         if (max_msg < SJA1105_SIZE_SPI_MSG_HEADER + 8) {
3719                 dev_err(dev, "SPI master cannot send large enough buffers, aborting\n");
3720                 return -EINVAL;
3721         }
3722
3723         priv->max_xfer_len = SJA1105_SIZE_SPI_MSG_MAXLEN;
3724         if (priv->max_xfer_len > max_xfer)
3725                 priv->max_xfer_len = max_xfer;
3726         if (priv->max_xfer_len > max_msg - SJA1105_SIZE_SPI_MSG_HEADER)
3727                 priv->max_xfer_len = max_msg - SJA1105_SIZE_SPI_MSG_HEADER;
3728
3729         priv->info = of_device_get_match_data(dev);
3730
3731         /* Detect hardware device */
3732         rc = sja1105_check_device_id(priv);
3733         if (rc < 0) {
3734                 dev_err(dev, "Device ID check failed: %d\n", rc);
3735                 return rc;
3736         }
3737
3738         dev_info(dev, "Probed switch chip: %s\n", priv->info->name);
3739
3740         ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL);
3741         if (!ds)
3742                 return -ENOMEM;
3743
3744         ds->dev = dev;
3745         ds->num_ports = priv->info->num_ports;
3746         ds->ops = &sja1105_switch_ops;
3747         ds->priv = priv;
3748         priv->ds = ds;
3749
3750         tagger_data = &priv->tagger_data;
3751
3752         mutex_init(&priv->ptp_data.lock);
3753         mutex_init(&priv->mgmt_lock);
3754
3755         priv->dsa_8021q_ctx = devm_kzalloc(dev, sizeof(*priv->dsa_8021q_ctx),
3756                                            GFP_KERNEL);
3757         if (!priv->dsa_8021q_ctx)
3758                 return -ENOMEM;
3759
3760         priv->dsa_8021q_ctx->ops = &sja1105_dsa_8021q_ops;
3761         priv->dsa_8021q_ctx->proto = htons(ETH_P_8021Q);
3762         priv->dsa_8021q_ctx->ds = ds;
3763
3764         INIT_LIST_HEAD(&priv->dsa_8021q_ctx->crosschip_links);
3765         INIT_LIST_HEAD(&priv->bridge_vlans);
3766         INIT_LIST_HEAD(&priv->dsa_8021q_vlans);
3767
3768         sja1105_tas_setup(ds);
3769         sja1105_flower_setup(ds);
3770
3771         rc = dsa_register_switch(priv->ds);
3772         if (rc)
3773                 return rc;
3774
3775         if (IS_ENABLED(CONFIG_NET_SCH_CBS)) {
3776                 priv->cbs = devm_kcalloc(dev, priv->info->num_cbs_shapers,
3777                                          sizeof(struct sja1105_cbs_entry),
3778                                          GFP_KERNEL);
3779                 if (!priv->cbs) {
3780                         rc = -ENOMEM;
3781                         goto out_unregister_switch;
3782                 }
3783         }
3784
3785         /* Connections between dsa_port and sja1105_port */
3786         for (port = 0; port < ds->num_ports; port++) {
3787                 struct sja1105_port *sp = &priv->ports[port];
3788                 struct dsa_port *dp = dsa_to_port(ds, port);
3789                 struct net_device *slave;
3790                 int subvlan;
3791
3792                 if (!dsa_is_user_port(ds, port))
3793                         continue;
3794
3795                 dp->priv = sp;
3796                 sp->dp = dp;
3797                 sp->data = tagger_data;
3798                 slave = dp->slave;
3799                 kthread_init_work(&sp->xmit_work, sja1105_port_deferred_xmit);
3800                 sp->xmit_worker = kthread_create_worker(0, "%s_xmit",
3801                                                         slave->name);
3802                 if (IS_ERR(sp->xmit_worker)) {
3803                         rc = PTR_ERR(sp->xmit_worker);
3804                         dev_err(ds->dev,
3805                                 "failed to create deferred xmit thread: %d\n",
3806                                 rc);
3807                         goto out_destroy_workers;
3808                 }
3809                 skb_queue_head_init(&sp->xmit_queue);
3810                 sp->xmit_tpid = ETH_P_SJA1105;
3811
3812                 for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
3813                         sp->subvlan_map[subvlan] = VLAN_N_VID;
3814         }
3815
3816         return 0;
3817
3818 out_destroy_workers:
3819         while (port-- > 0) {
3820                 struct sja1105_port *sp = &priv->ports[port];
3821
3822                 if (!dsa_is_user_port(ds, port))
3823                         continue;
3824
3825                 kthread_destroy_worker(sp->xmit_worker);
3826         }
3827
3828 out_unregister_switch:
3829         dsa_unregister_switch(ds);
3830
3831         return rc;
3832 }
3833
3834 static int sja1105_remove(struct spi_device *spi)
3835 {
3836         struct sja1105_private *priv = spi_get_drvdata(spi);
3837
3838         dsa_unregister_switch(priv->ds);
3839         return 0;
3840 }
3841
3842 static const struct of_device_id sja1105_dt_ids[] = {
3843         { .compatible = "nxp,sja1105e", .data = &sja1105e_info },
3844         { .compatible = "nxp,sja1105t", .data = &sja1105t_info },
3845         { .compatible = "nxp,sja1105p", .data = &sja1105p_info },
3846         { .compatible = "nxp,sja1105q", .data = &sja1105q_info },
3847         { .compatible = "nxp,sja1105r", .data = &sja1105r_info },
3848         { .compatible = "nxp,sja1105s", .data = &sja1105s_info },
3849         { .compatible = "nxp,sja1110a", .data = &sja1110a_info },
3850         { .compatible = "nxp,sja1110b", .data = &sja1110b_info },
3851         { .compatible = "nxp,sja1110c", .data = &sja1110c_info },
3852         { .compatible = "nxp,sja1110d", .data = &sja1110d_info },
3853         { /* sentinel */ },
3854 };
3855 MODULE_DEVICE_TABLE(of, sja1105_dt_ids);
3856
3857 static struct spi_driver sja1105_driver = {
3858         .driver = {
3859                 .name  = "sja1105",
3860                 .owner = THIS_MODULE,
3861                 .of_match_table = of_match_ptr(sja1105_dt_ids),
3862         },
3863         .probe  = sja1105_probe,
3864         .remove = sja1105_remove,
3865 };
3866
3867 module_spi_driver(sja1105_driver);
3868
3869 MODULE_AUTHOR("Vladimir Oltean <olteanv@gmail.com>");
3870 MODULE_AUTHOR("Georg Waibel <georg.waibel@sensor-technik.de>");
3871 MODULE_DESCRIPTION("SJA1105 Driver");
3872 MODULE_LICENSE("GPL v2");