2 * Marvell 88E6xxx SERDES manipulation, via SMI bus
4 * Copyright (c) 2008 Marvell Semiconductor
6 * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/mii.h>
22 static int mv88e6352_serdes_read(struct mv88e6xxx_chip *chip, int reg,
25 return mv88e6xxx_phy_page_read(chip, MV88E6352_ADDR_SERDES,
26 MV88E6352_SERDES_PAGE_FIBER,
30 static int mv88e6352_serdes_write(struct mv88e6xxx_chip *chip, int reg,
33 return mv88e6xxx_phy_page_write(chip, MV88E6352_ADDR_SERDES,
34 MV88E6352_SERDES_PAGE_FIBER,
38 static int mv88e6390_serdes_read(struct mv88e6xxx_chip *chip,
39 int lane, int device, int reg, u16 *val)
41 int reg_c45 = MII_ADDR_C45 | device << 16 | reg;
43 return mv88e6xxx_phy_read(chip, lane, reg_c45, val);
46 static int mv88e6390_serdes_write(struct mv88e6xxx_chip *chip,
47 int lane, int device, int reg, u16 val)
49 int reg_c45 = MII_ADDR_C45 | device << 16 | reg;
51 return mv88e6xxx_phy_write(chip, lane, reg_c45, val);
54 static int mv88e6352_serdes_power_set(struct mv88e6xxx_chip *chip, bool on)
59 err = mv88e6352_serdes_read(chip, MII_BMCR, &val);
64 new_val = val & ~BMCR_PDOWN;
66 new_val = val | BMCR_PDOWN;
69 err = mv88e6352_serdes_write(chip, MII_BMCR, new_val);
74 static bool mv88e6352_port_has_serdes(struct mv88e6xxx_chip *chip, int port)
79 err = mv88e6xxx_port_get_cmode(chip, port, &cmode);
81 dev_err(chip->dev, "failed to read cmode\n");
85 if ((cmode == MV88E6XXX_PORT_STS_CMODE_100BASE_X) ||
86 (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASE_X) ||
87 (cmode == MV88E6XXX_PORT_STS_CMODE_SGMII))
93 int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on)
97 if (mv88e6352_port_has_serdes(chip, port)) {
98 err = mv88e6352_serdes_power_set(chip, on);
106 struct mv88e6352_serdes_hw_stat {
107 char string[ETH_GSTRING_LEN];
112 static struct mv88e6352_serdes_hw_stat mv88e6352_serdes_hw_stats[] = {
113 { "serdes_fibre_rx_error", 16, 21 },
114 { "serdes_PRBS_error", 32, 24 },
117 int mv88e6352_serdes_get_sset_count(struct mv88e6xxx_chip *chip, int port)
119 if (mv88e6352_port_has_serdes(chip, port))
120 return ARRAY_SIZE(mv88e6352_serdes_hw_stats);
125 int mv88e6352_serdes_get_strings(struct mv88e6xxx_chip *chip,
126 int port, uint8_t *data)
128 struct mv88e6352_serdes_hw_stat *stat;
131 if (!mv88e6352_port_has_serdes(chip, port))
134 for (i = 0; i < ARRAY_SIZE(mv88e6352_serdes_hw_stats); i++) {
135 stat = &mv88e6352_serdes_hw_stats[i];
136 memcpy(data + i * ETH_GSTRING_LEN, stat->string,
139 return ARRAY_SIZE(mv88e6352_serdes_hw_stats);
142 static uint64_t mv88e6352_serdes_get_stat(struct mv88e6xxx_chip *chip,
143 struct mv88e6352_serdes_hw_stat *stat)
149 err = mv88e6352_serdes_read(chip, stat->reg, ®);
151 dev_err(chip->dev, "failed to read statistic\n");
157 if (stat->sizeof_stat == 32) {
158 err = mv88e6352_serdes_read(chip, stat->reg + 1, ®);
160 dev_err(chip->dev, "failed to read statistic\n");
163 val = val << 16 | reg;
169 int mv88e6352_serdes_get_stats(struct mv88e6xxx_chip *chip, int port,
172 struct mv88e6xxx_port *mv88e6xxx_port = &chip->ports[port];
173 struct mv88e6352_serdes_hw_stat *stat;
177 if (!mv88e6352_port_has_serdes(chip, port))
180 BUILD_BUG_ON(ARRAY_SIZE(mv88e6352_serdes_hw_stats) >
181 ARRAY_SIZE(mv88e6xxx_port->serdes_stats));
183 for (i = 0; i < ARRAY_SIZE(mv88e6352_serdes_hw_stats); i++) {
184 stat = &mv88e6352_serdes_hw_stats[i];
185 value = mv88e6352_serdes_get_stat(chip, stat);
186 mv88e6xxx_port->serdes_stats[i] += value;
187 data[i] = mv88e6xxx_port->serdes_stats[i];
190 return ARRAY_SIZE(mv88e6352_serdes_hw_stats);
193 /* Return the SERDES lane address a port is using. Only Ports 9 and 10
194 * have SERDES lanes. Returns -ENODEV if a port does not have a lane.
196 static int mv88e6390_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)
201 err = mv88e6xxx_port_get_cmode(chip, port, &cmode);
207 if (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
208 cmode == MV88E6XXX_PORT_STS_CMODE_SGMII ||
209 cmode == MV88E6XXX_PORT_STS_CMODE_2500BASEX)
210 return MV88E6390_PORT9_LANE0;
213 if (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
214 cmode == MV88E6XXX_PORT_STS_CMODE_SGMII ||
215 cmode == MV88E6XXX_PORT_STS_CMODE_2500BASEX)
216 return MV88E6390_PORT10_LANE0;
223 /* Return the SERDES lane address a port is using. Ports 9 and 10 can
224 * use multiple lanes. If so, return the first lane the port uses.
225 * Returns -ENODEV if a port does not have a lane.
227 static int mv88e6390x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)
229 u8 cmode_port9, cmode_port10, cmode_port;
232 err = mv88e6xxx_port_get_cmode(chip, 9, &cmode_port9);
236 err = mv88e6xxx_port_get_cmode(chip, 10, &cmode_port10);
240 err = mv88e6xxx_port_get_cmode(chip, port, &cmode_port);
246 if (cmode_port9 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
247 cmode_port9 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
248 cmode_port9 == MV88E6XXX_PORT_STS_CMODE_2500BASEX)
249 if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASE_X)
250 return MV88E6390_PORT9_LANE1;
253 if (cmode_port9 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
254 cmode_port9 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
255 cmode_port9 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||
256 cmode_port9 == MV88E6XXX_PORT_STS_CMODE_RXAUI)
257 if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASE_X)
258 return MV88E6390_PORT9_LANE2;
261 if (cmode_port9 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
262 cmode_port9 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
263 cmode_port9 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||
264 cmode_port9 == MV88E6XXX_PORT_STS_CMODE_RXAUI)
265 if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASE_X)
266 return MV88E6390_PORT9_LANE3;
269 if (cmode_port10 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
270 cmode_port10 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
271 cmode_port10 == MV88E6XXX_PORT_STS_CMODE_2500BASEX)
272 if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASE_X)
273 return MV88E6390_PORT10_LANE1;
276 if (cmode_port10 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
277 cmode_port10 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
278 cmode_port10 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||
279 cmode_port10 == MV88E6XXX_PORT_STS_CMODE_RXAUI)
280 if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASE_X)
281 return MV88E6390_PORT10_LANE2;
284 if (cmode_port10 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
285 cmode_port10 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
286 cmode_port10 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||
287 cmode_port10 == MV88E6XXX_PORT_STS_CMODE_RXAUI)
288 if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASE_X)
289 return MV88E6390_PORT10_LANE3;
292 if (cmode_port9 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
293 cmode_port9 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
294 cmode_port9 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||
295 cmode_port9 == MV88E6XXX_PORT_STS_CMODE_XAUI ||
296 cmode_port9 == MV88E6XXX_PORT_STS_CMODE_RXAUI)
297 return MV88E6390_PORT9_LANE0;
300 if (cmode_port10 == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
301 cmode_port10 == MV88E6XXX_PORT_STS_CMODE_SGMII ||
302 cmode_port10 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||
303 cmode_port10 == MV88E6XXX_PORT_STS_CMODE_XAUI ||
304 cmode_port10 == MV88E6XXX_PORT_STS_CMODE_RXAUI)
305 return MV88E6390_PORT10_LANE0;
312 /* Set the power on/off for 10GBASE-R and 10GBASE-X4/X2 */
313 static int mv88e6390_serdes_power_10g(struct mv88e6xxx_chip *chip, int lane,
319 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
320 MV88E6390_PCS_CONTROL_1, &val);
326 new_val = val & ~(MV88E6390_PCS_CONTROL_1_RESET |
327 MV88E6390_PCS_CONTROL_1_LOOPBACK |
328 MV88E6390_PCS_CONTROL_1_PDOWN);
330 new_val = val | MV88E6390_PCS_CONTROL_1_PDOWN;
333 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
334 MV88E6390_PCS_CONTROL_1, new_val);
339 /* Set the power on/off for SGMII and 1000Base-X */
340 static int mv88e6390_serdes_power_sgmii(struct mv88e6xxx_chip *chip, int lane,
346 err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
347 MV88E6390_SGMII_CONTROL, &val);
352 new_val = val & ~(MV88E6390_SGMII_CONTROL_RESET |
353 MV88E6390_SGMII_CONTROL_LOOPBACK |
354 MV88E6390_SGMII_CONTROL_PDOWN);
356 new_val = val | MV88E6390_SGMII_CONTROL_PDOWN;
359 err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
360 MV88E6390_SGMII_CONTROL, new_val);
365 static int mv88e6390_serdes_power_lane(struct mv88e6xxx_chip *chip, int port,
371 err = mv88e6xxx_port_get_cmode(chip, port, &cmode);
376 case MV88E6XXX_PORT_STS_CMODE_SGMII:
377 case MV88E6XXX_PORT_STS_CMODE_1000BASE_X:
378 return mv88e6390_serdes_power_sgmii(chip, lane, on);
379 case MV88E6XXX_PORT_STS_CMODE_XAUI:
380 case MV88E6XXX_PORT_STS_CMODE_RXAUI:
381 case MV88E6XXX_PORT_STS_CMODE_2500BASEX:
382 return mv88e6390_serdes_power_10g(chip, lane, on);
388 int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on)
392 lane = mv88e6390_serdes_get_lane(chip, port);
401 return mv88e6390_serdes_power_lane(chip, port, lane, on);
407 int mv88e6390x_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on)
411 lane = mv88e6390x_serdes_get_lane(chip, port);
422 return mv88e6390_serdes_power_lane(chip, port, lane, on);
428 int mv88e6341_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on)
436 err = mv88e6xxx_port_get_cmode(chip, port, &cmode);
440 if (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
441 cmode == MV88E6XXX_PORT_STS_CMODE_SGMII ||
442 cmode == MV88E6XXX_PORT_STS_CMODE_2500BASEX)
443 return mv88e6390_serdes_power_sgmii(chip, MV88E6341_ADDR_SERDES,