drivers/net/dsa/microchip/ksz_common.c

   1 /*
   2  * Microchip switch driver main logic
   3  *
   4  * Copyright (C) 2017
   5  *
   6  * Permission to use, copy, modify, and/or distribute this software for any
   7  * purpose with or without fee is hereby granted, provided that the above
   8  * copyright notice and this permission notice appear in all copies.
   9  *
  10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  */
  18
  19 #include <linux/delay.h>
  20 #include <linux/export.h>
  21 #include <linux/gpio.h>
  22 #include <linux/kernel.h>
  23 #include <linux/module.h>
  24 #include <linux/platform_data/microchip-ksz.h>
  25 #include <linux/phy.h>
  26 #include <linux/etherdevice.h>
  27 #include <linux/if_bridge.h>
  28 #include <net/dsa.h>
  29 #include <net/switchdev.h>
  30
  31 #include "ksz_priv.h"
  32
  33 static const struct {
  34         int index;
  35         char string[ETH_GSTRING_LEN];
  36 } mib_names[TOTAL_SWITCH_COUNTER_NUM] = {
  37         { 0x00, "rx_hi" },
  38         { 0x01, "rx_undersize" },
  39         { 0x02, "rx_fragments" },
  40         { 0x03, "rx_oversize" },
  41         { 0x04, "rx_jabbers" },
  42         { 0x05, "rx_symbol_err" },
  43         { 0x06, "rx_crc_err" },
  44         { 0x07, "rx_align_err" },
  45         { 0x08, "rx_mac_ctrl" },
  46         { 0x09, "rx_pause" },
  47         { 0x0A, "rx_bcast" },
  48         { 0x0B, "rx_mcast" },
  49         { 0x0C, "rx_ucast" },
  50         { 0x0D, "rx_64_or_less" },
  51         { 0x0E, "rx_65_127" },
  52         { 0x0F, "rx_128_255" },
  53         { 0x10, "rx_256_511" },
  54         { 0x11, "rx_512_1023" },
  55         { 0x12, "rx_1024_1522" },
  56         { 0x13, "rx_1523_2000" },
  57         { 0x14, "rx_2001" },
  58         { 0x15, "tx_hi" },
  59         { 0x16, "tx_late_col" },
  60         { 0x17, "tx_pause" },
  61         { 0x18, "tx_bcast" },
  62         { 0x19, "tx_mcast" },
  63         { 0x1A, "tx_ucast" },
  64         { 0x1B, "tx_deferred" },
  65         { 0x1C, "tx_total_col" },
  66         { 0x1D, "tx_exc_col" },
  67         { 0x1E, "tx_single_col" },
  68         { 0x1F, "tx_mult_col" },
  69         { 0x80, "rx_total" },
  70         { 0x81, "tx_total" },
  71         { 0x82, "rx_discards" },
  72         { 0x83, "tx_discards" },
  73 };
  74
  75 static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)
  76 {
  77         u8 data;
  78
  79         ksz_read8(dev, addr, &data);
  80         if (set)
  81                 data |= bits;
  82         else
  83                 data &= ~bits;
  84         ksz_write8(dev, addr, data);
  85 }
  86
  87 static void ksz_cfg32(struct ksz_device *dev, u32 addr, u32 bits, bool set)
  88 {
  89         u32 data;
  90
  91         ksz_read32(dev, addr, &data);
  92         if (set)
  93                 data |= bits;
  94         else
  95                 data &= ~bits;
  96         ksz_write32(dev, addr, data);
  97 }
  98
  99 static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,
 100                          bool set)
 101 {
 102         u32 addr;
 103         u8 data;
 104
 105         addr = PORT_CTRL_ADDR(port, offset);
 106         ksz_read8(dev, addr, &data);
 107
 108         if (set)
 109                 data |= bits;
 110         else
 111                 data &= ~bits;
 112
 113         ksz_write8(dev, addr, data);
 114 }
 115
 116 static void ksz_port_cfg32(struct ksz_device *dev, int port, int offset,
 117                            u32 bits, bool set)
 118 {
 119         u32 addr;
 120         u32 data;
 121
 122         addr = PORT_CTRL_ADDR(port, offset);
 123         ksz_read32(dev, addr, &data);
 124
 125         if (set)
 126                 data |= bits;
 127         else
 128                 data &= ~bits;
 129
 130         ksz_write32(dev, addr, data);
 131 }
 132
 133 static int wait_vlan_ctrl_ready(struct ksz_device *dev, u32 waiton, int timeout)
 134 {
 135         u8 data;
 136
 137         do {
 138                 ksz_read8(dev, REG_SW_VLAN_CTRL, &data);
 139                 if (!(data & waiton))
 140                         break;
 141                 usleep_range(1, 10);
 142         } while (timeout-- > 0);
 143
 144         if (timeout <= 0)
 145                 return -ETIMEDOUT;
 146
 147         return 0;
 148 }
 149
 150 static int get_vlan_table(struct dsa_switch *ds, u16 vid, u32 *vlan_table)
 151 {
 152         struct ksz_device *dev = ds->priv;
 153         int ret;
 154
 155         mutex_lock(&dev->vlan_mutex);
 156
 157         ksz_write16(dev, REG_SW_VLAN_ENTRY_INDEX__2, vid & VLAN_INDEX_M);
 158         ksz_write8(dev, REG_SW_VLAN_CTRL, VLAN_READ | VLAN_START);
 159
 160         /* wait to be cleared */
 161         ret = wait_vlan_ctrl_ready(dev, VLAN_START, 1000);
 162         if (ret < 0) {
 163                 dev_dbg(dev->dev, "Failed to read vlan table\n");
 164                 goto exit;
 165         }
 166
 167         ksz_read32(dev, REG_SW_VLAN_ENTRY__4, &vlan_table[0]);
 168         ksz_read32(dev, REG_SW_VLAN_ENTRY_UNTAG__4, &vlan_table[1]);
 169         ksz_read32(dev, REG_SW_VLAN_ENTRY_PORTS__4, &vlan_table[2]);
 170
 171         ksz_write8(dev, REG_SW_VLAN_CTRL, 0);
 172
 173 exit:
 174         mutex_unlock(&dev->vlan_mutex);
 175
 176         return ret;
 177 }
 178
 179 static int set_vlan_table(struct dsa_switch *ds, u16 vid, u32 *vlan_table)
 180 {
 181         struct ksz_device *dev = ds->priv;
 182         int ret;
 183
 184         mutex_lock(&dev->vlan_mutex);
 185
 186         ksz_write32(dev, REG_SW_VLAN_ENTRY__4, vlan_table[0]);
 187         ksz_write32(dev, REG_SW_VLAN_ENTRY_UNTAG__4, vlan_table[1]);
 188         ksz_write32(dev, REG_SW_VLAN_ENTRY_PORTS__4, vlan_table[2]);
 189
 190         ksz_write16(dev, REG_SW_VLAN_ENTRY_INDEX__2, vid & VLAN_INDEX_M);
 191         ksz_write8(dev, REG_SW_VLAN_CTRL, VLAN_START | VLAN_WRITE);
 192
 193         /* wait to be cleared */
 194         ret = wait_vlan_ctrl_ready(dev, VLAN_START, 1000);
 195         if (ret < 0) {
 196                 dev_dbg(dev->dev, "Failed to write vlan table\n");
 197                 goto exit;
 198         }
 199
 200         ksz_write8(dev, REG_SW_VLAN_CTRL, 0);
 201
 202         /* update vlan cache table */
 203         dev->vlan_cache[vid].table[0] = vlan_table[0];
 204         dev->vlan_cache[vid].table[1] = vlan_table[1];
 205         dev->vlan_cache[vid].table[2] = vlan_table[2];
 206
 207 exit:
 208         mutex_unlock(&dev->vlan_mutex);
 209
 210         return ret;
 211 }
 212
 213 static void read_table(struct dsa_switch *ds, u32 *table)
 214 {
 215         struct ksz_device *dev = ds->priv;
 216
 217         ksz_read32(dev, REG_SW_ALU_VAL_A, &table[0]);
 218         ksz_read32(dev, REG_SW_ALU_VAL_B, &table[1]);
 219         ksz_read32(dev, REG_SW_ALU_VAL_C, &table[2]);
 220         ksz_read32(dev, REG_SW_ALU_VAL_D, &table[3]);
 221 }
 222
 223 static void write_table(struct dsa_switch *ds, u32 *table)
 224 {
 225         struct ksz_device *dev = ds->priv;
 226
 227         ksz_write32(dev, REG_SW_ALU_VAL_A, table[0]);
 228         ksz_write32(dev, REG_SW_ALU_VAL_B, table[1]);
 229         ksz_write32(dev, REG_SW_ALU_VAL_C, table[2]);
 230         ksz_write32(dev, REG_SW_ALU_VAL_D, table[3]);
 231 }
 232
 233 static int wait_alu_ready(struct ksz_device *dev, u32 waiton, int timeout)
 234 {
 235         u32 data;
 236
 237         do {
 238                 ksz_read32(dev, REG_SW_ALU_CTRL__4, &data);
 239                 if (!(data & waiton))
 240                         break;
 241                 usleep_range(1, 10);
 242         } while (timeout-- > 0);
 243
 244         if (timeout <= 0)
 245                 return -ETIMEDOUT;
 246
 247         return 0;
 248 }
 249
 250 static int wait_alu_sta_ready(struct ksz_device *dev, u32 waiton, int timeout)
 251 {
 252         u32 data;
 253
 254         do {
 255                 ksz_read32(dev, REG_SW_ALU_STAT_CTRL__4, &data);
 256                 if (!(data & waiton))
 257                         break;
 258                 usleep_range(1, 10);
 259         } while (timeout-- > 0);
 260
 261         if (timeout <= 0)
 262                 return -ETIMEDOUT;
 263
 264         return 0;
 265 }
 266
 267 static int ksz_reset_switch(struct dsa_switch *ds)
 268 {
 269         struct ksz_device *dev = ds->priv;
 270         u8 data8;
 271         u16 data16;
 272         u32 data32;
 273
 274         /* reset switch */
 275         ksz_cfg(dev, REG_SW_OPERATION, SW_RESET, true);
 276
 277         /* turn off SPI DO Edge select */
 278         ksz_read8(dev, REG_SW_GLOBAL_SERIAL_CTRL_0, &data8);
 279         data8 &= ~SPI_AUTO_EDGE_DETECTION;
 280         ksz_write8(dev, REG_SW_GLOBAL_SERIAL_CTRL_0, data8);
 281
 282         /* default configuration */
 283         ksz_read8(dev, REG_SW_LUE_CTRL_1, &data8);
 284         data8 = SW_AGING_ENABLE | SW_LINK_AUTO_AGING |
 285               SW_SRC_ADDR_FILTER | SW_FLUSH_STP_TABLE | SW_FLUSH_MSTP_TABLE;
 286         ksz_write8(dev, REG_SW_LUE_CTRL_1, data8);
 287
 288         /* disable interrupts */
 289         ksz_write32(dev, REG_SW_INT_MASK__4, SWITCH_INT_MASK);
 290         ksz_write32(dev, REG_SW_PORT_INT_MASK__4, 0x7F);
 291         ksz_read32(dev, REG_SW_PORT_INT_STATUS__4, &data32);
 292
 293         /* set broadcast storm protection 10% rate */
 294         ksz_read16(dev, REG_SW_MAC_CTRL_2, &data16);
 295         data16 &= ~BROADCAST_STORM_RATE;
 296         data16 |= (BROADCAST_STORM_VALUE * BROADCAST_STORM_PROT_RATE) / 100;
 297         ksz_write16(dev, REG_SW_MAC_CTRL_2, data16);
 298
 299         return 0;
 300 }
 301
 302 static void port_setup(struct ksz_device *dev, int port, bool cpu_port)
 303 {
 304         u8 data8;
 305         u16 data16;
 306
 307         /* enable tag tail for host port */
 308         if (cpu_port)
 309                 ksz_port_cfg(dev, port, REG_PORT_CTRL_0, PORT_TAIL_TAG_ENABLE,
 310                              true);
 311
 312         ksz_port_cfg(dev, port, REG_PORT_CTRL_0, PORT_MAC_LOOPBACK, false);
 313
 314         /* set back pressure */
 315         ksz_port_cfg(dev, port, REG_PORT_MAC_CTRL_1, PORT_BACK_PRESSURE, true);
 316
 317         /* set flow control */
 318         ksz_port_cfg(dev, port, REG_PORT_CTRL_0,
 319                      PORT_FORCE_TX_FLOW_CTRL | PORT_FORCE_RX_FLOW_CTRL, true);
 320
 321         /* enable broadcast storm limit */
 322         ksz_port_cfg(dev, port, P_BCAST_STORM_CTRL, PORT_BROADCAST_STORM, true);
 323
 324         /* disable DiffServ priority */
 325         ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_DIFFSERV_PRIO_ENABLE, false);
 326
 327         /* replace priority */
 328         ksz_port_cfg(dev, port, REG_PORT_MRI_MAC_CTRL, PORT_USER_PRIO_CEILING,
 329                      false);
 330         ksz_port_cfg32(dev, port, REG_PORT_MTI_QUEUE_CTRL_0__4,
 331                        MTI_PVID_REPLACE, false);
 332
 333         /* enable 802.1p priority */
 334         ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_802_1P_PRIO_ENABLE, true);
 335
 336         /* configure MAC to 1G & RGMII mode */
 337         ksz_pread8(dev, port, REG_PORT_XMII_CTRL_1, &data8);
 338         data8 |= PORT_RGMII_ID_EG_ENABLE;
 339         data8 &= ~PORT_MII_NOT_1GBIT;
 340         data8 &= ~PORT_MII_SEL_M;
 341         data8 |= PORT_RGMII_SEL;
 342         ksz_pwrite8(dev, port, REG_PORT_XMII_CTRL_1, data8);
 343
 344         /* clear pending interrupts */
 345         ksz_pread16(dev, port, REG_PORT_PHY_INT_ENABLE, &data16);
 346 }
 347
 348 static void ksz_config_cpu_port(struct dsa_switch *ds)
 349 {
 350         struct ksz_device *dev = ds->priv;
 351         int i;
 352
 353         ds->num_ports = dev->port_cnt;
 354
 355         for (i = 0; i < ds->num_ports; i++) {
 356                 if (dsa_is_cpu_port(ds, i) && (dev->cpu_ports & (1 << i))) {
 357                         dev->cpu_port = i;
 358
 359                         /* enable cpu port */
 360                         port_setup(dev, i, true);
 361                 }
 362         }
 363 }
 364
 365 static int ksz_setup(struct dsa_switch *ds)
 366 {
 367         struct ksz_device *dev = ds->priv;
 368         int ret = 0;
 369
 370         dev->vlan_cache = devm_kcalloc(dev->dev, sizeof(struct vlan_table),
 371                                        dev->num_vlans, GFP_KERNEL);
 372         if (!dev->vlan_cache)
 373                 return -ENOMEM;
 374
 375         ret = ksz_reset_switch(ds);
 376         if (ret) {
 377                 dev_err(ds->dev, "failed to reset switch\n");
 378                 return ret;
 379         }
 380
 381         /* accept packet up to 2000bytes */
 382         ksz_cfg(dev, REG_SW_MAC_CTRL_1, SW_LEGAL_PACKET_DISABLE, true);
 383
 384         ksz_config_cpu_port(ds);
 385
 386         ksz_cfg(dev, REG_SW_MAC_CTRL_1, MULTICAST_STORM_DISABLE, true);
 387
 388         /* queue based egress rate limit */
 389         ksz_cfg(dev, REG_SW_MAC_CTRL_5, SW_OUT_RATE_LIMIT_QUEUE_BASED, true);
 390
 391         /* start switch */
 392         ksz_cfg(dev, REG_SW_OPERATION, SW_START, true);
 393
 394         return 0;
 395 }
 396
 397 static enum dsa_tag_protocol ksz_get_tag_protocol(struct dsa_switch *ds,
 398                                                   int port)
 399 {
 400         return DSA_TAG_PROTO_KSZ;
 401 }
 402
 403 static int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg)
 404 {
 405         struct ksz_device *dev = ds->priv;
 406         u16 val = 0;
 407
 408         ksz_pread16(dev, addr, 0x100 + (reg << 1), &val);
 409
 410         return val;
 411 }
 412
 413 static int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val)
 414 {
 415         struct ksz_device *dev = ds->priv;
 416
 417         ksz_pwrite16(dev, addr, 0x100 + (reg << 1), val);
 418
 419         return 0;
 420 }
 421
 422 static int ksz_enable_port(struct dsa_switch *ds, int port,
 423                            struct phy_device *phy)
 424 {
 425         struct ksz_device *dev = ds->priv;
 426
 427         /* setup slave port */
 428         port_setup(dev, port, false);
 429
 430         return 0;
 431 }
 432
 433 static void ksz_disable_port(struct dsa_switch *ds, int port,
 434                              struct phy_device *phy)
 435 {
 436         struct ksz_device *dev = ds->priv;
 437
 438         /* there is no port disable */
 439         ksz_port_cfg(dev, port, REG_PORT_CTRL_0, PORT_MAC_LOOPBACK, true);
 440 }
 441
 442 static int ksz_sset_count(struct dsa_switch *ds)
 443 {
 444         return TOTAL_SWITCH_COUNTER_NUM;
 445 }
 446
 447 static void ksz_get_strings(struct dsa_switch *ds, int port, uint8_t *buf)
 448 {
 449         int i;
 450
 451         for (i = 0; i < TOTAL_SWITCH_COUNTER_NUM; i++) {
 452                 memcpy(buf + i * ETH_GSTRING_LEN, mib_names[i].string,
 453                        ETH_GSTRING_LEN);
 454         }
 455 }
 456
 457 static void ksz_get_ethtool_stats(struct dsa_switch *ds, int port,
 458                                   uint64_t *buf)
 459 {
 460         struct ksz_device *dev = ds->priv;
 461         int i;
 462         u32 data;
 463         int timeout;
 464
 465         mutex_lock(&dev->stats_mutex);
 466
 467         for (i = 0; i < TOTAL_SWITCH_COUNTER_NUM; i++) {
 468                 data = MIB_COUNTER_READ;
 469                 data |= ((mib_names[i].index & 0xFF) << MIB_COUNTER_INDEX_S);
 470                 ksz_pwrite32(dev, port, REG_PORT_MIB_CTRL_STAT__4, data);
 471
 472                 timeout = 1000;
 473                 do {
 474                         ksz_pread32(dev, port, REG_PORT_MIB_CTRL_STAT__4,
 475                                     &data);
 476                         usleep_range(1, 10);
 477                         if (!(data & MIB_COUNTER_READ))
 478                                 break;
 479                 } while (timeout-- > 0);
 480
 481                 /* failed to read MIB. get out of loop */
 482                 if (!timeout) {
 483                         dev_dbg(dev->dev, "Failed to get MIB\n");
 484                         break;
 485                 }
 486
 487                 /* count resets upon read */
 488                 ksz_pread32(dev, port, REG_PORT_MIB_DATA, &data);
 489
 490                 dev->mib_value[i] += (uint64_t)data;
 491                 buf[i] = dev->mib_value[i];
 492         }
 493
 494         mutex_unlock(&dev->stats_mutex);
 495 }
 496
 497 static void ksz_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)
 498 {
 499         struct ksz_device *dev = ds->priv;
 500         u8 data;
 501
 502         ksz_pread8(dev, port, P_STP_CTRL, &data);
 503         data &= ~(PORT_TX_ENABLE | PORT_RX_ENABLE | PORT_LEARN_DISABLE);
 504
 505         switch (state) {
 506         case BR_STATE_DISABLED:
 507                 data |= PORT_LEARN_DISABLE;
 508                 break;
 509         case BR_STATE_LISTENING:
 510                 data |= (PORT_RX_ENABLE | PORT_LEARN_DISABLE);
 511                 break;
 512         case BR_STATE_LEARNING:
 513                 data |= PORT_RX_ENABLE;
 514                 break;
 515         case BR_STATE_FORWARDING:
 516                 data |= (PORT_TX_ENABLE | PORT_RX_ENABLE);
 517                 break;
 518         case BR_STATE_BLOCKING:
 519                 data |= PORT_LEARN_DISABLE;
 520                 break;
 521         default:
 522                 dev_err(ds->dev, "invalid STP state: %d\n", state);
 523                 return;
 524         }
 525
 526         ksz_pwrite8(dev, port, P_STP_CTRL, data);
 527 }
 528
 529 static void ksz_port_fast_age(struct dsa_switch *ds, int port)
 530 {
 531         struct ksz_device *dev = ds->priv;
 532         u8 data8;
 533
 534         ksz_read8(dev, REG_SW_LUE_CTRL_1, &data8);
 535         data8 |= SW_FAST_AGING;
 536         ksz_write8(dev, REG_SW_LUE_CTRL_1, data8);
 537
 538         data8 &= ~SW_FAST_AGING;
 539         ksz_write8(dev, REG_SW_LUE_CTRL_1, data8);
 540 }
 541
 542 static int ksz_port_vlan_filtering(struct dsa_switch *ds, int port, bool flag)
 543 {
 544         struct ksz_device *dev = ds->priv;
 545
 546         if (flag) {
 547                 ksz_port_cfg(dev, port, REG_PORT_LUE_CTRL,
 548                              PORT_VLAN_LOOKUP_VID_0, true);
 549                 ksz_cfg32(dev, REG_SW_QM_CTRL__4, UNICAST_VLAN_BOUNDARY, true);
 550                 ksz_cfg(dev, REG_SW_LUE_CTRL_0, SW_VLAN_ENABLE, true);
 551         } else {
 552                 ksz_cfg(dev, REG_SW_LUE_CTRL_0, SW_VLAN_ENABLE, false);
 553                 ksz_cfg32(dev, REG_SW_QM_CTRL__4, UNICAST_VLAN_BOUNDARY, false);
 554                 ksz_port_cfg(dev, port, REG_PORT_LUE_CTRL,
 555                              PORT_VLAN_LOOKUP_VID_0, false);
 556         }
 557
 558         return 0;
 559 }
 560
 561 static int ksz_port_vlan_prepare(struct dsa_switch *ds, int port,
 562                                  const struct switchdev_obj_port_vlan *vlan,
 563                                  struct switchdev_trans *trans)
 564 {
 565         /* nothing needed */
 566
 567         return 0;
 568 }
 569
 570 static void ksz_port_vlan_add(struct dsa_switch *ds, int port,
 571                               const struct switchdev_obj_port_vlan *vlan,
 572                               struct switchdev_trans *trans)
 573 {
 574         struct ksz_device *dev = ds->priv;
 575         u32 vlan_table[3];
 576         u16 vid;
 577         bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
 578
 579         for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
 580                 if (get_vlan_table(ds, vid, vlan_table)) {
 581                         dev_dbg(dev->dev, "Failed to get vlan table\n");
 582                         return;
 583                 }
 584
 585                 vlan_table[0] = VLAN_VALID | (vid & VLAN_FID_M);
 586                 if (untagged)
 587                         vlan_table[1] |= BIT(port);
 588                 else
 589                         vlan_table[1] &= ~BIT(port);
 590                 vlan_table[1] &= ~(BIT(dev->cpu_port));
 591
 592                 vlan_table[2] |= BIT(port) | BIT(dev->cpu_port);
 593
 594                 if (set_vlan_table(ds, vid, vlan_table)) {
 595                         dev_dbg(dev->dev, "Failed to set vlan table\n");
 596                         return;
 597                 }
 598
 599                 /* change PVID */
 600                 if (vlan->flags & BRIDGE_VLAN_INFO_PVID)
 601                         ksz_pwrite16(dev, port, REG_PORT_DEFAULT_VID, vid);
 602         }
 603 }
 604
 605 static int ksz_port_vlan_del(struct dsa_switch *ds, int port,
 606                              const struct switchdev_obj_port_vlan *vlan)
 607 {
 608         struct ksz_device *dev = ds->priv;
 609         bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
 610         u32 vlan_table[3];
 611         u16 vid;
 612         u16 pvid;
 613
 614         ksz_pread16(dev, port, REG_PORT_DEFAULT_VID, &pvid);
 615         pvid = pvid & 0xFFF;
 616
 617         for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
 618                 if (get_vlan_table(ds, vid, vlan_table)) {
 619                         dev_dbg(dev->dev, "Failed to get vlan table\n");
 620                         return -ETIMEDOUT;
 621                 }
 622
 623                 vlan_table[2] &= ~BIT(port);
 624
 625                 if (pvid == vid)
 626                         pvid = 1;
 627
 628                 if (untagged)
 629                         vlan_table[1] &= ~BIT(port);
 630
 631                 if (set_vlan_table(ds, vid, vlan_table)) {
 632                         dev_dbg(dev->dev, "Failed to set vlan table\n");
 633                         return -ETIMEDOUT;
 634                 }
 635         }
 636
 637         ksz_pwrite16(dev, port, REG_PORT_DEFAULT_VID, pvid);
 638
 639         return 0;
 640 }
 641
 642 struct alu_struct {
 643         /* entry 1 */
 644         u8      is_static:1;
 645         u8      is_src_filter:1;
 646         u8      is_dst_filter:1;
 647         u8      prio_age:3;
 648         u32     _reserv_0_1:23;
 649         u8      mstp:3;
 650         /* entry 2 */
 651         u8      is_override:1;
 652         u8      is_use_fid:1;
 653         u32     _reserv_1_1:23;
 654         u8      port_forward:7;
 655         /* entry 3 & 4*/
 656         u32     _reserv_2_1:9;
 657         u8      fid:7;
 658         u8      mac[ETH_ALEN];
 659 };
 660
 661 static int ksz_port_fdb_add(struct dsa_switch *ds, int port,
 662                             const unsigned char *addr, u16 vid)
 663 {
 664         struct ksz_device *dev = ds->priv;
 665         u32 alu_table[4];
 666         u32 data;
 667         int ret = 0;
 668
 669         mutex_lock(&dev->alu_mutex);
 670
 671         /* find any entry with mac & vid */
 672         data = vid << ALU_FID_INDEX_S;
 673         data |= ((addr[0] << 8) | addr[1]);
 674         ksz_write32(dev, REG_SW_ALU_INDEX_0, data);
 675
 676         data = ((addr[2] << 24) | (addr[3] << 16));
 677         data |= ((addr[4] << 8) | addr[5]);
 678         ksz_write32(dev, REG_SW_ALU_INDEX_1, data);
 679
 680         /* start read operation */
 681         ksz_write32(dev, REG_SW_ALU_CTRL__4, ALU_READ | ALU_START);
 682
 683         /* wait to be finished */
 684         ret = wait_alu_ready(dev, ALU_START, 1000);
 685         if (ret < 0) {
 686                 dev_dbg(dev->dev, "Failed to read ALU\n");
 687                 goto exit;
 688         }
 689
 690         /* read ALU entry */
 691         read_table(ds, alu_table);
 692
 693         /* update ALU entry */
 694         alu_table[0] = ALU_V_STATIC_VALID;
 695         alu_table[1] |= BIT(port);
 696         if (vid)
 697                 alu_table[1] |= ALU_V_USE_FID;
 698         alu_table[2] = (vid << ALU_V_FID_S);
 699         alu_table[2] |= ((addr[0] << 8) | addr[1]);
 700         alu_table[3] = ((addr[2] << 24) | (addr[3] << 16));
 701         alu_table[3] |= ((addr[4] << 8) | addr[5]);
 702
 703         write_table(ds, alu_table);
 704
 705         ksz_write32(dev, REG_SW_ALU_CTRL__4, ALU_WRITE | ALU_START);
 706
 707         /* wait to be finished */
 708         ret = wait_alu_ready(dev, ALU_START, 1000);
 709         if (ret < 0)
 710                 dev_dbg(dev->dev, "Failed to write ALU\n");
 711
 712 exit:
 713         mutex_unlock(&dev->alu_mutex);
 714
 715         return ret;
 716 }
 717
 718 static int ksz_port_fdb_del(struct dsa_switch *ds, int port,
 719                             const unsigned char *addr, u16 vid)
 720 {
 721         struct ksz_device *dev = ds->priv;
 722         u32 alu_table[4];
 723         u32 data;
 724         int ret = 0;
 725
 726         mutex_lock(&dev->alu_mutex);
 727
 728         /* read any entry with mac & vid */
 729         data = vid << ALU_FID_INDEX_S;
 730         data |= ((addr[0] << 8) | addr[1]);
 731         ksz_write32(dev, REG_SW_ALU_INDEX_0, data);
 732
 733         data = ((addr[2] << 24) | (addr[3] << 16));
 734         data |= ((addr[4] << 8) | addr[5]);
 735         ksz_write32(dev, REG_SW_ALU_INDEX_1, data);
 736
 737         /* start read operation */
 738         ksz_write32(dev, REG_SW_ALU_CTRL__4, ALU_READ | ALU_START);
 739
 740         /* wait to be finished */
 741         ret = wait_alu_ready(dev, ALU_START, 1000);
 742         if (ret < 0) {
 743                 dev_dbg(dev->dev, "Failed to read ALU\n");
 744                 goto exit;
 745         }
 746
 747         ksz_read32(dev, REG_SW_ALU_VAL_A, &alu_table[0]);
 748         if (alu_table[0] & ALU_V_STATIC_VALID) {
 749                 ksz_read32(dev, REG_SW_ALU_VAL_B, &alu_table[1]);
 750                 ksz_read32(dev, REG_SW_ALU_VAL_C, &alu_table[2]);
 751                 ksz_read32(dev, REG_SW_ALU_VAL_D, &alu_table[3]);
 752
 753                 /* clear forwarding port */
 754                 alu_table[2] &= ~BIT(port);
 755
 756                 /* if there is no port to forward, clear table */
 757                 if ((alu_table[2] & ALU_V_PORT_MAP) == 0) {
 758                         alu_table[0] = 0;
 759                         alu_table[1] = 0;
 760                         alu_table[2] = 0;
 761                         alu_table[3] = 0;
 762                 }
 763         } else {
 764                 alu_table[0] = 0;
 765                 alu_table[1] = 0;
 766                 alu_table[2] = 0;
 767                 alu_table[3] = 0;
 768         }
 769
 770         write_table(ds, alu_table);
 771
 772         ksz_write32(dev, REG_SW_ALU_CTRL__4, ALU_WRITE | ALU_START);
 773
 774         /* wait to be finished */
 775         ret = wait_alu_ready(dev, ALU_START, 1000);
 776         if (ret < 0)
 777                 dev_dbg(dev->dev, "Failed to write ALU\n");
 778
 779 exit:
 780         mutex_unlock(&dev->alu_mutex);
 781
 782         return ret;
 783 }
 784
 785 static void convert_alu(struct alu_struct *alu, u32 *alu_table)
 786 {
 787         alu->is_static = !!(alu_table[0] & ALU_V_STATIC_VALID);
 788         alu->is_src_filter = !!(alu_table[0] & ALU_V_SRC_FILTER);
 789         alu->is_dst_filter = !!(alu_table[0] & ALU_V_DST_FILTER);
 790         alu->prio_age = (alu_table[0] >> ALU_V_PRIO_AGE_CNT_S) &
 791                         ALU_V_PRIO_AGE_CNT_M;
 792         alu->mstp = alu_table[0] & ALU_V_MSTP_M;
 793
 794         alu->is_override = !!(alu_table[1] & ALU_V_OVERRIDE);
 795         alu->is_use_fid = !!(alu_table[1] & ALU_V_USE_FID);
 796         alu->port_forward = alu_table[1] & ALU_V_PORT_MAP;
 797
 798         alu->fid = (alu_table[2] >> ALU_V_FID_S) & ALU_V_FID_M;
 799
 800         alu->mac[0] = (alu_table[2] >> 8) & 0xFF;
 801         alu->mac[1] = alu_table[2] & 0xFF;
 802         alu->mac[2] = (alu_table[3] >> 24) & 0xFF;
 803         alu->mac[3] = (alu_table[3] >> 16) & 0xFF;
 804         alu->mac[4] = (alu_table[3] >> 8) & 0xFF;
 805         alu->mac[5] = alu_table[3] & 0xFF;
 806 }
 807
 808 static int ksz_port_fdb_dump(struct dsa_switch *ds, int port,
 809                              dsa_fdb_dump_cb_t *cb, void *data)
 810 {
 811         struct ksz_device *dev = ds->priv;
 812         int ret = 0;
 813         u32 ksz_data;
 814         u32 alu_table[4];
 815         struct alu_struct alu;
 816         int timeout;
 817
 818         mutex_lock(&dev->alu_mutex);
 819
 820         /* start ALU search */
 821         ksz_write32(dev, REG_SW_ALU_CTRL__4, ALU_START | ALU_SEARCH);
 822
 823         do {
 824                 timeout = 1000;
 825                 do {
 826                         ksz_read32(dev, REG_SW_ALU_CTRL__4, &ksz_data);
 827                         if ((ksz_data & ALU_VALID) || !(ksz_data & ALU_START))
 828                                 break;
 829                         usleep_range(1, 10);
 830                 } while (timeout-- > 0);
 831
 832                 if (!timeout) {
 833                         dev_dbg(dev->dev, "Failed to search ALU\n");
 834                         ret = -ETIMEDOUT;
 835                         goto exit;
 836                 }
 837
 838                 /* read ALU table */
 839                 read_table(ds, alu_table);
 840
 841                 convert_alu(&alu, alu_table);
 842
 843                 if (alu.port_forward & BIT(port)) {
 844                         ret = cb(alu.mac, alu.fid, alu.is_static, data);
 845                         if (ret)
 846                                 goto exit;
 847                 }
 848         } while (ksz_data & ALU_START);
 849
 850 exit:
 851
 852         /* stop ALU search */
 853         ksz_write32(dev, REG_SW_ALU_CTRL__4, 0);
 854
 855         mutex_unlock(&dev->alu_mutex);
 856
 857         return ret;
 858 }
 859
 860 static int ksz_port_mdb_prepare(struct dsa_switch *ds, int port,
 861                                 const struct switchdev_obj_port_mdb *mdb,
 862                                 struct switchdev_trans *trans)
 863 {
 864         /* nothing to do */
 865         return 0;
 866 }
 867
 868 static void ksz_port_mdb_add(struct dsa_switch *ds, int port,
 869                              const struct switchdev_obj_port_mdb *mdb,
 870                              struct switchdev_trans *trans)
 871 {
 872         struct ksz_device *dev = ds->priv;
 873         u32 static_table[4];
 874         u32 data;
 875         int index;
 876         u32 mac_hi, mac_lo;
 877
 878         mac_hi = ((mdb->addr[0] << 8) | mdb->addr[1]);
 879         mac_lo = ((mdb->addr[2] << 24) | (mdb->addr[3] << 16));
 880         mac_lo |= ((mdb->addr[4] << 8) | mdb->addr[5]);
 881
 882         mutex_lock(&dev->alu_mutex);
 883
 884         for (index = 0; index < dev->num_statics; index++) {
 885                 /* find empty slot first */
 886                 data = (index << ALU_STAT_INDEX_S) |
 887                         ALU_STAT_READ | ALU_STAT_START;
 888                 ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);
 889
 890                 /* wait to be finished */
 891                 if (wait_alu_sta_ready(dev, ALU_STAT_START, 1000) < 0) {
 892                         dev_dbg(dev->dev, "Failed to read ALU STATIC\n");
 893                         goto exit;
 894                 }
 895
 896                 /* read ALU static table */
 897                 read_table(ds, static_table);
 898
 899                 if (static_table[0] & ALU_V_STATIC_VALID) {
 900                         /* check this has same vid & mac address */
 901                         if (((static_table[2] >> ALU_V_FID_S) == (mdb->vid)) &&
 902                             ((static_table[2] & ALU_V_MAC_ADDR_HI) == mac_hi) &&
 903                             (static_table[3] == mac_lo)) {
 904                                 /* found matching one */
 905                                 break;
 906                         }
 907                 } else {
 908                         /* found empty one */
 909                         break;
 910                 }
 911         }
 912
 913         /* no available entry */
 914         if (index == dev->num_statics)
 915                 goto exit;
 916
 917         /* add entry */
 918         static_table[0] = ALU_V_STATIC_VALID;
 919         static_table[1] |= BIT(port);
 920         if (mdb->vid)
 921                 static_table[1] |= ALU_V_USE_FID;
 922         static_table[2] = (mdb->vid << ALU_V_FID_S);
 923         static_table[2] |= mac_hi;
 924         static_table[3] = mac_lo;
 925
 926         write_table(ds, static_table);
 927
 928         data = (index << ALU_STAT_INDEX_S) | ALU_STAT_START;
 929         ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);
 930
 931         /* wait to be finished */
 932         if (wait_alu_sta_ready(dev, ALU_STAT_START, 1000) < 0)
 933                 dev_dbg(dev->dev, "Failed to read ALU STATIC\n");
 934
 935 exit:
 936         mutex_unlock(&dev->alu_mutex);
 937 }
 938
 939 static int ksz_port_mdb_del(struct dsa_switch *ds, int port,
 940                             const struct switchdev_obj_port_mdb *mdb)
 941 {
 942         struct ksz_device *dev = ds->priv;
 943         u32 static_table[4];
 944         u32 data;
 945         int index;
 946         int ret = 0;
 947         u32 mac_hi, mac_lo;
 948
 949         mac_hi = ((mdb->addr[0] << 8) | mdb->addr[1]);
 950         mac_lo = ((mdb->addr[2] << 24) | (mdb->addr[3] << 16));
 951         mac_lo |= ((mdb->addr[4] << 8) | mdb->addr[5]);
 952
 953         mutex_lock(&dev->alu_mutex);
 954
 955         for (index = 0; index < dev->num_statics; index++) {
 956                 /* find empty slot first */
 957                 data = (index << ALU_STAT_INDEX_S) |
 958                         ALU_STAT_READ | ALU_STAT_START;
 959                 ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);
 960
 961                 /* wait to be finished */
 962                 ret = wait_alu_sta_ready(dev, ALU_STAT_START, 1000);
 963                 if (ret < 0) {
 964                         dev_dbg(dev->dev, "Failed to read ALU STATIC\n");
 965                         goto exit;
 966                 }
 967
 968                 /* read ALU static table */
 969                 read_table(ds, static_table);
 970
 971                 if (static_table[0] & ALU_V_STATIC_VALID) {
 972                         /* check this has same vid & mac address */
 973
 974                         if (((static_table[2] >> ALU_V_FID_S) == (mdb->vid)) &&
 975                             ((static_table[2] & ALU_V_MAC_ADDR_HI) == mac_hi) &&
 976                             (static_table[3] == mac_lo)) {
 977                                 /* found matching one */
 978                                 break;
 979                         }
 980                 }
 981         }
 982
 983         /* no available entry */
 984         if (index == dev->num_statics) {
 985                 ret = -EINVAL;
 986                 goto exit;
 987         }
 988
 989         /* clear port */
 990         static_table[1] &= ~BIT(port);
 991
 992         if ((static_table[1] & ALU_V_PORT_MAP) == 0) {
 993                 /* delete entry */
 994                 static_table[0] = 0;
 995                 static_table[1] = 0;
 996                 static_table[2] = 0;
 997                 static_table[3] = 0;
 998         }
 999
1000         write_table(ds, static_table);
1001
1002         data = (index << ALU_STAT_INDEX_S) | ALU_STAT_START;
1003         ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);
1004
1005         /* wait to be finished */
1006         ret = wait_alu_sta_ready(dev, ALU_STAT_START, 1000);
1007         if (ret < 0)
1008                 dev_dbg(dev->dev, "Failed to read ALU STATIC\n");
1009
1010 exit:
1011         mutex_unlock(&dev->alu_mutex);
1012
1013         return ret;
1014 }
1015
1016 static int ksz_port_mirror_add(struct dsa_switch *ds, int port,
1017                                struct dsa_mall_mirror_tc_entry *mirror,
1018                                bool ingress)
1019 {
1020         struct ksz_device *dev = ds->priv;
1021
1022         if (ingress)
1023                 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, true);
1024         else
1025                 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, true);
1026
1027         ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_SNIFFER, false);
1028
1029         /* configure mirror port */
1030         ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
1031                      PORT_MIRROR_SNIFFER, true);
1032
1033         ksz_cfg(dev, S_MIRROR_CTRL, SW_MIRROR_RX_TX, false);
1034
1035         return 0;
1036 }
1037
1038 static void ksz_port_mirror_del(struct dsa_switch *ds, int port,
1039                                 struct dsa_mall_mirror_tc_entry *mirror)
1040 {
1041         struct ksz_device *dev = ds->priv;
1042         u8 data;
1043
1044         if (mirror->ingress)
1045                 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, false);
1046         else
1047                 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, false);
1048
1049         ksz_pread8(dev, port, P_MIRROR_CTRL, &data);
1050
1051         if (!(data & (PORT_MIRROR_RX | PORT_MIRROR_TX)))
1052                 ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
1053                              PORT_MIRROR_SNIFFER, false);
1054 }
1055
1056 static const struct dsa_switch_ops ksz_switch_ops = {
1057         .get_tag_protocol       = ksz_get_tag_protocol,
1058         .setup                  = ksz_setup,
1059         .phy_read               = ksz_phy_read16,
1060         .phy_write              = ksz_phy_write16,
1061         .port_enable            = ksz_enable_port,
1062         .port_disable           = ksz_disable_port,
1063         .get_strings            = ksz_get_strings,
1064         .get_ethtool_stats      = ksz_get_ethtool_stats,
1065         .get_sset_count         = ksz_sset_count,
1066         .port_stp_state_set     = ksz_port_stp_state_set,
1067         .port_fast_age          = ksz_port_fast_age,
1068         .port_vlan_filtering    = ksz_port_vlan_filtering,
1069         .port_vlan_prepare      = ksz_port_vlan_prepare,
1070         .port_vlan_add          = ksz_port_vlan_add,
1071         .port_vlan_del          = ksz_port_vlan_del,
1072         .port_fdb_dump          = ksz_port_fdb_dump,
1073         .port_fdb_add           = ksz_port_fdb_add,
1074         .port_fdb_del           = ksz_port_fdb_del,
1075         .port_mdb_prepare       = ksz_port_mdb_prepare,
1076         .port_mdb_add           = ksz_port_mdb_add,
1077         .port_mdb_del           = ksz_port_mdb_del,
1078         .port_mirror_add        = ksz_port_mirror_add,
1079         .port_mirror_del        = ksz_port_mirror_del,
1080 };
1081
1082 struct ksz_chip_data {
1083         u32 chip_id;
1084         const char *dev_name;
1085         int num_vlans;
1086         int num_alus;
1087         int num_statics;
1088         int cpu_ports;
1089         int port_cnt;
1090 };
1091
1092 static const struct ksz_chip_data ksz_switch_chips[] = {
1093         {
1094                 .chip_id = 0x00947700,
1095                 .dev_name = "KSZ9477",
1096                 .num_vlans = 4096,
1097                 .num_alus = 4096,
1098                 .num_statics = 16,
1099                 .cpu_ports = 0x7F,      /* can be configured as cpu port */
1100                 .port_cnt = 7,          /* total physical port count */
1101         },
1102 };
1103
1104 static int ksz_switch_init(struct ksz_device *dev)
1105 {
1106         int i;
1107
1108         mutex_init(&dev->reg_mutex);
1109         mutex_init(&dev->stats_mutex);
1110         mutex_init(&dev->alu_mutex);
1111         mutex_init(&dev->vlan_mutex);
1112
1113         dev->ds->ops = &ksz_switch_ops;
1114
1115         for (i = 0; i < ARRAY_SIZE(ksz_switch_chips); i++) {
1116                 const struct ksz_chip_data *chip = &ksz_switch_chips[i];
1117
1118                 if (dev->chip_id == chip->chip_id) {
1119                         dev->name = chip->dev_name;
1120                         dev->num_vlans = chip->num_vlans;
1121                         dev->num_alus = chip->num_alus;
1122                         dev->num_statics = chip->num_statics;
1123                         dev->port_cnt = chip->port_cnt;
1124                         dev->cpu_ports = chip->cpu_ports;
1125
1126                         break;
1127                 }
1128         }
1129
1130         /* no switch found */
1131         if (!dev->port_cnt)
1132                 return -ENODEV;
1133
1134         return 0;
1135 }
1136
1137 struct ksz_device *ksz_switch_alloc(struct device *base,
1138                                     const struct ksz_io_ops *ops,
1139                                     void *priv)
1140 {
1141         struct dsa_switch *ds;
1142         struct ksz_device *swdev;
1143
1144         ds = dsa_switch_alloc(base, DSA_MAX_PORTS);
1145         if (!ds)
1146                 return NULL;
1147
1148         swdev = devm_kzalloc(base, sizeof(*swdev), GFP_KERNEL);
1149         if (!swdev)
1150                 return NULL;
1151
1152         ds->priv = swdev;
1153         swdev->dev = base;
1154
1155         swdev->ds = ds;
1156         swdev->priv = priv;
1157         swdev->ops = ops;
1158
1159         return swdev;
1160 }
1161 EXPORT_SYMBOL(ksz_switch_alloc);
1162
1163 int ksz_switch_detect(struct ksz_device *dev)
1164 {
1165         u8 data8;
1166         u32 id32;
1167         int ret;
1168
1169         /* turn off SPI DO Edge select */
1170         ret = ksz_read8(dev, REG_SW_GLOBAL_SERIAL_CTRL_0, &data8);
1171         if (ret)
1172                 return ret;
1173
1174         data8 &= ~SPI_AUTO_EDGE_DETECTION;
1175         ret = ksz_write8(dev, REG_SW_GLOBAL_SERIAL_CTRL_0, data8);
1176         if (ret)
1177                 return ret;
1178
1179         /* read chip id */
1180         ret = ksz_read32(dev, REG_CHIP_ID0__1, &id32);
1181         if (ret)
1182                 return ret;
1183
1184         dev->chip_id = id32;
1185
1186         return 0;
1187 }
1188 EXPORT_SYMBOL(ksz_switch_detect);
1189
1190 int ksz_switch_register(struct ksz_device *dev)
1191 {
1192         int ret;
1193
1194         if (dev->pdata)
1195                 dev->chip_id = dev->pdata->chip_id;
1196
1197         if (ksz_switch_detect(dev))
1198                 return -EINVAL;
1199
1200         ret = ksz_switch_init(dev);
1201         if (ret)
1202                 return ret;
1203
1204         return dsa_register_switch(dev->ds);
1205 }
1206 EXPORT_SYMBOL(ksz_switch_register);
1207
1208 void ksz_switch_remove(struct ksz_device *dev)
1209 {
1210         dsa_unregister_switch(dev->ds);
1211 }
1212 EXPORT_SYMBOL(ksz_switch_remove);
1213
1214 MODULE_AUTHOR("Woojung Huh <Woojung.Huh@microchip.com>");
1215 MODULE_DESCRIPTION("Microchip KSZ Series Switch DSA Driver");
1216 MODULE_LICENSE("GPL");