drivers/net/dsa/microchip/ksz8795.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Microchip KSZ8795 switch driver
   4  *
   5  * Copyright (C) 2017 Microchip Technology Inc.
   6  *      Tristram Ha <Tristram.Ha@microchip.com>
   7  */
   8
   9 #include <linux/bitfield.h>
  10 #include <linux/delay.h>
  11 #include <linux/export.h>
  12 #include <linux/gpio.h>
  13 #include <linux/if_vlan.h>
  14 #include <linux/kernel.h>
  15 #include <linux/module.h>
  16 #include <linux/platform_data/microchip-ksz.h>
  17 #include <linux/phy.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/if_bridge.h>
  20 #include <linux/micrel_phy.h>
  21 #include <net/dsa.h>
  22 #include <net/switchdev.h>
  23 #include <linux/phylink.h>
  24
  25 #include "ksz_common.h"
  26 #include "ksz8795_reg.h"
  27 #include "ksz8.h"
  28
  29 static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)
  30 {
  31         regmap_update_bits(ksz_regmap_8(dev), addr, bits, set ? bits : 0);
  32 }
  33
  34 static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,
  35                          bool set)
  36 {
  37         regmap_update_bits(ksz_regmap_8(dev), PORT_CTRL_ADDR(port, offset),
  38                            bits, set ? bits : 0);
  39 }
  40
  41 static int ksz8_ind_write8(struct ksz_device *dev, u8 table, u16 addr, u8 data)
  42 {
  43         const u16 *regs;
  44         u16 ctrl_addr;
  45         int ret = 0;
  46
  47         regs = dev->info->regs;
  48
  49         mutex_lock(&dev->alu_mutex);
  50
  51         ctrl_addr = IND_ACC_TABLE(table) | addr;
  52         ret = ksz_write8(dev, regs[REG_IND_BYTE], data);
  53         if (!ret)
  54                 ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
  55
  56         mutex_unlock(&dev->alu_mutex);
  57
  58         return ret;
  59 }
  60
  61 int ksz8_reset_switch(struct ksz_device *dev)
  62 {
  63         if (ksz_is_ksz88x3(dev)) {
  64                 /* reset switch */
  65                 ksz_cfg(dev, KSZ8863_REG_SW_RESET,
  66                         KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, true);
  67                 ksz_cfg(dev, KSZ8863_REG_SW_RESET,
  68                         KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, false);
  69         } else {
  70                 /* reset switch */
  71                 ksz_write8(dev, REG_POWER_MANAGEMENT_1,
  72                            SW_SOFTWARE_POWER_DOWN << SW_POWER_MANAGEMENT_MODE_S);
  73                 ksz_write8(dev, REG_POWER_MANAGEMENT_1, 0);
  74         }
  75
  76         return 0;
  77 }
  78
  79 static int ksz8863_change_mtu(struct ksz_device *dev, int frame_size)
  80 {
  81         u8 ctrl2 = 0;
  82
  83         if (frame_size <= KSZ8_LEGAL_PACKET_SIZE)
  84                 ctrl2 |= KSZ8863_LEGAL_PACKET_ENABLE;
  85         else if (frame_size > KSZ8863_NORMAL_PACKET_SIZE)
  86                 ctrl2 |= KSZ8863_HUGE_PACKET_ENABLE;
  87
  88         return ksz_rmw8(dev, REG_SW_CTRL_2, KSZ8863_LEGAL_PACKET_ENABLE |
  89                         KSZ8863_HUGE_PACKET_ENABLE, ctrl2);
  90 }
  91
  92 static int ksz8795_change_mtu(struct ksz_device *dev, int frame_size)
  93 {
  94         u8 ctrl1 = 0, ctrl2 = 0;
  95         int ret;
  96
  97         if (frame_size > KSZ8_LEGAL_PACKET_SIZE)
  98                 ctrl2 |= SW_LEGAL_PACKET_DISABLE;
  99         if (frame_size > KSZ8863_NORMAL_PACKET_SIZE)
 100                 ctrl1 |= SW_HUGE_PACKET;
 101
 102         ret = ksz_rmw8(dev, REG_SW_CTRL_1, SW_HUGE_PACKET, ctrl1);
 103         if (ret)
 104                 return ret;
 105
 106         return ksz_rmw8(dev, REG_SW_CTRL_2, SW_LEGAL_PACKET_DISABLE, ctrl2);
 107 }
 108
 109 int ksz8_change_mtu(struct ksz_device *dev, int port, int mtu)
 110 {
 111         u16 frame_size;
 112
 113         if (!dsa_is_cpu_port(dev->ds, port))
 114                 return 0;
 115
 116         frame_size = mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
 117
 118         switch (dev->chip_id) {
 119         case KSZ8795_CHIP_ID:
 120         case KSZ8794_CHIP_ID:
 121         case KSZ8765_CHIP_ID:
 122                 return ksz8795_change_mtu(dev, frame_size);
 123         case KSZ8830_CHIP_ID:
 124                 return ksz8863_change_mtu(dev, frame_size);
 125         }
 126
 127         return -EOPNOTSUPP;
 128 }
 129
 130 static void ksz8795_set_prio_queue(struct ksz_device *dev, int port, int queue)
 131 {
 132         u8 hi, lo;
 133
 134         /* Number of queues can only be 1, 2, or 4. */
 135         switch (queue) {
 136         case 4:
 137         case 3:
 138                 queue = PORT_QUEUE_SPLIT_4;
 139                 break;
 140         case 2:
 141                 queue = PORT_QUEUE_SPLIT_2;
 142                 break;
 143         default:
 144                 queue = PORT_QUEUE_SPLIT_1;
 145         }
 146         ksz_pread8(dev, port, REG_PORT_CTRL_0, &lo);
 147         ksz_pread8(dev, port, P_DROP_TAG_CTRL, &hi);
 148         lo &= ~PORT_QUEUE_SPLIT_L;
 149         if (queue & PORT_QUEUE_SPLIT_2)
 150                 lo |= PORT_QUEUE_SPLIT_L;
 151         hi &= ~PORT_QUEUE_SPLIT_H;
 152         if (queue & PORT_QUEUE_SPLIT_4)
 153                 hi |= PORT_QUEUE_SPLIT_H;
 154         ksz_pwrite8(dev, port, REG_PORT_CTRL_0, lo);
 155         ksz_pwrite8(dev, port, P_DROP_TAG_CTRL, hi);
 156
 157         /* Default is port based for egress rate limit. */
 158         if (queue != PORT_QUEUE_SPLIT_1)
 159                 ksz_cfg(dev, REG_SW_CTRL_19, SW_OUT_RATE_LIMIT_QUEUE_BASED,
 160                         true);
 161 }
 162
 163 void ksz8_r_mib_cnt(struct ksz_device *dev, int port, u16 addr, u64 *cnt)
 164 {
 165         const u32 *masks;
 166         const u16 *regs;
 167         u16 ctrl_addr;
 168         u32 data;
 169         u8 check;
 170         int loop;
 171
 172         masks = dev->info->masks;
 173         regs = dev->info->regs;
 174
 175         ctrl_addr = addr + dev->info->reg_mib_cnt * port;
 176         ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
 177
 178         mutex_lock(&dev->alu_mutex);
 179         ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 180
 181         /* It is almost guaranteed to always read the valid bit because of
 182          * slow SPI speed.
 183          */
 184         for (loop = 2; loop > 0; loop--) {
 185                 ksz_read8(dev, regs[REG_IND_MIB_CHECK], &check);
 186
 187                 if (check & masks[MIB_COUNTER_VALID]) {
 188                         ksz_read32(dev, regs[REG_IND_DATA_LO], &data);
 189                         if (check & masks[MIB_COUNTER_OVERFLOW])
 190                                 *cnt += MIB_COUNTER_VALUE + 1;
 191                         *cnt += data & MIB_COUNTER_VALUE;
 192                         break;
 193                 }
 194         }
 195         mutex_unlock(&dev->alu_mutex);
 196 }
 197
 198 static void ksz8795_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
 199                               u64 *dropped, u64 *cnt)
 200 {
 201         const u32 *masks;
 202         const u16 *regs;
 203         u16 ctrl_addr;
 204         u32 data;
 205         u8 check;
 206         int loop;
 207
 208         masks = dev->info->masks;
 209         regs = dev->info->regs;
 210
 211         addr -= dev->info->reg_mib_cnt;
 212         ctrl_addr = (KSZ8795_MIB_TOTAL_RX_1 - KSZ8795_MIB_TOTAL_RX_0) * port;
 213         ctrl_addr += addr + KSZ8795_MIB_TOTAL_RX_0;
 214         ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
 215
 216         mutex_lock(&dev->alu_mutex);
 217         ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 218
 219         /* It is almost guaranteed to always read the valid bit because of
 220          * slow SPI speed.
 221          */
 222         for (loop = 2; loop > 0; loop--) {
 223                 ksz_read8(dev, regs[REG_IND_MIB_CHECK], &check);
 224
 225                 if (check & masks[MIB_COUNTER_VALID]) {
 226                         ksz_read32(dev, regs[REG_IND_DATA_LO], &data);
 227                         if (addr < 2) {
 228                                 u64 total;
 229
 230                                 total = check & MIB_TOTAL_BYTES_H;
 231                                 total <<= 32;
 232                                 *cnt += total;
 233                                 *cnt += data;
 234                                 if (check & masks[MIB_COUNTER_OVERFLOW]) {
 235                                         total = MIB_TOTAL_BYTES_H + 1;
 236                                         total <<= 32;
 237                                         *cnt += total;
 238                                 }
 239                         } else {
 240                                 if (check & masks[MIB_COUNTER_OVERFLOW])
 241                                         *cnt += MIB_PACKET_DROPPED + 1;
 242                                 *cnt += data & MIB_PACKET_DROPPED;
 243                         }
 244                         break;
 245                 }
 246         }
 247         mutex_unlock(&dev->alu_mutex);
 248 }
 249
 250 static void ksz8863_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
 251                               u64 *dropped, u64 *cnt)
 252 {
 253         u32 *last = (u32 *)dropped;
 254         const u16 *regs;
 255         u16 ctrl_addr;
 256         u32 data;
 257         u32 cur;
 258
 259         regs = dev->info->regs;
 260
 261         addr -= dev->info->reg_mib_cnt;
 262         ctrl_addr = addr ? KSZ8863_MIB_PACKET_DROPPED_TX_0 :
 263                            KSZ8863_MIB_PACKET_DROPPED_RX_0;
 264         ctrl_addr += port;
 265         ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
 266
 267         mutex_lock(&dev->alu_mutex);
 268         ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 269         ksz_read32(dev, regs[REG_IND_DATA_LO], &data);
 270         mutex_unlock(&dev->alu_mutex);
 271
 272         data &= MIB_PACKET_DROPPED;
 273         cur = last[addr];
 274         if (data != cur) {
 275                 last[addr] = data;
 276                 if (data < cur)
 277                         data += MIB_PACKET_DROPPED + 1;
 278                 data -= cur;
 279                 *cnt += data;
 280         }
 281 }
 282
 283 void ksz8_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
 284                     u64 *dropped, u64 *cnt)
 285 {
 286         if (ksz_is_ksz88x3(dev))
 287                 ksz8863_r_mib_pkt(dev, port, addr, dropped, cnt);
 288         else
 289                 ksz8795_r_mib_pkt(dev, port, addr, dropped, cnt);
 290 }
 291
 292 void ksz8_freeze_mib(struct ksz_device *dev, int port, bool freeze)
 293 {
 294         if (ksz_is_ksz88x3(dev))
 295                 return;
 296
 297         /* enable the port for flush/freeze function */
 298         if (freeze)
 299                 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true);
 300         ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FREEZE, freeze);
 301
 302         /* disable the port after freeze is done */
 303         if (!freeze)
 304                 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false);
 305 }
 306
 307 void ksz8_port_init_cnt(struct ksz_device *dev, int port)
 308 {
 309         struct ksz_port_mib *mib = &dev->ports[port].mib;
 310         u64 *dropped;
 311
 312         if (!ksz_is_ksz88x3(dev)) {
 313                 /* flush all enabled port MIB counters */
 314                 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true);
 315                 ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FLUSH, true);
 316                 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false);
 317         }
 318
 319         mib->cnt_ptr = 0;
 320
 321         /* Some ports may not have MIB counters before SWITCH_COUNTER_NUM. */
 322         while (mib->cnt_ptr < dev->info->reg_mib_cnt) {
 323                 dev->dev_ops->r_mib_cnt(dev, port, mib->cnt_ptr,
 324                                         &mib->counters[mib->cnt_ptr]);
 325                 ++mib->cnt_ptr;
 326         }
 327
 328         /* last one in storage */
 329         dropped = &mib->counters[dev->info->mib_cnt];
 330
 331         /* Some ports may not have MIB counters after SWITCH_COUNTER_NUM. */
 332         while (mib->cnt_ptr < dev->info->mib_cnt) {
 333                 dev->dev_ops->r_mib_pkt(dev, port, mib->cnt_ptr,
 334                                         dropped, &mib->counters[mib->cnt_ptr]);
 335                 ++mib->cnt_ptr;
 336         }
 337 }
 338
 339 static int ksz8_r_table(struct ksz_device *dev, int table, u16 addr, u64 *data)
 340 {
 341         const u16 *regs;
 342         u16 ctrl_addr;
 343         int ret;
 344
 345         regs = dev->info->regs;
 346
 347         ctrl_addr = IND_ACC_TABLE(table | TABLE_READ) | addr;
 348
 349         mutex_lock(&dev->alu_mutex);
 350         ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 351         if (ret)
 352                 goto unlock_alu;
 353
 354         ret = ksz_read64(dev, regs[REG_IND_DATA_HI], data);
 355 unlock_alu:
 356         mutex_unlock(&dev->alu_mutex);
 357
 358         return ret;
 359 }
 360
 361 static int ksz8_w_table(struct ksz_device *dev, int table, u16 addr, u64 data)
 362 {
 363         const u16 *regs;
 364         u16 ctrl_addr;
 365         int ret;
 366
 367         regs = dev->info->regs;
 368
 369         ctrl_addr = IND_ACC_TABLE(table) | addr;
 370
 371         mutex_lock(&dev->alu_mutex);
 372         ret = ksz_write64(dev, regs[REG_IND_DATA_HI], data);
 373         if (ret)
 374                 goto unlock_alu;
 375
 376         ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 377 unlock_alu:
 378         mutex_unlock(&dev->alu_mutex);
 379
 380         return ret;
 381 }
 382
 383 static int ksz8_valid_dyn_entry(struct ksz_device *dev, u8 *data)
 384 {
 385         int timeout = 100;
 386         const u32 *masks;
 387         const u16 *regs;
 388
 389         masks = dev->info->masks;
 390         regs = dev->info->regs;
 391
 392         do {
 393                 ksz_read8(dev, regs[REG_IND_DATA_CHECK], data);
 394                 timeout--;
 395         } while ((*data & masks[DYNAMIC_MAC_TABLE_NOT_READY]) && timeout);
 396
 397         /* Entry is not ready for accessing. */
 398         if (*data & masks[DYNAMIC_MAC_TABLE_NOT_READY]) {
 399                 return -EAGAIN;
 400         /* Entry is ready for accessing. */
 401         } else {
 402                 ksz_read8(dev, regs[REG_IND_DATA_8], data);
 403
 404                 /* There is no valid entry in the table. */
 405                 if (*data & masks[DYNAMIC_MAC_TABLE_MAC_EMPTY])
 406                         return -ENXIO;
 407         }
 408         return 0;
 409 }
 410
 411 int ksz8_r_dyn_mac_table(struct ksz_device *dev, u16 addr, u8 *mac_addr,
 412                          u8 *fid, u8 *src_port, u8 *timestamp, u16 *entries)
 413 {
 414         u32 data_hi, data_lo;
 415         const u8 *shifts;
 416         const u32 *masks;
 417         const u16 *regs;
 418         u16 ctrl_addr;
 419         u8 data;
 420         int rc;
 421
 422         shifts = dev->info->shifts;
 423         masks = dev->info->masks;
 424         regs = dev->info->regs;
 425
 426         ctrl_addr = IND_ACC_TABLE(TABLE_DYNAMIC_MAC | TABLE_READ) | addr;
 427
 428         mutex_lock(&dev->alu_mutex);
 429         ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
 430
 431         rc = ksz8_valid_dyn_entry(dev, &data);
 432         if (rc == -EAGAIN) {
 433                 if (addr == 0)
 434                         *entries = 0;
 435         } else if (rc == -ENXIO) {
 436                 *entries = 0;
 437         /* At least one valid entry in the table. */
 438         } else {
 439                 u64 buf = 0;
 440                 int cnt;
 441
 442                 ksz_read64(dev, regs[REG_IND_DATA_HI], &buf);
 443                 data_hi = (u32)(buf >> 32);
 444                 data_lo = (u32)buf;
 445
 446                 /* Check out how many valid entry in the table. */
 447                 cnt = data & masks[DYNAMIC_MAC_TABLE_ENTRIES_H];
 448                 cnt <<= shifts[DYNAMIC_MAC_ENTRIES_H];
 449                 cnt |= (data_hi & masks[DYNAMIC_MAC_TABLE_ENTRIES]) >>
 450                         shifts[DYNAMIC_MAC_ENTRIES];
 451                 *entries = cnt + 1;
 452
 453                 *fid = (data_hi & masks[DYNAMIC_MAC_TABLE_FID]) >>
 454                         shifts[DYNAMIC_MAC_FID];
 455                 *src_port = (data_hi & masks[DYNAMIC_MAC_TABLE_SRC_PORT]) >>
 456                         shifts[DYNAMIC_MAC_SRC_PORT];
 457                 *timestamp = (data_hi & masks[DYNAMIC_MAC_TABLE_TIMESTAMP]) >>
 458                         shifts[DYNAMIC_MAC_TIMESTAMP];
 459
 460                 mac_addr[5] = (u8)data_lo;
 461                 mac_addr[4] = (u8)(data_lo >> 8);
 462                 mac_addr[3] = (u8)(data_lo >> 16);
 463                 mac_addr[2] = (u8)(data_lo >> 24);
 464
 465                 mac_addr[1] = (u8)data_hi;
 466                 mac_addr[0] = (u8)(data_hi >> 8);
 467                 rc = 0;
 468         }
 469         mutex_unlock(&dev->alu_mutex);
 470
 471         return rc;
 472 }
 473
 474 static int ksz8_r_sta_mac_table(struct ksz_device *dev, u16 addr,
 475                                 struct alu_struct *alu, bool *valid)
 476 {
 477         u32 data_hi, data_lo;
 478         const u8 *shifts;
 479         const u32 *masks;
 480         u64 data;
 481         int ret;
 482
 483         shifts = dev->info->shifts;
 484         masks = dev->info->masks;
 485
 486         ret = ksz8_r_table(dev, TABLE_STATIC_MAC, addr, &data);
 487         if (ret)
 488                 return ret;
 489
 490         data_hi = data >> 32;
 491         data_lo = (u32)data;
 492
 493         if (!(data_hi & (masks[STATIC_MAC_TABLE_VALID] |
 494                          masks[STATIC_MAC_TABLE_OVERRIDE]))) {
 495                 *valid = false;
 496                 return 0;
 497         }
 498
 499         alu->mac[5] = (u8)data_lo;
 500         alu->mac[4] = (u8)(data_lo >> 8);
 501         alu->mac[3] = (u8)(data_lo >> 16);
 502         alu->mac[2] = (u8)(data_lo >> 24);
 503         alu->mac[1] = (u8)data_hi;
 504         alu->mac[0] = (u8)(data_hi >> 8);
 505         alu->port_forward =
 506                 (data_hi & masks[STATIC_MAC_TABLE_FWD_PORTS]) >>
 507                         shifts[STATIC_MAC_FWD_PORTS];
 508         alu->is_override = (data_hi & masks[STATIC_MAC_TABLE_OVERRIDE]) ? 1 : 0;
 509         data_hi >>= 1;
 510         alu->is_static = true;
 511         alu->is_use_fid = (data_hi & masks[STATIC_MAC_TABLE_USE_FID]) ? 1 : 0;
 512         alu->fid = (data_hi & masks[STATIC_MAC_TABLE_FID]) >>
 513                 shifts[STATIC_MAC_FID];
 514
 515         *valid = true;
 516
 517         return 0;
 518 }
 519
 520 static int ksz8_w_sta_mac_table(struct ksz_device *dev, u16 addr,
 521                                 struct alu_struct *alu)
 522 {
 523         u32 data_hi, data_lo;
 524         const u8 *shifts;
 525         const u32 *masks;
 526         u64 data;
 527
 528         shifts = dev->info->shifts;
 529         masks = dev->info->masks;
 530
 531         data_lo = ((u32)alu->mac[2] << 24) |
 532                 ((u32)alu->mac[3] << 16) |
 533                 ((u32)alu->mac[4] << 8) | alu->mac[5];
 534         data_hi = ((u32)alu->mac[0] << 8) | alu->mac[1];
 535         data_hi |= (u32)alu->port_forward << shifts[STATIC_MAC_FWD_PORTS];
 536
 537         if (alu->is_override)
 538                 data_hi |= masks[STATIC_MAC_TABLE_OVERRIDE];
 539         if (alu->is_use_fid) {
 540                 data_hi |= masks[STATIC_MAC_TABLE_USE_FID];
 541                 data_hi |= (u32)alu->fid << shifts[STATIC_MAC_FID];
 542         }
 543         if (alu->is_static)
 544                 data_hi |= masks[STATIC_MAC_TABLE_VALID];
 545         else
 546                 data_hi &= ~masks[STATIC_MAC_TABLE_OVERRIDE];
 547
 548         data = (u64)data_hi << 32 | data_lo;
 549
 550         return ksz8_w_table(dev, TABLE_STATIC_MAC, addr, data);
 551 }
 552
 553 static void ksz8_from_vlan(struct ksz_device *dev, u32 vlan, u8 *fid,
 554                            u8 *member, u8 *valid)
 555 {
 556         const u8 *shifts;
 557         const u32 *masks;
 558
 559         shifts = dev->info->shifts;
 560         masks = dev->info->masks;
 561
 562         *fid = vlan & masks[VLAN_TABLE_FID];
 563         *member = (vlan & masks[VLAN_TABLE_MEMBERSHIP]) >>
 564                         shifts[VLAN_TABLE_MEMBERSHIP_S];
 565         *valid = !!(vlan & masks[VLAN_TABLE_VALID]);
 566 }
 567
 568 static void ksz8_to_vlan(struct ksz_device *dev, u8 fid, u8 member, u8 valid,
 569                          u16 *vlan)
 570 {
 571         const u8 *shifts;
 572         const u32 *masks;
 573
 574         shifts = dev->info->shifts;
 575         masks = dev->info->masks;
 576
 577         *vlan = fid;
 578         *vlan |= (u16)member << shifts[VLAN_TABLE_MEMBERSHIP_S];
 579         if (valid)
 580                 *vlan |= masks[VLAN_TABLE_VALID];
 581 }
 582
 583 static void ksz8_r_vlan_entries(struct ksz_device *dev, u16 addr)
 584 {
 585         const u8 *shifts;
 586         u64 data;
 587         int i;
 588
 589         shifts = dev->info->shifts;
 590
 591         ksz8_r_table(dev, TABLE_VLAN, addr, &data);
 592         addr *= 4;
 593         for (i = 0; i < 4; i++) {
 594                 dev->vlan_cache[addr + i].table[0] = (u16)data;
 595                 data >>= shifts[VLAN_TABLE];
 596         }
 597 }
 598
 599 static void ksz8_r_vlan_table(struct ksz_device *dev, u16 vid, u16 *vlan)
 600 {
 601         int index;
 602         u16 *data;
 603         u16 addr;
 604         u64 buf;
 605
 606         data = (u16 *)&buf;
 607         addr = vid / 4;
 608         index = vid & 3;
 609         ksz8_r_table(dev, TABLE_VLAN, addr, &buf);
 610         *vlan = data[index];
 611 }
 612
 613 static void ksz8_w_vlan_table(struct ksz_device *dev, u16 vid, u16 vlan)
 614 {
 615         int index;
 616         u16 *data;
 617         u16 addr;
 618         u64 buf;
 619
 620         data = (u16 *)&buf;
 621         addr = vid / 4;
 622         index = vid & 3;
 623         ksz8_r_table(dev, TABLE_VLAN, addr, &buf);
 624         data[index] = vlan;
 625         dev->vlan_cache[vid].table[0] = vlan;
 626         ksz8_w_table(dev, TABLE_VLAN, addr, buf);
 627 }
 628
 629 int ksz8_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val)
 630 {
 631         u8 restart, speed, ctrl, link;
 632         int processed = true;
 633         const u16 *regs;
 634         u8 val1, val2;
 635         u16 data = 0;
 636         u8 p = phy;
 637         int ret;
 638
 639         regs = dev->info->regs;
 640
 641         switch (reg) {
 642         case MII_BMCR:
 643                 ret = ksz_pread8(dev, p, regs[P_NEG_RESTART_CTRL], &restart);
 644                 if (ret)
 645                         return ret;
 646
 647                 ret = ksz_pread8(dev, p, regs[P_SPEED_STATUS], &speed);
 648                 if (ret)
 649                         return ret;
 650
 651                 ret = ksz_pread8(dev, p, regs[P_FORCE_CTRL], &ctrl);
 652                 if (ret)
 653                         return ret;
 654
 655                 if (restart & PORT_PHY_LOOPBACK)
 656                         data |= BMCR_LOOPBACK;
 657                 if (ctrl & PORT_FORCE_100_MBIT)
 658                         data |= BMCR_SPEED100;
 659                 if (ksz_is_ksz88x3(dev)) {
 660                         if ((ctrl & PORT_AUTO_NEG_ENABLE))
 661                                 data |= BMCR_ANENABLE;
 662                 } else {
 663                         if (!(ctrl & PORT_AUTO_NEG_DISABLE))
 664                                 data |= BMCR_ANENABLE;
 665                 }
 666                 if (restart & PORT_POWER_DOWN)
 667                         data |= BMCR_PDOWN;
 668                 if (restart & PORT_AUTO_NEG_RESTART)
 669                         data |= BMCR_ANRESTART;
 670                 if (ctrl & PORT_FORCE_FULL_DUPLEX)
 671                         data |= BMCR_FULLDPLX;
 672                 if (speed & PORT_HP_MDIX)
 673                         data |= KSZ886X_BMCR_HP_MDIX;
 674                 if (restart & PORT_FORCE_MDIX)
 675                         data |= KSZ886X_BMCR_FORCE_MDI;
 676                 if (restart & PORT_AUTO_MDIX_DISABLE)
 677                         data |= KSZ886X_BMCR_DISABLE_AUTO_MDIX;
 678                 if (restart & PORT_TX_DISABLE)
 679                         data |= KSZ886X_BMCR_DISABLE_TRANSMIT;
 680                 if (restart & PORT_LED_OFF)
 681                         data |= KSZ886X_BMCR_DISABLE_LED;
 682                 break;
 683         case MII_BMSR:
 684                 ret = ksz_pread8(dev, p, regs[P_LINK_STATUS], &link);
 685                 if (ret)
 686                         return ret;
 687
 688                 data = BMSR_100FULL |
 689                        BMSR_100HALF |
 690                        BMSR_10FULL |
 691                        BMSR_10HALF |
 692                        BMSR_ANEGCAPABLE;
 693                 if (link & PORT_AUTO_NEG_COMPLETE)
 694                         data |= BMSR_ANEGCOMPLETE;
 695                 if (link & PORT_STAT_LINK_GOOD)
 696                         data |= BMSR_LSTATUS;
 697                 break;
 698         case MII_PHYSID1:
 699                 data = KSZ8795_ID_HI;
 700                 break;
 701         case MII_PHYSID2:
 702                 if (ksz_is_ksz88x3(dev))
 703                         data = KSZ8863_ID_LO;
 704                 else
 705                         data = KSZ8795_ID_LO;
 706                 break;
 707         case MII_ADVERTISE:
 708                 ret = ksz_pread8(dev, p, regs[P_LOCAL_CTRL], &ctrl);
 709                 if (ret)
 710                         return ret;
 711
 712                 data = ADVERTISE_CSMA;
 713                 if (ctrl & PORT_AUTO_NEG_SYM_PAUSE)
 714                         data |= ADVERTISE_PAUSE_CAP;
 715                 if (ctrl & PORT_AUTO_NEG_100BTX_FD)
 716                         data |= ADVERTISE_100FULL;
 717                 if (ctrl & PORT_AUTO_NEG_100BTX)
 718                         data |= ADVERTISE_100HALF;
 719                 if (ctrl & PORT_AUTO_NEG_10BT_FD)
 720                         data |= ADVERTISE_10FULL;
 721                 if (ctrl & PORT_AUTO_NEG_10BT)
 722                         data |= ADVERTISE_10HALF;
 723                 break;
 724         case MII_LPA:
 725                 ret = ksz_pread8(dev, p, regs[P_REMOTE_STATUS], &link);
 726                 if (ret)
 727                         return ret;
 728
 729                 data = LPA_SLCT;
 730                 if (link & PORT_REMOTE_SYM_PAUSE)
 731                         data |= LPA_PAUSE_CAP;
 732                 if (link & PORT_REMOTE_100BTX_FD)
 733                         data |= LPA_100FULL;
 734                 if (link & PORT_REMOTE_100BTX)
 735                         data |= LPA_100HALF;
 736                 if (link & PORT_REMOTE_10BT_FD)
 737                         data |= LPA_10FULL;
 738                 if (link & PORT_REMOTE_10BT)
 739                         data |= LPA_10HALF;
 740                 if (data & ~LPA_SLCT)
 741                         data |= LPA_LPACK;
 742                 break;
 743         case PHY_REG_LINK_MD:
 744                 ret = ksz_pread8(dev, p, REG_PORT_LINK_MD_CTRL, &val1);
 745                 if (ret)
 746                         return ret;
 747
 748                 ret = ksz_pread8(dev, p, REG_PORT_LINK_MD_RESULT, &val2);
 749                 if (ret)
 750                         return ret;
 751
 752                 if (val1 & PORT_START_CABLE_DIAG)
 753                         data |= PHY_START_CABLE_DIAG;
 754
 755                 if (val1 & PORT_CABLE_10M_SHORT)
 756                         data |= PHY_CABLE_10M_SHORT;
 757
 758                 data |= FIELD_PREP(PHY_CABLE_DIAG_RESULT_M,
 759                                 FIELD_GET(PORT_CABLE_DIAG_RESULT_M, val1));
 760
 761                 data |= FIELD_PREP(PHY_CABLE_FAULT_COUNTER_M,
 762                                 (FIELD_GET(PORT_CABLE_FAULT_COUNTER_H, val1) << 8) |
 763                                 FIELD_GET(PORT_CABLE_FAULT_COUNTER_L, val2));
 764                 break;
 765         case PHY_REG_PHY_CTRL:
 766                 ret = ksz_pread8(dev, p, regs[P_LINK_STATUS], &link);
 767                 if (ret)
 768                         return ret;
 769
 770                 if (link & PORT_MDIX_STATUS)
 771                         data |= KSZ886X_CTRL_MDIX_STAT;
 772                 break;
 773         default:
 774                 processed = false;
 775                 break;
 776         }
 777         if (processed)
 778                 *val = data;
 779
 780         return 0;
 781 }
 782
 783 int ksz8_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val)
 784 {
 785         u8 restart, speed, ctrl, data;
 786         const u16 *regs;
 787         u8 p = phy;
 788         int ret;
 789
 790         regs = dev->info->regs;
 791
 792         switch (reg) {
 793         case MII_BMCR:
 794
 795                 /* Do not support PHY reset function. */
 796                 if (val & BMCR_RESET)
 797                         break;
 798                 ret = ksz_pread8(dev, p, regs[P_SPEED_STATUS], &speed);
 799                 if (ret)
 800                         return ret;
 801
 802                 data = speed;
 803                 if (val & KSZ886X_BMCR_HP_MDIX)
 804                         data |= PORT_HP_MDIX;
 805                 else
 806                         data &= ~PORT_HP_MDIX;
 807
 808                 if (data != speed) {
 809                         ret = ksz_pwrite8(dev, p, regs[P_SPEED_STATUS], data);
 810                         if (ret)
 811                                 return ret;
 812                 }
 813
 814                 ret = ksz_pread8(dev, p, regs[P_FORCE_CTRL], &ctrl);
 815                 if (ret)
 816                         return ret;
 817
 818                 data = ctrl;
 819                 if (ksz_is_ksz88x3(dev)) {
 820                         if ((val & BMCR_ANENABLE))
 821                                 data |= PORT_AUTO_NEG_ENABLE;
 822                         else
 823                                 data &= ~PORT_AUTO_NEG_ENABLE;
 824                 } else {
 825                         if (!(val & BMCR_ANENABLE))
 826                                 data |= PORT_AUTO_NEG_DISABLE;
 827                         else
 828                                 data &= ~PORT_AUTO_NEG_DISABLE;
 829
 830                         /* Fiber port does not support auto-negotiation. */
 831                         if (dev->ports[p].fiber)
 832                                 data |= PORT_AUTO_NEG_DISABLE;
 833                 }
 834
 835                 if (val & BMCR_SPEED100)
 836                         data |= PORT_FORCE_100_MBIT;
 837                 else
 838                         data &= ~PORT_FORCE_100_MBIT;
 839                 if (val & BMCR_FULLDPLX)
 840                         data |= PORT_FORCE_FULL_DUPLEX;
 841                 else
 842                         data &= ~PORT_FORCE_FULL_DUPLEX;
 843
 844                 if (data != ctrl) {
 845                         ret = ksz_pwrite8(dev, p, regs[P_FORCE_CTRL], data);
 846                         if (ret)
 847                                 return ret;
 848                 }
 849
 850                 ret = ksz_pread8(dev, p, regs[P_NEG_RESTART_CTRL], &restart);
 851                 if (ret)
 852                         return ret;
 853
 854                 data = restart;
 855                 if (val & KSZ886X_BMCR_DISABLE_LED)
 856                         data |= PORT_LED_OFF;
 857                 else
 858                         data &= ~PORT_LED_OFF;
 859                 if (val & KSZ886X_BMCR_DISABLE_TRANSMIT)
 860                         data |= PORT_TX_DISABLE;
 861                 else
 862                         data &= ~PORT_TX_DISABLE;
 863                 if (val & BMCR_ANRESTART)
 864                         data |= PORT_AUTO_NEG_RESTART;
 865                 else
 866                         data &= ~(PORT_AUTO_NEG_RESTART);
 867                 if (val & BMCR_PDOWN)
 868                         data |= PORT_POWER_DOWN;
 869                 else
 870                         data &= ~PORT_POWER_DOWN;
 871                 if (val & KSZ886X_BMCR_DISABLE_AUTO_MDIX)
 872                         data |= PORT_AUTO_MDIX_DISABLE;
 873                 else
 874                         data &= ~PORT_AUTO_MDIX_DISABLE;
 875                 if (val & KSZ886X_BMCR_FORCE_MDI)
 876                         data |= PORT_FORCE_MDIX;
 877                 else
 878                         data &= ~PORT_FORCE_MDIX;
 879                 if (val & BMCR_LOOPBACK)
 880                         data |= PORT_PHY_LOOPBACK;
 881                 else
 882                         data &= ~PORT_PHY_LOOPBACK;
 883
 884                 if (data != restart) {
 885                         ret = ksz_pwrite8(dev, p, regs[P_NEG_RESTART_CTRL],
 886                                           data);
 887                         if (ret)
 888                                 return ret;
 889                 }
 890                 break;
 891         case MII_ADVERTISE:
 892                 ret = ksz_pread8(dev, p, regs[P_LOCAL_CTRL], &ctrl);
 893                 if (ret)
 894                         return ret;
 895
 896                 data = ctrl;
 897                 data &= ~(PORT_AUTO_NEG_SYM_PAUSE |
 898                           PORT_AUTO_NEG_100BTX_FD |
 899                           PORT_AUTO_NEG_100BTX |
 900                           PORT_AUTO_NEG_10BT_FD |
 901                           PORT_AUTO_NEG_10BT);
 902                 if (val & ADVERTISE_PAUSE_CAP)
 903                         data |= PORT_AUTO_NEG_SYM_PAUSE;
 904                 if (val & ADVERTISE_100FULL)
 905                         data |= PORT_AUTO_NEG_100BTX_FD;
 906                 if (val & ADVERTISE_100HALF)
 907                         data |= PORT_AUTO_NEG_100BTX;
 908                 if (val & ADVERTISE_10FULL)
 909                         data |= PORT_AUTO_NEG_10BT_FD;
 910                 if (val & ADVERTISE_10HALF)
 911                         data |= PORT_AUTO_NEG_10BT;
 912
 913                 if (data != ctrl) {
 914                         ret = ksz_pwrite8(dev, p, regs[P_LOCAL_CTRL], data);
 915                         if (ret)
 916                                 return ret;
 917                 }
 918                 break;
 919         case PHY_REG_LINK_MD:
 920                 if (val & PHY_START_CABLE_DIAG)
 921                         ksz_port_cfg(dev, p, REG_PORT_LINK_MD_CTRL, PORT_START_CABLE_DIAG, true);
 922                 break;
 923         default:
 924                 break;
 925         }
 926
 927         return 0;
 928 }
 929
 930 void ksz8_cfg_port_member(struct ksz_device *dev, int port, u8 member)
 931 {
 932         u8 data;
 933
 934         ksz_pread8(dev, port, P_MIRROR_CTRL, &data);
 935         data &= ~PORT_VLAN_MEMBERSHIP;
 936         data |= (member & dev->port_mask);
 937         ksz_pwrite8(dev, port, P_MIRROR_CTRL, data);
 938 }
 939
 940 void ksz8_flush_dyn_mac_table(struct ksz_device *dev, int port)
 941 {
 942         u8 learn[DSA_MAX_PORTS];
 943         int first, index, cnt;
 944         const u16 *regs;
 945
 946         regs = dev->info->regs;
 947
 948         if ((uint)port < dev->info->port_cnt) {
 949                 first = port;
 950                 cnt = port + 1;
 951         } else {
 952                 /* Flush all ports. */
 953                 first = 0;
 954                 cnt = dev->info->port_cnt;
 955         }
 956         for (index = first; index < cnt; index++) {
 957                 ksz_pread8(dev, index, regs[P_STP_CTRL], &learn[index]);
 958                 if (!(learn[index] & PORT_LEARN_DISABLE))
 959                         ksz_pwrite8(dev, index, regs[P_STP_CTRL],
 960                                     learn[index] | PORT_LEARN_DISABLE);
 961         }
 962         ksz_cfg(dev, S_FLUSH_TABLE_CTRL, SW_FLUSH_DYN_MAC_TABLE, true);
 963         for (index = first; index < cnt; index++) {
 964                 if (!(learn[index] & PORT_LEARN_DISABLE))
 965                         ksz_pwrite8(dev, index, regs[P_STP_CTRL], learn[index]);
 966         }
 967 }
 968
 969 int ksz8_fdb_dump(struct ksz_device *dev, int port,
 970                   dsa_fdb_dump_cb_t *cb, void *data)
 971 {
 972         int ret = 0;
 973         u16 i = 0;
 974         u16 entries = 0;
 975         u8 timestamp = 0;
 976         u8 fid;
 977         u8 src_port;
 978         u8 mac[ETH_ALEN];
 979
 980         do {
 981                 ret = ksz8_r_dyn_mac_table(dev, i, mac, &fid, &src_port,
 982                                            &timestamp, &entries);
 983                 if (!ret && port == src_port) {
 984                         ret = cb(mac, fid, false, data);
 985                         if (ret)
 986                                 break;
 987                 }
 988                 i++;
 989         } while (i < entries);
 990         if (i >= entries)
 991                 ret = 0;
 992
 993         return ret;
 994 }
 995
 996 static int ksz8_add_sta_mac(struct ksz_device *dev, int port,
 997                             const unsigned char *addr, u16 vid)
 998 {
 999         struct alu_struct alu;
1000         int index, ret;
1001         int empty = 0;
1002
1003         alu.port_forward = 0;
1004         for (index = 0; index < dev->info->num_statics; index++) {
1005                 bool valid;
1006
1007                 ret = ksz8_r_sta_mac_table(dev, index, &alu, &valid);
1008                 if (ret)
1009                         return ret;
1010                 if (!valid) {
1011                         /* Remember the first empty entry. */
1012                         if (!empty)
1013                                 empty = index + 1;
1014                         continue;
1015                 }
1016
1017                 if (!memcmp(alu.mac, addr, ETH_ALEN) && alu.fid == vid)
1018                         break;
1019         }
1020
1021         /* no available entry */
1022         if (index == dev->info->num_statics && !empty)
1023                 return -ENOSPC;
1024
1025         /* add entry */
1026         if (index == dev->info->num_statics) {
1027                 index = empty - 1;
1028                 memset(&alu, 0, sizeof(alu));
1029                 memcpy(alu.mac, addr, ETH_ALEN);
1030                 alu.is_static = true;
1031         }
1032         alu.port_forward |= BIT(port);
1033         if (vid) {
1034                 alu.is_use_fid = true;
1035
1036                 /* Need a way to map VID to FID. */
1037                 alu.fid = vid;
1038         }
1039
1040         return ksz8_w_sta_mac_table(dev, index, &alu);
1041 }
1042
1043 static int ksz8_del_sta_mac(struct ksz_device *dev, int port,
1044                             const unsigned char *addr, u16 vid)
1045 {
1046         struct alu_struct alu;
1047         int index, ret;
1048
1049         for (index = 0; index < dev->info->num_statics; index++) {
1050                 bool valid;
1051
1052                 ret = ksz8_r_sta_mac_table(dev, index, &alu, &valid);
1053                 if (ret)
1054                         return ret;
1055                 if (!valid)
1056                         continue;
1057
1058                 if (!memcmp(alu.mac, addr, ETH_ALEN) && alu.fid == vid)
1059                         break;
1060         }
1061
1062         /* no available entry */
1063         if (index == dev->info->num_statics)
1064                 return 0;
1065
1066         /* clear port */
1067         alu.port_forward &= ~BIT(port);
1068         if (!alu.port_forward)
1069                 alu.is_static = false;
1070
1071         return ksz8_w_sta_mac_table(dev, index, &alu);
1072 }
1073
1074 int ksz8_mdb_add(struct ksz_device *dev, int port,
1075                  const struct switchdev_obj_port_mdb *mdb, struct dsa_db db)
1076 {
1077         return ksz8_add_sta_mac(dev, port, mdb->addr, mdb->vid);
1078 }
1079
1080 int ksz8_mdb_del(struct ksz_device *dev, int port,
1081                  const struct switchdev_obj_port_mdb *mdb, struct dsa_db db)
1082 {
1083         return ksz8_del_sta_mac(dev, port, mdb->addr, mdb->vid);
1084 }
1085
1086 int ksz8_fdb_add(struct ksz_device *dev, int port, const unsigned char *addr,
1087                  u16 vid, struct dsa_db db)
1088 {
1089         return ksz8_add_sta_mac(dev, port, addr, vid);
1090 }
1091
1092 int ksz8_fdb_del(struct ksz_device *dev, int port, const unsigned char *addr,
1093                  u16 vid, struct dsa_db db)
1094 {
1095         return ksz8_del_sta_mac(dev, port, addr, vid);
1096 }
1097
1098 int ksz8_port_vlan_filtering(struct ksz_device *dev, int port, bool flag,
1099                              struct netlink_ext_ack *extack)
1100 {
1101         if (ksz_is_ksz88x3(dev))
1102                 return -ENOTSUPP;
1103
1104         /* Discard packets with VID not enabled on the switch */
1105         ksz_cfg(dev, S_MIRROR_CTRL, SW_VLAN_ENABLE, flag);
1106
1107         /* Discard packets with VID not enabled on the ingress port */
1108         for (port = 0; port < dev->phy_port_cnt; ++port)
1109                 ksz_port_cfg(dev, port, REG_PORT_CTRL_2, PORT_INGRESS_FILTER,
1110                              flag);
1111
1112         return 0;
1113 }
1114
1115 static void ksz8_port_enable_pvid(struct ksz_device *dev, int port, bool state)
1116 {
1117         if (ksz_is_ksz88x3(dev)) {
1118                 ksz_cfg(dev, REG_SW_INSERT_SRC_PVID,
1119                         0x03 << (4 - 2 * port), state);
1120         } else {
1121                 ksz_pwrite8(dev, port, REG_PORT_CTRL_12, state ? 0x0f : 0x00);
1122         }
1123 }
1124
1125 int ksz8_port_vlan_add(struct ksz_device *dev, int port,
1126                        const struct switchdev_obj_port_vlan *vlan,
1127                        struct netlink_ext_ack *extack)
1128 {
1129         bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
1130         struct ksz_port *p = &dev->ports[port];
1131         u16 data, new_pvid = 0;
1132         u8 fid, member, valid;
1133
1134         if (ksz_is_ksz88x3(dev))
1135                 return -ENOTSUPP;
1136
1137         /* If a VLAN is added with untagged flag different from the
1138          * port's Remove Tag flag, we need to change the latter.
1139          * Ignore VID 0, which is always untagged.
1140          * Ignore CPU port, which will always be tagged.
1141          */
1142         if (untagged != p->remove_tag && vlan->vid != 0 &&
1143             port != dev->cpu_port) {
1144                 unsigned int vid;
1145
1146                 /* Reject attempts to add a VLAN that requires the
1147                  * Remove Tag flag to be changed, unless there are no
1148                  * other VLANs currently configured.
1149                  */
1150                 for (vid = 1; vid < dev->info->num_vlans; ++vid) {
1151                         /* Skip the VID we are going to add or reconfigure */
1152                         if (vid == vlan->vid)
1153                                 continue;
1154
1155                         ksz8_from_vlan(dev, dev->vlan_cache[vid].table[0],
1156                                        &fid, &member, &valid);
1157                         if (valid && (member & BIT(port)))
1158                                 return -EINVAL;
1159                 }
1160
1161                 ksz_port_cfg(dev, port, P_TAG_CTRL, PORT_REMOVE_TAG, untagged);
1162                 p->remove_tag = untagged;
1163         }
1164
1165         ksz8_r_vlan_table(dev, vlan->vid, &data);
1166         ksz8_from_vlan(dev, data, &fid, &member, &valid);
1167
1168         /* First time to setup the VLAN entry. */
1169         if (!valid) {
1170                 /* Need to find a way to map VID to FID. */
1171                 fid = 1;
1172                 valid = 1;
1173         }
1174         member |= BIT(port);
1175
1176         ksz8_to_vlan(dev, fid, member, valid, &data);
1177         ksz8_w_vlan_table(dev, vlan->vid, data);
1178
1179         /* change PVID */
1180         if (vlan->flags & BRIDGE_VLAN_INFO_PVID)
1181                 new_pvid = vlan->vid;
1182
1183         if (new_pvid) {
1184                 u16 vid;
1185
1186                 ksz_pread16(dev, port, REG_PORT_CTRL_VID, &vid);
1187                 vid &= ~VLAN_VID_MASK;
1188                 vid |= new_pvid;
1189                 ksz_pwrite16(dev, port, REG_PORT_CTRL_VID, vid);
1190
1191                 ksz8_port_enable_pvid(dev, port, true);
1192         }
1193
1194         return 0;
1195 }
1196
1197 int ksz8_port_vlan_del(struct ksz_device *dev, int port,
1198                        const struct switchdev_obj_port_vlan *vlan)
1199 {
1200         u16 data, pvid;
1201         u8 fid, member, valid;
1202
1203         if (ksz_is_ksz88x3(dev))
1204                 return -ENOTSUPP;
1205
1206         ksz_pread16(dev, port, REG_PORT_CTRL_VID, &pvid);
1207         pvid = pvid & 0xFFF;
1208
1209         ksz8_r_vlan_table(dev, vlan->vid, &data);
1210         ksz8_from_vlan(dev, data, &fid, &member, &valid);
1211
1212         member &= ~BIT(port);
1213
1214         /* Invalidate the entry if no more member. */
1215         if (!member) {
1216                 fid = 0;
1217                 valid = 0;
1218         }
1219
1220         ksz8_to_vlan(dev, fid, member, valid, &data);
1221         ksz8_w_vlan_table(dev, vlan->vid, data);
1222
1223         if (pvid == vlan->vid)
1224                 ksz8_port_enable_pvid(dev, port, false);
1225
1226         return 0;
1227 }
1228
1229 int ksz8_port_mirror_add(struct ksz_device *dev, int port,
1230                          struct dsa_mall_mirror_tc_entry *mirror,
1231                          bool ingress, struct netlink_ext_ack *extack)
1232 {
1233         if (ingress) {
1234                 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, true);
1235                 dev->mirror_rx |= BIT(port);
1236         } else {
1237                 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, true);
1238                 dev->mirror_tx |= BIT(port);
1239         }
1240
1241         ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_SNIFFER, false);
1242
1243         /* configure mirror port */
1244         if (dev->mirror_rx || dev->mirror_tx)
1245                 ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
1246                              PORT_MIRROR_SNIFFER, true);
1247
1248         return 0;
1249 }
1250
1251 void ksz8_port_mirror_del(struct ksz_device *dev, int port,
1252                           struct dsa_mall_mirror_tc_entry *mirror)
1253 {
1254         u8 data;
1255
1256         if (mirror->ingress) {
1257                 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, false);
1258                 dev->mirror_rx &= ~BIT(port);
1259         } else {
1260                 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, false);
1261                 dev->mirror_tx &= ~BIT(port);
1262         }
1263
1264         ksz_pread8(dev, port, P_MIRROR_CTRL, &data);
1265
1266         if (!dev->mirror_rx && !dev->mirror_tx)
1267                 ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
1268                              PORT_MIRROR_SNIFFER, false);
1269 }
1270
1271 static void ksz8795_cpu_interface_select(struct ksz_device *dev, int port)
1272 {
1273         struct ksz_port *p = &dev->ports[port];
1274
1275         if (!p->interface && dev->compat_interface) {
1276                 dev_warn(dev->dev,
1277                          "Using legacy switch \"phy-mode\" property, because it is missing on port %d node. "
1278                          "Please update your device tree.\n",
1279                          port);
1280                 p->interface = dev->compat_interface;
1281         }
1282 }
1283
1284 void ksz8_port_setup(struct ksz_device *dev, int port, bool cpu_port)
1285 {
1286         struct dsa_switch *ds = dev->ds;
1287         const u32 *masks;
1288         u8 member;
1289
1290         masks = dev->info->masks;
1291
1292         /* enable broadcast storm limit */
1293         ksz_port_cfg(dev, port, P_BCAST_STORM_CTRL, PORT_BROADCAST_STORM, true);
1294
1295         if (!ksz_is_ksz88x3(dev))
1296                 ksz8795_set_prio_queue(dev, port, 4);
1297
1298         /* disable DiffServ priority */
1299         ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_DIFFSERV_ENABLE, false);
1300
1301         /* replace priority */
1302         ksz_port_cfg(dev, port, P_802_1P_CTRL,
1303                      masks[PORT_802_1P_REMAPPING], false);
1304
1305         /* enable 802.1p priority */
1306         ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_802_1P_ENABLE, true);
1307
1308         if (cpu_port) {
1309                 if (!ksz_is_ksz88x3(dev))
1310                         ksz8795_cpu_interface_select(dev, port);
1311
1312                 member = dsa_user_ports(ds);
1313         } else {
1314                 member = BIT(dsa_upstream_port(ds, port));
1315         }
1316
1317         ksz8_cfg_port_member(dev, port, member);
1318 }
1319
1320 void ksz8_config_cpu_port(struct dsa_switch *ds)
1321 {
1322         struct ksz_device *dev = ds->priv;
1323         struct ksz_port *p;
1324         const u32 *masks;
1325         const u16 *regs;
1326         u8 remote;
1327         int i;
1328
1329         masks = dev->info->masks;
1330         regs = dev->info->regs;
1331
1332         ksz_cfg(dev, regs[S_TAIL_TAG_CTRL], masks[SW_TAIL_TAG_ENABLE], true);
1333
1334         ksz8_port_setup(dev, dev->cpu_port, true);
1335
1336         for (i = 0; i < dev->phy_port_cnt; i++) {
1337                 ksz_port_stp_state_set(ds, i, BR_STATE_DISABLED);
1338         }
1339         for (i = 0; i < dev->phy_port_cnt; i++) {
1340                 p = &dev->ports[i];
1341
1342                 if (!ksz_is_ksz88x3(dev)) {
1343                         ksz_pread8(dev, i, regs[P_REMOTE_STATUS], &remote);
1344                         if (remote & KSZ8_PORT_FIBER_MODE)
1345                                 p->fiber = 1;
1346                 }
1347                 if (p->fiber)
1348                         ksz_port_cfg(dev, i, regs[P_STP_CTRL],
1349                                      PORT_FORCE_FLOW_CTRL, true);
1350                 else
1351                         ksz_port_cfg(dev, i, regs[P_STP_CTRL],
1352                                      PORT_FORCE_FLOW_CTRL, false);
1353         }
1354 }
1355
1356 static int ksz8_handle_global_errata(struct dsa_switch *ds)
1357 {
1358         struct ksz_device *dev = ds->priv;
1359         int ret = 0;
1360
1361         /* KSZ87xx Errata DS80000687C.
1362          * Module 2: Link drops with some EEE link partners.
1363          *   An issue with the EEE next page exchange between the
1364          *   KSZ879x/KSZ877x/KSZ876x and some EEE link partners may result in
1365          *   the link dropping.
1366          */
1367         if (dev->info->ksz87xx_eee_link_erratum)
1368                 ret = ksz8_ind_write8(dev, TABLE_EEE, REG_IND_EEE_GLOB2_HI, 0);
1369
1370         return ret;
1371 }
1372
1373 int ksz8_enable_stp_addr(struct ksz_device *dev)
1374 {
1375         struct alu_struct alu;
1376
1377         /* Setup STP address for STP operation. */
1378         memset(&alu, 0, sizeof(alu));
1379         ether_addr_copy(alu.mac, eth_stp_addr);
1380         alu.is_static = true;
1381         alu.is_override = true;
1382         alu.port_forward = dev->info->cpu_ports;
1383
1384         return ksz8_w_sta_mac_table(dev, 0, &alu);
1385 }
1386
1387 int ksz8_setup(struct dsa_switch *ds)
1388 {
1389         struct ksz_device *dev = ds->priv;
1390         int i;
1391
1392         ds->mtu_enforcement_ingress = true;
1393
1394         /* We rely on software untagging on the CPU port, so that we
1395          * can support both tagged and untagged VLANs
1396          */
1397         ds->untag_bridge_pvid = true;
1398
1399         /* VLAN filtering is partly controlled by the global VLAN
1400          * Enable flag
1401          */
1402         ds->vlan_filtering_is_global = true;
1403
1404         ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_FLOW_CTRL, true);
1405
1406         /* Enable automatic fast aging when link changed detected. */
1407         ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true);
1408
1409         /* Enable aggressive back off algorithm in half duplex mode. */
1410         regmap_update_bits(ksz_regmap_8(dev), REG_SW_CTRL_1,
1411                            SW_AGGR_BACKOFF, SW_AGGR_BACKOFF);
1412
1413         /*
1414          * Make sure unicast VLAN boundary is set as default and
1415          * enable no excessive collision drop.
1416          */
1417         regmap_update_bits(ksz_regmap_8(dev), REG_SW_CTRL_2,
1418                            UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP,
1419                            UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP);
1420
1421         ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_REPLACE_VID, false);
1422
1423         ksz_cfg(dev, S_MIRROR_CTRL, SW_MIRROR_RX_TX, false);
1424
1425         if (!ksz_is_ksz88x3(dev))
1426                 ksz_cfg(dev, REG_SW_CTRL_19, SW_INS_TAG_ENABLE, true);
1427
1428         for (i = 0; i < (dev->info->num_vlans / 4); i++)
1429                 ksz8_r_vlan_entries(dev, i);
1430
1431         return ksz8_handle_global_errata(ds);
1432 }
1433
1434 void ksz8_get_caps(struct ksz_device *dev, int port,
1435                    struct phylink_config *config)
1436 {
1437         config->mac_capabilities = MAC_10 | MAC_100;
1438
1439         /* Silicon Errata Sheet (DS80000830A):
1440          * "Port 1 does not respond to received flow control PAUSE frames"
1441          * So, disable Pause support on "Port 1" (port == 0) for all ksz88x3
1442          * switches.
1443          */
1444         if (!ksz_is_ksz88x3(dev) || port)
1445                 config->mac_capabilities |= MAC_SYM_PAUSE;
1446
1447         /* Asym pause is not supported on KSZ8863 and KSZ8873 */
1448         if (!ksz_is_ksz88x3(dev))
1449                 config->mac_capabilities |= MAC_ASYM_PAUSE;
1450 }
1451
1452 u32 ksz8_get_port_addr(int port, int offset)
1453 {
1454         return PORT_CTRL_ADDR(port, offset);
1455 }
1456
1457 int ksz8_switch_init(struct ksz_device *dev)
1458 {
1459         dev->cpu_port = fls(dev->info->cpu_ports) - 1;
1460         dev->phy_port_cnt = dev->info->port_cnt - 1;
1461         dev->port_mask = (BIT(dev->phy_port_cnt) - 1) | dev->info->cpu_ports;
1462
1463         return 0;
1464 }
1465
1466 void ksz8_switch_exit(struct ksz_device *dev)
1467 {
1468         ksz8_reset_switch(dev);
1469 }
1470
1471 MODULE_AUTHOR("Tristram Ha <Tristram.Ha@microchip.com>");
1472 MODULE_DESCRIPTION("Microchip KSZ8795 Series Switch DSA Driver");
1473 MODULE_LICENSE("GPL");