drivers/net/dsa/bcm_sf2.h

   1 /*
   2  * Broadcom Starfighter2 private context
   3  *
   4  * Copyright (C) 2014, Broadcom Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11
  12 #ifndef __BCM_SF2_H
  13 #define __BCM_SF2_H
  14
  15 #include <linux/platform_device.h>
  16 #include <linux/kernel.h>
  17 #include <linux/io.h>
  18 #include <linux/spinlock.h>
  19 #include <linux/mutex.h>
  20 #include <linux/mii.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/types.h>
  23 #include <linux/bitops.h>
  24 #include <linux/if_vlan.h>
  25
  26 #include <net/dsa.h>
  27
  28 #include "bcm_sf2_regs.h"
  29
  30 struct bcm_sf2_hw_params {
  31         u16     top_rev;
  32         u16     core_rev;
  33         u16     gphy_rev;
  34         u32     num_gphy;
  35         u8      num_acb_queue;
  36         u8      num_rgmii;
  37         u8      num_ports;
  38         u8      fcb_pause_override:1;
  39         u8      acb_packets_inflight:1;
  40 };
  41
  42 #define BCM_SF2_REGS_NAME {\
  43         "core", "reg", "intrl2_0", "intrl2_1", "fcb", "acb" \
  44 }
  45
  46 #define BCM_SF2_REGS_NUM        6
  47
  48 struct bcm_sf2_port_status {
  49         unsigned int link;
  50
  51         struct ethtool_eee eee;
  52
  53         u32 vlan_ctl_mask;
  54         u16 pvid;
  55
  56         struct net_device *bridge_dev;
  57 };
  58
  59 struct bcm_sf2_arl_entry {
  60         u8 port;
  61         u8 mac[ETH_ALEN];
  62         u16 vid;
  63         u8 is_valid:1;
  64         u8 is_age:1;
  65         u8 is_static:1;
  66 };
  67
  68 struct bcm_sf2_vlan {
  69         u16 members;
  70         u16 untag;
  71 };
  72
  73 static inline void bcm_sf2_mac_from_u64(u64 src, u8 *dst)
  74 {
  75         unsigned int i;
  76
  77         for (i = 0; i < ETH_ALEN; i++)
  78                 dst[ETH_ALEN - 1 - i] = (src >> (8 * i)) & 0xff;
  79 }
  80
  81 static inline u64 bcm_sf2_mac_to_u64(const u8 *src)
  82 {
  83         unsigned int i;
  84         u64 dst = 0;
  85
  86         for (i = 0; i < ETH_ALEN; i++)
  87                 dst |= (u64)src[ETH_ALEN - 1 - i] << (8 * i);
  88
  89         return dst;
  90 }
  91
  92 static inline void bcm_sf2_arl_to_entry(struct bcm_sf2_arl_entry *ent,
  93                                         u64 mac_vid, u32 fwd_entry)
  94 {
  95         memset(ent, 0, sizeof(*ent));
  96         ent->port = fwd_entry & PORTID_MASK;
  97         ent->is_valid = !!(fwd_entry & ARL_VALID);
  98         ent->is_age = !!(fwd_entry & ARL_AGE);
  99         ent->is_static = !!(fwd_entry & ARL_STATIC);
 100         bcm_sf2_mac_from_u64(mac_vid, ent->mac);
 101         ent->vid = mac_vid >> VID_SHIFT;
 102 }
 103
 104 static inline void bcm_sf2_arl_from_entry(u64 *mac_vid, u32 *fwd_entry,
 105                                           const struct bcm_sf2_arl_entry *ent)
 106 {
 107         *mac_vid = bcm_sf2_mac_to_u64(ent->mac);
 108         *mac_vid |= (u64)(ent->vid & VID_MASK) << VID_SHIFT;
 109         *fwd_entry = ent->port & PORTID_MASK;
 110         if (ent->is_valid)
 111                 *fwd_entry |= ARL_VALID;
 112         if (ent->is_static)
 113                 *fwd_entry |= ARL_STATIC;
 114         if (ent->is_age)
 115                 *fwd_entry |= ARL_AGE;
 116 }
 117
 118 struct bcm_sf2_priv {
 119         /* Base registers, keep those in order with BCM_SF2_REGS_NAME */
 120         void __iomem                    *core;
 121         void __iomem                    *reg;
 122         void __iomem                    *intrl2_0;
 123         void __iomem                    *intrl2_1;
 124         void __iomem                    *fcb;
 125         void __iomem                    *acb;
 126
 127         /* spinlock protecting access to the indirect registers */
 128         spinlock_t                      indir_lock;
 129
 130         int                             irq0;
 131         int                             irq1;
 132         u32                             irq0_stat;
 133         u32                             irq0_mask;
 134         u32                             irq1_stat;
 135         u32                             irq1_mask;
 136
 137         /* Mutex protecting access to the MIB counters */
 138         struct mutex                    stats_mutex;
 139
 140         struct bcm_sf2_hw_params        hw_params;
 141
 142         struct bcm_sf2_port_status      port_sts[DSA_MAX_PORTS];
 143
 144         /* Mask of ports enabled for Wake-on-LAN */
 145         u32                             wol_ports_mask;
 146
 147         /* MoCA port location */
 148         int                             moca_port;
 149
 150         /* Bitmask of ports having an integrated PHY */
 151         unsigned int                    int_phy_mask;
 152
 153         /* Master and slave MDIO bus controller */
 154         unsigned int                    indir_phy_mask;
 155         struct device_node              *master_mii_dn;
 156         struct mii_bus                  *slave_mii_bus;
 157         struct mii_bus                  *master_mii_bus;
 158
 159         /* Cache of programmed VLANs */
 160         struct bcm_sf2_vlan             vlans[VLAN_N_VID];
 161 };
 162
 163 struct bcm_sf2_hw_stats {
 164         const char      *string;
 165         u16             reg;
 166         u8              sizeof_stat;
 167 };
 168
 169 #define SF2_IO_MACRO(name) \
 170 static inline u32 name##_readl(struct bcm_sf2_priv *priv, u32 off)      \
 171 {                                                                       \
 172         return __raw_readl(priv->name + off);                           \
 173 }                                                                       \
 174 static inline void name##_writel(struct bcm_sf2_priv *priv,             \
 175                                   u32 val, u32 off)                     \
 176 {                                                                       \
 177         __raw_writel(val, priv->name + off);                            \
 178 }                                                                       \
 179
 180 /* Accesses to 64-bits register requires us to latch the hi/lo pairs
 181  * using the REG_DIR_DATA_{READ,WRITE} ancillary registers. The 'indir_lock'
 182  * spinlock is automatically grabbed and released to provide relative
 183  * atomiticy with latched reads/writes.
 184  */
 185 #define SF2_IO64_MACRO(name) \
 186 static inline u64 name##_readq(struct bcm_sf2_priv *priv, u32 off)      \
 187 {                                                                       \
 188         u32 indir, dir;                                                 \
 189         spin_lock(&priv->indir_lock);                                   \
 190         dir = __raw_readl(priv->name + off);                            \
 191         indir = reg_readl(priv, REG_DIR_DATA_READ);                     \
 192         spin_unlock(&priv->indir_lock);                                 \
 193         return (u64)indir << 32 | dir;                                  \
 194 }                                                                       \
 195 static inline void name##_writeq(struct bcm_sf2_priv *priv, u64 val,    \
 196                                                         u32 off)        \
 197 {                                                                       \
 198         spin_lock(&priv->indir_lock);                                   \
 199         reg_writel(priv, upper_32_bits(val), REG_DIR_DATA_WRITE);       \
 200         __raw_writel(lower_32_bits(val), priv->name + off);             \
 201         spin_unlock(&priv->indir_lock);                                 \
 202 }
 203
 204 #define SWITCH_INTR_L2(which)                                           \
 205 static inline void intrl2_##which##_mask_clear(struct bcm_sf2_priv *priv, \
 206                                                 u32 mask)               \
 207 {                                                                       \
 208         priv->irq##which##_mask &= ~(mask);                             \
 209         intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR);     \
 210 }                                                                       \
 211 static inline void intrl2_##which##_mask_set(struct bcm_sf2_priv *priv, \
 212                                                 u32 mask)               \
 213 {                                                                       \
 214         intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET);      \
 215         priv->irq##which##_mask |= (mask);                              \
 216 }                                                                       \
 217
 218 SF2_IO_MACRO(core);
 219 SF2_IO_MACRO(reg);
 220 SF2_IO64_MACRO(core);
 221 SF2_IO_MACRO(intrl2_0);
 222 SF2_IO_MACRO(intrl2_1);
 223 SF2_IO_MACRO(fcb);
 224 SF2_IO_MACRO(acb);
 225
 226 SWITCH_INTR_L2(0);
 227 SWITCH_INTR_L2(1);
 228
 229 #endif /* __BCM_SF2_H */