2 * Copyright (C) 2005 - 2010 ServerEngines
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@serverengines.com
14 * 209 N. Fair Oaks Ave
20 #include <asm/div64.h>
22 MODULE_VERSION(DRV_VER);
23 MODULE_DEVICE_TABLE(pci, be_dev_ids);
24 MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25 MODULE_AUTHOR("ServerEngines Corporation");
26 MODULE_LICENSE("GPL");
28 static unsigned int rx_frag_size = 2048;
29 static unsigned int num_vfs;
30 module_param(rx_frag_size, uint, S_IRUGO);
31 module_param(num_vfs, uint, S_IRUGO);
32 MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
33 MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
35 static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
36 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
37 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
38 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
39 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
42 MODULE_DEVICE_TABLE(pci, be_dev_ids);
43 /* UE Status Low CSR */
44 static char *ue_status_low_desc[] = {
78 /* UE Status High CSR */
79 static char *ue_status_hi_desc[] = {
114 static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
116 struct be_dma_mem *mem = &q->dma_mem;
118 pci_free_consistent(adapter->pdev, mem->size,
122 static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
123 u16 len, u16 entry_size)
125 struct be_dma_mem *mem = &q->dma_mem;
127 memset(q, 0, sizeof(*q));
129 q->entry_size = entry_size;
130 mem->size = len * entry_size;
131 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
134 memset(mem->va, 0, mem->size);
138 static void be_intr_set(struct be_adapter *adapter, bool enable)
140 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
141 u32 reg = ioread32(addr);
142 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
144 if (adapter->eeh_err)
147 if (!enabled && enable)
148 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
149 else if (enabled && !enable)
150 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
154 iowrite32(reg, addr);
157 static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
160 val |= qid & DB_RQ_RING_ID_MASK;
161 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
164 iowrite32(val, adapter->db + DB_RQ_OFFSET);
167 static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
170 val |= qid & DB_TXULP_RING_ID_MASK;
171 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
174 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
177 static void be_eq_notify(struct be_adapter *adapter, u16 qid,
178 bool arm, bool clear_int, u16 num_popped)
181 val |= qid & DB_EQ_RING_ID_MASK;
183 if (adapter->eeh_err)
187 val |= 1 << DB_EQ_REARM_SHIFT;
189 val |= 1 << DB_EQ_CLR_SHIFT;
190 val |= 1 << DB_EQ_EVNT_SHIFT;
191 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
192 iowrite32(val, adapter->db + DB_EQ_OFFSET);
195 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
198 val |= qid & DB_CQ_RING_ID_MASK;
200 if (adapter->eeh_err)
204 val |= 1 << DB_CQ_REARM_SHIFT;
205 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
206 iowrite32(val, adapter->db + DB_CQ_OFFSET);
209 static int be_mac_addr_set(struct net_device *netdev, void *p)
211 struct be_adapter *adapter = netdev_priv(netdev);
212 struct sockaddr *addr = p;
215 if (!is_valid_ether_addr(addr->sa_data))
216 return -EADDRNOTAVAIL;
218 /* MAC addr configuration will be done in hardware for VFs
219 * by their corresponding PFs. Just copy to netdev addr here
221 if (!be_physfn(adapter))
224 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
228 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
229 adapter->if_handle, &adapter->pmac_id);
232 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
237 void netdev_stats_update(struct be_adapter *adapter)
239 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
240 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
241 struct be_port_rxf_stats *port_stats =
242 &rxf_stats->port[adapter->port_num];
243 struct net_device_stats *dev_stats = &adapter->netdev->stats;
244 struct be_erx_stats *erx_stats = &hw_stats->erx;
246 dev_stats->rx_packets = drvr_stats(adapter)->be_rx_pkts;
247 dev_stats->tx_packets = drvr_stats(adapter)->be_tx_pkts;
248 dev_stats->rx_bytes = drvr_stats(adapter)->be_rx_bytes;
249 dev_stats->tx_bytes = drvr_stats(adapter)->be_tx_bytes;
251 /* bad pkts received */
252 dev_stats->rx_errors = port_stats->rx_crc_errors +
253 port_stats->rx_alignment_symbol_errors +
254 port_stats->rx_in_range_errors +
255 port_stats->rx_out_range_errors +
256 port_stats->rx_frame_too_long +
257 port_stats->rx_dropped_too_small +
258 port_stats->rx_dropped_too_short +
259 port_stats->rx_dropped_header_too_small +
260 port_stats->rx_dropped_tcp_length +
261 port_stats->rx_dropped_runt +
262 port_stats->rx_tcp_checksum_errs +
263 port_stats->rx_ip_checksum_errs +
264 port_stats->rx_udp_checksum_errs;
266 /* no space in linux buffers: best possible approximation */
267 dev_stats->rx_dropped =
268 erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
270 /* detailed rx errors */
271 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
272 port_stats->rx_out_range_errors +
273 port_stats->rx_frame_too_long;
275 /* receive ring buffer overflow */
276 dev_stats->rx_over_errors = 0;
278 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
280 /* frame alignment errors */
281 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
283 /* receiver fifo overrun */
284 /* drops_no_pbuf is no per i/f, it's per BE card */
285 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
286 port_stats->rx_input_fifo_overflow +
287 rxf_stats->rx_drops_no_pbuf;
288 /* receiver missed packetd */
289 dev_stats->rx_missed_errors = 0;
291 /* packet transmit problems */
292 dev_stats->tx_errors = 0;
294 /* no space available in linux */
295 dev_stats->tx_dropped = 0;
297 dev_stats->multicast = port_stats->rx_multicast_frames;
298 dev_stats->collisions = 0;
300 /* detailed tx_errors */
301 dev_stats->tx_aborted_errors = 0;
302 dev_stats->tx_carrier_errors = 0;
303 dev_stats->tx_fifo_errors = 0;
304 dev_stats->tx_heartbeat_errors = 0;
305 dev_stats->tx_window_errors = 0;
308 void be_link_status_update(struct be_adapter *adapter, bool link_up)
310 struct net_device *netdev = adapter->netdev;
312 /* If link came up or went down */
313 if (adapter->link_up != link_up) {
314 adapter->link_speed = -1;
316 netif_start_queue(netdev);
317 netif_carrier_on(netdev);
318 printk(KERN_INFO "%s: Link up\n", netdev->name);
320 netif_stop_queue(netdev);
321 netif_carrier_off(netdev);
322 printk(KERN_INFO "%s: Link down\n", netdev->name);
324 adapter->link_up = link_up;
328 /* Update the EQ delay n BE based on the RX frags consumed / sec */
329 static void be_rx_eqd_update(struct be_adapter *adapter)
331 struct be_eq_obj *rx_eq = &adapter->rx_eq;
332 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
336 if (!rx_eq->enable_aic)
340 if (time_before(now, stats->rx_fps_jiffies)) {
341 stats->rx_fps_jiffies = now;
345 /* Update once a second */
346 if ((now - stats->rx_fps_jiffies) < HZ)
349 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
350 ((now - stats->rx_fps_jiffies) / HZ);
352 stats->rx_fps_jiffies = now;
353 stats->be_prev_rx_frags = stats->be_rx_frags;
354 eqd = stats->be_rx_fps / 110000;
356 if (eqd > rx_eq->max_eqd)
357 eqd = rx_eq->max_eqd;
358 if (eqd < rx_eq->min_eqd)
359 eqd = rx_eq->min_eqd;
362 if (eqd != rx_eq->cur_eqd)
363 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
365 rx_eq->cur_eqd = eqd;
368 static u32 be_calc_rate(u64 bytes, unsigned long ticks)
372 do_div(rate, ticks / HZ);
373 rate <<= 3; /* bytes/sec -> bits/sec */
374 do_div(rate, 1000000ul); /* MB/Sec */
379 static void be_tx_rate_update(struct be_adapter *adapter)
381 struct be_drvr_stats *stats = drvr_stats(adapter);
384 /* Wrapped around? */
385 if (time_before(now, stats->be_tx_jiffies)) {
386 stats->be_tx_jiffies = now;
390 /* Update tx rate once in two seconds */
391 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
392 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
393 - stats->be_tx_bytes_prev,
394 now - stats->be_tx_jiffies);
395 stats->be_tx_jiffies = now;
396 stats->be_tx_bytes_prev = stats->be_tx_bytes;
400 static void be_tx_stats_update(struct be_adapter *adapter,
401 u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
403 struct be_drvr_stats *stats = drvr_stats(adapter);
405 stats->be_tx_wrbs += wrb_cnt;
406 stats->be_tx_bytes += copied;
407 stats->be_tx_pkts += (gso_segs ? gso_segs : 1);
409 stats->be_tx_stops++;
412 /* Determine number of WRB entries needed to xmit data in an skb */
413 static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
415 int cnt = (skb->len > skb->data_len);
417 cnt += skb_shinfo(skb)->nr_frags;
419 /* to account for hdr wrb */
422 /* add a dummy to make it an even num */
427 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
431 static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
433 wrb->frag_pa_hi = upper_32_bits(addr);
434 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
435 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
438 static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
439 bool vlan, u32 wrb_cnt, u32 len)
441 memset(hdr, 0, sizeof(*hdr));
443 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
445 if (skb_is_gso(skb)) {
446 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
447 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
448 hdr, skb_shinfo(skb)->gso_size);
449 if (skb_is_gso_v6(skb))
450 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso6, hdr, 1);
451 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
453 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
454 else if (is_udp_pkt(skb))
455 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
458 if (vlan && vlan_tx_tag_present(skb)) {
459 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
460 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
461 hdr, vlan_tx_tag_get(skb));
464 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
465 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
466 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
467 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
470 static void unmap_tx_frag(struct pci_dev *pdev, struct be_eth_wrb *wrb,
475 be_dws_le_to_cpu(wrb, sizeof(*wrb));
477 dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo;
480 pci_unmap_single(pdev, dma, wrb->frag_len,
483 pci_unmap_page(pdev, dma, wrb->frag_len,
488 static int make_tx_wrbs(struct be_adapter *adapter,
489 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
493 struct pci_dev *pdev = adapter->pdev;
494 struct sk_buff *first_skb = skb;
495 struct be_queue_info *txq = &adapter->tx_obj.q;
496 struct be_eth_wrb *wrb;
497 struct be_eth_hdr_wrb *hdr;
498 bool map_single = false;
501 hdr = queue_head_node(txq);
503 map_head = txq->head;
505 if (skb->len > skb->data_len) {
506 int len = skb_headlen(skb);
507 busaddr = pci_map_single(pdev, skb->data, len,
509 if (pci_dma_mapping_error(pdev, busaddr))
512 wrb = queue_head_node(txq);
513 wrb_fill(wrb, busaddr, len);
514 be_dws_cpu_to_le(wrb, sizeof(*wrb));
519 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
520 struct skb_frag_struct *frag =
521 &skb_shinfo(skb)->frags[i];
522 busaddr = pci_map_page(pdev, frag->page,
524 frag->size, PCI_DMA_TODEVICE);
525 if (pci_dma_mapping_error(pdev, busaddr))
527 wrb = queue_head_node(txq);
528 wrb_fill(wrb, busaddr, frag->size);
529 be_dws_cpu_to_le(wrb, sizeof(*wrb));
531 copied += frag->size;
535 wrb = queue_head_node(txq);
537 be_dws_cpu_to_le(wrb, sizeof(*wrb));
541 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
543 be_dws_cpu_to_le(hdr, sizeof(*hdr));
547 txq->head = map_head;
549 wrb = queue_head_node(txq);
550 unmap_tx_frag(pdev, wrb, map_single);
552 copied -= wrb->frag_len;
558 static netdev_tx_t be_xmit(struct sk_buff *skb,
559 struct net_device *netdev)
561 struct be_adapter *adapter = netdev_priv(netdev);
562 struct be_tx_obj *tx_obj = &adapter->tx_obj;
563 struct be_queue_info *txq = &tx_obj->q;
564 u32 wrb_cnt = 0, copied = 0;
565 u32 start = txq->head;
566 bool dummy_wrb, stopped = false;
568 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
570 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
572 /* record the sent skb in the sent_skb table */
573 BUG_ON(tx_obj->sent_skb_list[start]);
574 tx_obj->sent_skb_list[start] = skb;
576 /* Ensure txq has space for the next skb; Else stop the queue
577 * *BEFORE* ringing the tx doorbell, so that we serialze the
578 * tx compls of the current transmit which'll wake up the queue
580 atomic_add(wrb_cnt, &txq->used);
581 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
583 netif_stop_queue(netdev);
587 be_txq_notify(adapter, txq->id, wrb_cnt);
589 be_tx_stats_update(adapter, wrb_cnt, copied,
590 skb_shinfo(skb)->gso_segs, stopped);
593 dev_kfree_skb_any(skb);
598 static int be_change_mtu(struct net_device *netdev, int new_mtu)
600 struct be_adapter *adapter = netdev_priv(netdev);
601 if (new_mtu < BE_MIN_MTU ||
602 new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
603 (ETH_HLEN + ETH_FCS_LEN))) {
604 dev_info(&adapter->pdev->dev,
605 "MTU must be between %d and %d bytes\n",
607 (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
610 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
611 netdev->mtu, new_mtu);
612 netdev->mtu = new_mtu;
617 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
618 * If the user configures more, place BE in vlan promiscuous mode.
620 static int be_vid_config(struct be_adapter *adapter, bool vf, u32 vf_num)
622 u16 vtag[BE_NUM_VLANS_SUPPORTED];
628 if_handle = adapter->vf_cfg[vf_num].vf_if_handle;
629 vtag[0] = cpu_to_le16(adapter->vf_cfg[vf_num].vf_vlan_tag);
630 status = be_cmd_vlan_config(adapter, if_handle, vtag, 1, 1, 0);
633 if (adapter->vlans_added <= adapter->max_vlans) {
634 /* Construct VLAN Table to give to HW */
635 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
636 if (adapter->vlan_tag[i]) {
637 vtag[ntags] = cpu_to_le16(i);
641 status = be_cmd_vlan_config(adapter, adapter->if_handle,
644 status = be_cmd_vlan_config(adapter, adapter->if_handle,
651 static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
653 struct be_adapter *adapter = netdev_priv(netdev);
654 struct be_eq_obj *rx_eq = &adapter->rx_eq;
655 struct be_eq_obj *tx_eq = &adapter->tx_eq;
657 be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
658 be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
659 adapter->vlan_grp = grp;
660 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
661 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
664 static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
666 struct be_adapter *adapter = netdev_priv(netdev);
668 adapter->vlans_added++;
669 if (!be_physfn(adapter))
672 adapter->vlan_tag[vid] = 1;
673 if (adapter->vlans_added <= (adapter->max_vlans + 1))
674 be_vid_config(adapter, false, 0);
677 static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
679 struct be_adapter *adapter = netdev_priv(netdev);
681 adapter->vlans_added--;
682 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
684 if (!be_physfn(adapter))
687 adapter->vlan_tag[vid] = 0;
688 if (adapter->vlans_added <= adapter->max_vlans)
689 be_vid_config(adapter, false, 0);
692 static void be_set_multicast_list(struct net_device *netdev)
694 struct be_adapter *adapter = netdev_priv(netdev);
696 if (netdev->flags & IFF_PROMISC) {
697 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
698 adapter->promiscuous = true;
702 /* BE was previously in promiscous mode; disable it */
703 if (adapter->promiscuous) {
704 adapter->promiscuous = false;
705 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
708 /* Enable multicast promisc if num configured exceeds what we support */
709 if (netdev->flags & IFF_ALLMULTI ||
710 netdev_mc_count(netdev) > BE_MAX_MC) {
711 be_cmd_multicast_set(adapter, adapter->if_handle, NULL,
712 &adapter->mc_cmd_mem);
716 be_cmd_multicast_set(adapter, adapter->if_handle, netdev,
717 &adapter->mc_cmd_mem);
722 static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
724 struct be_adapter *adapter = netdev_priv(netdev);
727 if (!adapter->sriov_enabled)
730 if (!is_valid_ether_addr(mac) || (vf >= num_vfs))
733 if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
734 status = be_cmd_pmac_del(adapter,
735 adapter->vf_cfg[vf].vf_if_handle,
736 adapter->vf_cfg[vf].vf_pmac_id);
738 status = be_cmd_pmac_add(adapter, mac,
739 adapter->vf_cfg[vf].vf_if_handle,
740 &adapter->vf_cfg[vf].vf_pmac_id);
743 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n",
746 memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
751 static int be_get_vf_config(struct net_device *netdev, int vf,
752 struct ifla_vf_info *vi)
754 struct be_adapter *adapter = netdev_priv(netdev);
756 if (!adapter->sriov_enabled)
763 vi->tx_rate = adapter->vf_cfg[vf].vf_tx_rate;
764 vi->vlan = adapter->vf_cfg[vf].vf_vlan_tag;
766 memcpy(&vi->mac, adapter->vf_cfg[vf].vf_mac_addr, ETH_ALEN);
771 static int be_set_vf_vlan(struct net_device *netdev,
772 int vf, u16 vlan, u8 qos)
774 struct be_adapter *adapter = netdev_priv(netdev);
777 if (!adapter->sriov_enabled)
780 if ((vf >= num_vfs) || (vlan > 4095))
784 adapter->vf_cfg[vf].vf_vlan_tag = vlan;
785 adapter->vlans_added++;
787 adapter->vf_cfg[vf].vf_vlan_tag = 0;
788 adapter->vlans_added--;
791 status = be_vid_config(adapter, true, vf);
794 dev_info(&adapter->pdev->dev,
795 "VLAN %d config on VF %d failed\n", vlan, vf);
799 static int be_set_vf_tx_rate(struct net_device *netdev,
802 struct be_adapter *adapter = netdev_priv(netdev);
805 if (!adapter->sriov_enabled)
808 if ((vf >= num_vfs) || (rate < 0))
814 adapter->vf_cfg[vf].vf_tx_rate = rate;
815 status = be_cmd_set_qos(adapter, rate / 10, vf);
818 dev_info(&adapter->pdev->dev,
819 "tx rate %d on VF %d failed\n", rate, vf);
823 static void be_rx_rate_update(struct be_adapter *adapter)
825 struct be_drvr_stats *stats = drvr_stats(adapter);
829 if (time_before(now, stats->be_rx_jiffies)) {
830 stats->be_rx_jiffies = now;
834 /* Update the rate once in two seconds */
835 if ((now - stats->be_rx_jiffies) < 2 * HZ)
838 stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
839 - stats->be_rx_bytes_prev,
840 now - stats->be_rx_jiffies);
841 stats->be_rx_jiffies = now;
842 stats->be_rx_bytes_prev = stats->be_rx_bytes;
845 static void be_rx_stats_update(struct be_adapter *adapter,
846 u32 pktsize, u16 numfrags)
848 struct be_drvr_stats *stats = drvr_stats(adapter);
850 stats->be_rx_compl++;
851 stats->be_rx_frags += numfrags;
852 stats->be_rx_bytes += pktsize;
856 static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
858 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
860 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
861 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
862 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
864 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
865 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
867 ipv6_chk = (ip_version && (tcpf || udpf));
869 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
872 static struct be_rx_page_info *
873 get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
875 struct be_rx_page_info *rx_page_info;
876 struct be_queue_info *rxq = &adapter->rx_obj.q;
878 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
879 BUG_ON(!rx_page_info->page);
881 if (rx_page_info->last_page_user) {
882 pci_unmap_page(adapter->pdev, dma_unmap_addr(rx_page_info, bus),
883 adapter->big_page_size, PCI_DMA_FROMDEVICE);
884 rx_page_info->last_page_user = false;
887 atomic_dec(&rxq->used);
891 /* Throwaway the data in the Rx completion */
892 static void be_rx_compl_discard(struct be_adapter *adapter,
893 struct be_eth_rx_compl *rxcp)
895 struct be_queue_info *rxq = &adapter->rx_obj.q;
896 struct be_rx_page_info *page_info;
897 u16 rxq_idx, i, num_rcvd;
899 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
900 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
902 for (i = 0; i < num_rcvd; i++) {
903 page_info = get_rx_page_info(adapter, rxq_idx);
904 put_page(page_info->page);
905 memset(page_info, 0, sizeof(*page_info));
906 index_inc(&rxq_idx, rxq->len);
911 * skb_fill_rx_data forms a complete skb for an ether frame
914 static void skb_fill_rx_data(struct be_adapter *adapter,
915 struct sk_buff *skb, struct be_eth_rx_compl *rxcp,
918 struct be_queue_info *rxq = &adapter->rx_obj.q;
919 struct be_rx_page_info *page_info;
921 u32 pktsize, hdr_len, curr_frag_len, size;
924 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
925 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
927 page_info = get_rx_page_info(adapter, rxq_idx);
929 start = page_address(page_info->page) + page_info->page_offset;
932 /* Copy data in the first descriptor of this completion */
933 curr_frag_len = min(pktsize, rx_frag_size);
935 /* Copy the header portion into skb_data */
936 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
937 memcpy(skb->data, start, hdr_len);
938 skb->len = curr_frag_len;
939 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
940 /* Complete packet has now been moved to data */
941 put_page(page_info->page);
943 skb->tail += curr_frag_len;
945 skb_shinfo(skb)->nr_frags = 1;
946 skb_shinfo(skb)->frags[0].page = page_info->page;
947 skb_shinfo(skb)->frags[0].page_offset =
948 page_info->page_offset + hdr_len;
949 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
950 skb->data_len = curr_frag_len - hdr_len;
951 skb->tail += hdr_len;
953 page_info->page = NULL;
955 if (pktsize <= rx_frag_size) {
956 BUG_ON(num_rcvd != 1);
960 /* More frags present for this completion */
962 for (i = 1, j = 0; i < num_rcvd; i++) {
963 size -= curr_frag_len;
964 index_inc(&rxq_idx, rxq->len);
965 page_info = get_rx_page_info(adapter, rxq_idx);
967 curr_frag_len = min(size, rx_frag_size);
969 /* Coalesce all frags from the same physical page in one slot */
970 if (page_info->page_offset == 0) {
973 skb_shinfo(skb)->frags[j].page = page_info->page;
974 skb_shinfo(skb)->frags[j].page_offset =
975 page_info->page_offset;
976 skb_shinfo(skb)->frags[j].size = 0;
977 skb_shinfo(skb)->nr_frags++;
979 put_page(page_info->page);
982 skb_shinfo(skb)->frags[j].size += curr_frag_len;
983 skb->len += curr_frag_len;
984 skb->data_len += curr_frag_len;
986 page_info->page = NULL;
988 BUG_ON(j > MAX_SKB_FRAGS);
991 be_rx_stats_update(adapter, pktsize, num_rcvd);
994 /* Process the RX completion indicated by rxcp when GRO is disabled */
995 static void be_rx_compl_process(struct be_adapter *adapter,
996 struct be_eth_rx_compl *rxcp)
1003 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
1004 /* Is it a flush compl that has no data */
1005 if (unlikely(num_rcvd == 0))
1008 skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
1009 if (unlikely(!skb)) {
1010 if (net_ratelimit())
1011 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
1012 be_rx_compl_discard(adapter, rxcp);
1016 skb_fill_rx_data(adapter, skb, rxcp, num_rcvd);
1018 if (do_pkt_csum(rxcp, adapter->rx_csum))
1019 skb->ip_summed = CHECKSUM_NONE;
1021 skb->ip_summed = CHECKSUM_UNNECESSARY;
1023 skb->truesize = skb->len + sizeof(struct sk_buff);
1024 skb->protocol = eth_type_trans(skb, adapter->netdev);
1026 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
1027 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
1029 /* vlanf could be wrongly set in some cards.
1030 * ignore if vtm is not set */
1031 if ((adapter->function_mode & 0x400) && !vtm)
1034 if (unlikely(vlanf)) {
1035 if (!adapter->vlan_grp || adapter->vlans_added == 0) {
1039 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
1041 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
1043 netif_receive_skb(skb);
1047 /* Process the RX completion indicated by rxcp when GRO is enabled */
1048 static void be_rx_compl_process_gro(struct be_adapter *adapter,
1049 struct be_eth_rx_compl *rxcp)
1051 struct be_rx_page_info *page_info;
1052 struct sk_buff *skb = NULL;
1053 struct be_queue_info *rxq = &adapter->rx_obj.q;
1054 struct be_eq_obj *eq_obj = &adapter->rx_eq;
1055 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
1056 u16 i, rxq_idx = 0, vid, j;
1059 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
1060 /* Is it a flush compl that has no data */
1061 if (unlikely(num_rcvd == 0))
1064 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
1065 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
1066 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
1067 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
1069 /* vlanf could be wrongly set in some cards.
1070 * ignore if vtm is not set */
1071 if ((adapter->function_mode & 0x400) && !vtm)
1074 skb = napi_get_frags(&eq_obj->napi);
1076 be_rx_compl_discard(adapter, rxcp);
1080 remaining = pkt_size;
1081 for (i = 0, j = -1; i < num_rcvd; i++) {
1082 page_info = get_rx_page_info(adapter, rxq_idx);
1084 curr_frag_len = min(remaining, rx_frag_size);
1086 /* Coalesce all frags from the same physical page in one slot */
1087 if (i == 0 || page_info->page_offset == 0) {
1088 /* First frag or Fresh page */
1090 skb_shinfo(skb)->frags[j].page = page_info->page;
1091 skb_shinfo(skb)->frags[j].page_offset =
1092 page_info->page_offset;
1093 skb_shinfo(skb)->frags[j].size = 0;
1095 put_page(page_info->page);
1097 skb_shinfo(skb)->frags[j].size += curr_frag_len;
1099 remaining -= curr_frag_len;
1100 index_inc(&rxq_idx, rxq->len);
1101 memset(page_info, 0, sizeof(*page_info));
1103 BUG_ON(j > MAX_SKB_FRAGS);
1105 skb_shinfo(skb)->nr_frags = j + 1;
1106 skb->len = pkt_size;
1107 skb->data_len = pkt_size;
1108 skb->truesize += pkt_size;
1109 skb->ip_summed = CHECKSUM_UNNECESSARY;
1111 if (likely(!vlanf)) {
1112 napi_gro_frags(&eq_obj->napi);
1114 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
1117 if (!adapter->vlan_grp || adapter->vlans_added == 0)
1120 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
1123 be_rx_stats_update(adapter, pkt_size, num_rcvd);
1126 static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
1128 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
1130 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
1134 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
1136 queue_tail_inc(&adapter->rx_obj.cq);
1140 /* To reset the valid bit, we need to reset the whole word as
1141 * when walking the queue the valid entries are little-endian
1142 * and invalid entries are host endian
1144 static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
1146 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
1149 static inline struct page *be_alloc_pages(u32 size)
1151 gfp_t alloc_flags = GFP_ATOMIC;
1152 u32 order = get_order(size);
1154 alloc_flags |= __GFP_COMP;
1155 return alloc_pages(alloc_flags, order);
1159 * Allocate a page, split it to fragments of size rx_frag_size and post as
1160 * receive buffers to BE
1162 static void be_post_rx_frags(struct be_adapter *adapter)
1164 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
1165 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
1166 struct be_queue_info *rxq = &adapter->rx_obj.q;
1167 struct page *pagep = NULL;
1168 struct be_eth_rx_d *rxd;
1169 u64 page_dmaaddr = 0, frag_dmaaddr;
1170 u32 posted, page_offset = 0;
1172 page_info = &page_info_tbl[rxq->head];
1173 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
1175 pagep = be_alloc_pages(adapter->big_page_size);
1176 if (unlikely(!pagep)) {
1177 drvr_stats(adapter)->be_ethrx_post_fail++;
1180 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
1181 adapter->big_page_size,
1182 PCI_DMA_FROMDEVICE);
1183 page_info->page_offset = 0;
1186 page_info->page_offset = page_offset + rx_frag_size;
1188 page_offset = page_info->page_offset;
1189 page_info->page = pagep;
1190 dma_unmap_addr_set(page_info, bus, page_dmaaddr);
1191 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
1193 rxd = queue_head_node(rxq);
1194 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
1195 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
1197 /* Any space left in the current big page for another frag? */
1198 if ((page_offset + rx_frag_size + rx_frag_size) >
1199 adapter->big_page_size) {
1201 page_info->last_page_user = true;
1204 prev_page_info = page_info;
1205 queue_head_inc(rxq);
1206 page_info = &page_info_tbl[rxq->head];
1209 prev_page_info->last_page_user = true;
1212 atomic_add(posted, &rxq->used);
1213 be_rxq_notify(adapter, rxq->id, posted);
1214 } else if (atomic_read(&rxq->used) == 0) {
1215 /* Let be_worker replenish when memory is available */
1216 adapter->rx_post_starved = true;
1220 static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
1222 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
1224 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
1228 be_dws_le_to_cpu(txcp, sizeof(*txcp));
1230 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
1232 queue_tail_inc(tx_cq);
1236 static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
1238 struct be_queue_info *txq = &adapter->tx_obj.q;
1239 struct be_eth_wrb *wrb;
1240 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1241 struct sk_buff *sent_skb;
1242 u16 cur_index, num_wrbs = 1; /* account for hdr wrb */
1243 bool unmap_skb_hdr = true;
1245 sent_skb = sent_skbs[txq->tail];
1247 sent_skbs[txq->tail] = NULL;
1249 /* skip header wrb */
1250 queue_tail_inc(txq);
1253 cur_index = txq->tail;
1254 wrb = queue_tail_node(txq);
1255 unmap_tx_frag(adapter->pdev, wrb, (unmap_skb_hdr &&
1256 skb_headlen(sent_skb)));
1257 unmap_skb_hdr = false;
1260 queue_tail_inc(txq);
1261 } while (cur_index != last_index);
1263 atomic_sub(num_wrbs, &txq->used);
1265 kfree_skb(sent_skb);
1268 static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1270 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1276 eqe->evt = le32_to_cpu(eqe->evt);
1277 queue_tail_inc(&eq_obj->q);
1281 static int event_handle(struct be_adapter *adapter,
1282 struct be_eq_obj *eq_obj)
1284 struct be_eq_entry *eqe;
1287 while ((eqe = event_get(eq_obj)) != NULL) {
1292 /* Deal with any spurious interrupts that come
1295 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1297 napi_schedule(&eq_obj->napi);
1302 /* Just read and notify events without processing them.
1303 * Used at the time of destroying event queues */
1304 static void be_eq_clean(struct be_adapter *adapter,
1305 struct be_eq_obj *eq_obj)
1307 struct be_eq_entry *eqe;
1310 while ((eqe = event_get(eq_obj)) != NULL) {
1316 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1319 static void be_rx_q_clean(struct be_adapter *adapter)
1321 struct be_rx_page_info *page_info;
1322 struct be_queue_info *rxq = &adapter->rx_obj.q;
1323 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1324 struct be_eth_rx_compl *rxcp;
1327 /* First cleanup pending rx completions */
1328 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
1329 be_rx_compl_discard(adapter, rxcp);
1330 be_rx_compl_reset(rxcp);
1331 be_cq_notify(adapter, rx_cq->id, true, 1);
1334 /* Then free posted rx buffer that were not used */
1335 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
1336 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
1337 page_info = get_rx_page_info(adapter, tail);
1338 put_page(page_info->page);
1339 memset(page_info, 0, sizeof(*page_info));
1341 BUG_ON(atomic_read(&rxq->used));
1344 static void be_tx_compl_clean(struct be_adapter *adapter)
1346 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1347 struct be_queue_info *txq = &adapter->tx_obj.q;
1348 struct be_eth_tx_compl *txcp;
1349 u16 end_idx, cmpl = 0, timeo = 0;
1350 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1351 struct sk_buff *sent_skb;
1354 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1356 while ((txcp = be_tx_compl_get(tx_cq))) {
1357 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1359 be_tx_compl_process(adapter, end_idx);
1363 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1367 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1373 if (atomic_read(&txq->used))
1374 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1375 atomic_read(&txq->used));
1377 /* free posted tx for which compls will never arrive */
1378 while (atomic_read(&txq->used)) {
1379 sent_skb = sent_skbs[txq->tail];
1380 end_idx = txq->tail;
1382 wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
1383 be_tx_compl_process(adapter, end_idx);
1387 static void be_mcc_queues_destroy(struct be_adapter *adapter)
1389 struct be_queue_info *q;
1391 q = &adapter->mcc_obj.q;
1393 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
1394 be_queue_free(adapter, q);
1396 q = &adapter->mcc_obj.cq;
1398 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1399 be_queue_free(adapter, q);
1402 /* Must be called only after TX qs are created as MCC shares TX EQ */
1403 static int be_mcc_queues_create(struct be_adapter *adapter)
1405 struct be_queue_info *q, *cq;
1407 /* Alloc MCC compl queue */
1408 cq = &adapter->mcc_obj.cq;
1409 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
1410 sizeof(struct be_mcc_compl)))
1413 /* Ask BE to create MCC compl queue; share TX's eq */
1414 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
1417 /* Alloc MCC queue */
1418 q = &adapter->mcc_obj.q;
1419 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1420 goto mcc_cq_destroy;
1422 /* Ask BE to create MCC queue */
1423 if (be_cmd_mccq_create(adapter, q, cq))
1429 be_queue_free(adapter, q);
1431 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1433 be_queue_free(adapter, cq);
1438 static void be_tx_queues_destroy(struct be_adapter *adapter)
1440 struct be_queue_info *q;
1442 q = &adapter->tx_obj.q;
1444 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
1445 be_queue_free(adapter, q);
1447 q = &adapter->tx_obj.cq;
1449 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1450 be_queue_free(adapter, q);
1452 /* Clear any residual events */
1453 be_eq_clean(adapter, &adapter->tx_eq);
1455 q = &adapter->tx_eq.q;
1457 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1458 be_queue_free(adapter, q);
1461 static int be_tx_queues_create(struct be_adapter *adapter)
1463 struct be_queue_info *eq, *q, *cq;
1465 adapter->tx_eq.max_eqd = 0;
1466 adapter->tx_eq.min_eqd = 0;
1467 adapter->tx_eq.cur_eqd = 96;
1468 adapter->tx_eq.enable_aic = false;
1469 /* Alloc Tx Event queue */
1470 eq = &adapter->tx_eq.q;
1471 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1474 /* Ask BE to create Tx Event queue */
1475 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
1477 adapter->base_eq_id = adapter->tx_eq.q.id;
1479 /* Alloc TX eth compl queue */
1480 cq = &adapter->tx_obj.cq;
1481 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1482 sizeof(struct be_eth_tx_compl)))
1485 /* Ask BE to create Tx eth compl queue */
1486 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
1489 /* Alloc TX eth queue */
1490 q = &adapter->tx_obj.q;
1491 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1494 /* Ask BE to create Tx eth queue */
1495 if (be_cmd_txq_create(adapter, q, cq))
1500 be_queue_free(adapter, q);
1502 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1504 be_queue_free(adapter, cq);
1506 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
1508 be_queue_free(adapter, eq);
1512 static void be_rx_queues_destroy(struct be_adapter *adapter)
1514 struct be_queue_info *q;
1516 q = &adapter->rx_obj.q;
1518 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
1520 /* After the rxq is invalidated, wait for a grace time
1521 * of 1ms for all dma to end and the flush compl to arrive
1524 be_rx_q_clean(adapter);
1526 be_queue_free(adapter, q);
1528 q = &adapter->rx_obj.cq;
1530 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1531 be_queue_free(adapter, q);
1533 /* Clear any residual events */
1534 be_eq_clean(adapter, &adapter->rx_eq);
1536 q = &adapter->rx_eq.q;
1538 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1539 be_queue_free(adapter, q);
1542 static int be_rx_queues_create(struct be_adapter *adapter)
1544 struct be_queue_info *eq, *q, *cq;
1547 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1548 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1549 adapter->rx_eq.min_eqd = 0;
1550 adapter->rx_eq.cur_eqd = 0;
1551 adapter->rx_eq.enable_aic = true;
1553 /* Alloc Rx Event queue */
1554 eq = &adapter->rx_eq.q;
1555 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1556 sizeof(struct be_eq_entry));
1560 /* Ask BE to create Rx Event queue */
1561 rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
1565 /* Alloc RX eth compl queue */
1566 cq = &adapter->rx_obj.cq;
1567 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1568 sizeof(struct be_eth_rx_compl));
1572 /* Ask BE to create Rx eth compl queue */
1573 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
1577 /* Alloc RX eth queue */
1578 q = &adapter->rx_obj.q;
1579 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1583 /* Ask BE to create Rx eth queue */
1584 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
1585 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1591 be_queue_free(adapter, q);
1593 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1595 be_queue_free(adapter, cq);
1597 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
1599 be_queue_free(adapter, eq);
1603 /* There are 8 evt ids per func. Retruns the evt id's bit number */
1604 static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1606 return eq_id - adapter->base_eq_id;
1609 static irqreturn_t be_intx(int irq, void *dev)
1611 struct be_adapter *adapter = dev;
1614 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
1615 (adapter->tx_eq.q.id/ 8) * CEV_ISR_SIZE);
1619 event_handle(adapter, &adapter->tx_eq);
1620 event_handle(adapter, &adapter->rx_eq);
1625 static irqreturn_t be_msix_rx(int irq, void *dev)
1627 struct be_adapter *adapter = dev;
1629 event_handle(adapter, &adapter->rx_eq);
1634 static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
1636 struct be_adapter *adapter = dev;
1638 event_handle(adapter, &adapter->tx_eq);
1643 static inline bool do_gro(struct be_adapter *adapter,
1644 struct be_eth_rx_compl *rxcp)
1646 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1647 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1650 drvr_stats(adapter)->be_rxcp_err++;
1652 return (tcp_frame && !err) ? true : false;
1655 int be_poll_rx(struct napi_struct *napi, int budget)
1657 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1658 struct be_adapter *adapter =
1659 container_of(rx_eq, struct be_adapter, rx_eq);
1660 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1661 struct be_eth_rx_compl *rxcp;
1664 adapter->stats.drvr_stats.be_rx_polls++;
1665 for (work_done = 0; work_done < budget; work_done++) {
1666 rxcp = be_rx_compl_get(adapter);
1670 if (do_gro(adapter, rxcp))
1671 be_rx_compl_process_gro(adapter, rxcp);
1673 be_rx_compl_process(adapter, rxcp);
1675 be_rx_compl_reset(rxcp);
1678 /* Refill the queue */
1679 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1680 be_post_rx_frags(adapter);
1683 if (work_done < budget) {
1684 napi_complete(napi);
1685 be_cq_notify(adapter, rx_cq->id, true, work_done);
1687 /* More to be consumed; continue with interrupts disabled */
1688 be_cq_notify(adapter, rx_cq->id, false, work_done);
1693 /* As TX and MCC share the same EQ check for both TX and MCC completions.
1694 * For TX/MCC we don't honour budget; consume everything
1696 static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1698 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1699 struct be_adapter *adapter =
1700 container_of(tx_eq, struct be_adapter, tx_eq);
1701 struct be_queue_info *txq = &adapter->tx_obj.q;
1702 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1703 struct be_eth_tx_compl *txcp;
1704 int tx_compl = 0, mcc_compl, status = 0;
1707 while ((txcp = be_tx_compl_get(tx_cq))) {
1708 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1710 be_tx_compl_process(adapter, end_idx);
1714 mcc_compl = be_process_mcc(adapter, &status);
1716 napi_complete(napi);
1719 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
1720 be_cq_notify(adapter, mcc_obj->cq.id, true, mcc_compl);
1724 be_cq_notify(adapter, adapter->tx_obj.cq.id, true, tx_compl);
1726 /* As Tx wrbs have been freed up, wake up netdev queue if
1727 * it was stopped due to lack of tx wrbs.
1729 if (netif_queue_stopped(adapter->netdev) &&
1730 atomic_read(&txq->used) < txq->len / 2) {
1731 netif_wake_queue(adapter->netdev);
1734 drvr_stats(adapter)->be_tx_events++;
1735 drvr_stats(adapter)->be_tx_compl += tx_compl;
1741 static inline bool be_detect_ue(struct be_adapter *adapter)
1743 u32 online0 = 0, online1 = 0;
1745 pci_read_config_dword(adapter->pdev, PCICFG_ONLINE0, &online0);
1747 pci_read_config_dword(adapter->pdev, PCICFG_ONLINE1, &online1);
1749 if (!online0 || !online1) {
1750 adapter->ue_detected = true;
1751 dev_err(&adapter->pdev->dev,
1752 "UE Detected!! online0=%d online1=%d\n",
1760 void be_dump_ue(struct be_adapter *adapter)
1762 u32 ue_status_lo, ue_status_hi, ue_status_lo_mask, ue_status_hi_mask;
1765 pci_read_config_dword(adapter->pdev,
1766 PCICFG_UE_STATUS_LOW, &ue_status_lo);
1767 pci_read_config_dword(adapter->pdev,
1768 PCICFG_UE_STATUS_HIGH, &ue_status_hi);
1769 pci_read_config_dword(adapter->pdev,
1770 PCICFG_UE_STATUS_LOW_MASK, &ue_status_lo_mask);
1771 pci_read_config_dword(adapter->pdev,
1772 PCICFG_UE_STATUS_HI_MASK, &ue_status_hi_mask);
1774 ue_status_lo = (ue_status_lo & (~ue_status_lo_mask));
1775 ue_status_hi = (ue_status_hi & (~ue_status_hi_mask));
1778 for (i = 0; ue_status_lo; ue_status_lo >>= 1, i++) {
1779 if (ue_status_lo & 1)
1780 dev_err(&adapter->pdev->dev,
1781 "UE: %s bit set\n", ue_status_low_desc[i]);
1785 for (i = 0; ue_status_hi; ue_status_hi >>= 1, i++) {
1786 if (ue_status_hi & 1)
1787 dev_err(&adapter->pdev->dev,
1788 "UE: %s bit set\n", ue_status_hi_desc[i]);
1794 static void be_worker(struct work_struct *work)
1796 struct be_adapter *adapter =
1797 container_of(work, struct be_adapter, work.work);
1799 if (!adapter->stats_ioctl_sent)
1800 be_cmd_get_stats(adapter, &adapter->stats.cmd);
1803 be_rx_eqd_update(adapter);
1805 be_tx_rate_update(adapter);
1806 be_rx_rate_update(adapter);
1808 if (adapter->rx_post_starved) {
1809 adapter->rx_post_starved = false;
1810 be_post_rx_frags(adapter);
1812 if (!adapter->ue_detected) {
1813 if (be_detect_ue(adapter))
1814 be_dump_ue(adapter);
1817 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1820 static void be_msix_disable(struct be_adapter *adapter)
1822 if (adapter->msix_enabled) {
1823 pci_disable_msix(adapter->pdev);
1824 adapter->msix_enabled = false;
1828 static void be_msix_enable(struct be_adapter *adapter)
1832 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1833 adapter->msix_entries[i].entry = i;
1835 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1836 BE_NUM_MSIX_VECTORS);
1838 adapter->msix_enabled = true;
1841 static void be_sriov_enable(struct be_adapter *adapter)
1843 be_check_sriov_fn_type(adapter);
1844 #ifdef CONFIG_PCI_IOV
1845 if (be_physfn(adapter) && num_vfs) {
1848 status = pci_enable_sriov(adapter->pdev, num_vfs);
1849 adapter->sriov_enabled = status ? false : true;
1854 static void be_sriov_disable(struct be_adapter *adapter)
1856 #ifdef CONFIG_PCI_IOV
1857 if (adapter->sriov_enabled) {
1858 pci_disable_sriov(adapter->pdev);
1859 adapter->sriov_enabled = false;
1864 static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1866 return adapter->msix_entries[
1867 be_evt_bit_get(adapter, eq_id)].vector;
1870 static int be_request_irq(struct be_adapter *adapter,
1871 struct be_eq_obj *eq_obj,
1872 void *handler, char *desc)
1874 struct net_device *netdev = adapter->netdev;
1877 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1878 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1879 return request_irq(vec, handler, 0, eq_obj->desc, adapter);
1882 static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
1884 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1885 free_irq(vec, adapter);
1888 static int be_msix_register(struct be_adapter *adapter)
1892 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
1896 status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
1903 be_free_irq(adapter, &adapter->tx_eq);
1905 dev_warn(&adapter->pdev->dev,
1906 "MSIX Request IRQ failed - err %d\n", status);
1907 pci_disable_msix(adapter->pdev);
1908 adapter->msix_enabled = false;
1912 static int be_irq_register(struct be_adapter *adapter)
1914 struct net_device *netdev = adapter->netdev;
1917 if (adapter->msix_enabled) {
1918 status = be_msix_register(adapter);
1921 /* INTx is not supported for VF */
1922 if (!be_physfn(adapter))
1927 netdev->irq = adapter->pdev->irq;
1928 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1931 dev_err(&adapter->pdev->dev,
1932 "INTx request IRQ failed - err %d\n", status);
1936 adapter->isr_registered = true;
1940 static void be_irq_unregister(struct be_adapter *adapter)
1942 struct net_device *netdev = adapter->netdev;
1944 if (!adapter->isr_registered)
1948 if (!adapter->msix_enabled) {
1949 free_irq(netdev->irq, adapter);
1954 be_free_irq(adapter, &adapter->tx_eq);
1955 be_free_irq(adapter, &adapter->rx_eq);
1957 adapter->isr_registered = false;
1960 static int be_close(struct net_device *netdev)
1962 struct be_adapter *adapter = netdev_priv(netdev);
1963 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1964 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1967 cancel_delayed_work_sync(&adapter->work);
1969 be_async_mcc_disable(adapter);
1971 netif_stop_queue(netdev);
1972 netif_carrier_off(netdev);
1973 adapter->link_up = false;
1975 be_intr_set(adapter, false);
1977 if (adapter->msix_enabled) {
1978 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1979 synchronize_irq(vec);
1980 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1981 synchronize_irq(vec);
1983 synchronize_irq(netdev->irq);
1985 be_irq_unregister(adapter);
1987 napi_disable(&rx_eq->napi);
1988 napi_disable(&tx_eq->napi);
1990 /* Wait for all pending tx completions to arrive so that
1991 * all tx skbs are freed.
1993 be_tx_compl_clean(adapter);
1998 static int be_open(struct net_device *netdev)
2000 struct be_adapter *adapter = netdev_priv(netdev);
2001 struct be_eq_obj *rx_eq = &adapter->rx_eq;
2002 struct be_eq_obj *tx_eq = &adapter->tx_eq;
2008 /* First time posting */
2009 be_post_rx_frags(adapter);
2011 napi_enable(&rx_eq->napi);
2012 napi_enable(&tx_eq->napi);
2014 be_irq_register(adapter);
2016 be_intr_set(adapter, true);
2018 /* The evt queues are created in unarmed state; arm them */
2019 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
2020 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
2022 /* Rx compl queue may be in unarmed state; rearm it */
2023 be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
2025 /* Now that interrupts are on we can process async mcc */
2026 be_async_mcc_enable(adapter);
2028 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
2030 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
2034 be_link_status_update(adapter, link_up);
2036 if (be_physfn(adapter)) {
2037 status = be_vid_config(adapter, false, 0);
2041 status = be_cmd_set_flow_control(adapter,
2042 adapter->tx_fc, adapter->rx_fc);
2049 be_close(adapter->netdev);
2053 static int be_setup_wol(struct be_adapter *adapter, bool enable)
2055 struct be_dma_mem cmd;
2059 memset(mac, 0, ETH_ALEN);
2061 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
2062 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
2065 memset(cmd.va, 0, cmd.size);
2068 status = pci_write_config_dword(adapter->pdev,
2069 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
2071 dev_err(&adapter->pdev->dev,
2072 "Could not enable Wake-on-lan\n");
2073 pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
2077 status = be_cmd_enable_magic_wol(adapter,
2078 adapter->netdev->dev_addr, &cmd);
2079 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
2080 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
2082 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
2083 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
2084 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
2087 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
2092 * Generate a seed MAC address from the PF MAC Address using jhash.
2093 * MAC Address for VFs are assigned incrementally starting from the seed.
2094 * These addresses are programmed in the ASIC by the PF and the VF driver
2095 * queries for the MAC address during its probe.
2097 static inline int be_vf_eth_addr_config(struct be_adapter *adapter)
2103 be_vf_eth_addr_generate(adapter, mac);
2105 for (vf = 0; vf < num_vfs; vf++) {
2106 status = be_cmd_pmac_add(adapter, mac,
2107 adapter->vf_cfg[vf].vf_if_handle,
2108 &adapter->vf_cfg[vf].vf_pmac_id);
2110 dev_err(&adapter->pdev->dev,
2111 "Mac address add failed for VF %d\n", vf);
2113 memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
2120 static inline void be_vf_eth_addr_rem(struct be_adapter *adapter)
2124 for (vf = 0; vf < num_vfs; vf++) {
2125 if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
2126 be_cmd_pmac_del(adapter,
2127 adapter->vf_cfg[vf].vf_if_handle,
2128 adapter->vf_cfg[vf].vf_pmac_id);
2132 static int be_setup(struct be_adapter *adapter)
2134 struct net_device *netdev = adapter->netdev;
2135 u32 cap_flags, en_flags, vf = 0;
2139 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST;
2141 if (be_physfn(adapter)) {
2142 cap_flags |= BE_IF_FLAGS_MCAST_PROMISCUOUS |
2143 BE_IF_FLAGS_PROMISCUOUS |
2144 BE_IF_FLAGS_PASS_L3L4_ERRORS;
2145 en_flags |= BE_IF_FLAGS_PASS_L3L4_ERRORS;
2148 status = be_cmd_if_create(adapter, cap_flags, en_flags,
2149 netdev->dev_addr, false/* pmac_invalid */,
2150 &adapter->if_handle, &adapter->pmac_id, 0);
2154 if (be_physfn(adapter)) {
2155 while (vf < num_vfs) {
2156 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED
2157 | BE_IF_FLAGS_BROADCAST;
2158 status = be_cmd_if_create(adapter, cap_flags, en_flags,
2160 &adapter->vf_cfg[vf].vf_if_handle,
2163 dev_err(&adapter->pdev->dev,
2164 "Interface Create failed for VF %d\n", vf);
2167 adapter->vf_cfg[vf].vf_pmac_id = BE_INVALID_PMAC_ID;
2170 } else if (!be_physfn(adapter)) {
2171 status = be_cmd_mac_addr_query(adapter, mac,
2172 MAC_ADDRESS_TYPE_NETWORK, false, adapter->if_handle);
2174 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2175 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2179 status = be_tx_queues_create(adapter);
2183 status = be_rx_queues_create(adapter);
2187 status = be_mcc_queues_create(adapter);
2191 if (be_physfn(adapter)) {
2192 status = be_vf_eth_addr_config(adapter);
2197 adapter->link_speed = -1;
2202 if (be_physfn(adapter))
2203 be_vf_eth_addr_rem(adapter);
2204 be_mcc_queues_destroy(adapter);
2206 be_rx_queues_destroy(adapter);
2208 be_tx_queues_destroy(adapter);
2210 for (vf = 0; vf < num_vfs; vf++)
2211 if (adapter->vf_cfg[vf].vf_if_handle)
2212 be_cmd_if_destroy(adapter,
2213 adapter->vf_cfg[vf].vf_if_handle);
2214 be_cmd_if_destroy(adapter, adapter->if_handle);
2219 static int be_clear(struct be_adapter *adapter)
2221 if (be_physfn(adapter))
2222 be_vf_eth_addr_rem(adapter);
2224 be_mcc_queues_destroy(adapter);
2225 be_rx_queues_destroy(adapter);
2226 be_tx_queues_destroy(adapter);
2228 be_cmd_if_destroy(adapter, adapter->if_handle);
2230 /* tell fw we're done with firing cmds */
2231 be_cmd_fw_clean(adapter);
2236 #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
2237 char flash_cookie[2][16] = {"*** SE FLAS",
2238 "H DIRECTORY *** "};
2240 static bool be_flash_redboot(struct be_adapter *adapter,
2241 const u8 *p, u32 img_start, int image_size,
2248 crc_offset = hdr_size + img_start + image_size - 4;
2252 status = be_cmd_get_flash_crc(adapter, flashed_crc,
2255 dev_err(&adapter->pdev->dev,
2256 "could not get crc from flash, not flashing redboot\n");
2260 /*update redboot only if crc does not match*/
2261 if (!memcmp(flashed_crc, p, 4))
2267 static int be_flash_data(struct be_adapter *adapter,
2268 const struct firmware *fw,
2269 struct be_dma_mem *flash_cmd, int num_of_images)
2272 int status = 0, i, filehdr_size = 0;
2273 u32 total_bytes = 0, flash_op;
2275 const u8 *p = fw->data;
2276 struct be_cmd_write_flashrom *req = flash_cmd->va;
2277 struct flash_comp *pflashcomp;
2280 struct flash_comp gen3_flash_types[9] = {
2281 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
2282 FLASH_IMAGE_MAX_SIZE_g3},
2283 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
2284 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},
2285 { FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,
2286 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2287 { FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,
2288 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2289 { FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,
2290 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2291 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,
2292 FLASH_IMAGE_MAX_SIZE_g3},
2293 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
2294 FLASH_IMAGE_MAX_SIZE_g3},
2295 { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
2296 FLASH_IMAGE_MAX_SIZE_g3},
2297 { FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW,
2298 FLASH_NCSI_IMAGE_MAX_SIZE_g3}
2300 struct flash_comp gen2_flash_types[8] = {
2301 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
2302 FLASH_IMAGE_MAX_SIZE_g2},
2303 { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
2304 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},
2305 { FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,
2306 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2307 { FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,
2308 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2309 { FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,
2310 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2311 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,
2312 FLASH_IMAGE_MAX_SIZE_g2},
2313 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,
2314 FLASH_IMAGE_MAX_SIZE_g2},
2315 { FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,
2316 FLASH_IMAGE_MAX_SIZE_g2}
2319 if (adapter->generation == BE_GEN3) {
2320 pflashcomp = gen3_flash_types;
2321 filehdr_size = sizeof(struct flash_file_hdr_g3);
2324 pflashcomp = gen2_flash_types;
2325 filehdr_size = sizeof(struct flash_file_hdr_g2);
2328 for (i = 0; i < num_comp; i++) {
2329 if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &&
2330 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
2332 if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
2333 (!be_flash_redboot(adapter, fw->data,
2334 pflashcomp[i].offset, pflashcomp[i].size,
2338 p += filehdr_size + pflashcomp[i].offset
2339 + (num_of_images * sizeof(struct image_hdr));
2340 if (p + pflashcomp[i].size > fw->data + fw->size)
2342 total_bytes = pflashcomp[i].size;
2343 while (total_bytes) {
2344 if (total_bytes > 32*1024)
2345 num_bytes = 32*1024;
2347 num_bytes = total_bytes;
2348 total_bytes -= num_bytes;
2351 flash_op = FLASHROM_OPER_FLASH;
2353 flash_op = FLASHROM_OPER_SAVE;
2354 memcpy(req->params.data_buf, p, num_bytes);
2356 status = be_cmd_write_flashrom(adapter, flash_cmd,
2357 pflashcomp[i].optype, flash_op, num_bytes);
2359 dev_err(&adapter->pdev->dev,
2360 "cmd to write to flash rom failed.\n");
2369 static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
2373 if (fhdr->build[0] == '3')
2375 else if (fhdr->build[0] == '2')
2381 int be_load_fw(struct be_adapter *adapter, u8 *func)
2383 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
2384 const struct firmware *fw;
2385 struct flash_file_hdr_g2 *fhdr;
2386 struct flash_file_hdr_g3 *fhdr3;
2387 struct image_hdr *img_hdr_ptr = NULL;
2388 struct be_dma_mem flash_cmd;
2389 int status, i = 0, num_imgs = 0;
2392 strcpy(fw_file, func);
2394 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
2399 fhdr = (struct flash_file_hdr_g2 *) p;
2400 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
2402 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
2403 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
2405 if (!flash_cmd.va) {
2407 dev_err(&adapter->pdev->dev,
2408 "Memory allocation failure while flashing\n");
2412 if ((adapter->generation == BE_GEN3) &&
2413 (get_ufigen_type(fhdr) == BE_GEN3)) {
2414 fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
2415 num_imgs = le32_to_cpu(fhdr3->num_imgs);
2416 for (i = 0; i < num_imgs; i++) {
2417 img_hdr_ptr = (struct image_hdr *) (fw->data +
2418 (sizeof(struct flash_file_hdr_g3) +
2419 i * sizeof(struct image_hdr)));
2420 if (le32_to_cpu(img_hdr_ptr->imageid) == 1)
2421 status = be_flash_data(adapter, fw, &flash_cmd,
2424 } else if ((adapter->generation == BE_GEN2) &&
2425 (get_ufigen_type(fhdr) == BE_GEN2)) {
2426 status = be_flash_data(adapter, fw, &flash_cmd, 0);
2428 dev_err(&adapter->pdev->dev,
2429 "UFI and Interface are not compatible for flashing\n");
2433 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
2436 dev_err(&adapter->pdev->dev, "Firmware load error\n");
2440 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
2443 release_firmware(fw);
2447 static struct net_device_ops be_netdev_ops = {
2448 .ndo_open = be_open,
2449 .ndo_stop = be_close,
2450 .ndo_start_xmit = be_xmit,
2451 .ndo_set_rx_mode = be_set_multicast_list,
2452 .ndo_set_mac_address = be_mac_addr_set,
2453 .ndo_change_mtu = be_change_mtu,
2454 .ndo_validate_addr = eth_validate_addr,
2455 .ndo_vlan_rx_register = be_vlan_register,
2456 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2457 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
2458 .ndo_set_vf_mac = be_set_vf_mac,
2459 .ndo_set_vf_vlan = be_set_vf_vlan,
2460 .ndo_set_vf_tx_rate = be_set_vf_tx_rate,
2461 .ndo_get_vf_config = be_get_vf_config
2464 static void be_netdev_init(struct net_device *netdev)
2466 struct be_adapter *adapter = netdev_priv(netdev);
2468 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
2469 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
2470 NETIF_F_GRO | NETIF_F_TSO6;
2472 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
2474 netdev->flags |= IFF_MULTICAST;
2476 adapter->rx_csum = true;
2478 /* Default settings for Rx and Tx flow control */
2479 adapter->rx_fc = true;
2480 adapter->tx_fc = true;
2482 netif_set_gso_max_size(netdev, 65535);
2484 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2486 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2488 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
2490 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
2493 netif_carrier_off(netdev);
2494 netif_stop_queue(netdev);
2497 static void be_unmap_pci_bars(struct be_adapter *adapter)
2500 iounmap(adapter->csr);
2502 iounmap(adapter->db);
2503 if (adapter->pcicfg && be_physfn(adapter))
2504 iounmap(adapter->pcicfg);
2507 static int be_map_pci_bars(struct be_adapter *adapter)
2510 int pcicfg_reg, db_reg;
2512 if (be_physfn(adapter)) {
2513 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2514 pci_resource_len(adapter->pdev, 2));
2517 adapter->csr = addr;
2520 if (adapter->generation == BE_GEN2) {
2525 if (be_physfn(adapter))
2530 addr = ioremap_nocache(pci_resource_start(adapter->pdev, db_reg),
2531 pci_resource_len(adapter->pdev, db_reg));
2536 if (be_physfn(adapter)) {
2537 addr = ioremap_nocache(
2538 pci_resource_start(adapter->pdev, pcicfg_reg),
2539 pci_resource_len(adapter->pdev, pcicfg_reg));
2542 adapter->pcicfg = addr;
2544 adapter->pcicfg = adapter->db + SRIOV_VF_PCICFG_OFFSET;
2548 be_unmap_pci_bars(adapter);
2553 static void be_ctrl_cleanup(struct be_adapter *adapter)
2555 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
2557 be_unmap_pci_bars(adapter);
2560 pci_free_consistent(adapter->pdev, mem->size,
2563 mem = &adapter->mc_cmd_mem;
2565 pci_free_consistent(adapter->pdev, mem->size,
2569 static int be_ctrl_init(struct be_adapter *adapter)
2571 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
2572 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
2573 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
2576 status = be_map_pci_bars(adapter);
2580 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2581 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
2582 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
2583 if (!mbox_mem_alloc->va) {
2585 goto unmap_pci_bars;
2588 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2589 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2590 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2591 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
2593 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
2594 mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
2596 if (mc_cmd_mem->va == NULL) {
2600 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
2602 spin_lock_init(&adapter->mbox_lock);
2603 spin_lock_init(&adapter->mcc_lock);
2604 spin_lock_init(&adapter->mcc_cq_lock);
2606 init_completion(&adapter->flash_compl);
2607 pci_save_state(adapter->pdev);
2611 pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
2612 mbox_mem_alloc->va, mbox_mem_alloc->dma);
2615 be_unmap_pci_bars(adapter);
2621 static void be_stats_cleanup(struct be_adapter *adapter)
2623 struct be_stats_obj *stats = &adapter->stats;
2624 struct be_dma_mem *cmd = &stats->cmd;
2627 pci_free_consistent(adapter->pdev, cmd->size,
2631 static int be_stats_init(struct be_adapter *adapter)
2633 struct be_stats_obj *stats = &adapter->stats;
2634 struct be_dma_mem *cmd = &stats->cmd;
2636 cmd->size = sizeof(struct be_cmd_req_get_stats);
2637 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2638 if (cmd->va == NULL)
2640 memset(cmd->va, 0, cmd->size);
2644 static void __devexit be_remove(struct pci_dev *pdev)
2646 struct be_adapter *adapter = pci_get_drvdata(pdev);
2651 unregister_netdev(adapter->netdev);
2655 be_stats_cleanup(adapter);
2657 be_ctrl_cleanup(adapter);
2659 be_sriov_disable(adapter);
2661 be_msix_disable(adapter);
2663 pci_set_drvdata(pdev, NULL);
2664 pci_release_regions(pdev);
2665 pci_disable_device(pdev);
2667 free_netdev(adapter->netdev);
2670 static int be_get_config(struct be_adapter *adapter)
2675 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
2679 status = be_cmd_query_fw_cfg(adapter,
2680 &adapter->port_num, &adapter->function_mode);
2684 memset(mac, 0, ETH_ALEN);
2686 if (be_physfn(adapter)) {
2687 status = be_cmd_mac_addr_query(adapter, mac,
2688 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
2693 if (!is_valid_ether_addr(mac))
2694 return -EADDRNOTAVAIL;
2696 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2697 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2700 if (adapter->function_mode & 0x400)
2701 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/4;
2703 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
2708 static int __devinit be_probe(struct pci_dev *pdev,
2709 const struct pci_device_id *pdev_id)
2712 struct be_adapter *adapter;
2713 struct net_device *netdev;
2716 status = pci_enable_device(pdev);
2720 status = pci_request_regions(pdev, DRV_NAME);
2723 pci_set_master(pdev);
2725 netdev = alloc_etherdev(sizeof(struct be_adapter));
2726 if (netdev == NULL) {
2730 adapter = netdev_priv(netdev);
2732 switch (pdev->device) {
2735 adapter->generation = BE_GEN2;
2739 adapter->generation = BE_GEN3;
2742 adapter->generation = 0;
2745 adapter->pdev = pdev;
2746 pci_set_drvdata(pdev, adapter);
2747 adapter->netdev = netdev;
2748 be_netdev_init(netdev);
2749 SET_NETDEV_DEV(netdev, &pdev->dev);
2751 be_msix_enable(adapter);
2753 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
2755 netdev->features |= NETIF_F_HIGHDMA;
2757 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2759 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2764 be_sriov_enable(adapter);
2766 status = be_ctrl_init(adapter);
2770 /* sync up with fw's ready state */
2771 if (be_physfn(adapter)) {
2772 status = be_cmd_POST(adapter);
2777 /* tell fw we're ready to fire cmds */
2778 status = be_cmd_fw_init(adapter);
2782 if (be_physfn(adapter)) {
2783 status = be_cmd_reset_function(adapter);
2788 status = be_stats_init(adapter);
2792 status = be_get_config(adapter);
2796 INIT_DELAYED_WORK(&adapter->work, be_worker);
2798 status = be_setup(adapter);
2802 status = register_netdev(netdev);
2806 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
2812 be_stats_cleanup(adapter);
2814 be_ctrl_cleanup(adapter);
2816 be_msix_disable(adapter);
2817 be_sriov_disable(adapter);
2818 free_netdev(adapter->netdev);
2819 pci_set_drvdata(pdev, NULL);
2821 pci_release_regions(pdev);
2823 pci_disable_device(pdev);
2825 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
2829 static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2831 struct be_adapter *adapter = pci_get_drvdata(pdev);
2832 struct net_device *netdev = adapter->netdev;
2835 be_setup_wol(adapter, true);
2837 netif_device_detach(netdev);
2838 if (netif_running(netdev)) {
2843 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
2846 pci_save_state(pdev);
2847 pci_disable_device(pdev);
2848 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2852 static int be_resume(struct pci_dev *pdev)
2855 struct be_adapter *adapter = pci_get_drvdata(pdev);
2856 struct net_device *netdev = adapter->netdev;
2858 netif_device_detach(netdev);
2860 status = pci_enable_device(pdev);
2864 pci_set_power_state(pdev, 0);
2865 pci_restore_state(pdev);
2867 /* tell fw we're ready to fire cmds */
2868 status = be_cmd_fw_init(adapter);
2873 if (netif_running(netdev)) {
2878 netif_device_attach(netdev);
2881 be_setup_wol(adapter, false);
2886 * An FLR will stop BE from DMAing any data.
2888 static void be_shutdown(struct pci_dev *pdev)
2890 struct be_adapter *adapter = pci_get_drvdata(pdev);
2891 struct net_device *netdev = adapter->netdev;
2893 netif_device_detach(netdev);
2895 be_cmd_reset_function(adapter);
2898 be_setup_wol(adapter, true);
2900 pci_disable_device(pdev);
2903 static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
2904 pci_channel_state_t state)
2906 struct be_adapter *adapter = pci_get_drvdata(pdev);
2907 struct net_device *netdev = adapter->netdev;
2909 dev_err(&adapter->pdev->dev, "EEH error detected\n");
2911 adapter->eeh_err = true;
2913 netif_device_detach(netdev);
2915 if (netif_running(netdev)) {
2922 if (state == pci_channel_io_perm_failure)
2923 return PCI_ERS_RESULT_DISCONNECT;
2925 pci_disable_device(pdev);
2927 return PCI_ERS_RESULT_NEED_RESET;
2930 static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
2932 struct be_adapter *adapter = pci_get_drvdata(pdev);
2935 dev_info(&adapter->pdev->dev, "EEH reset\n");
2936 adapter->eeh_err = false;
2938 status = pci_enable_device(pdev);
2940 return PCI_ERS_RESULT_DISCONNECT;
2942 pci_set_master(pdev);
2943 pci_set_power_state(pdev, 0);
2944 pci_restore_state(pdev);
2946 /* Check if card is ok and fw is ready */
2947 status = be_cmd_POST(adapter);
2949 return PCI_ERS_RESULT_DISCONNECT;
2951 return PCI_ERS_RESULT_RECOVERED;
2954 static void be_eeh_resume(struct pci_dev *pdev)
2957 struct be_adapter *adapter = pci_get_drvdata(pdev);
2958 struct net_device *netdev = adapter->netdev;
2960 dev_info(&adapter->pdev->dev, "EEH resume\n");
2962 pci_save_state(pdev);
2964 /* tell fw we're ready to fire cmds */
2965 status = be_cmd_fw_init(adapter);
2969 status = be_setup(adapter);
2973 if (netif_running(netdev)) {
2974 status = be_open(netdev);
2978 netif_device_attach(netdev);
2981 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
2984 static struct pci_error_handlers be_eeh_handlers = {
2985 .error_detected = be_eeh_err_detected,
2986 .slot_reset = be_eeh_reset,
2987 .resume = be_eeh_resume,
2990 static struct pci_driver be_driver = {
2992 .id_table = be_dev_ids,
2994 .remove = be_remove,
2995 .suspend = be_suspend,
2996 .resume = be_resume,
2997 .shutdown = be_shutdown,
2998 .err_handler = &be_eeh_handlers
3001 static int __init be_init_module(void)
3003 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
3004 rx_frag_size != 2048) {
3005 printk(KERN_WARNING DRV_NAME
3006 " : Module param rx_frag_size must be 2048/4096/8192."
3008 rx_frag_size = 2048;
3012 printk(KERN_WARNING DRV_NAME
3013 " : Module param num_vfs must not be greater than 32."
3018 return pci_register_driver(&be_driver);
3020 module_init(be_init_module);
3022 static void __exit be_exit_module(void)
3024 pci_unregister_driver(&be_driver);
3026 module_exit(be_exit_module);