3 * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <linux/err.h>
27 #include <linux/mtd/st_smi.h>
30 #include <asm/arch/hardware.h>
32 #if !defined(CONFIG_SYS_NO_FLASH)
34 static struct smi_regs *const smicntl =
35 (struct smi_regs * const)CONFIG_SYS_SMI_BASE;
36 static ulong bank_base[CONFIG_SYS_MAX_FLASH_BANKS] =
37 CONFIG_SYS_FLASH_ADDR_BASE;
38 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
40 #define ST_M25Pxx_ID 0x00002020
42 static struct flash_dev flash_ids[] = {
43 {0x10, 0x10000, 2}, /* 64K Byte */
44 {0x11, 0x20000, 4}, /* 128K Byte */
45 {0x12, 0x40000, 4}, /* 256K Byte */
46 {0x13, 0x80000, 8}, /* 512K Byte */
47 {0x14, 0x100000, 16}, /* 1M Byte */
48 {0x15, 0x200000, 32}, /* 2M Byte */
49 {0x16, 0x400000, 64}, /* 4M Byte */
50 {0x17, 0x800000, 128}, /* 8M Byte */
51 {0x18, 0x1000000, 64}, /* 16M Byte */
56 * smi_wait_xfer_finish - Wait until TFF is set in status register
57 * @timeout: timeout in milliseconds
59 * Wait until TFF is set in status register
61 static void smi_wait_xfer_finish(int timeout)
64 if (readl(&smicntl->smi_sr) & TFF)
71 * smi_read_id - Read flash id
72 * @info: flash_info structure pointer
73 * @banknum: bank number
75 * Read the flash id present at bank #banknum
77 static unsigned int smi_read_id(flash_info_t *info, int banknum)
81 writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1);
82 writel(READ_ID, &smicntl->smi_tr);
83 writel((banknum << BANKSEL_SHIFT) | SEND | TX_LEN_1 | RX_LEN_3,
86 smi_wait_xfer_finish(XFER_FINISH_TOUT);
88 value = (readl(&smicntl->smi_rr) & 0x00FFFFFF);
90 writel(readl(&smicntl->smi_sr) & ~TFF, &smicntl->smi_sr);
91 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
97 * flash_get_size - Detect the SMI flash by reading the ID.
98 * @base: Base address of the flash area bank #banknum
99 * @banknum: Bank number
101 * Detect the SMI flash by reading the ID. Initializes the flash_info structure
102 * with size, sector count etc.
104 static ulong flash_get_size(ulong base, int banknum)
106 flash_info_t *info = &flash_info[banknum];
107 struct flash_dev *dev;
109 unsigned int density;
112 value = smi_read_id(info, banknum);
113 density = (value >> 16) & 0xff;
115 for (i = 0, dev = &flash_ids[0]; dev->density != 0x0;
116 i++, dev = &flash_ids[i]) {
117 if (dev->density == density) {
118 info->size = dev->size;
119 info->sector_count = dev->sector_count;
124 if (dev->density == 0x0)
127 info->flash_id = value & 0xffff;
128 info->start[0] = base;
134 * smi_read_sr - Read status register of SMI
137 * This routine will get the status register of the flash chip present at the
140 static unsigned int smi_read_sr(int bank)
144 /* store the CTRL REG1 state */
145 ctrlreg1 = readl(&smicntl->smi_cr1);
147 /* Program SMI in HW Mode */
148 writel(readl(&smicntl->smi_cr1) & ~(SW_MODE | WB_MODE),
151 /* Performing a RSR instruction in HW mode */
152 writel((bank << BANKSEL_SHIFT) | RD_STATUS_REG, &smicntl->smi_cr2);
154 smi_wait_xfer_finish(XFER_FINISH_TOUT);
156 /* Restore the CTRL REG1 state */
157 writel(ctrlreg1, &smicntl->smi_cr1);
159 return readl(&smicntl->smi_sr);
163 * smi_wait_till_ready - Wait till last operation is over.
164 * @bank: bank number shifted.
165 * @timeout: timeout in milliseconds.
167 * This routine checks for WIP(write in progress)bit in Status register(SMSR-b0)
168 * The routine checks for #timeout loops, each at interval of 1 milli-second.
169 * If successful the routine returns 0.
171 static int smi_wait_till_ready(int bank, int timeout)
176 /* One chip guarantees max 5 msec wait here after page writes,
177 but potentially three seconds (!) after page erase. */
178 for (count = 0; count < timeout; count++) {
180 sr = smi_read_sr(bank);
183 else if (!(sr & WIP_BIT))
186 /* Try again after 1m-sec */
189 printf("SMI controller is still in wait, timeout=%d\n", timeout);
194 * smi_write_enable - Enable the flash to do write operation
197 * Set write enable latch with Write Enable command.
198 * Returns negative if error occurred.
200 static int smi_write_enable(int bank)
203 int timeout = WMODE_TOUT;
205 /* Store the CTRL REG1 state */
206 ctrlreg1 = readl(&smicntl->smi_cr1);
208 /* Program SMI in H/W Mode */
209 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
211 /* Give the Flash, Write Enable command */
212 writel((bank << BANKSEL_SHIFT) | WE, &smicntl->smi_cr2);
214 smi_wait_xfer_finish(XFER_FINISH_TOUT);
216 /* Restore the CTRL REG1 state */
217 writel(ctrlreg1, &smicntl->smi_cr1);
220 if (smi_read_sr(bank) & (1 << (bank + WM_SHIFT)))
232 * smi_init - SMI initialization routine
234 * SMI initialization routine. Sets SMI control register1.
238 /* Setting the fast mode values. SMI working at 166/4 = 41.5 MHz */
239 writel(HOLD1 | FAST_MODE | BANK_EN | DSEL_TIME | PRESCAL4,
244 * smi_sector_erase - Erase flash sector
245 * @info: flash_info structure pointer
246 * @sector: sector number
248 * Set write enable latch with Write Enable command.
249 * Returns negative if error occurred.
251 static int smi_sector_erase(flash_info_t *info, unsigned int sector)
254 unsigned int sect_add;
255 unsigned int instruction;
257 switch (info->start[0]) {
274 sect_add = sector * (info->size / info->sector_count);
275 instruction = ((sect_add >> 8) & 0x0000FF00) | SECTOR_ERASE;
277 writel(readl(&smicntl->smi_sr) & ~(ERF1 | ERF2), &smicntl->smi_sr);
279 if (info->flash_id == ST_M25Pxx_ID) {
280 /* Wait until finished previous write command. */
281 if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT))
284 /* Send write enable, before erase commands. */
285 if (smi_write_enable(bank))
288 /* Put SMI in SW mode */
289 writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1);
291 /* Send Sector Erase command in SW Mode */
292 writel(instruction, &smicntl->smi_tr);
293 writel((bank << BANKSEL_SHIFT) | SEND | TX_LEN_4,
295 smi_wait_xfer_finish(XFER_FINISH_TOUT);
297 if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT))
300 /* Put SMI in HW mode */
301 writel(readl(&smicntl->smi_cr1) & ~SW_MODE,
306 /* Put SMI in HW mode */
307 writel(readl(&smicntl->smi_cr1) & ~SW_MODE,
314 * smi_write - Write to SMI flash
315 * @src_addr: source buffer
316 * @dst_addr: destination buffer
317 * @length: length to write in words
318 * @bank: bank base address
322 static int smi_write(unsigned int *src_addr, unsigned int *dst_addr,
323 unsigned int length, ulong bank_addr)
344 if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT))
347 /* Set SMI in Hardware Mode */
348 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
350 if (smi_write_enable(banknum))
353 /* Perform the write command */
355 if (((ulong) (dst_addr) % SFLASH_PAGE_SIZE) == 0) {
356 if (smi_wait_till_ready(banknum,
357 CONFIG_SYS_FLASH_WRITE_TOUT))
360 if (smi_write_enable(banknum))
364 *dst_addr++ = *src_addr++;
366 if ((readl(&smicntl->smi_sr) & (ERF1 | ERF2)))
370 if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT))
373 writel(readl(&smicntl->smi_sr) & ~(WCF), &smicntl->smi_sr);
379 * write_buff - Write to SMI flash
380 * @info: flash info structure
381 * @src: source buffer
382 * @dest_addr: destination buffer
383 * @length: length to write in words
387 int write_buff(flash_info_t *info, uchar *src, ulong dest_addr, ulong length)
389 return smi_write((unsigned int *)src, (unsigned int *)dest_addr,
390 (length + 3) / 4, info->start[0]);
394 * flash_init - SMI flash initialization
396 * SMI flash initialization
398 unsigned long flash_init(void)
400 unsigned long size = 0;
405 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
406 flash_info[i].flash_id = FLASH_UNKNOWN;
407 size += flash_info[i].size = flash_get_size(bank_base[i], i);
410 for (j = 0; j < CONFIG_SYS_MAX_FLASH_BANKS; j++) {
411 for (i = 1; i < flash_info[j].sector_count; i++)
412 flash_info[j].start[i] =
413 flash_info[j].start[i - 1] +
414 flash_info->size / flash_info->sector_count;
422 * flash_print_info - Print SMI flash information
424 * Print SMI flash information
426 void flash_print_info(flash_info_t *info)
429 if (info->flash_id == FLASH_UNKNOWN) {
430 puts("missing or unknown FLASH type\n");
433 printf(" Size: %ld MB in %d Sectors\n",
434 info->size >> 20, info->sector_count);
436 puts(" Sector Start Addresses:");
437 for (i = 0; i < info->sector_count; ++i) {
438 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
444 * Check if whole sector is erased
446 size = (info->size) / (info->sector_count);
447 flash = (u32 *) info->start[i];
448 size = size / sizeof(int);
450 while ((size--) && (*flash++ == ~0))
464 erased ? " E" : " ", info->protect[i] ? "RO " : " ");
469 info->start[i], info->protect[i] ? " (RO) " : " ");
477 * flash_erase - Erase SMI flash
481 int flash_erase(flash_info_t *info, int s_first, int s_last)
487 if (info->flash_id != ST_M25Pxx_ID) {
488 puts("Can't erase unknown flash type - aborted\n");
492 if ((s_first < 0) || (s_first > s_last)) {
493 puts("- no sectors to erase\n");
497 for (sect = s_first; sect <= s_last; ++sect) {
498 if (info->protect[sect])
502 printf("- Warning: %d protected sectors will not be erased!\n",
508 for (sect = s_first; sect <= s_last; sect++) {
509 if (info->protect[sect] == 0) {
510 if (smi_sector_erase(info, sect))