3 * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <linux/err.h>
27 #include <linux/mtd/st_smi.h>
30 #include <asm/arch/hardware.h>
32 #if !defined(CONFIG_SYS_NO_FLASH)
34 static struct smi_regs *const smicntl =
35 (struct smi_regs * const)CONFIG_SYS_SMI_BASE;
36 static ulong bank_base[CONFIG_SYS_MAX_FLASH_BANKS] =
37 CONFIG_SYS_FLASH_ADDR_BASE;
38 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
40 static struct flash_dev flash_ids[] = {
41 {0x10, 0x10000, 2}, /* 64K Byte */
42 {0x11, 0x20000, 4}, /* 128K Byte */
43 {0x12, 0x40000, 4}, /* 256K Byte */
44 {0x13, 0x80000, 8}, /* 512K Byte */
45 {0x14, 0x100000, 16}, /* 1M Byte */
46 {0x15, 0x200000, 32}, /* 2M Byte */
47 {0x16, 0x400000, 64}, /* 4M Byte */
48 {0x17, 0x800000, 128}, /* 8M Byte */
49 {0x18, 0x1000000, 64}, /* 16M Byte */
54 * smi_wait_xfer_finish - Wait until TFF is set in status register
55 * @timeout: timeout in milliseconds
57 * Wait until TFF is set in status register
59 static int smi_wait_xfer_finish(int timeout)
62 if (readl(&smicntl->smi_sr) & TFF)
71 * smi_read_id - Read flash id
72 * @info: flash_info structure pointer
73 * @banknum: bank number
75 * Read the flash id present at bank #banknum
77 static unsigned int smi_read_id(flash_info_t *info, int banknum)
81 writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1);
82 writel(READ_ID, &smicntl->smi_tr);
83 writel((banknum << BANKSEL_SHIFT) | SEND | TX_LEN_1 | RX_LEN_3,
86 if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
89 value = (readl(&smicntl->smi_rr) & 0x00FFFFFF);
91 writel(readl(&smicntl->smi_sr) & ~TFF, &smicntl->smi_sr);
92 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
98 * flash_get_size - Detect the SMI flash by reading the ID.
99 * @base: Base address of the flash area bank #banknum
100 * @banknum: Bank number
102 * Detect the SMI flash by reading the ID. Initializes the flash_info structure
103 * with size, sector count etc.
105 static ulong flash_get_size(ulong base, int banknum)
107 flash_info_t *info = &flash_info[banknum];
108 struct flash_dev *dev;
110 unsigned int density;
113 value = smi_read_id(info, banknum);
116 printf("Flash id could not be read\n");
120 density = (value >> 16) & 0xff;
122 for (i = 0, dev = &flash_ids[0]; dev->density != 0x0;
123 i++, dev = &flash_ids[i]) {
124 if (dev->density == density) {
125 info->size = dev->size;
126 info->sector_count = dev->sector_count;
131 if (dev->density == 0x0)
134 info->flash_id = value & 0xffff;
135 info->start[0] = base;
141 * smi_read_sr - Read status register of SMI
144 * This routine will get the status register of the flash chip present at the
147 static int smi_read_sr(int bank)
151 /* store the CTRL REG1 state */
152 ctrlreg1 = readl(&smicntl->smi_cr1);
154 /* Program SMI in HW Mode */
155 writel(readl(&smicntl->smi_cr1) & ~(SW_MODE | WB_MODE),
158 /* Performing a RSR instruction in HW mode */
159 writel((bank << BANKSEL_SHIFT) | RD_STATUS_REG, &smicntl->smi_cr2);
161 if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
164 val = readl(&smicntl->smi_sr);
166 /* Restore the CTRL REG1 state */
167 writel(ctrlreg1, &smicntl->smi_cr1);
173 * smi_wait_till_ready - Wait till last operation is over.
174 * @bank: bank number shifted.
175 * @timeout: timeout in milliseconds.
177 * This routine checks for WIP(write in progress)bit in Status register(SMSR-b0)
178 * The routine checks for #timeout loops, each at interval of 1 milli-second.
179 * If successful the routine returns 0.
181 static int smi_wait_till_ready(int bank, int timeout)
185 /* One chip guarantees max 5 msec wait here after page writes,
186 but potentially three seconds (!) after page erase. */
188 sr = smi_read_sr(bank);
189 if ((sr >= 0) && (!(sr & WIP_BIT)))
192 /* Try again after 1m-sec */
196 printf("SMI controller is still in wait, timeout=%d\n", timeout);
201 * smi_write_enable - Enable the flash to do write operation
204 * Set write enable latch with Write Enable command.
205 * Returns negative if error occurred.
207 static int smi_write_enable(int bank)
210 int timeout = WMODE_TOUT;
213 /* Store the CTRL REG1 state */
214 ctrlreg1 = readl(&smicntl->smi_cr1);
216 /* Program SMI in H/W Mode */
217 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
219 /* Give the Flash, Write Enable command */
220 writel((bank << BANKSEL_SHIFT) | WE, &smicntl->smi_cr2);
222 if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
225 /* Restore the CTRL REG1 state */
226 writel(ctrlreg1, &smicntl->smi_cr1);
229 sr = smi_read_sr(bank);
230 if ((sr >= 0) && (sr & (1 << (bank + WM_SHIFT))))
233 /* Try again after 1m-sec */
241 * smi_init - SMI initialization routine
243 * SMI initialization routine. Sets SMI control register1.
247 /* Setting the fast mode values. SMI working at 166/4 = 41.5 MHz */
248 writel(HOLD1 | FAST_MODE | BANK_EN | DSEL_TIME | PRESCAL4,
253 * smi_sector_erase - Erase flash sector
254 * @info: flash_info structure pointer
255 * @sector: sector number
257 * Set write enable latch with Write Enable command.
258 * Returns negative if error occurred.
260 static int smi_sector_erase(flash_info_t *info, unsigned int sector)
263 unsigned int sect_add;
264 unsigned int instruction;
266 switch (info->start[0]) {
283 sect_add = sector * (info->size / info->sector_count);
284 instruction = ((sect_add >> 8) & 0x0000FF00) | SECTOR_ERASE;
286 writel(readl(&smicntl->smi_sr) & ~(ERF1 | ERF2), &smicntl->smi_sr);
288 /* Wait until finished previous write command. */
289 if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT))
292 /* Send write enable, before erase commands. */
293 if (smi_write_enable(bank))
296 /* Put SMI in SW mode */
297 writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1);
299 /* Send Sector Erase command in SW Mode */
300 writel(instruction, &smicntl->smi_tr);
301 writel((bank << BANKSEL_SHIFT) | SEND | TX_LEN_4,
303 if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
306 if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT))
309 /* Put SMI in HW mode */
310 writel(readl(&smicntl->smi_cr1) & ~SW_MODE,
317 * smi_write - Write to SMI flash
318 * @src_addr: source buffer
319 * @dst_addr: destination buffer
320 * @length: length to write in words
321 * @bank: bank base address
325 static int smi_write(unsigned int *src_addr, unsigned int *dst_addr,
326 unsigned int length, ulong bank_addr)
347 if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT))
350 /* Set SMI in Hardware Mode */
351 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
353 if (smi_write_enable(banknum))
356 /* Perform the write command */
358 if (((ulong) (dst_addr) % SFLASH_PAGE_SIZE) == 0) {
359 if (smi_wait_till_ready(banknum,
360 CONFIG_SYS_FLASH_WRITE_TOUT))
363 if (smi_write_enable(banknum))
367 *dst_addr++ = *src_addr++;
369 if ((readl(&smicntl->smi_sr) & (ERF1 | ERF2)))
373 if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT))
376 writel(readl(&smicntl->smi_sr) & ~(WCF), &smicntl->smi_sr);
382 * write_buff - Write to SMI flash
383 * @info: flash info structure
384 * @src: source buffer
385 * @dest_addr: destination buffer
386 * @length: length to write in words
390 int write_buff(flash_info_t *info, uchar *src, ulong dest_addr, ulong length)
392 return smi_write((unsigned int *)src, (unsigned int *)dest_addr,
393 (length + 3) / 4, info->start[0]);
397 * flash_init - SMI flash initialization
399 * SMI flash initialization
401 unsigned long flash_init(void)
403 unsigned long size = 0;
408 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
409 flash_info[i].flash_id = FLASH_UNKNOWN;
410 size += flash_info[i].size = flash_get_size(bank_base[i], i);
413 for (j = 0; j < CONFIG_SYS_MAX_FLASH_BANKS; j++) {
414 for (i = 1; i < flash_info[j].sector_count; i++)
415 flash_info[j].start[i] =
416 flash_info[j].start[i - 1] +
417 flash_info->size / flash_info->sector_count;
425 * flash_print_info - Print SMI flash information
427 * Print SMI flash information
429 void flash_print_info(flash_info_t *info)
432 if (info->flash_id == FLASH_UNKNOWN) {
433 puts("missing or unknown FLASH type\n");
436 printf(" Size: %ld MB in %d Sectors\n",
437 info->size >> 20, info->sector_count);
439 puts(" Sector Start Addresses:");
440 for (i = 0; i < info->sector_count; ++i) {
441 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
447 * Check if whole sector is erased
449 size = (info->size) / (info->sector_count);
450 flash = (u32 *) info->start[i];
451 size = size / sizeof(int);
453 while ((size--) && (*flash++ == ~0))
467 erased ? " E" : " ", info->protect[i] ? "RO " : " ");
472 info->start[i], info->protect[i] ? " (RO) " : " ");
480 * flash_erase - Erase SMI flash
484 int flash_erase(flash_info_t *info, int s_first, int s_last)
490 if ((s_first < 0) || (s_first > s_last)) {
491 puts("- no sectors to erase\n");
495 for (sect = s_first; sect <= s_last; ++sect) {
496 if (info->protect[sect])
500 printf("- Warning: %d protected sectors will not be erased!\n",
506 for (sect = s_first; sect <= s_last; sect++) {
507 if (info->protect[sect] == 0) {
508 if (smi_sector_erase(info, sect))