1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2005, Intec Automation Inc.
4 * Copyright (C) 2014, Freescale Semiconductor, Inc.
7 #ifndef __LINUX_MTD_SPI_NOR_INTERNAL_H
8 #define __LINUX_MTD_SPI_NOR_INTERNAL_H
12 #define SPI_NOR_MAX_ID_LEN 6
14 /* Standard SPI NOR flash operations. */
15 #define SPI_NOR_READID_OP(naddr, ndummy, buf, len) \
16 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 0), \
17 SPI_MEM_OP_ADDR(naddr, 0, 0), \
18 SPI_MEM_OP_DUMMY(ndummy, 0), \
19 SPI_MEM_OP_DATA_IN(len, buf, 0))
21 #define SPI_NOR_WREN_OP \
22 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WREN, 0), \
24 SPI_MEM_OP_NO_DUMMY, \
27 #define SPI_NOR_WRDI_OP \
28 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRDI, 0), \
30 SPI_MEM_OP_NO_DUMMY, \
33 #define SPI_NOR_RDSR_OP(buf) \
34 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 0), \
36 SPI_MEM_OP_NO_DUMMY, \
37 SPI_MEM_OP_DATA_IN(1, buf, 0))
39 #define SPI_NOR_WRSR_OP(buf, len) \
40 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 0), \
42 SPI_MEM_OP_NO_DUMMY, \
43 SPI_MEM_OP_DATA_OUT(len, buf, 0))
45 #define SPI_NOR_RDSR2_OP(buf) \
46 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR2, 0), \
48 SPI_MEM_OP_NO_DUMMY, \
49 SPI_MEM_OP_DATA_OUT(1, buf, 0))
51 #define SPI_NOR_WRSR2_OP(buf) \
52 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR2, 0), \
54 SPI_MEM_OP_NO_DUMMY, \
55 SPI_MEM_OP_DATA_OUT(1, buf, 0))
57 #define SPI_NOR_RDCR_OP(buf) \
58 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDCR, 0), \
60 SPI_MEM_OP_NO_DUMMY, \
61 SPI_MEM_OP_DATA_IN(1, buf, 0))
63 #define SPI_NOR_EN4B_EX4B_OP(enable) \
64 SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B, 0), \
66 SPI_MEM_OP_NO_DUMMY, \
69 #define SPI_NOR_BRWR_OP(buf) \
70 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_BRWR, 0), \
72 SPI_MEM_OP_NO_DUMMY, \
73 SPI_MEM_OP_DATA_OUT(1, buf, 0))
75 #define SPI_NOR_GBULK_OP \
76 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_GBULK, 0), \
78 SPI_MEM_OP_NO_DUMMY, \
81 #define SPI_NOR_CHIP_ERASE_OP \
82 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CHIP_ERASE, 0), \
84 SPI_MEM_OP_NO_DUMMY, \
87 #define SPI_NOR_SECTOR_ERASE_OP(opcode, addr_width, addr) \
88 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \
89 SPI_MEM_OP_ADDR(addr_width, addr, 0), \
90 SPI_MEM_OP_NO_DUMMY, \
93 #define SPI_NOR_READ_OP(opcode) \
94 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \
95 SPI_MEM_OP_ADDR(3, 0, 0), \
96 SPI_MEM_OP_DUMMY(1, 0), \
97 SPI_MEM_OP_DATA_IN(2, NULL, 0))
99 #define SPI_NOR_PP_OP(opcode) \
100 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \
101 SPI_MEM_OP_ADDR(3, 0, 0), \
102 SPI_MEM_OP_NO_DUMMY, \
103 SPI_MEM_OP_DATA_OUT(2, NULL, 0))
105 #define SPINOR_SRSTEN_OP \
106 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRSTEN, 0), \
107 SPI_MEM_OP_NO_DUMMY, \
108 SPI_MEM_OP_NO_ADDR, \
111 #define SPINOR_SRST_OP \
112 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRST, 0), \
113 SPI_MEM_OP_NO_DUMMY, \
114 SPI_MEM_OP_NO_ADDR, \
117 enum spi_nor_option_flags {
118 SNOR_F_HAS_SR_TB = BIT(0),
119 SNOR_F_NO_OP_CHIP_ERASE = BIT(1),
120 SNOR_F_BROKEN_RESET = BIT(2),
121 SNOR_F_4B_OPCODES = BIT(3),
122 SNOR_F_HAS_4BAIT = BIT(4),
123 SNOR_F_HAS_LOCK = BIT(5),
124 SNOR_F_HAS_16BIT_SR = BIT(6),
125 SNOR_F_NO_READ_CR = BIT(7),
126 SNOR_F_HAS_SR_TB_BIT6 = BIT(8),
127 SNOR_F_HAS_4BIT_BP = BIT(9),
128 SNOR_F_HAS_SR_BP3_BIT6 = BIT(10),
129 SNOR_F_IO_MODE_EN_VOLATILE = BIT(11),
130 SNOR_F_SOFT_RESET = BIT(12),
131 SNOR_F_SWP_IS_VOLATILE = BIT(13),
134 struct spi_nor_read_command {
138 enum spi_nor_protocol proto;
141 struct spi_nor_pp_command {
143 enum spi_nor_protocol proto;
146 enum spi_nor_read_command_index {
149 SNOR_CMD_READ_1_1_1_DTR,
155 SNOR_CMD_READ_1_2_2_DTR,
161 SNOR_CMD_READ_1_4_4_DTR,
167 SNOR_CMD_READ_1_8_8_DTR,
168 SNOR_CMD_READ_8_8_8_DTR,
173 enum spi_nor_pp_command_index {
185 SNOR_CMD_PP_8_8_8_DTR,
191 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type
192 * @size: the size of the sector/block erased by the erase type.
193 * JEDEC JESD216B imposes erase sizes to be a power of 2.
194 * @size_shift: @size is a power of 2, the shift is stored in
196 * @size_mask: the size mask based on @size_shift.
197 * @opcode: the SPI command op code to erase the sector/block.
198 * @idx: Erase Type index as sorted in the Basic Flash Parameter
199 * Table. It will be used to synchronize the supported
200 * Erase Types with the ones identified in the SFDP
203 struct spi_nor_erase_type {
212 * struct spi_nor_erase_command - Used for non-uniform erases
213 * The structure is used to describe a list of erase commands to be executed
214 * once we validate that the erase can be performed. The elements in the list
215 * are run-length encoded.
216 * @list: for inclusion into the list of erase commands.
217 * @count: how many times the same erase command should be
218 * consecutively used.
219 * @size: the size of the sector/block erased by the command.
220 * @opcode: the SPI command op code to erase the sector/block.
222 struct spi_nor_erase_command {
223 struct list_head list;
230 * struct spi_nor_erase_region - Structure to describe a SPI NOR erase region
231 * @offset: the offset in the data array of erase region start.
232 * LSB bits are used as a bitmask encoding flags to
233 * determine if this region is overlaid, if this region is
234 * the last in the SPI NOR flash memory and to indicate
235 * all the supported erase commands inside this region.
236 * The erase types are sorted in ascending order with the
237 * smallest Erase Type size being at BIT(0).
238 * @size: the size of the region in bytes.
240 struct spi_nor_erase_region {
245 #define SNOR_ERASE_TYPE_MAX 4
246 #define SNOR_ERASE_TYPE_MASK GENMASK_ULL(SNOR_ERASE_TYPE_MAX - 1, 0)
248 #define SNOR_LAST_REGION BIT(4)
249 #define SNOR_OVERLAID_REGION BIT(5)
251 #define SNOR_ERASE_FLAGS_MAX 6
252 #define SNOR_ERASE_FLAGS_MASK GENMASK_ULL(SNOR_ERASE_FLAGS_MAX - 1, 0)
255 * struct spi_nor_erase_map - Structure to describe the SPI NOR erase map
256 * @regions: array of erase regions. The regions are consecutive in
257 * address space. Walking through the regions is done
259 * @uniform_region: a pre-allocated erase region for SPI NOR with a uniform
260 * sector size (legacy implementation).
261 * @erase_type: an array of erase types shared by all the regions.
262 * The erase types are sorted in ascending order, with the
263 * smallest Erase Type size being the first member in the
265 * @uniform_erase_type: bitmask encoding erase types that can erase the
266 * entire memory. This member is completed at init by
267 * uniform and non-uniform SPI NOR flash memories if they
268 * support at least one erase type that can erase the
271 struct spi_nor_erase_map {
272 struct spi_nor_erase_region *regions;
273 struct spi_nor_erase_region uniform_region;
274 struct spi_nor_erase_type erase_type[SNOR_ERASE_TYPE_MAX];
275 u8 uniform_erase_type;
279 * struct spi_nor_locking_ops - SPI NOR locking methods
280 * @lock: lock a region of the SPI NOR.
281 * @unlock: unlock a region of the SPI NOR.
282 * @is_locked: check if a region of the SPI NOR is completely locked
284 struct spi_nor_locking_ops {
285 int (*lock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
286 int (*unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
287 int (*is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
291 * struct spi_nor_otp_organization - Structure to describe the SPI NOR OTP regions
292 * @len: size of one OTP region in bytes.
293 * @base: start address of the OTP area.
294 * @offset: offset between consecutive OTP regions if there are more
296 * @n_regions: number of individual OTP regions.
298 struct spi_nor_otp_organization {
302 unsigned int n_regions;
306 * struct spi_nor_otp_ops - SPI NOR OTP methods
307 * @read: read from the SPI NOR OTP area.
308 * @write: write to the SPI NOR OTP area.
309 * @lock: lock an OTP region.
310 * @erase: erase an OTP region.
311 * @is_locked: check if an OTP region of the SPI NOR is locked.
313 struct spi_nor_otp_ops {
314 int (*read)(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);
315 int (*write)(struct spi_nor *nor, loff_t addr, size_t len,
317 int (*lock)(struct spi_nor *nor, unsigned int region);
318 int (*erase)(struct spi_nor *nor, loff_t addr);
319 int (*is_locked)(struct spi_nor *nor, unsigned int region);
323 * struct spi_nor_otp - SPI NOR OTP grouping structure
324 * @org: OTP region organization
325 * @ops: OTP access ops
328 const struct spi_nor_otp_organization *org;
329 const struct spi_nor_otp_ops *ops;
333 * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings.
334 * Includes legacy flash parameters and settings that can be overwritten
335 * by the spi_nor_fixups hooks, or dynamically when parsing the JESD216
336 * Serial Flash Discoverable Parameters (SFDP) tables.
338 * @size: the flash memory density in bytes.
339 * @writesize Minimal writable flash unit size. Defaults to 1. Set to
340 * ECC unit size for ECC-ed flashes.
341 * @page_size: the page size of the SPI NOR flash memory.
342 * @rdsr_dummy: dummy cycles needed for Read Status Register command
344 * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register
345 * command in octal DTR mode.
346 * @hwcaps: describes the read and page program hardware
348 * @reads: read capabilities ordered by priority: the higher index
349 * in the array, the higher priority.
350 * @page_programs: page program capabilities ordered by priority: the
351 * higher index in the array, the higher priority.
352 * @erase_map: the erase map parsed from the SFDP Sector Map Parameter
354 * @otp: SPI NOR OTP info.
355 * @octal_dtr_enable: enables SPI NOR octal DTR mode.
356 * @quad_enable: enables SPI NOR quad mode.
357 * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
358 * @convert_addr: converts an absolute address into something the flash
359 * will understand. Particularly useful when pagesize is
361 * @setup: (optional) configures the SPI NOR memory. Useful for
362 * SPI NOR flashes that have peculiarities to the SPI NOR
363 * standard e.g. different opcodes, specific address
364 * calculation, page size, etc.
365 * @ready: (optional) flashes might use a different mechanism
366 * than reading the status register to indicate they
367 * are ready for a new command
368 * @locking_ops: SPI NOR locking methods.
370 struct spi_nor_flash_parameter {
377 struct spi_nor_hwcaps hwcaps;
378 struct spi_nor_read_command reads[SNOR_CMD_READ_MAX];
379 struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX];
381 struct spi_nor_erase_map erase_map;
382 struct spi_nor_otp otp;
384 int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
385 int (*quad_enable)(struct spi_nor *nor);
386 int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
387 u32 (*convert_addr)(struct spi_nor *nor, u32 addr);
388 int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps);
389 int (*ready)(struct spi_nor *nor);
391 const struct spi_nor_locking_ops *locking_ops;
395 * struct spi_nor_fixups - SPI NOR fixup hooks
396 * @default_init: called after default flash parameters init. Used to tweak
397 * flash parameters when information provided by the flash_info
398 * table is incomplete or wrong.
399 * @post_bfpt: called after the BFPT table has been parsed
400 * @post_sfdp: called after SFDP has been parsed (is also called for SPI NORs
401 * that do not support RDSFDP). Typically used to tweak various
402 * parameters that could not be extracted by other means (i.e.
403 * when information provided by the SFDP/flash_info tables are
404 * incomplete or wrong).
405 * @late_init: used to initialize flash parameters that are not declared in the
406 * JESD216 SFDP standard, or where SFDP tables not defined at all.
407 * Will replace the default_init() hook.
409 * Those hooks can be used to tweak the SPI NOR configuration when the SFDP
410 * table is broken or not available.
412 struct spi_nor_fixups {
413 void (*default_init)(struct spi_nor *nor);
414 int (*post_bfpt)(struct spi_nor *nor,
415 const struct sfdp_parameter_header *bfpt_header,
416 const struct sfdp_bfpt *bfpt);
417 void (*post_sfdp)(struct spi_nor *nor);
418 void (*late_init)(struct spi_nor *nor);
422 * struct flash_info - SPI NOR flash_info entry.
423 * @name: the name of the flash.
424 * @id: the flash's ID bytes. The first three bytes are the
425 * JEDIC ID. JEDEC ID zero means "no ID" (mostly older chips).
426 * @id_len: the number of bytes of ID.
427 * @sector_size: the size listed here is what works with SPINOR_OP_SE, which
428 * isn't necessarily called a "sector" by the vendor.
429 * @n_sectors: the number of sectors.
430 * @page_size: the flash's page size.
431 * @addr_width: the flash's address width.
433 * @parse_sfdp: true when flash supports SFDP tables. The false value has no
434 * meaning. If one wants to skip the SFDP tables, one should
435 * instead use the SPI_NOR_SKIP_SFDP sfdp_flag.
436 * @flags: flags that indicate support that is not defined by the
437 * JESD216 standard in its SFDP tables. Flag meanings:
438 * SPI_NOR_HAS_LOCK: flash supports lock/unlock via SR
439 * SPI_NOR_HAS_TB: flash SR has Top/Bottom (TB) protect bit. Must be
440 * used with SPI_NOR_HAS_LOCK.
441 * SPI_NOR_TB_SR_BIT6: Top/Bottom (TB) is bit 6 of status register.
442 * Must be used with SPI_NOR_HAS_TB.
443 * SPI_NOR_4BIT_BP: flash SR has 4 bit fields (BP0-3) for block
445 * SPI_NOR_BP3_SR_BIT6: BP3 is bit 6 of status register. Must be used with
447 * SPI_NOR_SWP_IS_VOLATILE: flash has volatile software write protection bits.
448 * Usually these will power-up in a write-protected
450 * SPI_NOR_NO_ERASE: no erase command needed.
451 * NO_CHIP_ERASE: chip does not support chip erase.
452 * SPI_NOR_NO_FR: can't do fastread.
454 * @no_sfdp_flags: flags that indicate support that can be discovered via SFDP.
455 * Used when SFDP tables are not defined in the flash. These
456 * flags are used together with the SPI_NOR_SKIP_SFDP flag.
457 * SPI_NOR_SKIP_SFDP: skip parsing of SFDP tables.
458 * SECT_4K: SPINOR_OP_BE_4K works uniformly.
459 * SECT_4K_PMC: SPINOR_OP_BE_4K_PMC works uniformly.
460 * SPI_NOR_DUAL_READ: flash supports Dual Read.
461 * SPI_NOR_QUAD_READ: flash supports Quad Read.
462 * SPI_NOR_OCTAL_READ: flash supports Octal Read.
463 * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read.
464 * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program.
466 * @fixup_flags: flags that indicate support that can be discovered via SFDP
467 * ideally, but can not be discovered for this particular flash
468 * because the SFDP table that indicates this support is not
469 * defined by the flash. In case the table for this support is
470 * defined but has wrong values, one should instead use a
471 * post_sfdp() hook to set the SNOR_F equivalent flag.
473 * SPI_NOR_4B_OPCODES: use dedicated 4byte address op codes to support
474 * memory size above 128Mib.
475 * SPI_NOR_IO_MODE_EN_VOLATILE: flash enables the best available I/O mode
476 * via a volatile bit.
477 * @mfr_flags: manufacturer private flags. Used in the manufacturer fixup
478 * hooks to differentiate support between flashes of the same
480 * @otp_org: flash's OTP organization.
481 * @fixups: part specific fixup hooks.
485 u8 id[SPI_NOR_MAX_ID_LEN];
487 unsigned sector_size;
494 #define SPI_NOR_HAS_LOCK BIT(0)
495 #define SPI_NOR_HAS_TB BIT(1)
496 #define SPI_NOR_TB_SR_BIT6 BIT(2)
497 #define SPI_NOR_4BIT_BP BIT(3)
498 #define SPI_NOR_BP3_SR_BIT6 BIT(4)
499 #define SPI_NOR_SWP_IS_VOLATILE BIT(5)
500 #define SPI_NOR_NO_ERASE BIT(6)
501 #define NO_CHIP_ERASE BIT(7)
502 #define SPI_NOR_NO_FR BIT(8)
505 #define SPI_NOR_SKIP_SFDP BIT(0)
506 #define SECT_4K BIT(1)
507 #define SECT_4K_PMC BIT(2)
508 #define SPI_NOR_DUAL_READ BIT(3)
509 #define SPI_NOR_QUAD_READ BIT(4)
510 #define SPI_NOR_OCTAL_READ BIT(5)
511 #define SPI_NOR_OCTAL_DTR_READ BIT(6)
512 #define SPI_NOR_OCTAL_DTR_PP BIT(7)
515 #define SPI_NOR_4B_OPCODES BIT(0)
516 #define SPI_NOR_IO_MODE_EN_VOLATILE BIT(1)
520 const struct spi_nor_otp_organization otp_org;
521 const struct spi_nor_fixups *fixups;
524 /* Used when the "_ext_id" is two bytes at most */
525 #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors) \
527 ((_jedec_id) >> 16) & 0xff, \
528 ((_jedec_id) >> 8) & 0xff, \
529 (_jedec_id) & 0xff, \
530 ((_ext_id) >> 8) & 0xff, \
533 .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
534 .sector_size = (_sector_size), \
535 .n_sectors = (_n_sectors), \
538 #define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors) \
540 ((_jedec_id) >> 16) & 0xff, \
541 ((_jedec_id) >> 8) & 0xff, \
542 (_jedec_id) & 0xff, \
543 ((_ext_id) >> 16) & 0xff, \
544 ((_ext_id) >> 8) & 0xff, \
548 .sector_size = (_sector_size), \
549 .n_sectors = (_n_sectors), \
552 #define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_width) \
553 .sector_size = (_sector_size), \
554 .n_sectors = (_n_sectors), \
555 .page_size = (_page_size), \
556 .addr_width = (_addr_width), \
557 .flags = SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, \
559 #define OTP_INFO(_len, _n_regions, _base, _offset) \
563 .offset = (_offset), \
564 .n_regions = (_n_regions), \
568 .parse_sfdp = true, \
570 #define FLAGS(_flags) \
573 #define NO_SFDP_FLAGS(_no_sfdp_flags) \
574 .no_sfdp_flags = (_no_sfdp_flags), \
576 #define FIXUP_FLAGS(_fixup_flags) \
577 .fixup_flags = (_fixup_flags), \
579 #define MFR_FLAGS(_mfr_flags) \
580 .mfr_flags = (_mfr_flags), \
583 * struct spi_nor_manufacturer - SPI NOR manufacturer object
584 * @name: manufacturer name
585 * @parts: array of parts supported by this manufacturer
586 * @nparts: number of entries in the parts array
587 * @fixups: hooks called at various points in time during spi_nor_scan()
589 struct spi_nor_manufacturer {
591 const struct flash_info *parts;
593 const struct spi_nor_fixups *fixups;
597 * struct sfdp - SFDP data
598 * @num_dwords: number of entries in the dwords array
599 * @dwords: array of double words of the SFDP data
606 /* Manufacturer drivers. */
607 extern const struct spi_nor_manufacturer spi_nor_atmel;
608 extern const struct spi_nor_manufacturer spi_nor_catalyst;
609 extern const struct spi_nor_manufacturer spi_nor_eon;
610 extern const struct spi_nor_manufacturer spi_nor_esmt;
611 extern const struct spi_nor_manufacturer spi_nor_everspin;
612 extern const struct spi_nor_manufacturer spi_nor_fujitsu;
613 extern const struct spi_nor_manufacturer spi_nor_gigadevice;
614 extern const struct spi_nor_manufacturer spi_nor_intel;
615 extern const struct spi_nor_manufacturer spi_nor_issi;
616 extern const struct spi_nor_manufacturer spi_nor_macronix;
617 extern const struct spi_nor_manufacturer spi_nor_micron;
618 extern const struct spi_nor_manufacturer spi_nor_st;
619 extern const struct spi_nor_manufacturer spi_nor_spansion;
620 extern const struct spi_nor_manufacturer spi_nor_sst;
621 extern const struct spi_nor_manufacturer spi_nor_winbond;
622 extern const struct spi_nor_manufacturer spi_nor_xilinx;
623 extern const struct spi_nor_manufacturer spi_nor_xmc;
625 extern const struct attribute_group *spi_nor_sysfs_groups[];
627 void spi_nor_spimem_setup_op(const struct spi_nor *nor,
628 struct spi_mem_op *op,
629 const enum spi_nor_protocol proto);
630 int spi_nor_write_enable(struct spi_nor *nor);
631 int spi_nor_write_disable(struct spi_nor *nor);
632 int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable);
633 int spi_nor_wait_till_ready(struct spi_nor *nor);
634 int spi_nor_global_block_unlock(struct spi_nor *nor);
635 int spi_nor_lock_and_prep(struct spi_nor *nor);
636 void spi_nor_unlock_and_unprep(struct spi_nor *nor);
637 int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor);
638 int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor);
639 int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor);
640 int spi_nor_read_id(struct spi_nor *nor, u8 naddr, u8 ndummy, u8 *id,
641 enum spi_nor_protocol reg_proto);
642 int spi_nor_read_sr(struct spi_nor *nor, u8 *sr);
643 int spi_nor_sr_ready(struct spi_nor *nor);
644 int spi_nor_read_cr(struct spi_nor *nor, u8 *cr);
645 int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len);
646 int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1);
647 int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr);
649 ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
651 ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
653 int spi_nor_read_any_reg(struct spi_nor *nor, struct spi_mem_op *op,
654 enum spi_nor_protocol proto);
655 int spi_nor_write_any_volatile_reg(struct spi_nor *nor, struct spi_mem_op *op,
656 enum spi_nor_protocol proto);
657 int spi_nor_erase_sector(struct spi_nor *nor, u32 addr);
659 int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);
660 int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len,
662 int spi_nor_otp_erase_secr(struct spi_nor *nor, loff_t addr);
663 int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region);
664 int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region);
666 int spi_nor_hwcaps_read2cmd(u32 hwcaps);
667 int spi_nor_hwcaps_pp2cmd(u32 hwcaps);
668 u8 spi_nor_convert_3to4_read(u8 opcode);
669 void spi_nor_set_read_settings(struct spi_nor_read_command *read,
673 enum spi_nor_protocol proto);
674 void spi_nor_set_pp_settings(struct spi_nor_pp_command *pp, u8 opcode,
675 enum spi_nor_protocol proto);
677 void spi_nor_set_erase_type(struct spi_nor_erase_type *erase, u32 size,
679 struct spi_nor_erase_region *
680 spi_nor_region_next(struct spi_nor_erase_region *region);
681 void spi_nor_init_uniform_erase_map(struct spi_nor_erase_map *map,
682 u8 erase_mask, u64 flash_size);
684 int spi_nor_post_bfpt_fixups(struct spi_nor *nor,
685 const struct sfdp_parameter_header *bfpt_header,
686 const struct sfdp_bfpt *bfpt);
688 void spi_nor_init_default_locking_ops(struct spi_nor *nor);
689 void spi_nor_try_unlock_all(struct spi_nor *nor);
690 void spi_nor_set_mtd_locking_ops(struct spi_nor *nor);
691 void spi_nor_set_mtd_otp_ops(struct spi_nor *nor);
693 int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode,
694 u8 *buf, size_t len);
695 int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode,
696 const u8 *buf, size_t len);
698 static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd)
700 return container_of(mtd, struct spi_nor, mtd);
703 #endif /* __LINUX_MTD_SPI_NOR_INTERNAL_H */