4 * Copyright (C) 2008 Atmel Corporation
5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
6 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
8 * Licensed under the GPL-2 or later.
15 #include <spi_flash.h>
17 #include "spi_flash_internal.h"
19 DECLARE_GLOBAL_DATA_PTR;
22 * struct spi_flash_params - SPI/QSPI flash device params structure
24 * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
25 * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
26 * @ext_jedec: Device ext_jedec ID
27 * @sector_size: Sector size of this device
28 * @nr_sectors: No.of sectors on this device
30 struct spi_flash_params {
38 static const struct spi_flash_params spi_flash_params_table[] = {
39 #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
40 {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4},
41 {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8},
42 {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8},
43 {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16},
44 {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32},
45 {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64},
46 {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128},
48 #ifdef CONFIG_SPI_FLASH_EON /* EON */
49 {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64},
50 {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256},
52 #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
53 {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128},
54 {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64},
56 #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
57 {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8},
58 {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16},
59 {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32},
60 {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64},
61 {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128},
62 {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256},
63 {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256},
65 #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
66 {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16},
67 {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32},
68 {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64},
69 {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128},
70 {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64},
71 {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256},
72 {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64},
73 {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128},
74 {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256},
75 {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512},
76 {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024},
78 #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
79 {"M25P10", 0x202011, 0x0, 32 * 1024, 4},
80 {"M25P20", 0x202012, 0x0, 64 * 1024, 4},
81 {"M25P40", 0x202013, 0x0, 64 * 1024, 8},
82 {"M25P80", 0x202014, 0x0, 64 * 1024, 16},
83 {"M25P16", 0x202015, 0x0, 64 * 1024, 32},
84 {"M25P32", 0x202016, 0x0, 64 * 1024, 64},
85 {"M25P64", 0x202017, 0x0, 64 * 1024, 128},
86 {"M25P128", 0x202018, 0x0, 256 * 1024, 64},
87 {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64},
88 {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64},
89 {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128},
90 {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128},
91 {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256},
92 {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256},
93 {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512},
94 {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512},
95 {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024},
96 {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024},
97 {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048},
98 {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048},
100 #ifdef CONFIG_SPI_FLASH_SST /* SST */
101 {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8},
102 {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16},
103 {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32},
104 {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64},
105 {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128},
106 {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1},
107 {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2},
108 {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4},
109 {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8},
110 {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16},
112 #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
113 {"W25P80", 0xef2014, 0x0, 64 * 1024, 16},
114 {"W25P16", 0xef2015, 0x0, 64 * 1024, 32},
115 {"W25P32", 0xef2016, 0x0, 64 * 1024, 64},
116 {"W25X40", 0xef3013, 0x0, 64 * 1024, 8},
117 {"W25X16", 0xef3015, 0x0, 64 * 1024, 32},
118 {"W25X32", 0xef3016, 0x0, 64 * 1024, 64},
119 {"W25X64", 0xef3017, 0x0, 64 * 1024, 128},
120 {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16},
121 {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32},
122 {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64},
123 {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128},
124 {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256},
125 {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512},
126 {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16},
127 {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32},
128 {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64},
129 {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128},
130 {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256},
134 * Below paired flash devices has similar spi_flash_params params.
135 * (S25FL129P_64K, S25FL128S_64K)
136 * (W25Q80BL, W25Q80BV)
137 * (W25Q16CL, W25Q16DV)
138 * (W25Q32BV, W25Q32FV_SPI)
139 * (W25Q64CV, W25Q64FV_SPI)
140 * (W25Q128BV, W25Q128FV_SPI)
141 * (W25Q32DW, W25Q32FV_QPI)
142 * (W25Q64DW, W25Q64FV_QPI)
143 * (W25Q128FW, W25Q128FV_QPI)
151 struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode)
153 const struct spi_flash_params *params;
154 struct spi_flash *flash;
156 u16 jedec = idcode[1] << 8 | idcode[2];
157 u16 ext_jedec = idcode[3] << 8 | idcode[4];
159 /* Get the flash id (jedec = manuf_id + dev_id, ext_jedec) */
160 for (i = 0; i < ARRAY_SIZE(spi_flash_params_table); i++) {
161 params = &spi_flash_params_table[i];
162 if ((params->jedec >> 16) == idcode[0]) {
163 if ((params->jedec & 0xFFFF) == jedec) {
164 if (params->ext_jedec == 0)
166 else if (params->ext_jedec == ext_jedec)
172 if (i == ARRAY_SIZE(spi_flash_params_table)) {
173 printf("SF: Unsupported flash IDs: ");
174 printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
175 idcode[0], jedec, ext_jedec);
179 flash = malloc(sizeof(*flash));
181 debug("SF: Failed to allocate spi_flash\n");
184 memset(flash, '\0', sizeof(*flash));
187 flash->name = params->name;
188 flash->poll_cmd = CMD_READ_STATUS;
190 /* Assign spi_flash ops */
191 flash->write = spi_flash_cmd_write_multi;
192 flash->erase = spi_flash_cmd_erase;
193 flash->read = spi_flash_cmd_read_fast;
195 /* Compute the flash size */
196 flash->page_size = 256;
197 flash->sector_size = params->sector_size;
198 flash->size = flash->sector_size * params->nr_sectors;
203 #ifdef CONFIG_SPI_FLASH_BAR
204 int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
209 /* discover bank cmds */
211 case SPI_FLASH_SPANSION_IDCODE0:
212 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
213 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
215 case SPI_FLASH_STMICRO_IDCODE0:
216 case SPI_FLASH_WINBOND_IDCODE0:
217 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
218 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
221 printf("SF: Unsupported bank commands %02x\n", idcode0);
225 /* read the bank reg - on which bank the flash is in currently */
226 cmd = flash->bank_read_cmd;
227 if (flash->size > SPI_FLASH_16MB_BOUN) {
228 if (spi_flash_read_common(flash, &cmd, 1, &curr_bank, 1)) {
229 debug("SF: fail to read bank addr register\n");
232 flash->bank_curr = curr_bank;
234 flash->bank_curr = curr_bank;
241 #ifdef CONFIG_OF_CONTROL
242 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
248 /* If there is no node, do nothing */
249 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
253 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
254 if (addr == FDT_ADDR_T_NONE) {
255 debug("%s: Cannot decode address\n", __func__);
259 if (flash->size != size) {
260 debug("%s: Memory map must cover entire device\n", __func__);
263 flash->memory_map = (void *)addr;
267 #endif /* CONFIG_OF_CONTROL */
269 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
270 unsigned int max_hz, unsigned int spi_mode)
272 struct spi_slave *spi;
273 struct spi_flash *flash = NULL;
277 /* Setup spi_slave */
278 spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
280 printf("SF: Failed to set up slave\n");
285 ret = spi_claim_bus(spi);
287 debug("SF: Failed to claim SPI bus: %d\n", ret);
291 /* Read the ID codes */
292 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
294 printf("SF: Failed to get idcodes\n");
299 printf("SF: Got idcodes\n");
300 print_buffer(0, idcode, 1, sizeof(idcode), 0);
303 /* Validate ID's from flash dev table */
305 flash = spi_flash_validate_ids(spi, idp);
309 #ifdef CONFIG_SPI_FLASH_BAR
310 /* Configure the BAR - discover bank cmds and read current bank */
311 ret = spi_flash_bank_config(flash, *idp);
316 #ifdef CONFIG_OF_CONTROL
317 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
318 debug("SF: FDT decode error\n");
322 #ifndef CONFIG_SPL_BUILD
323 printf("SF: Detected %s with page size ", flash->name);
324 print_size(flash->sector_size, ", total ");
325 print_size(flash->size, "");
326 if (flash->memory_map)
327 printf(", mapped at %p", flash->memory_map);
330 #ifndef CONFIG_SPI_FLASH_BAR
331 if (flash->size > SPI_FLASH_16MB_BOUN) {
332 puts("SF: Warning - Only lower 16MiB accessible,");
333 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
337 /* Release spi bus */
338 spi_release_bus(spi);
343 spi_release_bus(spi);
349 void spi_flash_free(struct spi_flash *flash)
351 spi_free_slave(flash->spi);