4 * Copyright (C) 2008 Atmel Corporation
5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
6 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
8 * Licensed under the GPL-2 or later.
15 #include <spi_flash.h>
17 #include "spi_flash_internal.h"
19 DECLARE_GLOBAL_DATA_PTR;
22 * struct spi_flash_params - SPI/QSPI flash device params structure
24 * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
25 * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
26 * @ext_jedec: Device ext_jedec ID
27 * @sector_size: Sector size of this device
28 * @nr_sectors: No.of sectors on this device
29 * @flags: Importent param, for flash specific behaviour
31 struct spi_flash_params {
40 static const struct spi_flash_params spi_flash_params_table[] = {
41 #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
42 {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, 0},
43 {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, 0},
44 {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, 0},
45 {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, 0},
46 {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, 0},
47 {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, 0},
48 {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, 0},
50 #ifdef CONFIG_SPI_FLASH_EON /* EON */
51 {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0},
52 {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0},
54 #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
55 {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, 0},
56 {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, 0},
58 #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
59 {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0},
60 {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0},
61 {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0},
62 {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0},
63 {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0},
64 {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, 0},
65 {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, 0},
67 #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
68 {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0},
69 {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0},
70 {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0},
71 {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0},
72 {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, 0},
73 {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, 0},
74 {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, 0},
75 {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, 0},
76 {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, 0},
77 {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, 0},
78 {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, 0},
80 #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
81 {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0},
82 {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0},
83 {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0},
84 {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0},
85 {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0},
86 {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0},
87 {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0},
88 {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0},
89 {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, 0},
90 {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, 0},
91 {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, 0},
92 {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, 0},
93 {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, 0},
94 {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, 0},
95 {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, 0},
96 {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, 0},
97 {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, 0},
98 {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, 0},
99 {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, 0},
100 {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, 0},
102 #ifdef CONFIG_SPI_FLASH_SST /* SST */
103 {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SST_WP},
104 {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SST_WP},
105 {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SST_WP},
106 {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SST_WP},
107 {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, 0},
108 {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SST_WP},
109 {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SST_WP},
110 {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SST_WP},
111 {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SST_WP},
112 {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SST_WP},
114 #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
115 {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0},
116 {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0},
117 {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0},
118 {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, 0},
119 {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, 0},
120 {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, 0},
121 {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, 0},
122 {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, 0},
123 {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, 0},
124 {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, 0},
125 {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, 0},
126 {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, 0},
127 {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, 0},
128 {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, 0},
129 {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, 0},
130 {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, 0},
131 {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, 0},
132 {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, 0},
136 * Below paired flash devices has similar spi_flash_params params.
137 * (S25FL129P_64K, S25FL128S_64K)
138 * (W25Q80BL, W25Q80BV)
139 * (W25Q16CL, W25Q16DV)
140 * (W25Q32BV, W25Q32FV_SPI)
141 * (W25Q64CV, W25Q64FV_SPI)
142 * (W25Q128BV, W25Q128FV_SPI)
143 * (W25Q32DW, W25Q32FV_QPI)
144 * (W25Q64DW, W25Q64FV_QPI)
145 * (W25Q128FW, W25Q128FV_QPI)
153 struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode)
155 const struct spi_flash_params *params;
156 struct spi_flash *flash;
158 u16 jedec = idcode[1] << 8 | idcode[2];
159 u16 ext_jedec = idcode[3] << 8 | idcode[4];
161 /* Get the flash id (jedec = manuf_id + dev_id, ext_jedec) */
162 for (i = 0; i < ARRAY_SIZE(spi_flash_params_table); i++) {
163 params = &spi_flash_params_table[i];
164 if ((params->jedec >> 16) == idcode[0]) {
165 if ((params->jedec & 0xFFFF) == jedec) {
166 if (params->ext_jedec == 0)
168 else if (params->ext_jedec == ext_jedec)
174 if (i == ARRAY_SIZE(spi_flash_params_table)) {
175 printf("SF: Unsupported flash IDs: ");
176 printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
177 idcode[0], jedec, ext_jedec);
181 flash = malloc(sizeof(*flash));
183 debug("SF: Failed to allocate spi_flash\n");
186 memset(flash, '\0', sizeof(*flash));
189 flash->name = params->name;
190 flash->poll_cmd = CMD_READ_STATUS;
192 /* Assign spi_flash ops */
193 flash->write = spi_flash_cmd_write_multi;
194 #ifdef CONFIG_SPI_FLASH_SST
195 if (params->flags & SST_WP)
196 flash->write = sst_write_wp;
198 flash->erase = spi_flash_cmd_erase;
199 flash->read = spi_flash_cmd_read_fast;
201 /* Compute the flash size */
202 flash->page_size = 256;
203 flash->sector_size = params->sector_size;
204 flash->size = flash->sector_size * params->nr_sectors;
206 /* Flash powers up read-only, so clear BP# bits */
207 #if defined(CONFIG_SPI_FLASH_ATMEL) || \
208 defined(CONFIG_SPI_FLASH_MACRONIX) || \
209 defined(CONFIG_SPI_FLASH_SST)
210 spi_flash_cmd_write_status(flash, 0);
216 #ifdef CONFIG_SPI_FLASH_BAR
217 int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
222 /* discover bank cmds */
224 case SPI_FLASH_SPANSION_IDCODE0:
225 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
226 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
228 case SPI_FLASH_STMICRO_IDCODE0:
229 case SPI_FLASH_WINBOND_IDCODE0:
230 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
231 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
234 printf("SF: Unsupported bank commands %02x\n", idcode0);
238 /* read the bank reg - on which bank the flash is in currently */
239 cmd = flash->bank_read_cmd;
240 if (flash->size > SPI_FLASH_16MB_BOUN) {
241 if (spi_flash_read_common(flash, &cmd, 1, &curr_bank, 1)) {
242 debug("SF: fail to read bank addr register\n");
245 flash->bank_curr = curr_bank;
247 flash->bank_curr = curr_bank;
254 #ifdef CONFIG_OF_CONTROL
255 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
261 /* If there is no node, do nothing */
262 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
266 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
267 if (addr == FDT_ADDR_T_NONE) {
268 debug("%s: Cannot decode address\n", __func__);
272 if (flash->size != size) {
273 debug("%s: Memory map must cover entire device\n", __func__);
276 flash->memory_map = (void *)addr;
280 #endif /* CONFIG_OF_CONTROL */
282 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
283 unsigned int max_hz, unsigned int spi_mode)
285 struct spi_slave *spi;
286 struct spi_flash *flash = NULL;
290 /* Setup spi_slave */
291 spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
293 printf("SF: Failed to set up slave\n");
298 ret = spi_claim_bus(spi);
300 debug("SF: Failed to claim SPI bus: %d\n", ret);
304 /* Read the ID codes */
305 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
307 printf("SF: Failed to get idcodes\n");
312 printf("SF: Got idcodes\n");
313 print_buffer(0, idcode, 1, sizeof(idcode), 0);
316 /* Validate ID's from flash dev table */
318 flash = spi_flash_validate_ids(spi, idp);
322 #ifdef CONFIG_SPI_FLASH_BAR
323 /* Configure the BAR - discover bank cmds and read current bank */
324 ret = spi_flash_bank_config(flash, *idp);
329 #ifdef CONFIG_OF_CONTROL
330 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
331 debug("SF: FDT decode error\n");
335 #ifndef CONFIG_SPL_BUILD
336 printf("SF: Detected %s with page size ", flash->name);
337 print_size(flash->sector_size, ", total ");
338 print_size(flash->size, "");
339 if (flash->memory_map)
340 printf(", mapped at %p", flash->memory_map);
343 #ifndef CONFIG_SPI_FLASH_BAR
344 if (flash->size > SPI_FLASH_16MB_BOUN) {
345 puts("SF: Warning - Only lower 16MiB accessible,");
346 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
350 /* Release spi bus */
351 spi_release_bus(spi);
356 spi_release_bus(spi);
362 void spi_flash_free(struct spi_flash *flash)
364 spi_free_slave(flash->spi);