4 * Copyright (C) 2008 Atmel Corporation
5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
7 * Licensed under the GPL-2 or later.
14 #include <spi_flash.h>
17 #include "spi_flash_internal.h"
19 DECLARE_GLOBAL_DATA_PTR;
21 static void spi_flash_addr(u32 addr, u8 *cmd)
23 /* cmd[0] is actual command */
29 static int spi_flash_read_write(struct spi_slave *spi,
30 const u8 *cmd, size_t cmd_len,
31 const u8 *data_out, u8 *data_in,
34 unsigned long flags = SPI_XFER_BEGIN;
38 flags |= SPI_XFER_END;
40 ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
42 debug("SF: Failed to send command (%zu bytes): %d\n",
44 } else if (data_len != 0) {
45 ret = spi_xfer(spi, data_len * 8, data_out, data_in, SPI_XFER_END);
47 debug("SF: Failed to transfer %zu bytes of data: %d\n",
54 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)
56 return spi_flash_cmd_read(spi, &cmd, 1, response, len);
59 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
60 size_t cmd_len, void *data, size_t data_len)
62 return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len);
65 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
66 const void *data, size_t data_len)
68 return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len);
71 int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
72 size_t len, const void *buf)
74 unsigned long byte_addr, page_size;
75 size_t chunk_len, actual;
79 page_size = flash->page_size;
81 ret = spi_claim_bus(flash->spi);
83 debug("SF: unable to claim SPI bus\n");
87 cmd[0] = CMD_PAGE_PROGRAM;
88 for (actual = 0; actual < len; actual += chunk_len) {
89 #ifdef CONFIG_SPI_FLASH_BAR
92 bank_sel = offset / SPI_FLASH_16MB_BOUN;
94 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
96 debug("SF: fail to set bank%d\n", bank_sel);
100 byte_addr = offset % page_size;
101 chunk_len = min(len - actual, page_size - byte_addr);
103 if (flash->spi->max_write_size)
104 chunk_len = min(chunk_len, flash->spi->max_write_size);
106 spi_flash_addr(offset, cmd);
108 debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
109 buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
111 ret = spi_flash_cmd_write_enable(flash);
113 debug("SF: enabling write failed\n");
117 ret = spi_flash_cmd_write(flash->spi, cmd, 4,
118 buf + actual, chunk_len);
120 debug("SF: write failed\n");
124 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
131 spi_release_bus(flash->spi);
135 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
136 size_t cmd_len, void *data, size_t data_len)
138 struct spi_slave *spi = flash->spi;
142 ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
143 spi_release_bus(spi);
148 int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
149 size_t len, void *data)
151 u8 cmd[5], bank_sel = 0;
152 u32 remain_len, read_len;
155 /* Handle memory-mapped SPI */
156 if (flash->memory_map) {
157 memcpy(data, flash->memory_map + offset, len);
161 cmd[0] = CMD_READ_ARRAY_FAST;
165 #ifdef CONFIG_SPI_FLASH_BAR
166 bank_sel = offset / SPI_FLASH_16MB_BOUN;
168 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
170 debug("SF: fail to set bank%d\n", bank_sel);
174 remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1) - offset);
175 if (len < remain_len)
178 read_len = remain_len;
180 spi_flash_addr(offset, cmd);
182 ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
185 debug("SF: read failed\n");
197 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
199 struct spi_slave *spi = flash->spi;
200 unsigned long timebase;
203 u8 check_status = 0x0;
204 u8 poll_bit = STATUS_WIP;
205 u8 cmd = flash->poll_cmd;
207 if (cmd == CMD_FLAG_STATUS) {
208 poll_bit = STATUS_PEC;
209 check_status = poll_bit;
212 ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
214 debug("SF: fail to read %s status register\n",
215 cmd == CMD_READ_STATUS ? "read" : "flag");
219 timebase = get_timer(0);
223 ret = spi_xfer(spi, 8, NULL, &status, 0);
227 if ((status & poll_bit) == check_status)
230 } while (get_timer(timebase) < timeout);
232 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
234 if ((status & poll_bit) == check_status)
238 debug("SF: time out!\n");
242 int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
248 erase_size = flash->sector_size;
249 if (offset % erase_size || len % erase_size) {
250 debug("SF: Erase offset/length not multiple of erase size\n");
254 ret = spi_claim_bus(flash->spi);
256 debug("SF: Unable to claim SPI bus\n");
260 if (erase_size == 4096)
261 cmd[0] = CMD_ERASE_4K;
263 cmd[0] = CMD_ERASE_64K;
266 #ifdef CONFIG_SPI_FLASH_BAR
269 bank_sel = offset / SPI_FLASH_16MB_BOUN;
271 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
273 debug("SF: fail to set bank%d\n", bank_sel);
277 spi_flash_addr(offset, cmd);
279 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
280 cmd[2], cmd[3], offset);
282 ret = spi_flash_cmd_write_enable(flash);
286 ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), NULL, 0);
290 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT);
294 offset += erase_size;
299 spi_release_bus(flash->spi);
303 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
308 ret = spi_flash_cmd_write_enable(flash);
310 debug("SF: enabling write failed\n");
314 cmd = CMD_WRITE_STATUS;
315 ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &sr, 1);
317 debug("SF: fail to write status register\n");
321 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
323 debug("SF: write status register timed out\n");
330 #ifdef CONFIG_SPI_FLASH_BAR
331 int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
336 if (flash->bank_curr == bank_sel) {
337 debug("SF: not require to enable bank%d\n", bank_sel);
341 cmd = flash->bank_write_cmd;
342 ret = spi_flash_cmd_write_enable(flash);
344 debug("SF: enabling write failed\n");
348 ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &bank_sel, 1);
350 debug("SF: fail to write bank addr register\n");
353 flash->bank_curr = bank_sel;
355 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
357 debug("SF: write bank addr register timed out\n");
364 int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
369 /* discover bank cmds */
371 case SPI_FLASH_SPANSION_IDCODE0:
372 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
373 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
375 case SPI_FLASH_STMICRO_IDCODE0:
376 case SPI_FLASH_WINBOND_IDCODE0:
377 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
378 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
381 printf("SF: Unsupported bank commands %02x\n", idcode0);
385 /* read the bank reg - on which bank the flash is in currently */
386 cmd = flash->bank_read_cmd;
387 if (flash->size > SPI_FLASH_16MB_BOUN) {
388 if (spi_flash_read_common(flash, &cmd, 1, &curr_bank, 1)) {
389 debug("SF: fail to read bank addr register\n");
392 flash->bank_curr = curr_bank;
394 flash->bank_curr = curr_bank;
401 #ifdef CONFIG_OF_CONTROL
402 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
408 /* If there is no node, do nothing */
409 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
413 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
414 if (addr == FDT_ADDR_T_NONE) {
415 debug("%s: Cannot decode address\n", __func__);
419 if (flash->size != size) {
420 debug("%s: Memory map must cover entire device\n", __func__);
423 flash->memory_map = (void *)addr;
427 #endif /* CONFIG_OF_CONTROL */
430 * The following table holds all device probe functions
432 * shift: number of continuation bytes before the ID
433 * idcode: the expected IDCODE or 0xff for non JEDEC devices
434 * probe: the function to call
436 * Non JEDEC devices should be ordered in the table such that
437 * the probe functions with best detection algorithms come first.
439 * Several matching entries are permitted, they will be tried
440 * in sequence until a probe function returns non NULL.
442 * IDCODE_CONT_LEN may be redefined if a device needs to declare a
443 * larger "shift" value. IDCODE_PART_LEN generally shouldn't be
444 * changed. This is the max number of bytes probe functions may
445 * examine when looking up part-specific identification info.
447 * Probe functions will be given the idcode buffer starting at their
448 * manu id byte (the "idcode" in the table below). In other words,
449 * all of the continuation bytes will be skipped (the "shift" below).
451 #define IDCODE_CONT_LEN 0
452 #define IDCODE_PART_LEN 5
453 static const struct {
456 struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
458 /* Keep it sorted by define name */
459 #ifdef CONFIG_SPI_FLASH_ATMEL
460 { 0, 0x1f, spi_flash_probe_atmel, },
462 #ifdef CONFIG_SPI_FLASH_EON
463 { 0, 0x1c, spi_flash_probe_eon, },
465 #ifdef CONFIG_SPI_FLASH_MACRONIX
466 { 0, 0xc2, spi_flash_probe_macronix, },
468 #ifdef CONFIG_SPI_FLASH_SPANSION
469 { 0, 0x01, spi_flash_probe_spansion, },
471 #ifdef CONFIG_SPI_FLASH_SST
472 { 0, 0xbf, spi_flash_probe_sst, },
474 #ifdef CONFIG_SPI_FLASH_STMICRO
475 { 0, 0x20, spi_flash_probe_stmicro, },
477 #ifdef CONFIG_SPI_FLASH_WINBOND
478 { 0, 0xef, spi_flash_probe_winbond, },
480 #ifdef CONFIG_SPI_FRAM_RAMTRON
481 { 6, 0xc2, spi_fram_probe_ramtron, },
482 # undef IDCODE_CONT_LEN
483 # define IDCODE_CONT_LEN 6
485 /* Keep it sorted by best detection */
486 #ifdef CONFIG_SPI_FLASH_STMICRO
487 { 0, 0xff, spi_flash_probe_stmicro, },
489 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
490 { 0, 0xff, spi_fram_probe_ramtron, },
493 #define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
495 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
496 unsigned int max_hz, unsigned int spi_mode)
498 struct spi_slave *spi;
499 struct spi_flash *flash = NULL;
501 u8 idcode[IDCODE_LEN], *idp;
503 spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
505 printf("SF: Failed to set up slave\n");
509 ret = spi_claim_bus(spi);
511 debug("SF: Failed to claim SPI bus: %d\n", ret);
515 /* Read the ID codes */
516 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
521 printf("SF: Got idcodes\n");
522 print_buffer(0, idcode, 1, sizeof(idcode), 0);
525 /* count the number of continuation bytes */
526 for (shift = 0, idp = idcode;
527 shift < IDCODE_CONT_LEN && *idp == 0x7f;
531 /* search the table for matches in shift and id */
532 for (i = 0; i < ARRAY_SIZE(flashes); ++i)
533 if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
534 /* we have a match, call probe */
535 flash = flashes[i].probe(spi, idp);
541 printf("SF: Unsupported manufacturer %02x\n", *idp);
542 goto err_manufacturer_probe;
545 #ifdef CONFIG_SPI_FLASH_BAR
546 /* Configure the BAR - disover bank cmds and read current bank */
547 ret = spi_flash_bank_config(flash, *idp);
549 goto err_manufacturer_probe;
552 #ifdef CONFIG_OF_CONTROL
553 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
554 debug("SF: FDT decode error\n");
555 goto err_manufacturer_probe;
558 printf("SF: Detected %s with page size ", flash->name);
559 print_size(flash->sector_size, ", total ");
560 print_size(flash->size, "");
561 if (flash->memory_map)
562 printf(", mapped at %p", flash->memory_map);
565 spi_release_bus(spi);
569 err_manufacturer_probe:
571 spi_release_bus(spi);
577 void *spi_flash_do_alloc(int offset, int size, struct spi_slave *spi,
580 struct spi_flash *flash;
585 debug("SF: Failed to allocate memory\n");
588 memset(ptr, '\0', size);
589 flash = (struct spi_flash *)(ptr + offset);
591 /* Set up some basic fields - caller will sort out sizes */
594 flash->poll_cmd = CMD_READ_STATUS;
596 flash->read = spi_flash_cmd_read_fast;
597 flash->write = spi_flash_cmd_write_multi;
598 flash->erase = spi_flash_cmd_erase;
603 void spi_flash_free(struct spi_flash *flash)
605 spi_free_slave(flash->spi);