drivers/mtd/spi/sf_ops.c

   1 /*
   2  * SPI flash operations
   3  *
   4  * Copyright (C) 2008 Atmel Corporation
   5  * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
   6  * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <malloc.h>
  13 #include <spi.h>
  14 #include <spi_flash.h>
  15 #include <watchdog.h>
  16
  17 #include "sf_internal.h"
  18
  19 static void spi_flash_addr(u32 addr, u8 *cmd)
  20 {
  21         /* cmd[0] is actual command */
  22         cmd[1] = addr >> 16;
  23         cmd[2] = addr >> 8;
  24         cmd[3] = addr >> 0;
  25 }
  26
  27 int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
  28 {
  29         int ret;
  30         u8 cmd;
  31
  32         cmd = CMD_READ_STATUS;
  33         ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
  34         if (ret < 0) {
  35                 debug("SF: fail to read status register\n");
  36                 return ret;
  37         }
  38
  39         return 0;
  40 }
  41
  42 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
  43 {
  44         u8 cmd;
  45         int ret;
  46
  47         cmd = CMD_WRITE_STATUS;
  48         ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
  49         if (ret < 0) {
  50                 debug("SF: fail to write status register\n");
  51                 return ret;
  52         }
  53
  54         return 0;
  55 }
  56
  57 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
  58 int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
  59 {
  60         int ret;
  61         u8 cmd;
  62
  63         cmd = CMD_READ_CONFIG;
  64         ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
  65         if (ret < 0) {
  66                 debug("SF: fail to read config register\n");
  67                 return ret;
  68         }
  69
  70         return 0;
  71 }
  72
  73 int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
  74 {
  75         u8 data[2];
  76         u8 cmd;
  77         int ret;
  78
  79         ret = spi_flash_cmd_read_status(flash, &data[0]);
  80         if (ret < 0)
  81                 return ret;
  82
  83         cmd = CMD_WRITE_STATUS;
  84         data[1] = wc;
  85         ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
  86         if (ret) {
  87                 debug("SF: fail to write config register\n");
  88                 return ret;
  89         }
  90
  91         return 0;
  92 }
  93 #endif
  94
  95 #ifdef CONFIG_SPI_FLASH_BAR
  96 static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
  97 {
  98         u8 cmd;
  99         int ret;
 100
 101         if (flash->bank_curr == bank_sel) {
 102                 debug("SF: not require to enable bank%d\n", bank_sel);
 103                 return 0;
 104         }
 105
 106         cmd = flash->bank_write_cmd;
 107         ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
 108         if (ret < 0) {
 109                 debug("SF: fail to write bank register\n");
 110                 return ret;
 111         }
 112         flash->bank_curr = bank_sel;
 113
 114         return 0;
 115 }
 116
 117 static int spi_flash_bank(struct spi_flash *flash, u32 offset)
 118 {
 119         u8 bank_sel;
 120         int ret;
 121
 122         bank_sel = offset / SPI_FLASH_16MB_BOUN;
 123
 124         ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
 125         if (ret) {
 126                 debug("SF: fail to set bank%d\n", bank_sel);
 127                 return ret;
 128         }
 129
 130         return bank_sel;
 131 }
 132 #endif
 133
 134 static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr)
 135 {
 136         switch (flash->dual_flash) {
 137         case SF_DUAL_STACKED_FLASH:
 138                 if (*addr >= (flash->size >> 1)) {
 139                         *addr -= flash->size >> 1;
 140                         flash->spi->flags |= SPI_XFER_U_PAGE;
 141                 } else {
 142                         flash->spi->flags &= ~SPI_XFER_U_PAGE;
 143                 }
 144                 break;
 145         default:
 146                 debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
 147                 break;
 148         }
 149 }
 150
 151 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
 152 {
 153         struct spi_slave *spi = flash->spi;
 154         unsigned long timebase;
 155         unsigned long flags = SPI_XFER_BEGIN;
 156         int ret;
 157         u8 status;
 158         u8 check_status = 0x0;
 159         u8 poll_bit = STATUS_WIP;
 160         u8 cmd = flash->poll_cmd;
 161
 162         if (cmd == CMD_FLAG_STATUS) {
 163                 poll_bit = STATUS_PEC;
 164                 check_status = poll_bit;
 165         }
 166
 167         if (spi->flags & SPI_XFER_U_PAGE)
 168                 flags |= SPI_XFER_U_PAGE;
 169
 170         ret = spi_xfer(spi, 8, &cmd, NULL, flags);
 171         if (ret) {
 172                 debug("SF: fail to read %s status register\n",
 173                       cmd == CMD_READ_STATUS ? "read" : "flag");
 174                 return ret;
 175         }
 176
 177         timebase = get_timer(0);
 178         do {
 179                 WATCHDOG_RESET();
 180
 181                 ret = spi_xfer(spi, 8, NULL, &status, 0);
 182                 if (ret)
 183                         return -1;
 184
 185                 if ((status & poll_bit) == check_status)
 186                         break;
 187
 188         } while (get_timer(timebase) < timeout);
 189
 190         spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
 191
 192         if ((status & poll_bit) == check_status)
 193                 return 0;
 194
 195         /* Timed out */
 196         debug("SF: time out!\n");
 197         return -1;
 198 }
 199
 200 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
 201                 size_t cmd_len, const void *buf, size_t buf_len)
 202 {
 203         struct spi_slave *spi = flash->spi;
 204         unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
 205         int ret;
 206
 207         if (buf == NULL)
 208                 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
 209
 210         ret = spi_claim_bus(flash->spi);
 211         if (ret) {
 212                 debug("SF: unable to claim SPI bus\n");
 213                 return ret;
 214         }
 215
 216         ret = spi_flash_cmd_write_enable(flash);
 217         if (ret < 0) {
 218                 debug("SF: enabling write failed\n");
 219                 return ret;
 220         }
 221
 222         ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
 223         if (ret < 0) {
 224                 debug("SF: write cmd failed\n");
 225                 return ret;
 226         }
 227
 228         ret = spi_flash_cmd_wait_ready(flash, timeout);
 229         if (ret < 0) {
 230                 debug("SF: write %s timed out\n",
 231                       timeout == SPI_FLASH_PROG_TIMEOUT ?
 232                         "program" : "page erase");
 233                 return ret;
 234         }
 235
 236         spi_release_bus(spi);
 237
 238         return ret;
 239 }
 240
 241 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
 242 {
 243         u32 erase_size, erase_addr;
 244         u8 cmd[SPI_FLASH_CMD_LEN];
 245         int ret = -1;
 246
 247         erase_size = flash->erase_size;
 248         if (offset % erase_size || len % erase_size) {
 249                 debug("SF: Erase offset/length not multiple of erase size\n");
 250                 return -1;
 251         }
 252
 253         cmd[0] = flash->erase_cmd;
 254         while (len) {
 255                 erase_addr = offset;
 256
 257                 if (flash->dual_flash > SF_SINGLE_FLASH)
 258                         spi_flash_dual_flash(flash, &erase_addr);
 259
 260 #ifdef CONFIG_SPI_FLASH_BAR
 261                 ret = spi_flash_bank(flash, erase_addr);
 262                 if (ret < 0)
 263                         return ret;
 264 #endif
 265                 spi_flash_addr(erase_addr, cmd);
 266
 267                 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
 268                       cmd[2], cmd[3], erase_addr);
 269
 270                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
 271                 if (ret < 0) {
 272                         debug("SF: erase failed\n");
 273                         break;
 274                 }
 275
 276                 offset += erase_size;
 277                 len -= erase_size;
 278         }
 279
 280         return ret;
 281 }
 282
 283 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 284                 size_t len, const void *buf)
 285 {
 286         unsigned long byte_addr, page_size;
 287         u32 write_addr;
 288         size_t chunk_len, actual;
 289         u8 cmd[SPI_FLASH_CMD_LEN];
 290         int ret = -1;
 291
 292         page_size = flash->page_size;
 293
 294         cmd[0] = flash->write_cmd;
 295         for (actual = 0; actual < len; actual += chunk_len) {
 296                 write_addr = offset;
 297
 298                 if (flash->dual_flash > SF_SINGLE_FLASH)
 299                         spi_flash_dual_flash(flash, &write_addr);
 300
 301 #ifdef CONFIG_SPI_FLASH_BAR
 302                 ret = spi_flash_bank(flash, write_addr);
 303                 if (ret < 0)
 304                         return ret;
 305 #endif
 306                 byte_addr = offset % page_size;
 307                 chunk_len = min(len - actual, page_size - byte_addr);
 308
 309                 if (flash->spi->max_write_size)
 310                         chunk_len = min(chunk_len, flash->spi->max_write_size);
 311
 312                 spi_flash_addr(write_addr, cmd);
 313
 314                 debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
 315                       buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 316
 317                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
 318                                         buf + actual, chunk_len);
 319                 if (ret < 0) {
 320                         debug("SF: write failed\n");
 321                         break;
 322                 }
 323
 324                 offset += chunk_len;
 325         }
 326
 327         return ret;
 328 }
 329
 330 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
 331                 size_t cmd_len, void *data, size_t data_len)
 332 {
 333         struct spi_slave *spi = flash->spi;
 334         int ret;
 335
 336         ret = spi_claim_bus(flash->spi);
 337         if (ret) {
 338                 debug("SF: unable to claim SPI bus\n");
 339                 return ret;
 340         }
 341
 342         ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
 343         if (ret < 0) {
 344                 debug("SF: read cmd failed\n");
 345                 return ret;
 346         }
 347
 348         spi_release_bus(spi);
 349
 350         return ret;
 351 }
 352
 353 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 354                 size_t len, void *data)
 355 {
 356         u8 *cmd, cmdsz;
 357         u32 remain_len, read_len, read_addr;
 358         int bank_sel = 0;
 359         int ret = -1;
 360
 361         /* Handle memory-mapped SPI */
 362         if (flash->memory_map) {
 363                 ret = spi_claim_bus(flash->spi);
 364                 if (ret) {
 365                         debug("SF: unable to claim SPI bus\n");
 366                         return ret;
 367                 }
 368                 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP);
 369                 memcpy(data, flash->memory_map + offset, len);
 370                 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
 371                 spi_release_bus(flash->spi);
 372                 return 0;
 373         }
 374
 375         cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
 376         cmd = malloc(cmdsz);
 377         memset(cmd, 0, cmdsz);
 378
 379         cmd[0] = flash->read_cmd;
 380         while (len) {
 381                 read_addr = offset;
 382
 383                 if (flash->dual_flash > SF_SINGLE_FLASH)
 384                         spi_flash_dual_flash(flash, &read_addr);
 385
 386 #ifdef CONFIG_SPI_FLASH_BAR
 387                 bank_sel = spi_flash_bank(flash, read_addr);
 388                 if (bank_sel < 0)
 389                         return ret;
 390 #endif
 391                 remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1)) - offset;
 392                 if (len < remain_len)
 393                         read_len = len;
 394                 else
 395                         read_len = remain_len;
 396
 397                 spi_flash_addr(read_addr, cmd);
 398
 399                 ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
 400                 if (ret < 0) {
 401                         debug("SF: read failed\n");
 402                         break;
 403                 }
 404
 405                 offset += read_len;
 406                 len -= read_len;
 407                 data += read_len;
 408         }
 409
 410         return ret;
 411 }
 412
 413 #ifdef CONFIG_SPI_FLASH_SST
 414 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
 415 {
 416         int ret;
 417         u8 cmd[4] = {
 418                 CMD_SST_BP,
 419                 offset >> 16,
 420                 offset >> 8,
 421                 offset,
 422         };
 423
 424         debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 425               spi_w8r8(flash->spi, CMD_READ_STATUS), buf, cmd[0], offset);
 426
 427         ret = spi_flash_cmd_write_enable(flash);
 428         if (ret)
 429                 return ret;
 430
 431         ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
 432         if (ret)
 433                 return ret;
 434
 435         return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 436 }
 437
 438 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
 439                 const void *buf)
 440 {
 441         size_t actual, cmd_len;
 442         int ret;
 443         u8 cmd[4];
 444
 445         ret = spi_claim_bus(flash->spi);
 446         if (ret) {
 447                 debug("SF: Unable to claim SPI bus\n");
 448                 return ret;
 449         }
 450
 451         /* If the data is not word aligned, write out leading single byte */
 452         actual = offset % 2;
 453         if (actual) {
 454                 ret = sst_byte_write(flash, offset, buf);
 455                 if (ret)
 456                         goto done;
 457         }
 458         offset += actual;
 459
 460         ret = spi_flash_cmd_write_enable(flash);
 461         if (ret)
 462                 goto done;
 463
 464         cmd_len = 4;
 465         cmd[0] = CMD_SST_AAI_WP;
 466         cmd[1] = offset >> 16;
 467         cmd[2] = offset >> 8;
 468         cmd[3] = offset;
 469
 470         for (; actual < len - 1; actual += 2) {
 471                 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 472                       spi_w8r8(flash->spi, CMD_READ_STATUS), buf + actual,
 473                       cmd[0], offset);
 474
 475                 ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
 476                                         buf + actual, 2);
 477                 if (ret) {
 478                         debug("SF: sst word program failed\n");
 479                         break;
 480                 }
 481
 482                 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 483                 if (ret)
 484                         break;
 485
 486                 cmd_len = 1;
 487                 offset += 2;
 488         }
 489
 490         if (!ret)
 491                 ret = spi_flash_cmd_write_disable(flash);
 492
 493         /* If there is a single trailing byte, write it out */
 494         if (!ret && actual != len)
 495                 ret = sst_byte_write(flash, offset, buf + actual);
 496
 497  done:
 498         debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
 499               ret ? "failure" : "success", len, offset - actual);
 500
 501         spi_release_bus(flash->spi);
 502         return ret;
 503 }
 504 #endif