4 * Copyright (C) 2008 Atmel Corporation
5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
6 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
8 * SPDX-License-Identifier: GPL-2.0+
15 #include <spi_flash.h>
17 #include <linux/compiler.h>
19 #include "sf_internal.h"
21 static void spi_flash_addr(u32 addr, u8 *cmd)
23 /* cmd[0] is actual command */
29 int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
34 cmd = CMD_READ_STATUS;
35 ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
37 debug("SF: fail to read status register\n");
44 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
49 cmd = CMD_WRITE_STATUS;
50 ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
52 debug("SF: fail to write status register\n");
59 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
60 int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
65 cmd = CMD_READ_CONFIG;
66 ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
68 debug("SF: fail to read config register\n");
75 int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
81 ret = spi_flash_cmd_read_status(flash, &data[0]);
85 cmd = CMD_WRITE_STATUS;
87 ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
89 debug("SF: fail to write config register\n");
97 #ifdef CONFIG_SPI_FLASH_BAR
98 static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
103 if (flash->bank_curr == bank_sel) {
104 debug("SF: not require to enable bank%d\n", bank_sel);
108 cmd = flash->bank_write_cmd;
109 ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
111 debug("SF: fail to write bank register\n");
114 flash->bank_curr = bank_sel;
119 static int spi_flash_bank(struct spi_flash *flash, u32 offset)
124 bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
126 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
128 debug("SF: fail to set bank%d\n", bank_sel);
136 #ifdef CONFIG_SF_DUAL_FLASH
137 static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr)
139 switch (flash->dual_flash) {
140 case SF_DUAL_STACKED_FLASH:
141 if (*addr >= (flash->size >> 1)) {
142 *addr -= flash->size >> 1;
143 flash->spi->flags |= SPI_XFER_U_PAGE;
145 flash->spi->flags &= ~SPI_XFER_U_PAGE;
148 case SF_DUAL_PARALLEL_FLASH:
149 *addr >>= flash->shift;
152 debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
158 static int spi_flash_poll_status(struct spi_slave *spi, unsigned long timeout,
161 unsigned long timebase;
162 unsigned long flags = SPI_XFER_BEGIN;
165 u8 check_status = 0x0;
167 if (cmd == CMD_FLAG_STATUS)
168 check_status = poll_bit;
170 #ifdef CONFIG_SF_DUAL_FLASH
171 if (spi->flags & SPI_XFER_U_PAGE)
172 flags |= SPI_XFER_U_PAGE;
174 ret = spi_xfer(spi, 8, &cmd, NULL, flags);
176 debug("SF: fail to read %s status register\n",
177 cmd == CMD_READ_STATUS ? "read" : "flag");
181 timebase = get_timer(0);
185 ret = spi_xfer(spi, 8, NULL, &status, 0);
189 if ((status & poll_bit) == check_status)
192 } while (get_timer(timebase) < timeout);
194 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
196 if ((status & poll_bit) == check_status)
200 debug("SF: time out!\n");
204 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
206 struct spi_slave *spi = flash->spi;
208 u8 poll_bit = STATUS_WIP;
209 u8 cmd = CMD_READ_STATUS;
211 ret = spi_flash_poll_status(spi, timeout, cmd, poll_bit);
215 if (flash->poll_cmd == CMD_FLAG_STATUS) {
216 poll_bit = STATUS_PEC;
217 cmd = CMD_FLAG_STATUS;
218 ret = spi_flash_poll_status(spi, timeout, cmd, poll_bit);
226 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
227 size_t cmd_len, const void *buf, size_t buf_len)
229 struct spi_slave *spi = flash->spi;
230 unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
234 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
236 ret = spi_claim_bus(flash->spi);
238 debug("SF: unable to claim SPI bus\n");
242 ret = spi_flash_cmd_write_enable(flash);
244 debug("SF: enabling write failed\n");
248 ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
250 debug("SF: write cmd failed\n");
254 ret = spi_flash_cmd_wait_ready(flash, timeout);
256 debug("SF: write %s timed out\n",
257 timeout == SPI_FLASH_PROG_TIMEOUT ?
258 "program" : "page erase");
262 spi_release_bus(spi);
267 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
269 u32 erase_size, erase_addr;
270 u8 cmd[SPI_FLASH_CMD_LEN];
273 erase_size = flash->erase_size;
274 if (offset % erase_size || len % erase_size) {
275 debug("SF: Erase offset/length not multiple of erase size\n");
279 cmd[0] = flash->erase_cmd;
283 #ifdef CONFIG_SF_DUAL_FLASH
284 if (flash->dual_flash > SF_SINGLE_FLASH)
285 spi_flash_dual_flash(flash, &erase_addr);
287 #ifdef CONFIG_SPI_FLASH_BAR
288 ret = spi_flash_bank(flash, erase_addr);
292 spi_flash_addr(erase_addr, cmd);
294 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
295 cmd[2], cmd[3], erase_addr);
297 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
299 debug("SF: erase failed\n");
303 offset += erase_size;
310 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
311 size_t len, const void *buf)
313 unsigned long byte_addr, page_size;
315 size_t chunk_len, actual;
316 u8 cmd[SPI_FLASH_CMD_LEN];
319 page_size = flash->page_size;
321 cmd[0] = flash->write_cmd;
322 for (actual = 0; actual < len; actual += chunk_len) {
325 #ifdef CONFIG_SF_DUAL_FLASH
326 if (flash->dual_flash > SF_SINGLE_FLASH)
327 spi_flash_dual_flash(flash, &write_addr);
329 #ifdef CONFIG_SPI_FLASH_BAR
330 ret = spi_flash_bank(flash, write_addr);
334 byte_addr = offset % page_size;
335 chunk_len = min(len - actual, (size_t)(page_size - byte_addr));
337 if (flash->spi->max_write_size)
338 chunk_len = min(chunk_len,
339 (size_t)flash->spi->max_write_size);
341 spi_flash_addr(write_addr, cmd);
343 debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
344 buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
346 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
347 buf + actual, chunk_len);
349 debug("SF: write failed\n");
359 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
360 size_t cmd_len, void *data, size_t data_len)
362 struct spi_slave *spi = flash->spi;
365 ret = spi_claim_bus(flash->spi);
367 debug("SF: unable to claim SPI bus\n");
371 ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
373 debug("SF: read cmd failed\n");
377 spi_release_bus(spi);
382 void __weak spi_flash_copy_mmap(void *data, void *offset, size_t len)
384 memcpy(data, offset, len);
387 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
388 size_t len, void *data)
391 u32 remain_len, read_len, read_addr;
395 /* Handle memory-mapped SPI */
396 if (flash->memory_map) {
397 ret = spi_claim_bus(flash->spi);
399 debug("SF: unable to claim SPI bus\n");
402 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP);
403 spi_flash_copy_mmap(data, flash->memory_map + offset, len);
404 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
405 spi_release_bus(flash->spi);
409 cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
410 cmd = calloc(1, cmdsz);
412 debug("SF: Failed to allocate cmd\n");
416 cmd[0] = flash->read_cmd;
420 #ifdef CONFIG_SF_DUAL_FLASH
421 if (flash->dual_flash > SF_SINGLE_FLASH)
422 spi_flash_dual_flash(flash, &read_addr);
424 #ifdef CONFIG_SPI_FLASH_BAR
425 bank_sel = spi_flash_bank(flash, read_addr);
429 remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
430 (bank_sel + 1)) - offset;
431 if (len < remain_len)
434 read_len = remain_len;
436 spi_flash_addr(read_addr, cmd);
438 ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
440 debug("SF: read failed\n");
453 #ifdef CONFIG_SPI_FLASH_SST
454 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
464 debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
465 spi_w8r8(flash->spi, CMD_READ_STATUS), buf, cmd[0], offset);
467 ret = spi_flash_cmd_write_enable(flash);
471 ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
475 return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
478 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
481 size_t actual, cmd_len;
485 ret = spi_claim_bus(flash->spi);
487 debug("SF: Unable to claim SPI bus\n");
491 /* If the data is not word aligned, write out leading single byte */
494 ret = sst_byte_write(flash, offset, buf);
500 ret = spi_flash_cmd_write_enable(flash);
505 cmd[0] = CMD_SST_AAI_WP;
506 cmd[1] = offset >> 16;
507 cmd[2] = offset >> 8;
510 for (; actual < len - 1; actual += 2) {
511 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
512 spi_w8r8(flash->spi, CMD_READ_STATUS), buf + actual,
515 ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
518 debug("SF: sst word program failed\n");
522 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
531 ret = spi_flash_cmd_write_disable(flash);
533 /* If there is a single trailing byte, write it out */
534 if (!ret && actual != len)
535 ret = sst_byte_write(flash, offset, buf + actual);
538 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
539 ret ? "failure" : "success", len, offset - actual);
541 spi_release_bus(flash->spi);
545 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
551 ret = spi_claim_bus(flash->spi);
553 debug("SF: Unable to claim SPI bus\n");
557 for (actual = 0; actual < len; actual++) {
558 ret = sst_byte_write(flash, offset, buf + actual);
560 debug("SF: sst byte program failed\n");
567 ret = spi_flash_cmd_write_disable(flash);
569 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
570 ret ? "failure" : "success", len, offset - actual);
572 spi_release_bus(flash->spi);