2 * SPI flash internal definitions
4 * Copyright (C) 2008 Atmel Corporation
5 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef _SF_INTERNAL_H_
11 #define _SF_INTERNAL_H_
13 #include <linux/types.h>
14 #include <linux/compiler.h>
16 /* Dual SPI flash memories - see SPI_COMM_DUAL_... */
19 SF_DUAL_STACKED_FLASH = BIT(0),
20 SF_DUAL_PARALLEL_FLASH = BIT(1),
23 enum spi_nor_option_flags {
24 SNOR_F_SST_WR = BIT(0),
25 SNOR_F_USE_FSR = BIT(1),
28 #define SPI_FLASH_3B_ADDR_LEN 3
29 #define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
30 #define SPI_FLASH_16MB_BOUN 0x1000000
32 /* CFI Manufacture ID's */
33 #define SPI_FLASH_CFI_MFR_SPANSION 0x01
34 #define SPI_FLASH_CFI_MFR_STMICRO 0x20
35 #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
36 #define SPI_FLASH_CFI_MFR_SST 0xbf
37 #define SPI_FLASH_CFI_MFR_WINBOND 0xef
38 #define SPI_FLASH_CFI_MFR_ATMEL 0x1f
41 #define CMD_ERASE_4K 0x20
42 #define CMD_ERASE_CHIP 0xc7
43 #define CMD_ERASE_64K 0xd8
46 #define CMD_WRITE_STATUS 0x01
47 #define CMD_PAGE_PROGRAM 0x02
48 #define CMD_WRITE_DISABLE 0x04
49 #define CMD_WRITE_ENABLE 0x06
50 #define CMD_QUAD_PAGE_PROGRAM 0x32
51 #define CMD_WRITE_EVCR 0x61
54 #define CMD_READ_ARRAY_SLOW 0x03
55 #define CMD_READ_ARRAY_FAST 0x0b
56 #define CMD_READ_DUAL_OUTPUT_FAST 0x3b
57 #define CMD_READ_DUAL_IO_FAST 0xbb
58 #define CMD_READ_QUAD_OUTPUT_FAST 0x6b
59 #define CMD_READ_QUAD_IO_FAST 0xeb
60 #define CMD_READ_ID 0x9f
61 #define CMD_READ_STATUS 0x05
62 #define CMD_READ_STATUS1 0x35
63 #define CMD_READ_CONFIG 0x35
64 #define CMD_FLAG_STATUS 0x70
65 #define CMD_READ_EVCR 0x65
67 /* Bank addr access commands */
68 #ifdef CONFIG_SPI_FLASH_BAR
69 # define CMD_BANKADDR_BRWR 0x17
70 # define CMD_BANKADDR_BRRD 0x16
71 # define CMD_EXTNADDR_WREAR 0xC5
72 # define CMD_EXTNADDR_RDEAR 0xC8
76 #define STATUS_WIP BIT(0)
77 #define STATUS_QEB_WINSPAN BIT(1)
78 #define STATUS_QEB_MXIC BIT(6)
79 #define STATUS_PEC BIT(7)
80 #define STATUS_QEB_MICRON BIT(7)
81 #define SR_BP0 BIT(2) /* Block protect 0 */
82 #define SR_BP1 BIT(3) /* Block protect 1 */
83 #define SR_BP2 BIT(4) /* Block protect 2 */
85 /* Flash timeout values */
86 #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
87 #define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
88 #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
91 #ifdef CONFIG_SPI_FLASH_SST
92 # define CMD_SST_BP 0x02 /* Byte Program */
93 # define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */
95 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
97 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
101 #ifdef CONFIG_SPI_FLASH_SPANSION
102 /* Used for Spansion S25FS-S family flash only. */
103 #define CMD_SPANSION_RDAR 0x65 /* Read any device register */
104 #define CMD_SPANSION_WRAR 0x71 /* Write any device register */
107 #define JEDEC_MFR(info) ((info)->id[0])
108 #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2]))
109 #define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))
110 #define SPI_FLASH_MAX_ID_LEN 6
112 struct spi_flash_info {
113 /* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */
117 * This array stores the ID bytes.
118 * The first three bytes are the JEDIC ID.
119 * JEDEC ID zero means "no ID" (mostly older chips).
121 u8 id[SPI_FLASH_MAX_ID_LEN];
125 * The size listed here is what works with SPINOR_OP_SE, which isn't
126 * necessarily called a "sector" by the vendor.
134 #define SECT_4K BIT(0) /* CMD_ERASE_4K works uniformly */
135 #define E_FSR BIT(1) /* use flag status register for */
136 #define SST_WR BIT(2) /* use SST byte/word programming */
137 #define WR_QPP BIT(3) /* use Quad Page Program */
138 #define RD_QUAD BIT(4) /* use Quad Read */
139 #define RD_DUAL BIT(5) /* use Dual Read */
140 #define RD_QUADIO BIT(6) /* use Quad IO Read */
141 #define RD_DUALIO BIT(7) /* use Dual IO Read */
142 #define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO)
145 extern const struct spi_flash_info spi_flash_ids[];
147 /* Send a single-byte command to the device and read the response */
148 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
151 * Send a multi-byte command to the device and read the response. Used
152 * for flash array reads, etc.
154 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
155 size_t cmd_len, void *data, size_t data_len);
158 * Send a multi-byte command to the device followed by (optional)
159 * data. Used for programming the flash array, etc.
161 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
162 const void *data, size_t data_len);
165 /* Flash erase(sectors) operation, support all possible erase commands */
166 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
168 /* Lock stmicro spi flash region */
169 int stm_lock(struct spi_flash *flash, u32 ofs, size_t len);
171 /* Unlock stmicro spi flash region */
172 int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len);
174 /* Check if a stmicro spi flash region is completely locked */
175 int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len);
177 /* Enable writing on the SPI flash */
178 static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
180 return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
183 /* Disable writing on the SPI flash */
184 static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
186 return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
190 * Used for spi_flash write operation
192 * - spi_flash_cmd_write_enable
193 * - spi_flash_cmd_write
194 * - spi_flash_cmd_wait_ready
197 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
198 size_t cmd_len, const void *buf, size_t buf_len);
201 * Flash write operation, support all possible write commands.
202 * Write the requested data out breaking it up into multiple write
203 * commands as needed per the write size.
205 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
206 size_t len, const void *buf);
209 * Same as spi_flash_cmd_read() except it also claims/releases the SPI
210 * bus. Used as common part of the ->read() operation.
212 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
213 size_t cmd_len, void *data, size_t data_len);
215 /* Flash read operation, support all possible read commands */
216 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
217 size_t len, void *data);
219 #ifdef CONFIG_SPI_FLASH_MTD
220 int spi_flash_mtd_register(struct spi_flash *flash);
221 void spi_flash_mtd_unregister(void);
225 * spi_flash_scan - scan the SPI FLASH
226 * @flash: the spi flash structure
228 * The drivers can use this fuction to scan the SPI FLASH.
229 * In the scanning, it will try to get all the necessary information to
230 * fill the spi_flash{}.
232 * Return: 0 for success, others for failure.
234 int spi_flash_scan(struct spi_flash *flash);
236 #endif /* _SF_INTERNAL_H_ */