3 * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
5 * SPDX-License-Identifier: GPL-2.0+
9 * Note: RAMTRON SPI FRAMs are ferroelectric, nonvolatile RAMs
10 * with an interface identical to SPI flash devices.
11 * However since they behave like RAM there are no delays or
12 * busy polls required. They can sustain read or write at the
13 * allowed SPI bus speed, which can be 40 MHz for some devices.
15 * Unfortunately some RAMTRON devices do not have a means of
16 * identifying them. They will leave the SO line undriven when
17 * the READ-ID command is issued. It is therefore mandatory
18 * that the MISO line has a proper pull-up, so that READ-ID
19 * will return a row of 0xff. This 0xff pseudo-id will cause
20 * probes by all vendor specific functions that are designed
21 * to handle it. If the MISO line is not pulled up, READ-ID
22 * could return any random noise, even mimicking another
25 * We use CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
26 * to define which device will be assumed after a simple status
27 * register verify. This method is prone to false positive
28 * detection and should therefore be the last to be tried.
29 * Enter it in the last position in the table in spi_flash.c!
31 * The define CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC both activates
32 * compilation of the special handler and defines the device
39 #include <spi_flash.h>
40 #include "sf_internal.h"
43 * Properties of supported FRAMs
44 * Note: speed is currently not used because we have no method to deliver that
45 * value to the upper layers
47 struct ramtron_spi_fram_params {
48 u32 size; /* size in bytes */
49 u8 addr_len; /* number of address bytes */
50 u8 merge_cmd; /* some address bits are in the command byte */
51 u8 id1; /* device ID 1 (family, density) */
52 u8 id2; /* device ID 2 (sub, rev, rsvd) */
53 u32 speed; /* max. SPI clock in Hz */
54 const char *name; /* name for display and/or matching */
57 struct ramtron_spi_fram {
58 struct spi_flash flash;
59 const struct ramtron_spi_fram_params *params;
62 static inline struct ramtron_spi_fram *to_ramtron_spi_fram(struct spi_flash
65 return container_of(flash, struct ramtron_spi_fram, flash);
69 * table describing supported FRAM chips:
70 * chips without RDID command must have the values 0xff for id1 and id2
72 static const struct ramtron_spi_fram_params ramtron_spi_fram_table[] = {
127 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
140 static int ramtron_common(struct spi_flash *flash,
141 u32 offset, size_t len, void *buf, u8 command)
143 struct ramtron_spi_fram *sn = to_ramtron_spi_fram(flash);
148 if (sn->params->addr_len == 3 && sn->params->merge_cmd == 0) {
150 cmd[1] = offset >> 16;
151 cmd[2] = offset >> 8;
154 } else if (sn->params->addr_len == 2 && sn->params->merge_cmd == 0) {
156 cmd[1] = offset >> 8;
160 printf("SF: unsupported addr_len or merge_cmd\n");
165 ret = spi_claim_bus(flash->spi);
167 debug("SF: Unable to claim SPI bus\n");
171 if (command == CMD_PAGE_PROGRAM) {
173 ret = spi_flash_cmd_write_enable(flash);
175 debug("SF: Enabling Write failed\n");
180 /* do the transaction */
181 if (command == CMD_PAGE_PROGRAM)
182 ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len, buf, len);
184 ret = spi_flash_cmd_read(flash->spi, cmd, cmd_len, buf, len);
186 debug("SF: Transaction failed\n");
189 /* release the bus */
190 spi_release_bus(flash->spi);
194 static int ramtron_read(struct spi_flash *flash,
195 u32 offset, size_t len, void *buf)
197 return ramtron_common(flash, offset, len, buf,
198 CMD_READ_ARRAY_SLOW);
201 static int ramtron_write(struct spi_flash *flash,
202 u32 offset, size_t len, const void *buf)
204 return ramtron_common(flash, offset, len, (void *)buf,
208 static int ramtron_erase(struct spi_flash *flash, u32 offset, size_t len)
210 debug("SF: Erase of RAMTRON FRAMs is pointless\n");
215 * nore: we are called here with idcode pointing to the first non-0x7f byte
218 static struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi,
221 const struct ramtron_spi_fram_params *params;
222 struct ramtron_spi_fram *sn;
224 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
229 /* NOTE: the bus has been claimed before this function is called! */
232 /* JEDEC conformant RAMTRON id */
233 for (i = 0; i < ARRAY_SIZE(ramtron_spi_fram_table); i++) {
234 params = &ramtron_spi_fram_table[i];
235 if (idcode[1] == params->id1 &&
236 idcode[2] == params->id2)
240 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
243 * probably open MISO line, pulled up.
244 * We COULD have a non JEDEC conformant FRAM here,
245 * read the status register to verify
247 ret = spi_flash_cmd(spi, CMD_READ_STATUS, &sr, 1);
251 /* Bits 5,4,0 are fixed 0 for all devices */
252 if ((sr & 0x31) != 0x00)
254 /* now find the device */
255 for (i = 0; i < ARRAY_SIZE(ramtron_spi_fram_table); i++) {
256 params = &ramtron_spi_fram_table[i];
257 if (!strcmp(params->name,
258 CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC))
261 debug("SF: Unsupported non-JEDEC RAMTRON device "
262 CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC "\n");
269 /* arriving here means no method has found a device we can handle */
270 debug("SF/ramtron: unsupported device id0=%02x id1=%02x id2=%02x\n",
271 idcode[0], idcode[1], idcode[2]);
275 sn = malloc(sizeof(*sn));
277 debug("SF: Failed to allocate memory\n");
283 sn->flash.write = ramtron_write;
284 sn->flash.read = ramtron_read;
285 sn->flash.erase = ramtron_erase;
286 sn->flash.size = params->size;
292 * The following table holds all device probe functions
293 * (All flashes are removed and implemented a common probe at
296 * shift: number of continuation bytes before the ID
297 * idcode: the expected IDCODE or 0xff for non JEDEC devices
298 * probe: the function to call
300 * Non JEDEC devices should be ordered in the table such that
301 * the probe functions with best detection algorithms come first.
303 * Several matching entries are permitted, they will be tried
304 * in sequence until a probe function returns non NULL.
306 * IDCODE_CONT_LEN may be redefined if a device needs to declare a
307 * larger "shift" value. IDCODE_PART_LEN generally shouldn't be
308 * changed. This is the max number of bytes probe functions may
309 * examine when looking up part-specific identification info.
311 * Probe functions will be given the idcode buffer starting at their
312 * manu id byte (the "idcode" in the table below). In other words,
313 * all of the continuation bytes will be skipped (the "shift" below).
315 #define IDCODE_CONT_LEN 0
316 #define IDCODE_PART_LEN 5
317 static const struct {
320 struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
322 /* Keep it sorted by define name */
323 #ifdef CONFIG_SPI_FRAM_RAMTRON
324 { 6, 0xc2, spi_fram_probe_ramtron, },
325 # undef IDCODE_CONT_LEN
326 # define IDCODE_CONT_LEN 6
328 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
329 { 0, 0xff, spi_fram_probe_ramtron, },
332 #define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
334 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
335 unsigned int max_hz, unsigned int spi_mode)
337 struct spi_slave *spi;
338 struct spi_flash *flash = NULL;
340 u8 idcode[IDCODE_LEN], *idp;
342 spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
344 printf("SF: Failed to set up slave\n");
348 ret = spi_claim_bus(spi);
350 debug("SF: Failed to claim SPI bus: %d\n", ret);
354 /* Read the ID codes */
355 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
360 printf("SF: Got idcodes\n");
361 print_buffer(0, idcode, 1, sizeof(idcode), 0);
364 /* count the number of continuation bytes */
365 for (shift = 0, idp = idcode;
366 shift < IDCODE_CONT_LEN && *idp == 0x7f;
370 /* search the table for matches in shift and id */
371 for (i = 0; i < ARRAY_SIZE(flashes); ++i)
372 if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
373 /* we have a match, call probe */
374 flash = flashes[i].probe(spi, idp);
380 printf("SF: Unsupported manufacturer %02x\n", *idp);
381 goto err_manufacturer_probe;
384 printf("SF: Detected %s with total size ", flash->name);
385 print_size(flash->size, "");
388 spi_release_bus(spi);
392 err_manufacturer_probe:
394 spi_release_bus(spi);
400 void spi_flash_free(struct spi_flash *flash)
402 spi_free_slave(flash->spi);