2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2007 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
13 #include <linux/mtd/compat.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/onenand.h>
18 #include <asm/errno.h>
21 /* It should access 16-bit instead of 8-bit */
22 static inline void *memcpy_16(void *dst, const void *src, unsigned int len)
34 static const unsigned char ffchars[] = {
35 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
36 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
37 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
38 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
39 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
40 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
41 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
42 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
46 * onenand_readw - [OneNAND Interface] Read OneNAND register
47 * @param addr address to read
49 * Read OneNAND register
51 static unsigned short onenand_readw(void __iomem * addr)
57 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
58 * @param value value to write
59 * @param addr address to write
61 * Write OneNAND register with value
63 static void onenand_writew(unsigned short value, void __iomem * addr)
69 * onenand_block_address - [DEFAULT] Get block address
70 * @param device the device id
71 * @param block the block
72 * @return translated block address if DDP, otherwise same
74 * Setup Start Address 1 Register (F100h)
76 static int onenand_block_address(int device, int block)
78 if (device & ONENAND_DEVICE_IS_DDP) {
79 /* Device Flash Core select, NAND Flash Block Address */
80 int dfs = 0, density, mask;
82 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
83 mask = (1 << (density + 6));
88 return (dfs << ONENAND_DDP_SHIFT) | (block & (mask - 1));
95 * onenand_bufferram_address - [DEFAULT] Get bufferram address
96 * @param device the device id
97 * @param block the block
98 * @return set DBS value if DDP, otherwise 0
100 * Setup Start Address 2 Register (F101h) for DDP
102 static int onenand_bufferram_address(int device, int block)
104 if (device & ONENAND_DEVICE_IS_DDP) {
105 /* Device BufferRAM Select */
106 int dbs = 0, density, mask;
108 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
109 mask = (1 << (density + 6));
114 return (dbs << ONENAND_DDP_SHIFT);
121 * onenand_page_address - [DEFAULT] Get page address
122 * @param page the page address
123 * @param sector the sector address
124 * @return combined page and sector address
126 * Setup Start Address 8 Register (F107h)
128 static int onenand_page_address(int page, int sector)
130 /* Flash Page Address, Flash Sector Address */
133 fpa = page & ONENAND_FPA_MASK;
134 fsa = sector & ONENAND_FSA_MASK;
136 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
140 * onenand_buffer_address - [DEFAULT] Get buffer address
141 * @param dataram1 DataRAM index
142 * @param sectors the sector address
143 * @param count the number of sectors
144 * @return the start buffer value
146 * Setup Start Buffer Register (F200h)
148 static int onenand_buffer_address(int dataram1, int sectors, int count)
152 /* BufferRAM Sector Address */
153 bsa = sectors & ONENAND_BSA_MASK;
156 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
158 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
160 /* BufferRAM Sector Count */
161 bsc = count & ONENAND_BSC_MASK;
163 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
167 * onenand_command - [DEFAULT] Send command to OneNAND device
168 * @param mtd MTD device structure
169 * @param cmd the command to be sent
170 * @param addr offset to read from or write to
171 * @param len number of bytes to read or write
173 * Send command to OneNAND device. This function is used for middle/large page
174 * devices (1KB/2KB Bytes per page)
176 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr,
179 struct onenand_chip *this = mtd->priv;
180 int value, readcmd = 0;
182 /* Now we use page size operation */
183 int sectors = 4, count = 4;
185 /* Address translation */
187 case ONENAND_CMD_UNLOCK:
188 case ONENAND_CMD_LOCK:
189 case ONENAND_CMD_LOCK_TIGHT:
194 case ONENAND_CMD_ERASE:
195 case ONENAND_CMD_BUFFERRAM:
196 block = (int)(addr >> this->erase_shift);
201 block = (int)(addr >> this->erase_shift);
202 page = (int)(addr >> this->page_shift);
203 page &= this->page_mask;
207 /* NOTE: The setting order of the registers is very important! */
208 if (cmd == ONENAND_CMD_BUFFERRAM) {
209 /* Select DataRAM for DDP */
210 value = onenand_bufferram_address(this->device_id, block);
211 this->write_word(value,
212 this->base + ONENAND_REG_START_ADDRESS2);
214 /* Switch to the next data buffer */
215 ONENAND_SET_NEXT_BUFFERRAM(this);
221 /* Write 'DFS, FBA' of Flash */
222 value = onenand_block_address(this->device_id, block);
223 this->write_word(value,
224 this->base + ONENAND_REG_START_ADDRESS1);
231 case ONENAND_CMD_READ:
232 case ONENAND_CMD_READOOB:
233 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
238 dataram = ONENAND_CURRENT_BUFFERRAM(this);
242 /* Write 'FPA, FSA' of Flash */
243 value = onenand_page_address(page, sectors);
244 this->write_word(value,
245 this->base + ONENAND_REG_START_ADDRESS8);
247 /* Write 'BSA, BSC' of DataRAM */
248 value = onenand_buffer_address(dataram, sectors, count);
249 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
252 /* Select DataRAM for DDP */
254 onenand_bufferram_address(this->device_id, block);
255 this->write_word(value,
257 ONENAND_REG_START_ADDRESS2);
261 /* Interrupt clear */
262 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
264 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
270 * onenand_wait - [DEFAULT] wait until the command is done
271 * @param mtd MTD device structure
272 * @param state state to select the max. timeout value
274 * Wait for command done. This applies to all OneNAND command
275 * Read can take up to 30us, erase up to 2ms and program up to 350us
276 * according to general OneNAND specs
278 static int onenand_wait(struct mtd_info *mtd, int state)
280 struct onenand_chip *this = mtd->priv;
281 unsigned int flags = ONENAND_INT_MASTER;
282 unsigned int interrupt = 0;
283 unsigned int ctrl, ecc;
286 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
287 if (interrupt & flags)
291 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
293 if (ctrl & ONENAND_CTRL_ERROR) {
294 MTDDEBUG (MTD_DEBUG_LEVEL0,
295 "onenand_wait: controller error = 0x%04x\n", ctrl);
299 if (ctrl & ONENAND_CTRL_LOCK) {
300 MTDDEBUG (MTD_DEBUG_LEVEL0,
301 "onenand_wait: it's locked error = 0x%04x\n", ctrl);
305 if (interrupt & ONENAND_INT_READ) {
306 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
307 if (ecc & ONENAND_ECC_2BIT_ALL) {
308 MTDDEBUG (MTD_DEBUG_LEVEL0,
309 "onenand_wait: ECC error = 0x%04x\n", ecc);
318 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
319 * @param mtd MTD data structure
320 * @param area BufferRAM area
321 * @return offset given area
323 * Return BufferRAM offset given area
325 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
327 struct onenand_chip *this = mtd->priv;
329 if (ONENAND_CURRENT_BUFFERRAM(this)) {
330 if (area == ONENAND_DATARAM)
331 return mtd->writesize;
332 if (area == ONENAND_SPARERAM)
340 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
341 * @param mtd MTD data structure
342 * @param area BufferRAM area
343 * @param buffer the databuffer to put/get data
344 * @param offset offset to read from or write to
345 * @param count number of bytes to read/write
347 * Read the BufferRAM area
349 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
350 unsigned char *buffer, int offset,
353 struct onenand_chip *this = mtd->priv;
354 void __iomem *bufferram;
356 bufferram = this->base + area;
357 bufferram += onenand_bufferram_offset(mtd, area);
359 memcpy_16(buffer, bufferram + offset, count);
365 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
366 * @param mtd MTD data structure
367 * @param area BufferRAM area
368 * @param buffer the databuffer to put/get data
369 * @param offset offset to read from or write to
370 * @param count number of bytes to read/write
372 * Read the BufferRAM area with Sync. Burst Mode
374 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
375 unsigned char *buffer, int offset,
378 struct onenand_chip *this = mtd->priv;
379 void __iomem *bufferram;
381 bufferram = this->base + area;
382 bufferram += onenand_bufferram_offset(mtd, area);
384 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
386 memcpy_16(buffer, bufferram + offset, count);
388 this->mmcontrol(mtd, 0);
394 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
395 * @param mtd MTD data structure
396 * @param area BufferRAM area
397 * @param buffer the databuffer to put/get data
398 * @param offset offset to read from or write to
399 * @param count number of bytes to read/write
401 * Write the BufferRAM area
403 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
404 const unsigned char *buffer, int offset,
407 struct onenand_chip *this = mtd->priv;
408 void __iomem *bufferram;
410 bufferram = this->base + area;
411 bufferram += onenand_bufferram_offset(mtd, area);
413 memcpy_16(bufferram + offset, buffer, count);
419 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
420 * @param mtd MTD data structure
421 * @param addr address to check
422 * @return 1 if there are valid data, otherwise 0
424 * Check bufferram if there is data we required
426 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
428 struct onenand_chip *this = mtd->priv;
432 block = (int)(addr >> this->erase_shift);
433 page = (int)(addr >> this->page_shift);
434 page &= this->page_mask;
436 i = ONENAND_CURRENT_BUFFERRAM(this);
438 /* Is there valid data? */
439 if (this->bufferram[i].block == block &&
440 this->bufferram[i].page == page && this->bufferram[i].valid)
447 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
448 * @param mtd MTD data structure
449 * @param addr address to update
450 * @param valid valid flag
452 * Update BufferRAM information
454 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
457 struct onenand_chip *this = mtd->priv;
461 block = (int)(addr >> this->erase_shift);
462 page = (int)(addr >> this->page_shift);
463 page &= this->page_mask;
465 /* Invalidate BufferRAM */
466 for (i = 0; i < MAX_BUFFERRAM; i++) {
467 if (this->bufferram[i].block == block &&
468 this->bufferram[i].page == page)
469 this->bufferram[i].valid = 0;
472 /* Update BufferRAM */
473 i = ONENAND_CURRENT_BUFFERRAM(this);
474 this->bufferram[i].block = block;
475 this->bufferram[i].page = page;
476 this->bufferram[i].valid = valid;
482 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
483 * @param mtd MTD data structure
484 * @param addr start address to invalidate
485 * @param len length to invalidate
487 * Invalidate BufferRAM information
489 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
492 struct onenand_chip *this = mtd->priv;
494 loff_t end_addr = addr + len;
496 /* Invalidate BufferRAM */
497 for (i = 0; i < MAX_BUFFERRAM; i++) {
498 loff_t buf_addr = this->bufferram[i].block << this->erase_shift;
500 if (buf_addr >= addr && buf_addr < end_addr)
501 this->bufferram[i].valid = 0;
506 * onenand_get_device - [GENERIC] Get chip for selected access
507 * @param mtd MTD device structure
508 * @param new_state the state which is requested
510 * Get the device and lock it for exclusive access
512 static void onenand_get_device(struct mtd_info *mtd, int new_state)
518 * onenand_release_device - [GENERIC] release chip
519 * @param mtd MTD device structure
521 * Deselect, release chip lock and wake up anyone waiting on the device
523 static void onenand_release_device(struct mtd_info *mtd)
529 * onenand_read_ecc - [MTD Interface] Read data with ECC
530 * @param mtd MTD device structure
531 * @param from offset to read from
532 * @param len number of bytes to read
533 * @param retlen pointer to variable to store the number of read bytes
534 * @param buf the databuffer to put data
535 * @param oob_buf filesystem supplied oob data buffer
536 * @param oobsel oob selection structure
538 * OneNAND read with ECC
540 static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
541 size_t * retlen, u_char * buf,
542 u_char * oob_buf, struct nand_oobinfo *oobsel)
544 struct onenand_chip *this = mtd->priv;
545 int read = 0, column;
549 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_read_ecc: "
550 "from = 0x%08x, len = %i\n",
551 (unsigned int)from, (int)len);
553 /* Do not allow reads past end of device */
554 if ((from + len) > mtd->size) {
555 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_read_ecc: "
556 "Attempt read beyond end of device\n");
561 /* Grab the lock and see if the device is available */
562 onenand_get_device(mtd, FL_READING);
565 thislen = min_t(int, mtd->writesize, len - read);
567 column = from & (mtd->writesize - 1);
568 if (column + thislen > mtd->writesize)
569 thislen = mtd->writesize - column;
571 if (!onenand_check_bufferram(mtd, from)) {
572 this->command(mtd, ONENAND_CMD_READ, from,
574 ret = this->wait(mtd, FL_READING);
575 /* First copy data and check return value for ECC handling */
576 onenand_update_bufferram(mtd, from, 1);
579 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column,
587 MTDDEBUG (MTD_DEBUG_LEVEL0,
588 "onenand_read_ecc: read failed = %d\n", ret);
596 /* Deselect and wake up anyone waiting on the device */
597 onenand_release_device(mtd);
600 * Return success, if no ECC failures, else -EBADMSG
601 * fs driver will take care of that, because
602 * retlen == desired len and result == -EBADMSG
609 * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
610 * @param mtd MTD device structure
611 * @param from offset to read from
612 * @param len number of bytes to read
613 * @param retlen pointer to variable to store the number of read bytes
614 * @param buf the databuffer to put data
616 * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
618 int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
619 size_t * retlen, u_char * buf)
621 return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL);
625 * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
626 * @param mtd MTD device structure
627 * @param from offset to read from
628 * @param len number of bytes to read
629 * @param retlen pointer to variable to store the number of read bytes
630 * @param buf the databuffer to put data
632 * OneNAND read out-of-band data from the spare area
634 int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
635 size_t * retlen, u_char * buf)
637 struct onenand_chip *this = mtd->priv;
638 int read = 0, thislen, column;
641 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_read_oob: "
642 "from = 0x%08x, len = %i\n",
643 (unsigned int)from, (int)len);
645 /* Initialize return length value */
648 /* Do not allow reads past end of device */
649 if (unlikely((from + len) > mtd->size)) {
650 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_read_oob: "
651 "Attempt read beyond end of device\n");
655 /* Grab the lock and see if the device is available */
656 onenand_get_device(mtd, FL_READING);
658 column = from & (mtd->oobsize - 1);
661 thislen = mtd->oobsize - column;
662 thislen = min_t(int, thislen, len);
664 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
666 onenand_update_bufferram(mtd, from, 0);
668 ret = this->wait(mtd, FL_READING);
669 /* First copy data and check return value for ECC handling */
671 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column,
679 MTDDEBUG (MTD_DEBUG_LEVEL0,
680 "onenand_read_oob: read failed = %d\n", ret);
688 from += mtd->writesize;
693 /* Deselect and wake up anyone waiting on the device */
694 onenand_release_device(mtd);
700 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
702 * onenand_verify_page - [GENERIC] verify the chip contents after a write
703 * @param mtd MTD device structure
704 * @param buf the databuffer to verify
706 * Check DataRAM area directly
708 static int onenand_verify_page(struct mtd_info *mtd, u_char * buf,
711 struct onenand_chip *this = mtd->priv;
712 void __iomem *dataram0, *dataram1;
715 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
717 ret = this->wait(mtd, FL_READING);
721 onenand_update_bufferram(mtd, addr, 1);
723 /* Check, if the two dataram areas are same */
724 dataram0 = this->base + ONENAND_DATARAM;
725 dataram1 = dataram0 + mtd->writesize;
727 if (memcmp(dataram0, dataram1, mtd->writesize))
733 #define onenand_verify_page(...) (0)
736 #define NOTALIGNED(x) ((x & (mtd->writesize - 1)) != 0)
739 * onenand_write_ecc - [MTD Interface] OneNAND write with ECC
740 * @param mtd MTD device structure
741 * @param to offset to write to
742 * @param len number of bytes to write
743 * @param retlen pointer to variable to store the number of written bytes
744 * @param buf the data to write
745 * @param eccbuf filesystem supplied oob data buffer
746 * @param oobsel oob selection structure
748 * OneNAND write with ECC
750 static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
751 size_t * retlen, const u_char * buf,
752 u_char * eccbuf, struct nand_oobinfo *oobsel)
754 struct onenand_chip *this = mtd->priv;
758 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_write_ecc: "
759 "to = 0x%08x, len = %i\n",
760 (unsigned int)to, (int)len);
762 /* Initialize retlen, in case of early exit */
765 /* Do not allow writes past end of device */
766 if (unlikely((to + len) > mtd->size)) {
767 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_ecc: "
768 "Attempt write to past end of device\n");
772 /* Reject writes, which are not page aligned */
773 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
774 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_ecc: "
775 "Attempt to write not page aligned data\n");
779 /* Grab the lock and see if the device is available */
780 onenand_get_device(mtd, FL_WRITING);
782 /* Loop until all data write */
783 while (written < len) {
784 int thislen = min_t(int, mtd->writesize, len - written);
786 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->writesize);
788 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
789 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0,
792 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
794 onenand_update_bufferram(mtd, to, 1);
796 ret = this->wait(mtd, FL_WRITING);
798 MTDDEBUG (MTD_DEBUG_LEVEL0,
799 "onenand_write_ecc: write filaed %d\n", ret);
805 /* Only check verify write turn on */
806 ret = onenand_verify_page(mtd, (u_char *) buf, to);
808 MTDDEBUG (MTD_DEBUG_LEVEL0,
809 "onenand_write_ecc: verify failed %d\n", ret);
820 /* Deselect and wake up anyone waiting on the device */
821 onenand_release_device(mtd);
829 * onenand_write - [MTD Interface] compability function for onenand_write_ecc
830 * @param mtd MTD device structure
831 * @param to offset to write to
832 * @param len number of bytes to write
833 * @param retlen pointer to variable to store the number of written bytes
834 * @param buf the data to write
836 * This function simply calls onenand_write_ecc
837 * with oob buffer and oobsel = NULL
839 int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
840 size_t * retlen, const u_char * buf)
842 return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL);
846 * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
847 * @param mtd MTD device structure
848 * @param to offset to write to
849 * @param len number of bytes to write
850 * @param retlen pointer to variable to store the number of written bytes
851 * @param buf the data to write
853 * OneNAND write out-of-band
855 int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
856 size_t * retlen, const u_char * buf)
858 struct onenand_chip *this = mtd->priv;
862 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_write_oob: "
863 "to = 0x%08x, len = %i\n",
864 (unsigned int)to, (int)len);
866 /* Initialize retlen, in case of early exit */
869 /* Do not allow writes past end of device */
870 if (unlikely((to + len) > mtd->size)) {
871 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_oob: "
872 "Attempt write to past end of device\n");
876 /* Grab the lock and see if the device is available */
877 onenand_get_device(mtd, FL_WRITING);
879 /* Loop until all data write */
880 while (written < len) {
881 int thislen = min_t(int, mtd->oobsize, len - written);
883 column = to & (mtd->oobsize - 1);
885 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
887 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0,
889 this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column,
892 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
894 onenand_update_bufferram(mtd, to, 0);
896 status = this->wait(mtd, FL_WRITING);
908 /* Deselect and wake up anyone waiting on the device */
909 onenand_release_device(mtd);
917 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
918 * @param mtd MTD device structure
919 * @param ofs offset from device start
920 * @param allowbbt 1, if its allowed to access the bbt area
922 * Check, if the block is bad, Either by reading the bad block table or
923 * calling of the scan function.
925 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
927 struct onenand_chip *this = mtd->priv;
928 struct bbm_info *bbm = this->bbm;
930 /* Return info from the table */
931 return bbm->isbad_bbt(mtd, ofs, allowbbt);
936 * onenand_erase - [MTD Interface] erase block(s)
937 * @param mtd MTD device structure
938 * @param instr erase instruction
940 * Erase one ore more blocks
942 int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
944 struct onenand_chip *this = mtd->priv;
945 unsigned int block_size;
950 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n",
951 (unsigned int)instr->addr, (unsigned int)instr->len);
953 block_size = (1 << this->erase_shift);
955 /* Start address must align on block boundary */
956 if (unlikely(instr->addr & (block_size - 1))) {
957 MTDDEBUG (MTD_DEBUG_LEVEL0,
958 "onenand_erase: Unaligned address\n");
962 /* Length must align on block boundary */
963 if (unlikely(instr->len & (block_size - 1))) {
964 MTDDEBUG (MTD_DEBUG_LEVEL0,
965 "onenand_erase: Length not block aligned\n");
969 /* Do not allow erase past end of device */
970 if (unlikely((instr->len + instr->addr) > mtd->size)) {
971 MTDDEBUG (MTD_DEBUG_LEVEL0,
972 "onenand_erase: Erase past end of device\n");
976 instr->fail_addr = 0xffffffff;
978 /* Grab the lock and see if the device is available */
979 onenand_get_device(mtd, FL_ERASING);
981 /* Loop throught the pages */
985 instr->state = MTD_ERASING;
989 /* TODO Check badblock */
991 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
993 onenand_invalidate_bufferram(mtd, addr, block_size);
995 ret = this->wait(mtd, FL_ERASING);
996 /* Check, if it is write protected */
999 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
1000 "Device is write protected!!!\n");
1002 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
1003 "Failed erase, block %d\n",
1004 (unsigned)(addr >> this->erase_shift));
1005 instr->state = MTD_ERASE_FAILED;
1006 instr->fail_addr = addr;
1014 instr->state = MTD_ERASE_DONE;
1018 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1019 /* Do call back function */
1021 mtd_erase_callback(instr);
1023 /* Deselect and wake up anyone waiting on the device */
1024 onenand_release_device(mtd);
1030 * onenand_sync - [MTD Interface] sync
1031 * @param mtd MTD device structure
1033 * Sync is actually a wait for chip ready function
1035 void onenand_sync(struct mtd_info *mtd)
1037 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1039 /* Grab the lock and see if the device is available */
1040 onenand_get_device(mtd, FL_SYNCING);
1042 /* Release it and go back */
1043 onenand_release_device(mtd);
1047 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1048 * @param mtd MTD device structure
1049 * @param ofs offset relative to mtd start
1051 * Check whether the block is bad
1053 int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1057 /* Check for invalid offset */
1058 if (ofs > mtd->size)
1061 onenand_get_device(mtd, FL_READING);
1062 ret = onenand_block_isbad_nolock(mtd,ofs, 0);
1063 onenand_release_device(mtd);
1068 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1069 * @param mtd MTD device structure
1070 * @param ofs offset relative to mtd start
1072 * Mark the block as bad
1074 int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1076 struct onenand_chip *this = mtd->priv;
1079 ret = onenand_block_isbad(mtd, ofs);
1081 /* If it was bad already, return success and do nothing */
1087 ret = this->block_markbad(mtd, ofs);
1092 * onenand_unlock - [MTD Interface] Unlock block(s)
1093 * @param mtd MTD device structure
1094 * @param ofs offset relative to mtd start
1095 * @param len number of bytes to unlock
1097 * Unlock one or more blocks
1099 int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1101 struct onenand_chip *this = mtd->priv;
1102 int start, end, block, value, status;
1104 start = ofs >> this->erase_shift;
1105 end = len >> this->erase_shift;
1107 /* Continuous lock scheme */
1108 if (this->options & ONENAND_CONT_LOCK) {
1109 /* Set start block address */
1110 this->write_word(start,
1111 this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1112 /* Set end block address */
1113 this->write_word(end - 1,
1114 this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1115 /* Write unlock command */
1116 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1118 /* There's no return value */
1119 this->wait(mtd, FL_UNLOCKING);
1122 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1123 & ONENAND_CTRL_ONGO)
1126 /* Check lock status */
1127 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1128 if (!(status & ONENAND_WP_US))
1129 printk(KERN_ERR "wp status = 0x%x\n", status);
1134 /* Block lock scheme */
1135 for (block = start; block < end; block++) {
1136 /* Set start block address */
1137 this->write_word(block,
1138 this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1139 /* Write unlock command */
1140 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1142 /* There's no return value */
1143 this->wait(mtd, FL_UNLOCKING);
1146 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1147 & ONENAND_CTRL_ONGO)
1150 /* Set block address for read block status */
1151 value = onenand_block_address(this->device_id, block);
1152 this->write_word(value,
1153 this->base + ONENAND_REG_START_ADDRESS1);
1155 /* Check lock status */
1156 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1157 if (!(status & ONENAND_WP_US))
1158 printk(KERN_ERR "block = %d, wp status = 0x%x\n",
1166 * onenand_print_device_info - Print device ID
1167 * @param device device ID
1171 char * onenand_print_device_info(int device)
1173 int vcc, demuxed, ddp, density;
1174 char *dev_info = malloc(80);
1176 vcc = device & ONENAND_DEVICE_VCC_MASK;
1177 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1178 ddp = device & ONENAND_DEVICE_IS_DDP;
1179 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1180 sprintf(dev_info, "%sOneNAND%s %dMB %sV 16-bit (0x%02x)",
1181 demuxed ? "" : "Muxed ",
1183 (16 << density), vcc ? "2.65/3.3" : "1.8", device);
1188 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1189 {ONENAND_MFR_SAMSUNG, "Samsung"},
1190 {ONENAND_MFR_UNKNOWN, "Unknown"}
1194 * onenand_check_maf - Check manufacturer ID
1195 * @param manuf manufacturer ID
1197 * Check manufacturer ID
1199 static int onenand_check_maf(int manuf)
1203 for (i = 0; onenand_manuf_ids[i].id; i++) {
1204 if (manuf == onenand_manuf_ids[i].id)
1208 #ifdef ONENAND_DEBUG
1209 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n",
1210 onenand_manuf_ids[i].name, manuf);
1213 return (i != ONENAND_MFR_UNKNOWN);
1217 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1218 * @param mtd MTD device structure
1220 * OneNAND detection method:
1221 * Compare the the values from command with ones from register
1223 static int onenand_probe(struct mtd_info *mtd)
1225 struct onenand_chip *this = mtd->priv;
1226 int bram_maf_id, bram_dev_id, maf_id, dev_id;
1230 /* Send the command for reading device ID from BootRAM */
1231 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1233 /* Read manufacturer and device IDs from BootRAM */
1234 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1235 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1237 /* Check manufacturer ID */
1238 if (onenand_check_maf(bram_maf_id))
1241 /* Reset OneNAND to read default register values */
1242 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1245 this->wait(mtd, FL_RESETING);
1247 /* Read manufacturer and device IDs from Register */
1248 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1249 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1251 /* Check OneNAND device */
1252 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1255 /* FIXME : Current OneNAND MTD doesn't support Flex-OneNAND */
1256 if (dev_id & (1 << 9)) {
1257 printk("Not yet support Flex-OneNAND\n");
1261 /* Flash device information */
1262 mtd->name = onenand_print_device_info(dev_id);
1263 this->device_id = dev_id;
1265 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1266 this->chipsize = (16 << density) << 20;
1268 /* OneNAND page size & block size */
1269 /* The data buffer size is equal to page size */
1271 this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1272 mtd->oobsize = mtd->writesize >> 5;
1273 /* Pagers per block is always 64 in OneNAND */
1274 mtd->erasesize = mtd->writesize << 6;
1276 this->erase_shift = ffs(mtd->erasesize) - 1;
1277 this->page_shift = ffs(mtd->writesize) - 1;
1278 this->ppb_shift = (this->erase_shift - this->page_shift);
1279 this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
1281 /* REVIST: Multichip handling */
1283 mtd->size = this->chipsize;
1286 version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1287 #ifdef ONENAND_DEBUG
1288 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id);
1292 if (density <= ONENAND_DEVICE_DENSITY_512Mb &&
1293 !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) {
1294 printk(KERN_INFO "Lock scheme is Continues Lock\n");
1295 this->options |= ONENAND_CONT_LOCK;
1298 mtd->flags = MTD_CAP_NANDFLASH;
1299 mtd->erase = onenand_erase;
1300 mtd->read = onenand_read;
1301 mtd->write = onenand_write;
1302 mtd->read_oob = onenand_read_oob;
1303 mtd->write_oob = onenand_write_oob;
1304 mtd->sync = onenand_sync;
1305 mtd->block_isbad = onenand_block_isbad;
1306 mtd->block_markbad = onenand_block_markbad;
1312 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1313 * @param mtd MTD device structure
1314 * @param maxchips Number of chips to scan for
1316 * This fills out all the not initialized function pointers
1317 * with the defaults.
1318 * The flash ID is read and the mtd/chip structures are
1319 * filled with the appropriate values.
1321 int onenand_scan(struct mtd_info *mtd, int maxchips)
1323 struct onenand_chip *this = mtd->priv;
1325 if (!this->read_word)
1326 this->read_word = onenand_readw;
1327 if (!this->write_word)
1328 this->write_word = onenand_writew;
1331 this->command = onenand_command;
1333 this->wait = onenand_wait;
1335 if (!this->read_bufferram)
1336 this->read_bufferram = onenand_read_bufferram;
1337 if (!this->write_bufferram)
1338 this->write_bufferram = onenand_write_bufferram;
1340 if (onenand_probe(mtd))
1343 /* Set Sync. Burst Read after probing */
1344 if (this->mmcontrol) {
1345 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
1346 this->read_bufferram = onenand_sync_read_bufferram;
1349 onenand_unlock(mtd, 0, mtd->size);
1351 return onenand_default_bbt(mtd);
1355 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
1356 * @param mtd MTD device structure
1358 void onenand_release(struct mtd_info *mtd)