drivers/mtd/onenand/onenand_base.c

   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005-2007 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <common.h>
  13
  14 #ifdef CONFIG_CMD_ONENAND
  15
  16 #include <linux/mtd/compat.h>
  17 #include <linux/mtd/mtd.h>
  18 #include <linux/mtd/onenand.h>
  19
  20 #include <asm/io.h>
  21 #include <asm/errno.h>
  22 #include <malloc.h>
  23
  24 /* It should access 16-bit instead of 8-bit */
  25 static inline void *memcpy_16(void *dst, const void *src, unsigned int len)
  26 {
  27         void *ret = dst;
  28         short *d = dst;
  29         const short *s = src;
  30
  31         len >>= 1;
  32         while (len-- > 0)
  33                 *d++ = *s++;
  34         return ret;
  35 }
  36
  37 static const unsigned char ffchars[] = {
  38         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  39         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  40         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  41         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  42         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  43         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  44         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  45         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  46 };
  47
  48 /**
  49  * onenand_readw - [OneNAND Interface] Read OneNAND register
  50  * @param addr          address to read
  51  *
  52  * Read OneNAND register
  53  */
  54 static unsigned short onenand_readw(void __iomem * addr)
  55 {
  56         return readw(addr);
  57 }
  58
  59 /**
  60  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  61  * @param value         value to write
  62  * @param addr          address to write
  63  *
  64  * Write OneNAND register with value
  65  */
  66 static void onenand_writew(unsigned short value, void __iomem * addr)
  67 {
  68         writew(value, addr);
  69 }
  70
  71 /**
  72  * onenand_block_address - [DEFAULT] Get block address
  73  * @param device        the device id
  74  * @param block         the block
  75  * @return              translated block address if DDP, otherwise same
  76  *
  77  * Setup Start Address 1 Register (F100h)
  78  */
  79 static int onenand_block_address(int device, int block)
  80 {
  81         if (device & ONENAND_DEVICE_IS_DDP) {
  82                 /* Device Flash Core select, NAND Flash Block Address */
  83                 int dfs = 0, density, mask;
  84
  85                 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
  86                 mask = (1 << (density + 6));
  87
  88                 if (block & mask)
  89                         dfs = 1;
  90
  91                 return (dfs << ONENAND_DDP_SHIFT) | (block & (mask - 1));
  92         }
  93
  94         return block;
  95 }
  96
  97 /**
  98  * onenand_bufferram_address - [DEFAULT] Get bufferram address
  99  * @param device        the device id
 100  * @param block         the block
 101  * @return              set DBS value if DDP, otherwise 0
 102  *
 103  * Setup Start Address 2 Register (F101h) for DDP
 104  */
 105 static int onenand_bufferram_address(int device, int block)
 106 {
 107         if (device & ONENAND_DEVICE_IS_DDP) {
 108                 /* Device BufferRAM Select */
 109                 int dbs = 0, density, mask;
 110
 111                 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
 112                 mask = (1 << (density + 6));
 113
 114                 if (block & mask)
 115                         dbs = 1;
 116
 117                 return (dbs << ONENAND_DDP_SHIFT);
 118         }
 119
 120         return 0;
 121 }
 122
 123 /**
 124  * onenand_page_address - [DEFAULT] Get page address
 125  * @param page          the page address
 126  * @param sector        the sector address
 127  * @return              combined page and sector address
 128  *
 129  * Setup Start Address 8 Register (F107h)
 130  */
 131 static int onenand_page_address(int page, int sector)
 132 {
 133         /* Flash Page Address, Flash Sector Address */
 134         int fpa, fsa;
 135
 136         fpa = page & ONENAND_FPA_MASK;
 137         fsa = sector & ONENAND_FSA_MASK;
 138
 139         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 140 }
 141
 142 /**
 143  * onenand_buffer_address - [DEFAULT] Get buffer address
 144  * @param dataram1      DataRAM index
 145  * @param sectors       the sector address
 146  * @param count         the number of sectors
 147  * @return              the start buffer value
 148  *
 149  * Setup Start Buffer Register (F200h)
 150  */
 151 static int onenand_buffer_address(int dataram1, int sectors, int count)
 152 {
 153         int bsa, bsc;
 154
 155         /* BufferRAM Sector Address */
 156         bsa = sectors & ONENAND_BSA_MASK;
 157
 158         if (dataram1)
 159                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 160         else
 161                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 162
 163         /* BufferRAM Sector Count */
 164         bsc = count & ONENAND_BSC_MASK;
 165
 166         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 167 }
 168
 169 /**
 170  * onenand_command - [DEFAULT] Send command to OneNAND device
 171  * @param mtd           MTD device structure
 172  * @param cmd           the command to be sent
 173  * @param addr          offset to read from or write to
 174  * @param len           number of bytes to read or write
 175  *
 176  * Send command to OneNAND device. This function is used for middle/large page
 177  * devices (1KB/2KB Bytes per page)
 178  */
 179 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr,
 180                            size_t len)
 181 {
 182         struct onenand_chip *this = mtd->priv;
 183         int value, readcmd = 0;
 184         int block, page;
 185         /* Now we use page size operation */
 186         int sectors = 4, count = 4;
 187
 188         /* Address translation */
 189         switch (cmd) {
 190         case ONENAND_CMD_UNLOCK:
 191         case ONENAND_CMD_LOCK:
 192         case ONENAND_CMD_LOCK_TIGHT:
 193                 block = -1;
 194                 page = -1;
 195                 break;
 196
 197         case ONENAND_CMD_ERASE:
 198         case ONENAND_CMD_BUFFERRAM:
 199                 block = (int)(addr >> this->erase_shift);
 200                 page = -1;
 201                 break;
 202
 203         default:
 204                 block = (int)(addr >> this->erase_shift);
 205                 page = (int)(addr >> this->page_shift);
 206                 page &= this->page_mask;
 207                 break;
 208         }
 209
 210         /* NOTE: The setting order of the registers is very important! */
 211         if (cmd == ONENAND_CMD_BUFFERRAM) {
 212                 /* Select DataRAM for DDP */
 213                 value = onenand_bufferram_address(this->device_id, block);
 214                 this->write_word(value,
 215                                  this->base + ONENAND_REG_START_ADDRESS2);
 216
 217                 /* Switch to the next data buffer */
 218                 ONENAND_SET_NEXT_BUFFERRAM(this);
 219
 220                 return 0;
 221         }
 222
 223         if (block != -1) {
 224                 /* Write 'DFS, FBA' of Flash */
 225                 value = onenand_block_address(this->device_id, block);
 226                 this->write_word(value,
 227                                  this->base + ONENAND_REG_START_ADDRESS1);
 228         }
 229
 230         if (page != -1) {
 231                 int dataram;
 232
 233                 switch (cmd) {
 234                 case ONENAND_CMD_READ:
 235                 case ONENAND_CMD_READOOB:
 236                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 237                         readcmd = 1;
 238                         break;
 239
 240                 default:
 241                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 242                         break;
 243                 }
 244
 245                 /* Write 'FPA, FSA' of Flash */
 246                 value = onenand_page_address(page, sectors);
 247                 this->write_word(value,
 248                                  this->base + ONENAND_REG_START_ADDRESS8);
 249
 250                 /* Write 'BSA, BSC' of DataRAM */
 251                 value = onenand_buffer_address(dataram, sectors, count);
 252                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 253
 254                 if (readcmd) {
 255                         /* Select DataRAM for DDP */
 256                         value =
 257                             onenand_bufferram_address(this->device_id, block);
 258                         this->write_word(value,
 259                                          this->base +
 260                                          ONENAND_REG_START_ADDRESS2);
 261                 }
 262         }
 263
 264         /* Interrupt clear */
 265         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 266         /* Write command */
 267         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 268
 269         return 0;
 270 }
 271
 272 /**
 273  * onenand_wait - [DEFAULT] wait until the command is done
 274  * @param mtd           MTD device structure
 275  * @param state         state to select the max. timeout value
 276  *
 277  * Wait for command done. This applies to all OneNAND command
 278  * Read can take up to 30us, erase up to 2ms and program up to 350us
 279  * according to general OneNAND specs
 280  */
 281 static int onenand_wait(struct mtd_info *mtd, int state)
 282 {
 283         struct onenand_chip *this = mtd->priv;
 284         unsigned int flags = ONENAND_INT_MASTER;
 285         unsigned int interrupt = 0;
 286         unsigned int ctrl, ecc;
 287
 288         while (1) {
 289                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 290                 if (interrupt & flags)
 291                         break;
 292         }
 293
 294         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 295
 296         if (ctrl & ONENAND_CTRL_ERROR) {
 297                 MTDDEBUG (MTD_DEBUG_LEVEL0,
 298                           "onenand_wait: controller error = 0x%04x\n", ctrl);
 299                 return -EAGAIN;
 300         }
 301
 302         if (ctrl & ONENAND_CTRL_LOCK) {
 303                 MTDDEBUG (MTD_DEBUG_LEVEL0,
 304                           "onenand_wait: it's locked error = 0x%04x\n", ctrl);
 305                 return -EIO;
 306         }
 307
 308         if (interrupt & ONENAND_INT_READ) {
 309                 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 310                 if (ecc & ONENAND_ECC_2BIT_ALL) {
 311                         MTDDEBUG (MTD_DEBUG_LEVEL0,
 312                                   "onenand_wait: ECC error = 0x%04x\n", ecc);
 313                         return -EBADMSG;
 314                 }
 315         }
 316
 317         return 0;
 318 }
 319
 320 /**
 321  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 322  * @param mtd           MTD data structure
 323  * @param area          BufferRAM area
 324  * @return              offset given area
 325  *
 326  * Return BufferRAM offset given area
 327  */
 328 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 329 {
 330         struct onenand_chip *this = mtd->priv;
 331
 332         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 333                 if (area == ONENAND_DATARAM)
 334                         return mtd->writesize;
 335                 if (area == ONENAND_SPARERAM)
 336                         return mtd->oobsize;
 337         }
 338
 339         return 0;
 340 }
 341
 342 /**
 343  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 344  * @param mtd           MTD data structure
 345  * @param area          BufferRAM area
 346  * @param buffer        the databuffer to put/get data
 347  * @param offset        offset to read from or write to
 348  * @param count         number of bytes to read/write
 349  *
 350  * Read the BufferRAM area
 351  */
 352 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 353                                   unsigned char *buffer, int offset,
 354                                   size_t count)
 355 {
 356         struct onenand_chip *this = mtd->priv;
 357         void __iomem *bufferram;
 358
 359         bufferram = this->base + area;
 360         bufferram += onenand_bufferram_offset(mtd, area);
 361
 362         memcpy_16(buffer, bufferram + offset, count);
 363
 364         return 0;
 365 }
 366
 367 /**
 368  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 369  * @param mtd           MTD data structure
 370  * @param area          BufferRAM area
 371  * @param buffer        the databuffer to put/get data
 372  * @param offset        offset to read from or write to
 373  * @param count         number of bytes to read/write
 374  *
 375  * Read the BufferRAM area with Sync. Burst Mode
 376  */
 377 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 378                                        unsigned char *buffer, int offset,
 379                                        size_t count)
 380 {
 381         struct onenand_chip *this = mtd->priv;
 382         void __iomem *bufferram;
 383
 384         bufferram = this->base + area;
 385         bufferram += onenand_bufferram_offset(mtd, area);
 386
 387         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 388
 389         memcpy_16(buffer, bufferram + offset, count);
 390
 391         this->mmcontrol(mtd, 0);
 392
 393         return 0;
 394 }
 395
 396 /**
 397  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 398  * @param mtd           MTD data structure
 399  * @param area          BufferRAM area
 400  * @param buffer        the databuffer to put/get data
 401  * @param offset        offset to read from or write to
 402  * @param count         number of bytes to read/write
 403  *
 404  * Write the BufferRAM area
 405  */
 406 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 407                                    const unsigned char *buffer, int offset,
 408                                    size_t count)
 409 {
 410         struct onenand_chip *this = mtd->priv;
 411         void __iomem *bufferram;
 412
 413         bufferram = this->base + area;
 414         bufferram += onenand_bufferram_offset(mtd, area);
 415
 416         memcpy_16(bufferram + offset, buffer, count);
 417
 418         return 0;
 419 }
 420
 421 /**
 422  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 423  * @param mtd           MTD data structure
 424  * @param addr          address to check
 425  * @return              1 if there are valid data, otherwise 0
 426  *
 427  * Check bufferram if there is data we required
 428  */
 429 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 430 {
 431         struct onenand_chip *this = mtd->priv;
 432         int block, page;
 433         int i;
 434
 435         block = (int)(addr >> this->erase_shift);
 436         page = (int)(addr >> this->page_shift);
 437         page &= this->page_mask;
 438
 439         i = ONENAND_CURRENT_BUFFERRAM(this);
 440
 441         /* Is there valid data? */
 442         if (this->bufferram[i].block == block &&
 443             this->bufferram[i].page == page && this->bufferram[i].valid)
 444                 return 1;
 445
 446         return 0;
 447 }
 448
 449 /**
 450  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 451  * @param mtd           MTD data structure
 452  * @param addr          address to update
 453  * @param valid         valid flag
 454  *
 455  * Update BufferRAM information
 456  */
 457 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 458                                     int valid)
 459 {
 460         struct onenand_chip *this = mtd->priv;
 461         int block, page;
 462         int i;
 463
 464         block = (int)(addr >> this->erase_shift);
 465         page = (int)(addr >> this->page_shift);
 466         page &= this->page_mask;
 467
 468         /* Invalidate BufferRAM */
 469         for (i = 0; i < MAX_BUFFERRAM; i++) {
 470                 if (this->bufferram[i].block == block &&
 471                     this->bufferram[i].page == page)
 472                         this->bufferram[i].valid = 0;
 473         }
 474
 475         /* Update BufferRAM */
 476         i = ONENAND_CURRENT_BUFFERRAM(this);
 477         this->bufferram[i].block = block;
 478         this->bufferram[i].page = page;
 479         this->bufferram[i].valid = valid;
 480
 481         return 0;
 482 }
 483
 484 /**
 485  * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
 486  * @param mtd           MTD data structure
 487  * @param addr          start address to invalidate
 488  * @param len           length to invalidate
 489  *
 490  * Invalidate BufferRAM information
 491  */
 492 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
 493                                          unsigned int len)
 494 {
 495         struct onenand_chip *this = mtd->priv;
 496         int i;
 497         loff_t end_addr = addr + len;
 498
 499         /* Invalidate BufferRAM */
 500         for (i = 0; i < MAX_BUFFERRAM; i++) {
 501                 loff_t buf_addr = this->bufferram[i].block << this->erase_shift;
 502
 503                 if (buf_addr >= addr && buf_addr < end_addr)
 504                         this->bufferram[i].valid = 0;
 505         }
 506 }
 507
 508 /**
 509  * onenand_get_device - [GENERIC] Get chip for selected access
 510  * @param mtd           MTD device structure
 511  * @param new_state     the state which is requested
 512  *
 513  * Get the device and lock it for exclusive access
 514  */
 515 static void onenand_get_device(struct mtd_info *mtd, int new_state)
 516 {
 517         /* Do nothing */
 518 }
 519
 520 /**
 521  * onenand_release_device - [GENERIC] release chip
 522  * @param mtd           MTD device structure
 523  *
 524  * Deselect, release chip lock and wake up anyone waiting on the device
 525  */
 526 static void onenand_release_device(struct mtd_info *mtd)
 527 {
 528         /* Do nothing */
 529 }
 530
 531 /**
 532  * onenand_read_ecc - [MTD Interface] Read data with ECC
 533  * @param mtd           MTD device structure
 534  * @param from          offset to read from
 535  * @param len           number of bytes to read
 536  * @param retlen        pointer to variable to store the number of read bytes
 537  * @param buf           the databuffer to put data
 538  * @param oob_buf       filesystem supplied oob data buffer
 539  * @param oobsel        oob selection structure
 540  *
 541  * OneNAND read with ECC
 542  */
 543 static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
 544                             size_t * retlen, u_char * buf,
 545                             u_char * oob_buf, struct nand_oobinfo *oobsel)
 546 {
 547         struct onenand_chip *this = mtd->priv;
 548         int read = 0, column;
 549         int thislen;
 550         int ret = 0;
 551
 552         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_read_ecc: "
 553                   "from = 0x%08x, len = %i\n",
 554                   (unsigned int)from, (int)len);
 555
 556         /* Do not allow reads past end of device */
 557         if ((from + len) > mtd->size) {
 558                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_read_ecc: "
 559                           "Attempt read beyond end of device\n");
 560                 *retlen = 0;
 561                 return -EINVAL;
 562         }
 563
 564         /* Grab the lock and see if the device is available */
 565         onenand_get_device(mtd, FL_READING);
 566
 567         while (read < len) {
 568                 thislen = min_t(int, mtd->writesize, len - read);
 569
 570                 column = from & (mtd->writesize - 1);
 571                 if (column + thislen > mtd->writesize)
 572                         thislen = mtd->writesize - column;
 573
 574                 if (!onenand_check_bufferram(mtd, from)) {
 575                         this->command(mtd, ONENAND_CMD_READ, from,
 576                                       mtd->writesize);
 577                         ret = this->wait(mtd, FL_READING);
 578                         /* First copy data and check return value for ECC handling */
 579                         onenand_update_bufferram(mtd, from, 1);
 580                 }
 581
 582                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column,
 583                                      thislen);
 584
 585                 read += thislen;
 586                 if (read == len)
 587                         break;
 588
 589                 if (ret) {
 590                         MTDDEBUG (MTD_DEBUG_LEVEL0,
 591                                   "onenand_read_ecc: read failed = %d\n", ret);
 592                         break;
 593                 }
 594
 595                 from += thislen;
 596                 buf += thislen;
 597         }
 598
 599         /* Deselect and wake up anyone waiting on the device */
 600         onenand_release_device(mtd);
 601
 602         /*
 603          * Return success, if no ECC failures, else -EBADMSG
 604          * fs driver will take care of that, because
 605          * retlen == desired len and result == -EBADMSG
 606          */
 607         *retlen = read;
 608         return ret;
 609 }
 610
 611 /**
 612  * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
 613  * @param mtd           MTD device structure
 614  * @param from          offset to read from
 615  * @param len           number of bytes to read
 616  * @param retlen        pointer to variable to store the number of read bytes
 617  * @param buf           the databuffer to put data
 618  *
 619  * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
 620 */
 621 int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
 622                  size_t * retlen, u_char * buf)
 623 {
 624         return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL);
 625 }
 626
 627 /**
 628  * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
 629  * @param mtd           MTD device structure
 630  * @param from          offset to read from
 631  * @param len           number of bytes to read
 632  * @param retlen        pointer to variable to store the number of read bytes
 633  * @param buf           the databuffer to put data
 634  *
 635  * OneNAND read out-of-band data from the spare area
 636  */
 637 int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
 638                      size_t * retlen, u_char * buf)
 639 {
 640         struct onenand_chip *this = mtd->priv;
 641         int read = 0, thislen, column;
 642         int ret = 0;
 643
 644         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_read_oob: "
 645                   "from = 0x%08x, len = %i\n",
 646                   (unsigned int)from, (int)len);
 647
 648         /* Initialize return length value */
 649         *retlen = 0;
 650
 651         /* Do not allow reads past end of device */
 652         if (unlikely((from + len) > mtd->size)) {
 653                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_read_oob: "
 654                           "Attempt read beyond end of device\n");
 655                 return -EINVAL;
 656         }
 657
 658         /* Grab the lock and see if the device is available */
 659         onenand_get_device(mtd, FL_READING);
 660
 661         column = from & (mtd->oobsize - 1);
 662
 663         while (read < len) {
 664                 thislen = mtd->oobsize - column;
 665                 thislen = min_t(int, thislen, len);
 666
 667                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
 668
 669                 onenand_update_bufferram(mtd, from, 0);
 670
 671                 ret = this->wait(mtd, FL_READING);
 672                 /* First copy data and check return value for ECC handling */
 673
 674                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column,
 675                                      thislen);
 676
 677                 read += thislen;
 678                 if (read == len)
 679                         break;
 680
 681                 if (ret) {
 682                         MTDDEBUG (MTD_DEBUG_LEVEL0,
 683                                   "onenand_read_oob: read failed = %d\n", ret);
 684                         break;
 685                 }
 686
 687                 buf += thislen;
 688                 /* Read more? */
 689                 if (read < len) {
 690                         /* Page size */
 691                         from += mtd->writesize;
 692                         column = 0;
 693                 }
 694         }
 695
 696         /* Deselect and wake up anyone waiting on the device */
 697         onenand_release_device(mtd);
 698
 699         *retlen = read;
 700         return ret;
 701 }
 702
 703 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
 704 /**
 705  * onenand_verify_page - [GENERIC] verify the chip contents after a write
 706  * @param mtd           MTD device structure
 707  * @param buf           the databuffer to verify
 708  *
 709  * Check DataRAM area directly
 710  */
 711 static int onenand_verify_page(struct mtd_info *mtd, u_char * buf,
 712                                loff_t addr)
 713 {
 714         struct onenand_chip *this = mtd->priv;
 715         void __iomem *dataram0, *dataram1;
 716         int ret = 0;
 717
 718         this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
 719
 720         ret = this->wait(mtd, FL_READING);
 721         if (ret)
 722                 return ret;
 723
 724         onenand_update_bufferram(mtd, addr, 1);
 725
 726         /* Check, if the two dataram areas are same */
 727         dataram0 = this->base + ONENAND_DATARAM;
 728         dataram1 = dataram0 + mtd->writesize;
 729
 730         if (memcmp(dataram0, dataram1, mtd->writesize))
 731                 return -EBADMSG;
 732
 733         return 0;
 734 }
 735 #else
 736 #define onenand_verify_page(...)        (0)
 737 #endif
 738
 739 #define NOTALIGNED(x)   ((x & (mtd->writesize - 1)) != 0)
 740
 741 /**
 742  * onenand_write_ecc - [MTD Interface] OneNAND write with ECC
 743  * @param mtd           MTD device structure
 744  * @param to            offset to write to
 745  * @param len           number of bytes to write
 746  * @param retlen        pointer to variable to store the number of written bytes
 747  * @param buf           the data to write
 748  * @param eccbuf        filesystem supplied oob data buffer
 749  * @param oobsel        oob selection structure
 750  *
 751  * OneNAND write with ECC
 752  */
 753 static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
 754                              size_t * retlen, const u_char * buf,
 755                              u_char * eccbuf, struct nand_oobinfo *oobsel)
 756 {
 757         struct onenand_chip *this = mtd->priv;
 758         int written = 0;
 759         int ret = 0;
 760
 761         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_write_ecc: "
 762                   "to = 0x%08x, len = %i\n",
 763                   (unsigned int)to, (int)len);
 764
 765         /* Initialize retlen, in case of early exit */
 766         *retlen = 0;
 767
 768         /* Do not allow writes past end of device */
 769         if (unlikely((to + len) > mtd->size)) {
 770                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_ecc: "
 771                           "Attempt write to past end of device\n");
 772                 return -EINVAL;
 773         }
 774
 775         /* Reject writes, which are not page aligned */
 776         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
 777                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_ecc: "
 778                           "Attempt to write not page aligned data\n");
 779                 return -EINVAL;
 780         }
 781
 782         /* Grab the lock and see if the device is available */
 783         onenand_get_device(mtd, FL_WRITING);
 784
 785         /* Loop until all data write */
 786         while (written < len) {
 787                 int thislen = min_t(int, mtd->writesize, len - written);
 788
 789                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->writesize);
 790
 791                 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
 792                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0,
 793                                       mtd->oobsize);
 794
 795                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
 796
 797                 onenand_update_bufferram(mtd, to, 1);
 798
 799                 ret = this->wait(mtd, FL_WRITING);
 800                 if (ret) {
 801                         MTDDEBUG (MTD_DEBUG_LEVEL0,
 802                                   "onenand_write_ecc: write filaed %d\n", ret);
 803                         break;
 804                 }
 805
 806                 written += thislen;
 807
 808                 /* Only check verify write turn on */
 809                 ret = onenand_verify_page(mtd, (u_char *) buf, to);
 810                 if (ret) {
 811                         MTDDEBUG (MTD_DEBUG_LEVEL0,
 812                                   "onenand_write_ecc: verify failed %d\n", ret);
 813                         break;
 814                 }
 815
 816                 if (written == len)
 817                         break;
 818
 819                 to += thislen;
 820                 buf += thislen;
 821         }
 822
 823         /* Deselect and wake up anyone waiting on the device */
 824         onenand_release_device(mtd);
 825
 826         *retlen = written;
 827
 828         return ret;
 829 }
 830
 831 /**
 832  * onenand_write - [MTD Interface] compability function for onenand_write_ecc
 833  * @param mtd           MTD device structure
 834  * @param to            offset to write to
 835  * @param len           number of bytes to write
 836  * @param retlen        pointer to variable to store the number of written bytes
 837  * @param buf           the data to write
 838  *
 839  * This function simply calls onenand_write_ecc
 840  * with oob buffer and oobsel = NULL
 841  */
 842 int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
 843                   size_t * retlen, const u_char * buf)
 844 {
 845         return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL);
 846 }
 847
 848 /**
 849  * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
 850  * @param mtd           MTD device structure
 851  * @param to            offset to write to
 852  * @param len           number of bytes to write
 853  * @param retlen        pointer to variable to store the number of written bytes
 854  * @param buf           the data to write
 855  *
 856  * OneNAND write out-of-band
 857  */
 858 int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
 859                       size_t * retlen, const u_char * buf)
 860 {
 861         struct onenand_chip *this = mtd->priv;
 862         int column, status;
 863         int written = 0;
 864
 865         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_write_oob: "
 866                   "to = 0x%08x, len = %i\n",
 867                   (unsigned int)to, (int)len);
 868
 869         /* Initialize retlen, in case of early exit */
 870         *retlen = 0;
 871
 872         /* Do not allow writes past end of device */
 873         if (unlikely((to + len) > mtd->size)) {
 874                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_oob: "
 875                           "Attempt write to past end of device\n");
 876                 return -EINVAL;
 877         }
 878
 879         /* Grab the lock and see if the device is available */
 880         onenand_get_device(mtd, FL_WRITING);
 881
 882         /* Loop until all data write */
 883         while (written < len) {
 884                 int thislen = min_t(int, mtd->oobsize, len - written);
 885
 886                 column = to & (mtd->oobsize - 1);
 887
 888                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
 889
 890                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0,
 891                                       mtd->oobsize);
 892                 this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column,
 893                                       thislen);
 894
 895                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
 896
 897                 onenand_update_bufferram(mtd, to, 0);
 898
 899                 status = this->wait(mtd, FL_WRITING);
 900                 if (status)
 901                         break;
 902
 903                 written += thislen;
 904                 if (written == len)
 905                         break;
 906
 907                 to += thislen;
 908                 buf += thislen;
 909         }
 910
 911         /* Deselect and wake up anyone waiting on the device */
 912         onenand_release_device(mtd);
 913
 914         *retlen = written;
 915
 916         return 0;
 917 }
 918
 919 /**
 920  * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
 921  * @param mtd           MTD device structure
 922  * @param ofs           offset from device start
 923  * @param allowbbt      1, if its allowed to access the bbt area
 924  *
 925  * Check, if the block is bad, Either by reading the bad block table or
 926  * calling of the scan function.
 927  */
 928 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
 929 {
 930         struct onenand_chip *this = mtd->priv;
 931         struct bbm_info *bbm = this->bbm;
 932
 933         /* Return info from the table */
 934         return bbm->isbad_bbt(mtd, ofs, allowbbt);
 935 }
 936
 937
 938 /**
 939  * onenand_erase - [MTD Interface] erase block(s)
 940  * @param mtd           MTD device structure
 941  * @param instr         erase instruction
 942  *
 943  * Erase one ore more blocks
 944  */
 945 int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
 946 {
 947         struct onenand_chip *this = mtd->priv;
 948         unsigned int block_size;
 949         loff_t addr;
 950         int len;
 951         int ret = 0;
 952
 953         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n",
 954                   (unsigned int)instr->addr, (unsigned int)instr->len);
 955
 956         block_size = (1 << this->erase_shift);
 957
 958         /* Start address must align on block boundary */
 959         if (unlikely(instr->addr & (block_size - 1))) {
 960                 MTDDEBUG (MTD_DEBUG_LEVEL0,
 961                           "onenand_erase: Unaligned address\n");
 962                 return -EINVAL;
 963         }
 964
 965         /* Length must align on block boundary */
 966         if (unlikely(instr->len & (block_size - 1))) {
 967                 MTDDEBUG (MTD_DEBUG_LEVEL0,
 968                           "onenand_erase: Length not block aligned\n");
 969                 return -EINVAL;
 970         }
 971
 972         /* Do not allow erase past end of device */
 973         if (unlikely((instr->len + instr->addr) > mtd->size)) {
 974                 MTDDEBUG (MTD_DEBUG_LEVEL0,
 975                           "onenand_erase: Erase past end of device\n");
 976                 return -EINVAL;
 977         }
 978
 979         instr->fail_addr = 0xffffffff;
 980
 981         /* Grab the lock and see if the device is available */
 982         onenand_get_device(mtd, FL_ERASING);
 983
 984         /* Loop throught the pages */
 985         len = instr->len;
 986         addr = instr->addr;
 987
 988         instr->state = MTD_ERASING;
 989
 990         while (len) {
 991
 992                 /* TODO Check badblock */
 993
 994                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
 995
 996                 onenand_invalidate_bufferram(mtd, addr, block_size);
 997
 998                 ret = this->wait(mtd, FL_ERASING);
 999                 /* Check, if it is write protected */
1000                 if (ret) {
1001                         if (ret == -EPERM)
1002                                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
1003                                           "Device is write protected!!!\n");
1004                         else
1005                                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
1006                                           "Failed erase, block %d\n",
1007                                           (unsigned)(addr >> this->erase_shift));
1008                         instr->state = MTD_ERASE_FAILED;
1009                         instr->fail_addr = addr;
1010                         goto erase_exit;
1011                 }
1012
1013                 len -= block_size;
1014                 addr += block_size;
1015         }
1016
1017         instr->state = MTD_ERASE_DONE;
1018
1019       erase_exit:
1020
1021         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1022         /* Do call back function */
1023         if (!ret)
1024                 mtd_erase_callback(instr);
1025
1026         /* Deselect and wake up anyone waiting on the device */
1027         onenand_release_device(mtd);
1028
1029         return ret;
1030 }
1031
1032 /**
1033  * onenand_sync - [MTD Interface] sync
1034  * @param mtd           MTD device structure
1035  *
1036  * Sync is actually a wait for chip ready function
1037  */
1038 void onenand_sync(struct mtd_info *mtd)
1039 {
1040         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1041
1042         /* Grab the lock and see if the device is available */
1043         onenand_get_device(mtd, FL_SYNCING);
1044
1045         /* Release it and go back */
1046         onenand_release_device(mtd);
1047 }
1048
1049 /**
1050  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1051  * @param mtd           MTD device structure
1052  * @param ofs           offset relative to mtd start
1053  *
1054  * Check whether the block is bad
1055  */
1056 int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1057 {
1058         int ret;
1059
1060         /* Check for invalid offset */
1061         if (ofs > mtd->size)
1062                 return -EINVAL;
1063
1064         onenand_get_device(mtd, FL_READING);
1065         ret = onenand_block_isbad_nolock(mtd,ofs, 0);
1066         onenand_release_device(mtd);
1067         return ret;
1068 }
1069
1070 /**
1071  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1072  * @param mtd           MTD device structure
1073  * @param ofs           offset relative to mtd start
1074  *
1075  * Mark the block as bad
1076  */
1077 int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1078 {
1079         struct onenand_chip *this = mtd->priv;
1080         int ret;
1081
1082         ret = onenand_block_isbad(mtd, ofs);
1083         if (ret) {
1084                 /* If it was bad already, return success and do nothing */
1085                 if (ret > 0)
1086                         return 0;
1087                 return ret;
1088         }
1089
1090         ret = this->block_markbad(mtd, ofs);
1091         return ret;
1092 }
1093
1094 /**
1095  * onenand_unlock - [MTD Interface] Unlock block(s)
1096  * @param mtd           MTD device structure
1097  * @param ofs           offset relative to mtd start
1098  * @param len           number of bytes to unlock
1099  *
1100  * Unlock one or more blocks
1101  */
1102 int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1103 {
1104         struct onenand_chip *this = mtd->priv;
1105         int start, end, block, value, status;
1106
1107         start = ofs >> this->erase_shift;
1108         end = len >> this->erase_shift;
1109
1110         /* Continuous lock scheme */
1111         if (this->options & ONENAND_CONT_LOCK) {
1112                 /* Set start block address */
1113                 this->write_word(start,
1114                                  this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1115                 /* Set end block address */
1116                 this->write_word(end - 1,
1117                                  this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1118                 /* Write unlock command */
1119                 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1120
1121                 /* There's no return value */
1122                 this->wait(mtd, FL_UNLOCKING);
1123
1124                 /* Sanity check */
1125                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1126                        & ONENAND_CTRL_ONGO)
1127                         continue;
1128
1129                 /* Check lock status */
1130                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1131                 if (!(status & ONENAND_WP_US))
1132                         printk(KERN_ERR "wp status = 0x%x\n", status);
1133
1134                 return 0;
1135         }
1136
1137         /* Block lock scheme */
1138         for (block = start; block < end; block++) {
1139                 /* Set start block address */
1140                 this->write_word(block,
1141                                  this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1142                 /* Write unlock command */
1143                 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1144
1145                 /* There's no return value */
1146                 this->wait(mtd, FL_UNLOCKING);
1147
1148                 /* Sanity check */
1149                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1150                        & ONENAND_CTRL_ONGO)
1151                         continue;
1152
1153                 /* Set block address for read block status */
1154                 value = onenand_block_address(this->device_id, block);
1155                 this->write_word(value,
1156                                  this->base + ONENAND_REG_START_ADDRESS1);
1157
1158                 /* Check lock status */
1159                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1160                 if (!(status & ONENAND_WP_US))
1161                         printk(KERN_ERR "block = %d, wp status = 0x%x\n",
1162                                block, status);
1163         }
1164
1165         return 0;
1166 }
1167
1168 /**
1169  * onenand_print_device_info - Print device ID
1170  * @param device        device ID
1171  *
1172  * Print device ID
1173  */
1174 char * onenand_print_device_info(int device)
1175 {
1176         int vcc, demuxed, ddp, density;
1177         char *dev_info = malloc(80);
1178
1179         vcc = device & ONENAND_DEVICE_VCC_MASK;
1180         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1181         ddp = device & ONENAND_DEVICE_IS_DDP;
1182         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1183         sprintf(dev_info, "%sOneNAND%s %dMB %sV 16-bit (0x%02x)",
1184                demuxed ? "" : "Muxed ",
1185                ddp ? "(DDP)" : "",
1186                (16 << density), vcc ? "2.65/3.3" : "1.8", device);
1187
1188         return dev_info;
1189 }
1190
1191 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1192         {ONENAND_MFR_SAMSUNG, "Samsung"},
1193         {ONENAND_MFR_UNKNOWN, "Unknown"}
1194 };
1195
1196 /**
1197  * onenand_check_maf - Check manufacturer ID
1198  * @param manuf         manufacturer ID
1199  *
1200  * Check manufacturer ID
1201  */
1202 static int onenand_check_maf(int manuf)
1203 {
1204         int i;
1205
1206         for (i = 0; onenand_manuf_ids[i].id; i++) {
1207                 if (manuf == onenand_manuf_ids[i].id)
1208                         break;
1209         }
1210
1211 #ifdef ONENAND_DEBUG
1212         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n",
1213                onenand_manuf_ids[i].name, manuf);
1214 #endif
1215
1216         return (i != ONENAND_MFR_UNKNOWN);
1217 }
1218
1219 /**
1220  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1221  * @param mtd           MTD device structure
1222  *
1223  * OneNAND detection method:
1224  *   Compare the the values from command with ones from register
1225  */
1226 static int onenand_probe(struct mtd_info *mtd)
1227 {
1228         struct onenand_chip *this = mtd->priv;
1229         int bram_maf_id, bram_dev_id, maf_id, dev_id;
1230         int version_id;
1231         int density;
1232
1233         /* Send the command for reading device ID from BootRAM */
1234         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1235
1236         /* Read manufacturer and device IDs from BootRAM */
1237         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1238         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1239
1240         /* Check manufacturer ID */
1241         if (onenand_check_maf(bram_maf_id))
1242                 return -ENXIO;
1243
1244         /* Reset OneNAND to read default register values */
1245         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1246
1247         /* Wait reset */
1248         this->wait(mtd, FL_RESETING);
1249
1250         /* Read manufacturer and device IDs from Register */
1251         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1252         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1253
1254         /* Check OneNAND device */
1255         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1256                 return -ENXIO;
1257
1258         /* FIXME : Current OneNAND MTD doesn't support Flex-OneNAND */
1259         if (dev_id & (1 << 9)) {
1260                 printk("Not yet support Flex-OneNAND\n");
1261                 return -ENXIO;
1262         }
1263
1264         /* Flash device information */
1265         mtd->name = onenand_print_device_info(dev_id);
1266         this->device_id = dev_id;
1267
1268         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1269         this->chipsize = (16 << density) << 20;
1270
1271         /* OneNAND page size & block size */
1272         /* The data buffer size is equal to page size */
1273         mtd->writesize =
1274             this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1275         mtd->oobsize = mtd->writesize >> 5;
1276         /* Pagers per block is always 64 in OneNAND */
1277         mtd->erasesize = mtd->writesize << 6;
1278
1279         this->erase_shift = ffs(mtd->erasesize) - 1;
1280         this->page_shift = ffs(mtd->writesize) - 1;
1281         this->ppb_shift = (this->erase_shift - this->page_shift);
1282         this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
1283
1284         /* REVIST: Multichip handling */
1285
1286         mtd->size = this->chipsize;
1287
1288         /* Version ID */
1289         version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1290 #ifdef ONENAND_DEBUG
1291         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id);
1292 #endif
1293
1294         /* Lock scheme */
1295         if (density <= ONENAND_DEVICE_DENSITY_512Mb &&
1296             !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) {
1297                 printk(KERN_INFO "Lock scheme is Continues Lock\n");
1298                 this->options |= ONENAND_CONT_LOCK;
1299         }
1300
1301         mtd->flags = MTD_CAP_NANDFLASH;
1302         mtd->erase = onenand_erase;
1303         mtd->read = onenand_read;
1304         mtd->write = onenand_write;
1305         mtd->read_oob = onenand_read_oob;
1306         mtd->write_oob = onenand_write_oob;
1307         mtd->sync = onenand_sync;
1308         mtd->block_isbad = onenand_block_isbad;
1309         mtd->block_markbad = onenand_block_markbad;
1310
1311         return 0;
1312 }
1313
1314 /**
1315  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1316  * @param mtd           MTD device structure
1317  * @param maxchips      Number of chips to scan for
1318  *
1319  * This fills out all the not initialized function pointers
1320  * with the defaults.
1321  * The flash ID is read and the mtd/chip structures are
1322  * filled with the appropriate values.
1323  */
1324 int onenand_scan(struct mtd_info *mtd, int maxchips)
1325 {
1326         struct onenand_chip *this = mtd->priv;
1327
1328         if (!this->read_word)
1329                 this->read_word = onenand_readw;
1330         if (!this->write_word)
1331                 this->write_word = onenand_writew;
1332
1333         if (!this->command)
1334                 this->command = onenand_command;
1335         if (!this->wait)
1336                 this->wait = onenand_wait;
1337
1338         if (!this->read_bufferram)
1339                 this->read_bufferram = onenand_read_bufferram;
1340         if (!this->write_bufferram)
1341                 this->write_bufferram = onenand_write_bufferram;
1342
1343         if (onenand_probe(mtd))
1344                 return -ENXIO;
1345
1346         /* Set Sync. Burst Read after probing */
1347         if (this->mmcontrol) {
1348                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
1349                 this->read_bufferram = onenand_sync_read_bufferram;
1350         }
1351
1352         onenand_unlock(mtd, 0, mtd->size);
1353
1354         return onenand_default_bbt(mtd);
1355 }
1356
1357 /**
1358  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
1359  * @param mtd           MTD device structure
1360  */
1361 void onenand_release(struct mtd_info *mtd)
1362 {
1363 }
1364
1365 #endif /* CONFIG_CMD_ONENAND */