drivers/mtd/onenand/onenand_base.c

   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005-2007 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <common.h>
  13
  14 #ifdef CONFIG_CMD_ONENAND
  15
  16 #include <linux/mtd/compat.h>
  17 #include <linux/mtd/mtd.h>
  18 #include <linux/mtd/onenand.h>
  19
  20 #include <asm/io.h>
  21 #include <asm/errno.h>
  22 #include <malloc.h>
  23
  24 /* It should access 16-bit instead of 8-bit */
  25 static inline void *memcpy_16(void *dst, const void *src, unsigned int len)
  26 {
  27         void *ret = dst;
  28         short *d = dst;
  29         const short *s = src;
  30
  31         len >>= 1;
  32         while (len-- > 0)
  33                 *d++ = *s++;
  34         return ret;
  35 }
  36
  37 static const unsigned char ffchars[] = {
  38         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  39         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  40         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  41         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  42         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  43         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  44         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  45         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  46 };
  47
  48 /**
  49  * onenand_readw - [OneNAND Interface] Read OneNAND register
  50  * @param addr          address to read
  51  *
  52  * Read OneNAND register
  53  */
  54 static unsigned short onenand_readw(void __iomem * addr)
  55 {
  56         return readw(addr);
  57 }
  58
  59 /**
  60  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  61  * @param value         value to write
  62  * @param addr          address to write
  63  *
  64  * Write OneNAND register with value
  65  */
  66 static void onenand_writew(unsigned short value, void __iomem * addr)
  67 {
  68         writew(value, addr);
  69 }
  70
  71 /**
  72  * onenand_block_address - [DEFAULT] Get block address
  73  * @param device        the device id
  74  * @param block         the block
  75  * @return              translated block address if DDP, otherwise same
  76  *
  77  * Setup Start Address 1 Register (F100h)
  78  */
  79 static int onenand_block_address(int device, int block)
  80 {
  81         if (device & ONENAND_DEVICE_IS_DDP) {
  82                 /* Device Flash Core select, NAND Flash Block Address */
  83                 int dfs = 0, density, mask;
  84
  85                 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
  86                 mask = (1 << (density + 6));
  87
  88                 if (block & mask)
  89                         dfs = 1;
  90
  91                 return (dfs << ONENAND_DDP_SHIFT) | (block & (mask - 1));
  92         }
  93
  94         return block;
  95 }
  96
  97 /**
  98  * onenand_bufferram_address - [DEFAULT] Get bufferram address
  99  * @param device        the device id
 100  * @param block         the block
 101  * @return              set DBS value if DDP, otherwise 0
 102  *
 103  * Setup Start Address 2 Register (F101h) for DDP
 104  */
 105 static int onenand_bufferram_address(int device, int block)
 106 {
 107         if (device & ONENAND_DEVICE_IS_DDP) {
 108                 /* Device BufferRAM Select */
 109                 int dbs = 0, density, mask;
 110
 111                 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
 112                 mask = (1 << (density + 6));
 113
 114                 if (block & mask)
 115                         dbs = 1;
 116
 117                 return (dbs << ONENAND_DDP_SHIFT);
 118         }
 119
 120         return 0;
 121 }
 122
 123 /**
 124  * onenand_page_address - [DEFAULT] Get page address
 125  * @param page          the page address
 126  * @param sector        the sector address
 127  * @return              combined page and sector address
 128  *
 129  * Setup Start Address 8 Register (F107h)
 130  */
 131 static int onenand_page_address(int page, int sector)
 132 {
 133         /* Flash Page Address, Flash Sector Address */
 134         int fpa, fsa;
 135
 136         fpa = page & ONENAND_FPA_MASK;
 137         fsa = sector & ONENAND_FSA_MASK;
 138
 139         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 140 }
 141
 142 /**
 143  * onenand_buffer_address - [DEFAULT] Get buffer address
 144  * @param dataram1      DataRAM index
 145  * @param sectors       the sector address
 146  * @param count         the number of sectors
 147  * @return              the start buffer value
 148  *
 149  * Setup Start Buffer Register (F200h)
 150  */
 151 static int onenand_buffer_address(int dataram1, int sectors, int count)
 152 {
 153         int bsa, bsc;
 154
 155         /* BufferRAM Sector Address */
 156         bsa = sectors & ONENAND_BSA_MASK;
 157
 158         if (dataram1)
 159                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 160         else
 161                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 162
 163         /* BufferRAM Sector Count */
 164         bsc = count & ONENAND_BSC_MASK;
 165
 166         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 167 }
 168
 169 /**
 170  * onenand_command - [DEFAULT] Send command to OneNAND device
 171  * @param mtd           MTD device structure
 172  * @param cmd           the command to be sent
 173  * @param addr          offset to read from or write to
 174  * @param len           number of bytes to read or write
 175  *
 176  * Send command to OneNAND device. This function is used for middle/large page
 177  * devices (1KB/2KB Bytes per page)
 178  */
 179 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr,
 180                            size_t len)
 181 {
 182         struct onenand_chip *this = mtd->priv;
 183         int value, readcmd = 0;
 184         int block, page;
 185         /* Now we use page size operation */
 186         int sectors = 4, count = 4;
 187
 188         /* Address translation */
 189         switch (cmd) {
 190         case ONENAND_CMD_UNLOCK:
 191         case ONENAND_CMD_LOCK:
 192         case ONENAND_CMD_LOCK_TIGHT:
 193                 block = -1;
 194                 page = -1;
 195                 break;
 196
 197         case ONENAND_CMD_ERASE:
 198         case ONENAND_CMD_BUFFERRAM:
 199                 block = (int)(addr >> this->erase_shift);
 200                 page = -1;
 201                 break;
 202
 203         default:
 204                 block = (int)(addr >> this->erase_shift);
 205                 page = (int)(addr >> this->page_shift);
 206                 page &= this->page_mask;
 207                 break;
 208         }
 209
 210         /* NOTE: The setting order of the registers is very important! */
 211         if (cmd == ONENAND_CMD_BUFFERRAM) {
 212                 /* Select DataRAM for DDP */
 213                 value = onenand_bufferram_address(this->device_id, block);
 214                 this->write_word(value,
 215                                  this->base + ONENAND_REG_START_ADDRESS2);
 216
 217                 /* Switch to the next data buffer */
 218                 ONENAND_SET_NEXT_BUFFERRAM(this);
 219
 220                 return 0;
 221         }
 222
 223         if (block != -1) {
 224                 /* Write 'DFS, FBA' of Flash */
 225                 value = onenand_block_address(this->device_id, block);
 226                 this->write_word(value,
 227                                  this->base + ONENAND_REG_START_ADDRESS1);
 228         }
 229
 230         if (page != -1) {
 231                 int dataram;
 232
 233                 switch (cmd) {
 234                 case ONENAND_CMD_READ:
 235                 case ONENAND_CMD_READOOB:
 236                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 237                         readcmd = 1;
 238                         break;
 239
 240                 default:
 241                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 242                         break;
 243                 }
 244
 245                 /* Write 'FPA, FSA' of Flash */
 246                 value = onenand_page_address(page, sectors);
 247                 this->write_word(value,
 248                                  this->base + ONENAND_REG_START_ADDRESS8);
 249
 250                 /* Write 'BSA, BSC' of DataRAM */
 251                 value = onenand_buffer_address(dataram, sectors, count);
 252                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 253
 254                 if (readcmd) {
 255                         /* Select DataRAM for DDP */
 256                         value =
 257                             onenand_bufferram_address(this->device_id, block);
 258                         this->write_word(value,
 259                                          this->base +
 260                                          ONENAND_REG_START_ADDRESS2);
 261                 }
 262         }
 263
 264         /* Interrupt clear */
 265         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 266         /* Write command */
 267         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 268
 269         return 0;
 270 }
 271
 272 /**
 273  * onenand_wait - [DEFAULT] wait until the command is done
 274  * @param mtd           MTD device structure
 275  * @param state         state to select the max. timeout value
 276  *
 277  * Wait for command done. This applies to all OneNAND command
 278  * Read can take up to 30us, erase up to 2ms and program up to 350us
 279  * according to general OneNAND specs
 280  */
 281 static int onenand_wait(struct mtd_info *mtd, int state)
 282 {
 283         struct onenand_chip *this = mtd->priv;
 284         unsigned int flags = ONENAND_INT_MASTER;
 285         unsigned int interrupt = 0;
 286         unsigned int ctrl, ecc;
 287
 288         while (1) {
 289                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 290                 if (interrupt & flags)
 291                         break;
 292         }
 293
 294         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 295
 296         if (ctrl & ONENAND_CTRL_ERROR) {
 297                 MTDDEBUG (MTD_DEBUG_LEVEL0,
 298                           "onenand_wait: controller error = 0x%04x\n", ctrl);
 299                 return -EAGAIN;
 300         }
 301
 302         if (ctrl & ONENAND_CTRL_LOCK) {
 303                 MTDDEBUG (MTD_DEBUG_LEVEL0,
 304                           "onenand_wait: it's locked error = 0x%04x\n", ctrl);
 305                 return -EIO;
 306         }
 307
 308         if (interrupt & ONENAND_INT_READ) {
 309                 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 310                 if (ecc & ONENAND_ECC_2BIT_ALL) {
 311                         MTDDEBUG (MTD_DEBUG_LEVEL0,
 312                                   "onenand_wait: ECC error = 0x%04x\n", ecc);
 313                         return -EBADMSG;
 314                 }
 315         }
 316
 317         return 0;
 318 }
 319
 320 /**
 321  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 322  * @param mtd           MTD data structure
 323  * @param area          BufferRAM area
 324  * @return              offset given area
 325  *
 326  * Return BufferRAM offset given area
 327  */
 328 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 329 {
 330         struct onenand_chip *this = mtd->priv;
 331
 332         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 333                 if (area == ONENAND_DATARAM)
 334                         return mtd->oobblock;
 335                 if (area == ONENAND_SPARERAM)
 336                         return mtd->oobsize;
 337         }
 338
 339         return 0;
 340 }
 341
 342 /**
 343  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 344  * @param mtd           MTD data structure
 345  * @param area          BufferRAM area
 346  * @param buffer        the databuffer to put/get data
 347  * @param offset        offset to read from or write to
 348  * @param count         number of bytes to read/write
 349  *
 350  * Read the BufferRAM area
 351  */
 352 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 353                                   unsigned char *buffer, int offset,
 354                                   size_t count)
 355 {
 356         struct onenand_chip *this = mtd->priv;
 357         void __iomem *bufferram;
 358
 359         bufferram = this->base + area;
 360         bufferram += onenand_bufferram_offset(mtd, area);
 361
 362         memcpy_16(buffer, bufferram + offset, count);
 363
 364         return 0;
 365 }
 366
 367 /**
 368  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 369  * @param mtd           MTD data structure
 370  * @param area          BufferRAM area
 371  * @param buffer        the databuffer to put/get data
 372  * @param offset        offset to read from or write to
 373  * @param count         number of bytes to read/write
 374  *
 375  * Read the BufferRAM area with Sync. Burst Mode
 376  */
 377 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 378                                        unsigned char *buffer, int offset,
 379                                        size_t count)
 380 {
 381         struct onenand_chip *this = mtd->priv;
 382         void __iomem *bufferram;
 383
 384         bufferram = this->base + area;
 385         bufferram += onenand_bufferram_offset(mtd, area);
 386
 387         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 388
 389         memcpy_16(buffer, bufferram + offset, count);
 390
 391         this->mmcontrol(mtd, 0);
 392
 393         return 0;
 394 }
 395
 396 /**
 397  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 398  * @param mtd           MTD data structure
 399  * @param area          BufferRAM area
 400  * @param buffer        the databuffer to put/get data
 401  * @param offset        offset to read from or write to
 402  * @param count         number of bytes to read/write
 403  *
 404  * Write the BufferRAM area
 405  */
 406 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 407                                    const unsigned char *buffer, int offset,
 408                                    size_t count)
 409 {
 410         struct onenand_chip *this = mtd->priv;
 411         void __iomem *bufferram;
 412
 413         bufferram = this->base + area;
 414         bufferram += onenand_bufferram_offset(mtd, area);
 415
 416         memcpy_16(bufferram + offset, buffer, count);
 417
 418         return 0;
 419 }
 420
 421 /**
 422  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 423  * @param mtd           MTD data structure
 424  * @param addr          address to check
 425  * @return              1 if there are valid data, otherwise 0
 426  *
 427  * Check bufferram if there is data we required
 428  */
 429 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 430 {
 431         struct onenand_chip *this = mtd->priv;
 432         int block, page;
 433         int i;
 434
 435         block = (int)(addr >> this->erase_shift);
 436         page = (int)(addr >> this->page_shift);
 437         page &= this->page_mask;
 438
 439         i = ONENAND_CURRENT_BUFFERRAM(this);
 440
 441         /* Is there valid data? */
 442         if (this->bufferram[i].block == block &&
 443             this->bufferram[i].page == page && this->bufferram[i].valid)
 444                 return 1;
 445
 446         return 0;
 447 }
 448
 449 /**
 450  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 451  * @param mtd           MTD data structure
 452  * @param addr          address to update
 453  * @param valid         valid flag
 454  *
 455  * Update BufferRAM information
 456  */
 457 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 458                                     int valid)
 459 {
 460         struct onenand_chip *this = mtd->priv;
 461         int block, page;
 462         int i;
 463
 464         block = (int)(addr >> this->erase_shift);
 465         page = (int)(addr >> this->page_shift);
 466         page &= this->page_mask;
 467
 468         /* Invalidate BufferRAM */
 469         for (i = 0; i < MAX_BUFFERRAM; i++) {
 470                 if (this->bufferram[i].block == block &&
 471                     this->bufferram[i].page == page)
 472                         this->bufferram[i].valid = 0;
 473         }
 474
 475         /* Update BufferRAM */
 476         i = ONENAND_CURRENT_BUFFERRAM(this);
 477         this->bufferram[i].block = block;
 478         this->bufferram[i].page = page;
 479         this->bufferram[i].valid = valid;
 480
 481         return 0;
 482 }
 483
 484 /**
 485  * onenand_get_device - [GENERIC] Get chip for selected access
 486  * @param mtd           MTD device structure
 487  * @param new_state     the state which is requested
 488  *
 489  * Get the device and lock it for exclusive access
 490  */
 491 static void onenand_get_device(struct mtd_info *mtd, int new_state)
 492 {
 493         /* Do nothing */
 494 }
 495
 496 /**
 497  * onenand_release_device - [GENERIC] release chip
 498  * @param mtd           MTD device structure
 499  *
 500  * Deselect, release chip lock and wake up anyone waiting on the device
 501  */
 502 static void onenand_release_device(struct mtd_info *mtd)
 503 {
 504         /* Do nothing */
 505 }
 506
 507 /**
 508  * onenand_read_ecc - [MTD Interface] Read data with ECC
 509  * @param mtd           MTD device structure
 510  * @param from          offset to read from
 511  * @param len           number of bytes to read
 512  * @param retlen        pointer to variable to store the number of read bytes
 513  * @param buf           the databuffer to put data
 514  * @param oob_buf       filesystem supplied oob data buffer
 515  * @param oobsel        oob selection structure
 516  *
 517  * OneNAND read with ECC
 518  */
 519 static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
 520                             size_t * retlen, u_char * buf,
 521                             u_char * oob_buf, struct nand_oobinfo *oobsel)
 522 {
 523         struct onenand_chip *this = mtd->priv;
 524         int read = 0, column;
 525         int thislen;
 526         int ret = 0;
 527
 528         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_read_ecc: "
 529                   "from = 0x%08x, len = %i\n",
 530                   (unsigned int)from, (int)len);
 531
 532         /* Do not allow reads past end of device */
 533         if ((from + len) > mtd->size) {
 534                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_read_ecc: "
 535                           "Attempt read beyond end of device\n");
 536                 *retlen = 0;
 537                 return -EINVAL;
 538         }
 539
 540         /* Grab the lock and see if the device is available */
 541         onenand_get_device(mtd, FL_READING);
 542
 543         while (read < len) {
 544                 thislen = min_t(int, mtd->oobblock, len - read);
 545
 546                 column = from & (mtd->oobblock - 1);
 547                 if (column + thislen > mtd->oobblock)
 548                         thislen = mtd->oobblock - column;
 549
 550                 if (!onenand_check_bufferram(mtd, from)) {
 551                         this->command(mtd, ONENAND_CMD_READ, from,
 552                                       mtd->oobblock);
 553                         ret = this->wait(mtd, FL_READING);
 554                         /* First copy data and check return value for ECC handling */
 555                         onenand_update_bufferram(mtd, from, 1);
 556                 }
 557
 558                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column,
 559                                      thislen);
 560
 561                 read += thislen;
 562                 if (read == len)
 563                         break;
 564
 565                 if (ret) {
 566                         MTDDEBUG (MTD_DEBUG_LEVEL0,
 567                                   "onenand_read_ecc: read failed = %d\n", ret);
 568                         break;
 569                 }
 570
 571                 from += thislen;
 572                 buf += thislen;
 573         }
 574
 575         /* Deselect and wake up anyone waiting on the device */
 576         onenand_release_device(mtd);
 577
 578         /*
 579          * Return success, if no ECC failures, else -EBADMSG
 580          * fs driver will take care of that, because
 581          * retlen == desired len and result == -EBADMSG
 582          */
 583         *retlen = read;
 584         return ret;
 585 }
 586
 587 /**
 588  * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
 589  * @param mtd           MTD device structure
 590  * @param from          offset to read from
 591  * @param len           number of bytes to read
 592  * @param retlen        pointer to variable to store the number of read bytes
 593  * @param buf           the databuffer to put data
 594  *
 595  * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
 596 */
 597 int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
 598                  size_t * retlen, u_char * buf)
 599 {
 600         return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL);
 601 }
 602
 603 /**
 604  * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
 605  * @param mtd           MTD device structure
 606  * @param from          offset to read from
 607  * @param len           number of bytes to read
 608  * @param retlen        pointer to variable to store the number of read bytes
 609  * @param buf           the databuffer to put data
 610  *
 611  * OneNAND read out-of-band data from the spare area
 612  */
 613 int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
 614                      size_t * retlen, u_char * buf)
 615 {
 616         struct onenand_chip *this = mtd->priv;
 617         int read = 0, thislen, column;
 618         int ret = 0;
 619
 620         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_read_oob: "
 621                   "from = 0x%08x, len = %i\n",
 622                   (unsigned int)from, (int)len);
 623
 624         /* Initialize return length value */
 625         *retlen = 0;
 626
 627         /* Do not allow reads past end of device */
 628         if (unlikely((from + len) > mtd->size)) {
 629                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_read_oob: "
 630                           "Attempt read beyond end of device\n");
 631                 return -EINVAL;
 632         }
 633
 634         /* Grab the lock and see if the device is available */
 635         onenand_get_device(mtd, FL_READING);
 636
 637         column = from & (mtd->oobsize - 1);
 638
 639         while (read < len) {
 640                 thislen = mtd->oobsize - column;
 641                 thislen = min_t(int, thislen, len);
 642
 643                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
 644
 645                 onenand_update_bufferram(mtd, from, 0);
 646
 647                 ret = this->wait(mtd, FL_READING);
 648                 /* First copy data and check return value for ECC handling */
 649
 650                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column,
 651                                      thislen);
 652
 653                 read += thislen;
 654                 if (read == len)
 655                         break;
 656
 657                 if (ret) {
 658                         MTDDEBUG (MTD_DEBUG_LEVEL0,
 659                                   "onenand_read_oob: read failed = %d\n", ret);
 660                         break;
 661                 }
 662
 663                 buf += thislen;
 664                 /* Read more? */
 665                 if (read < len) {
 666                         /* Page size */
 667                         from += mtd->oobblock;
 668                         column = 0;
 669                 }
 670         }
 671
 672         /* Deselect and wake up anyone waiting on the device */
 673         onenand_release_device(mtd);
 674
 675         *retlen = read;
 676         return ret;
 677 }
 678
 679 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
 680 /**
 681  * onenand_verify_page - [GENERIC] verify the chip contents after a write
 682  * @param mtd           MTD device structure
 683  * @param buf           the databuffer to verify
 684  *
 685  * Check DataRAM area directly
 686  */
 687 static int onenand_verify_page(struct mtd_info *mtd, u_char * buf,
 688                                loff_t addr)
 689 {
 690         struct onenand_chip *this = mtd->priv;
 691         void __iomem *dataram0, *dataram1;
 692         int ret = 0;
 693
 694         this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock);
 695
 696         ret = this->wait(mtd, FL_READING);
 697         if (ret)
 698                 return ret;
 699
 700         onenand_update_bufferram(mtd, addr, 1);
 701
 702         /* Check, if the two dataram areas are same */
 703         dataram0 = this->base + ONENAND_DATARAM;
 704         dataram1 = dataram0 + mtd->oobblock;
 705
 706         if (memcmp(dataram0, dataram1, mtd->oobblock))
 707                 return -EBADMSG;
 708
 709         return 0;
 710 }
 711 #else
 712 #define onenand_verify_page(...)        (0)
 713 #endif
 714
 715 #define NOTALIGNED(x)   ((x & (mtd->oobblock - 1)) != 0)
 716
 717 /**
 718  * onenand_write_ecc - [MTD Interface] OneNAND write with ECC
 719  * @param mtd           MTD device structure
 720  * @param to            offset to write to
 721  * @param len           number of bytes to write
 722  * @param retlen        pointer to variable to store the number of written bytes
 723  * @param buf           the data to write
 724  * @param eccbuf        filesystem supplied oob data buffer
 725  * @param oobsel        oob selection structure
 726  *
 727  * OneNAND write with ECC
 728  */
 729 static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
 730                              size_t * retlen, const u_char * buf,
 731                              u_char * eccbuf, struct nand_oobinfo *oobsel)
 732 {
 733         struct onenand_chip *this = mtd->priv;
 734         int written = 0;
 735         int ret = 0;
 736
 737         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_write_ecc: "
 738                   "to = 0x%08x, len = %i\n",
 739                   (unsigned int)to, (int)len);
 740
 741         /* Initialize retlen, in case of early exit */
 742         *retlen = 0;
 743
 744         /* Do not allow writes past end of device */
 745         if (unlikely((to + len) > mtd->size)) {
 746                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_ecc: "
 747                           "Attempt write to past end of device\n");
 748                 return -EINVAL;
 749         }
 750
 751         /* Reject writes, which are not page aligned */
 752         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
 753                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_ecc: "
 754                           "Attempt to write not page aligned data\n");
 755                 return -EINVAL;
 756         }
 757
 758         /* Grab the lock and see if the device is available */
 759         onenand_get_device(mtd, FL_WRITING);
 760
 761         /* Loop until all data write */
 762         while (written < len) {
 763                 int thislen = min_t(int, mtd->oobblock, len - written);
 764
 765                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock);
 766
 767                 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
 768                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0,
 769                                       mtd->oobsize);
 770
 771                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock);
 772
 773                 onenand_update_bufferram(mtd, to, 1);
 774
 775                 ret = this->wait(mtd, FL_WRITING);
 776                 if (ret) {
 777                         MTDDEBUG (MTD_DEBUG_LEVEL0,
 778                                   "onenand_write_ecc: write filaed %d\n", ret);
 779                         break;
 780                 }
 781
 782                 written += thislen;
 783
 784                 /* Only check verify write turn on */
 785                 ret = onenand_verify_page(mtd, (u_char *) buf, to);
 786                 if (ret) {
 787                         MTDDEBUG (MTD_DEBUG_LEVEL0,
 788                                   "onenand_write_ecc: verify failed %d\n", ret);
 789                         break;
 790                 }
 791
 792                 if (written == len)
 793                         break;
 794
 795                 to += thislen;
 796                 buf += thislen;
 797         }
 798
 799         /* Deselect and wake up anyone waiting on the device */
 800         onenand_release_device(mtd);
 801
 802         *retlen = written;
 803
 804         return ret;
 805 }
 806
 807 /**
 808  * onenand_write - [MTD Interface] compability function for onenand_write_ecc
 809  * @param mtd           MTD device structure
 810  * @param to            offset to write to
 811  * @param len           number of bytes to write
 812  * @param retlen        pointer to variable to store the number of written bytes
 813  * @param buf           the data to write
 814  *
 815  * This function simply calls onenand_write_ecc
 816  * with oob buffer and oobsel = NULL
 817  */
 818 int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
 819                   size_t * retlen, const u_char * buf)
 820 {
 821         return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL);
 822 }
 823
 824 /**
 825  * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
 826  * @param mtd           MTD device structure
 827  * @param to            offset to write to
 828  * @param len           number of bytes to write
 829  * @param retlen        pointer to variable to store the number of written bytes
 830  * @param buf           the data to write
 831  *
 832  * OneNAND write out-of-band
 833  */
 834 int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
 835                       size_t * retlen, const u_char * buf)
 836 {
 837         struct onenand_chip *this = mtd->priv;
 838         int column, status;
 839         int written = 0;
 840
 841         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_write_oob: "
 842                   "to = 0x%08x, len = %i\n",
 843                   (unsigned int)to, (int)len);
 844
 845         /* Initialize retlen, in case of early exit */
 846         *retlen = 0;
 847
 848         /* Do not allow writes past end of device */
 849         if (unlikely((to + len) > mtd->size)) {
 850                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_oob: "
 851                           "Attempt write to past end of device\n");
 852                 return -EINVAL;
 853         }
 854
 855         /* Grab the lock and see if the device is available */
 856         onenand_get_device(mtd, FL_WRITING);
 857
 858         /* Loop until all data write */
 859         while (written < len) {
 860                 int thislen = min_t(int, mtd->oobsize, len - written);
 861
 862                 column = to & (mtd->oobsize - 1);
 863
 864                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
 865
 866                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0,
 867                                       mtd->oobsize);
 868                 this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column,
 869                                       thislen);
 870
 871                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
 872
 873                 onenand_update_bufferram(mtd, to, 0);
 874
 875                 status = this->wait(mtd, FL_WRITING);
 876                 if (status)
 877                         break;
 878
 879                 written += thislen;
 880                 if (written == len)
 881                         break;
 882
 883                 to += thislen;
 884                 buf += thislen;
 885         }
 886
 887         /* Deselect and wake up anyone waiting on the device */
 888         onenand_release_device(mtd);
 889
 890         *retlen = written;
 891
 892         return 0;
 893 }
 894
 895 /**
 896  * onenand_erase - [MTD Interface] erase block(s)
 897  * @param mtd           MTD device structure
 898  * @param instr         erase instruction
 899  *
 900  * Erase one ore more blocks
 901  */
 902 int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
 903 {
 904         struct onenand_chip *this = mtd->priv;
 905         unsigned int block_size;
 906         loff_t addr;
 907         int len;
 908         int ret = 0;
 909
 910         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n",
 911                   (unsigned int)instr->addr, (unsigned int)instr->len);
 912
 913         block_size = (1 << this->erase_shift);
 914
 915         /* Start address must align on block boundary */
 916         if (unlikely(instr->addr & (block_size - 1))) {
 917                 MTDDEBUG (MTD_DEBUG_LEVEL0,
 918                           "onenand_erase: Unaligned address\n");
 919                 return -EINVAL;
 920         }
 921
 922         /* Length must align on block boundary */
 923         if (unlikely(instr->len & (block_size - 1))) {
 924                 MTDDEBUG (MTD_DEBUG_LEVEL0,
 925                           "onenand_erase: Length not block aligned\n");
 926                 return -EINVAL;
 927         }
 928
 929         /* Do not allow erase past end of device */
 930         if (unlikely((instr->len + instr->addr) > mtd->size)) {
 931                 MTDDEBUG (MTD_DEBUG_LEVEL0,
 932                           "onenand_erase: Erase past end of device\n");
 933                 return -EINVAL;
 934         }
 935
 936         instr->fail_addr = 0xffffffff;
 937
 938         /* Grab the lock and see if the device is available */
 939         onenand_get_device(mtd, FL_ERASING);
 940
 941         /* Loop throught the pages */
 942         len = instr->len;
 943         addr = instr->addr;
 944
 945         instr->state = MTD_ERASING;
 946
 947         while (len) {
 948
 949                 /* TODO Check badblock */
 950
 951                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
 952
 953                 ret = this->wait(mtd, FL_ERASING);
 954                 /* Check, if it is write protected */
 955                 if (ret) {
 956                         if (ret == -EPERM)
 957                                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
 958                                           "Device is write protected!!!\n");
 959                         else
 960                                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
 961                                           "Failed erase, block %d\n",
 962                                           (unsigned)(addr >> this->erase_shift));
 963                         instr->state = MTD_ERASE_FAILED;
 964                         instr->fail_addr = addr;
 965                         goto erase_exit;
 966                 }
 967
 968                 len -= block_size;
 969                 addr += block_size;
 970         }
 971
 972         instr->state = MTD_ERASE_DONE;
 973
 974       erase_exit:
 975
 976         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
 977         /* Do call back function */
 978         if (!ret)
 979                 mtd_erase_callback(instr);
 980
 981         /* Deselect and wake up anyone waiting on the device */
 982         onenand_release_device(mtd);
 983
 984         return ret;
 985 }
 986
 987 /**
 988  * onenand_sync - [MTD Interface] sync
 989  * @param mtd           MTD device structure
 990  *
 991  * Sync is actually a wait for chip ready function
 992  */
 993 void onenand_sync(struct mtd_info *mtd)
 994 {
 995         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
 996
 997         /* Grab the lock and see if the device is available */
 998         onenand_get_device(mtd, FL_SYNCING);
 999
1000         /* Release it and go back */
1001         onenand_release_device(mtd);
1002 }
1003
1004 /**
1005  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1006  * @param mtd           MTD device structure
1007  * @param ofs           offset relative to mtd start
1008  */
1009 int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1010 {
1011         /*
1012          * TODO
1013          * 1. Bad block table (BBT)
1014          *   -> using NAND BBT to support JFFS2
1015          * 2. Bad block management (BBM)
1016          *   -> bad block replace scheme
1017          *
1018          * Currently we do nothing
1019          */
1020         return 0;
1021 }
1022
1023 /**
1024  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1025  * @param mtd           MTD device structure
1026  * @param ofs           offset relative to mtd start
1027  */
1028 int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1029 {
1030         /* see above */
1031         return 0;
1032 }
1033
1034 /**
1035  * onenand_unlock - [MTD Interface] Unlock block(s)
1036  * @param mtd           MTD device structure
1037  * @param ofs           offset relative to mtd start
1038  * @param len           number of bytes to unlock
1039  *
1040  * Unlock one or more blocks
1041  */
1042 int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1043 {
1044         struct onenand_chip *this = mtd->priv;
1045         int start, end, block, value, status;
1046
1047         start = ofs >> this->erase_shift;
1048         end = len >> this->erase_shift;
1049
1050         /* Continuous lock scheme */
1051         if (this->options & ONENAND_CONT_LOCK) {
1052                 /* Set start block address */
1053                 this->write_word(start,
1054                                  this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1055                 /* Set end block address */
1056                 this->write_word(end - 1,
1057                                  this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1058                 /* Write unlock command */
1059                 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1060
1061                 /* There's no return value */
1062                 this->wait(mtd, FL_UNLOCKING);
1063
1064                 /* Sanity check */
1065                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1066                        & ONENAND_CTRL_ONGO)
1067                         continue;
1068
1069                 /* Check lock status */
1070                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1071                 if (!(status & ONENAND_WP_US))
1072                         printk(KERN_ERR "wp status = 0x%x\n", status);
1073
1074                 return 0;
1075         }
1076
1077         /* Block lock scheme */
1078         for (block = start; block < end; block++) {
1079                 /* Set start block address */
1080                 this->write_word(block,
1081                                  this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1082                 /* Write unlock command */
1083                 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1084
1085                 /* There's no return value */
1086                 this->wait(mtd, FL_UNLOCKING);
1087
1088                 /* Sanity check */
1089                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1090                        & ONENAND_CTRL_ONGO)
1091                         continue;
1092
1093                 /* Set block address for read block status */
1094                 value = onenand_block_address(this->device_id, block);
1095                 this->write_word(value,
1096                                  this->base + ONENAND_REG_START_ADDRESS1);
1097
1098                 /* Check lock status */
1099                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1100                 if (!(status & ONENAND_WP_US))
1101                         printk(KERN_ERR "block = %d, wp status = 0x%x\n",
1102                                block, status);
1103         }
1104
1105         return 0;
1106 }
1107
1108 /**
1109  * onenand_print_device_info - Print device ID
1110  * @param device        device ID
1111  *
1112  * Print device ID
1113  */
1114 char * onenand_print_device_info(int device)
1115 {
1116         int vcc, demuxed, ddp, density;
1117         char *dev_info = malloc(80);
1118
1119         vcc = device & ONENAND_DEVICE_VCC_MASK;
1120         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1121         ddp = device & ONENAND_DEVICE_IS_DDP;
1122         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1123         sprintf(dev_info, "%sOneNAND%s %dMB %sV 16-bit (0x%02x)",
1124                demuxed ? "" : "Muxed ",
1125                ddp ? "(DDP)" : "",
1126                (16 << density), vcc ? "2.65/3.3" : "1.8", device);
1127
1128         return dev_info;
1129 }
1130
1131 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1132         {ONENAND_MFR_SAMSUNG, "Samsung"},
1133         {ONENAND_MFR_UNKNOWN, "Unknown"}
1134 };
1135
1136 /**
1137  * onenand_check_maf - Check manufacturer ID
1138  * @param manuf         manufacturer ID
1139  *
1140  * Check manufacturer ID
1141  */
1142 static int onenand_check_maf(int manuf)
1143 {
1144         int i;
1145
1146         for (i = 0; onenand_manuf_ids[i].id; i++) {
1147                 if (manuf == onenand_manuf_ids[i].id)
1148                         break;
1149         }
1150
1151 #ifdef ONENAND_DEBUG
1152         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n",
1153                onenand_manuf_ids[i].name, manuf);
1154 #endif
1155
1156         return (i != ONENAND_MFR_UNKNOWN);
1157 }
1158
1159 /**
1160  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1161  * @param mtd           MTD device structure
1162  *
1163  * OneNAND detection method:
1164  *   Compare the the values from command with ones from register
1165  */
1166 static int onenand_probe(struct mtd_info *mtd)
1167 {
1168         struct onenand_chip *this = mtd->priv;
1169         int bram_maf_id, bram_dev_id, maf_id, dev_id;
1170         int version_id;
1171         int density;
1172
1173         /* Send the command for reading device ID from BootRAM */
1174         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1175
1176         /* Read manufacturer and device IDs from BootRAM */
1177         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1178         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1179
1180         /* Check manufacturer ID */
1181         if (onenand_check_maf(bram_maf_id))
1182                 return -ENXIO;
1183
1184         /* Reset OneNAND to read default register values */
1185         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1186
1187         {
1188                 int i;
1189                 for (i = 0; i < 10000; i++) ;
1190         }
1191
1192         /* Read manufacturer and device IDs from Register */
1193         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1194         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1195
1196         /* Check OneNAND device */
1197         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1198                 return -ENXIO;
1199
1200         /* FIXME : Current OneNAND MTD doesn't support Flex-OneNAND */
1201         if (dev_id & (1 << 9)) {
1202                 printk("Not yet support Flex-OneNAND\n");
1203                 return -ENXIO;
1204         }
1205
1206         /* Flash device information */
1207         mtd->name = onenand_print_device_info(dev_id);
1208         this->device_id = dev_id;
1209
1210         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1211         this->chipsize = (16 << density) << 20;
1212
1213         /* OneNAND page size & block size */
1214         /* The data buffer size is equal to page size */
1215         mtd->oobblock =
1216             this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1217         mtd->oobsize = mtd->oobblock >> 5;
1218         /* Pagers per block is always 64 in OneNAND */
1219         mtd->erasesize = mtd->oobblock << 6;
1220
1221         this->erase_shift = ffs(mtd->erasesize) - 1;
1222         this->page_shift = ffs(mtd->oobblock) - 1;
1223         this->ppb_shift = (this->erase_shift - this->page_shift);
1224         this->page_mask = (mtd->erasesize / mtd->oobblock) - 1;
1225
1226         /* REVIST: Multichip handling */
1227
1228         mtd->size = this->chipsize;
1229
1230         /* Version ID */
1231         version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1232 #ifdef ONENAND_DEBUG
1233         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id);
1234 #endif
1235
1236         /* Lock scheme */
1237         if (density <= ONENAND_DEVICE_DENSITY_512Mb &&
1238             !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) {
1239                 printk(KERN_INFO "Lock scheme is Continues Lock\n");
1240                 this->options |= ONENAND_CONT_LOCK;
1241         }
1242
1243         mtd->erase = onenand_erase;
1244         mtd->read = onenand_read;
1245         mtd->write = onenand_write;
1246         mtd->read_ecc = onenand_read_ecc;
1247         mtd->write_ecc = onenand_write_ecc;
1248         mtd->read_oob = onenand_read_oob;
1249         mtd->write_oob = onenand_write_oob;
1250         mtd->sync = onenand_sync;
1251         mtd->block_isbad = onenand_block_isbad;
1252         mtd->block_markbad = onenand_block_markbad;
1253
1254         return 0;
1255 }
1256
1257 /**
1258  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1259  * @param mtd           MTD device structure
1260  * @param maxchips      Number of chips to scan for
1261  *
1262  * This fills out all the not initialized function pointers
1263  * with the defaults.
1264  * The flash ID is read and the mtd/chip structures are
1265  * filled with the appropriate values.
1266  */
1267 int onenand_scan(struct mtd_info *mtd, int maxchips)
1268 {
1269         struct onenand_chip *this = mtd->priv;
1270
1271         if (!this->read_word)
1272                 this->read_word = onenand_readw;
1273         if (!this->write_word)
1274                 this->write_word = onenand_writew;
1275
1276         if (!this->command)
1277                 this->command = onenand_command;
1278         if (!this->wait)
1279                 this->wait = onenand_wait;
1280
1281         if (!this->read_bufferram)
1282                 this->read_bufferram = onenand_read_bufferram;
1283         if (!this->write_bufferram)
1284                 this->write_bufferram = onenand_write_bufferram;
1285
1286         if (onenand_probe(mtd))
1287                 return -ENXIO;
1288
1289         /* Set Sync. Burst Read after probing */
1290         if (this->mmcontrol) {
1291                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
1292                 this->read_bufferram = onenand_sync_read_bufferram;
1293         }
1294
1295         onenand_unlock(mtd, 0, mtd->size);
1296
1297         return onenand_default_bbt(mtd);
1298 }
1299
1300 /**
1301  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
1302  * @param mtd           MTD device structure
1303  */
1304 void onenand_release(struct mtd_info *mtd)
1305 {
1306 }
1307
1308 #endif /* CONFIG_CMD_ONENAND */