drivers/mtd/onenand/onenand_base.c

   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005-2007 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <common.h>
  13 #include <linux/mtd/compat.h>
  14 #include <linux/mtd/mtd.h>
  15 #include <linux/mtd/onenand.h>
  16
  17 #include <asm/io.h>
  18 #include <asm/errno.h>
  19 #include <malloc.h>
  20
  21 /* It should access 16-bit instead of 8-bit */
  22 static inline void *memcpy_16(void *dst, const void *src, unsigned int len)
  23 {
  24         void *ret = dst;
  25         short *d = dst;
  26         const short *s = src;
  27
  28         len >>= 1;
  29         while (len-- > 0)
  30                 *d++ = *s++;
  31         return ret;
  32 }
  33
  34 static const unsigned char ffchars[] = {
  35         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  36         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  37         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  38         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  39         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  40         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  41         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  42         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  43 };
  44
  45 /**
  46  * onenand_readw - [OneNAND Interface] Read OneNAND register
  47  * @param addr          address to read
  48  *
  49  * Read OneNAND register
  50  */
  51 static unsigned short onenand_readw(void __iomem * addr)
  52 {
  53         return readw(addr);
  54 }
  55
  56 /**
  57  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  58  * @param value         value to write
  59  * @param addr          address to write
  60  *
  61  * Write OneNAND register with value
  62  */
  63 static void onenand_writew(unsigned short value, void __iomem * addr)
  64 {
  65         writew(value, addr);
  66 }
  67
  68 /**
  69  * onenand_block_address - [DEFAULT] Get block address
  70  * @param device        the device id
  71  * @param block         the block
  72  * @return              translated block address if DDP, otherwise same
  73  *
  74  * Setup Start Address 1 Register (F100h)
  75  */
  76 static int onenand_block_address(int device, int block)
  77 {
  78         if (device & ONENAND_DEVICE_IS_DDP) {
  79                 /* Device Flash Core select, NAND Flash Block Address */
  80                 int dfs = 0, density, mask;
  81
  82                 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
  83                 mask = (1 << (density + 6));
  84
  85                 if (block & mask)
  86                         dfs = 1;
  87
  88                 return (dfs << ONENAND_DDP_SHIFT) | (block & (mask - 1));
  89         }
  90
  91         return block;
  92 }
  93
  94 /**
  95  * onenand_bufferram_address - [DEFAULT] Get bufferram address
  96  * @param device        the device id
  97  * @param block         the block
  98  * @return              set DBS value if DDP, otherwise 0
  99  *
 100  * Setup Start Address 2 Register (F101h) for DDP
 101  */
 102 static int onenand_bufferram_address(int device, int block)
 103 {
 104         if (device & ONENAND_DEVICE_IS_DDP) {
 105                 /* Device BufferRAM Select */
 106                 int dbs = 0, density, mask;
 107
 108                 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
 109                 mask = (1 << (density + 6));
 110
 111                 if (block & mask)
 112                         dbs = 1;
 113
 114                 return (dbs << ONENAND_DDP_SHIFT);
 115         }
 116
 117         return 0;
 118 }
 119
 120 /**
 121  * onenand_page_address - [DEFAULT] Get page address
 122  * @param page          the page address
 123  * @param sector        the sector address
 124  * @return              combined page and sector address
 125  *
 126  * Setup Start Address 8 Register (F107h)
 127  */
 128 static int onenand_page_address(int page, int sector)
 129 {
 130         /* Flash Page Address, Flash Sector Address */
 131         int fpa, fsa;
 132
 133         fpa = page & ONENAND_FPA_MASK;
 134         fsa = sector & ONENAND_FSA_MASK;
 135
 136         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 137 }
 138
 139 /**
 140  * onenand_buffer_address - [DEFAULT] Get buffer address
 141  * @param dataram1      DataRAM index
 142  * @param sectors       the sector address
 143  * @param count         the number of sectors
 144  * @return              the start buffer value
 145  *
 146  * Setup Start Buffer Register (F200h)
 147  */
 148 static int onenand_buffer_address(int dataram1, int sectors, int count)
 149 {
 150         int bsa, bsc;
 151
 152         /* BufferRAM Sector Address */
 153         bsa = sectors & ONENAND_BSA_MASK;
 154
 155         if (dataram1)
 156                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 157         else
 158                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 159
 160         /* BufferRAM Sector Count */
 161         bsc = count & ONENAND_BSC_MASK;
 162
 163         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 164 }
 165
 166 /**
 167  * onenand_command - [DEFAULT] Send command to OneNAND device
 168  * @param mtd           MTD device structure
 169  * @param cmd           the command to be sent
 170  * @param addr          offset to read from or write to
 171  * @param len           number of bytes to read or write
 172  *
 173  * Send command to OneNAND device. This function is used for middle/large page
 174  * devices (1KB/2KB Bytes per page)
 175  */
 176 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr,
 177                            size_t len)
 178 {
 179         struct onenand_chip *this = mtd->priv;
 180         int value, readcmd = 0;
 181         int block, page;
 182         /* Now we use page size operation */
 183         int sectors = 4, count = 4;
 184
 185         /* Address translation */
 186         switch (cmd) {
 187         case ONENAND_CMD_UNLOCK:
 188         case ONENAND_CMD_LOCK:
 189         case ONENAND_CMD_LOCK_TIGHT:
 190                 block = -1;
 191                 page = -1;
 192                 break;
 193
 194         case ONENAND_CMD_ERASE:
 195         case ONENAND_CMD_BUFFERRAM:
 196                 block = (int)(addr >> this->erase_shift);
 197                 page = -1;
 198                 break;
 199
 200         default:
 201                 block = (int)(addr >> this->erase_shift);
 202                 page = (int)(addr >> this->page_shift);
 203                 page &= this->page_mask;
 204                 break;
 205         }
 206
 207         /* NOTE: The setting order of the registers is very important! */
 208         if (cmd == ONENAND_CMD_BUFFERRAM) {
 209                 /* Select DataRAM for DDP */
 210                 value = onenand_bufferram_address(this->device_id, block);
 211                 this->write_word(value,
 212                                  this->base + ONENAND_REG_START_ADDRESS2);
 213
 214                 /* Switch to the next data buffer */
 215                 ONENAND_SET_NEXT_BUFFERRAM(this);
 216
 217                 return 0;
 218         }
 219
 220         if (block != -1) {
 221                 /* Write 'DFS, FBA' of Flash */
 222                 value = onenand_block_address(this->device_id, block);
 223                 this->write_word(value,
 224                                  this->base + ONENAND_REG_START_ADDRESS1);
 225         }
 226
 227         if (page != -1) {
 228                 int dataram;
 229
 230                 switch (cmd) {
 231                 case ONENAND_CMD_READ:
 232                 case ONENAND_CMD_READOOB:
 233                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 234                         readcmd = 1;
 235                         break;
 236
 237                 default:
 238                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 239                         break;
 240                 }
 241
 242                 /* Write 'FPA, FSA' of Flash */
 243                 value = onenand_page_address(page, sectors);
 244                 this->write_word(value,
 245                                  this->base + ONENAND_REG_START_ADDRESS8);
 246
 247                 /* Write 'BSA, BSC' of DataRAM */
 248                 value = onenand_buffer_address(dataram, sectors, count);
 249                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 250
 251                 if (readcmd) {
 252                         /* Select DataRAM for DDP */
 253                         value =
 254                             onenand_bufferram_address(this->device_id, block);
 255                         this->write_word(value,
 256                                          this->base +
 257                                          ONENAND_REG_START_ADDRESS2);
 258                 }
 259         }
 260
 261         /* Interrupt clear */
 262         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 263         /* Write command */
 264         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 265
 266         return 0;
 267 }
 268
 269 /**
 270  * onenand_wait - [DEFAULT] wait until the command is done
 271  * @param mtd           MTD device structure
 272  * @param state         state to select the max. timeout value
 273  *
 274  * Wait for command done. This applies to all OneNAND command
 275  * Read can take up to 30us, erase up to 2ms and program up to 350us
 276  * according to general OneNAND specs
 277  */
 278 static int onenand_wait(struct mtd_info *mtd, int state)
 279 {
 280         struct onenand_chip *this = mtd->priv;
 281         unsigned int flags = ONENAND_INT_MASTER;
 282         unsigned int interrupt = 0;
 283         unsigned int ctrl, ecc;
 284
 285         while (1) {
 286                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 287                 if (interrupt & flags)
 288                         break;
 289         }
 290
 291         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 292
 293         if (ctrl & ONENAND_CTRL_ERROR) {
 294                 MTDDEBUG (MTD_DEBUG_LEVEL0,
 295                           "onenand_wait: controller error = 0x%04x\n", ctrl);
 296                 return -EAGAIN;
 297         }
 298
 299         if (ctrl & ONENAND_CTRL_LOCK) {
 300                 MTDDEBUG (MTD_DEBUG_LEVEL0,
 301                           "onenand_wait: it's locked error = 0x%04x\n", ctrl);
 302                 return -EIO;
 303         }
 304
 305         if (interrupt & ONENAND_INT_READ) {
 306                 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 307                 if (ecc & ONENAND_ECC_2BIT_ALL) {
 308                         MTDDEBUG (MTD_DEBUG_LEVEL0,
 309                                   "onenand_wait: ECC error = 0x%04x\n", ecc);
 310                         return -EBADMSG;
 311                 }
 312         }
 313
 314         return 0;
 315 }
 316
 317 /**
 318  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 319  * @param mtd           MTD data structure
 320  * @param area          BufferRAM area
 321  * @return              offset given area
 322  *
 323  * Return BufferRAM offset given area
 324  */
 325 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 326 {
 327         struct onenand_chip *this = mtd->priv;
 328
 329         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 330                 if (area == ONENAND_DATARAM)
 331                         return mtd->oobblock;
 332                 if (area == ONENAND_SPARERAM)
 333                         return mtd->oobsize;
 334         }
 335
 336         return 0;
 337 }
 338
 339 /**
 340  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 341  * @param mtd           MTD data structure
 342  * @param area          BufferRAM area
 343  * @param buffer        the databuffer to put/get data
 344  * @param offset        offset to read from or write to
 345  * @param count         number of bytes to read/write
 346  *
 347  * Read the BufferRAM area
 348  */
 349 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 350                                   unsigned char *buffer, int offset,
 351                                   size_t count)
 352 {
 353         struct onenand_chip *this = mtd->priv;
 354         void __iomem *bufferram;
 355
 356         bufferram = this->base + area;
 357         bufferram += onenand_bufferram_offset(mtd, area);
 358
 359         memcpy_16(buffer, bufferram + offset, count);
 360
 361         return 0;
 362 }
 363
 364 /**
 365  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 366  * @param mtd           MTD data structure
 367  * @param area          BufferRAM area
 368  * @param buffer        the databuffer to put/get data
 369  * @param offset        offset to read from or write to
 370  * @param count         number of bytes to read/write
 371  *
 372  * Read the BufferRAM area with Sync. Burst Mode
 373  */
 374 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 375                                        unsigned char *buffer, int offset,
 376                                        size_t count)
 377 {
 378         struct onenand_chip *this = mtd->priv;
 379         void __iomem *bufferram;
 380
 381         bufferram = this->base + area;
 382         bufferram += onenand_bufferram_offset(mtd, area);
 383
 384         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 385
 386         memcpy_16(buffer, bufferram + offset, count);
 387
 388         this->mmcontrol(mtd, 0);
 389
 390         return 0;
 391 }
 392
 393 /**
 394  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 395  * @param mtd           MTD data structure
 396  * @param area          BufferRAM area
 397  * @param buffer        the databuffer to put/get data
 398  * @param offset        offset to read from or write to
 399  * @param count         number of bytes to read/write
 400  *
 401  * Write the BufferRAM area
 402  */
 403 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 404                                    const unsigned char *buffer, int offset,
 405                                    size_t count)
 406 {
 407         struct onenand_chip *this = mtd->priv;
 408         void __iomem *bufferram;
 409
 410         bufferram = this->base + area;
 411         bufferram += onenand_bufferram_offset(mtd, area);
 412
 413         memcpy_16(bufferram + offset, buffer, count);
 414
 415         return 0;
 416 }
 417
 418 /**
 419  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 420  * @param mtd           MTD data structure
 421  * @param addr          address to check
 422  * @return              1 if there are valid data, otherwise 0
 423  *
 424  * Check bufferram if there is data we required
 425  */
 426 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 427 {
 428         struct onenand_chip *this = mtd->priv;
 429         int block, page;
 430         int i;
 431
 432         block = (int)(addr >> this->erase_shift);
 433         page = (int)(addr >> this->page_shift);
 434         page &= this->page_mask;
 435
 436         i = ONENAND_CURRENT_BUFFERRAM(this);
 437
 438         /* Is there valid data? */
 439         if (this->bufferram[i].block == block &&
 440             this->bufferram[i].page == page && this->bufferram[i].valid)
 441                 return 1;
 442
 443         return 0;
 444 }
 445
 446 /**
 447  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 448  * @param mtd           MTD data structure
 449  * @param addr          address to update
 450  * @param valid         valid flag
 451  *
 452  * Update BufferRAM information
 453  */
 454 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 455                                     int valid)
 456 {
 457         struct onenand_chip *this = mtd->priv;
 458         int block, page;
 459         int i;
 460
 461         block = (int)(addr >> this->erase_shift);
 462         page = (int)(addr >> this->page_shift);
 463         page &= this->page_mask;
 464
 465         /* Invalidate BufferRAM */
 466         for (i = 0; i < MAX_BUFFERRAM; i++) {
 467                 if (this->bufferram[i].block == block &&
 468                     this->bufferram[i].page == page)
 469                         this->bufferram[i].valid = 0;
 470         }
 471
 472         /* Update BufferRAM */
 473         i = ONENAND_CURRENT_BUFFERRAM(this);
 474         this->bufferram[i].block = block;
 475         this->bufferram[i].page = page;
 476         this->bufferram[i].valid = valid;
 477
 478         return 0;
 479 }
 480
 481 /**
 482  * onenand_get_device - [GENERIC] Get chip for selected access
 483  * @param mtd           MTD device structure
 484  * @param new_state     the state which is requested
 485  *
 486  * Get the device and lock it for exclusive access
 487  */
 488 static void onenand_get_device(struct mtd_info *mtd, int new_state)
 489 {
 490         /* Do nothing */
 491 }
 492
 493 /**
 494  * onenand_release_device - [GENERIC] release chip
 495  * @param mtd           MTD device structure
 496  *
 497  * Deselect, release chip lock and wake up anyone waiting on the device
 498  */
 499 static void onenand_release_device(struct mtd_info *mtd)
 500 {
 501         /* Do nothing */
 502 }
 503
 504 /**
 505  * onenand_read_ecc - [MTD Interface] Read data with ECC
 506  * @param mtd           MTD device structure
 507  * @param from          offset to read from
 508  * @param len           number of bytes to read
 509  * @param retlen        pointer to variable to store the number of read bytes
 510  * @param buf           the databuffer to put data
 511  * @param oob_buf       filesystem supplied oob data buffer
 512  * @param oobsel        oob selection structure
 513  *
 514  * OneNAND read with ECC
 515  */
 516 static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
 517                             size_t * retlen, u_char * buf,
 518                             u_char * oob_buf, struct nand_oobinfo *oobsel)
 519 {
 520         struct onenand_chip *this = mtd->priv;
 521         int read = 0, column;
 522         int thislen;
 523         int ret = 0;
 524
 525         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_read_ecc: "
 526                   "from = 0x%08x, len = %i\n",
 527                   (unsigned int)from, (int)len);
 528
 529         /* Do not allow reads past end of device */
 530         if ((from + len) > mtd->size) {
 531                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_read_ecc: "
 532                           "Attempt read beyond end of device\n");
 533                 *retlen = 0;
 534                 return -EINVAL;
 535         }
 536
 537         /* Grab the lock and see if the device is available */
 538         onenand_get_device(mtd, FL_READING);
 539
 540         while (read < len) {
 541                 thislen = min_t(int, mtd->oobblock, len - read);
 542
 543                 column = from & (mtd->oobblock - 1);
 544                 if (column + thislen > mtd->oobblock)
 545                         thislen = mtd->oobblock - column;
 546
 547                 if (!onenand_check_bufferram(mtd, from)) {
 548                         this->command(mtd, ONENAND_CMD_READ, from,
 549                                       mtd->oobblock);
 550                         ret = this->wait(mtd, FL_READING);
 551                         /* First copy data and check return value for ECC handling */
 552                         onenand_update_bufferram(mtd, from, 1);
 553                 }
 554
 555                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column,
 556                                      thislen);
 557
 558                 read += thislen;
 559                 if (read == len)
 560                         break;
 561
 562                 if (ret) {
 563                         MTDDEBUG (MTD_DEBUG_LEVEL0,
 564                                   "onenand_read_ecc: read failed = %d\n", ret);
 565                         break;
 566                 }
 567
 568                 from += thislen;
 569                 buf += thislen;
 570         }
 571
 572         /* Deselect and wake up anyone waiting on the device */
 573         onenand_release_device(mtd);
 574
 575         /*
 576          * Return success, if no ECC failures, else -EBADMSG
 577          * fs driver will take care of that, because
 578          * retlen == desired len and result == -EBADMSG
 579          */
 580         *retlen = read;
 581         return ret;
 582 }
 583
 584 /**
 585  * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
 586  * @param mtd           MTD device structure
 587  * @param from          offset to read from
 588  * @param len           number of bytes to read
 589  * @param retlen        pointer to variable to store the number of read bytes
 590  * @param buf           the databuffer to put data
 591  *
 592  * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
 593 */
 594 int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
 595                  size_t * retlen, u_char * buf)
 596 {
 597         return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL);
 598 }
 599
 600 /**
 601  * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
 602  * @param mtd           MTD device structure
 603  * @param from          offset to read from
 604  * @param len           number of bytes to read
 605  * @param retlen        pointer to variable to store the number of read bytes
 606  * @param buf           the databuffer to put data
 607  *
 608  * OneNAND read out-of-band data from the spare area
 609  */
 610 int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
 611                      size_t * retlen, u_char * buf)
 612 {
 613         struct onenand_chip *this = mtd->priv;
 614         int read = 0, thislen, column;
 615         int ret = 0;
 616
 617         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_read_oob: "
 618                   "from = 0x%08x, len = %i\n",
 619                   (unsigned int)from, (int)len);
 620
 621         /* Initialize return length value */
 622         *retlen = 0;
 623
 624         /* Do not allow reads past end of device */
 625         if (unlikely((from + len) > mtd->size)) {
 626                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_read_oob: "
 627                           "Attempt read beyond end of device\n");
 628                 return -EINVAL;
 629         }
 630
 631         /* Grab the lock and see if the device is available */
 632         onenand_get_device(mtd, FL_READING);
 633
 634         column = from & (mtd->oobsize - 1);
 635
 636         while (read < len) {
 637                 thislen = mtd->oobsize - column;
 638                 thislen = min_t(int, thislen, len);
 639
 640                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
 641
 642                 onenand_update_bufferram(mtd, from, 0);
 643
 644                 ret = this->wait(mtd, FL_READING);
 645                 /* First copy data and check return value for ECC handling */
 646
 647                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column,
 648                                      thislen);
 649
 650                 read += thislen;
 651                 if (read == len)
 652                         break;
 653
 654                 if (ret) {
 655                         MTDDEBUG (MTD_DEBUG_LEVEL0,
 656                                   "onenand_read_oob: read failed = %d\n", ret);
 657                         break;
 658                 }
 659
 660                 buf += thislen;
 661                 /* Read more? */
 662                 if (read < len) {
 663                         /* Page size */
 664                         from += mtd->oobblock;
 665                         column = 0;
 666                 }
 667         }
 668
 669         /* Deselect and wake up anyone waiting on the device */
 670         onenand_release_device(mtd);
 671
 672         *retlen = read;
 673         return ret;
 674 }
 675
 676 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
 677 /**
 678  * onenand_verify_page - [GENERIC] verify the chip contents after a write
 679  * @param mtd           MTD device structure
 680  * @param buf           the databuffer to verify
 681  *
 682  * Check DataRAM area directly
 683  */
 684 static int onenand_verify_page(struct mtd_info *mtd, u_char * buf,
 685                                loff_t addr)
 686 {
 687         struct onenand_chip *this = mtd->priv;
 688         void __iomem *dataram0, *dataram1;
 689         int ret = 0;
 690
 691         this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock);
 692
 693         ret = this->wait(mtd, FL_READING);
 694         if (ret)
 695                 return ret;
 696
 697         onenand_update_bufferram(mtd, addr, 1);
 698
 699         /* Check, if the two dataram areas are same */
 700         dataram0 = this->base + ONENAND_DATARAM;
 701         dataram1 = dataram0 + mtd->oobblock;
 702
 703         if (memcmp(dataram0, dataram1, mtd->oobblock))
 704                 return -EBADMSG;
 705
 706         return 0;
 707 }
 708 #else
 709 #define onenand_verify_page(...)        (0)
 710 #endif
 711
 712 #define NOTALIGNED(x)   ((x & (mtd->oobblock - 1)) != 0)
 713
 714 /**
 715  * onenand_write_ecc - [MTD Interface] OneNAND write with ECC
 716  * @param mtd           MTD device structure
 717  * @param to            offset to write to
 718  * @param len           number of bytes to write
 719  * @param retlen        pointer to variable to store the number of written bytes
 720  * @param buf           the data to write
 721  * @param eccbuf        filesystem supplied oob data buffer
 722  * @param oobsel        oob selection structure
 723  *
 724  * OneNAND write with ECC
 725  */
 726 static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
 727                              size_t * retlen, const u_char * buf,
 728                              u_char * eccbuf, struct nand_oobinfo *oobsel)
 729 {
 730         struct onenand_chip *this = mtd->priv;
 731         int written = 0;
 732         int ret = 0;
 733
 734         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_write_ecc: "
 735                   "to = 0x%08x, len = %i\n",
 736                   (unsigned int)to, (int)len);
 737
 738         /* Initialize retlen, in case of early exit */
 739         *retlen = 0;
 740
 741         /* Do not allow writes past end of device */
 742         if (unlikely((to + len) > mtd->size)) {
 743                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_ecc: "
 744                           "Attempt write to past end of device\n");
 745                 return -EINVAL;
 746         }
 747
 748         /* Reject writes, which are not page aligned */
 749         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
 750                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_ecc: "
 751                           "Attempt to write not page aligned data\n");
 752                 return -EINVAL;
 753         }
 754
 755         /* Grab the lock and see if the device is available */
 756         onenand_get_device(mtd, FL_WRITING);
 757
 758         /* Loop until all data write */
 759         while (written < len) {
 760                 int thislen = min_t(int, mtd->oobblock, len - written);
 761
 762                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock);
 763
 764                 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
 765                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0,
 766                                       mtd->oobsize);
 767
 768                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock);
 769
 770                 onenand_update_bufferram(mtd, to, 1);
 771
 772                 ret = this->wait(mtd, FL_WRITING);
 773                 if (ret) {
 774                         MTDDEBUG (MTD_DEBUG_LEVEL0,
 775                                   "onenand_write_ecc: write filaed %d\n", ret);
 776                         break;
 777                 }
 778
 779                 written += thislen;
 780
 781                 /* Only check verify write turn on */
 782                 ret = onenand_verify_page(mtd, (u_char *) buf, to);
 783                 if (ret) {
 784                         MTDDEBUG (MTD_DEBUG_LEVEL0,
 785                                   "onenand_write_ecc: verify failed %d\n", ret);
 786                         break;
 787                 }
 788
 789                 if (written == len)
 790                         break;
 791
 792                 to += thislen;
 793                 buf += thislen;
 794         }
 795
 796         /* Deselect and wake up anyone waiting on the device */
 797         onenand_release_device(mtd);
 798
 799         *retlen = written;
 800
 801         return ret;
 802 }
 803
 804 /**
 805  * onenand_write - [MTD Interface] compability function for onenand_write_ecc
 806  * @param mtd           MTD device structure
 807  * @param to            offset to write to
 808  * @param len           number of bytes to write
 809  * @param retlen        pointer to variable to store the number of written bytes
 810  * @param buf           the data to write
 811  *
 812  * This function simply calls onenand_write_ecc
 813  * with oob buffer and oobsel = NULL
 814  */
 815 int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
 816                   size_t * retlen, const u_char * buf)
 817 {
 818         return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL);
 819 }
 820
 821 /**
 822  * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
 823  * @param mtd           MTD device structure
 824  * @param to            offset to write to
 825  * @param len           number of bytes to write
 826  * @param retlen        pointer to variable to store the number of written bytes
 827  * @param buf           the data to write
 828  *
 829  * OneNAND write out-of-band
 830  */
 831 int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
 832                       size_t * retlen, const u_char * buf)
 833 {
 834         struct onenand_chip *this = mtd->priv;
 835         int column, status;
 836         int written = 0;
 837
 838         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_write_oob: "
 839                   "to = 0x%08x, len = %i\n",
 840                   (unsigned int)to, (int)len);
 841
 842         /* Initialize retlen, in case of early exit */
 843         *retlen = 0;
 844
 845         /* Do not allow writes past end of device */
 846         if (unlikely((to + len) > mtd->size)) {
 847                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_oob: "
 848                           "Attempt write to past end of device\n");
 849                 return -EINVAL;
 850         }
 851
 852         /* Grab the lock and see if the device is available */
 853         onenand_get_device(mtd, FL_WRITING);
 854
 855         /* Loop until all data write */
 856         while (written < len) {
 857                 int thislen = min_t(int, mtd->oobsize, len - written);
 858
 859                 column = to & (mtd->oobsize - 1);
 860
 861                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
 862
 863                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0,
 864                                       mtd->oobsize);
 865                 this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column,
 866                                       thislen);
 867
 868                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
 869
 870                 onenand_update_bufferram(mtd, to, 0);
 871
 872                 status = this->wait(mtd, FL_WRITING);
 873                 if (status)
 874                         break;
 875
 876                 written += thislen;
 877                 if (written == len)
 878                         break;
 879
 880                 to += thislen;
 881                 buf += thislen;
 882         }
 883
 884         /* Deselect and wake up anyone waiting on the device */
 885         onenand_release_device(mtd);
 886
 887         *retlen = written;
 888
 889         return 0;
 890 }
 891
 892 /**
 893  * onenand_erase - [MTD Interface] erase block(s)
 894  * @param mtd           MTD device structure
 895  * @param instr         erase instruction
 896  *
 897  * Erase one ore more blocks
 898  */
 899 int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
 900 {
 901         struct onenand_chip *this = mtd->priv;
 902         unsigned int block_size;
 903         loff_t addr;
 904         int len;
 905         int ret = 0;
 906
 907         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n",
 908                   (unsigned int)instr->addr, (unsigned int)instr->len);
 909
 910         block_size = (1 << this->erase_shift);
 911
 912         /* Start address must align on block boundary */
 913         if (unlikely(instr->addr & (block_size - 1))) {
 914                 MTDDEBUG (MTD_DEBUG_LEVEL0,
 915                           "onenand_erase: Unaligned address\n");
 916                 return -EINVAL;
 917         }
 918
 919         /* Length must align on block boundary */
 920         if (unlikely(instr->len & (block_size - 1))) {
 921                 MTDDEBUG (MTD_DEBUG_LEVEL0,
 922                           "onenand_erase: Length not block aligned\n");
 923                 return -EINVAL;
 924         }
 925
 926         /* Do not allow erase past end of device */
 927         if (unlikely((instr->len + instr->addr) > mtd->size)) {
 928                 MTDDEBUG (MTD_DEBUG_LEVEL0,
 929                           "onenand_erase: Erase past end of device\n");
 930                 return -EINVAL;
 931         }
 932
 933         instr->fail_addr = 0xffffffff;
 934
 935         /* Grab the lock and see if the device is available */
 936         onenand_get_device(mtd, FL_ERASING);
 937
 938         /* Loop throught the pages */
 939         len = instr->len;
 940         addr = instr->addr;
 941
 942         instr->state = MTD_ERASING;
 943
 944         while (len) {
 945
 946                 /* TODO Check badblock */
 947
 948                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
 949
 950                 ret = this->wait(mtd, FL_ERASING);
 951                 /* Check, if it is write protected */
 952                 if (ret) {
 953                         if (ret == -EPERM)
 954                                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
 955                                           "Device is write protected!!!\n");
 956                         else
 957                                 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
 958                                           "Failed erase, block %d\n",
 959                                           (unsigned)(addr >> this->erase_shift));
 960                         instr->state = MTD_ERASE_FAILED;
 961                         instr->fail_addr = addr;
 962                         goto erase_exit;
 963                 }
 964
 965                 len -= block_size;
 966                 addr += block_size;
 967         }
 968
 969         instr->state = MTD_ERASE_DONE;
 970
 971       erase_exit:
 972
 973         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
 974         /* Do call back function */
 975         if (!ret)
 976                 mtd_erase_callback(instr);
 977
 978         /* Deselect and wake up anyone waiting on the device */
 979         onenand_release_device(mtd);
 980
 981         return ret;
 982 }
 983
 984 /**
 985  * onenand_sync - [MTD Interface] sync
 986  * @param mtd           MTD device structure
 987  *
 988  * Sync is actually a wait for chip ready function
 989  */
 990 void onenand_sync(struct mtd_info *mtd)
 991 {
 992         MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
 993
 994         /* Grab the lock and see if the device is available */
 995         onenand_get_device(mtd, FL_SYNCING);
 996
 997         /* Release it and go back */
 998         onenand_release_device(mtd);
 999 }
1000
1001 /**
1002  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1003  * @param mtd           MTD device structure
1004  * @param ofs           offset relative to mtd start
1005  */
1006 int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1007 {
1008         /*
1009          * TODO
1010          * 1. Bad block table (BBT)
1011          *   -> using NAND BBT to support JFFS2
1012          * 2. Bad block management (BBM)
1013          *   -> bad block replace scheme
1014          *
1015          * Currently we do nothing
1016          */
1017         return 0;
1018 }
1019
1020 /**
1021  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1022  * @param mtd           MTD device structure
1023  * @param ofs           offset relative to mtd start
1024  */
1025 int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1026 {
1027         /* see above */
1028         return 0;
1029 }
1030
1031 /**
1032  * onenand_unlock - [MTD Interface] Unlock block(s)
1033  * @param mtd           MTD device structure
1034  * @param ofs           offset relative to mtd start
1035  * @param len           number of bytes to unlock
1036  *
1037  * Unlock one or more blocks
1038  */
1039 int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1040 {
1041         struct onenand_chip *this = mtd->priv;
1042         int start, end, block, value, status;
1043
1044         start = ofs >> this->erase_shift;
1045         end = len >> this->erase_shift;
1046
1047         /* Continuous lock scheme */
1048         if (this->options & ONENAND_CONT_LOCK) {
1049                 /* Set start block address */
1050                 this->write_word(start,
1051                                  this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1052                 /* Set end block address */
1053                 this->write_word(end - 1,
1054                                  this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1055                 /* Write unlock command */
1056                 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1057
1058                 /* There's no return value */
1059                 this->wait(mtd, FL_UNLOCKING);
1060
1061                 /* Sanity check */
1062                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1063                        & ONENAND_CTRL_ONGO)
1064                         continue;
1065
1066                 /* Check lock status */
1067                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1068                 if (!(status & ONENAND_WP_US))
1069                         printk(KERN_ERR "wp status = 0x%x\n", status);
1070
1071                 return 0;
1072         }
1073
1074         /* Block lock scheme */
1075         for (block = start; block < end; block++) {
1076                 /* Set start block address */
1077                 this->write_word(block,
1078                                  this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1079                 /* Write unlock command */
1080                 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1081
1082                 /* There's no return value */
1083                 this->wait(mtd, FL_UNLOCKING);
1084
1085                 /* Sanity check */
1086                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1087                        & ONENAND_CTRL_ONGO)
1088                         continue;
1089
1090                 /* Set block address for read block status */
1091                 value = onenand_block_address(this->device_id, block);
1092                 this->write_word(value,
1093                                  this->base + ONENAND_REG_START_ADDRESS1);
1094
1095                 /* Check lock status */
1096                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1097                 if (!(status & ONENAND_WP_US))
1098                         printk(KERN_ERR "block = %d, wp status = 0x%x\n",
1099                                block, status);
1100         }
1101
1102         return 0;
1103 }
1104
1105 /**
1106  * onenand_print_device_info - Print device ID
1107  * @param device        device ID
1108  *
1109  * Print device ID
1110  */
1111 char * onenand_print_device_info(int device)
1112 {
1113         int vcc, demuxed, ddp, density;
1114         char *dev_info = malloc(80);
1115
1116         vcc = device & ONENAND_DEVICE_VCC_MASK;
1117         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1118         ddp = device & ONENAND_DEVICE_IS_DDP;
1119         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1120         sprintf(dev_info, "%sOneNAND%s %dMB %sV 16-bit (0x%02x)",
1121                demuxed ? "" : "Muxed ",
1122                ddp ? "(DDP)" : "",
1123                (16 << density), vcc ? "2.65/3.3" : "1.8", device);
1124
1125         return dev_info;
1126 }
1127
1128 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1129         {ONENAND_MFR_SAMSUNG, "Samsung"},
1130         {ONENAND_MFR_UNKNOWN, "Unknown"}
1131 };
1132
1133 /**
1134  * onenand_check_maf - Check manufacturer ID
1135  * @param manuf         manufacturer ID
1136  *
1137  * Check manufacturer ID
1138  */
1139 static int onenand_check_maf(int manuf)
1140 {
1141         int i;
1142
1143         for (i = 0; onenand_manuf_ids[i].id; i++) {
1144                 if (manuf == onenand_manuf_ids[i].id)
1145                         break;
1146         }
1147
1148 #ifdef ONENAND_DEBUG
1149         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n",
1150                onenand_manuf_ids[i].name, manuf);
1151 #endif
1152
1153         return (i != ONENAND_MFR_UNKNOWN);
1154 }
1155
1156 /**
1157  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1158  * @param mtd           MTD device structure
1159  *
1160  * OneNAND detection method:
1161  *   Compare the the values from command with ones from register
1162  */
1163 static int onenand_probe(struct mtd_info *mtd)
1164 {
1165         struct onenand_chip *this = mtd->priv;
1166         int bram_maf_id, bram_dev_id, maf_id, dev_id;
1167         int version_id;
1168         int density;
1169
1170         /* Send the command for reading device ID from BootRAM */
1171         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1172
1173         /* Read manufacturer and device IDs from BootRAM */
1174         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1175         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1176
1177         /* Check manufacturer ID */
1178         if (onenand_check_maf(bram_maf_id))
1179                 return -ENXIO;
1180
1181         /* Reset OneNAND to read default register values */
1182         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1183
1184         {
1185                 int i;
1186                 for (i = 0; i < 10000; i++) ;
1187         }
1188
1189         /* Read manufacturer and device IDs from Register */
1190         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1191         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1192
1193         /* Check OneNAND device */
1194         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1195                 return -ENXIO;
1196
1197         /* FIXME : Current OneNAND MTD doesn't support Flex-OneNAND */
1198         if (dev_id & (1 << 9)) {
1199                 printk("Not yet support Flex-OneNAND\n");
1200                 return -ENXIO;
1201         }
1202
1203         /* Flash device information */
1204         mtd->name = onenand_print_device_info(dev_id);
1205         this->device_id = dev_id;
1206
1207         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1208         this->chipsize = (16 << density) << 20;
1209
1210         /* OneNAND page size & block size */
1211         /* The data buffer size is equal to page size */
1212         mtd->oobblock =
1213             this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1214         mtd->oobsize = mtd->oobblock >> 5;
1215         /* Pagers per block is always 64 in OneNAND */
1216         mtd->erasesize = mtd->oobblock << 6;
1217
1218         this->erase_shift = ffs(mtd->erasesize) - 1;
1219         this->page_shift = ffs(mtd->oobblock) - 1;
1220         this->ppb_shift = (this->erase_shift - this->page_shift);
1221         this->page_mask = (mtd->erasesize / mtd->oobblock) - 1;
1222
1223         /* REVIST: Multichip handling */
1224
1225         mtd->size = this->chipsize;
1226
1227         /* Version ID */
1228         version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1229 #ifdef ONENAND_DEBUG
1230         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id);
1231 #endif
1232
1233         /* Lock scheme */
1234         if (density <= ONENAND_DEVICE_DENSITY_512Mb &&
1235             !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) {
1236                 printk(KERN_INFO "Lock scheme is Continues Lock\n");
1237                 this->options |= ONENAND_CONT_LOCK;
1238         }
1239
1240         mtd->erase = onenand_erase;
1241         mtd->read = onenand_read;
1242         mtd->write = onenand_write;
1243         mtd->read_ecc = onenand_read_ecc;
1244         mtd->write_ecc = onenand_write_ecc;
1245         mtd->read_oob = onenand_read_oob;
1246         mtd->write_oob = onenand_write_oob;
1247         mtd->sync = onenand_sync;
1248         mtd->block_isbad = onenand_block_isbad;
1249         mtd->block_markbad = onenand_block_markbad;
1250
1251         return 0;
1252 }
1253
1254 /**
1255  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1256  * @param mtd           MTD device structure
1257  * @param maxchips      Number of chips to scan for
1258  *
1259  * This fills out all the not initialized function pointers
1260  * with the defaults.
1261  * The flash ID is read and the mtd/chip structures are
1262  * filled with the appropriate values.
1263  */
1264 int onenand_scan(struct mtd_info *mtd, int maxchips)
1265 {
1266         struct onenand_chip *this = mtd->priv;
1267
1268         if (!this->read_word)
1269                 this->read_word = onenand_readw;
1270         if (!this->write_word)
1271                 this->write_word = onenand_writew;
1272
1273         if (!this->command)
1274                 this->command = onenand_command;
1275         if (!this->wait)
1276                 this->wait = onenand_wait;
1277
1278         if (!this->read_bufferram)
1279                 this->read_bufferram = onenand_read_bufferram;
1280         if (!this->write_bufferram)
1281                 this->write_bufferram = onenand_write_bufferram;
1282
1283         if (onenand_probe(mtd))
1284                 return -ENXIO;
1285
1286         /* Set Sync. Burst Read after probing */
1287         if (this->mmcontrol) {
1288                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
1289                 this->read_bufferram = onenand_sync_read_bufferram;
1290         }
1291
1292         onenand_unlock(mtd, 0, mtd->size);
1293
1294         return onenand_default_bbt(mtd);
1295 }
1296
1297 /**
1298  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
1299  * @param mtd           MTD device structure
1300  */
1301 void onenand_release(struct mtd_info *mtd)
1302 {
1303 }