Prepare v2024.10
[platform/kernel/u-boot.git] / drivers / mtd / nand / spi / toshiba.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2018 exceet electronics GmbH
4  * Copyright (c) 2018 Kontron Electronics GmbH
5  *
6  * Author: Frieder Schrempf <frieder.schrempf@kontron.de>
7  */
8
9 #ifndef __UBOOT__
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #endif
13 #include <linux/bug.h>
14 #include <linux/mtd/spinand.h>
15
16 /* Kioxia is new name of Toshiba memory. */
17 #define SPINAND_MFR_TOSHIBA             0x98
18 #define TOSH_STATUS_ECC_HAS_BITFLIPS_T  (3 << 4)
19
20 static SPINAND_OP_VARIANTS(read_cache_variants,
21                 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
22                 SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
23                 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
24                 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
25
26 static SPINAND_OP_VARIANTS(write_cache_x4_variants,
27                 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
28                 SPINAND_PROG_LOAD(true, 0, NULL, 0));
29
30 static SPINAND_OP_VARIANTS(update_cache_x4_variants,
31                 SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
32                 SPINAND_PROG_LOAD(false, 0, NULL, 0));
33
34 /*
35  * Backward compatibility for 1st generation Serial NAND devices
36  * which don't support Quad Program Load operation.
37  */
38 static SPINAND_OP_VARIANTS(write_cache_variants,
39                 SPINAND_PROG_LOAD(true, 0, NULL, 0));
40
41 static SPINAND_OP_VARIANTS(update_cache_variants,
42                 SPINAND_PROG_LOAD(false, 0, NULL, 0));
43
44 static int tx58cxgxsxraix_ooblayout_ecc(struct mtd_info *mtd, int section,
45                                         struct mtd_oob_region *region)
46 {
47         if (section > 0)
48                 return -ERANGE;
49
50         region->offset = mtd->oobsize / 2;
51         region->length = mtd->oobsize / 2;
52
53         return 0;
54 }
55
56 static int tx58cxgxsxraix_ooblayout_free(struct mtd_info *mtd, int section,
57                                          struct mtd_oob_region *region)
58 {
59         if (section > 0)
60                 return -ERANGE;
61
62         /* 2 bytes reserved for BBM */
63         region->offset = 2;
64         region->length = (mtd->oobsize / 2) - 2;
65
66         return 0;
67 }
68
69 static const struct mtd_ooblayout_ops tx58cxgxsxraix_ooblayout = {
70         .ecc = tx58cxgxsxraix_ooblayout_ecc,
71         .rfree = tx58cxgxsxraix_ooblayout_free,
72 };
73
74 static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand,
75                                          u8 status)
76 {
77         struct nand_device *nand = spinand_to_nand(spinand);
78         u8 mbf = 0;
79         struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, &mbf);
80
81         switch (status & STATUS_ECC_MASK) {
82         case STATUS_ECC_NO_BITFLIPS:
83                 return 0;
84
85         case STATUS_ECC_UNCOR_ERROR:
86                 return -EBADMSG;
87
88         case STATUS_ECC_HAS_BITFLIPS:
89         case TOSH_STATUS_ECC_HAS_BITFLIPS_T:
90                 /*
91                  * Let's try to retrieve the real maximum number of bitflips
92                  * in order to avoid forcing the wear-leveling layer to move
93                  * data around if it's not necessary.
94                  */
95                 if (spi_mem_exec_op(spinand->slave, &op))
96                         return nand->eccreq.strength;
97
98                 mbf >>= 4;
99
100                 if (WARN_ON(mbf > nand->eccreq.strength || !mbf))
101                         return nand->eccreq.strength;
102
103                 return mbf;
104
105         default:
106                 break;
107         }
108
109         return -EINVAL;
110 }
111
112 static const struct spinand_info toshiba_spinand_table[] = {
113         /* 3.3V 1Gb (1st generation) */
114         SPINAND_INFO("TC58CVG0S3HRAIG",
115                      SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xC2),
116                      NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
117                      NAND_ECCREQ(8, 512),
118                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
119                                               &write_cache_variants,
120                                               &update_cache_variants),
121                      0,
122                      SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
123                                      tx58cxgxsxraix_ecc_get_status)),
124         /* 3.3V 2Gb (1st generation) */
125         SPINAND_INFO("TC58CVG1S3HRAIG",
126                      SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCB),
127                      NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
128                      NAND_ECCREQ(8, 512),
129                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
130                                               &write_cache_variants,
131                                               &update_cache_variants),
132                      0,
133                      SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
134                                      tx58cxgxsxraix_ecc_get_status)),
135         /* 3.3V 4Gb (1st generation) */
136         SPINAND_INFO("TC58CVG2S0HRAIG",
137                      SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCD),
138                      NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
139                      NAND_ECCREQ(8, 512),
140                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
141                                               &write_cache_variants,
142                                               &update_cache_variants),
143                      0,
144                      SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
145                                      tx58cxgxsxraix_ecc_get_status)),
146         /* 1.8V 1Gb (1st generation) */
147         SPINAND_INFO("TC58CYG0S3HRAIG",
148                      SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2),
149                      NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
150                      NAND_ECCREQ(8, 512),
151                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
152                                               &write_cache_variants,
153                                               &update_cache_variants),
154                      0,
155                      SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
156                                      tx58cxgxsxraix_ecc_get_status)),
157         /* 1.8V 2Gb (1st generation) */
158         SPINAND_INFO("TC58CYG1S3HRAIG",
159                      SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBB),
160                      NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
161                      NAND_ECCREQ(8, 512),
162                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
163                                               &write_cache_variants,
164                                               &update_cache_variants),
165                      0,
166                      SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
167                                      tx58cxgxsxraix_ecc_get_status)),
168         /* 1.8V 4Gb (1st generation) */
169         SPINAND_INFO("TC58CYG2S0HRAIG",
170                      SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBD),
171                      NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
172                      NAND_ECCREQ(8, 512),
173                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
174                                               &write_cache_variants,
175                                               &update_cache_variants),
176                      0,
177                      SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
178                                      tx58cxgxsxraix_ecc_get_status)),
179
180         /*
181          * 2nd generation serial nand has HOLD_D which is equivalent to
182          * QE_BIT.
183          */
184         /* 3.3V 1Gb (2nd generation) */
185         SPINAND_INFO("TC58CVG0S3HRAIJ",
186                      SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE2),
187                      NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
188                      NAND_ECCREQ(8, 512),
189                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
190                                               &write_cache_x4_variants,
191                                               &update_cache_x4_variants),
192                      SPINAND_HAS_QE_BIT,
193                      SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
194                                      tx58cxgxsxraix_ecc_get_status)),
195         /* 3.3V 2Gb (2nd generation) */
196         SPINAND_INFO("TC58CVG1S3HRAIJ",
197                      SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEB),
198                      NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
199                      NAND_ECCREQ(8, 512),
200                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
201                                               &write_cache_x4_variants,
202                                               &update_cache_x4_variants),
203                      SPINAND_HAS_QE_BIT,
204                      SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
205                                      tx58cxgxsxraix_ecc_get_status)),
206         /* 3.3V 4Gb (2nd generation) */
207         SPINAND_INFO("TC58CVG2S0HRAIJ",
208                      SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED),
209                      NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
210                      NAND_ECCREQ(8, 512),
211                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
212                                               &write_cache_x4_variants,
213                                               &update_cache_x4_variants),
214                      SPINAND_HAS_QE_BIT,
215                      SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
216                                      tx58cxgxsxraix_ecc_get_status)),
217         /* 3.3V 8Gb (2nd generation) */
218         SPINAND_INFO("TH58CVG3S0HRAIJ",
219                      SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4),
220                      NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
221                      NAND_ECCREQ(8, 512),
222                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
223                                               &write_cache_x4_variants,
224                                               &update_cache_x4_variants),
225                      SPINAND_HAS_QE_BIT,
226                      SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
227                                      tx58cxgxsxraix_ecc_get_status)),
228         /* 1.8V 1Gb (2nd generation) */
229         SPINAND_INFO("TC58CYG0S3HRAIJ",
230                      SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD2),
231                      NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
232                      NAND_ECCREQ(8, 512),
233                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
234                                               &write_cache_x4_variants,
235                                               &update_cache_x4_variants),
236                      SPINAND_HAS_QE_BIT,
237                      SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
238                                      tx58cxgxsxraix_ecc_get_status)),
239         /* 1.8V 2Gb (2nd generation) */
240         SPINAND_INFO("TC58CYG1S3HRAIJ",
241                      SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDB),
242                      NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
243                      NAND_ECCREQ(8, 512),
244                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
245                                               &write_cache_x4_variants,
246                                               &update_cache_x4_variants),
247                      SPINAND_HAS_QE_BIT,
248                      SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
249                                      tx58cxgxsxraix_ecc_get_status)),
250         /* 1.8V 4Gb (2nd generation) */
251         SPINAND_INFO("TC58CYG2S0HRAIJ",
252                      SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDD),
253                      NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
254                      NAND_ECCREQ(8, 512),
255                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
256                                               &write_cache_x4_variants,
257                                               &update_cache_x4_variants),
258                      SPINAND_HAS_QE_BIT,
259                      SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
260                                      tx58cxgxsxraix_ecc_get_status)),
261         /* 1.8V 8Gb (2nd generation) */
262         SPINAND_INFO("TH58CYG3S0HRAIJ",
263                      SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
264                      NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
265                      NAND_ECCREQ(8, 512),
266                      SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
267                                               &write_cache_x4_variants,
268                                               &update_cache_x4_variants),
269                      SPINAND_HAS_QE_BIT,
270                      SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
271                                      tx58cxgxsxraix_ecc_get_status)),
272 };
273
274 static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = {
275 };
276
277 const struct spinand_manufacturer toshiba_spinand_manufacturer = {
278         .id = SPINAND_MFR_TOSHIBA,
279         .name = "Toshiba",
280         .chips = toshiba_spinand_table,
281         .nchips = ARRAY_SIZE(toshiba_spinand_table),
282         .ops = &toshiba_spinand_manuf_ops,
283 };