drivers/mtd/nand/raw/mxs_nand_spl.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2014 Gateworks Corporation
   4  * Copyright 2019 NXP
   5  * Author: Tim Harvey <tharvey@gateworks.com>
   6  */
   7 #include <common.h>
   8 #include <log.h>
   9 #include <nand.h>
  10 #include <malloc.h>
  11 #include <mxs_nand.h>
  12 #include <asm/cache.h>
  13 #include <linux/bitops.h>
  14 #include <linux/delay.h>
  15 #include <linux/err.h>
  16 #include <linux/mtd/rawnand.h>
  17
  18 static struct mtd_info *mtd;
  19 static struct nand_chip nand_chip;
  20
  21 static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,
  22                              int column, int page_addr)
  23 {
  24         register struct nand_chip *chip = mtd_to_nand(mtd);
  25         u32 timeo, time_start;
  26
  27         /* write out the command to the device */
  28         chip->cmd_ctrl(mtd, command, NAND_CLE);
  29
  30         /* Serially input address */
  31         if (column != -1) {
  32                 /* Adjust columns for 16 bit buswidth */
  33                 if (chip->options & NAND_BUSWIDTH_16 &&
  34                                 !nand_opcode_8bits(command))
  35                         column >>= 1;
  36                 chip->cmd_ctrl(mtd, column, NAND_ALE);
  37
  38                 /*
  39                  * Assume LP NAND here, so use two bytes column address
  40                  * but not for CMD_READID and CMD_PARAM, which require
  41                  * only one byte column address
  42                  */
  43                 if (command != NAND_CMD_READID &&
  44                         command != NAND_CMD_PARAM)
  45                         chip->cmd_ctrl(mtd, column >> 8, NAND_ALE);
  46         }
  47         if (page_addr != -1) {
  48                 chip->cmd_ctrl(mtd, page_addr, NAND_ALE);
  49                 chip->cmd_ctrl(mtd, page_addr >> 8, NAND_ALE);
  50                 /* One more address cycle for devices > 128MiB */
  51                 if (chip->chipsize > (128 << 20))
  52                         chip->cmd_ctrl(mtd, page_addr >> 16, NAND_ALE);
  53         }
  54         chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0);
  55
  56         if (command == NAND_CMD_READ0) {
  57                 chip->cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_CLE);
  58                 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0);
  59         } else if (command == NAND_CMD_RNDOUT) {
  60                 /* No ready / busy check necessary */
  61                 chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
  62                                NAND_NCE | NAND_CLE);
  63                 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
  64                                NAND_NCE);
  65         }
  66
  67         /* wait for nand ready */
  68         ndelay(100);
  69         timeo = (CONFIG_SYS_HZ * 20) / 1000;
  70         time_start = get_timer(0);
  71         while (get_timer(time_start) < timeo) {
  72                 if (chip->dev_ready(mtd))
  73                         break;
  74         }
  75 }
  76
  77 #if defined (CONFIG_SPL_NAND_IDENT)
  78
  79 /* Trying to detect the NAND flash using ONFi, JEDEC, and (extended) IDs */
  80 static int mxs_flash_full_ident(struct mtd_info *mtd)
  81 {
  82         int nand_maf_id, nand_dev_id;
  83         struct nand_chip *chip = mtd_to_nand(mtd);
  84         int ret;
  85
  86         ret = nand_detect(chip, &nand_maf_id, &nand_dev_id, NULL);
  87
  88         if (ret) {
  89                 chip->select_chip(mtd, -1);
  90                 return ret;
  91         }
  92
  93         return 0;
  94 }
  95
  96 #else
  97
  98 /* Trying to detect the NAND flash using ONFi only */
  99 static int mxs_flash_onfi_ident(struct mtd_info *mtd)
 100 {
 101         register struct nand_chip *chip = mtd_to_nand(mtd);
 102         int i;
 103         u8 mfg_id, dev_id;
 104         u8 id_data[8];
 105         struct nand_onfi_params *p = &chip->onfi_params;
 106
 107         /* Reset the chip */
 108         chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
 109
 110         /* Send the command for reading device ID */
 111         chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
 112
 113         /* Read manufacturer and device IDs */
 114         mfg_id = chip->read_byte(mtd);
 115         dev_id = chip->read_byte(mtd);
 116
 117         /* Try again to make sure */
 118         chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
 119         for (i = 0; i < 8; i++)
 120                 id_data[i] = chip->read_byte(mtd);
 121         if (id_data[0] != mfg_id || id_data[1] != dev_id) {
 122                 printf("second ID read did not match");
 123                 return -1;
 124         }
 125         debug("0x%02x:0x%02x ", mfg_id, dev_id);
 126
 127         /* read ONFI */
 128         chip->onfi_version = 0;
 129         chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
 130         if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
 131             chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') {
 132                 return -2;
 133         }
 134
 135         /* we have ONFI, probe it */
 136         chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
 137         chip->read_buf(mtd, (uint8_t *)p, sizeof(*p));
 138         mtd->name = p->model;
 139         mtd->writesize = le32_to_cpu(p->byte_per_page);
 140         mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
 141         mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
 142         chip->chipsize = le32_to_cpu(p->blocks_per_lun);
 143         chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
 144         /* Calculate the address shift from the page size */
 145         chip->page_shift = ffs(mtd->writesize) - 1;
 146         chip->phys_erase_shift = ffs(mtd->erasesize) - 1;
 147         /* Convert chipsize to number of pages per chip -1 */
 148         chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
 149         chip->badblockbits = 8;
 150
 151         debug("erasesize=%d (>>%d)\n", mtd->erasesize, chip->phys_erase_shift);
 152         debug("writesize=%d (>>%d)\n", mtd->writesize, chip->page_shift);
 153         debug("oobsize=%d\n", mtd->oobsize);
 154         debug("chipsize=%lld\n", chip->chipsize);
 155
 156         return 0;
 157 }
 158
 159 #endif /* CONFIG_SPL_NAND_IDENT */
 160
 161 static int mxs_flash_ident(struct mtd_info *mtd)
 162 {
 163         int ret;
 164 #if defined (CONFIG_SPL_NAND_IDENT)
 165         ret = mxs_flash_full_ident(mtd);
 166 #else
 167         ret = mxs_flash_onfi_ident(mtd);
 168 #endif
 169         return ret;
 170 }
 171
 172 static int mxs_read_page_ecc(struct mtd_info *mtd, void *buf, unsigned int page)
 173 {
 174         register struct nand_chip *chip = mtd_to_nand(mtd);
 175         int ret;
 176
 177         chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, page);
 178         ret = nand_chip.ecc.read_page(mtd, chip, buf, 1, page);
 179         if (ret < 0) {
 180                 printf("read_page failed %d\n", ret);
 181                 return -1;
 182         }
 183         return 0;
 184 }
 185
 186 static int is_badblock(struct mtd_info *mtd, loff_t offs, int allowbbt)
 187 {
 188         register struct nand_chip *chip = mtd_to_nand(mtd);
 189         unsigned int block = offs >> chip->phys_erase_shift;
 190         unsigned int page = offs >> chip->page_shift;
 191
 192         debug("%s offs=0x%08x block:%d page:%d\n", __func__, (int)offs, block,
 193               page);
 194         chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
 195         memset(chip->oob_poi, 0, mtd->oobsize);
 196         chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
 197
 198         return chip->oob_poi[0] != 0xff;
 199 }
 200
 201 /* setup mtd and nand structs and init mxs_nand driver */
 202 void nand_init(void)
 203 {
 204         /* return if already initalized */
 205         if (nand_chip.numchips)
 206                 return;
 207
 208         /* init mxs nand driver */
 209         mxs_nand_init_spl(&nand_chip);
 210         mtd = nand_to_mtd(&nand_chip);
 211         /* set mtd functions */
 212         nand_chip.cmdfunc = mxs_nand_command;
 213         nand_chip.scan_bbt = nand_default_bbt;
 214         nand_chip.numchips = 1;
 215
 216         /* identify flash device */
 217         if (mxs_flash_ident(mtd)) {
 218                 printf("Failed to identify\n");
 219                 nand_chip.numchips = 0; /* If fail, don't use nand */
 220                 return;
 221         }
 222
 223         /* allocate and initialize buffers */
 224         nand_chip.buffers = memalign(ARCH_DMA_MINALIGN,
 225                                      sizeof(*nand_chip.buffers));
 226         nand_chip.oob_poi = nand_chip.buffers->databuf + mtd->writesize;
 227         /* setup flash layout (does not scan as we override that) */
 228         mtd->size = nand_chip.chipsize;
 229         nand_chip.scan_bbt(mtd);
 230         mxs_nand_setup_ecc(mtd);
 231 }
 232
 233 int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
 234 {
 235         unsigned int sz;
 236         unsigned int block, lastblock;
 237         unsigned int page, page_offset;
 238         unsigned int nand_page_per_block;
 239         struct nand_chip *chip;
 240         u8 *page_buf = NULL;
 241
 242         chip = mtd_to_nand(mtd);
 243         if (!chip->numchips)
 244                 return -ENODEV;
 245
 246         page_buf = malloc(mtd->writesize);
 247         if (!page_buf)
 248                 return -ENOMEM;
 249
 250         /* offs has to be aligned to a page address! */
 251         block = offs / mtd->erasesize;
 252         lastblock = (offs + size - 1) / mtd->erasesize;
 253         page = (offs % mtd->erasesize) / mtd->writesize;
 254         page_offset = offs % mtd->writesize;
 255         nand_page_per_block = mtd->erasesize / mtd->writesize;
 256
 257         while (block <= lastblock && size > 0) {
 258                 if (!is_badblock(mtd, mtd->erasesize * block, 1)) {
 259                         /* Skip bad blocks */
 260                         while (page < nand_page_per_block) {
 261                                 int curr_page = nand_page_per_block * block + page;
 262
 263                                 if (mxs_read_page_ecc(mtd, page_buf, curr_page) < 0) {
 264                                         free(page_buf);
 265                                         return -EIO;
 266                                 }
 267
 268                                 if (size > (mtd->writesize - page_offset))
 269                                         sz = (mtd->writesize - page_offset);
 270                                 else
 271                                         sz = size;
 272
 273                                 memcpy(dst, page_buf + page_offset, sz);
 274                                 dst += sz;
 275                                 size -= sz;
 276                                 page_offset = 0;
 277                                 page++;
 278                         }
 279
 280                         page = 0;
 281                 } else {
 282                         lastblock++;
 283                 }
 284
 285                 block++;
 286         }
 287
 288         free(page_buf);
 289
 290         return 0;
 291 }
 292
 293 int nand_default_bbt(struct mtd_info *mtd)
 294 {
 295         return 0;
 296 }
 297
 298 void nand_deselect(void)
 299 {
 300 }
 301
 302 u32 nand_spl_adjust_offset(u32 sector, u32 offs)
 303 {
 304         unsigned int block, lastblock;
 305
 306         block = sector / mtd->erasesize;
 307         lastblock = (sector + offs) / mtd->erasesize;
 308
 309         while (block <= lastblock) {
 310                 if (is_badblock(mtd, block * mtd->erasesize, 1)) {
 311                         offs += mtd->erasesize;
 312                         lastblock++;
 313                 }
 314
 315                 block++;
 316         }
 317
 318         return offs;
 319 }