drivers/mtd/nand/raw/fsl_elbc_spl.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * NAND boot for Freescale Enhanced Local Bus Controller, Flash Control Machine
   4  *
   5  * (C) Copyright 2006-2008
   6  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   7  *
   8  * Copyright (c) 2008 Freescale Semiconductor, Inc.
   9  * Author: Scott Wood <scottwood@freescale.com>
  10  */
  11
  12 #include <common.h>
  13 #include <cpu_func.h>
  14 #include <asm/io.h>
  15 #include <asm/fsl_lbc.h>
  16 #include <nand.h>
  17
  18 #ifdef CONFIG_MPC83xx
  19 #include "../../../arch/powerpc/cpu/mpc83xx/elbc/elbc.h"
  20 #endif
  21
  22 #define WINDOW_SIZE 8192
  23
  24 static void nand_wait(void)
  25 {
  26         fsl_lbc_t *regs = LBC_BASE_ADDR;
  27
  28         for (;;) {
  29                 uint32_t status = in_be32(&regs->ltesr);
  30
  31                 if (status == 1)
  32                         return;
  33
  34                 if (status & 1) {
  35                         puts("read failed (ltesr)\n");
  36                         for (;;);
  37                 }
  38         }
  39 }
  40
  41 #ifdef CONFIG_TPL_BUILD
  42 int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
  43 #else
  44 static int nand_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
  45 #endif
  46 {
  47         fsl_lbc_t *regs = LBC_BASE_ADDR;
  48         uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
  49         const int large = CONFIG_SYS_NAND_OR_PRELIM & OR_FCM_PGS;
  50         const int block_shift = large ? 17 : 14;
  51         const int block_size = 1 << block_shift;
  52         const int page_size = large ? 2048 : 512;
  53         const int bad_marker = large ? page_size + 0 : page_size + 5;
  54         int fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT) | 2;
  55         int pos = 0;
  56         char *dst = vdst;
  57
  58         if (offs & (block_size - 1)) {
  59                 puts("bad offset\n");
  60                 for (;;);
  61         }
  62
  63         if (large) {
  64                 fmr |= FMR_ECCM;
  65                 out_be32(&regs->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
  66                                      (NAND_CMD_READSTART << FCR_CMD1_SHIFT));
  67                 out_be32(&regs->fir,
  68                          (FIR_OP_CW0 << FIR_OP0_SHIFT) |
  69                          (FIR_OP_CA  << FIR_OP1_SHIFT) |
  70                          (FIR_OP_PA  << FIR_OP2_SHIFT) |
  71                          (FIR_OP_CW1 << FIR_OP3_SHIFT) |
  72                          (FIR_OP_RBW << FIR_OP4_SHIFT));
  73         } else {
  74                 out_be32(&regs->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT);
  75                 out_be32(&regs->fir,
  76                          (FIR_OP_CW0 << FIR_OP0_SHIFT) |
  77                          (FIR_OP_CA  << FIR_OP1_SHIFT) |
  78                          (FIR_OP_PA  << FIR_OP2_SHIFT) |
  79                          (FIR_OP_RBW << FIR_OP3_SHIFT));
  80         }
  81
  82         out_be32(&regs->fbcr, 0);
  83         clrsetbits_be32(&regs->bank[0].br, BR_DECC, BR_DECC_CHK_GEN);
  84
  85         while (pos < uboot_size) {
  86                 int i = 0;
  87                 out_be32(&regs->fbar, offs >> block_shift);
  88
  89                 do {
  90                         int j;
  91                         unsigned int page_offs = (offs & (block_size - 1)) << 1;
  92
  93                         out_be32(&regs->ltesr, ~0);
  94                         out_be32(&regs->lteatr, 0);
  95                         out_be32(&regs->fpar, page_offs);
  96                         out_be32(&regs->fmr, fmr);
  97                         out_be32(&regs->lsor, 0);
  98                         nand_wait();
  99
 100                         page_offs %= WINDOW_SIZE;
 101
 102                         /*
 103                          * If either of the first two pages are marked bad,
 104                          * continue to the next block.
 105                          */
 106                         if (i++ < 2 && buf[page_offs + bad_marker] != 0xff) {
 107                                 puts("skipping\n");
 108                                 offs = (offs + block_size) & ~(block_size - 1);
 109                                 pos &= ~(block_size - 1);
 110                                 break;
 111                         }
 112
 113                         for (j = 0; j < page_size; j++)
 114                                 dst[pos + j] = buf[page_offs + j];
 115
 116                         pos += page_size;
 117                         offs += page_size;
 118                 } while ((offs & (block_size - 1)) && (pos < uboot_size));
 119         }
 120
 121         return 0;
 122 }
 123
 124 /*
 125  * Defines a static function nand_load_image() here, because non-static makes
 126  * the code too large for certain SPLs(minimal SPL, maximum size <= 4Kbytes)
 127  */
 128 #ifndef CONFIG_TPL_BUILD
 129 #define nand_spl_load_image(offs, uboot_size, vdst) \
 130         nand_load_image(offs, uboot_size, vdst)
 131 #endif
 132
 133 /*
 134  * The main entry for NAND booting. It's necessary that SDRAM is already
 135  * configured and available since this code loads the main U-Boot image
 136  * from NAND into SDRAM and starts it from there.
 137  */
 138 void nand_boot(void)
 139 {
 140         __attribute__((noreturn)) void (*uboot)(void);
 141         /*
 142          * Load U-Boot image from NAND into RAM
 143          */
 144         nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
 145                             CONFIG_SYS_NAND_U_BOOT_SIZE,
 146                             (void *)CONFIG_SYS_NAND_U_BOOT_DST);
 147
 148 #ifdef CONFIG_NAND_ENV_DST
 149         nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
 150                             (void *)CONFIG_NAND_ENV_DST);
 151
 152 #ifdef CONFIG_ENV_OFFSET_REDUND
 153         nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
 154                             (void *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
 155 #endif
 156 #endif
 157
 158 #ifdef CONFIG_SPL_FLUSH_IMAGE
 159         /*
 160          * Clean d-cache and invalidate i-cache, to
 161          * make sure that no stale data is executed.
 162          */
 163         flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE);
 164 #endif
 165
 166         puts("transfering control\n");
 167         /*
 168          * Jump to U-Boot image
 169          */
 170         uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
 171         (*uboot)();
 172 }