2 menuconfig MTD_RAW_NAND
3 bool "Raw NAND Device Support"
6 config SYS_NAND_SELF_INIT
9 This option, if enabled, provides more flexible and linux-like
10 NAND initialization process.
12 config SYS_NAND_DRIVER_ECC_LAYOUT
15 Omit standard ECC layouts to safe space. Select this if your driver
16 is known to provide its own ECC layout.
18 config SYS_NAND_USE_FLASH_BBT
19 bool "Enable BBT (Bad Block Table) support"
21 Enable the BBT (Bad Block Table) usage.
24 bool "Support Atmel NAND controller"
25 imply SYS_NAND_USE_FLASH_BBT
27 Enable this driver for NAND flash platforms using an Atmel NAND
32 config ATMEL_NAND_HWECC
33 bool "Atmel Hardware ECC"
35 config ATMEL_NAND_HW_PMECC
36 bool "Atmel Programmable Multibit ECC (PMECC)"
37 select ATMEL_NAND_HWECC
39 The Programmable Multibit ECC (PMECC) controller is a programmable
40 binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder.
43 int "PMECC Correctable ECC Bits"
44 depends on ATMEL_NAND_HW_PMECC
47 Correctable ECC bits, can be 2, 4, 8, 12, and 24.
49 config PMECC_SECTOR_SIZE
50 int "PMECC Sector Size"
51 depends on ATMEL_NAND_HW_PMECC
54 Sector size, in bytes, can be 512 or 1024.
56 config SPL_GENERATE_ATMEL_PMECC_HEADER
57 bool "Atmel PMECC Header Generation"
58 select ATMEL_NAND_HWECC
59 select ATMEL_NAND_HW_PMECC
61 Generate Programmable Multibit ECC (PMECC) header for SPL image.
66 bool "Support Broadcom NAND controller"
67 depends on OF_CONTROL && DM && DM_MTD
69 Enable the driver for NAND flash on platforms using a Broadcom NAND
72 config NAND_BRCMNAND_6368
73 bool "Support Broadcom NAND controller on bcm6368"
74 depends on NAND_BRCMNAND && ARCH_BMIPS
76 Enable support for broadcom nand driver on bcm6368.
78 config NAND_BRCMNAND_68360
79 bool "Support Broadcom NAND controller on bcm68360"
80 depends on NAND_BRCMNAND && ARCH_BCM68360
82 Enable support for broadcom nand driver on bcm68360.
84 config NAND_BRCMNAND_6838
85 bool "Support Broadcom NAND controller on bcm6838"
86 depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838
88 Enable support for broadcom nand driver on bcm6838.
90 config NAND_BRCMNAND_6858
91 bool "Support Broadcom NAND controller on bcm6858"
92 depends on NAND_BRCMNAND && ARCH_BCM6858
94 Enable support for broadcom nand driver on bcm6858.
96 config NAND_BRCMNAND_63158
97 bool "Support Broadcom NAND controller on bcm63158"
98 depends on NAND_BRCMNAND && ARCH_BCM63158
100 Enable support for broadcom nand driver on bcm63158.
103 bool "Support TI Davinci NAND controller"
105 Enable this driver for NAND flash controllers available in TI Davinci
106 and Keystone2 platforms
110 select SYS_NAND_SELF_INIT
113 config NAND_DENALI_DT
114 bool "Support Denali NAND controller as a DT device"
116 depends on OF_CONTROL && DM_MTD
118 Enable the driver for NAND flash on platforms using a Denali NAND
119 controller as a DT device.
121 config NAND_LPC32XX_SLC
122 bool "Support LPC32XX_SLC controller"
124 Enable the LPC32XX SLC NAND controller.
126 config NAND_OMAP_GPMC
127 bool "Support OMAP GPMC NAND controller"
128 depends on ARCH_OMAP2PLUS
130 Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
131 GPMC controller is used for parallel NAND flash devices, and can
132 do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
133 and BCH16 ECC algorithms.
135 config NAND_OMAP_GPMC_PREFETCH
136 bool "Enable GPMC Prefetch"
137 depends on NAND_OMAP_GPMC
140 On OMAP platforms that use the GPMC controller
141 (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
142 uses the prefetch mode to speed up read operations.
145 bool "Enable ELM driver for OMAPxx and AMxx platforms."
146 depends on NAND_OMAP_GPMC && !OMAP34XX
148 ELM controller is used for ECC error detection (not ECC calculation)
149 of BCH4, BCH8 and BCH16 ECC algorithms.
150 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
151 thus such SoC platforms need to depend on software library for ECC error
152 detection. However ECC calculation on such plaforms would still be
153 done by GPMC controller.
155 config NAND_VF610_NFC
156 bool "Support for Freescale NFC for VF610"
157 select SYS_NAND_SELF_INIT
158 select SYS_NAND_DRIVER_ECC_LAYOUT
161 Enables support for NAND Flash Controller on some Freescale
162 processors like the VF610, MCF54418 or Kinetis K70.
163 The driver supports a maximum 2k page size. The driver
164 currently does not support hardware ECC.
168 config NAND_VF610_NFC_DT
169 bool "Support Vybrid's vf610 NAND controller as a DT device"
170 depends on OF_CONTROL && DM_MTD
172 Enable the driver for Vybrid's vf610 NAND flash on platforms
176 prompt "Hardware ECC strength"
177 depends on NAND_VF610_NFC
178 default SYS_NAND_VF610_NFC_45_ECC_BYTES
180 Select the ECC strength used in the hardware BCH ECC block.
182 config SYS_NAND_VF610_NFC_45_ECC_BYTES
183 bool "24-error correction (45 ECC bytes)"
185 config SYS_NAND_VF610_NFC_60_ECC_BYTES
186 bool "32-error correction (60 ECC bytes)"
193 bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
194 select SYS_NAND_SELF_INIT
200 This enables the driver for the NAND flash device found on
201 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
204 bool "Support for NAND on Allwinner SoCs"
206 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
207 select SYS_NAND_SELF_INIT
208 select SYS_NAND_U_BOOT_LOCATIONS
209 select SPL_NAND_SUPPORT
212 Enable support for NAND. This option enables the standard and
214 The SPL driver only supports reading from the NAND using DMA
219 config NAND_SUNXI_SPL_ECC_STRENGTH
220 int "Allwinner NAND SPL ECC Strength"
223 config NAND_SUNXI_SPL_ECC_SIZE
224 int "Allwinner NAND SPL ECC Step Size"
227 config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
228 int "Allwinner NAND SPL Usable Page Size"
234 bool "Configure Arasan Nand"
235 select SYS_NAND_SELF_INIT
239 This enables Nand driver support for Arasan nand flash
240 controller. This uses the hardware ECC for read and
244 bool "MXC NAND support"
245 depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
248 This enables the NAND driver for the NAND flash controller on the
249 i.MX27 / i.MX31 / i.MX5 rocessors.
252 bool "MXS NAND support"
253 depends on MX23 || MX28 || MX6 || MX7 || IMX8 || IMX8M
254 select SYS_NAND_SELF_INIT
257 select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7 || ARCH_IMX8 || ARCH_IMX8M
258 select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7 || ARCH_IMX8 || ARCH_IMX8M
260 This enables NAND driver for the NAND flash controller on the
266 bool "Support MXS NAND controller as a DT device"
267 depends on OF_CONTROL && DM_MTD
269 Enable the driver for MXS NAND flash on platforms using
272 config NAND_MXS_USE_MINIMUM_ECC
273 bool "Use minimum ECC strength supported by the controller"
279 bool "Support for Zynq Nand controller"
280 select SYS_NAND_SELF_INIT
284 This enables Nand driver support for Nand flash controller
287 config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
288 bool "Enable use of 1st stage bootloader timing for NAND"
291 This flag prevent U-boot reconfigure NAND flash controller and reuse
292 the NAND timing from 1st stage bootloader.
295 bool "Support for OcteonTX NAND controller"
296 select SYS_NAND_SELF_INIT
299 This enables Nand flash controller hardware found on the OcteonTX
302 config NAND_OCTEONTX_HW_ECC
303 bool "Support Hardware ECC for OcteonTX NAND controller"
304 depends on NAND_OCTEONTX
307 This enables Hardware BCH engine found on the OcteonTX processors to
308 support ECC for NAND flash controller.
310 config NAND_STM32_FMC2
311 bool "Support for NAND controller on STM32MP SoCs"
312 depends on ARCH_STM32MP
313 select SYS_NAND_SELF_INIT
316 Enables support for NAND Flash chips on SoCs containing the FMC2
317 NAND controller. This controller is found on STM32MP SoCs.
318 The controller supports a maximum 8k page size and supports
319 a maximum 8-bit correction error per sector of 512 bytes.
322 bool "Support for NAND controller on Cortina-Access SoCs"
323 depends on CORTINA_PLATFORM
324 select SYS_NAND_SELF_INIT
328 Enables support for NAND Flash chips on Coartina-Access SoCs platform
329 This controller is found on Presidio/Venus SoCs.
330 The controller supports a maximum 8k page size and supports
331 a maximum 40-bit error correction per sector of 1024 bytes.
334 bool "Support for NAND controller on Rockchip SoCs"
335 depends on ARCH_ROCKCHIP
336 select SYS_NAND_SELF_INIT
340 Enables support for NAND Flash chips on Rockchip SoCs platform.
341 This controller is found on Rockchip SoCs.
342 There are four different versions of NAND FLASH Controllers,
344 NFC v600: RK2928, RK3066, RK3188
345 NFC v622: RK3036, RK3128
346 NFC v800: RK3308, RV1108
347 NFC v900: PX30, RK3326
349 comment "Generic NAND options"
351 config SYS_NAND_BLOCK_SIZE
352 hex "NAND chip eraseblock size"
353 depends on ARCH_SUNXI
355 Number of data bytes in one eraseblock for the NAND chip on the
356 board. This is the multiple of NAND_PAGE_SIZE and the number of
359 config SYS_NAND_PAGE_SIZE
360 hex "NAND chip page size"
361 depends on ARCH_SUNXI
363 Number of data bytes in one page for the NAND chip on the
364 board, not including the OOB area.
366 config SYS_NAND_OOBSIZE
367 hex "NAND chip OOB size"
368 depends on ARCH_SUNXI
370 Number of bytes in the Out-Of-Band area for the NAND chip on
373 # Enhance depends when converting drivers to Kconfig which use this config
374 # option (mxc_nand, ndfc, omap_gpmc).
375 config SYS_NAND_BUSWIDTH_16BIT
376 bool "Use 16-bit NAND interface"
377 depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
379 Indicates that NAND device has 16-bit wide data-bus. In absence of this
380 config, bus-width of NAND device is assumed to be either 8-bit and later
381 determined by reading ONFI params.
382 Above config is useful when NAND device's bus-width information cannot
383 be determined from on-chip ONFI params, like in following scenarios:
384 - SPL boot does not support reading of ONFI parameters. This is done to
385 keep SPL code foot-print small.
386 - In current U-Boot flow using nand_init(), driver initialization
387 happens in board_nand_init() which is called before any device probe
388 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
389 not available while configuring controller. So a static CONFIG_NAND_xx
390 is needed to know the device's bus-width in advance.
392 config SYS_NAND_MAX_CHIPS
395 depends on NAND_ARASAN
397 The maximum number of NAND chips per device to be supported.
401 config SYS_NAND_U_BOOT_LOCATIONS
402 bool "Define U-boot binaries locations in NAND"
404 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
405 This option should not be enabled when compiling U-boot for boards
406 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
409 config SYS_NAND_U_BOOT_OFFS
410 hex "Location in NAND to read U-Boot from"
411 default 0x800000 if NAND_SUNXI
412 depends on SYS_NAND_U_BOOT_LOCATIONS
414 Set the offset from the start of the nand where u-boot should be
417 config SYS_NAND_U_BOOT_OFFS_REDUND
418 hex "Location in NAND to read U-Boot from"
419 default SYS_NAND_U_BOOT_OFFS
420 depends on SYS_NAND_U_BOOT_LOCATIONS
422 Set the offset from the start of the nand where the redundant u-boot
423 should be loaded from.
425 config SPL_NAND_AM33XX_BCH
426 bool "Enables SPL-NAND driver which supports ELM based"
427 depends on NAND_OMAP_GPMC && !OMAP34XX
430 Hardware ECC correction. This is useful for platforms which have ELM
431 hardware engine and use NAND boot mode.
432 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
433 so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
434 SPL-NAND driver with software ECC correction support.
436 config SPL_NAND_DENALI
437 bool "Support Denali NAND controller for SPL"
439 This is a small implementation of the Denali NAND controller
442 config NAND_DENALI_SPARE_AREA_SKIP_BYTES
443 int "Number of bytes skipped in OOB area"
444 depends on SPL_NAND_DENALI
447 This option specifies the number of bytes to skip from the beginning
448 of OOB area before last ECC sector data starts. This is potentially
449 used to preserve the bad block marker in the OOB area.
451 config SPL_NAND_SIMPLE
452 bool "Use simple SPL NAND driver"
453 depends on !SPL_NAND_AM33XX_BCH
455 Support for NAND boot using simple NAND drivers that
456 expose the cmd_ctrl() interface.