2 menuconfig MTD_RAW_NAND
3 bool "Raw NAND Device Support"
6 config SYS_NAND_SELF_INIT
9 This option, if enabled, provides more flexible and linux-like
10 NAND initialization process.
12 config SYS_NAND_DRIVER_ECC_LAYOUT
15 Omit standard ECC layouts to safe space. Select this if your driver
16 is known to provide its own ECC layout.
18 config SYS_NAND_USE_FLASH_BBT
19 bool "Enable BBT (Bad Block Table) support"
21 Enable the BBT (Bad Block Table) usage.
24 bool "Support Atmel NAND controller"
25 imply SYS_NAND_USE_FLASH_BBT
27 Enable this driver for NAND flash platforms using an Atmel NAND
32 config ATMEL_NAND_HWECC
33 bool "Atmel Hardware ECC"
36 config ATMEL_NAND_HW_PMECC
37 bool "Atmel Programmable Multibit ECC (PMECC)"
38 select ATMEL_NAND_HWECC
41 The Programmable Multibit ECC (PMECC) controller is a programmable
42 binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder.
45 int "PMECC Correctable ECC Bits"
46 depends on ATMEL_NAND_HW_PMECC
49 Correctable ECC bits, can be 2, 4, 8, 12, and 24.
51 config PMECC_SECTOR_SIZE
52 int "PMECC Sector Size"
53 depends on ATMEL_NAND_HW_PMECC
56 Sector size, in bytes, can be 512 or 1024.
58 config SPL_GENERATE_ATMEL_PMECC_HEADER
59 bool "Atmel PMECC Header Generation"
60 select ATMEL_NAND_HWECC
61 select ATMEL_NAND_HW_PMECC
64 Generate Programmable Multibit ECC (PMECC) header for SPL image.
69 bool "Support Broadcom NAND controller"
70 depends on OF_CONTROL && DM && DM_MTD
72 Enable the driver for NAND flash on platforms using a Broadcom NAND
75 config NAND_BRCMNAND_6368
76 bool "Support Broadcom NAND controller on bcm6368"
77 depends on NAND_BRCMNAND && ARCH_BMIPS
79 Enable support for broadcom nand driver on bcm6368.
81 config NAND_BRCMNAND_68360
82 bool "Support Broadcom NAND controller on bcm68360"
83 depends on NAND_BRCMNAND && ARCH_BCM68360
85 Enable support for broadcom nand driver on bcm68360.
87 config NAND_BRCMNAND_6838
88 bool "Support Broadcom NAND controller on bcm6838"
89 depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838
91 Enable support for broadcom nand driver on bcm6838.
93 config NAND_BRCMNAND_6858
94 bool "Support Broadcom NAND controller on bcm6858"
95 depends on NAND_BRCMNAND && ARCH_BCM6858
97 Enable support for broadcom nand driver on bcm6858.
99 config NAND_BRCMNAND_63158
100 bool "Support Broadcom NAND controller on bcm63158"
101 depends on NAND_BRCMNAND && ARCH_BCM63158
103 Enable support for broadcom nand driver on bcm63158.
106 bool "Support TI Davinci NAND controller"
108 Enable this driver for NAND flash controllers available in TI Davinci
109 and Keystone2 platforms
113 select SYS_NAND_SELF_INIT
116 config NAND_DENALI_DT
117 bool "Support Denali NAND controller as a DT device"
119 depends on OF_CONTROL && DM_MTD
121 Enable the driver for NAND flash on platforms using a Denali NAND
122 controller as a DT device.
124 config NAND_LPC32XX_SLC
125 bool "Support LPC32XX_SLC controller"
127 Enable the LPC32XX SLC NAND controller.
129 config NAND_OMAP_GPMC
130 bool "Support OMAP GPMC NAND controller"
131 depends on ARCH_OMAP2PLUS
133 Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
134 GPMC controller is used for parallel NAND flash devices, and can
135 do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
136 and BCH16 ECC algorithms.
138 config NAND_OMAP_GPMC_PREFETCH
139 bool "Enable GPMC Prefetch"
140 depends on NAND_OMAP_GPMC
143 On OMAP platforms that use the GPMC controller
144 (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
145 uses the prefetch mode to speed up read operations.
148 bool "Enable ELM driver for OMAPxx and AMxx platforms."
149 depends on NAND_OMAP_GPMC && !OMAP34XX
151 ELM controller is used for ECC error detection (not ECC calculation)
152 of BCH4, BCH8 and BCH16 ECC algorithms.
153 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
154 thus such SoC platforms need to depend on software library for ECC error
155 detection. However ECC calculation on such plaforms would still be
156 done by GPMC controller.
158 config NAND_VF610_NFC
159 bool "Support for Freescale NFC for VF610"
160 select SYS_NAND_SELF_INIT
161 select SYS_NAND_DRIVER_ECC_LAYOUT
164 Enables support for NAND Flash Controller on some Freescale
165 processors like the VF610, MCF54418 or Kinetis K70.
166 The driver supports a maximum 2k page size. The driver
167 currently does not support hardware ECC.
171 config NAND_VF610_NFC_DT
172 bool "Support Vybrid's vf610 NAND controller as a DT device"
173 depends on OF_CONTROL && DM_MTD
175 Enable the driver for Vybrid's vf610 NAND flash on platforms
179 prompt "Hardware ECC strength"
180 depends on NAND_VF610_NFC
181 default SYS_NAND_VF610_NFC_45_ECC_BYTES
183 Select the ECC strength used in the hardware BCH ECC block.
185 config SYS_NAND_VF610_NFC_45_ECC_BYTES
186 bool "24-error correction (45 ECC bytes)"
188 config SYS_NAND_VF610_NFC_60_ECC_BYTES
189 bool "32-error correction (60 ECC bytes)"
196 bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
197 select SYS_NAND_SELF_INIT
203 This enables the driver for the NAND flash device found on
204 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
207 bool "Support for NAND on Allwinner SoCs"
209 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
210 select SYS_NAND_SELF_INIT
211 select SYS_NAND_U_BOOT_LOCATIONS
212 select SPL_NAND_SUPPORT
215 Enable support for NAND. This option enables the standard and
217 The SPL driver only supports reading from the NAND using DMA
222 config NAND_SUNXI_SPL_ECC_STRENGTH
223 int "Allwinner NAND SPL ECC Strength"
226 config NAND_SUNXI_SPL_ECC_SIZE
227 int "Allwinner NAND SPL ECC Step Size"
230 config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
231 int "Allwinner NAND SPL Usable Page Size"
237 bool "Configure Arasan Nand"
238 select SYS_NAND_SELF_INIT
242 This enables Nand driver support for Arasan nand flash
243 controller. This uses the hardware ECC for read and
247 bool "MXC NAND support"
248 depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
251 This enables the NAND driver for the NAND flash controller on the
252 i.MX27 / i.MX31 / i.MX5 rocessors.
255 bool "MXS NAND support"
256 depends on MX23 || MX28 || MX6 || MX7 || IMX8 || IMX8M
257 select SYS_NAND_SELF_INIT
260 select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7 || ARCH_IMX8 || ARCH_IMX8M
261 select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7 || ARCH_IMX8 || ARCH_IMX8M
263 This enables NAND driver for the NAND flash controller on the
269 bool "Support MXS NAND controller as a DT device"
270 depends on OF_CONTROL && DM_MTD
272 Enable the driver for MXS NAND flash on platforms using
275 config NAND_MXS_USE_MINIMUM_ECC
276 bool "Use minimum ECC strength supported by the controller"
282 bool "Support for Zynq Nand controller"
283 select SYS_NAND_SELF_INIT
287 This enables Nand driver support for Nand flash controller
290 config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
291 bool "Enable use of 1st stage bootloader timing for NAND"
294 This flag prevent U-boot reconfigure NAND flash controller and reuse
295 the NAND timing from 1st stage bootloader.
298 bool "Support for OcteonTX NAND controller"
299 select SYS_NAND_SELF_INIT
302 This enables Nand flash controller hardware found on the OcteonTX
305 config NAND_OCTEONTX_HW_ECC
306 bool "Support Hardware ECC for OcteonTX NAND controller"
307 depends on NAND_OCTEONTX
310 This enables Hardware BCH engine found on the OcteonTX processors to
311 support ECC for NAND flash controller.
313 config NAND_STM32_FMC2
314 bool "Support for NAND controller on STM32MP SoCs"
315 depends on ARCH_STM32MP
316 select SYS_NAND_SELF_INIT
319 Enables support for NAND Flash chips on SoCs containing the FMC2
320 NAND controller. This controller is found on STM32MP SoCs.
321 The controller supports a maximum 8k page size and supports
322 a maximum 8-bit correction error per sector of 512 bytes.
325 bool "Support for NAND controller on Cortina-Access SoCs"
326 depends on CORTINA_PLATFORM
327 select SYS_NAND_SELF_INIT
331 Enables support for NAND Flash chips on Coartina-Access SoCs platform
332 This controller is found on Presidio/Venus SoCs.
333 The controller supports a maximum 8k page size and supports
334 a maximum 40-bit error correction per sector of 1024 bytes.
337 bool "Support for NAND controller on Rockchip SoCs"
338 depends on ARCH_ROCKCHIP
339 select SYS_NAND_SELF_INIT
343 Enables support for NAND Flash chips on Rockchip SoCs platform.
344 This controller is found on Rockchip SoCs.
345 There are four different versions of NAND FLASH Controllers,
347 NFC v600: RK2928, RK3066, RK3188
348 NFC v622: RK3036, RK3128
349 NFC v800: RK3308, RV1108
350 NFC v900: PX30, RK3326
352 comment "Generic NAND options"
354 config SYS_NAND_BLOCK_SIZE
355 hex "NAND chip eraseblock size"
356 depends on ARCH_SUNXI
358 Number of data bytes in one eraseblock for the NAND chip on the
359 board. This is the multiple of NAND_PAGE_SIZE and the number of
362 config SYS_NAND_PAGE_SIZE
363 hex "NAND chip page size"
364 depends on ARCH_SUNXI
366 Number of data bytes in one page for the NAND chip on the
367 board, not including the OOB area.
369 config SYS_NAND_OOBSIZE
370 hex "NAND chip OOB size"
371 depends on ARCH_SUNXI
373 Number of bytes in the Out-Of-Band area for the NAND chip on
376 # Enhance depends when converting drivers to Kconfig which use this config
377 # option (mxc_nand, ndfc, omap_gpmc).
378 config SYS_NAND_BUSWIDTH_16BIT
379 bool "Use 16-bit NAND interface"
380 depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
382 Indicates that NAND device has 16-bit wide data-bus. In absence of this
383 config, bus-width of NAND device is assumed to be either 8-bit and later
384 determined by reading ONFI params.
385 Above config is useful when NAND device's bus-width information cannot
386 be determined from on-chip ONFI params, like in following scenarios:
387 - SPL boot does not support reading of ONFI parameters. This is done to
388 keep SPL code foot-print small.
389 - In current U-Boot flow using nand_init(), driver initialization
390 happens in board_nand_init() which is called before any device probe
391 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
392 not available while configuring controller. So a static CONFIG_NAND_xx
393 is needed to know the device's bus-width in advance.
395 config SYS_NAND_MAX_CHIPS
398 depends on NAND_ARASAN
400 The maximum number of NAND chips per device to be supported.
404 config SYS_NAND_U_BOOT_LOCATIONS
405 bool "Define U-boot binaries locations in NAND"
407 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
408 This option should not be enabled when compiling U-boot for boards
409 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
412 config SYS_NAND_U_BOOT_OFFS
413 hex "Location in NAND to read U-Boot from"
414 default 0x800000 if NAND_SUNXI
415 depends on SYS_NAND_U_BOOT_LOCATIONS
417 Set the offset from the start of the nand where u-boot should be
420 config SYS_NAND_U_BOOT_OFFS_REDUND
421 hex "Location in NAND to read U-Boot from"
422 default SYS_NAND_U_BOOT_OFFS
423 depends on SYS_NAND_U_BOOT_LOCATIONS
425 Set the offset from the start of the nand where the redundant u-boot
426 should be loaded from.
428 config SPL_NAND_AM33XX_BCH
429 bool "Enables SPL-NAND driver which supports ELM based"
430 depends on NAND_OMAP_GPMC && !OMAP34XX
433 Hardware ECC correction. This is useful for platforms which have ELM
434 hardware engine and use NAND boot mode.
435 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
436 so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
437 SPL-NAND driver with software ECC correction support.
439 config SPL_NAND_DENALI
440 bool "Support Denali NAND controller for SPL"
442 This is a small implementation of the Denali NAND controller
445 config NAND_DENALI_SPARE_AREA_SKIP_BYTES
446 int "Number of bytes skipped in OOB area"
447 depends on SPL_NAND_DENALI
450 This option specifies the number of bytes to skip from the beginning
451 of OOB area before last ECC sector data starts. This is potentially
452 used to preserve the bad block marker in the OOB area.
454 config SPL_NAND_SIMPLE
455 bool "Use simple SPL NAND driver"
456 depends on !SPL_NAND_AM33XX_BCH
458 Support for NAND boot using simple NAND drivers that
459 expose the cmd_ctrl() interface.