2 menuconfig MTD_RAW_NAND
3 bool "Raw NAND Device Support"
6 config SYS_NAND_SELF_INIT
9 This option, if enabled, provides more flexible and linux-like
10 NAND initialization process.
12 config SYS_NAND_DRIVER_ECC_LAYOUT
15 Omit standard ECC layouts to safe space. Select this if your driver
16 is known to provide its own ECC layout.
18 config SYS_NAND_USE_FLASH_BBT
19 bool "Enable BBT (Bad Block Table) support"
21 Enable the BBT (Bad Block Table) usage.
24 bool "Support Atmel NAND controller"
25 imply SYS_NAND_USE_FLASH_BBT
27 Enable this driver for NAND flash platforms using an Atmel NAND
32 config ATMEL_NAND_HWECC
33 bool "Atmel Hardware ECC"
36 config ATMEL_NAND_HW_PMECC
37 bool "Atmel Programmable Multibit ECC (PMECC)"
38 select ATMEL_NAND_HWECC
41 The Programmable Multibit ECC (PMECC) controller is a programmable
42 binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder.
45 int "PMECC Correctable ECC Bits"
46 depends on ATMEL_NAND_HW_PMECC
49 Correctable ECC bits, can be 2, 4, 8, 12, and 24.
51 config PMECC_SECTOR_SIZE
52 int "PMECC Sector Size"
53 depends on ATMEL_NAND_HW_PMECC
56 Sector size, in bytes, can be 512 or 1024.
58 config SPL_GENERATE_ATMEL_PMECC_HEADER
59 bool "Atmel PMECC Header Generation"
60 select ATMEL_NAND_HWECC
61 select ATMEL_NAND_HW_PMECC
64 Generate Programmable Multibit ECC (PMECC) header for SPL image.
69 bool "Support Broadcom NAND controller"
70 depends on OF_CONTROL && DM && DM_MTD
72 Enable the driver for NAND flash on platforms using a Broadcom NAND
75 config NAND_BRCMNAND_6368
76 bool "Support Broadcom NAND controller on bcm6368"
77 depends on NAND_BRCMNAND && ARCH_BMIPS
79 Enable support for broadcom nand driver on bcm6368.
81 config NAND_BRCMNAND_68360
82 bool "Support Broadcom NAND controller on bcm68360"
83 depends on NAND_BRCMNAND && ARCH_BCM68360
85 Enable support for broadcom nand driver on bcm68360.
87 config NAND_BRCMNAND_6838
88 bool "Support Broadcom NAND controller on bcm6838"
89 depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838
91 Enable support for broadcom nand driver on bcm6838.
93 config NAND_BRCMNAND_6858
94 bool "Support Broadcom NAND controller on bcm6858"
95 depends on NAND_BRCMNAND && ARCH_BCM6858
97 Enable support for broadcom nand driver on bcm6858.
99 config NAND_BRCMNAND_63158
100 bool "Support Broadcom NAND controller on bcm63158"
101 depends on NAND_BRCMNAND && ARCH_BCM63158
103 Enable support for broadcom nand driver on bcm63158.
106 bool "Support TI Davinci NAND controller"
108 Enable this driver for NAND flash controllers available in TI Davinci
109 and Keystone2 platforms
113 select SYS_NAND_SELF_INIT
116 config NAND_DENALI_DT
117 bool "Support Denali NAND controller as a DT device"
119 depends on OF_CONTROL && DM_MTD
121 Enable the driver for NAND flash on platforms using a Denali NAND
122 controller as a DT device.
124 config NAND_DENALI_SPARE_AREA_SKIP_BYTES
125 int "Number of bytes skipped in OOB area"
126 depends on NAND_DENALI
129 This option specifies the number of bytes to skip from the beginning
130 of OOB area before last ECC sector data starts. This is potentially
131 used to preserve the bad block marker in the OOB area.
133 config NAND_LPC32XX_SLC
134 bool "Support LPC32XX_SLC controller"
136 Enable the LPC32XX SLC NAND controller.
138 config NAND_OMAP_GPMC
139 bool "Support OMAP GPMC NAND controller"
140 depends on ARCH_OMAP2PLUS
142 Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
143 GPMC controller is used for parallel NAND flash devices, and can
144 do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
145 and BCH16 ECC algorithms.
147 config NAND_OMAP_GPMC_PREFETCH
148 bool "Enable GPMC Prefetch"
149 depends on NAND_OMAP_GPMC
152 On OMAP platforms that use the GPMC controller
153 (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
154 uses the prefetch mode to speed up read operations.
157 bool "Enable ELM driver for OMAPxx and AMxx platforms."
158 depends on NAND_OMAP_GPMC && !OMAP34XX
160 ELM controller is used for ECC error detection (not ECC calculation)
161 of BCH4, BCH8 and BCH16 ECC algorithms.
162 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
163 thus such SoC platforms need to depend on software library for ECC error
164 detection. However ECC calculation on such plaforms would still be
165 done by GPMC controller.
167 config NAND_VF610_NFC
168 bool "Support for Freescale NFC for VF610"
169 select SYS_NAND_SELF_INIT
170 select SYS_NAND_DRIVER_ECC_LAYOUT
173 Enables support for NAND Flash Controller on some Freescale
174 processors like the VF610, MCF54418 or Kinetis K70.
175 The driver supports a maximum 2k page size. The driver
176 currently does not support hardware ECC.
180 config NAND_VF610_NFC_DT
181 bool "Support Vybrid's vf610 NAND controller as a DT device"
182 depends on OF_CONTROL && DM_MTD
184 Enable the driver for Vybrid's vf610 NAND flash on platforms
188 prompt "Hardware ECC strength"
189 depends on NAND_VF610_NFC
190 default SYS_NAND_VF610_NFC_45_ECC_BYTES
192 Select the ECC strength used in the hardware BCH ECC block.
194 config SYS_NAND_VF610_NFC_45_ECC_BYTES
195 bool "24-error correction (45 ECC bytes)"
197 config SYS_NAND_VF610_NFC_60_ECC_BYTES
198 bool "32-error correction (60 ECC bytes)"
205 bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
206 select SYS_NAND_SELF_INIT
209 This enables the driver for the NAND flash device found on
210 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
213 bool "Support for NAND on Allwinner SoCs"
215 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
216 select SYS_NAND_SELF_INIT
217 select SYS_NAND_U_BOOT_LOCATIONS
218 select SPL_NAND_SUPPORT
221 Enable support for NAND. This option enables the standard and
223 The SPL driver only supports reading from the NAND using DMA
228 config NAND_SUNXI_SPL_ECC_STRENGTH
229 int "Allwinner NAND SPL ECC Strength"
232 config NAND_SUNXI_SPL_ECC_SIZE
233 int "Allwinner NAND SPL ECC Step Size"
236 config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
237 int "Allwinner NAND SPL Usable Page Size"
243 bool "Configure Arasan Nand"
244 select SYS_NAND_SELF_INIT
248 This enables Nand driver support for Arasan nand flash
249 controller. This uses the hardware ECC for read and
253 bool "MXC NAND support"
254 depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
257 This enables the NAND driver for the NAND flash controller on the
258 i.MX27 / i.MX31 / i.MX5 rocessors.
261 bool "MXS NAND support"
262 depends on MX23 || MX28 || MX6 || MX7 || IMX8 || IMX8M
263 select SYS_NAND_SELF_INIT
266 select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7 || ARCH_IMX8 || ARCH_IMX8M
267 select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7 || ARCH_IMX8 || ARCH_IMX8M
269 This enables NAND driver for the NAND flash controller on the
275 bool "Support MXS NAND controller as a DT device"
276 depends on OF_CONTROL && DM_MTD
278 Enable the driver for MXS NAND flash on platforms using
281 config NAND_MXS_USE_MINIMUM_ECC
282 bool "Use minimum ECC strength supported by the controller"
288 bool "Support for Zynq Nand controller"
289 select SYS_NAND_SELF_INIT
293 This enables Nand driver support for Nand flash controller
296 config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
297 bool "Enable use of 1st stage bootloader timing for NAND"
300 This flag prevent U-boot reconfigure NAND flash controller and reuse
301 the NAND timing from 1st stage bootloader.
303 config NAND_STM32_FMC2
304 bool "Support for NAND controller on STM32MP SoCs"
305 depends on ARCH_STM32MP
306 select SYS_NAND_SELF_INIT
309 Enables support for NAND Flash chips on SoCs containing the FMC2
310 NAND controller. This controller is found on STM32MP SoCs.
311 The controller supports a maximum 8k page size and supports
312 a maximum 8-bit correction error per sector of 512 bytes.
314 comment "Generic NAND options"
316 config SYS_NAND_BLOCK_SIZE
317 hex "NAND chip eraseblock size"
318 depends on ARCH_SUNXI
320 Number of data bytes in one eraseblock for the NAND chip on the
321 board. This is the multiple of NAND_PAGE_SIZE and the number of
324 config SYS_NAND_PAGE_SIZE
325 hex "NAND chip page size"
326 depends on ARCH_SUNXI
328 Number of data bytes in one page for the NAND chip on the
329 board, not including the OOB area.
331 config SYS_NAND_OOBSIZE
332 hex "NAND chip OOB size"
333 depends on ARCH_SUNXI
335 Number of bytes in the Out-Of-Band area for the NAND chip on
338 # Enhance depends when converting drivers to Kconfig which use this config
339 # option (mxc_nand, ndfc, omap_gpmc).
340 config SYS_NAND_BUSWIDTH_16BIT
341 bool "Use 16-bit NAND interface"
342 depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
344 Indicates that NAND device has 16-bit wide data-bus. In absence of this
345 config, bus-width of NAND device is assumed to be either 8-bit and later
346 determined by reading ONFI params.
347 Above config is useful when NAND device's bus-width information cannot
348 be determined from on-chip ONFI params, like in following scenarios:
349 - SPL boot does not support reading of ONFI parameters. This is done to
350 keep SPL code foot-print small.
351 - In current U-Boot flow using nand_init(), driver initialization
352 happens in board_nand_init() which is called before any device probe
353 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
354 not available while configuring controller. So a static CONFIG_NAND_xx
355 is needed to know the device's bus-width in advance.
357 config SYS_NAND_MAX_CHIPS
360 depends on NAND_ARASAN
362 The maximum number of NAND chips per device to be supported.
366 config SYS_NAND_U_BOOT_LOCATIONS
367 bool "Define U-boot binaries locations in NAND"
369 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
370 This option should not be enabled when compiling U-boot for boards
371 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
374 config SYS_NAND_U_BOOT_OFFS
375 hex "Location in NAND to read U-Boot from"
376 default 0x800000 if NAND_SUNXI
377 depends on SYS_NAND_U_BOOT_LOCATIONS
379 Set the offset from the start of the nand where u-boot should be
382 config SYS_NAND_U_BOOT_OFFS_REDUND
383 hex "Location in NAND to read U-Boot from"
384 default SYS_NAND_U_BOOT_OFFS
385 depends on SYS_NAND_U_BOOT_LOCATIONS
387 Set the offset from the start of the nand where the redundant u-boot
388 should be loaded from.
390 config SPL_NAND_AM33XX_BCH
391 bool "Enables SPL-NAND driver which supports ELM based"
392 depends on NAND_OMAP_GPMC && !OMAP34XX
395 Hardware ECC correction. This is useful for platforms which have ELM
396 hardware engine and use NAND boot mode.
397 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
398 so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
399 SPL-NAND driver with software ECC correction support.
401 config SPL_NAND_DENALI
402 bool "Support Denali NAND controller for SPL"
404 This is a small implementation of the Denali NAND controller
407 config SPL_NAND_SIMPLE
408 bool "Use simple SPL NAND driver"
409 depends on !SPL_NAND_AM33XX_BCH
411 Support for NAND boot using simple NAND drivers that
412 expose the cmd_ctrl() interface.