2 menuconfig MTD_RAW_NAND
3 bool "Raw NAND Device Support"
6 config SYS_NAND_SELF_INIT
9 This option, if enabled, provides more flexible and linux-like
10 NAND initialization process.
12 config SYS_NAND_DRIVER_ECC_LAYOUT
15 Omit standard ECC layouts to safe space. Select this if your driver
16 is known to provide its own ECC layout.
18 config SYS_NAND_USE_FLASH_BBT
19 bool "Enable BBT (Bad Block Table) support"
21 Enable the BBT (Bad Block Table) usage.
24 bool "Support Atmel NAND controller"
25 imply SYS_NAND_USE_FLASH_BBT
27 Enable this driver for NAND flash platforms using an Atmel NAND
32 config ATMEL_NAND_HWECC
33 bool "Atmel Hardware ECC"
36 config ATMEL_NAND_HW_PMECC
37 bool "Atmel Programmable Multibit ECC (PMECC)"
38 select ATMEL_NAND_HWECC
41 The Programmable Multibit ECC (PMECC) controller is a programmable
42 binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder.
45 int "PMECC Correctable ECC Bits"
46 depends on ATMEL_NAND_HW_PMECC
49 Correctable ECC bits, can be 2, 4, 8, 12, and 24.
51 config PMECC_SECTOR_SIZE
52 int "PMECC Sector Size"
53 depends on ATMEL_NAND_HW_PMECC
56 Sector size, in bytes, can be 512 or 1024.
58 config SPL_GENERATE_ATMEL_PMECC_HEADER
59 bool "Atmel PMECC Header Generation"
60 select ATMEL_NAND_HWECC
61 select ATMEL_NAND_HW_PMECC
64 Generate Programmable Multibit ECC (PMECC) header for SPL image.
69 bool "Support Broadcom NAND controller"
70 depends on OF_CONTROL && DM && DM_MTD
72 Enable the driver for NAND flash on platforms using a Broadcom NAND
75 config NAND_BRCMNAND_6368
76 bool "Support Broadcom NAND controller on bcm6368"
77 depends on NAND_BRCMNAND && ARCH_BMIPS
79 Enable support for broadcom nand driver on bcm6368.
81 config NAND_BRCMNAND_6838
82 bool "Support Broadcom NAND controller on bcm6838"
83 depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838
85 Enable support for broadcom nand driver on bcm6838.
87 config NAND_BRCMNAND_6858
88 bool "Support Broadcom NAND controller on bcm6858"
89 depends on NAND_BRCMNAND && ARCH_BCM6858
91 Enable support for broadcom nand driver on bcm6858.
93 config NAND_BRCMNAND_63158
94 bool "Support Broadcom NAND controller on bcm63158"
95 depends on NAND_BRCMNAND && ARCH_BCM63158
97 Enable support for broadcom nand driver on bcm63158.
100 bool "Support TI Davinci NAND controller"
102 Enable this driver for NAND flash controllers available in TI Davinci
103 and Keystone2 platforms
107 select SYS_NAND_SELF_INIT
110 config NAND_DENALI_DT
111 bool "Support Denali NAND controller as a DT device"
113 depends on OF_CONTROL && DM
115 Enable the driver for NAND flash on platforms using a Denali NAND
116 controller as a DT device.
118 config NAND_DENALI_SPARE_AREA_SKIP_BYTES
119 int "Number of bytes skipped in OOB area"
120 depends on NAND_DENALI
123 This option specifies the number of bytes to skip from the beginning
124 of OOB area before last ECC sector data starts. This is potentially
125 used to preserve the bad block marker in the OOB area.
127 config NAND_LPC32XX_SLC
128 bool "Support LPC32XX_SLC controller"
130 Enable the LPC32XX SLC NAND controller.
132 config NAND_OMAP_GPMC
133 bool "Support OMAP GPMC NAND controller"
134 depends on ARCH_OMAP2PLUS
136 Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
137 GPMC controller is used for parallel NAND flash devices, and can
138 do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
139 and BCH16 ECC algorithms.
141 config NAND_OMAP_GPMC_PREFETCH
142 bool "Enable GPMC Prefetch"
143 depends on NAND_OMAP_GPMC
146 On OMAP platforms that use the GPMC controller
147 (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
148 uses the prefetch mode to speed up read operations.
151 bool "Enable ELM driver for OMAPxx and AMxx platforms."
152 depends on NAND_OMAP_GPMC && !OMAP34XX
154 ELM controller is used for ECC error detection (not ECC calculation)
155 of BCH4, BCH8 and BCH16 ECC algorithms.
156 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
157 thus such SoC platforms need to depend on software library for ECC error
158 detection. However ECC calculation on such plaforms would still be
159 done by GPMC controller.
161 config NAND_VF610_NFC
162 bool "Support for Freescale NFC for VF610"
163 select SYS_NAND_SELF_INIT
164 select SYS_NAND_DRIVER_ECC_LAYOUT
167 Enables support for NAND Flash Controller on some Freescale
168 processors like the VF610, MCF54418 or Kinetis K70.
169 The driver supports a maximum 2k page size. The driver
170 currently does not support hardware ECC.
174 config NAND_VF610_NFC_DT
175 bool "Support Vybrid's vf610 NAND controller as a DT device"
176 depends on OF_CONTROL && DM_MTD
178 Enable the driver for Vybrid's vf610 NAND flash on platforms
182 prompt "Hardware ECC strength"
183 depends on NAND_VF610_NFC
184 default SYS_NAND_VF610_NFC_45_ECC_BYTES
186 Select the ECC strength used in the hardware BCH ECC block.
188 config SYS_NAND_VF610_NFC_45_ECC_BYTES
189 bool "24-error correction (45 ECC bytes)"
191 config SYS_NAND_VF610_NFC_60_ECC_BYTES
192 bool "32-error correction (60 ECC bytes)"
199 bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
200 select SYS_NAND_SELF_INIT
203 This enables the driver for the NAND flash device found on
204 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
207 bool "Support for NAND on Allwinner SoCs"
209 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
210 select SYS_NAND_SELF_INIT
211 select SYS_NAND_U_BOOT_LOCATIONS
212 select SPL_NAND_SUPPORT
215 Enable support for NAND. This option enables the standard and
217 The SPL driver only supports reading from the NAND using DMA
222 config NAND_SUNXI_SPL_ECC_STRENGTH
223 int "Allwinner NAND SPL ECC Strength"
226 config NAND_SUNXI_SPL_ECC_SIZE
227 int "Allwinner NAND SPL ECC Step Size"
230 config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
231 int "Allwinner NAND SPL Usable Page Size"
237 bool "Configure Arasan Nand"
238 select SYS_NAND_SELF_INIT
241 This enables Nand driver support for Arasan nand flash
242 controller. This uses the hardware ECC for read and
246 bool "MXC NAND support"
247 depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
250 This enables the NAND driver for the NAND flash controller on the
251 i.MX27 / i.MX31 / i.MX5 rocessors.
254 bool "MXS NAND support"
255 depends on MX23 || MX28 || MX6 || MX7
256 select SYS_NAND_SELF_INIT
259 select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
260 select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7
262 This enables NAND driver for the NAND flash controller on the
268 bool "Support MXS NAND controller as a DT device"
269 depends on OF_CONTROL && DM_MTD
271 Enable the driver for MXS NAND flash on platforms using
274 config NAND_MXS_USE_MINIMUM_ECC
275 bool "Use minimum ECC strength supported by the controller"
281 bool "Support for Zynq Nand controller"
282 select SYS_NAND_SELF_INIT
285 This enables Nand driver support for Nand flash controller
288 config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
289 bool "Enable use of 1st stage bootloader timing for NAND"
292 This flag prevent U-boot reconfigure NAND flash controller and reuse
293 the NAND timing from 1st stage bootloader.
295 config NAND_STM32_FMC2
296 bool "Support for NAND controller on STM32MP SoCs"
297 depends on ARCH_STM32MP
298 select SYS_NAND_SELF_INIT
301 Enables support for NAND Flash chips on SoCs containing the FMC2
302 NAND controller. This controller is found on STM32MP SoCs.
303 The controller supports a maximum 8k page size and supports
304 a maximum 8-bit correction error per sector of 512 bytes.
306 comment "Generic NAND options"
308 config SYS_NAND_BLOCK_SIZE
309 hex "NAND chip eraseblock size"
310 depends on ARCH_SUNXI
312 Number of data bytes in one eraseblock for the NAND chip on the
313 board. This is the multiple of NAND_PAGE_SIZE and the number of
316 config SYS_NAND_PAGE_SIZE
317 hex "NAND chip page size"
318 depends on ARCH_SUNXI
320 Number of data bytes in one page for the NAND chip on the
321 board, not including the OOB area.
323 config SYS_NAND_OOBSIZE
324 hex "NAND chip OOB size"
325 depends on ARCH_SUNXI
327 Number of bytes in the Out-Of-Band area for the NAND chip on
330 # Enhance depends when converting drivers to Kconfig which use this config
331 # option (mxc_nand, ndfc, omap_gpmc).
332 config SYS_NAND_BUSWIDTH_16BIT
333 bool "Use 16-bit NAND interface"
334 depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
336 Indicates that NAND device has 16-bit wide data-bus. In absence of this
337 config, bus-width of NAND device is assumed to be either 8-bit and later
338 determined by reading ONFI params.
339 Above config is useful when NAND device's bus-width information cannot
340 be determined from on-chip ONFI params, like in following scenarios:
341 - SPL boot does not support reading of ONFI parameters. This is done to
342 keep SPL code foot-print small.
343 - In current U-Boot flow using nand_init(), driver initialization
344 happens in board_nand_init() which is called before any device probe
345 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
346 not available while configuring controller. So a static CONFIG_NAND_xx
347 is needed to know the device's bus-width in advance.
349 config SYS_NAND_MAX_CHIPS
352 depends on NAND_ARASAN
354 The maximum number of NAND chips per device to be supported.
358 config SYS_NAND_U_BOOT_LOCATIONS
359 bool "Define U-boot binaries locations in NAND"
361 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
362 This option should not be enabled when compiling U-boot for boards
363 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
366 config SYS_NAND_U_BOOT_OFFS
367 hex "Location in NAND to read U-Boot from"
368 default 0x800000 if NAND_SUNXI
369 depends on SYS_NAND_U_BOOT_LOCATIONS
371 Set the offset from the start of the nand where u-boot should be
374 config SYS_NAND_U_BOOT_OFFS_REDUND
375 hex "Location in NAND to read U-Boot from"
376 default SYS_NAND_U_BOOT_OFFS
377 depends on SYS_NAND_U_BOOT_LOCATIONS
379 Set the offset from the start of the nand where the redundant u-boot
380 should be loaded from.
382 config SPL_NAND_AM33XX_BCH
383 bool "Enables SPL-NAND driver which supports ELM based"
384 depends on NAND_OMAP_GPMC && !OMAP34XX
387 Hardware ECC correction. This is useful for platforms which have ELM
388 hardware engine and use NAND boot mode.
389 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
390 so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
391 SPL-NAND driver with software ECC correction support.
393 config SPL_NAND_DENALI
394 bool "Support Denali NAND controller for SPL"
396 This is a small implementation of the Denali NAND controller
399 config SPL_NAND_SIMPLE
400 bool "Use simple SPL NAND driver"
401 depends on !SPL_NAND_AM33XX_BCH
403 Support for NAND boot using simple NAND drivers that
404 expose the cmd_ctrl() interface.