1a1d8c4e61282cc77df124c2bd587b771a5a61a0
[platform/kernel/u-boot.git] / drivers / mtd / nand / fsl_upm.c
1 /*
2  * FSL UPM NAND driver
3  *
4  * Copyright (C) 2007 MontaVista Software, Inc.
5  *                    Anton Vorontsov <avorontsov@ru.mvista.com>
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  */
12
13 #include <config.h>
14 #include <common.h>
15 #include <asm/io.h>
16 #include <asm/errno.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/fsl_upm.h>
19 #include <nand.h>
20
21 static void fsl_upm_start_pattern(struct fsl_upm *upm, u32 pat_offset)
22 {
23         clrsetbits_be32(upm->mxmr, MxMR_MAD_MSK, MxMR_OP_RUNP | pat_offset);
24 }
25
26 static void fsl_upm_end_pattern(struct fsl_upm *upm)
27 {
28         clrbits_be32(upm->mxmr, MxMR_OP_RUNP);
29
30         while (in_be32(upm->mxmr) & MxMR_OP_RUNP)
31                 eieio();
32 }
33
34 static void fsl_upm_run_pattern(struct fsl_upm *upm, int width, u32 cmd)
35 {
36         out_be32(upm->mar, cmd << (32 - width));
37         switch (width) {
38         case 8:
39                 out_8(upm->io_addr, 0x0);
40                 break;
41         case 16:
42                 out_be16(upm->io_addr, 0x0);
43                 break;
44         case 32:
45                 out_be32(upm->io_addr, 0x0);
46                 break;
47         }
48 }
49
50 static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
51 {
52         struct nand_chip *chip = mtd->priv;
53         struct fsl_upm_nand *fun = chip->priv;
54
55         if (!(ctrl & fun->last_ctrl)) {
56                 fsl_upm_end_pattern(&fun->upm);
57
58                 if (cmd == NAND_CMD_NONE)
59                         return;
60
61                 fun->last_ctrl = ctrl & (NAND_ALE | NAND_CLE);
62         }
63
64         if (ctrl & NAND_CTRL_CHANGE) {
65                 if (ctrl & NAND_ALE)
66                         fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
67                 else if (ctrl & NAND_CLE)
68                         fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
69         }
70
71         fsl_upm_run_pattern(&fun->upm, fun->width, cmd);
72
73         /*
74          * Some boards/chips needs this. At least on MPC8360E-RDK we
75          * need it. Probably weird chip, because I don't see any need
76          * for this on MPC8555E + Samsung K9F1G08U0A. Usually here are
77          * 0-2 unexpected busy states per block read.
78          */
79         if (fun->wait_pattern) {
80                 while (!fun->dev_ready())
81                         debug("unexpected busy state\n");
82         }
83 }
84
85 static u8 nand_read_byte(struct mtd_info *mtd)
86 {
87         struct nand_chip *chip = mtd->priv;
88
89         return in_8(chip->IO_ADDR_R);
90 }
91
92 static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
93 {
94         int i;
95         struct nand_chip *chip = mtd->priv;
96
97         for (i = 0; i < len; i++)
98                 out_8(chip->IO_ADDR_W, buf[i]);
99 }
100
101 static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
102 {
103         int i;
104         struct nand_chip *chip = mtd->priv;
105
106         for (i = 0; i < len; i++)
107                 buf[i] = in_8(chip->IO_ADDR_R);
108 }
109
110 static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
111 {
112         int i;
113         struct nand_chip *chip = mtd->priv;
114
115         for (i = 0; i < len; i++) {
116                 if (buf[i] != in_8(chip->IO_ADDR_R))
117                         return -EFAULT;
118         }
119
120         return 0;
121 }
122
123 static int nand_dev_ready(struct mtd_info *mtd)
124 {
125         struct nand_chip *chip = mtd->priv;
126         struct fsl_upm_nand *fun = chip->priv;
127
128         return fun->dev_ready();
129 }
130
131 int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun)
132 {
133         if (fun->width != 8 && fun->width != 16 && fun->width != 32)
134                 return -ENOSYS;
135
136         fun->last_ctrl = NAND_CLE;
137
138         chip->priv = fun;
139         chip->chip_delay = fun->chip_delay;
140         chip->ecc.mode = NAND_ECC_SOFT;
141         chip->cmd_ctrl = fun_cmd_ctrl;
142         chip->read_byte = nand_read_byte;
143         chip->read_buf = nand_read_buf;
144         chip->write_buf = nand_write_buf;
145         chip->verify_buf = nand_verify_buf;
146         if (fun->dev_ready)
147                 chip->dev_ready = nand_dev_ready;
148
149         return 0;
150 }