3 bool "NAND Device Support"
6 config SYS_NAND_SELF_INIT
9 This option, if enabled, provides more flexible and linux-like
10 NAND initialization process.
14 select SYS_NAND_SELF_INIT
18 bool "Support Denali NAND controller as a DT device"
20 depends on OF_CONTROL && DM
22 Enable the driver for NAND flash on platforms using a Denali NAND
23 controller as a DT device.
25 config NAND_DENALI_SPARE_AREA_SKIP_BYTES
26 int "Number of bytes skipped in OOB area"
27 depends on NAND_DENALI
30 This option specifies the number of bytes to skip from the beginning
31 of OOB area before last ECC sector data starts. This is potentially
32 used to preserve the bad block marker in the OOB area.
35 bool "Support OMAP GPMC NAND controller"
36 depends on ARCH_OMAP2PLUS
38 Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
39 GPMC controller is used for parallel NAND flash devices, and can
40 do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
41 and BCH16 ECC algorithms.
43 config NAND_OMAP_GPMC_PREFETCH
44 bool "Enable GPMC Prefetch"
45 depends on NAND_OMAP_GPMC
48 On OMAP platforms that use the GPMC controller
49 (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
50 uses the prefetch mode to speed up read operations.
53 bool "Enable ELM driver for OMAPxx and AMxx platforms."
54 depends on NAND_OMAP_GPMC && !OMAP34XX
56 ELM controller is used for ECC error detection (not ECC calculation)
57 of BCH4, BCH8 and BCH16 ECC algorithms.
58 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
59 thus such SoC platforms need to depend on software library for ECC error
60 detection. However ECC calculation on such plaforms would still be
61 done by GPMC controller.
64 bool "Support for Freescale NFC for VF610"
65 select SYS_NAND_SELF_INIT
68 Enables support for NAND Flash Controller on some Freescale
69 processors like the VF610, MCF54418 or Kinetis K70.
70 The driver supports a maximum 2k page size. The driver
71 currently does not support hardware ECC.
74 prompt "Hardware ECC strength"
75 depends on NAND_VF610_NFC
76 default SYS_NAND_VF610_NFC_45_ECC_BYTES
78 Select the ECC strength used in the hardware BCH ECC block.
80 config SYS_NAND_VF610_NFC_45_ECC_BYTES
81 bool "24-error correction (45 ECC bytes)"
83 config SYS_NAND_VF610_NFC_60_ECC_BYTES
84 bool "32-error correction (60 ECC bytes)"
89 bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
90 select SYS_NAND_SELF_INIT
93 This enables the driver for the NAND flash device found on
94 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
97 bool "Support for NAND on Allwinner SoCs"
99 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
100 select SYS_NAND_SELF_INIT
101 select SYS_NAND_U_BOOT_LOCATIONS
102 select SPL_NAND_SUPPORT
105 Enable support for NAND. This option enables the standard and
107 The SPL driver only supports reading from the NAND using DMA
112 config NAND_SUNXI_SPL_ECC_STRENGTH
113 int "Allwinner NAND SPL ECC Strength"
116 config NAND_SUNXI_SPL_ECC_SIZE
117 int "Allwinner NAND SPL ECC Step Size"
120 config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
121 int "Allwinner NAND SPL Usable Page Size"
127 bool "Configure Arasan Nand"
128 select SYS_NAND_SELF_INIT
131 This enables Nand driver support for Arasan nand flash
132 controller. This uses the hardware ECC for read and
136 bool "MXC NAND support"
137 depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
140 This enables the NAND driver for the NAND flash controller on the
141 i.MX27 / i.MX31 / i.MX5 rocessors.
144 bool "MXS NAND support"
145 depends on MX23 || MX28 || MX6 || MX7
148 select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
149 select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7
151 This enables NAND driver for the NAND flash controller on the
155 bool "Support for Zynq Nand controller"
156 select SYS_NAND_SELF_INIT
159 This enables Nand driver support for Nand flash controller
162 config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
163 bool "Enable use of 1st stage bootloader timing for NAND"
166 This flag prevent U-boot reconfigure NAND flash controller and reuse
167 the NAND timing from 1st stage bootloader.
169 comment "Generic NAND options"
171 # Enhance depends when converting drivers to Kconfig which use this config
172 # option (mxc_nand, ndfc, omap_gpmc).
173 config SYS_NAND_BUSWIDTH_16BIT
174 bool "Use 16-bit NAND interface"
175 depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
177 Indicates that NAND device has 16-bit wide data-bus. In absence of this
178 config, bus-width of NAND device is assumed to be either 8-bit and later
179 determined by reading ONFI params.
180 Above config is useful when NAND device's bus-width information cannot
181 be determined from on-chip ONFI params, like in following scenarios:
182 - SPL boot does not support reading of ONFI parameters. This is done to
183 keep SPL code foot-print small.
184 - In current U-Boot flow using nand_init(), driver initialization
185 happens in board_nand_init() which is called before any device probe
186 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
187 not available while configuring controller. So a static CONFIG_NAND_xx
188 is needed to know the device's bus-width in advance.
192 config SYS_NAND_U_BOOT_LOCATIONS
193 bool "Define U-boot binaries locations in NAND"
195 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
196 This option should not be enabled when compiling U-boot for boards
197 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
200 config SYS_NAND_U_BOOT_OFFS
201 hex "Location in NAND to read U-Boot from"
202 default 0x800000 if NAND_SUNXI
203 depends on SYS_NAND_U_BOOT_LOCATIONS
205 Set the offset from the start of the nand where u-boot should be
208 config SYS_NAND_U_BOOT_OFFS_REDUND
209 hex "Location in NAND to read U-Boot from"
210 default SYS_NAND_U_BOOT_OFFS
211 depends on SYS_NAND_U_BOOT_LOCATIONS
213 Set the offset from the start of the nand where the redundant u-boot
214 should be loaded from.
216 config SPL_NAND_AM33XX_BCH
217 bool "Enables SPL-NAND driver which supports ELM based"
218 depends on NAND_OMAP_GPMC && !OMAP34XX
221 Hardware ECC correction. This is useful for platforms which have ELM
222 hardware engine and use NAND boot mode.
223 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
224 so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
225 SPL-NAND driver with software ECC correction support.
227 config SPL_NAND_DENALI
228 bool "Support Denali NAND controller for SPL"
230 This is a small implementation of the Denali NAND controller
233 config SPL_NAND_SIMPLE
234 bool "Use simple SPL NAND driver"
235 depends on !SPL_NAND_AM33XX_BCH
237 Support for NAND boot using simple NAND drivers that
238 expose the cmd_ctrl() interface.