1 menu "NAND Device Support"
3 config SYS_NAND_SELF_INIT
6 This option, if enabled, provides more flexible and linux-like
7 NAND initialization process.
10 bool "Support Denali NAND controller"
11 select SYS_NAND_SELF_INIT
13 Enable support for the Denali NAND controller.
15 config SYS_NAND_DENALI_64BIT
16 bool "Use 64-bit variant of Denali NAND controller"
17 depends on NAND_DENALI
19 The Denali NAND controller IP has some variations in terms of
20 the bus interface. The DMA setup sequence is completely differenct
21 between 32bit / 64bit AXI bus variants.
23 If your Denali NAND controller is the 64-bit variant, say Y.
24 Otherwise (32 bit), say N.
26 config NAND_DENALI_SPARE_AREA_SKIP_BYTES
27 int "Number of bytes skipped in OOB area"
28 depends on NAND_DENALI
31 This option specifies the number of bytes to skip from the beginning
32 of OOB area before last ECC sector data starts. This is potentially
33 used to preserve the bad block marker in the OOB area.
36 bool "Support for Freescale NFC for VF610/MPC5125"
37 select SYS_NAND_SELF_INIT
39 Enables support for NAND Flash Controller on some Freescale
40 processors like the VF610, MPC5125, MCF54418 or Kinetis K70.
41 The driver supports a maximum 2k page size. The driver
42 currently does not support hardware ECC.
45 prompt "Hardware ECC strength"
46 depends on NAND_VF610_NFC
47 default SYS_NAND_VF610_NFC_45_ECC_BYTES
49 Select the ECC strength used in the hardware BCH ECC block.
51 config SYS_NAND_VF610_NFC_45_ECC_BYTES
52 bool "24-error correction (45 ECC bytes)"
54 config SYS_NAND_VF610_NFC_60_ECC_BYTES
55 bool "32-error correction (60 ECC bytes)"
60 bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
61 select SYS_NAND_SELF_INIT
63 This enables the driver for the NAND flash device found on
64 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
67 bool "Support for NAND on Allwinner SoCs in SPL"
68 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
69 select SYS_NAND_SELF_INIT
71 Enable support for NAND. This option allows SPL to read from
72 sunxi NAND using DMA transfers.
75 bool "Configure Arasan Nand"
77 This enables Nand driver support for Arasan nand flash
78 controller. This uses the hardware ECC for read and
81 comment "Generic NAND options"
83 # Enhance depends when converting drivers to Kconfig which use this config
84 # option (mxc_nand, ndfc, omap_gpmc).
85 config SYS_NAND_BUSWIDTH_16BIT
86 bool "Use 16-bit NAND interface"
87 depends on NAND_VF610_NFC
89 Indicates that NAND device has 16-bit wide data-bus. In absence of this
90 config, bus-width of NAND device is assumed to be either 8-bit and later
91 determined by reading ONFI params.
92 Above config is useful when NAND device's bus-width information cannot
93 be determined from on-chip ONFI params, like in following scenarios:
94 - SPL boot does not support reading of ONFI parameters. This is done to
95 keep SPL code foot-print small.
96 - In current U-Boot flow using nand_init(), driver initialization
97 happens in board_nand_init() which is called before any device probe
98 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
99 not available while configuring controller. So a static CONFIG_NAND_xx
100 is needed to know the device's bus-width in advance.
102 # Enhance depends when converting drivers to Kconfig which use this config
103 config SYS_NAND_U_BOOT_OFFS
104 hex "Location in NAND to read U-Boot from"
105 default 0x8000 if NAND_SUNXI
106 depends on NAND_SUNXI
108 Set the offset from the start of the nand where u-boot should be
113 config SPL_NAND_DENALI
114 bool "Support Denali NAND controller for SPL"
116 This is a small implementation of the Denali NAND controller